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iwlwifi: fix multicast
[net-next-2.6.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
df48c323
TW		 46MODULE_DESCRIPTION("iwl core");
47MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 49MODULE_LICENSE("GPL");
df48c323 50
06702a73
WYG		 51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
67static bool bt_coex_active = true;
68module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 69MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 70
c7de35cd
RR		 71#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
72 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
73 IWL_RATE_SISO_##s##M_PLCP, \
74 IWL_RATE_MIMO2_##s##M_PLCP,\
75 IWL_RATE_MIMO3_##s##M_PLCP,\
76 IWL_RATE_##r##M_IEEE, \
77 IWL_RATE_##ip##M_INDEX, \
78 IWL_RATE_##in##M_INDEX, \
79 IWL_RATE_##rp##M_INDEX, \
80 IWL_RATE_##rn##M_INDEX, \
81 IWL_RATE_##pp##M_INDEX, \
82 IWL_RATE_##np##M_INDEX }
83
a562a9dd
RC		 84u32 iwl_debug_level;
85EXPORT_SYMBOL(iwl_debug_level);
86
c7de35cd
RR		 87/*
88 * Parameter order:
89 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
90 *
91 * If there isn't a valid next or previous rate then INV is used which
92 * maps to IWL_RATE_INVALID
93 *
94 */
1826dcc0 95const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 96 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
97 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
98 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
99 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
100 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
101 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
102 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
103 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
104 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
105 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
106 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
107 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
108 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
109 /* FIXME:RS: ^^ should be INV (legacy) */
110};
1826dcc0 111EXPORT_SYMBOL(iwl_rates);
c7de35cd 112
e7d326ac
TW		 113int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
114{
115 int idx = 0;
116
117 /* HT rate format */
118 if (rate_n_flags & RATE_MCS_HT_MSK) {
119 idx = (rate_n_flags & 0xff);
120
60d32215
DH		 121 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
122 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
123 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 124 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
125
126 idx += IWL_FIRST_OFDM_RATE;
127 /* skip 9M not supported in ht*/
128 if (idx >= IWL_RATE_9M_INDEX)
129 idx += 1;
130 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
131 return idx;
132
133 /* legacy rate format, search for match in table */
134 } else {
135 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
136 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
137 return idx;
138 }
139
140 return -1;
141}
142EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
143
76eff18b
TW		 144u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
145{
146 int i;
147 u8 ind = ant;
148 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
149 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
150 if (priv->hw_params.valid_tx_ant & BIT(ind))
151 return ind;
152 }
153 return ant;
154}
47ff65c4 155EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW		 156
157const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
158EXPORT_SYMBOL(iwl_bcast_addr);
159
160
1d0a082d
AK		 161/* This function both allocates and initializes hw and priv. */
162struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
163 struct ieee80211_ops *hw_ops)
164{
165 struct iwl_priv *priv;
166
167 /* mac80211 allocates memory for this device instance, including
168 * space for this driver's private structure */
169 struct ieee80211_hw *hw =
170 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
171 if (hw == NULL) {
a3139c59
SO		 172 printk(KERN_ERR "%s: Can not allocate network device\n",
173 cfg->name);
1d0a082d
AK		 174 goto out;
175 }
176
177 priv = hw->priv;
178 priv->hw = hw;
179
180out:
181 return hw;
182}
183EXPORT_SYMBOL(iwl_alloc_all);
184
b661c819
TW		 185void iwl_hw_detect(struct iwl_priv *priv)
186{
187 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
188 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
189 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
190}
191EXPORT_SYMBOL(iwl_hw_detect);
192
14d2aac5
AK		 193/*
194 * QoS support
195*/
e61146e3 196static void iwl_update_qos(struct iwl_priv *priv)
14d2aac5
AK		 197{
198 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
199 return;
200
201 priv->qos_data.def_qos_parm.qos_flags = 0;
202
14d2aac5
AK		 203 if (priv->qos_data.qos_active)
204 priv->qos_data.def_qos_parm.qos_flags |=
205 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
206
207 if (priv->current_ht_config.is_ht)
208 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
209
e61146e3
SG		 210 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
211 priv->qos_data.qos_active,
212 priv->qos_data.def_qos_parm.qos_flags);
14d2aac5 213
e61146e3
SG		 214 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
215 sizeof(struct iwl_qosparam_cmd),
216 &priv->qos_data.def_qos_parm, NULL);
14d2aac5 217}
c7de35cd 218
d9fe60de
JB		 219#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
220#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 221static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 222 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 223 enum ieee80211_band band)
224{
39130df3
RR		 225 u16 max_bit_rate = 0;
226 u8 rx_chains_num = priv->hw_params.rx_chains_num;
227 u8 tx_chains_num = priv->hw_params.tx_chains_num;
228
c7de35cd 229 ht_info->cap = 0;
d9fe60de 230 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 231
d9fe60de 232 ht_info->ht_supported = true;
c7de35cd 233
b261793d
DH		 234 if (priv->cfg->ht_greenfield_support)
235 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 236 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 237 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 238 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 239 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
240 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
241 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 242 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 243 }
c7de35cd
RR		 244
245 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 246 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 247
248 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
249 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
250
d9fe60de 251 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 252 if (rx_chains_num >= 2)
d9fe60de 253 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 254 if (rx_chains_num >= 3)
d9fe60de 255 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 256
257 /* Highest supported Rx data rate */
258 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 259 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
260 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 261
262 /* Tx MCS capabilities */
d9fe60de 263 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 264 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 265 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
266 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
267 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 268 }
c7de35cd 269}
c7de35cd 270
c7de35cd
RR		 271/**
272 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
273 */
534166de 274int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 275{
276 struct iwl_channel_info *ch;
277 struct ieee80211_supported_band *sband;
278 struct ieee80211_channel *channels;
279 struct ieee80211_channel *geo_ch;
280 struct ieee80211_rate *rates;
281 int i = 0;
282
283 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
284 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 285 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 286 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
287 return 0;
288 }
289
290 channels = kzalloc(sizeof(struct ieee80211_channel) *
291 priv->channel_count, GFP_KERNEL);
292 if (!channels)
293 return -ENOMEM;
294
5027309b 295 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 296 GFP_KERNEL);
297 if (!rates) {
298 kfree(channels);
299 return -ENOMEM;
300 }
301
302 /* 5.2GHz channels start after the 2.4GHz channels */
303 sband = &priv->bands[IEEE80211_BAND_5GHZ];
304 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
305 /* just OFDM */
306 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 307 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 308
49779293 309 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 310 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 311 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 312
313 sband = &priv->bands[IEEE80211_BAND_2GHZ];
314 sband->channels = channels;
315 /* OFDM & CCK */
316 sband->bitrates = rates;
5027309b 317 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 318
49779293 319 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 320 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 321 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 322
323 priv->ieee_channels = channels;
324 priv->ieee_rates = rates;
325
c7de35cd
RR		 326 for (i = 0; i < priv->channel_count; i++) {
327 ch = &priv->channel_info[i];
328
329 /* FIXME: might be removed if scan is OK */
330 if (!is_channel_valid(ch))
331 continue;
332
333 if (is_channel_a_band(ch))
334 sband = &priv->bands[IEEE80211_BAND_5GHZ];
335 else
336 sband = &priv->bands[IEEE80211_BAND_2GHZ];
337
338 geo_ch = &sband->channels[sband->n_channels++];
339
340 geo_ch->center_freq =
341 ieee80211_channel_to_frequency(ch->channel);
342 geo_ch->max_power = ch->max_power_avg;
343 geo_ch->max_antenna_gain = 0xff;
344 geo_ch->hw_value = ch->channel;
345
346 if (is_channel_valid(ch)) {
347 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
348 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
349
350 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
351 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
352
353 if (ch->flags & EEPROM_CHANNEL_RADAR)
354 geo_ch->flags |= IEEE80211_CHAN_RADAR;
355
7aafef1c 356 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 357
dc1b0973
WYG		 358 if (ch->max_power_avg > priv->tx_power_device_lmt)
359 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 360 } else {
361 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
362 }
363
e1623446 364 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 365 ch->channel, geo_ch->center_freq,
366 is_channel_a_band(ch) ? "5.2" : "2.4",
367 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
368 "restricted" : "valid",
369 geo_ch->flags);
370 }
371
372 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
373 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 374 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
375 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 376 priv->pci_dev->device,
377 priv->pci_dev->subsystem_device);
c7de35cd
RR		 378 priv->cfg->sku &= ~IWL_SKU_A;
379 }
380
978785a3 381 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 382 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
383 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 384
385 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
386
387 return 0;
388}
534166de 389EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 390
391/*
392 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
393 */
534166de 394void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 395{
396 kfree(priv->ieee_channels);
397 kfree(priv->ieee_rates);
398 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
399}
534166de 400EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 401
37dc70fe
AK		 402/*
403 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
404 * function.
405 */
406void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
407 __le32 *tx_flags)
408{
409 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
410 *tx_flags |= TX_CMD_FLG_RTS_MSK;
411 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
412 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
413 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
414 *tx_flags |= TX_CMD_FLG_CTS_MSK;
415 }
416}
417EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
418
28a6b07a 419static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 420{
ba37a3d0 421 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 422 priv->current_ht_config.single_chain_sufficient;
c7de35cd 423}
963f5517 424
47c5196e
TW		 425static u8 iwl_is_channel_extension(struct iwl_priv *priv,
426 enum ieee80211_band band,
427 u16 channel, u8 extension_chan_offset)
428{
429 const struct iwl_channel_info *ch_info;
430
431 ch_info = iwl_get_channel_info(priv, band, channel);
432 if (!is_channel_valid(ch_info))
433 return 0;
434
d9fe60de 435 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 436 return !(ch_info->ht40_extension_channel &
689da1b3 437 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 438 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 439 return !(ch_info->ht40_extension_channel &
689da1b3 440 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 441
442 return 0;
443}
444
7aafef1c 445u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 446 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 447{
fad95bf5 448 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
47c5196e 449
fad95bf5 450 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW		 451 return 0;
452
a2b0f02e
WYG		 453 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
454 * the bit will not set if it is pure 40MHz case
455 */
47c5196e 456 if (sta_ht_inf) {
a2b0f02e 457 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 458 return 0;
459 }
1e4247d4
WYG		 460#ifdef CONFIG_IWLWIFI_DEBUG
461 if (priv->disable_ht40)
462 return 0;
463#endif
611d3eb7
WYG		 464 return iwl_is_channel_extension(priv, priv->band,
465 le16_to_cpu(priv->staging_rxon.channel),
fad95bf5 466 ht_conf->extension_chan_offset);
47c5196e 467}
7aafef1c 468EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 469
2c2f3b33
TW		 470static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
471{
472 u16 new_val = 0;
473 u16 beacon_factor = 0;
474
475 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
476 new_val = beacon_val / beacon_factor;
477
478 if (!new_val)
479 new_val = max_beacon_val;
480
481 return new_val;
482}
483
1dda6d28 484void iwl_setup_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif)
2c2f3b33
TW		 485{
486 u64 tsf;
487 s32 interval_tm, rem;
488 unsigned long flags;
489 struct ieee80211_conf *conf = NULL;
490 u16 beacon_int;
491
492 conf = ieee80211_get_hw_conf(priv->hw);
493
494 spin_lock_irqsave(&priv->lock, flags);
495 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
496 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
497
1dda6d28 498 beacon_int = vif->bss_conf.beacon_int;
2c2f3b33 499
1dda6d28 500 if (vif->type == NL80211_IFTYPE_ADHOC) {
2c2f3b33
TW		 501 /* TODO: we need to get atim_window from upper stack
502 * for now we set to 0 */
503 priv->rxon_timing.atim_window = 0;
1dda6d28
JB		 504 } else {
505 priv->rxon_timing.atim_window = 0;
2c2f3b33
TW		 506 }
507
508 beacon_int = iwl_adjust_beacon_interval(beacon_int,
509 priv->hw_params.max_beacon_itrvl * 1024);
510 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
511
512 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
513 interval_tm = beacon_int * 1024;
514 rem = do_div(tsf, interval_tm);
515 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
516
517 spin_unlock_irqrestore(&priv->lock, flags);
518 IWL_DEBUG_ASSOC(priv,
519 "beacon interval %d beacon timer %d beacon tim %d\n",
520 le16_to_cpu(priv->rxon_timing.beacon_interval),
521 le32_to_cpu(priv->rxon_timing.beacon_init_val),
522 le16_to_cpu(priv->rxon_timing.atim_window));
523}
524EXPORT_SYMBOL(iwl_setup_rxon_timing);
525
8ccde88a
SO		 526void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
527{
528 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
529
530 if (hw_decrypt)
531 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
532 else
533 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
534
535}
536EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
537
538/**
539 * iwl_check_rxon_cmd - validate RXON structure is valid
540 *
541 * NOTE: This is really only useful during development and can eventually
542 * be #ifdef'd out once the driver is stable and folks aren't actively
543 * making changes
544 */
545int iwl_check_rxon_cmd(struct iwl_priv *priv)
546{
547 int error = 0;
548 int counter = 1;
549 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
550
551 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
552 error |= le32_to_cpu(rxon->flags &
553 (RXON_FLG_TGJ_NARROW_BAND_MSK |
554 RXON_FLG_RADAR_DETECT_MSK));
555 if (error)
556 IWL_WARN(priv, "check 24G fields %d | %d\n",
557 counter++, error);
558 } else {
559 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
560 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
561 if (error)
562 IWL_WARN(priv, "check 52 fields %d | %d\n",
563 counter++, error);
564 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
565 if (error)
566 IWL_WARN(priv, "check 52 CCK %d | %d\n",
567 counter++, error);
568 }
569 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
570 if (error)
571 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
572
573 /* make sure basic rates 6Mbps and 1Mbps are supported */
574 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
575 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
576 if (error)
577 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
578
579 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
580 if (error)
581 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
582
583 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
584 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
585 if (error)
586 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
587 counter++, error);
588
589 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
590 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
591 if (error)
592 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
593 counter++, error);
594
595 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
596 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
597 if (error)
598 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
599 counter++, error);
600
601 if (error)
602 IWL_WARN(priv, "Tuning to channel %d\n",
603 le16_to_cpu(rxon->channel));
604
605 if (error) {
606 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
607 return -1;
608 }
609 return 0;
610}
611EXPORT_SYMBOL(iwl_check_rxon_cmd);
612
613/**
614 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
615 * @priv: staging_rxon is compared to active_rxon
616 *
617 * If the RXON structure is changing enough to require a new tune,
618 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
619 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
620 */
621int iwl_full_rxon_required(struct iwl_priv *priv)
622{
623
624 /* These items are only settable from the full RXON command */
625 if (!(iwl_is_associated(priv)) ||
626 compare_ether_addr(priv->staging_rxon.bssid_addr,
627 priv->active_rxon.bssid_addr) ||
628 compare_ether_addr(priv->staging_rxon.node_addr,
629 priv->active_rxon.node_addr) ||
630 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
631 priv->active_rxon.wlap_bssid_addr) ||
632 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
633 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
634 (priv->staging_rxon.air_propagation !=
635 priv->active_rxon.air_propagation) ||
636 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
637 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
638 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
639 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 640 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
641 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 642 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
643 return 1;
644
645 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
646 * be updated with the RXON_ASSOC command -- however only some
647 * flag transitions are allowed using RXON_ASSOC */
648
649 /* Check if we are not switching bands */
650 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
651 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
652 return 1;
653
654 /* Check if we are switching association toggle */
655 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
656 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
657 return 1;
658
659 return 0;
660}
661EXPORT_SYMBOL(iwl_full_rxon_required);
662
663u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
664{
4a02886b
JB		 665 /*
666 * Assign the lowest rate -- should really get this from
667 * the beacon skb from mac80211.
668 */
8ccde88a
SO		 669 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
670 return IWL_RATE_1M_PLCP;
671 else
672 return IWL_RATE_6M_PLCP;
673}
674EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
675
fad95bf5 676void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
47c5196e 677{
c1adf9fb 678 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 679
fad95bf5 680 if (!ht_conf->is_ht) {
a2b0f02e 681 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 682 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 683 RXON_FLG_HT40_PROT_MSK |
42eb7c64 684 RXON_FLG_HT_PROT_MSK);
47c5196e 685 return;
42eb7c64 686 }
47c5196e 687
a2b0f02e
WYG		 688 /* FIXME: if the definition of ht_protection changed, the "translation"
689 * will be needed for rxon->flags
690 */
fad95bf5 691 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 692
693 /* Set up channel bandwidth:
7aafef1c 694 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 695 /* clear the HT channel mode before set the mode */
696 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
697 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 698 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
699 /* pure ht40 */
fad95bf5 700 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 701 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 702 /* Note: control channel is opposite of extension channel */
fad95bf5 703 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG		 704 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
705 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
706 break;
707 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
708 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
709 break;
710 }
711 } else {
a2b0f02e 712 /* Note: control channel is opposite of extension channel */
fad95bf5 713 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG		 714 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
715 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
716 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
717 break;
718 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
719 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
720 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
721 break;
722 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
723 default:
724 /* channel location only valid if in Mixed mode */
725 IWL_ERR(priv, "invalid extension channel offset\n");
726 break;
727 }
728 }
729 } else {
730 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 731 }
732
45823531
AK		 733 if (priv->cfg->ops->hcmd->set_rxon_chain)
734 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 735
02bb1bea 736 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 737 "extension channel offset 0x%x\n",
fad95bf5
JB		 738 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
739 ht_conf->extension_chan_offset);
47c5196e
TW		 740}
741EXPORT_SYMBOL(iwl_set_rxon_ht);
742
9e5e6c32
TW		 743#define IWL_NUM_RX_CHAINS_MULTIPLE 3
744#define IWL_NUM_RX_CHAINS_SINGLE 2
745#define IWL_NUM_IDLE_CHAINS_DUAL 2
746#define IWL_NUM_IDLE_CHAINS_SINGLE 1
747
2b396a12
JB		 748/*
749 * Determine how many receiver/antenna chains to use.
750 *
751 * More provides better reception via diversity. Fewer saves power
752 * at the expense of throughput, but only when not in powersave to
753 * start with.
754 *
c7de35cd
RR		 755 * MIMO (dual stream) requires at least 2, but works better with 3.
756 * This does not determine *which* chains to use, just how many.
757 */
28a6b07a 758static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 759{
c7de35cd 760 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 761 if (is_single_rx_stream(priv))
9e5e6c32 762 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 763 else
9e5e6c32 764 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 765}
c7de35cd 766
2b396a12 767/*
3f3e0376
WYG		 768 * When we are in power saving mode, unless device support spatial
769 * multiplexing power save, use the active count for rx chain count.
2b396a12 770 */
28a6b07a
TW		 771static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
772{
ba37a3d0
JB		 773 /* # Rx chains when idling, depending on SMPS mode */
774 switch (priv->current_ht_config.smps) {
775 case IEEE80211_SMPS_STATIC:
776 case IEEE80211_SMPS_DYNAMIC:
777 return IWL_NUM_IDLE_CHAINS_SINGLE;
778 case IEEE80211_SMPS_OFF:
779 return active_cnt;
c15d20c1 780 default:
ba37a3d0
JB		 781 WARN(1, "invalid SMPS mode %d",
782 priv->current_ht_config.smps);
783 return active_cnt;
3f3e0376 784 }
c7de35cd
RR		 785}
786
04816448
GE		 787/* up to 4 chains */
788static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
789{
790 u8 res;
791 res = (chain_bitmap & BIT(0)) >> 0;
792 res += (chain_bitmap & BIT(1)) >> 1;
793 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 794 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 795 return res;
796}
797
c7de35cd
RR		 798/**
799 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
800 *
801 * Selects how many and which Rx receivers/antennas/chains to use.
802 * This should not be used for scan command ... it puts data in wrong place.
803 */
804void iwl_set_rxon_chain(struct iwl_priv *priv)
805{
28a6b07a
TW		 806 bool is_single = is_single_rx_stream(priv);
807 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 808 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
809 u32 active_chains;
28a6b07a 810 u16 rx_chain;
c7de35cd
RR		 811
812 /* Tell uCode which antennas are actually connected.
813 * Before first association, we assume all antennas are connected.
814 * Just after first association, iwl_chain_noise_calibration()
815 * checks which antennas actually *are* connected. */
04816448
GE		 816 if (priv->chain_noise_data.active_chains)
817 active_chains = priv->chain_noise_data.active_chains;
818 else
819 active_chains = priv->hw_params.valid_rx_ant;
820
821 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 822
823 /* How many receivers should we use? */
28a6b07a
TW		 824 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
825 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
826
28a6b07a 827
04816448
GE		 828 /* correct rx chain count according hw settings
829 * and chain noise calibration
830 */
831 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
832 if (valid_rx_cnt < active_rx_cnt)
833 active_rx_cnt = valid_rx_cnt;
834
835 if (valid_rx_cnt < idle_rx_cnt)
836 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 837
838 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
839 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
840
841 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
842
9e5e6c32 843 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 844 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
845 else
846 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
847
e1623446 848 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 849 priv->staging_rxon.rx_chain,
850 active_rx_cnt, idle_rx_cnt);
851
852 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
853 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 854}
855EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f 856
14023641
AK		 857/* Return valid channel */
858u8 iwl_get_single_channel_number(struct iwl_priv *priv,
859 enum ieee80211_band band)
860{
861 const struct iwl_channel_info *ch_info;
862 int i;
863 u8 channel = 0;
864
865 /* only scan single channel, good enough to reset the RF */
866 /* pick the first valid not in-use channel */
867 if (band == IEEE80211_BAND_5GHZ) {
868 for (i = 14; i < priv->channel_count; i++) {
869 if (priv->channel_info[i].channel !=
870 le16_to_cpu(priv->staging_rxon.channel)) {
871 channel = priv->channel_info[i].channel;
872 ch_info = iwl_get_channel_info(priv,
873 band, channel);
874 if (is_channel_valid(ch_info))
875 break;
876 }
877 }
878 } else {
879 for (i = 0; i < 14; i++) {
880 if (priv->channel_info[i].channel !=
881 le16_to_cpu(priv->staging_rxon.channel)) {
882 channel =
883 priv->channel_info[i].channel;
884 ch_info = iwl_get_channel_info(priv,
885 band, channel);
886 if (is_channel_valid(ch_info))
887 break;
888 }
889 }
890 }
891
892 return channel;
893}
894EXPORT_SYMBOL(iwl_get_single_channel_number);
895
bf85ea4f 896/**
17e72782 897 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 898 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
899 * @channel: Any channel valid for the requested phymode
900
901 * In addition to setting the staging RXON, priv->phymode is also set.
902 *
903 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
904 * in the staging RXON flag structure based on the phymode
905 */
17e72782 906int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 907{
17e72782
TW		 908 enum ieee80211_band band = ch->band;
909 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
910
8622e705 911 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 912 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 913 channel, band);
914 return -EINVAL;
915 }
916
917 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
918 (priv->band == band))
919 return 0;
920
921 priv->staging_rxon.channel = cpu_to_le16(channel);
922 if (band == IEEE80211_BAND_5GHZ)
923 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
924 else
925 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
926
927 priv->band = band;
928
e1623446 929 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 930
931 return 0;
932}
c7de35cd 933EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 934
1dda6d28
JB		 935static void iwl_set_flags_for_band(struct iwl_priv *priv,
936 enum ieee80211_band band,
937 struct ieee80211_vif *vif)
8ccde88a
SO		 938{
939 if (band == IEEE80211_BAND_5GHZ) {
940 priv->staging_rxon.flags &=
941 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
942 | RXON_FLG_CCK_MSK);
943 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
944 } else {
945 /* Copied from iwl_post_associate() */
1dda6d28 946 if (vif && vif->bss_conf.assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a
SO		 947 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
948 else
949 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
950
1dda6d28 951 if (vif && vif->type == NL80211_IFTYPE_ADHOC)
8ccde88a
SO		 952 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
953
954 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
955 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
956 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
957 }
958}
8ccde88a
SO		 959
960/*
961 * initialize rxon structure with default values from eeprom
962 */
1dda6d28
JB		 963void iwl_connection_init_rx_config(struct iwl_priv *priv,
964 struct ieee80211_vif *vif)
8ccde88a
SO		 965{
966 const struct iwl_channel_info *ch_info;
1dda6d28
JB		 967 enum nl80211_iftype type = NL80211_IFTYPE_STATION;
968
969 if (vif)
970 type = vif->type;
8ccde88a
SO		 971
972 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
973
1dda6d28 974 switch (type) {
8ccde88a
SO		 975 case NL80211_IFTYPE_AP:
976 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
977 break;
978
979 case NL80211_IFTYPE_STATION:
980 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
981 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
982 break;
983
984 case NL80211_IFTYPE_ADHOC:
985 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
986 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
987 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
988 RXON_FILTER_ACCEPT_GRP_MSK;
989 break;
990
8ccde88a 991 default:
1dda6d28 992 IWL_ERR(priv, "Unsupported interface type %d\n", type);
8ccde88a
SO		 993 break;
994 }
995
996#if 0
997 /* TODO: Figure out when short_preamble would be set and cache from
998 * that */
999 if (!hw_to_local(priv->hw)->short_preamble)
1000 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1001 else
1002 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1003#endif
1004
1005 ch_info = iwl_get_channel_info(priv, priv->band,
1006 le16_to_cpu(priv->active_rxon.channel));
1007
1008 if (!ch_info)
1009 ch_info = &priv->channel_info[0];
1010
8ccde88a
SO		 1011 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1012 priv->band = ch_info->band;
1013
1dda6d28 1014 iwl_set_flags_for_band(priv, priv->band, vif);
8ccde88a
SO		 1015
1016 priv->staging_rxon.ofdm_basic_rates =
1017 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1018 priv->staging_rxon.cck_basic_rates =
1019 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1020
a2b0f02e
WYG		 1021 /* clear both MIX and PURE40 mode flag */
1022 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1023 RXON_FLG_CHANNEL_MODE_PURE_40);
8ccde88a
SO		 1024 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1025 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1026 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1027 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1028 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1029}
1030EXPORT_SYMBOL(iwl_connection_init_rx_config);
1031
782571f4 1032static void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1033{
1034 const struct ieee80211_supported_band *hw = NULL;
1035 struct ieee80211_rate *rate;
1036 int i;
1037
1038 hw = iwl_get_hw_mode(priv, priv->band);
1039 if (!hw) {
1040 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1041 return;
1042 }
1043
1044 priv->active_rate = 0;
8ccde88a
SO		 1045
1046 for (i = 0; i < hw->n_bitrates; i++) {
1047 rate = &(hw->bitrates[i]);
5027309b 1048 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1049 priv->active_rate |= (1 << rate->hw_value);
1050 }
1051
4a02886b 1052 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1053
4a02886b
JB		 1054 priv->staging_rxon.cck_basic_rates =
1055 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1056
1057 priv->staging_rxon.ofdm_basic_rates =
1058 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
8ccde88a 1059}
8ccde88a
SO		 1060
1061void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1062{
2f301227 1063 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a
SO		 1064 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1065 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
4a56e965 1066
0924e519
WYG		 1067 if (priv->switch_rxon.switch_in_progress) {
1068 if (!le32_to_cpu(csa->status) &&
1069 (csa->channel == priv->switch_rxon.channel)) {
1070 rxon->channel = csa->channel;
1071 priv->staging_rxon.channel = csa->channel;
1072 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1073 le16_to_cpu(csa->channel));
1074 } else
1075 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1076 le16_to_cpu(csa->channel));
1077
1078 priv->switch_rxon.switch_in_progress = false;
1079 }
8ccde88a
SO		 1080}
1081EXPORT_SYMBOL(iwl_rx_csa);
1082
1083#ifdef CONFIG_IWLWIFI_DEBUG
a643565e 1084void iwl_print_rx_config_cmd(struct iwl_priv *priv)
8ccde88a
SO		 1085{
1086 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1087
e1623446 1088 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1089 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1090 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1091 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1092 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1093 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1094 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1095 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1096 rxon->ofdm_basic_rates);
e1623446
TW		 1097 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1098 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1099 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1100 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1101}
a643565e 1102EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1103#endif
8ccde88a
SO		 1104/**
1105 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1106 */
1107void iwl_irq_handle_error(struct iwl_priv *priv)
1108{
1109 /* Set the FW error flag -- cleared on iwl_down */
1110 set_bit(STATUS_FW_ERROR, &priv->status);
1111
1112 /* Cancel currently queued command. */
1113 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1114
459bc732
SZ		 1115 IWL_ERR(priv, "Loaded firmware version: %s\n",
1116 priv->hw->wiphy->fw_version);
1117
3a3ff72c 1118 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 1119 if (priv->cfg->ops->lib->dump_csr)
1120 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 1121 if (priv->cfg->ops->lib->dump_fh)
1122 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1123 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1124#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1125 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
8ccde88a 1126 iwl_print_rx_config_cmd(priv);
8ccde88a
SO		 1127#endif
1128
1129 wake_up_interruptible(&priv->wait_command_queue);
1130
1131 /* Keep the restart process from trying to send host
1132 * commands by clearing the INIT status bit */
1133 clear_bit(STATUS_READY, &priv->status);
1134
1135 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1136 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1137 "Restarting adapter due to uCode error.\n");
1138
8ccde88a
SO		 1139 if (priv->cfg->mod_params->restart_fw)
1140 queue_work(priv->workqueue, &priv->restart);
1141 }
1142}
1143EXPORT_SYMBOL(iwl_irq_handle_error);
1144
f8e200de 1145static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1146{
5220af0c 1147 int ret = 0;
d68b603c 1148
5220af0c 1149 /* stop device's busmaster DMA activity */
d68b603c
AK		 1150 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1151
5220af0c 1152 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1153 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1154 if (ret)
1155 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1156
d68b603c
AK		 1157 IWL_DEBUG_INFO(priv, "stop master\n");
1158
5220af0c 1159 return ret;
d68b603c 1160}
d68b603c
AK		 1161
1162void iwl_apm_stop(struct iwl_priv *priv)
1163{
fadb3582
BC		 1164 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1165
5220af0c 1166 /* Stop device's DMA activity */
d68b603c
AK		 1167 iwl_apm_stop_master(priv);
1168
5220af0c 1169 /* Reset the entire device */
d68b603c
AK		 1170 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1171
1172 udelay(10);
5220af0c
BC		 1173
1174 /*
1175 * Clear "initialization complete" bit to move adapter from
1176 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1177 */
d68b603c 1178 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1179}
1180EXPORT_SYMBOL(iwl_apm_stop);
1181
fadb3582
BC		 1182
1183/*
1184 * Start up NIC's basic functionality after it has been reset
1185 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1186 * NOTE: This does not load uCode nor start the embedded processor
1187 */
1188int iwl_apm_init(struct iwl_priv *priv)
1189{
1190 int ret = 0;
1191 u16 lctl;
1192
1193 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1194
1195 /*
1196 * Use "set_bit" below rather than "write", to preserve any hardware
1197 * bits already set by default after reset.
1198 */
1199
1200 /* Disable L0S exit timer (platform NMI Work/Around) */
1201 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1202 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1203
1204 /*
1205 * Disable L0s without affecting L1;
1206 * don't wait for ICH L0s (ICH bug W/A)
1207 */
1208 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1209 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1210
1211 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1212 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1213
1214 /*
1215 * Enable HAP INTA (interrupt from management bus) to
1216 * wake device's PCI Express link L1a -> L0s
1217 * NOTE: This is no-op for 3945 (non-existant bit)
1218 */
1219 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1220 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1221
1222 /*
a6c5c731
BC		 1223 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1224 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1225 * If so (likely), disable L0S, so device moves directly L0->L1;
1226 * costs negligible amount of power savings.
1227 * If not (unlikely), enable L0S, so there is at least some
1228 * power savings, even without L1.
fadb3582
BC		 1229 */
1230 if (priv->cfg->set_l0s) {
1231 lctl = iwl_pcie_link_ctl(priv);
1232 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1233 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1234 /* L1-ASPM enabled; disable(!) L0S */
1235 iwl_set_bit(priv, CSR_GIO_REG,
1236 CSR_GIO_REG_VAL_L0S_ENABLED);
1237 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1238 } else {
1239 /* L1-ASPM disabled; enable(!) L0S */
1240 iwl_clear_bit(priv, CSR_GIO_REG,
1241 CSR_GIO_REG_VAL_L0S_ENABLED);
1242 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1243 }
1244 }
1245
1246 /* Configure analog phase-lock-loop before activating to D0A */
1247 if (priv->cfg->pll_cfg_val)
1248 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1249
1250 /*
1251 * Set "initialization complete" bit to move adapter from
1252 * D0U* --> D0A* (powered-up active) state.
1253 */
1254 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1255
1256 /*
1257 * Wait for clock stabilization; once stabilized, access to
1258 * device-internal resources is supported, e.g. iwl_write_prph()
1259 * and accesses to uCode SRAM.
1260 */
1261 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1262 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1263 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1264 if (ret < 0) {
1265 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1266 goto out;
1267 }
1268
1269 /*
1270 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1271 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1272 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1273 * and don't need BSM to restore data after power-saving sleep.
1274 *
1275 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1276 * do not disable clocks. This preserves any hardware bits already
1277 * set by default in "CLK_CTRL_REG" after reset.
1278 */
1279 if (priv->cfg->use_bsm)
1280 iwl_write_prph(priv, APMG_CLK_EN_REG,
1281 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1282 else
1283 iwl_write_prph(priv, APMG_CLK_EN_REG,
1284 APMG_CLK_VAL_DMA_CLK_RQT);
1285 udelay(20);
1286
1287 /* Disable L1-Active */
1288 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1289 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1290
1291out:
1292 return ret;
1293}
1294EXPORT_SYMBOL(iwl_apm_init);
1295
1296
1297
8ccde88a
SO		 1298void iwl_configure_filter(struct ieee80211_hw *hw,
1299 unsigned int changed_flags,
1300 unsigned int *total_flags,
3ac64bee 1301 u64 multicast)
8ccde88a
SO		 1302{
1303 struct iwl_priv *priv = hw->priv;
3474ad63
JB		 1304 __le32 filter_or = 0, filter_nand = 0;
1305
1306#define CHK(test, flag) do { \
1307 if (*total_flags & (test)) \
1308 filter_or |= (flag); \
1309 else \
1310 filter_nand |= (flag); \
1311 } while (0)
8ccde88a 1312
e1623446 1313 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1314 changed_flags, *total_flags);
1315
3474ad63 1316 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3474ad63
JB		 1317 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
1318 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
8ccde88a 1319
3474ad63
JB		 1320#undef CHK
1321
1322 mutex_lock(&priv->mutex);
1323
1324 priv->staging_rxon.filter_flags &= ~filter_nand;
1325 priv->staging_rxon.filter_flags |= filter_or;
1326
1327 iwlcore_commit_rxon(priv);
1328
1329 mutex_unlock(&priv->mutex);
8ccde88a 1330
d1e89f37
JB		 1331 /*
1332 * Receiving all multicast frames is always enabled by the
1333 * default flags setup in iwl_connection_init_rx_config()
1334 * since we currently do not support programming multicast
1335 * filters into the device.
1336 */
8ccde88a
SO		 1337 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1338 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1339}
1340EXPORT_SYMBOL(iwl_configure_filter);
1341
da154e30
RR		 1342int iwl_set_hw_params(struct iwl_priv *priv)
1343{
da154e30
RR		 1344 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1345 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1346 if (priv->cfg->mod_params->amsdu_size_8K)
2f301227 1347 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
da154e30 1348 else
2f301227 1349 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
da154e30 1350
2c2f3b33
TW		 1351 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1352
49779293
RR		 1353 if (priv->cfg->mod_params->disable_11n)
1354 priv->cfg->sku &= ~IWL_SKU_N;
1355
da154e30
RR		 1356 /* Device-specific setup */
1357 return priv->cfg->ops->lib->set_hw_params(priv);
1358}
1359EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956 1360
630fe9b6
TW		 1361int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1362{
1363 int ret = 0;
5eadd94b
WYG		 1364 s8 prev_tx_power = priv->tx_power_user_lmt;
1365
b744cb79
WYG		 1366 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1367 IWL_WARN(priv,
1368 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1369 tx_power,
b744cb79 1370 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1371 return -EINVAL;
1372 }
1373
dc1b0973 1374 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1375 IWL_WARN(priv,
1376 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1377 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1378 return -EINVAL;
1379 }
1380
1381 if (priv->tx_power_user_lmt != tx_power)
1382 force = true;
1383
019fb97d 1384 /* if nic is not up don't send command */
5eadd94b
WYG		 1385 if (iwl_is_ready_rf(priv)) {
1386 priv->tx_power_user_lmt = tx_power;
1387 if (force && priv->cfg->ops->lib->send_tx_power)
1388 ret = priv->cfg->ops->lib->send_tx_power(priv);
1389 else if (!priv->cfg->ops->lib->send_tx_power)
1390 ret = -EOPNOTSUPP;
1391 /*
1392 * if fail to set tx_power, restore the orig. tx power
1393 */
1394 if (ret)
1395 priv->tx_power_user_lmt = prev_tx_power;
1396 }
630fe9b6 1397
5eadd94b
WYG		 1398 /*
1399 * Even this is an async host command, the command
1400 * will always report success from uCode
1401 * So once driver can placing the command into the queue
1402 * successfully, driver can use priv->tx_power_user_lmt
1403 * to reflect the current tx power
1404 */
630fe9b6
TW		 1405 return ret;
1406}
1407EXPORT_SYMBOL(iwl_set_tx_power);
1408
ef850d7c 1409irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1410{
1411 struct iwl_priv *priv = data;
1412 u32 inta, inta_mask;
1413 u32 inta_fh;
6e8cc38d 1414 unsigned long flags;
f17d08a6
AK		 1415 if (!priv)
1416 return IRQ_NONE;
1417
6e8cc38d 1418 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK		 1419
1420 /* Disable (but don't clear!) interrupts here to avoid
1421 * back-to-back ISRs and sporadic interrupts from our NIC.
1422 * If we have something to service, the tasklet will re-enable ints.
1423 * If we *don't* have something, we'll re-enable before leaving here. */
1424 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1425 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1426
1427 /* Discover which interrupts are active/pending */
1428 inta = iwl_read32(priv, CSR_INT);
1429 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1430
1431 /* Ignore interrupt if there's nothing in NIC to service.
1432 * This may be due to IRQ shared with another device,
1433 * or due to sporadic interrupts thrown from our NIC. */
1434 if (!inta && !inta_fh) {
1435 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1436 goto none;
1437 }
1438
1439 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1440 /* Hardware disappeared. It might have already raised
1441 * an interrupt */
1442 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1443 goto unplugged;
1444 }
1445
1446 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1447 inta, inta_mask, inta_fh);
1448
1449 inta &= ~CSR_INT_BIT_SCD;
1450
1451 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1452 if (likely(inta || inta_fh))
1453 tasklet_schedule(&priv->irq_tasklet);
1454
1455 unplugged:
6e8cc38d 1456 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1457 return IRQ_HANDLED;
1458
1459 none:
1460 /* re-enable interrupts here since we don't have anything to service. */
1461 /* only Re-enable if diabled by irq */
1462 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1463 iwl_enable_interrupts(priv);
6e8cc38d 1464 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1465 return IRQ_NONE;
1466}
ef850d7c 1467EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1468
65b52bde 1469void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1470{
1471 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1472 .lead_time = BT_LEAD_TIME_DEF,
1473 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1474 .kill_ack_mask = 0,
1475 .kill_cts_mask = 0,
1476 };
1477
06702a73
WYG		 1478 if (!bt_coex_active)
1479 bt_cmd.flags = BT_COEX_DISABLE;
1480 else
1481 bt_cmd.flags = BT_COEX_ENABLE;
1482
1483 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1484 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1485
65b52bde
JB		 1486 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1487 sizeof(struct iwl_bt_cmd), &bt_cmd))
1488 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO		 1489}
1490EXPORT_SYMBOL(iwl_send_bt_config);
1491
ef8d5529 1492int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1493{
ef8d5529
WYG		 1494 struct iwl_statistics_cmd statistics_cmd = {
1495 .configuration_flags =
1496 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1497 };
ef8d5529
WYG		 1498
1499 if (flags & CMD_ASYNC)
1500 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1501 sizeof(struct iwl_statistics_cmd),
1502 &statistics_cmd, NULL);
1503 else
1504 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1505 sizeof(struct iwl_statistics_cmd),
1506 &statistics_cmd);
49ea8596
EG		 1507}
1508EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1509
b0692f2f
EG		 1510/**
1511 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1512 * using sample data 100 bytes apart. If these sample points are good,
1513 * it's a pretty good bet that everything between them is good, too.
1514 */
1515static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1516{
1517 u32 val;
1518 int ret = 0;
1519 u32 errcnt = 0;
1520 u32 i;
1521
e1623446 1522 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1523
b0692f2f
EG		 1524 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1525 /* read data comes through single port, auto-incr addr */
1526 /* NOTE: Use the debugless read so we don't flood kernel log
1527 * if IWL_DL_IO is set */
1528 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1529 i + IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1530 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1531 if (val != le32_to_cpu(*image)) {
1532 ret = -EIO;
1533 errcnt++;
1534 if (errcnt >= 3)
1535 break;
1536 }
1537 }
1538
b0692f2f
EG		 1539 return ret;
1540}
1541
1542/**
1543 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1544 * looking at all data.
1545 */
1546static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1547 u32 len)
1548{
1549 u32 val;
1550 u32 save_len = len;
1551 int ret = 0;
1552 u32 errcnt;
1553
e1623446 1554 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1555
250bdd21
SO		 1556 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1557 IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1558
1559 errcnt = 0;
1560 for (; len > 0; len -= sizeof(u32), image++) {
1561 /* read data comes through single port, auto-incr addr */
1562 /* NOTE: Use the debugless read so we don't flood kernel log
1563 * if IWL_DL_IO is set */
1564 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1565 if (val != le32_to_cpu(*image)) {
15b1687c 1566 IWL_ERR(priv, "uCode INST section is invalid at "
b0692f2f
EG		 1567 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1568 save_len - len, val, le32_to_cpu(*image));
1569 ret = -EIO;
1570 errcnt++;
1571 if (errcnt >= 20)
1572 break;
1573 }
1574 }
1575
b0692f2f 1576 if (!errcnt)
e1623446
TW		 1577 IWL_DEBUG_INFO(priv,
1578 "ucode image in INSTRUCTION memory is good\n");
b0692f2f
EG		 1579
1580 return ret;
1581}
1582
1583/**
1584 * iwl_verify_ucode - determine which instruction image is in SRAM,
1585 * and verify its contents
1586 */
1587int iwl_verify_ucode(struct iwl_priv *priv)
1588{
1589 __le32 *image;
1590 u32 len;
1591 int ret;
1592
1593 /* Try bootstrap */
1594 image = (__le32 *)priv->ucode_boot.v_addr;
1595 len = priv->ucode_boot.len;
1596 ret = iwlcore_verify_inst_sparse(priv, image, len);
1597 if (!ret) {
e1623446 1598 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b0692f2f
EG		 1599 return 0;
1600 }
1601
1602 /* Try initialize */
1603 image = (__le32 *)priv->ucode_init.v_addr;
1604 len = priv->ucode_init.len;
1605 ret = iwlcore_verify_inst_sparse(priv, image, len);
1606 if (!ret) {
e1623446 1607 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b0692f2f
EG		 1608 return 0;
1609 }
1610
1611 /* Try runtime/protocol */
1612 image = (__le32 *)priv->ucode_code.v_addr;
1613 len = priv->ucode_code.len;
1614 ret = iwlcore_verify_inst_sparse(priv, image, len);
1615 if (!ret) {
e1623446 1616 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b0692f2f
EG		 1617 return 0;
1618 }
1619
15b1687c 1620 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b0692f2f
EG		 1621
1622 /* Since nothing seems to match, show first several data entries in
1623 * instruction SRAM, so maybe visual inspection will give a clue.
1624 * Selection of bootstrap image (vs. other images) is arbitrary. */
1625 image = (__le32 *)priv->ucode_boot.v_addr;
1626 len = priv->ucode_boot.len;
1627 ret = iwl_verify_inst_full(priv, image, len);
1628
1629 return ret;
1630}
1631EXPORT_SYMBOL(iwl_verify_ucode);
1632
56e12615 1633
47f4a587
EG		 1634void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1635{
1636 struct iwl_ct_kill_config cmd;
672639de 1637 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG		 1638 unsigned long flags;
1639 int ret = 0;
1640
1641 spin_lock_irqsave(&priv->lock, flags);
1642 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1643 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1644 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 1645 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 1646
480e8407 1647 if (priv->cfg->support_ct_kill_exit) {
672639de
WYG		 1648 adv_cmd.critical_temperature_enter =
1649 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1650 adv_cmd.critical_temperature_exit =
1651 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1652
1653 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1654 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG		 1655 if (ret)
1656 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1657 else
1658 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1659 "succeeded, "
1660 "critical temperature enter is %d,"
1661 "exit is %d\n",
1662 priv->hw_params.ct_kill_threshold,
1663 priv->hw_params.ct_kill_exit_threshold);
480e8407 1664 } else {
672639de
WYG		 1665 cmd.critical_temperature_R =
1666 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 1667
672639de
WYG		 1668 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1669 sizeof(cmd), &cmd);
d91b1ba3
WYG		 1670 if (ret)
1671 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1672 else
1673 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1674 "succeeded, "
1675 "critical temperature is %d\n",
1676 priv->hw_params.ct_kill_threshold);
672639de 1677 }
47f4a587
EG		 1678}
1679EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 1680
0ad91a35 1681
14a08a7f
EG		 1682/*
1683 * CARD_STATE_CMD
1684 *
1685 * Use: Sets the device's internal card state to enable, disable, or halt
1686 *
1687 * When in the 'enable' state the card operates as normal.
1688 * When in the 'disable' state, the card enters into a low power mode.
1689 * When in the 'halt' state, the card is shut down and must be fully
1690 * restarted to come back on.
1691 */
c496294e 1692int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 1693{
1694 struct iwl_host_cmd cmd = {
1695 .id = REPLY_CARD_STATE_CMD,
1696 .len = sizeof(u32),
1697 .data = &flags,
c2acea8e 1698 .flags = meta_flag,
14a08a7f
EG		 1699 };
1700
1701 return iwl_send_cmd(priv, &cmd);
1702}
1703
030f05ed
AK		 1704void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1705 struct iwl_rx_mem_buffer *rxb)
1706{
1707#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1708 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1709 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1710 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1711 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1712#endif
1713}
1714EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1715
1716void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1717 struct iwl_rx_mem_buffer *rxb)
1718{
2f301227 1719 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1720 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1721 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1722 "notification for %s:\n", len,
1723 get_cmd_string(pkt->hdr.cmd));
1724 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1725}
1726EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1727
1728void iwl_rx_reply_error(struct iwl_priv *priv,
1729 struct iwl_rx_mem_buffer *rxb)
1730{
2f301227 1731 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1732
1733 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1734 "seq 0x%04X ser 0x%08X\n",
1735 le32_to_cpu(pkt->u.err_resp.error_type),
1736 get_cmd_string(pkt->u.err_resp.cmd_id),
1737 pkt->u.err_resp.cmd_id,
1738 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1739 le32_to_cpu(pkt->u.err_resp.error_info));
1740}
1741EXPORT_SYMBOL(iwl_rx_reply_error);
1742
a83b9141
WYG		 1743void iwl_clear_isr_stats(struct iwl_priv *priv)
1744{
1745 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1746}
a83b9141 1747
488829f1
AK		 1748int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1749 const struct ieee80211_tx_queue_params *params)
1750{
1751 struct iwl_priv *priv = hw->priv;
1752 unsigned long flags;
1753 int q;
1754
1755 IWL_DEBUG_MAC80211(priv, "enter\n");
1756
1757 if (!iwl_is_ready_rf(priv)) {
1758 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1759 return -EIO;
1760 }
1761
1762 if (queue >= AC_NUM) {
1763 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1764 return 0;
1765 }
1766
1767 q = AC_NUM - 1 - queue;
1768
1769 spin_lock_irqsave(&priv->lock, flags);
1770
1771 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
1772 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
1773 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1774 priv->qos_data.def_qos_parm.ac[q].edca_txop =
1775 cpu_to_le16((params->txop * 32));
1776
1777 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
488829f1
AK		 1778
1779 spin_unlock_irqrestore(&priv->lock, flags);
1780
1781 IWL_DEBUG_MAC80211(priv, "leave\n");
1782 return 0;
1783}
1784EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 1785
1786static void iwl_ht_conf(struct iwl_priv *priv,
ca3c1f59 1787 struct ieee80211_vif *vif)
5bbe233b 1788{
fad95bf5 1789 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b 1790 struct ieee80211_sta *sta;
ca3c1f59 1791 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5bbe233b 1792
91dd6c27 1793 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1794
fad95bf5 1795 if (!ht_conf->is_ht)
5bbe233b
AK		 1796 return;
1797
fad95bf5 1798 ht_conf->ht_protection =
9ed6bcce 1799 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 1800 ht_conf->non_GF_STA_present =
9ed6bcce 1801 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1802
02bb1bea
JB		 1803 ht_conf->single_chain_sufficient = false;
1804
ca3c1f59 1805 switch (vif->type) {
02bb1bea
JB		 1806 case NL80211_IFTYPE_STATION:
1807 rcu_read_lock();
ca3c1f59 1808 sta = ieee80211_find_sta(vif, bss_conf->bssid);
02bb1bea
JB		 1809 if (sta) {
1810 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1811 int maxstreams;
1812
1813 maxstreams = (ht_cap->mcs.tx_params &
1814 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1815 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1816 maxstreams += 1;
1817
1818 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1819 (ht_cap->mcs.rx_mask[2] == 0))
1820 ht_conf->single_chain_sufficient = true;
1821 if (maxstreams <= 1)
1822 ht_conf->single_chain_sufficient = true;
1823 } else {
1824 /*
1825 * If at all, this can only happen through a race
1826 * when the AP disconnects us while we're still
1827 * setting up the connection, in that case mac80211
1828 * will soon tell us about that.
1829 */
1830 ht_conf->single_chain_sufficient = true;
1831 }
1832 rcu_read_unlock();
1833 break;
1834 case NL80211_IFTYPE_ADHOC:
1835 ht_conf->single_chain_sufficient = true;
1836 break;
1837 default:
1838 break;
1839 }
5bbe233b
AK		 1840
1841 IWL_DEBUG_MAC80211(priv, "leave\n");
1842}
1843
c91c3efc
AK		 1844static inline void iwl_set_no_assoc(struct iwl_priv *priv)
1845{
c91c3efc
AK		 1846 iwl_led_disassociate(priv);
1847 /*
1848 * inform the ucode that there is no longer an
1849 * association and that no more packets should be
1850 * sent
1851 */
1852 priv->staging_rxon.filter_flags &=
1853 ~RXON_FILTER_ASSOC_MSK;
1854 priv->staging_rxon.assoc_id = 0;
1855 iwlcore_commit_rxon(priv);
1856}
1857
5bbe233b 1858void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 1859 struct ieee80211_vif *vif,
1860 struct ieee80211_bss_conf *bss_conf,
1861 u32 changes)
5bbe233b
AK		 1862{
1863 struct iwl_priv *priv = hw->priv;
3a650292 1864 int ret;
5bbe233b
AK		 1865
1866 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1867
2d0ddec5
JB		 1868 if (!iwl_is_alive(priv))
1869 return;
1870
1871 mutex_lock(&priv->mutex);
1872
92445c95 1873 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
2d0ddec5
JB		 1874 dev_kfree_skb(priv->ibss_beacon);
1875 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1876 }
1877
d7129e19 1878 if (changes & BSS_CHANGED_BEACON_INT) {
d7129e19
JB		 1879 /* TODO: in AP mode, do something to make this take effect */
1880 }
1881
1882 if (changes & BSS_CHANGED_BSSID) {
1883 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1884
1885 /*
1886 * If there is currently a HW scan going on in the
1887 * background then we need to cancel it else the RXON
1888 * below/in post_associate will fail.
1889 */
2d0ddec5 1890 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1891 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 1892 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1893 mutex_unlock(&priv->mutex);
1894 return;
1895 }
2d0ddec5 1896
d7129e19 1897 /* mac80211 only sets assoc when in STATION mode */
92445c95 1898 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
d7129e19
JB		 1899 memcpy(priv->staging_rxon.bssid_addr,
1900 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1901
d7129e19
JB		 1902 /* currently needed in a few places */
1903 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1904 } else {
1905 priv->staging_rxon.filter_flags &=
1906 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1907 }
d7129e19 1908
2d0ddec5
JB		 1909 }
1910
d7129e19
JB		 1911 /*
1912 * This needs to be after setting the BSSID in case
1913 * mac80211 decides to do both changes at once because
1914 * it will invoke post_associate.
1915 */
92445c95 1916 if (vif->type == NL80211_IFTYPE_ADHOC &&
2d0ddec5
JB		 1917 changes & BSS_CHANGED_BEACON) {
1918 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1919
1920 if (beacon)
1921 iwl_mac_beacon_update(hw, beacon);
1922 }
1923
5bbe233b
AK		 1924 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1925 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1926 bss_conf->use_short_preamble);
1927 if (bss_conf->use_short_preamble)
1928 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1929 else
1930 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1931 }
1932
1933 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1934 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1935 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1936 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
1937 else
1938 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
1939 }
1940
d7129e19
JB		 1941 if (changes & BSS_CHANGED_BASIC_RATES) {
1942 /* XXX use this information
1943 *
1944 * To do that, remove code from iwl_set_rate() and put something
1945 * like this here:
1946 *
1947 if (A-band)
1948 priv->staging_rxon.ofdm_basic_rates =
1949 bss_conf->basic_rates;
1950 else
1951 priv->staging_rxon.ofdm_basic_rates =
1952 bss_conf->basic_rates >> 4;
1953 priv->staging_rxon.cck_basic_rates =
1954 bss_conf->basic_rates & 0xF;
1955 */
1956 }
1957
5bbe233b 1958 if (changes & BSS_CHANGED_HT) {
ca3c1f59 1959 iwl_ht_conf(priv, vif);
45823531
AK		 1960
1961 if (priv->cfg->ops->hcmd->set_rxon_chain)
1962 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 1963 }
1964
1965 if (changes & BSS_CHANGED_ASSOC) {
1966 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b 1967 if (bss_conf->assoc) {
5bbe233b 1968 priv->timestamp = bss_conf->timestamp;
5bbe233b 1969
e932a609
JB		 1970 iwl_led_associate(priv);
1971
d7129e19 1972 if (!iwl_is_rfkill(priv))
1dda6d28 1973 priv->cfg->ops->lib->post_associate(priv, vif);
c91c3efc
AK		 1974 } else
1975 iwl_set_no_assoc(priv);
d7129e19
JB		 1976 }
1977
1dda6d28 1978 if (changes && iwl_is_associated(priv) && bss_conf->aid) {
d7129e19
JB		 1979 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1980 changes);
1981 ret = iwl_send_rxon_assoc(priv);
1982 if (!ret) {
1983 /* Sync active_rxon with latest change. */
1984 memcpy((void *)&priv->active_rxon,
1985 &priv->staging_rxon,
1986 sizeof(struct iwl_rxon_cmd));
5bbe233b 1987 }
5bbe233b 1988 }
d7129e19 1989
c91c3efc
AK		 1990 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1991 if (vif->bss_conf.enable_beacon) {
1992 memcpy(priv->staging_rxon.bssid_addr,
1993 bss_conf->bssid, ETH_ALEN);
1994 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1dda6d28 1995 iwlcore_config_ap(priv, vif);
c91c3efc
AK		 1996 } else
1997 iwl_set_no_assoc(priv);
f513dfff
DH		 1998 }
1999
1fa61b2e
JB		 2000 if (changes & BSS_CHANGED_IBSS) {
2001 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
2002 bss_conf->ibss_joined);
2003 if (ret)
2004 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
2005 bss_conf->ibss_joined ? "add" : "remove",
2006 bss_conf->bssid);
2007 }
2008
d7129e19
JB		 2009 mutex_unlock(&priv->mutex);
2010
2d0ddec5 2011 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 2012}
2013EXPORT_SYMBOL(iwl_bss_info_changed);
2014
9944b938
AK		 2015int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2016{
2017 struct iwl_priv *priv = hw->priv;
2018 unsigned long flags;
2019 __le64 timestamp;
2020
2021 IWL_DEBUG_MAC80211(priv, "enter\n");
2022
2023 if (!iwl_is_ready_rf(priv)) {
2024 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2025 return -EIO;
2026 }
2027
9944b938
AK		 2028 spin_lock_irqsave(&priv->lock, flags);
2029
2030 if (priv->ibss_beacon)
2031 dev_kfree_skb(priv->ibss_beacon);
2032
2033 priv->ibss_beacon = skb;
2034
9944b938
AK		 2035 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2036 priv->timestamp = le64_to_cpu(timestamp);
2037
2038 IWL_DEBUG_MAC80211(priv, "leave\n");
2039 spin_unlock_irqrestore(&priv->lock, flags);
2040
1dda6d28 2041 priv->cfg->ops->lib->post_associate(priv, priv->vif);
9944b938 2042
9944b938
AK		 2043 return 0;
2044}
2045EXPORT_SYMBOL(iwl_mac_beacon_update);
2046
b55e75ed 2047static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 2048{
1dda6d28 2049 iwl_connection_init_rx_config(priv, vif);
727882d6
AK		 2050
2051 if (priv->cfg->ops->hcmd->set_rxon_chain)
2052 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2053
2054 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2055
b55e75ed 2056 return iwlcore_commit_rxon(priv);
727882d6 2057}
727882d6 2058
b55e75ed 2059int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 2060{
2061 struct iwl_priv *priv = hw->priv;
47e28f41 2062 int err = 0;
cbb6ab94 2063
1ed32e4f 2064 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
cbb6ab94 2065
47e28f41
JB		 2066 mutex_lock(&priv->mutex);
2067
b55e75ed
JB		 2068 if (WARN_ON(!iwl_is_ready_rf(priv))) {
2069 err = -EINVAL;
2070 goto out;
2071 }
2072
cbb6ab94
AK		 2073 if (priv->vif) {
2074 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB		 2075 err = -EOPNOTSUPP;
2076 goto out;
cbb6ab94
AK		 2077 }
2078
1ed32e4f
JB		 2079 priv->vif = vif;
2080 priv->iw_mode = vif->type;
cbb6ab94 2081
b55e75ed
JB		 2082 IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
2083 memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
cbb6ab94 2084
b55e75ed
JB		 2085 err = iwl_set_mode(priv, vif);
2086 if (err)
2087 goto out_err;
7e246191 2088
b55e75ed 2089 goto out;
cbb6ab94 2090
b55e75ed
JB		 2091 out_err:
2092 priv->vif = NULL;
2093 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 2094 out:
cbb6ab94
AK		 2095 mutex_unlock(&priv->mutex);
2096
2097 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 2098 return err;
cbb6ab94
AK		 2099}
2100EXPORT_SYMBOL(iwl_mac_add_interface);
2101
d8052319 2102void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 2103 struct ieee80211_vif *vif)
d8052319
AK		 2104{
2105 struct iwl_priv *priv = hw->priv;
2106
2107 IWL_DEBUG_MAC80211(priv, "enter\n");
2108
2109 mutex_lock(&priv->mutex);
2110
2111 if (iwl_is_ready_rf(priv)) {
2112 iwl_scan_cancel_timeout(priv, 100);
2113 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2114 iwlcore_commit_rxon(priv);
2115 }
1ed32e4f 2116 if (priv->vif == vif) {
d8052319
AK		 2117 priv->vif = NULL;
2118 memset(priv->bssid, 0, ETH_ALEN);
2119 }
2120 mutex_unlock(&priv->mutex);
2121
2122 IWL_DEBUG_MAC80211(priv, "leave\n");
2123
2124}
2125EXPORT_SYMBOL(iwl_mac_remove_interface);
2126
4808368d
AK		 2127/**
2128 * iwl_mac_config - mac80211 config callback
4808368d
AK		 2129 */
2130int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2131{
2132 struct iwl_priv *priv = hw->priv;
2133 const struct iwl_channel_info *ch_info;
2134 struct ieee80211_conf *conf = &hw->conf;
fad95bf5 2135 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
4808368d
AK		 2136 unsigned long flags = 0;
2137 int ret = 0;
2138 u16 ch;
2139 int scan_active = 0;
2140
2141 mutex_lock(&priv->mutex);
2142
4808368d
AK		 2143 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2144 conf->channel->hw_value, changed);
2145
2146 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2147 test_bit(STATUS_SCANNING, &priv->status))) {
2148 scan_active = 1;
2149 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2150 }
2151
ba37a3d0
JB		 2152 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2153 IEEE80211_CONF_CHANGE_CHANNEL)) {
2154 /* mac80211 uses static for non-HT which is what we want */
2155 priv->current_ht_config.smps = conf->smps_mode;
2156
2157 /*
2158 * Recalculate chain counts.
2159 *
2160 * If monitor mode is enabled then mac80211 will
2161 * set up the SM PS mode to OFF if an HT channel is
2162 * configured.
2163 */
2164 if (priv->cfg->ops->hcmd->set_rxon_chain)
2165 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2166 }
4808368d
AK		 2167
2168 /* during scanning mac80211 will delay channel setting until
2169 * scan finish with changed = 0
2170 */
2171 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2172 if (scan_active)
2173 goto set_ch_out;
2174
2175 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2176 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2177 if (!is_channel_valid(ch_info)) {
2178 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2179 ret = -EINVAL;
2180 goto set_ch_out;
2181 }
2182
4808368d
AK		 2183 spin_lock_irqsave(&priv->lock, flags);
2184
28bd723b
DH		 2185 /* Configure HT40 channels */
2186 ht_conf->is_ht = conf_is_ht(conf);
2187 if (ht_conf->is_ht) {
2188 if (conf_is_ht40_minus(conf)) {
2189 ht_conf->extension_chan_offset =
2190 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2191 ht_conf->is_40mhz = true;
28bd723b
DH		 2192 } else if (conf_is_ht40_plus(conf)) {
2193 ht_conf->extension_chan_offset =
2194 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2195 ht_conf->is_40mhz = true;
28bd723b
DH		 2196 } else {
2197 ht_conf->extension_chan_offset =
2198 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2199 ht_conf->is_40mhz = false;
28bd723b
DH		 2200 }
2201 } else
c812ee24 2202 ht_conf->is_40mhz = false;
28bd723b
DH		 2203 /* Default to no protection. Protection mode will later be set
2204 * from BSS config in iwl_ht_conf */
2205 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK		 2206
2207 /* if we are switching from ht to 2.4 clear flags
2208 * from any ht related info since 2.4 does not
2209 * support ht */
2210 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2211 priv->staging_rxon.flags = 0;
2212
2213 iwl_set_rxon_channel(priv, conf->channel);
5e2f75b8 2214 iwl_set_rxon_ht(priv, ht_conf);
4808368d 2215
1dda6d28 2216 iwl_set_flags_for_band(priv, conf->channel->band, priv->vif);
4808368d 2217 spin_unlock_irqrestore(&priv->lock, flags);
0924e519
WYG		 2218 if (iwl_is_associated(priv) &&
2219 (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2220 priv->cfg->ops->lib->set_channel_switch) {
2221 iwl_set_rate(priv);
2222 /*
2223 * at this point, staging_rxon has the
2224 * configuration for channel switch
2225 */
2226 ret = priv->cfg->ops->lib->set_channel_switch(priv,
2227 ch);
2228 if (!ret) {
2229 iwl_print_rx_config_cmd(priv);
2230 goto out;
2231 }
2232 priv->switch_rxon.switch_in_progress = false;
2233 }
4808368d
AK		 2234 set_ch_out:
2235 /* The list of supported rates and rate mask can be different
2236 * for each band; since the band may have changed, reset
2237 * the rate mask to what mac80211 lists */
2238 iwl_set_rate(priv);
2239 }
2240
78f5fb7f
JB		 2241 if (changed & (IEEE80211_CONF_CHANGE_PS |
2242 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2243 ret = iwl_power_update_mode(priv, false);
4808368d 2244 if (ret)
e312c24c 2245 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2246 }
2247
2248 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2249 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2250 priv->tx_power_user_lmt, conf->power_level);
2251
2252 iwl_set_tx_power(priv, conf->power_level, false);
2253 }
2254
e61146e3
SG		 2255 if (changed & IEEE80211_CONF_CHANGE_QOS) {
2256 bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
2257
2258 spin_lock_irqsave(&priv->lock, flags);
2259 priv->qos_data.qos_active = qos_active;
2260 iwl_update_qos(priv);
2261 spin_unlock_irqrestore(&priv->lock, flags);
2262 }
2263
0cf4c01e
MA		 2264 if (!iwl_is_ready(priv)) {
2265 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2266 goto out;
2267 }
2268
4808368d
AK		 2269 if (scan_active)
2270 goto out;
2271
2272 if (memcmp(&priv->active_rxon,
2273 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2274 iwlcore_commit_rxon(priv);
2275 else
2276 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2277
2278
2279out:
2280 IWL_DEBUG_MAC80211(priv, "leave\n");
2281 mutex_unlock(&priv->mutex);
2282 return ret;
2283}
2284EXPORT_SYMBOL(iwl_mac_config);
2285
bd564261
AK		 2286void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2287{
2288 struct iwl_priv *priv = hw->priv;
2289 unsigned long flags;
2290
2291 mutex_lock(&priv->mutex);
2292 IWL_DEBUG_MAC80211(priv, "enter\n");
2293
2294 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2295 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2296 spin_unlock_irqrestore(&priv->lock, flags);
2297
bd564261 2298 spin_lock_irqsave(&priv->lock, flags);
bd564261
AK		 2299
2300 /* new association get rid of ibss beacon skb */
2301 if (priv->ibss_beacon)
2302 dev_kfree_skb(priv->ibss_beacon);
2303
2304 priv->ibss_beacon = NULL;
2305
bd564261 2306 priv->timestamp = 0;
bd564261
AK		 2307
2308 spin_unlock_irqrestore(&priv->lock, flags);
2309
2310 if (!iwl_is_ready_rf(priv)) {
2311 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2312 mutex_unlock(&priv->mutex);
2313 return;
2314 }
2315
2316 /* we are restarting association process
2317 * clear RXON_FILTER_ASSOC_MSK bit
2318 */
b4665df4
JB		 2319 iwl_scan_cancel_timeout(priv, 100);
2320 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2321 iwlcore_commit_rxon(priv);
bd564261
AK		 2322
2323 iwl_set_rate(priv);
2324
2325 mutex_unlock(&priv->mutex);
2326
2327 IWL_DEBUG_MAC80211(priv, "leave\n");
2328}
2329EXPORT_SYMBOL(iwl_mac_reset_tsf);
2330
88804e2b
WYG		 2331int iwl_alloc_txq_mem(struct iwl_priv *priv)
2332{
2333 if (!priv->txq)
2334 priv->txq = kzalloc(
2335 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2336 GFP_KERNEL);
2337 if (!priv->txq) {
91dd6c27 2338 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 2339 return -ENOMEM;
2340 }
2341 return 0;
2342}
2343EXPORT_SYMBOL(iwl_alloc_txq_mem);
2344
2345void iwl_free_txq_mem(struct iwl_priv *priv)
2346{
2347 kfree(priv->txq);
2348 priv->txq = NULL;
2349}
2350EXPORT_SYMBOL(iwl_free_txq_mem);
2351
20594eb0
WYG		 2352#ifdef CONFIG_IWLWIFI_DEBUGFS
2353
2354#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2355
2356void iwl_reset_traffic_log(struct iwl_priv *priv)
2357{
2358 priv->tx_traffic_idx = 0;
2359 priv->rx_traffic_idx = 0;
2360 if (priv->tx_traffic)
2361 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2362 if (priv->rx_traffic)
2363 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2364}
2365
2366int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2367{
2368 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2369
2370 if (iwl_debug_level & IWL_DL_TX) {
2371 if (!priv->tx_traffic) {
2372 priv->tx_traffic =
2373 kzalloc(traffic_size, GFP_KERNEL);
2374 if (!priv->tx_traffic)
2375 return -ENOMEM;
2376 }
2377 }
2378 if (iwl_debug_level & IWL_DL_RX) {
2379 if (!priv->rx_traffic) {
2380 priv->rx_traffic =
2381 kzalloc(traffic_size, GFP_KERNEL);
2382 if (!priv->rx_traffic)
2383 return -ENOMEM;
2384 }
2385 }
2386 iwl_reset_traffic_log(priv);
2387 return 0;
2388}
2389EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2390
2391void iwl_free_traffic_mem(struct iwl_priv *priv)
2392{
2393 kfree(priv->tx_traffic);
2394 priv->tx_traffic = NULL;
2395
2396 kfree(priv->rx_traffic);
2397 priv->rx_traffic = NULL;
2398}
2399EXPORT_SYMBOL(iwl_free_traffic_mem);
2400
2401void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2402 u16 length, struct ieee80211_hdr *header)
2403{
2404 __le16 fc;
2405 u16 len;
2406
2407 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2408 return;
2409
2410 if (!priv->tx_traffic)
2411 return;
2412
2413 fc = header->frame_control;
2414 if (ieee80211_is_data(fc)) {
2415 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2416 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2417 memcpy((priv->tx_traffic +
2418 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2419 header, len);
2420 priv->tx_traffic_idx =
2421 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2422 }
2423}
2424EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2425
2426void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2427 u16 length, struct ieee80211_hdr *header)
2428{
2429 __le16 fc;
2430 u16 len;
2431
2432 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2433 return;
2434
2435 if (!priv->rx_traffic)
2436 return;
2437
2438 fc = header->frame_control;
2439 if (ieee80211_is_data(fc)) {
2440 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2441 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2442 memcpy((priv->rx_traffic +
2443 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2444 header, len);
2445 priv->rx_traffic_idx =
2446 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2447 }
2448}
2449EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2450
2451const char *get_mgmt_string(int cmd)
2452{
2453 switch (cmd) {
2454 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2455 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2456 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2457 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2458 IWL_CMD(MANAGEMENT_PROBE_REQ);
2459 IWL_CMD(MANAGEMENT_PROBE_RESP);
2460 IWL_CMD(MANAGEMENT_BEACON);
2461 IWL_CMD(MANAGEMENT_ATIM);
2462 IWL_CMD(MANAGEMENT_DISASSOC);
2463 IWL_CMD(MANAGEMENT_AUTH);
2464 IWL_CMD(MANAGEMENT_DEAUTH);
2465 IWL_CMD(MANAGEMENT_ACTION);
2466 default:
2467 return "UNKNOWN";
2468
2469 }
2470}
2471
2472const char *get_ctrl_string(int cmd)
2473{
2474 switch (cmd) {
2475 IWL_CMD(CONTROL_BACK_REQ);
2476 IWL_CMD(CONTROL_BACK);
2477 IWL_CMD(CONTROL_PSPOLL);
2478 IWL_CMD(CONTROL_RTS);
2479 IWL_CMD(CONTROL_CTS);
2480 IWL_CMD(CONTROL_ACK);
2481 IWL_CMD(CONTROL_CFEND);
2482 IWL_CMD(CONTROL_CFENDACK);
2483 default:
2484 return "UNKNOWN";
2485
2486 }
2487}
2488
7163b8a4 2489void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 2490{
2491 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2492 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2493 priv->led_tpt = 0;
22fdf3c9
WYG		 2494}
2495
2496/*
2497 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2498 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2499 * Use debugFs to display the rx/rx_statistics
2500 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2501 * information will be recorded, but DATA pkt still will be recorded
2502 * for the reason of iwl_led.c need to control the led blinking based on
2503 * number of tx and rx data.
2504 *
2505 */
2506void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2507{
2508 struct traffic_stats *stats;
2509
2510 if (is_tx)
2511 stats = &priv->tx_stats;
2512 else
2513 stats = &priv->rx_stats;
2514
2515 if (ieee80211_is_mgmt(fc)) {
2516 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2517 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2518 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2519 break;
2520 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2521 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2522 break;
2523 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2524 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2525 break;
2526 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2527 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2528 break;
2529 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2530 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2531 break;
2532 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2533 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2534 break;
2535 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2536 stats->mgmt[MANAGEMENT_BEACON]++;
2537 break;
2538 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2539 stats->mgmt[MANAGEMENT_ATIM]++;
2540 break;
2541 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2542 stats->mgmt[MANAGEMENT_DISASSOC]++;
2543 break;
2544 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2545 stats->mgmt[MANAGEMENT_AUTH]++;
2546 break;
2547 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2548 stats->mgmt[MANAGEMENT_DEAUTH]++;
2549 break;
2550 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2551 stats->mgmt[MANAGEMENT_ACTION]++;
2552 break;
2553 }
2554 } else if (ieee80211_is_ctl(fc)) {
2555 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2556 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2557 stats->ctrl[CONTROL_BACK_REQ]++;
2558 break;
2559 case cpu_to_le16(IEEE80211_STYPE_BACK):
2560 stats->ctrl[CONTROL_BACK]++;
2561 break;
2562 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2563 stats->ctrl[CONTROL_PSPOLL]++;
2564 break;
2565 case cpu_to_le16(IEEE80211_STYPE_RTS):
2566 stats->ctrl[CONTROL_RTS]++;
2567 break;
2568 case cpu_to_le16(IEEE80211_STYPE_CTS):
2569 stats->ctrl[CONTROL_CTS]++;
2570 break;
2571 case cpu_to_le16(IEEE80211_STYPE_ACK):
2572 stats->ctrl[CONTROL_ACK]++;
2573 break;
2574 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2575 stats->ctrl[CONTROL_CFEND]++;
2576 break;
2577 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2578 stats->ctrl[CONTROL_CFENDACK]++;
2579 break;
2580 }
2581 } else {
2582 /* data */
2583 stats->data_cnt++;
2584 stats->data_bytes += len;
2585 }
d5f4cf71 2586 iwl_leds_background(priv);
22fdf3c9
WYG		 2587}
2588EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 2589#endif
2590
696bdee3
WYG		 2591const static char *get_csr_string(int cmd)
2592{
2593 switch (cmd) {
2594 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2595 IWL_CMD(CSR_INT_COALESCING);
2596 IWL_CMD(CSR_INT);
2597 IWL_CMD(CSR_INT_MASK);
2598 IWL_CMD(CSR_FH_INT_STATUS);
2599 IWL_CMD(CSR_GPIO_IN);
2600 IWL_CMD(CSR_RESET);
2601 IWL_CMD(CSR_GP_CNTRL);
2602 IWL_CMD(CSR_HW_REV);
2603 IWL_CMD(CSR_EEPROM_REG);
2604 IWL_CMD(CSR_EEPROM_GP);
2605 IWL_CMD(CSR_OTP_GP_REG);
2606 IWL_CMD(CSR_GIO_REG);
2607 IWL_CMD(CSR_GP_UCODE_REG);
2608 IWL_CMD(CSR_GP_DRIVER_REG);
2609 IWL_CMD(CSR_UCODE_DRV_GP1);
2610 IWL_CMD(CSR_UCODE_DRV_GP2);
2611 IWL_CMD(CSR_LED_REG);
2612 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2613 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2614 IWL_CMD(CSR_ANA_PLL_CFG);
2615 IWL_CMD(CSR_HW_REV_WA_REG);
2616 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2617 default:
2618 return "UNKNOWN";
2619
2620 }
2621}
2622
2623void iwl_dump_csr(struct iwl_priv *priv)
2624{
2625 int i;
2626 u32 csr_tbl[] = {
2627 CSR_HW_IF_CONFIG_REG,
2628 CSR_INT_COALESCING,
2629 CSR_INT,
2630 CSR_INT_MASK,
2631 CSR_FH_INT_STATUS,
2632 CSR_GPIO_IN,
2633 CSR_RESET,
2634 CSR_GP_CNTRL,
2635 CSR_HW_REV,
2636 CSR_EEPROM_REG,
2637 CSR_EEPROM_GP,
2638 CSR_OTP_GP_REG,
2639 CSR_GIO_REG,
2640 CSR_GP_UCODE_REG,
2641 CSR_GP_DRIVER_REG,
2642 CSR_UCODE_DRV_GP1,
2643 CSR_UCODE_DRV_GP2,
2644 CSR_LED_REG,
2645 CSR_DRAM_INT_TBL_REG,
2646 CSR_GIO_CHICKEN_BITS,
2647 CSR_ANA_PLL_CFG,
2648 CSR_HW_REV_WA_REG,
2649 CSR_DBG_HPET_MEM_REG
2650 };
2651 IWL_ERR(priv, "CSR values:\n");
2652 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2653 "CSR_INT_PERIODIC_REG)\n");
2654 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2655 IWL_ERR(priv, " %25s: 0X%08x\n",
2656 get_csr_string(csr_tbl[i]),
2657 iwl_read32(priv, csr_tbl[i]));
2658 }
2659}
2660EXPORT_SYMBOL(iwl_dump_csr);
2661
1b3eb823
WYG		 2662const static char *get_fh_string(int cmd)
2663{
2664 switch (cmd) {
2665 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2666 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2667 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2668 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2669 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2670 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2671 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2672 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2673 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2674 default:
2675 return "UNKNOWN";
2676
2677 }
2678}
2679
2680int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2681{
2682 int i;
2683#ifdef CONFIG_IWLWIFI_DEBUG
2684 int pos = 0;
2685 size_t bufsz = 0;
2686#endif
2687 u32 fh_tbl[] = {
2688 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2689 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2690 FH_RSCSR_CHNL0_WPTR,
2691 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2692 FH_MEM_RSSR_SHARED_CTRL_REG,
2693 FH_MEM_RSSR_RX_STATUS_REG,
2694 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2695 FH_TSSR_TX_STATUS_REG,
2696 FH_TSSR_TX_ERROR_REG
2697 };
2698#ifdef CONFIG_IWLWIFI_DEBUG
2699 if (display) {
2700 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2701 *buf = kmalloc(bufsz, GFP_KERNEL);
2702 if (!*buf)
2703 return -ENOMEM;
2704 pos += scnprintf(*buf + pos, bufsz - pos,
2705 "FH register values:\n");
2706 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2707 pos += scnprintf(*buf + pos, bufsz - pos,
2708 " %34s: 0X%08x\n",
2709 get_fh_string(fh_tbl[i]),
2710 iwl_read_direct32(priv, fh_tbl[i]));
2711 }
2712 return pos;
2713 }
2714#endif
2715 IWL_ERR(priv, "FH register values:\n");
2716 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2717 IWL_ERR(priv, " %34s: 0X%08x\n",
2718 get_fh_string(fh_tbl[i]),
2719 iwl_read_direct32(priv, fh_tbl[i]));
2720 }
2721 return 0;
2722}
2723EXPORT_SYMBOL(iwl_dump_fh);
2724
a93e7973 2725static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 2726{
2727 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2728 return;
2729
2730 if (!iwl_is_associated(priv)) {
2731 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2732 return;
2733 }
2734 /*
2735 * There is no easy and better way to force reset the radio,
2736 * the only known method is switching channel which will force to
2737 * reset and tune the radio.
2738 * Use internal short scan (single channel) operation to should
2739 * achieve this objective.
2740 * Driver should reset the radio when number of consecutive missed
2741 * beacon, or any other uCode error condition detected.
2742 */
2743 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2744 iwl_internal_short_hw_scan(priv);
afbdd69a 2745}
a93e7973 2746
a93e7973
WYG		 2747
2748int iwl_force_reset(struct iwl_priv *priv, int mode)
2749{
8a472da4
WYG		 2750 struct iwl_force_reset *force_reset;
2751
a93e7973
WYG		 2752 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2753 return -EINVAL;
2754
8a472da4
WYG		 2755 if (mode >= IWL_MAX_FORCE_RESET) {
2756 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2757 return -EINVAL;
2758 }
2759 force_reset = &priv->force_reset[mode];
2760 force_reset->reset_request_count++;
2761 if (force_reset->last_force_reset_jiffies &&
2762 time_after(force_reset->last_force_reset_jiffies +
2763 force_reset->reset_duration, jiffies)) {
a93e7973 2764 IWL_DEBUG_INFO(priv, "force reset rejected\n");
8a472da4 2765 force_reset->reset_reject_count++;
a93e7973
WYG		 2766 return -EAGAIN;
2767 }
8a472da4
WYG		 2768 force_reset->reset_success_count++;
2769 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2770 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 2771 switch (mode) {
2772 case IWL_RF_RESET:
2773 iwl_force_rf_reset(priv);
2774 break;
2775 case IWL_FW_RESET:
2776 IWL_ERR(priv, "On demand firmware reload\n");
2777 /* Set the FW error flag -- cleared on iwl_down */
2778 set_bit(STATUS_FW_ERROR, &priv->status);
2779 wake_up_interruptible(&priv->wait_command_queue);
2780 /*
2781 * Keep the restart process from trying to send host
2782 * commands by clearing the INIT status bit
2783 */
2784 clear_bit(STATUS_READY, &priv->status);
2785 queue_work(priv->workqueue, &priv->restart);
2786 break;
a93e7973 2787 }
a93e7973
WYG		 2788 return 0;
2789}
b74e31a9
WYG		 2790EXPORT_SYMBOL(iwl_force_reset);
2791
2792/**
2793 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2794 *
2795 * During normal condition (no queue is stuck), the timer is continually set to
2796 * execute every monitor_recover_period milliseconds after the last timer
2797 * expired. When the queue read_ptr is at the same place, the timer is
2798 * shorten to 100mSecs. This is
2799 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2800 * 2) to detect the stuck queues quicker before the station and AP can
2801 * disassociate each other.
2802 *
2803 * This function monitors all the tx queues and recover from it if any
2804 * of the queues are stuck.
2805 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2806 * it will recover by resetting the firmware and return.
2807 * 2. Then, it checks for station association. If it associates it will check
2808 * other queues. If any queue is stuck, it will recover by resetting
2809 * the firmware.
2810 * Note: It the number of times the queue read_ptr to be at the same place to
2811 * be MAX_REPEAT+1 in order to consider to be stuck.
2812 */
2813/*
2814 * The maximum number of times the read pointer of the tx queue at the
2815 * same place without considering to be stuck.
2816 */
2817#define MAX_REPEAT (2)
2818static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2819{
2820 struct iwl_tx_queue *txq;
2821 struct iwl_queue *q;
2822
2823 txq = &priv->txq[cnt];
2824 q = &txq->q;
2825 /* queue is empty, skip */
2826 if (q->read_ptr != q->write_ptr) {
2827 if (q->read_ptr == q->last_read_ptr) {
2828 /* a queue has not been read from last time */
2829 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2830 IWL_ERR(priv,
2831 "queue %d stuck %d time. Fw reload.\n",
2832 q->id, q->repeat_same_read_ptr);
2833 q->repeat_same_read_ptr = 0;
2834 iwl_force_reset(priv, IWL_FW_RESET);
2835 } else {
2836 q->repeat_same_read_ptr++;
2837 IWL_DEBUG_RADIO(priv,
2838 "queue %d, not read %d time\n",
2839 q->id,
2840 q->repeat_same_read_ptr);
2841 mod_timer(&priv->monitor_recover, jiffies +
2842 msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
2843 }
2844 return 1;
2845 } else {
2846 q->last_read_ptr = q->read_ptr;
2847 q->repeat_same_read_ptr = 0;
2848 }
2849 }
2850 return 0;
2851}
2852
2853void iwl_bg_monitor_recover(unsigned long data)
2854{
2855 struct iwl_priv *priv = (struct iwl_priv *)data;
2856 int cnt;
2857
2858 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2859 return;
2860
2861 /* monitor and check for stuck cmd queue */
2862 if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
2863 return;
2864
2865 /* monitor and check for other stuck queues */
2866 if (iwl_is_associated(priv)) {
2867 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2868 /* skip as we already checked the command queue */
2869 if (cnt == IWL_CMD_QUEUE_NUM)
2870 continue;
2871 if (iwl_check_stuck_queue(priv, cnt))
2872 return;
2873 }
2874 }
2875 /*
2876 * Reschedule the timer to occur in
2877 * priv->cfg->monitor_recover_period
2878 */
2879 mod_timer(&priv->monitor_recover,
2880 jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
2881}
2882EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2883
6da3a13e
WYG		 2884#ifdef CONFIG_PM
2885
2886int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2887{
2888 struct iwl_priv *priv = pci_get_drvdata(pdev);
2889
2890 /*
2891 * This function is called when system goes into suspend state
2892 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2893 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2894 * it will not call apm_ops.stop() to stop the DMA operation.
2895 * Calling apm_ops.stop here to make sure we stop the DMA.
2896 */
2897 priv->cfg->ops->lib->apm_ops.stop(priv);
2898
2899 pci_save_state(pdev);
2900 pci_disable_device(pdev);
2901 pci_set_power_state(pdev, PCI_D3hot);
2902
2903 return 0;
2904}
2905EXPORT_SYMBOL(iwl_pci_suspend);
2906
2907int iwl_pci_resume(struct pci_dev *pdev)
2908{
2909 struct iwl_priv *priv = pci_get_drvdata(pdev);
2910 int ret;
2911
cd398c31
AK		 2912 /*
2913 * We disable the RETRY_TIMEOUT register (0x41) to keep
2914 * PCI Tx retries from interfering with C3 CPU state.
2915 */
2916 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2917
6da3a13e
WYG		 2918 pci_set_power_state(pdev, PCI_D0);
2919 ret = pci_enable_device(pdev);
2920 if (ret)
2921 return ret;
2922 pci_restore_state(pdev);
2923 iwl_enable_interrupts(priv);
2924
2925 return 0;
2926}
2927EXPORT_SYMBOL(iwl_pci_resume);
2928
2929#endif /* CONFIG_PM */
Clone of davem's net-next-2.6 tree