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Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[net-next-2.6.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
df48c323
TW		 46MODULE_DESCRIPTION("iwl core");
47MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 49MODULE_LICENSE("GPL");
df48c323 50
06702a73
WYG		 51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
670245ed
JB		 67bool bt_coex_active = true;
68EXPORT_SYMBOL_GPL(bt_coex_active);
06702a73 69module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 70MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 71
c7de35cd
RR		 72#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
73 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
74 IWL_RATE_SISO_##s##M_PLCP, \
75 IWL_RATE_MIMO2_##s##M_PLCP,\
76 IWL_RATE_MIMO3_##s##M_PLCP,\
77 IWL_RATE_##r##M_IEEE, \
78 IWL_RATE_##ip##M_INDEX, \
79 IWL_RATE_##in##M_INDEX, \
80 IWL_RATE_##rp##M_INDEX, \
81 IWL_RATE_##rn##M_INDEX, \
82 IWL_RATE_##pp##M_INDEX, \
83 IWL_RATE_##np##M_INDEX }
84
a562a9dd
RC		 85u32 iwl_debug_level;
86EXPORT_SYMBOL(iwl_debug_level);
87
c7de35cd
RR		 88/*
89 * Parameter order:
90 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
91 *
92 * If there isn't a valid next or previous rate then INV is used which
93 * maps to IWL_RATE_INVALID
94 *
95 */
1826dcc0 96const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 97 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
98 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
99 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
100 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
101 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
102 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
103 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
104 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
105 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
106 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
107 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
108 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
109 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
110 /* FIXME:RS: ^^ should be INV (legacy) */
111};
1826dcc0 112EXPORT_SYMBOL(iwl_rates);
c7de35cd 113
e7d326ac
TW		 114int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
115{
116 int idx = 0;
117
118 /* HT rate format */
119 if (rate_n_flags & RATE_MCS_HT_MSK) {
120 idx = (rate_n_flags & 0xff);
121
60d32215
DH		 122 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
123 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
124 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 125 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
126
127 idx += IWL_FIRST_OFDM_RATE;
128 /* skip 9M not supported in ht*/
129 if (idx >= IWL_RATE_9M_INDEX)
130 idx += 1;
131 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
132 return idx;
133
134 /* legacy rate format, search for match in table */
135 } else {
136 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
137 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
138 return idx;
139 }
140
141 return -1;
142}
143EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
144
0e1654fa 145u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid)
76eff18b
TW		 146{
147 int i;
148 u8 ind = ant;
0e1654fa 149
bd6e2d57
JB		 150 if (priv->band == IEEE80211_BAND_2GHZ &&
151 priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)
152 return 0;
153
76eff18b
TW		 154 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
155 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
0e1654fa 156 if (valid & BIT(ind))
76eff18b
TW		 157 return ind;
158 }
159 return ant;
160}
47ff65c4 161EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW		 162
163const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
164EXPORT_SYMBOL(iwl_bcast_addr);
165
166
1d0a082d
AK		 167/* This function both allocates and initializes hw and priv. */
168struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
169 struct ieee80211_ops *hw_ops)
170{
171 struct iwl_priv *priv;
172
173 /* mac80211 allocates memory for this device instance, including
174 * space for this driver's private structure */
175 struct ieee80211_hw *hw =
176 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
177 if (hw == NULL) {
c96c31e4 178 pr_err("%s: Can not allocate network device\n",
a3139c59 179 cfg->name);
1d0a082d
AK		 180 goto out;
181 }
182
183 priv = hw->priv;
184 priv->hw = hw;
185
186out:
187 return hw;
188}
189EXPORT_SYMBOL(iwl_alloc_all);
190
14d2aac5
AK		 191/*
192 * QoS support
193*/
8dfdb9d5 194static void iwl_update_qos(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
14d2aac5
AK		 195{
196 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
197 return;
198
763cc3bf
JB		 199 if (!ctx->is_active)
200 return;
201
8dfdb9d5 202 ctx->qos_data.def_qos_parm.qos_flags = 0;
14d2aac5 203
8dfdb9d5
JB		 204 if (ctx->qos_data.qos_active)
205 ctx->qos_data.def_qos_parm.qos_flags |=
14d2aac5
AK		 206 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
207
7e6a5886 208 if (ctx->ht.enabled)
8dfdb9d5 209 ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
14d2aac5 210
e61146e3 211 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
8dfdb9d5
JB		 212 ctx->qos_data.qos_active,
213 ctx->qos_data.def_qos_parm.qos_flags);
14d2aac5 214
8dfdb9d5 215 iwl_send_cmd_pdu_async(priv, ctx->qos_cmd,
e61146e3 216 sizeof(struct iwl_qosparam_cmd),
8dfdb9d5 217 &ctx->qos_data.def_qos_parm, NULL);
14d2aac5 218}
c7de35cd 219
d9fe60de
JB		 220#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
221#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 222static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 223 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 224 enum ieee80211_band band)
225{
39130df3
RR		 226 u16 max_bit_rate = 0;
227 u8 rx_chains_num = priv->hw_params.rx_chains_num;
228 u8 tx_chains_num = priv->hw_params.tx_chains_num;
229
c7de35cd 230 ht_info->cap = 0;
d9fe60de 231 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 232
d9fe60de 233 ht_info->ht_supported = true;
c7de35cd 234
b261793d
DH		 235 if (priv->cfg->ht_greenfield_support)
236 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 237 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 238 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 239 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 240 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
241 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
242 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 243 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 244 }
c7de35cd
RR		 245
246 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 247 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 248
249 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
172c1d11
WYG		 250 if (priv->cfg->ampdu_factor)
251 ht_info->ampdu_factor = priv->cfg->ampdu_factor;
c7de35cd 252 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
172c1d11
WYG		 253 if (priv->cfg->ampdu_density)
254 ht_info->ampdu_density = priv->cfg->ampdu_density;
c7de35cd 255
d9fe60de 256 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 257 if (rx_chains_num >= 2)
d9fe60de 258 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 259 if (rx_chains_num >= 3)
d9fe60de 260 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 261
262 /* Highest supported Rx data rate */
263 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 264 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
265 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 266
267 /* Tx MCS capabilities */
d9fe60de 268 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 269 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 270 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
271 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
272 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 273 }
c7de35cd 274}
c7de35cd 275
c7de35cd
RR		 276/**
277 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
278 */
534166de 279int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 280{
281 struct iwl_channel_info *ch;
282 struct ieee80211_supported_band *sband;
283 struct ieee80211_channel *channels;
284 struct ieee80211_channel *geo_ch;
285 struct ieee80211_rate *rates;
286 int i = 0;
287
288 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
289 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 290 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 291 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
292 return 0;
293 }
294
295 channels = kzalloc(sizeof(struct ieee80211_channel) *
296 priv->channel_count, GFP_KERNEL);
297 if (!channels)
298 return -ENOMEM;
299
5027309b 300 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 301 GFP_KERNEL);
302 if (!rates) {
303 kfree(channels);
304 return -ENOMEM;
305 }
306
307 /* 5.2GHz channels start after the 2.4GHz channels */
308 sband = &priv->bands[IEEE80211_BAND_5GHZ];
309 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
310 /* just OFDM */
311 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 312 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 313
49779293 314 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 315 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 316 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 317
318 sband = &priv->bands[IEEE80211_BAND_2GHZ];
319 sband->channels = channels;
320 /* OFDM & CCK */
321 sband->bitrates = rates;
5027309b 322 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 323
49779293 324 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 325 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 326 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 327
328 priv->ieee_channels = channels;
329 priv->ieee_rates = rates;
330
c7de35cd
RR		 331 for (i = 0; i < priv->channel_count; i++) {
332 ch = &priv->channel_info[i];
333
334 /* FIXME: might be removed if scan is OK */
335 if (!is_channel_valid(ch))
336 continue;
337
338 if (is_channel_a_band(ch))
339 sband = &priv->bands[IEEE80211_BAND_5GHZ];
340 else
341 sband = &priv->bands[IEEE80211_BAND_2GHZ];
342
343 geo_ch = &sband->channels[sband->n_channels++];
344
345 geo_ch->center_freq =
346 ieee80211_channel_to_frequency(ch->channel);
347 geo_ch->max_power = ch->max_power_avg;
348 geo_ch->max_antenna_gain = 0xff;
349 geo_ch->hw_value = ch->channel;
350
351 if (is_channel_valid(ch)) {
352 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
353 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
354
355 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
356 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
357
358 if (ch->flags & EEPROM_CHANNEL_RADAR)
359 geo_ch->flags |= IEEE80211_CHAN_RADAR;
360
7aafef1c 361 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 362
dc1b0973
WYG		 363 if (ch->max_power_avg > priv->tx_power_device_lmt)
364 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 365 } else {
366 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
367 }
368
e1623446 369 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 370 ch->channel, geo_ch->center_freq,
371 is_channel_a_band(ch) ? "5.2" : "2.4",
372 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
373 "restricted" : "valid",
374 geo_ch->flags);
375 }
376
377 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
378 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 379 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
380 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 381 priv->pci_dev->device,
382 priv->pci_dev->subsystem_device);
c7de35cd
RR		 383 priv->cfg->sku &= ~IWL_SKU_A;
384 }
385
978785a3 386 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 387 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
388 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 389
390 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
391
392 return 0;
393}
534166de 394EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 395
396/*
397 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
398 */
534166de 399void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 400{
401 kfree(priv->ieee_channels);
402 kfree(priv->ieee_rates);
403 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
404}
534166de 405EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 406
37dc70fe 407/*
94597ab2 408 * iwlcore_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
37dc70fe
AK		 409 * function.
410 */
94597ab2
JB		 411void iwlcore_tx_cmd_protection(struct iwl_priv *priv,
412 struct ieee80211_tx_info *info,
413 __le16 fc, __le32 *tx_flags)
37dc70fe
AK		 414{
415 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
416 *tx_flags |= TX_CMD_FLG_RTS_MSK;
417 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
94597ab2
JB		 418 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
419
420 if (!ieee80211_is_mgmt(fc))
421 return;
422
423 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
424 case cpu_to_le16(IEEE80211_STYPE_AUTH):
425 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
426 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
427 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
428 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
429 *tx_flags |= TX_CMD_FLG_CTS_MSK;
430 break;
431 }
37dc70fe
AK		 432 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
433 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
434 *tx_flags |= TX_CMD_FLG_CTS_MSK;
94597ab2 435 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
37dc70fe
AK		 436 }
437}
94597ab2
JB		 438EXPORT_SYMBOL(iwlcore_tx_cmd_protection);
439
37dc70fe 440
28a6b07a 441static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 442{
ba37a3d0 443 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 444 priv->current_ht_config.single_chain_sufficient;
c7de35cd 445}
963f5517 446
7e6a5886
JB		 447static bool iwl_is_channel_extension(struct iwl_priv *priv,
448 enum ieee80211_band band,
449 u16 channel, u8 extension_chan_offset)
47c5196e
TW		 450{
451 const struct iwl_channel_info *ch_info;
452
453 ch_info = iwl_get_channel_info(priv, band, channel);
454 if (!is_channel_valid(ch_info))
7e6a5886 455 return false;
47c5196e 456
d9fe60de 457 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 458 return !(ch_info->ht40_extension_channel &
689da1b3 459 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 460 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 461 return !(ch_info->ht40_extension_channel &
689da1b3 462 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e 463
7e6a5886 464 return false;
47c5196e
TW		 465}
466
7e6a5886
JB		 467bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
468 struct iwl_rxon_context *ctx,
469 struct ieee80211_sta_ht_cap *ht_cap)
47c5196e 470{
7e6a5886
JB		 471 if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
472 return false;
47c5196e 473
7e6a5886
JB		 474 /*
475 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
a2b0f02e
WYG		 476 * the bit will not set if it is pure 40MHz case
477 */
7e6a5886
JB		 478 if (ht_cap && !ht_cap->ht_supported)
479 return false;
480
d73e4923 481#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4 482 if (priv->disable_ht40)
7e6a5886 483 return false;
1e4247d4 484#endif
7e6a5886 485
611d3eb7 486 return iwl_is_channel_extension(priv, priv->band,
246ed355 487 le16_to_cpu(ctx->staging.channel),
7e6a5886 488 ctx->ht.extension_chan_offset);
47c5196e 489}
7aafef1c 490EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 491
2c2f3b33
TW		 492static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
493{
ea196fdb
JB		 494 u16 new_val;
495 u16 beacon_factor;
496
497 /*
498 * If mac80211 hasn't given us a beacon interval, program
499 * the default into the device (not checking this here
500 * would cause the adjustment below to return the maximum
501 * value, which may break PAN.)
502 */
503 if (!beacon_val)
504 return DEFAULT_BEACON_INTERVAL;
505
506 /*
507 * If the beacon interval we obtained from the peer
508 * is too large, we'll have to wake up more often
509 * (and in IBSS case, we'll beacon too much)
510 *
511 * For example, if max_beacon_val is 4096, and the
512 * requested beacon interval is 7000, we'll have to
513 * use 3500 to be able to wake up on the beacons.
514 *
515 * This could badly influence beacon detection stats.
516 */
2c2f3b33
TW		 517
518 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
519 new_val = beacon_val / beacon_factor;
520
521 if (!new_val)
522 new_val = max_beacon_val;
523
524 return new_val;
525}
526
47313e34 527int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
2c2f3b33
TW		 528{
529 u64 tsf;
530 s32 interval_tm, rem;
2c2f3b33
TW		 531 struct ieee80211_conf *conf = NULL;
532 u16 beacon_int;
47313e34 533 struct ieee80211_vif *vif = ctx->vif;
2c2f3b33
TW		 534
535 conf = ieee80211_get_hw_conf(priv->hw);
536
948f5a2f
JB		 537 lockdep_assert_held(&priv->mutex);
538
246ed355 539 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
948f5a2f 540
246ed355
JB		 541 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
542 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
2c2f3b33 543
47313e34 544 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
2c2f3b33 545
47313e34
JB		 546 /*
547 * TODO: For IBSS we need to get atim_window from mac80211,
548 * for now just always use 0
549 */
550 ctx->timing.atim_window = 0;
2c2f3b33 551
bde4530e 552 if (ctx->ctxid == IWL_RXON_CTX_PAN &&
f1f270b2
JB		 553 (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
554 iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
555 priv->contexts[IWL_RXON_CTX_BSS].vif &&
556 priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
bde4530e
JB		 557 ctx->timing.beacon_interval =
558 priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
559 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
f1f270b2
JB		 560 } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
561 iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
562 priv->contexts[IWL_RXON_CTX_PAN].vif &&
563 priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
564 (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
565 !ctx->vif->bss_conf.beacon_int)) {
566 ctx->timing.beacon_interval =
567 priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
568 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
bde4530e
JB		 569 } else {
570 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 571 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
bde4530e
JB		 572 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
573 }
2c2f3b33
TW		 574
575 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 576 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33 577 rem = do_div(tsf, interval_tm);
246ed355 578 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
2c2f3b33 579
47313e34 580 ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
2491fa42 581
2c2f3b33
TW		 582 IWL_DEBUG_ASSOC(priv,
583 "beacon interval %d beacon timer %d beacon tim %d\n",
246ed355
JB		 584 le16_to_cpu(ctx->timing.beacon_interval),
585 le32_to_cpu(ctx->timing.beacon_init_val),
586 le16_to_cpu(ctx->timing.atim_window));
948f5a2f 587
8f2d3d2a 588 return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
246ed355 589 sizeof(ctx->timing), &ctx->timing);
2c2f3b33 590}
948f5a2f 591EXPORT_SYMBOL(iwl_send_rxon_timing);
2c2f3b33 592
246ed355
JB		 593void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
594 int hw_decrypt)
8ccde88a 595{
246ed355 596 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO		 597
598 if (hw_decrypt)
599 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
600 else
601 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
602
603}
604EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
605
606/**
607 * iwl_check_rxon_cmd - validate RXON structure is valid
608 *
609 * NOTE: This is really only useful during development and can eventually
610 * be #ifdef'd out once the driver is stable and folks aren't actively
611 * making changes
612 */
246ed355 613int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
8ccde88a
SO		 614{
615 int error = 0;
616 int counter = 1;
246ed355 617 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO		 618
619 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
620 error |= le32_to_cpu(rxon->flags &
621 (RXON_FLG_TGJ_NARROW_BAND_MSK |
622 RXON_FLG_RADAR_DETECT_MSK));
623 if (error)
624 IWL_WARN(priv, "check 24G fields %d | %d\n",
625 counter++, error);
626 } else {
627 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
628 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
629 if (error)
630 IWL_WARN(priv, "check 52 fields %d | %d\n",
631 counter++, error);
632 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
633 if (error)
634 IWL_WARN(priv, "check 52 CCK %d | %d\n",
635 counter++, error);
636 }
637 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
638 if (error)
639 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
640
641 /* make sure basic rates 6Mbps and 1Mbps are supported */
642 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
643 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
644 if (error)
645 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
646
647 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
648 if (error)
649 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
650
651 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
652 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
653 if (error)
654 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
655 counter++, error);
656
657 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
658 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
659 if (error)
660 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
661 counter++, error);
662
663 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
664 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
665 if (error)
666 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
667 counter++, error);
668
669 if (error)
670 IWL_WARN(priv, "Tuning to channel %d\n",
671 le16_to_cpu(rxon->channel));
672
673 if (error) {
674 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
675 return -1;
676 }
677 return 0;
678}
679EXPORT_SYMBOL(iwl_check_rxon_cmd);
680
681/**
682 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
683 * @priv: staging_rxon is compared to active_rxon
684 *
685 * If the RXON structure is changing enough to require a new tune,
686 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
687 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
688 */
246ed355
JB		 689int iwl_full_rxon_required(struct iwl_priv *priv,
690 struct iwl_rxon_context *ctx)
8ccde88a 691{
246ed355
JB		 692 const struct iwl_rxon_cmd *staging = &ctx->staging;
693 const struct iwl_rxon_cmd *active = &ctx->active;
694
695#define CHK(cond) \
696 if ((cond)) { \
697 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
698 return 1; \
699 }
700
701#define CHK_NEQ(c1, c2) \
702 if ((c1) != (c2)) { \
703 IWL_DEBUG_INFO(priv, "need full RXON - " \
704 #c1 " != " #c2 " - %d != %d\n", \
705 (c1), (c2)); \
706 return 1; \
707 }
8ccde88a
SO		 708
709 /* These items are only settable from the full RXON command */
246ed355
JB		 710 CHK(!iwl_is_associated_ctx(ctx));
711 CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
712 CHK(compare_ether_addr(staging->node_addr, active->node_addr));
713 CHK(compare_ether_addr(staging->wlap_bssid_addr,
714 active->wlap_bssid_addr));
715 CHK_NEQ(staging->dev_type, active->dev_type);
716 CHK_NEQ(staging->channel, active->channel);
717 CHK_NEQ(staging->air_propagation, active->air_propagation);
718 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
719 active->ofdm_ht_single_stream_basic_rates);
720 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
721 active->ofdm_ht_dual_stream_basic_rates);
722 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
723 active->ofdm_ht_triple_stream_basic_rates);
724 CHK_NEQ(staging->assoc_id, active->assoc_id);
8ccde88a
SO		 725
726 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
727 * be updated with the RXON_ASSOC command -- however only some
728 * flag transitions are allowed using RXON_ASSOC */
729
730 /* Check if we are not switching bands */
246ed355
JB		 731 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
732 active->flags & RXON_FLG_BAND_24G_MSK);
8ccde88a
SO		 733
734 /* Check if we are switching association toggle */
246ed355
JB		 735 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
736 active->filter_flags & RXON_FILTER_ASSOC_MSK);
737
738#undef CHK
739#undef CHK_NEQ
8ccde88a
SO		 740
741 return 0;
742}
743EXPORT_SYMBOL(iwl_full_rxon_required);
744
76d04815
JB		 745u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv,
746 struct iwl_rxon_context *ctx)
8ccde88a 747{
4a02886b
JB		 748 /*
749 * Assign the lowest rate -- should really get this from
750 * the beacon skb from mac80211.
751 */
246ed355 752 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
8ccde88a
SO		 753 return IWL_RATE_1M_PLCP;
754 else
755 return IWL_RATE_6M_PLCP;
756}
757EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
758
246ed355
JB		 759static void _iwl_set_rxon_ht(struct iwl_priv *priv,
760 struct iwl_ht_config *ht_conf,
761 struct iwl_rxon_context *ctx)
47c5196e 762{
246ed355 763 struct iwl_rxon_cmd *rxon = &ctx->staging;
47c5196e 764
7e6a5886 765 if (!ctx->ht.enabled) {
a2b0f02e 766 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 767 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 768 RXON_FLG_HT40_PROT_MSK |
42eb7c64 769 RXON_FLG_HT_PROT_MSK);
47c5196e 770 return;
42eb7c64 771 }
47c5196e 772
7e6a5886 773 /* FIXME: if the definition of ht.protection changed, the "translation"
a2b0f02e
WYG		 774 * will be needed for rxon->flags
775 */
7e6a5886 776 rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 777
778 /* Set up channel bandwidth:
7aafef1c 779 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 780 /* clear the HT channel mode before set the mode */
781 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
782 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7e6a5886 783 if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
7aafef1c 784 /* pure ht40 */
7e6a5886 785 if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 786 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 787 /* Note: control channel is opposite of extension channel */
7e6a5886 788 switch (ctx->ht.extension_chan_offset) {
508b08e7
WYG		 789 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
790 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
791 break;
792 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
793 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
794 break;
795 }
796 } else {
a2b0f02e 797 /* Note: control channel is opposite of extension channel */
7e6a5886 798 switch (ctx->ht.extension_chan_offset) {
a2b0f02e
WYG		 799 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
800 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
801 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
802 break;
803 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
804 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
805 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
806 break;
807 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
808 default:
809 /* channel location only valid if in Mixed mode */
810 IWL_ERR(priv, "invalid extension channel offset\n");
811 break;
812 }
813 }
814 } else {
815 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 816 }
817
45823531 818 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 819 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
47c5196e 820
02bb1bea 821 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 822 "extension channel offset 0x%x\n",
7e6a5886
JB		 823 le32_to_cpu(rxon->flags), ctx->ht.protection,
824 ctx->ht.extension_chan_offset);
47c5196e 825}
246ed355
JB		 826
827void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
828{
829 struct iwl_rxon_context *ctx;
830
831 for_each_context(priv, ctx)
832 _iwl_set_rxon_ht(priv, ht_conf, ctx);
833}
47c5196e
TW		 834EXPORT_SYMBOL(iwl_set_rxon_ht);
835
9e5e6c32
TW		 836#define IWL_NUM_RX_CHAINS_MULTIPLE 3
837#define IWL_NUM_RX_CHAINS_SINGLE 2
838#define IWL_NUM_IDLE_CHAINS_DUAL 2
839#define IWL_NUM_IDLE_CHAINS_SINGLE 1
840
2b396a12
JB		 841/*
842 * Determine how many receiver/antenna chains to use.
843 *
844 * More provides better reception via diversity. Fewer saves power
845 * at the expense of throughput, but only when not in powersave to
846 * start with.
847 *
c7de35cd
RR		 848 * MIMO (dual stream) requires at least 2, but works better with 3.
849 * This does not determine *which* chains to use, just how many.
850 */
28a6b07a 851static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 852{
da5dbb97
WYG		 853 if (priv->cfg->advanced_bt_coexist && (priv->bt_full_concurrent ||
854 priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
855 /*
856 * only use chain 'A' in bt high traffic load or
857 * full concurrency mode
858 */
bee008b7
WYG		 859 return IWL_NUM_RX_CHAINS_SINGLE;
860 }
c7de35cd 861 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 862 if (is_single_rx_stream(priv))
9e5e6c32 863 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 864 else
9e5e6c32 865 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 866}
c7de35cd 867
2b396a12 868/*
3f3e0376
WYG		 869 * When we are in power saving mode, unless device support spatial
870 * multiplexing power save, use the active count for rx chain count.
2b396a12 871 */
28a6b07a
TW		 872static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
873{
ba37a3d0
JB		 874 /* # Rx chains when idling, depending on SMPS mode */
875 switch (priv->current_ht_config.smps) {
876 case IEEE80211_SMPS_STATIC:
877 case IEEE80211_SMPS_DYNAMIC:
878 return IWL_NUM_IDLE_CHAINS_SINGLE;
879 case IEEE80211_SMPS_OFF:
880 return active_cnt;
c15d20c1 881 default:
ba37a3d0
JB		 882 WARN(1, "invalid SMPS mode %d",
883 priv->current_ht_config.smps);
884 return active_cnt;
3f3e0376 885 }
c7de35cd
RR		 886}
887
04816448
GE		 888/* up to 4 chains */
889static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
890{
891 u8 res;
892 res = (chain_bitmap & BIT(0)) >> 0;
893 res += (chain_bitmap & BIT(1)) >> 1;
894 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 895 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 896 return res;
897}
898
c7de35cd
RR		 899/**
900 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
901 *
902 * Selects how many and which Rx receivers/antennas/chains to use.
903 * This should not be used for scan command ... it puts data in wrong place.
904 */
246ed355 905void iwl_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
c7de35cd 906{
28a6b07a
TW		 907 bool is_single = is_single_rx_stream(priv);
908 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 909 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
910 u32 active_chains;
28a6b07a 911 u16 rx_chain;
c7de35cd
RR		 912
913 /* Tell uCode which antennas are actually connected.
914 * Before first association, we assume all antennas are connected.
915 * Just after first association, iwl_chain_noise_calibration()
916 * checks which antennas actually *are* connected. */
bee008b7 917 if (priv->chain_noise_data.active_chains)
04816448
GE		 918 active_chains = priv->chain_noise_data.active_chains;
919 else
920 active_chains = priv->hw_params.valid_rx_ant;
921
da5dbb97
WYG		 922 if (priv->cfg->advanced_bt_coexist && (priv->bt_full_concurrent ||
923 priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
924 /*
925 * only use chain 'A' in bt high traffic load or
926 * full concurrency mode
927 */
bee008b7
WYG		 928 active_chains = first_antenna(active_chains);
929 }
930
04816448 931 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 932
933 /* How many receivers should we use? */
28a6b07a
TW		 934 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
935 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
936
28a6b07a 937
04816448
GE		 938 /* correct rx chain count according hw settings
939 * and chain noise calibration
940 */
941 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
942 if (valid_rx_cnt < active_rx_cnt)
943 active_rx_cnt = valid_rx_cnt;
944
945 if (valid_rx_cnt < idle_rx_cnt)
946 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 947
948 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
949 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
950
246ed355 951 ctx->staging.rx_chain = cpu_to_le16(rx_chain);
28a6b07a 952
9e5e6c32 953 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
246ed355 954 ctx->staging.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
c7de35cd 955 else
246ed355 956 ctx->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
c7de35cd 957
e1623446 958 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
246ed355 959 ctx->staging.rx_chain,
28a6b07a
TW		 960 active_rx_cnt, idle_rx_cnt);
961
962 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
963 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 964}
965EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f 966
246ed355 967/* Return valid, unused, channel for a passive scan to reset the RF */
14023641 968u8 iwl_get_single_channel_number(struct iwl_priv *priv,
246ed355 969 enum ieee80211_band band)
14023641
AK		 970{
971 const struct iwl_channel_info *ch_info;
972 int i;
973 u8 channel = 0;
246ed355
JB		 974 u8 min, max;
975 struct iwl_rxon_context *ctx;
14023641 976
14023641 977 if (band == IEEE80211_BAND_5GHZ) {
246ed355
JB		 978 min = 14;
979 max = priv->channel_count;
14023641 980 } else {
246ed355
JB		 981 min = 0;
982 max = 14;
983 }
984
985 for (i = min; i < max; i++) {
986 bool busy = false;
987
988 for_each_context(priv, ctx) {
989 busy = priv->channel_info[i].channel ==
990 le16_to_cpu(ctx->staging.channel);
991 if (busy)
992 break;
14023641 993 }
246ed355
JB		 994
995 if (busy)
996 continue;
997
998 channel = priv->channel_info[i].channel;
999 ch_info = iwl_get_channel_info(priv, band, channel);
1000 if (is_channel_valid(ch_info))
1001 break;
14023641
AK		 1002 }
1003
1004 return channel;
1005}
1006EXPORT_SYMBOL(iwl_get_single_channel_number);
1007
bf85ea4f 1008/**
3edb5fd6
SZ		 1009 * iwl_set_rxon_channel - Set the band and channel values in staging RXON
1010 * @ch: requested channel as a pointer to struct ieee80211_channel
bf85ea4f 1011
bf85ea4f 1012 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3edb5fd6 1013 * in the staging RXON flag structure based on the ch->band
bf85ea4f 1014 */
246ed355
JB		 1015int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
1016 struct iwl_rxon_context *ctx)
bf85ea4f 1017{
17e72782 1018 enum ieee80211_band band = ch->band;
81e95430 1019 u16 channel = ch->hw_value;
17e72782 1020
246ed355 1021 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
bf85ea4f
AK		 1022 (priv->band == band))
1023 return 0;
1024
246ed355 1025 ctx->staging.channel = cpu_to_le16(channel);
bf85ea4f 1026 if (band == IEEE80211_BAND_5GHZ)
246ed355 1027 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
bf85ea4f 1028 else
246ed355 1029 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
bf85ea4f
AK		 1030
1031 priv->band = band;
1032
e1623446 1033 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 1034
1035 return 0;
1036}
c7de35cd 1037EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 1038
79d07325 1039void iwl_set_flags_for_band(struct iwl_priv *priv,
246ed355 1040 struct iwl_rxon_context *ctx,
79d07325
WYG		 1041 enum ieee80211_band band,
1042 struct ieee80211_vif *vif)
8ccde88a
SO		 1043{
1044 if (band == IEEE80211_BAND_5GHZ) {
246ed355 1045 ctx->staging.flags &=
8ccde88a
SO		 1046 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1047 | RXON_FLG_CCK_MSK);
246ed355 1048 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a
SO		 1049 } else {
1050 /* Copied from iwl_post_associate() */
c213d745 1051 if (vif && vif->bss_conf.use_short_slot)
246ed355 1052 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 1053 else
246ed355 1054 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 1055
246ed355
JB		 1056 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
1057 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
1058 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
8ccde88a
SO		 1059 }
1060}
79d07325 1061EXPORT_SYMBOL(iwl_set_flags_for_band);
8ccde88a
SO		 1062
1063/*
1064 * initialize rxon structure with default values from eeprom
1065 */
1dda6d28 1066void iwl_connection_init_rx_config(struct iwl_priv *priv,
d0fe478c 1067 struct iwl_rxon_context *ctx)
8ccde88a
SO		 1068{
1069 const struct iwl_channel_info *ch_info;
1070
246ed355 1071 memset(&ctx->staging, 0, sizeof(ctx->staging));
8ccde88a 1072
d0fe478c
JB		 1073 if (!ctx->vif) {
1074 ctx->staging.dev_type = ctx->unused_devtype;
1075 } else switch (ctx->vif->type) {
8ccde88a 1076 case NL80211_IFTYPE_AP:
d0fe478c 1077 ctx->staging.dev_type = ctx->ap_devtype;
8ccde88a
SO		 1078 break;
1079
1080 case NL80211_IFTYPE_STATION:
d0fe478c 1081 ctx->staging.dev_type = ctx->station_devtype;
246ed355 1082 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
8ccde88a
SO		 1083 break;
1084
1085 case NL80211_IFTYPE_ADHOC:
d0fe478c 1086 ctx->staging.dev_type = ctx->ibss_devtype;
246ed355
JB		 1087 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1088 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
8ccde88a
SO		 1089 RXON_FILTER_ACCEPT_GRP_MSK;
1090 break;
1091
8ccde88a 1092 default:
d0fe478c
JB		 1093 IWL_ERR(priv, "Unsupported interface type %d\n",
1094 ctx->vif->type);
8ccde88a
SO		 1095 break;
1096 }
1097
1098#if 0
1099 /* TODO: Figure out when short_preamble would be set and cache from
1100 * that */
1101 if (!hw_to_local(priv->hw)->short_preamble)
246ed355 1102 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a 1103 else
246ed355 1104 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a
SO		 1105#endif
1106
1107 ch_info = iwl_get_channel_info(priv, priv->band,
246ed355 1108 le16_to_cpu(ctx->active.channel));
8ccde88a
SO		 1109
1110 if (!ch_info)
1111 ch_info = &priv->channel_info[0];
1112
246ed355 1113 ctx->staging.channel = cpu_to_le16(ch_info->channel);
8ccde88a
SO		 1114 priv->band = ch_info->band;
1115
d0fe478c 1116 iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
8ccde88a 1117
246ed355 1118 ctx->staging.ofdm_basic_rates =
8ccde88a 1119 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
246ed355 1120 ctx->staging.cck_basic_rates =
8ccde88a
SO		 1121 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1122
a2b0f02e 1123 /* clear both MIX and PURE40 mode flag */
246ed355 1124 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
a2b0f02e 1125 RXON_FLG_CHANNEL_MODE_PURE_40);
d0fe478c
JB		 1126 if (ctx->vif)
1127 memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
7684c408 1128
246ed355
JB		 1129 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
1130 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
1131 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1132}
1133EXPORT_SYMBOL(iwl_connection_init_rx_config);
1134
79d07325 1135void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1136{
1137 const struct ieee80211_supported_band *hw = NULL;
1138 struct ieee80211_rate *rate;
246ed355 1139 struct iwl_rxon_context *ctx;
8ccde88a
SO		 1140 int i;
1141
1142 hw = iwl_get_hw_mode(priv, priv->band);
1143 if (!hw) {
1144 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1145 return;
1146 }
1147
1148 priv->active_rate = 0;
8ccde88a
SO		 1149
1150 for (i = 0; i < hw->n_bitrates; i++) {
1151 rate = &(hw->bitrates[i]);
5027309b 1152 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1153 priv->active_rate |= (1 << rate->hw_value);
1154 }
1155
4a02886b 1156 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1157
246ed355
JB		 1158 for_each_context(priv, ctx) {
1159 ctx->staging.cck_basic_rates =
1160 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
4a02886b 1161
246ed355
JB		 1162 ctx->staging.ofdm_basic_rates =
1163 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1164 }
8ccde88a 1165}
79d07325
WYG		 1166EXPORT_SYMBOL(iwl_set_rate);
1167
1168void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
1169{
8bd413e6
JB		 1170 /*
1171 * MULTI-FIXME
1172 * See iwl_mac_channel_switch.
1173 */
1174 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1175
79d07325
WYG		 1176 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1177 return;
1178
1179 if (priv->switch_rxon.switch_in_progress) {
8bd413e6 1180 ieee80211_chswitch_done(ctx->vif, is_success);
79d07325
WYG		 1181 mutex_lock(&priv->mutex);
1182 priv->switch_rxon.switch_in_progress = false;
1183 mutex_unlock(&priv->mutex);
1184 }
1185}
1186EXPORT_SYMBOL(iwl_chswitch_done);
8ccde88a
SO		 1187
1188void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1189{
2f301227 1190 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a 1191 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
8bd413e6
JB		 1192 /*
1193 * MULTI-FIXME
1194 * See iwl_mac_channel_switch.
1195 */
246ed355 1196 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
246ed355 1197 struct iwl_rxon_cmd *rxon = (void *)&ctx->active;
4a56e965 1198
0924e519
WYG		 1199 if (priv->switch_rxon.switch_in_progress) {
1200 if (!le32_to_cpu(csa->status) &&
1201 (csa->channel == priv->switch_rxon.channel)) {
1202 rxon->channel = csa->channel;
246ed355 1203 ctx->staging.channel = csa->channel;
0924e519
WYG		 1204 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1205 le16_to_cpu(csa->channel));
79d07325
WYG		 1206 iwl_chswitch_done(priv, true);
1207 } else {
0924e519
WYG		 1208 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1209 le16_to_cpu(csa->channel));
79d07325
WYG		 1210 iwl_chswitch_done(priv, false);
1211 }
0924e519 1212 }
8ccde88a
SO		 1213}
1214EXPORT_SYMBOL(iwl_rx_csa);
1215
1216#ifdef CONFIG_IWLWIFI_DEBUG
246ed355
JB		 1217void iwl_print_rx_config_cmd(struct iwl_priv *priv,
1218 struct iwl_rxon_context *ctx)
8ccde88a 1219{
246ed355 1220 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a 1221
e1623446 1222 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1223 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1224 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1225 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1226 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1227 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1228 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1229 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1230 rxon->ofdm_basic_rates);
e1623446
TW		 1231 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1232 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1233 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1234 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1235}
a643565e 1236EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1237#endif
8ccde88a
SO		 1238/**
1239 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1240 */
1241void iwl_irq_handle_error(struct iwl_priv *priv)
1242{
1243 /* Set the FW error flag -- cleared on iwl_down */
1244 set_bit(STATUS_FW_ERROR, &priv->status);
1245
1246 /* Cancel currently queued command. */
1247 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1248
459bc732
SZ		 1249 IWL_ERR(priv, "Loaded firmware version: %s\n",
1250 priv->hw->wiphy->fw_version);
1251
3a3ff72c 1252 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 1253 if (priv->cfg->ops->lib->dump_csr)
1254 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 1255 if (priv->cfg->ops->lib->dump_fh)
1256 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1257 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1258#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1259 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
246ed355
JB		 1260 iwl_print_rx_config_cmd(priv,
1261 &priv->contexts[IWL_RXON_CTX_BSS]);
8ccde88a
SO		 1262#endif
1263
1264 wake_up_interruptible(&priv->wait_command_queue);
1265
1266 /* Keep the restart process from trying to send host
1267 * commands by clearing the INIT status bit */
1268 clear_bit(STATUS_READY, &priv->status);
1269
1270 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1271 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1272 "Restarting adapter due to uCode error.\n");
1273
8ccde88a
SO		 1274 if (priv->cfg->mod_params->restart_fw)
1275 queue_work(priv->workqueue, &priv->restart);
1276 }
1277}
1278EXPORT_SYMBOL(iwl_irq_handle_error);
1279
f8e200de 1280static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1281{
5220af0c 1282 int ret = 0;
d68b603c 1283
5220af0c 1284 /* stop device's busmaster DMA activity */
d68b603c
AK		 1285 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1286
5220af0c 1287 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1288 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1289 if (ret)
1290 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1291
d68b603c
AK		 1292 IWL_DEBUG_INFO(priv, "stop master\n");
1293
5220af0c 1294 return ret;
d68b603c 1295}
d68b603c
AK		 1296
1297void iwl_apm_stop(struct iwl_priv *priv)
1298{
fadb3582
BC		 1299 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1300
5220af0c 1301 /* Stop device's DMA activity */
d68b603c
AK		 1302 iwl_apm_stop_master(priv);
1303
5220af0c 1304 /* Reset the entire device */
d68b603c
AK		 1305 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1306
1307 udelay(10);
5220af0c
BC		 1308
1309 /*
1310 * Clear "initialization complete" bit to move adapter from
1311 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1312 */
d68b603c 1313 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1314}
1315EXPORT_SYMBOL(iwl_apm_stop);
1316
fadb3582
BC		 1317
1318/*
1319 * Start up NIC's basic functionality after it has been reset
1320 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1321 * NOTE: This does not load uCode nor start the embedded processor
1322 */
1323int iwl_apm_init(struct iwl_priv *priv)
1324{
1325 int ret = 0;
1326 u16 lctl;
1327
1328 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1329
1330 /*
1331 * Use "set_bit" below rather than "write", to preserve any hardware
1332 * bits already set by default after reset.
1333 */
1334
1335 /* Disable L0S exit timer (platform NMI Work/Around) */
1336 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1337 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1338
1339 /*
1340 * Disable L0s without affecting L1;
1341 * don't wait for ICH L0s (ICH bug W/A)
1342 */
1343 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1344 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1345
1346 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1347 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1348
1349 /*
1350 * Enable HAP INTA (interrupt from management bus) to
1351 * wake device's PCI Express link L1a -> L0s
1352 * NOTE: This is no-op for 3945 (non-existant bit)
1353 */
1354 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1355 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1356
1357 /*
a6c5c731
BC		 1358 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1359 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1360 * If so (likely), disable L0S, so device moves directly L0->L1;
1361 * costs negligible amount of power savings.
1362 * If not (unlikely), enable L0S, so there is at least some
1363 * power savings, even without L1.
fadb3582
BC		 1364 */
1365 if (priv->cfg->set_l0s) {
1366 lctl = iwl_pcie_link_ctl(priv);
1367 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1368 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1369 /* L1-ASPM enabled; disable(!) L0S */
1370 iwl_set_bit(priv, CSR_GIO_REG,
1371 CSR_GIO_REG_VAL_L0S_ENABLED);
1372 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1373 } else {
1374 /* L1-ASPM disabled; enable(!) L0S */
1375 iwl_clear_bit(priv, CSR_GIO_REG,
1376 CSR_GIO_REG_VAL_L0S_ENABLED);
1377 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1378 }
1379 }
1380
1381 /* Configure analog phase-lock-loop before activating to D0A */
1382 if (priv->cfg->pll_cfg_val)
1383 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1384
1385 /*
1386 * Set "initialization complete" bit to move adapter from
1387 * D0U* --> D0A* (powered-up active) state.
1388 */
1389 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1390
1391 /*
1392 * Wait for clock stabilization; once stabilized, access to
1393 * device-internal resources is supported, e.g. iwl_write_prph()
1394 * and accesses to uCode SRAM.
1395 */
1396 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1397 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1398 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1399 if (ret < 0) {
1400 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1401 goto out;
1402 }
1403
1404 /*
1405 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1406 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1407 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1408 * and don't need BSM to restore data after power-saving sleep.
1409 *
1410 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1411 * do not disable clocks. This preserves any hardware bits already
1412 * set by default in "CLK_CTRL_REG" after reset.
1413 */
1414 if (priv->cfg->use_bsm)
1415 iwl_write_prph(priv, APMG_CLK_EN_REG,
1416 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1417 else
1418 iwl_write_prph(priv, APMG_CLK_EN_REG,
1419 APMG_CLK_VAL_DMA_CLK_RQT);
1420 udelay(20);
1421
1422 /* Disable L1-Active */
1423 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1424 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1425
1426out:
1427 return ret;
1428}
1429EXPORT_SYMBOL(iwl_apm_init);
1430
1431
630fe9b6
TW		 1432int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1433{
1434 int ret = 0;
5eadd94b
WYG		 1435 s8 prev_tx_power = priv->tx_power_user_lmt;
1436
b744cb79
WYG		 1437 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1438 IWL_WARN(priv,
1439 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1440 tx_power,
b744cb79 1441 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1442 return -EINVAL;
1443 }
1444
dc1b0973 1445 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1446 IWL_WARN(priv,
1447 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1448 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1449 return -EINVAL;
1450 }
1451
1452 if (priv->tx_power_user_lmt != tx_power)
1453 force = true;
1454
019fb97d 1455 /* if nic is not up don't send command */
5eadd94b
WYG		 1456 if (iwl_is_ready_rf(priv)) {
1457 priv->tx_power_user_lmt = tx_power;
1458 if (force && priv->cfg->ops->lib->send_tx_power)
1459 ret = priv->cfg->ops->lib->send_tx_power(priv);
1460 else if (!priv->cfg->ops->lib->send_tx_power)
1461 ret = -EOPNOTSUPP;
1462 /*
1463 * if fail to set tx_power, restore the orig. tx power
1464 */
1465 if (ret)
1466 priv->tx_power_user_lmt = prev_tx_power;
1467 }
630fe9b6 1468
5eadd94b
WYG		 1469 /*
1470 * Even this is an async host command, the command
1471 * will always report success from uCode
1472 * So once driver can placing the command into the queue
1473 * successfully, driver can use priv->tx_power_user_lmt
1474 * to reflect the current tx power
1475 */
630fe9b6
TW		 1476 return ret;
1477}
1478EXPORT_SYMBOL(iwl_set_tx_power);
1479
ef850d7c 1480irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1481{
1482 struct iwl_priv *priv = data;
1483 u32 inta, inta_mask;
1484 u32 inta_fh;
6e8cc38d 1485 unsigned long flags;
f17d08a6
AK		 1486 if (!priv)
1487 return IRQ_NONE;
1488
6e8cc38d 1489 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK		 1490
1491 /* Disable (but don't clear!) interrupts here to avoid
1492 * back-to-back ISRs and sporadic interrupts from our NIC.
1493 * If we have something to service, the tasklet will re-enable ints.
1494 * If we *don't* have something, we'll re-enable before leaving here. */
1495 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1496 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1497
1498 /* Discover which interrupts are active/pending */
1499 inta = iwl_read32(priv, CSR_INT);
1500 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1501
1502 /* Ignore interrupt if there's nothing in NIC to service.
1503 * This may be due to IRQ shared with another device,
1504 * or due to sporadic interrupts thrown from our NIC. */
1505 if (!inta && !inta_fh) {
1506 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1507 goto none;
1508 }
1509
1510 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1511 /* Hardware disappeared. It might have already raised
1512 * an interrupt */
1513 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1514 goto unplugged;
1515 }
1516
1517 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1518 inta, inta_mask, inta_fh);
1519
1520 inta &= ~CSR_INT_BIT_SCD;
1521
1522 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1523 if (likely(inta || inta_fh))
1524 tasklet_schedule(&priv->irq_tasklet);
1525
1526 unplugged:
6e8cc38d 1527 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1528 return IRQ_HANDLED;
1529
1530 none:
1531 /* re-enable interrupts here since we don't have anything to service. */
1532 /* only Re-enable if diabled by irq */
1533 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1534 iwl_enable_interrupts(priv);
6e8cc38d 1535 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1536 return IRQ_NONE;
1537}
ef850d7c 1538EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1539
65b52bde 1540void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1541{
1542 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1543 .lead_time = BT_LEAD_TIME_DEF,
1544 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1545 .kill_ack_mask = 0,
1546 .kill_cts_mask = 0,
1547 };
1548
06702a73
WYG		 1549 if (!bt_coex_active)
1550 bt_cmd.flags = BT_COEX_DISABLE;
1551 else
1552 bt_cmd.flags = BT_COEX_ENABLE;
1553
1554 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1555 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1556
65b52bde
JB		 1557 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1558 sizeof(struct iwl_bt_cmd), &bt_cmd))
1559 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO		 1560}
1561EXPORT_SYMBOL(iwl_send_bt_config);
1562
ef8d5529 1563int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1564{
ef8d5529
WYG		 1565 struct iwl_statistics_cmd statistics_cmd = {
1566 .configuration_flags =
1567 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1568 };
ef8d5529
WYG		 1569
1570 if (flags & CMD_ASYNC)
1571 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1572 sizeof(struct iwl_statistics_cmd),
1573 &statistics_cmd, NULL);
1574 else
1575 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1576 sizeof(struct iwl_statistics_cmd),
1577 &statistics_cmd);
49ea8596
EG		 1578}
1579EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1580
030f05ed
AK		 1581void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1582 struct iwl_rx_mem_buffer *rxb)
1583{
1584#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1585 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1586 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1587 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1588 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1589#endif
1590}
1591EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1592
1593void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1594 struct iwl_rx_mem_buffer *rxb)
1595{
2f301227 1596 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1597 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1598 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1599 "notification for %s:\n", len,
1600 get_cmd_string(pkt->hdr.cmd));
1601 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1602}
1603EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1604
1605void iwl_rx_reply_error(struct iwl_priv *priv,
1606 struct iwl_rx_mem_buffer *rxb)
1607{
2f301227 1608 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1609
1610 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1611 "seq 0x%04X ser 0x%08X\n",
1612 le32_to_cpu(pkt->u.err_resp.error_type),
1613 get_cmd_string(pkt->u.err_resp.cmd_id),
1614 pkt->u.err_resp.cmd_id,
1615 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1616 le32_to_cpu(pkt->u.err_resp.error_info));
1617}
1618EXPORT_SYMBOL(iwl_rx_reply_error);
1619
a83b9141
WYG		 1620void iwl_clear_isr_stats(struct iwl_priv *priv)
1621{
1622 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1623}
a83b9141 1624
488829f1
AK		 1625int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1626 const struct ieee80211_tx_queue_params *params)
1627{
1628 struct iwl_priv *priv = hw->priv;
8dfdb9d5 1629 struct iwl_rxon_context *ctx;
488829f1
AK		 1630 unsigned long flags;
1631 int q;
1632
1633 IWL_DEBUG_MAC80211(priv, "enter\n");
1634
1635 if (!iwl_is_ready_rf(priv)) {
1636 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1637 return -EIO;
1638 }
1639
1640 if (queue >= AC_NUM) {
1641 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1642 return 0;
1643 }
1644
1645 q = AC_NUM - 1 - queue;
1646
1647 spin_lock_irqsave(&priv->lock, flags);
1648
8dfdb9d5
JB		 1649 /*
1650 * MULTI-FIXME
1651 * This may need to be done per interface in nl80211/cfg80211/mac80211.
1652 */
1653 for_each_context(priv, ctx) {
1654 ctx->qos_data.def_qos_parm.ac[q].cw_min =
1655 cpu_to_le16(params->cw_min);
1656 ctx->qos_data.def_qos_parm.ac[q].cw_max =
1657 cpu_to_le16(params->cw_max);
1658 ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1659 ctx->qos_data.def_qos_parm.ac[q].edca_txop =
1660 cpu_to_le16((params->txop * 32));
1661
1662 ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
1663 }
488829f1
AK		 1664
1665 spin_unlock_irqrestore(&priv->lock, flags);
1666
1667 IWL_DEBUG_MAC80211(priv, "leave\n");
1668 return 0;
1669}
1670EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b 1671
a85d7cca
JB		 1672int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
1673{
1674 struct iwl_priv *priv = hw->priv;
1675
1676 return priv->ibss_manager == IWL_IBSS_MANAGER;
1677}
1678EXPORT_SYMBOL_GPL(iwl_mac_tx_last_beacon);
1679
5bbe233b 1680static void iwl_ht_conf(struct iwl_priv *priv,
ca3c1f59 1681 struct ieee80211_vif *vif)
5bbe233b 1682{
fad95bf5 1683 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b 1684 struct ieee80211_sta *sta;
ca3c1f59 1685 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
7e6a5886 1686 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
5bbe233b 1687
91dd6c27 1688 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1689
7e6a5886 1690 if (!ctx->ht.enabled)
5bbe233b
AK		 1691 return;
1692
7e6a5886 1693 ctx->ht.protection =
9ed6bcce 1694 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
7e6a5886 1695 ctx->ht.non_gf_sta_present =
9ed6bcce 1696 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1697
02bb1bea
JB		 1698 ht_conf->single_chain_sufficient = false;
1699
ca3c1f59 1700 switch (vif->type) {
02bb1bea
JB		 1701 case NL80211_IFTYPE_STATION:
1702 rcu_read_lock();
ca3c1f59 1703 sta = ieee80211_find_sta(vif, bss_conf->bssid);
02bb1bea
JB		 1704 if (sta) {
1705 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1706 int maxstreams;
1707
1708 maxstreams = (ht_cap->mcs.tx_params &
1709 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1710 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1711 maxstreams += 1;
1712
1713 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1714 (ht_cap->mcs.rx_mask[2] == 0))
1715 ht_conf->single_chain_sufficient = true;
1716 if (maxstreams <= 1)
1717 ht_conf->single_chain_sufficient = true;
1718 } else {
1719 /*
1720 * If at all, this can only happen through a race
1721 * when the AP disconnects us while we're still
1722 * setting up the connection, in that case mac80211
1723 * will soon tell us about that.
1724 */
1725 ht_conf->single_chain_sufficient = true;
1726 }
1727 rcu_read_unlock();
1728 break;
1729 case NL80211_IFTYPE_ADHOC:
1730 ht_conf->single_chain_sufficient = true;
1731 break;
1732 default:
1733 break;
1734 }
5bbe233b
AK		 1735
1736 IWL_DEBUG_MAC80211(priv, "leave\n");
1737}
1738
246ed355
JB		 1739static inline void iwl_set_no_assoc(struct iwl_priv *priv,
1740 struct ieee80211_vif *vif)
c91c3efc 1741{
246ed355
JB		 1742 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1743
c91c3efc
AK		 1744 iwl_led_disassociate(priv);
1745 /*
1746 * inform the ucode that there is no longer an
1747 * association and that no more packets should be
1748 * sent
1749 */
246ed355
JB		 1750 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1751 ctx->staging.assoc_id = 0;
1752 iwlcore_commit_rxon(priv, ctx);
c91c3efc
AK		 1753}
1754
0bc5774f
JB		 1755static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
1756{
1757 struct iwl_priv *priv = hw->priv;
1758 unsigned long flags;
1759 __le64 timestamp;
1760
1761 IWL_DEBUG_MAC80211(priv, "enter\n");
1762
76d04815
JB		 1763 lockdep_assert_held(&priv->mutex);
1764
1765 if (!priv->beacon_ctx) {
1766 IWL_ERR(priv, "update beacon but no beacon context!\n");
1767 dev_kfree_skb(skb);
1768 return -EINVAL;
1769 }
1770
0bc5774f
JB		 1771 if (!iwl_is_ready_rf(priv)) {
1772 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1773 return -EIO;
1774 }
1775
1776 spin_lock_irqsave(&priv->lock, flags);
1777
1778 if (priv->ibss_beacon)
1779 dev_kfree_skb(priv->ibss_beacon);
1780
1781 priv->ibss_beacon = skb;
1782
1783 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
1784 priv->timestamp = le64_to_cpu(timestamp);
1785
1786 IWL_DEBUG_MAC80211(priv, "leave\n");
1787 spin_unlock_irqrestore(&priv->lock, flags);
1788
76d04815 1789 priv->cfg->ops->lib->post_associate(priv, priv->beacon_ctx->vif);
0bc5774f
JB		 1790
1791 return 0;
1792}
1793
5bbe233b 1794void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 1795 struct ieee80211_vif *vif,
1796 struct ieee80211_bss_conf *bss_conf,
1797 u32 changes)
5bbe233b
AK		 1798{
1799 struct iwl_priv *priv = hw->priv;
246ed355 1800 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
3a650292 1801 int ret;
5bbe233b
AK		 1802
1803 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1804
2d0ddec5
JB		 1805 if (!iwl_is_alive(priv))
1806 return;
1807
1808 mutex_lock(&priv->mutex);
1809
4ced3f74
JB		 1810 if (changes & BSS_CHANGED_QOS) {
1811 unsigned long flags;
1812
1813 spin_lock_irqsave(&priv->lock, flags);
8dfdb9d5
JB		 1814 ctx->qos_data.qos_active = bss_conf->qos;
1815 iwl_update_qos(priv, ctx);
4ced3f74
JB		 1816 spin_unlock_irqrestore(&priv->lock, flags);
1817 }
1818
76d04815
JB		 1819 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1820 /*
1821 * the add_interface code must make sure we only ever
1822 * have a single interface that could be beaconing at
1823 * any time.
1824 */
1825 if (vif->bss_conf.enable_beacon)
1826 priv->beacon_ctx = ctx;
1827 else
1828 priv->beacon_ctx = NULL;
1829 }
1830
92445c95 1831 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
2d0ddec5
JB		 1832 dev_kfree_skb(priv->ibss_beacon);
1833 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1834 }
1835
2a3aeb44
JB		 1836 if (changes & BSS_CHANGED_BEACON_INT && vif->type == NL80211_IFTYPE_AP)
1837 iwl_send_rxon_timing(priv, ctx);
d7129e19
JB		 1838
1839 if (changes & BSS_CHANGED_BSSID) {
1840 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1841
1842 /*
1843 * If there is currently a HW scan going on in the
1844 * background then we need to cancel it else the RXON
1845 * below/in post_associate will fail.
1846 */
2d0ddec5 1847 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1848 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 1849 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1850 mutex_unlock(&priv->mutex);
1851 return;
1852 }
2d0ddec5 1853
d7129e19 1854 /* mac80211 only sets assoc when in STATION mode */
92445c95 1855 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
246ed355 1856 memcpy(ctx->staging.bssid_addr,
d7129e19 1857 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1858
d7129e19
JB		 1859 /* currently needed in a few places */
1860 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1861 } else {
246ed355 1862 ctx->staging.filter_flags &=
d7129e19 1863 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1864 }
d7129e19 1865
2d0ddec5
JB		 1866 }
1867
d7129e19
JB		 1868 /*
1869 * This needs to be after setting the BSSID in case
1870 * mac80211 decides to do both changes at once because
1871 * it will invoke post_associate.
1872 */
92445c95 1873 if (vif->type == NL80211_IFTYPE_ADHOC &&
2d0ddec5
JB		 1874 changes & BSS_CHANGED_BEACON) {
1875 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1876
1877 if (beacon)
1878 iwl_mac_beacon_update(hw, beacon);
1879 }
1880
5bbe233b
AK		 1881 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1882 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1883 bss_conf->use_short_preamble);
1884 if (bss_conf->use_short_preamble)
246ed355 1885 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5bbe233b 1886 else
246ed355 1887 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5bbe233b
AK		 1888 }
1889
1890 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1891 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1892 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
246ed355 1893 ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
5bbe233b 1894 else
246ed355 1895 ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
94597ab2 1896 if (bss_conf->use_cts_prot)
246ed355 1897 ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
94597ab2 1898 else
246ed355 1899 ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
5bbe233b
AK		 1900 }
1901
d7129e19
JB		 1902 if (changes & BSS_CHANGED_BASIC_RATES) {
1903 /* XXX use this information
1904 *
1905 * To do that, remove code from iwl_set_rate() and put something
1906 * like this here:
1907 *
1908 if (A-band)
246ed355 1909 ctx->staging.ofdm_basic_rates =
d7129e19
JB		 1910 bss_conf->basic_rates;
1911 else
246ed355 1912 ctx->staging.ofdm_basic_rates =
d7129e19 1913 bss_conf->basic_rates >> 4;
246ed355 1914 ctx->staging.cck_basic_rates =
d7129e19
JB		 1915 bss_conf->basic_rates & 0xF;
1916 */
1917 }
1918
5bbe233b 1919 if (changes & BSS_CHANGED_HT) {
ca3c1f59 1920 iwl_ht_conf(priv, vif);
45823531
AK		 1921
1922 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1923 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
5bbe233b
AK		 1924 }
1925
1926 if (changes & BSS_CHANGED_ASSOC) {
1927 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b 1928 if (bss_conf->assoc) {
5bbe233b 1929 priv->timestamp = bss_conf->timestamp;
5bbe233b 1930
e932a609
JB		 1931 iwl_led_associate(priv);
1932
d7129e19 1933 if (!iwl_is_rfkill(priv))
1dda6d28 1934 priv->cfg->ops->lib->post_associate(priv, vif);
c91c3efc 1935 } else
246ed355 1936 iwl_set_no_assoc(priv, vif);
d7129e19
JB		 1937 }
1938
246ed355 1939 if (changes && iwl_is_associated_ctx(ctx) && bss_conf->aid) {
d7129e19
JB		 1940 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1941 changes);
246ed355 1942 ret = iwl_send_rxon_assoc(priv, ctx);
d7129e19
JB		 1943 if (!ret) {
1944 /* Sync active_rxon with latest change. */
246ed355
JB		 1945 memcpy((void *)&ctx->active,
1946 &ctx->staging,
d7129e19 1947 sizeof(struct iwl_rxon_cmd));
5bbe233b 1948 }
5bbe233b 1949 }
d7129e19 1950
c91c3efc
AK		 1951 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1952 if (vif->bss_conf.enable_beacon) {
246ed355 1953 memcpy(ctx->staging.bssid_addr,
c91c3efc
AK		 1954 bss_conf->bssid, ETH_ALEN);
1955 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1dda6d28 1956 iwlcore_config_ap(priv, vif);
c91c3efc 1957 } else
246ed355 1958 iwl_set_no_assoc(priv, vif);
f513dfff
DH		 1959 }
1960
1fa61b2e
JB		 1961 if (changes & BSS_CHANGED_IBSS) {
1962 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
1963 bss_conf->ibss_joined);
1964 if (ret)
1965 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1966 bss_conf->ibss_joined ? "add" : "remove",
1967 bss_conf->bssid);
1968 }
1969
52a02d15
JB		 1970 if (changes & BSS_CHANGED_IDLE &&
1971 priv->cfg->ops->hcmd->set_pan_params) {
1972 if (priv->cfg->ops->hcmd->set_pan_params(priv))
1973 IWL_ERR(priv, "failed to update PAN params\n");
1974 }
1975
d7129e19
JB		 1976 mutex_unlock(&priv->mutex);
1977
2d0ddec5 1978 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 1979}
1980EXPORT_SYMBOL(iwl_bss_info_changed);
1981
b55e75ed 1982static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 1983{
246ed355
JB		 1984 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1985
d0fe478c 1986 iwl_connection_init_rx_config(priv, ctx);
727882d6
AK		 1987
1988 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1989 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
727882d6 1990
246ed355 1991 return iwlcore_commit_rxon(priv, ctx);
727882d6 1992}
727882d6 1993
b55e75ed 1994int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 1995{
1996 struct iwl_priv *priv = hw->priv;
246ed355 1997 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
d0fe478c 1998 struct iwl_rxon_context *tmp, *ctx = NULL;
47e28f41 1999 int err = 0;
cbb6ab94 2000
3779db10
JB		 2001 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
2002 vif->type, vif->addr);
cbb6ab94 2003
47e28f41
JB		 2004 mutex_lock(&priv->mutex);
2005
b55e75ed
JB		 2006 if (WARN_ON(!iwl_is_ready_rf(priv))) {
2007 err = -EINVAL;
2008 goto out;
2009 }
2010
d0fe478c
JB		 2011 for_each_context(priv, tmp) {
2012 u32 possible_modes =
2013 tmp->interface_modes | tmp->exclusive_interface_modes;
2014
2015 if (tmp->vif) {
2016 /* check if this busy context is exclusive */
2017 if (tmp->exclusive_interface_modes &
2018 BIT(tmp->vif->type)) {
2019 err = -EINVAL;
2020 goto out;
2021 }
2022 continue;
2023 }
2024
2025 if (!(possible_modes & BIT(vif->type)))
2026 continue;
2027
2028 /* have maybe usable context w/o interface */
2029 ctx = tmp;
2030 break;
2031 }
2032
2033 if (!ctx) {
47e28f41
JB		 2034 err = -EOPNOTSUPP;
2035 goto out;
cbb6ab94
AK		 2036 }
2037
d0fe478c 2038 vif_priv->ctx = ctx;
8bd413e6 2039 ctx->vif = vif;
d0fe478c
JB		 2040 /*
2041 * This variable will be correct only when there's just
2042 * a single context, but all code using it is for hardware
2043 * that supports only one context.
2044 */
1ed32e4f 2045 priv->iw_mode = vif->type;
cbb6ab94 2046
763cc3bf
JB		 2047 ctx->is_active = true;
2048
b55e75ed 2049 err = iwl_set_mode(priv, vif);
763cc3bf
JB		 2050 if (err) {
2051 if (!ctx->always_active)
2052 ctx->is_active = false;
b55e75ed 2053 goto out_err;
763cc3bf 2054 }
7e246191 2055
59079949
JB		 2056 if (priv->cfg->advanced_bt_coexist &&
2057 vif->type == NL80211_IFTYPE_ADHOC) {
2058 /*
2059 * pretend to have high BT traffic as long as we
2060 * are operating in IBSS mode, as this will cause
2061 * the rate scaling etc. to behave as intended.
2062 */
2063 priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
2064 }
2065
b55e75ed 2066 goto out;
cbb6ab94 2067
b55e75ed 2068 out_err:
8bd413e6 2069 ctx->vif = NULL;
b55e75ed 2070 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 2071 out:
cbb6ab94
AK		 2072 mutex_unlock(&priv->mutex);
2073
2074 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 2075 return err;
cbb6ab94
AK		 2076}
2077EXPORT_SYMBOL(iwl_mac_add_interface);
2078
d8052319 2079void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 2080 struct ieee80211_vif *vif)
d8052319
AK		 2081{
2082 struct iwl_priv *priv = hw->priv;
246ed355 2083 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
d8052319
AK		 2084
2085 IWL_DEBUG_MAC80211(priv, "enter\n");
2086
2087 mutex_lock(&priv->mutex);
2088
d0fe478c
JB		 2089 WARN_ON(ctx->vif != vif);
2090 ctx->vif = NULL;
2091
e7e16b90
SG		 2092 if (priv->scan_vif == vif) {
2093 iwl_scan_cancel_timeout(priv, 200);
2094 iwl_force_scan_end(priv);
2095 }
d0fe478c 2096 iwl_set_mode(priv, vif);
8bd413e6 2097
763cc3bf
JB		 2098 if (!ctx->always_active)
2099 ctx->is_active = false;
2100
59079949
JB		 2101 /*
2102 * When removing the IBSS interface, overwrite the
2103 * BT traffic load with the stored one from the last
2104 * notification, if any. If this is a device that
2105 * doesn't implement this, this has no effect since
2106 * both values are the same and zero.
2107 */
2108 if (vif->type == NL80211_IFTYPE_ADHOC)
2109 priv->bt_traffic_load = priv->notif_bt_traffic_load;
2110
8bd413e6 2111 memset(priv->bssid, 0, ETH_ALEN);
d8052319
AK		 2112 mutex_unlock(&priv->mutex);
2113
2114 IWL_DEBUG_MAC80211(priv, "leave\n");
2115
2116}
2117EXPORT_SYMBOL(iwl_mac_remove_interface);
2118
4808368d
AK		 2119/**
2120 * iwl_mac_config - mac80211 config callback
4808368d
AK		 2121 */
2122int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2123{
2124 struct iwl_priv *priv = hw->priv;
2125 const struct iwl_channel_info *ch_info;
2126 struct ieee80211_conf *conf = &hw->conf;
aa2dc6b5 2127 struct ieee80211_channel *channel = conf->channel;
fad95bf5 2128 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
246ed355 2129 struct iwl_rxon_context *ctx;
4808368d
AK		 2130 unsigned long flags = 0;
2131 int ret = 0;
2132 u16 ch;
2133 int scan_active = 0;
2134
2135 mutex_lock(&priv->mutex);
2136
4808368d 2137 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
aa2dc6b5 2138 channel->hw_value, changed);
4808368d
AK		 2139
2140 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2141 test_bit(STATUS_SCANNING, &priv->status))) {
2142 scan_active = 1;
2143 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2144 }
2145
ba37a3d0
JB		 2146 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2147 IEEE80211_CONF_CHANGE_CHANNEL)) {
2148 /* mac80211 uses static for non-HT which is what we want */
2149 priv->current_ht_config.smps = conf->smps_mode;
2150
2151 /*
2152 * Recalculate chain counts.
2153 *
2154 * If monitor mode is enabled then mac80211 will
2155 * set up the SM PS mode to OFF if an HT channel is
2156 * configured.
2157 */
2158 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355
JB		 2159 for_each_context(priv, ctx)
2160 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
ba37a3d0 2161 }
4808368d
AK		 2162
2163 /* during scanning mac80211 will delay channel setting until
2164 * scan finish with changed = 0
2165 */
2166 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2167 if (scan_active)
2168 goto set_ch_out;
2169
aa2dc6b5
SZ		 2170 ch = channel->hw_value;
2171 ch_info = iwl_get_channel_info(priv, channel->band, ch);
4808368d
AK		 2172 if (!is_channel_valid(ch_info)) {
2173 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2174 ret = -EINVAL;
2175 goto set_ch_out;
2176 }
2177
4808368d
AK		 2178 spin_lock_irqsave(&priv->lock, flags);
2179
246ed355 2180 for_each_context(priv, ctx) {
7e6a5886
JB		 2181 /* Configure HT40 channels */
2182 ctx->ht.enabled = conf_is_ht(conf);
2183 if (ctx->ht.enabled) {
2184 if (conf_is_ht40_minus(conf)) {
2185 ctx->ht.extension_chan_offset =
2186 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2187 ctx->ht.is_40mhz = true;
2188 } else if (conf_is_ht40_plus(conf)) {
2189 ctx->ht.extension_chan_offset =
2190 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2191 ctx->ht.is_40mhz = true;
2192 } else {
2193 ctx->ht.extension_chan_offset =
2194 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2195 ctx->ht.is_40mhz = false;
2196 }
2197 } else
2198 ctx->ht.is_40mhz = false;
2199
2200 /*
2201 * Default to no protection. Protection mode will
2202 * later be set from BSS config in iwl_ht_conf
2203 */
2204 ctx->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
2205
246ed355
JB		 2206 /* if we are switching from ht to 2.4 clear flags
2207 * from any ht related info since 2.4 does not
2208 * support ht */
2209 if ((le16_to_cpu(ctx->staging.channel) != ch))
2210 ctx->staging.flags = 0;
4808368d 2211
246ed355
JB		 2212 iwl_set_rxon_channel(priv, channel, ctx);
2213 iwl_set_rxon_ht(priv, ht_conf);
2214
2215 iwl_set_flags_for_band(priv, ctx, channel->band,
8bd413e6 2216 ctx->vif);
246ed355 2217 }
4808368d 2218
4808368d 2219 spin_unlock_irqrestore(&priv->lock, flags);
79d07325 2220
a194e324
JB		 2221 if (priv->cfg->ops->lib->update_bcast_stations)
2222 ret = priv->cfg->ops->lib->update_bcast_stations(priv);
278c2f6f 2223
4808368d
AK		 2224 set_ch_out:
2225 /* The list of supported rates and rate mask can be different
2226 * for each band; since the band may have changed, reset
2227 * the rate mask to what mac80211 lists */
2228 iwl_set_rate(priv);
2229 }
2230
78f5fb7f
JB		 2231 if (changed & (IEEE80211_CONF_CHANGE_PS |
2232 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2233 ret = iwl_power_update_mode(priv, false);
4808368d 2234 if (ret)
e312c24c 2235 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2236 }
2237
2238 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2239 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2240 priv->tx_power_user_lmt, conf->power_level);
2241
2242 iwl_set_tx_power(priv, conf->power_level, false);
2243 }
2244
0cf4c01e
MA		 2245 if (!iwl_is_ready(priv)) {
2246 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2247 goto out;
2248 }
2249
4808368d
AK		 2250 if (scan_active)
2251 goto out;
2252
246ed355
JB		 2253 for_each_context(priv, ctx) {
2254 if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)))
2255 iwlcore_commit_rxon(priv, ctx);
2256 else
2257 IWL_DEBUG_INFO(priv,
2258 "Not re-sending same RXON configuration.\n");
2259 }
4808368d
AK		 2260
2261out:
2262 IWL_DEBUG_MAC80211(priv, "leave\n");
2263 mutex_unlock(&priv->mutex);
2264 return ret;
2265}
2266EXPORT_SYMBOL(iwl_mac_config);
2267
bd564261
AK		 2268void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2269{
2270 struct iwl_priv *priv = hw->priv;
2271 unsigned long flags;
246ed355
JB		 2272 /* IBSS can only be the IWL_RXON_CTX_BSS context */
2273 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
bd564261
AK		 2274
2275 mutex_lock(&priv->mutex);
2276 IWL_DEBUG_MAC80211(priv, "enter\n");
2277
2278 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2279 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2280 spin_unlock_irqrestore(&priv->lock, flags);
2281
bd564261 2282 spin_lock_irqsave(&priv->lock, flags);
bd564261
AK		 2283
2284 /* new association get rid of ibss beacon skb */
2285 if (priv->ibss_beacon)
2286 dev_kfree_skb(priv->ibss_beacon);
2287
2288 priv->ibss_beacon = NULL;
2289
bd564261 2290 priv->timestamp = 0;
bd564261
AK		 2291
2292 spin_unlock_irqrestore(&priv->lock, flags);
2293
f5354c17 2294 iwl_scan_cancel_timeout(priv, 100);
bd564261
AK		 2295 if (!iwl_is_ready_rf(priv)) {
2296 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2297 mutex_unlock(&priv->mutex);
2298 return;
2299 }
2300
2301 /* we are restarting association process
2302 * clear RXON_FILTER_ASSOC_MSK bit
2303 */
246ed355
JB		 2304 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2305 iwlcore_commit_rxon(priv, ctx);
bd564261
AK		 2306
2307 iwl_set_rate(priv);
2308
2309 mutex_unlock(&priv->mutex);
2310
2311 IWL_DEBUG_MAC80211(priv, "leave\n");
2312}
2313EXPORT_SYMBOL(iwl_mac_reset_tsf);
2314
88804e2b
WYG		 2315int iwl_alloc_txq_mem(struct iwl_priv *priv)
2316{
2317 if (!priv->txq)
2318 priv->txq = kzalloc(
2319 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2320 GFP_KERNEL);
2321 if (!priv->txq) {
91dd6c27 2322 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 2323 return -ENOMEM;
2324 }
2325 return 0;
2326}
2327EXPORT_SYMBOL(iwl_alloc_txq_mem);
2328
2329void iwl_free_txq_mem(struct iwl_priv *priv)
2330{
2331 kfree(priv->txq);
2332 priv->txq = NULL;
2333}
2334EXPORT_SYMBOL(iwl_free_txq_mem);
2335
20594eb0
WYG		 2336#ifdef CONFIG_IWLWIFI_DEBUGFS
2337
2338#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2339
2340void iwl_reset_traffic_log(struct iwl_priv *priv)
2341{
2342 priv->tx_traffic_idx = 0;
2343 priv->rx_traffic_idx = 0;
2344 if (priv->tx_traffic)
2345 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2346 if (priv->rx_traffic)
2347 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2348}
2349
2350int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2351{
2352 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2353
2354 if (iwl_debug_level & IWL_DL_TX) {
2355 if (!priv->tx_traffic) {
2356 priv->tx_traffic =
2357 kzalloc(traffic_size, GFP_KERNEL);
2358 if (!priv->tx_traffic)
2359 return -ENOMEM;
2360 }
2361 }
2362 if (iwl_debug_level & IWL_DL_RX) {
2363 if (!priv->rx_traffic) {
2364 priv->rx_traffic =
2365 kzalloc(traffic_size, GFP_KERNEL);
2366 if (!priv->rx_traffic)
2367 return -ENOMEM;
2368 }
2369 }
2370 iwl_reset_traffic_log(priv);
2371 return 0;
2372}
2373EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2374
2375void iwl_free_traffic_mem(struct iwl_priv *priv)
2376{
2377 kfree(priv->tx_traffic);
2378 priv->tx_traffic = NULL;
2379
2380 kfree(priv->rx_traffic);
2381 priv->rx_traffic = NULL;
2382}
2383EXPORT_SYMBOL(iwl_free_traffic_mem);
2384
2385void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2386 u16 length, struct ieee80211_hdr *header)
2387{
2388 __le16 fc;
2389 u16 len;
2390
2391 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2392 return;
2393
2394 if (!priv->tx_traffic)
2395 return;
2396
2397 fc = header->frame_control;
2398 if (ieee80211_is_data(fc)) {
2399 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2400 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2401 memcpy((priv->tx_traffic +
2402 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2403 header, len);
2404 priv->tx_traffic_idx =
2405 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2406 }
2407}
2408EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2409
2410void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2411 u16 length, struct ieee80211_hdr *header)
2412{
2413 __le16 fc;
2414 u16 len;
2415
2416 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2417 return;
2418
2419 if (!priv->rx_traffic)
2420 return;
2421
2422 fc = header->frame_control;
2423 if (ieee80211_is_data(fc)) {
2424 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2425 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2426 memcpy((priv->rx_traffic +
2427 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2428 header, len);
2429 priv->rx_traffic_idx =
2430 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2431 }
2432}
2433EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2434
2435const char *get_mgmt_string(int cmd)
2436{
2437 switch (cmd) {
2438 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2439 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2440 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2441 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2442 IWL_CMD(MANAGEMENT_PROBE_REQ);
2443 IWL_CMD(MANAGEMENT_PROBE_RESP);
2444 IWL_CMD(MANAGEMENT_BEACON);
2445 IWL_CMD(MANAGEMENT_ATIM);
2446 IWL_CMD(MANAGEMENT_DISASSOC);
2447 IWL_CMD(MANAGEMENT_AUTH);
2448 IWL_CMD(MANAGEMENT_DEAUTH);
2449 IWL_CMD(MANAGEMENT_ACTION);
2450 default:
2451 return "UNKNOWN";
2452
2453 }
2454}
2455
2456const char *get_ctrl_string(int cmd)
2457{
2458 switch (cmd) {
2459 IWL_CMD(CONTROL_BACK_REQ);
2460 IWL_CMD(CONTROL_BACK);
2461 IWL_CMD(CONTROL_PSPOLL);
2462 IWL_CMD(CONTROL_RTS);
2463 IWL_CMD(CONTROL_CTS);
2464 IWL_CMD(CONTROL_ACK);
2465 IWL_CMD(CONTROL_CFEND);
2466 IWL_CMD(CONTROL_CFENDACK);
2467 default:
2468 return "UNKNOWN";
2469
2470 }
2471}
2472
7163b8a4 2473void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 2474{
2475 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2476 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2477 priv->led_tpt = 0;
22fdf3c9
WYG		 2478}
2479
2480/*
2481 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2482 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2483 * Use debugFs to display the rx/rx_statistics
2484 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2485 * information will be recorded, but DATA pkt still will be recorded
2486 * for the reason of iwl_led.c need to control the led blinking based on
2487 * number of tx and rx data.
2488 *
2489 */
2490void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2491{
2492 struct traffic_stats *stats;
2493
2494 if (is_tx)
2495 stats = &priv->tx_stats;
2496 else
2497 stats = &priv->rx_stats;
2498
2499 if (ieee80211_is_mgmt(fc)) {
2500 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2501 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2502 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2503 break;
2504 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2505 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2506 break;
2507 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2508 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2509 break;
2510 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2511 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2512 break;
2513 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2514 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2515 break;
2516 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2517 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2518 break;
2519 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2520 stats->mgmt[MANAGEMENT_BEACON]++;
2521 break;
2522 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2523 stats->mgmt[MANAGEMENT_ATIM]++;
2524 break;
2525 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2526 stats->mgmt[MANAGEMENT_DISASSOC]++;
2527 break;
2528 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2529 stats->mgmt[MANAGEMENT_AUTH]++;
2530 break;
2531 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2532 stats->mgmt[MANAGEMENT_DEAUTH]++;
2533 break;
2534 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2535 stats->mgmt[MANAGEMENT_ACTION]++;
2536 break;
2537 }
2538 } else if (ieee80211_is_ctl(fc)) {
2539 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2540 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2541 stats->ctrl[CONTROL_BACK_REQ]++;
2542 break;
2543 case cpu_to_le16(IEEE80211_STYPE_BACK):
2544 stats->ctrl[CONTROL_BACK]++;
2545 break;
2546 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2547 stats->ctrl[CONTROL_PSPOLL]++;
2548 break;
2549 case cpu_to_le16(IEEE80211_STYPE_RTS):
2550 stats->ctrl[CONTROL_RTS]++;
2551 break;
2552 case cpu_to_le16(IEEE80211_STYPE_CTS):
2553 stats->ctrl[CONTROL_CTS]++;
2554 break;
2555 case cpu_to_le16(IEEE80211_STYPE_ACK):
2556 stats->ctrl[CONTROL_ACK]++;
2557 break;
2558 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2559 stats->ctrl[CONTROL_CFEND]++;
2560 break;
2561 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2562 stats->ctrl[CONTROL_CFENDACK]++;
2563 break;
2564 }
2565 } else {
2566 /* data */
2567 stats->data_cnt++;
2568 stats->data_bytes += len;
2569 }
d5f4cf71 2570 iwl_leds_background(priv);
22fdf3c9
WYG		 2571}
2572EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 2573#endif
2574
a0ea9493 2575static const char *get_csr_string(int cmd)
696bdee3
WYG		 2576{
2577 switch (cmd) {
2578 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2579 IWL_CMD(CSR_INT_COALESCING);
2580 IWL_CMD(CSR_INT);
2581 IWL_CMD(CSR_INT_MASK);
2582 IWL_CMD(CSR_FH_INT_STATUS);
2583 IWL_CMD(CSR_GPIO_IN);
2584 IWL_CMD(CSR_RESET);
2585 IWL_CMD(CSR_GP_CNTRL);
2586 IWL_CMD(CSR_HW_REV);
2587 IWL_CMD(CSR_EEPROM_REG);
2588 IWL_CMD(CSR_EEPROM_GP);
2589 IWL_CMD(CSR_OTP_GP_REG);
2590 IWL_CMD(CSR_GIO_REG);
2591 IWL_CMD(CSR_GP_UCODE_REG);
2592 IWL_CMD(CSR_GP_DRIVER_REG);
2593 IWL_CMD(CSR_UCODE_DRV_GP1);
2594 IWL_CMD(CSR_UCODE_DRV_GP2);
2595 IWL_CMD(CSR_LED_REG);
2596 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2597 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2598 IWL_CMD(CSR_ANA_PLL_CFG);
2599 IWL_CMD(CSR_HW_REV_WA_REG);
2600 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2601 default:
2602 return "UNKNOWN";
2603
2604 }
2605}
2606
2607void iwl_dump_csr(struct iwl_priv *priv)
2608{
2609 int i;
2610 u32 csr_tbl[] = {
2611 CSR_HW_IF_CONFIG_REG,
2612 CSR_INT_COALESCING,
2613 CSR_INT,
2614 CSR_INT_MASK,
2615 CSR_FH_INT_STATUS,
2616 CSR_GPIO_IN,
2617 CSR_RESET,
2618 CSR_GP_CNTRL,
2619 CSR_HW_REV,
2620 CSR_EEPROM_REG,
2621 CSR_EEPROM_GP,
2622 CSR_OTP_GP_REG,
2623 CSR_GIO_REG,
2624 CSR_GP_UCODE_REG,
2625 CSR_GP_DRIVER_REG,
2626 CSR_UCODE_DRV_GP1,
2627 CSR_UCODE_DRV_GP2,
2628 CSR_LED_REG,
2629 CSR_DRAM_INT_TBL_REG,
2630 CSR_GIO_CHICKEN_BITS,
2631 CSR_ANA_PLL_CFG,
2632 CSR_HW_REV_WA_REG,
2633 CSR_DBG_HPET_MEM_REG
2634 };
2635 IWL_ERR(priv, "CSR values:\n");
2636 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2637 "CSR_INT_PERIODIC_REG)\n");
2638 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2639 IWL_ERR(priv, " %25s: 0X%08x\n",
2640 get_csr_string(csr_tbl[i]),
2641 iwl_read32(priv, csr_tbl[i]));
2642 }
2643}
2644EXPORT_SYMBOL(iwl_dump_csr);
2645
a0ea9493 2646static const char *get_fh_string(int cmd)
1b3eb823
WYG		 2647{
2648 switch (cmd) {
2649 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2650 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2651 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2652 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2653 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2654 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2655 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2656 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2657 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2658 default:
2659 return "UNKNOWN";
2660
2661 }
2662}
2663
2664int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2665{
2666 int i;
2667#ifdef CONFIG_IWLWIFI_DEBUG
2668 int pos = 0;
2669 size_t bufsz = 0;
2670#endif
2671 u32 fh_tbl[] = {
2672 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2673 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2674 FH_RSCSR_CHNL0_WPTR,
2675 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2676 FH_MEM_RSSR_SHARED_CTRL_REG,
2677 FH_MEM_RSSR_RX_STATUS_REG,
2678 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2679 FH_TSSR_TX_STATUS_REG,
2680 FH_TSSR_TX_ERROR_REG
2681 };
2682#ifdef CONFIG_IWLWIFI_DEBUG
2683 if (display) {
2684 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2685 *buf = kmalloc(bufsz, GFP_KERNEL);
2686 if (!*buf)
2687 return -ENOMEM;
2688 pos += scnprintf(*buf + pos, bufsz - pos,
2689 "FH register values:\n");
2690 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2691 pos += scnprintf(*buf + pos, bufsz - pos,
2692 " %34s: 0X%08x\n",
2693 get_fh_string(fh_tbl[i]),
2694 iwl_read_direct32(priv, fh_tbl[i]));
2695 }
2696 return pos;
2697 }
2698#endif
2699 IWL_ERR(priv, "FH register values:\n");
2700 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2701 IWL_ERR(priv, " %34s: 0X%08x\n",
2702 get_fh_string(fh_tbl[i]),
2703 iwl_read_direct32(priv, fh_tbl[i]));
2704 }
2705 return 0;
2706}
2707EXPORT_SYMBOL(iwl_dump_fh);
2708
a93e7973 2709static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 2710{
2711 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2712 return;
2713
246ed355 2714 if (!iwl_is_any_associated(priv)) {
afbdd69a
WYG		 2715 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2716 return;
2717 }
2718 /*
2719 * There is no easy and better way to force reset the radio,
2720 * the only known method is switching channel which will force to
2721 * reset and tune the radio.
2722 * Use internal short scan (single channel) operation to should
2723 * achieve this objective.
2724 * Driver should reset the radio when number of consecutive missed
2725 * beacon, or any other uCode error condition detected.
2726 */
2727 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2728 iwl_internal_short_hw_scan(priv);
afbdd69a 2729}
a93e7973 2730
a93e7973 2731
c04f9f22 2732int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 2733{
8a472da4
WYG		 2734 struct iwl_force_reset *force_reset;
2735
a93e7973
WYG		 2736 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2737 return -EINVAL;
2738
7acc7c68
WYG		 2739 if (test_bit(STATUS_SCANNING, &priv->status)) {
2740 IWL_DEBUG_INFO(priv, "scan in progress.\n");
2741 return -EINVAL;
2742 }
2743
8a472da4
WYG		 2744 if (mode >= IWL_MAX_FORCE_RESET) {
2745 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2746 return -EINVAL;
2747 }
2748 force_reset = &priv->force_reset[mode];
2749 force_reset->reset_request_count++;
c04f9f22
WYG		 2750 if (!external) {
2751 if (force_reset->last_force_reset_jiffies &&
2752 time_after(force_reset->last_force_reset_jiffies +
2753 force_reset->reset_duration, jiffies)) {
2754 IWL_DEBUG_INFO(priv, "force reset rejected\n");
2755 force_reset->reset_reject_count++;
2756 return -EAGAIN;
2757 }
a93e7973 2758 }
8a472da4
WYG		 2759 force_reset->reset_success_count++;
2760 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2761 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 2762 switch (mode) {
2763 case IWL_RF_RESET:
2764 iwl_force_rf_reset(priv);
2765 break;
2766 case IWL_FW_RESET:
c04f9f22
WYG		 2767 /*
2768 * if the request is from external(ex: debugfs),
2769 * then always perform the request in regardless the module
2770 * parameter setting
2771 * if the request is from internal (uCode error or driver
2772 * detect failure), then fw_restart module parameter
2773 * need to be check before performing firmware reload
2774 */
2775 if (!external && !priv->cfg->mod_params->restart_fw) {
2776 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
2777 "module parameter setting\n");
2778 break;
2779 }
a93e7973
WYG		 2780 IWL_ERR(priv, "On demand firmware reload\n");
2781 /* Set the FW error flag -- cleared on iwl_down */
2782 set_bit(STATUS_FW_ERROR, &priv->status);
2783 wake_up_interruptible(&priv->wait_command_queue);
2784 /*
2785 * Keep the restart process from trying to send host
2786 * commands by clearing the INIT status bit
2787 */
2788 clear_bit(STATUS_READY, &priv->status);
2789 queue_work(priv->workqueue, &priv->restart);
2790 break;
a93e7973 2791 }
a93e7973
WYG		 2792 return 0;
2793}
b74e31a9
WYG		 2794EXPORT_SYMBOL(iwl_force_reset);
2795
2796/**
2797 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2798 *
2799 * During normal condition (no queue is stuck), the timer is continually set to
2800 * execute every monitor_recover_period milliseconds after the last timer
2801 * expired. When the queue read_ptr is at the same place, the timer is
2802 * shorten to 100mSecs. This is
2803 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2804 * 2) to detect the stuck queues quicker before the station and AP can
2805 * disassociate each other.
2806 *
2807 * This function monitors all the tx queues and recover from it if any
2808 * of the queues are stuck.
2809 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2810 * it will recover by resetting the firmware and return.
2811 * 2. Then, it checks for station association. If it associates it will check
2812 * other queues. If any queue is stuck, it will recover by resetting
2813 * the firmware.
2814 * Note: It the number of times the queue read_ptr to be at the same place to
2815 * be MAX_REPEAT+1 in order to consider to be stuck.
2816 */
2817/*
2818 * The maximum number of times the read pointer of the tx queue at the
2819 * same place without considering to be stuck.
2820 */
2821#define MAX_REPEAT (2)
2822static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2823{
2824 struct iwl_tx_queue *txq;
2825 struct iwl_queue *q;
2826
2827 txq = &priv->txq[cnt];
2828 q = &txq->q;
2829 /* queue is empty, skip */
2830 if (q->read_ptr != q->write_ptr) {
2831 if (q->read_ptr == q->last_read_ptr) {
2832 /* a queue has not been read from last time */
2833 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2834 IWL_ERR(priv,
2835 "queue %d stuck %d time. Fw reload.\n",
2836 q->id, q->repeat_same_read_ptr);
2837 q->repeat_same_read_ptr = 0;
c04f9f22 2838 iwl_force_reset(priv, IWL_FW_RESET, false);
b74e31a9
WYG		 2839 } else {
2840 q->repeat_same_read_ptr++;
2841 IWL_DEBUG_RADIO(priv,
2842 "queue %d, not read %d time\n",
2843 q->id,
2844 q->repeat_same_read_ptr);
74e5c41b
WYG		 2845 if (!priv->cfg->advanced_bt_coexist) {
2846 mod_timer(&priv->monitor_recover,
2847 jiffies + msecs_to_jiffies(
2848 IWL_ONE_HUNDRED_MSECS));
2849 return 1;
2850 }
b74e31a9 2851 }
74e5c41b 2852 return 0;
b74e31a9
WYG		 2853 } else {
2854 q->last_read_ptr = q->read_ptr;
2855 q->repeat_same_read_ptr = 0;
2856 }
2857 }
2858 return 0;
2859}
2860
2861void iwl_bg_monitor_recover(unsigned long data)
2862{
2863 struct iwl_priv *priv = (struct iwl_priv *)data;
2864 int cnt;
2865
2866 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2867 return;
2868
2869 /* monitor and check for stuck cmd queue */
13bb9483 2870 if (iwl_check_stuck_queue(priv, priv->cmd_queue))
b74e31a9
WYG		 2871 return;
2872
2873 /* monitor and check for other stuck queues */
246ed355 2874 if (iwl_is_any_associated(priv)) {
b74e31a9
WYG		 2875 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2876 /* skip as we already checked the command queue */
13bb9483 2877 if (cnt == priv->cmd_queue)
b74e31a9
WYG		 2878 continue;
2879 if (iwl_check_stuck_queue(priv, cnt))
2880 return;
2881 }
2882 }
7bdc473c
WYG		 2883 if (priv->cfg->monitor_recover_period) {
2884 /*
2885 * Reschedule the timer to occur in
2886 * priv->cfg->monitor_recover_period
2887 */
2888 mod_timer(&priv->monitor_recover, jiffies + msecs_to_jiffies(
2889 priv->cfg->monitor_recover_period));
2890 }
b74e31a9
WYG		 2891}
2892EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2893
a0ee74cf
WYG		 2894
2895/*
2896 * extended beacon time format
2897 * time in usec will be changed into a 32-bit value in extended:internal format
2898 * the extended part is the beacon counts
2899 * the internal part is the time in usec within one beacon interval
2900 */
2901u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
2902{
2903 u32 quot;
2904 u32 rem;
2905 u32 interval = beacon_interval * TIME_UNIT;
2906
2907 if (!interval || !usec)
2908 return 0;
2909
2910 quot = (usec / interval) &
2911 (iwl_beacon_time_mask_high(priv,
2912 priv->hw_params.beacon_time_tsf_bits) >>
2913 priv->hw_params.beacon_time_tsf_bits);
2914 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
2915 priv->hw_params.beacon_time_tsf_bits);
2916
2917 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
2918}
2919EXPORT_SYMBOL(iwl_usecs_to_beacons);
2920
2921/* base is usually what we get from ucode with each received frame,
2922 * the same as HW timer counter counting down
2923 */
2924__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
2925 u32 addon, u32 beacon_interval)
2926{
2927 u32 base_low = base & iwl_beacon_time_mask_low(priv,
2928 priv->hw_params.beacon_time_tsf_bits);
2929 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
2930 priv->hw_params.beacon_time_tsf_bits);
2931 u32 interval = beacon_interval * TIME_UNIT;
2932 u32 res = (base & iwl_beacon_time_mask_high(priv,
2933 priv->hw_params.beacon_time_tsf_bits)) +
2934 (addon & iwl_beacon_time_mask_high(priv,
2935 priv->hw_params.beacon_time_tsf_bits));
2936
2937 if (base_low > addon_low)
2938 res += base_low - addon_low;
2939 else if (base_low < addon_low) {
2940 res += interval + base_low - addon_low;
2941 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2942 } else
2943 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2944
2945 return cpu_to_le32(res);
2946}
2947EXPORT_SYMBOL(iwl_add_beacon_time);
2948
6da3a13e
WYG		 2949#ifdef CONFIG_PM
2950
2951int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2952{
2953 struct iwl_priv *priv = pci_get_drvdata(pdev);
2954
2955 /*
2956 * This function is called when system goes into suspend state
2957 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2958 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2959 * it will not call apm_ops.stop() to stop the DMA operation.
2960 * Calling apm_ops.stop here to make sure we stop the DMA.
2961 */
2962 priv->cfg->ops->lib->apm_ops.stop(priv);
2963
2964 pci_save_state(pdev);
2965 pci_disable_device(pdev);
2966 pci_set_power_state(pdev, PCI_D3hot);
2967
2968 return 0;
2969}
2970EXPORT_SYMBOL(iwl_pci_suspend);
2971
2972int iwl_pci_resume(struct pci_dev *pdev)
2973{
2974 struct iwl_priv *priv = pci_get_drvdata(pdev);
2975 int ret;
0ab84cff 2976 bool hw_rfkill = false;
6da3a13e 2977
cd398c31
AK		 2978 /*
2979 * We disable the RETRY_TIMEOUT register (0x41) to keep
2980 * PCI Tx retries from interfering with C3 CPU state.
2981 */
2982 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2983
6da3a13e
WYG		 2984 pci_set_power_state(pdev, PCI_D0);
2985 ret = pci_enable_device(pdev);
2986 if (ret)
2987 return ret;
2988 pci_restore_state(pdev);
2989 iwl_enable_interrupts(priv);
2990
0ab84cff
JB		 2991 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
2992 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
2993 hw_rfkill = true;
2994
2995 if (hw_rfkill)
2996 set_bit(STATUS_RF_KILL_HW, &priv->status);
2997 else
2998 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2999
3000 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
3001
6da3a13e
WYG		 3002 return 0;
3003}
3004EXPORT_SYMBOL(iwl_pci_resume);
3005
3006#endif /* CONFIG_PM */
Clone of davem's net-next-2.6 tree