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iwlwifi: replace magic constants with define
[net-next-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
b481de9c
ZY		 32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
b481de9c
ZY		 40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
b481de9c
ZY		 43#include <net/mac80211.h>
44
45#include <asm/div64.h>
46
6bc913bd 47#include "iwl-eeprom.h"
3e0d4cb1 48#include "iwl-dev.h"
fee1247a 49#include "iwl-core.h"
3395f6e9 50#include "iwl-io.h"
b481de9c 51#include "iwl-helpers.h"
6974e363 52#include "iwl-sta.h"
f0832f13 53#include "iwl-calib.h"
b481de9c 54
416e1438 55
b481de9c
ZY		 56/******************************************************************************
57 *
58 * module boiler plate
59 *
60 ******************************************************************************/
61
b481de9c
ZY		 62/*
63 * module name, copyright, version, etc.
64 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
65 */
66
d783b061 67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 70#define VD "d"
71#else
72#define VD
73#endif
74
4fc22b21 75#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY		 76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
b481de9c
ZY		 83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
86MODULE_AUTHOR(DRV_COPYRIGHT);
87MODULE_LICENSE("GPL");
4fc22b21 88MODULE_ALIAS("iwl4965");
b481de9c 89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97
b481de9c 98
5b9f8cd3 99static void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
deb09c43 100{
c1adf9fb 101 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
deb09c43
EG		 102
103 if (hw_decrypt)
104 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
105 else
106 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
107
108}
109
b481de9c 110/**
5b9f8cd3 111 * iwl_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY		 112 *
113 * NOTE: This is really only useful during development and can eventually
114 * be #ifdef'd out once the driver is stable and folks aren't actively
115 * making changes
116 */
5b9f8cd3 117static int iwl_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
b481de9c
ZY		 118{
119 int error = 0;
120 int counter = 1;
121
122 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
123 error |= le32_to_cpu(rxon->flags &
124 (RXON_FLG_TGJ_NARROW_BAND_MSK |
125 RXON_FLG_RADAR_DETECT_MSK));
126 if (error)
127 IWL_WARNING("check 24G fields %d | %d\n",
128 counter++, error);
129 } else {
130 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
131 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
132 if (error)
133 IWL_WARNING("check 52 fields %d | %d\n",
134 counter++, error);
135 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
136 if (error)
137 IWL_WARNING("check 52 CCK %d | %d\n",
138 counter++, error);
139 }
140 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
141 if (error)
142 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
143
144 /* make sure basic rates 6Mbps and 1Mbps are supported */
145 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
146 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
147 if (error)
148 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
149
150 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
151 if (error)
152 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
153
154 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
155 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
156 if (error)
157 IWL_WARNING("check CCK and short slot %d | %d\n",
158 counter++, error);
159
160 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
161 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
162 if (error)
163 IWL_WARNING("check CCK & auto detect %d | %d\n",
164 counter++, error);
165
166 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
167 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
168 if (error)
169 IWL_WARNING("check TGG and auto detect %d | %d\n",
170 counter++, error);
171
172 if (error)
173 IWL_WARNING("Tuning to channel %d\n",
174 le16_to_cpu(rxon->channel));
175
176 if (error) {
5b9f8cd3 177 IWL_ERROR("Not a valid iwl_rxon_assoc_cmd field values\n");
b481de9c
ZY		 178 return -1;
179 }
180 return 0;
181}
182
183/**
54559703 184 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 185 * @priv: staging_rxon is compared to active_rxon
b481de9c 186 *
9fbab516
BC		 187 * If the RXON structure is changing enough to require a new tune,
188 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
189 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 190 */
54559703 191static int iwl_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY		 192{
193
194 /* These items are only settable from the full RXON command */
5d1e2325 195 if (!(iwl_is_associated(priv)) ||
b481de9c
ZY		 196 compare_ether_addr(priv->staging_rxon.bssid_addr,
197 priv->active_rxon.bssid_addr) ||
198 compare_ether_addr(priv->staging_rxon.node_addr,
199 priv->active_rxon.node_addr) ||
200 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
201 priv->active_rxon.wlap_bssid_addr) ||
202 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
203 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
204 (priv->staging_rxon.air_propagation !=
205 priv->active_rxon.air_propagation) ||
206 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
207 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
208 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
209 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
b481de9c
ZY		 210 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
211 return 1;
212
213 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
214 * be updated with the RXON_ASSOC command -- however only some
215 * flag transitions are allowed using RXON_ASSOC */
216
217 /* Check if we are not switching bands */
218 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
219 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
220 return 1;
221
222 /* Check if we are switching association toggle */
223 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
224 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
225 return 1;
226
227 return 0;
228}
229
b481de9c 230/**
5b9f8cd3 231 * iwl_commit_rxon - commit staging_rxon to hardware
b481de9c 232 *
01ebd063 233 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 234 * the active_rxon structure is updated with the new data. This
235 * function correctly transitions out of the RXON_ASSOC_MSK state if
236 * a HW tune is required based on the RXON structure changes.
237 */
5b9f8cd3 238static int iwl_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY		 239{
240 /* cast away the const for active_rxon in this function */
c1adf9fb 241 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
43d59b32
EG		 242 int ret;
243 bool new_assoc =
244 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 245
fee1247a 246 if (!iwl_is_alive(priv))
43d59b32 247 return -EBUSY;
b481de9c
ZY		 248
249 /* always get timestamp with Rx frame */
250 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG		 251 /* allow CTS-to-self if possible. this is relevant only for
252 * 5000, but will not damage 4965 */
253 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 254
5b9f8cd3 255 ret = iwl_check_rxon_cmd(&priv->staging_rxon);
43d59b32 256 if (ret) {
b481de9c
ZY		 257 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
258 return -EINVAL;
259 }
260
261 /* If we don't need to send a full RXON, we can use
5b9f8cd3 262 * iwl_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 263 * and other flags for the current radio configuration. */
54559703 264 if (!iwl_full_rxon_required(priv)) {
43d59b32
EG		 265 ret = iwl_send_rxon_assoc(priv);
266 if (ret) {
267 IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret);
268 return ret;
b481de9c
ZY		 269 }
270
271 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 272 return 0;
273 }
274
275 /* station table will be cleared */
276 priv->assoc_station_added = 0;
277
b481de9c
ZY		 278 /* If we are currently associated and the new config requires
279 * an RXON_ASSOC and the new config wants the associated mask enabled,
280 * we must clear the associated from the active configuration
281 * before we apply the new config */
43d59b32 282 if (iwl_is_associated(priv) && new_assoc) {
b481de9c
ZY		 283 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
284 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
285
43d59b32 286 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 287 sizeof(struct iwl_rxon_cmd),
b481de9c
ZY		 288 &priv->active_rxon);
289
290 /* If the mask clearing failed then we set
291 * active_rxon back to what it was previously */
43d59b32 292 if (ret) {
b481de9c 293 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
43d59b32
EG		 294 IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret);
295 return ret;
b481de9c 296 }
b481de9c
ZY		 297 }
298
299 IWL_DEBUG_INFO("Sending RXON\n"
300 "* with%s RXON_FILTER_ASSOC_MSK\n"
301 "* channel = %d\n"
e174961c 302 "* bssid = %pM\n",
43d59b32 303 (new_assoc ? "" : "out"),
b481de9c 304 le16_to_cpu(priv->staging_rxon.channel),
e174961c 305 priv->staging_rxon.bssid_addr);
b481de9c 306
5b9f8cd3 307 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG		 308
309 /* Apply the new configuration
310 * RXON unassoc clears the station table in uCode, send it before
311 * we add the bcast station. If assoc bit is set, we will send RXON
312 * after having added the bcast and bssid station.
313 */
314 if (!new_assoc) {
315 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 316 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32
EG		 317 if (ret) {
318 IWL_ERROR("Error setting new RXON (%d)\n", ret);
319 return ret;
320 }
321 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 322 }
323
37deb2a0 324 iwl_clear_stations_table(priv);
556f8db7 325
b481de9c
ZY		 326 if (!priv->error_recovering)
327 priv->start_calib = 0;
328
b481de9c 329 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 330 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 331 IWL_INVALID_STATION) {
b481de9c
ZY		 332 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
333 return -EIO;
334 }
335
336 /* If we have set the ASSOC_MSK and we are in BSS mode then
337 * add the IWL_AP_ID to the station rate table */
9185159d 338 if (new_assoc) {
05c914fe 339 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
9185159d
TW		 340 ret = iwl_rxon_add_station(priv,
341 priv->active_rxon.bssid_addr, 1);
342 if (ret == IWL_INVALID_STATION) {
343 IWL_ERROR("Error adding AP address for TX.\n");
344 return -EIO;
345 }
346 priv->assoc_station_added = 1;
347 if (priv->default_wep_key &&
348 iwl_send_static_wepkey_cmd(priv, 0))
349 IWL_ERROR("Could not send WEP static key.\n");
b481de9c 350 }
43d59b32
EG		 351
352 /* Apply the new configuration
353 * RXON assoc doesn't clear the station table in uCode,
354 */
355 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
356 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
357 if (ret) {
358 IWL_ERROR("Error setting new RXON (%d)\n", ret);
359 return ret;
360 }
361 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 362 }
363
36da7d70
ZY		 364 iwl_init_sensitivity(priv);
365
366 /* If we issue a new RXON command which required a tune then we must
367 * send a new TXPOWER command or we won't be able to Tx any frames */
368 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
369 if (ret) {
370 IWL_ERROR("Error sending TX power (%d)\n", ret);
371 return ret;
372 }
373
b481de9c
ZY		 374 return 0;
375}
376
5b9f8cd3 377void iwl_update_chain_flags(struct iwl_priv *priv)
5da4b55f
MA		 378{
379
c7de35cd 380 iwl_set_rxon_chain(priv);
5b9f8cd3 381 iwl_commit_rxon(priv);
5da4b55f
MA		 382}
383
5b9f8cd3 384static int iwl_send_bt_config(struct iwl_priv *priv)
b481de9c 385{
bb8c093b 386 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY		 387 .flags = 3,
388 .lead_time = 0xAA,
389 .max_kill = 1,
390 .kill_ack_mask = 0,
391 .kill_cts_mask = 0,
392 };
393
857485c0 394 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 395 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY		 396}
397
fcab423d 398static void iwl_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY		 399{
400 struct list_head *element;
401
402 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
403 priv->frames_count);
404
405 while (!list_empty(&priv->free_frames)) {
406 element = priv->free_frames.next;
407 list_del(element);
fcab423d 408 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
ZY		 409 priv->frames_count--;
410 }
411
412 if (priv->frames_count) {
413 IWL_WARNING("%d frames still in use. Did we lose one?\n",
414 priv->frames_count);
415 priv->frames_count = 0;
416 }
417}
418
fcab423d 419static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 420{
fcab423d 421 struct iwl_frame *frame;
b481de9c
ZY		 422 struct list_head *element;
423 if (list_empty(&priv->free_frames)) {
424 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
425 if (!frame) {
426 IWL_ERROR("Could not allocate frame!\n");
427 return NULL;
428 }
429
430 priv->frames_count++;
431 return frame;
432 }
433
434 element = priv->free_frames.next;
435 list_del(element);
fcab423d 436 return list_entry(element, struct iwl_frame, list);
b481de9c
ZY		 437}
438
fcab423d 439static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
b481de9c
ZY		 440{
441 memset(frame, 0, sizeof(*frame));
442 list_add(&frame->list, &priv->free_frames);
443}
444
4bf64efd
TW		 445static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
446 struct ieee80211_hdr *hdr,
447 const u8 *dest, int left)
b481de9c 448{
3109ece1 449 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB		 450 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
451 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
ZY		 452 return 0;
453
454 if (priv->ibss_beacon->len > left)
455 return 0;
456
457 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
458
459 return priv->ibss_beacon->len;
460}
461
5b9f8cd3 462static u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 463{
39e88504
GC		 464 int i;
465 int rate_mask;
466
467 /* Set rate mask*/
468 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
dbce56a4 469 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
39e88504 470 else
dbce56a4 471 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
b481de9c 472
39e88504 473 /* Find lowest valid rate */
b481de9c 474 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1826dcc0 475 i = iwl_rates[i].next_ieee) {
b481de9c 476 if (rate_mask & (1 << i))
1826dcc0 477 return iwl_rates[i].plcp;
b481de9c
ZY		 478 }
479
39e88504
GC		 480 /* No valid rate was found. Assign the lowest one */
481 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
482 return IWL_RATE_1M_PLCP;
483 else
484 return IWL_RATE_6M_PLCP;
b481de9c
ZY		 485}
486
5b9f8cd3 487static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
4bf64efd
TW		 488 struct iwl_frame *frame, u8 rate)
489{
490 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
491 unsigned int frame_size;
492
493 tx_beacon_cmd = &frame->u.beacon;
494 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
495
496 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
497 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
498
499 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
500 iwl_bcast_addr,
501 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
502
503 BUG_ON(frame_size > MAX_MPDU_SIZE);
504 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
505
506 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
507 tx_beacon_cmd->tx.rate_n_flags =
508 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
509 else
510 tx_beacon_cmd->tx.rate_n_flags =
511 iwl_hw_set_rate_n_flags(rate, 0);
512
513 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
514 TX_CMD_FLG_TSF_MSK |
515 TX_CMD_FLG_STA_RATE_MSK;
516
517 return sizeof(*tx_beacon_cmd) + frame_size;
518}
5b9f8cd3 519static int iwl_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 520{
fcab423d 521 struct iwl_frame *frame;
b481de9c
ZY		 522 unsigned int frame_size;
523 int rc;
524 u8 rate;
525
fcab423d 526 frame = iwl_get_free_frame(priv);
b481de9c
ZY		 527
528 if (!frame) {
529 IWL_ERROR("Could not obtain free frame buffer for beacon "
530 "command.\n");
531 return -ENOMEM;
532 }
533
5b9f8cd3 534 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 535
5b9f8cd3 536 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 537
857485c0 538 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 539 &frame->u.cmd[0]);
540
fcab423d 541 iwl_free_frame(priv, frame);
b481de9c
ZY		 542
543 return rc;
544}
545
b481de9c
ZY		 546/******************************************************************************
547 *
548 * Misc. internal state and helper functions
549 *
550 ******************************************************************************/
b481de9c 551
5b9f8cd3 552static void iwl_ht_conf(struct iwl_priv *priv,
d1141dfb
EG		 553 struct ieee80211_bss_conf *bss_conf)
554{
ae5eb026 555 struct ieee80211_sta_ht_cap *ht_conf;
d1141dfb 556 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
ae5eb026 557 struct ieee80211_sta *sta;
d1141dfb
EG		 558
559 IWL_DEBUG_MAC80211("enter: \n");
560
d1141dfb
EG		 561 if (!iwl_conf->is_ht)
562 return;
563
ae5eb026
JB		 564
565 /*
566 * It is totally wrong to base global information on something
567 * that is valid only when associated, alas, this driver works
568 * that way and I don't know how to fix it.
569 */
570
571 rcu_read_lock();
572 sta = ieee80211_find_sta(priv->hw, priv->bssid);
573 if (!sta) {
574 rcu_read_unlock();
575 return;
576 }
577 ht_conf = &sta->ht_cap;
578
d1141dfb 579 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 580 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 581 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 582 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG		 583
584 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
585 iwl_conf->max_amsdu_size =
586 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
587
588 iwl_conf->supported_chan_width =
d9fe60de 589 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
ae5eb026
JB		 590
591 iwl_conf->extension_chan_offset = bss_conf->ht.secondary_channel_offset;
d1141dfb 592 /* If no above or below channel supplied disable FAT channel */
d9fe60de
JB		 593 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
594 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW) {
595 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
d1141dfb 596 iwl_conf->supported_chan_width = 0;
963f5517 597 }
d1141dfb 598
12837be1
RR		 599 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
600
d9fe60de 601 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
d1141dfb 602
ae5eb026 603 iwl_conf->tx_chan_width = bss_conf->ht.width_40_ok;
d1141dfb 604 iwl_conf->ht_protection =
ae5eb026 605 bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
d1141dfb 606 iwl_conf->non_GF_STA_present =
ae5eb026
JB		 607 !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
608
609 rcu_read_unlock();
d1141dfb 610
d1141dfb
EG		 611 IWL_DEBUG_MAC80211("leave\n");
612}
613
b481de9c
ZY		 614/*
615 * QoS support
616*/
1ff50bda 617static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c 618{
b481de9c
ZY		 619 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
620 return;
621
622 if (!priv->qos_data.qos_enable)
623 return;
624
b481de9c
ZY		 625 priv->qos_data.def_qos_parm.qos_flags = 0;
626
627 if (priv->qos_data.qos_cap.q_AP.queue_request &&
628 !priv->qos_data.qos_cap.q_AP.txop_request)
629 priv->qos_data.def_qos_parm.qos_flags |=
630 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 631 if (priv->qos_data.qos_active)
632 priv->qos_data.def_qos_parm.qos_flags |=
633 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
634
fd105e79 635 if (priv->current_ht_config.is_ht)
f1f1f5c7 636 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 637
3109ece1 638 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW		 639 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
640 priv->qos_data.qos_active,
641 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 642
1ff50bda
EG		 643 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
644 sizeof(struct iwl_qosparam_cmd),
645 &priv->qos_data.def_qos_parm, NULL);
b481de9c
ZY		 646 }
647}
648
b481de9c 649#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 650
3195c1f3 651static u16 iwl_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 652{
653 u16 new_val = 0;
654 u16 beacon_factor = 0;
655
3195c1f3
TW		 656 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
657 / MAX_UCODE_BEACON_INTERVAL;
b481de9c
ZY		 658 new_val = beacon_val / beacon_factor;
659
3195c1f3 660 return new_val;
b481de9c
ZY		 661}
662
3195c1f3 663static void iwl_setup_rxon_timing(struct iwl_priv *priv)
b481de9c 664{
3195c1f3
TW		 665 u64 tsf;
666 s32 interval_tm, rem;
b481de9c
ZY		 667 unsigned long flags;
668 struct ieee80211_conf *conf = NULL;
669 u16 beacon_int = 0;
670
671 conf = ieee80211_get_hw_conf(priv->hw);
672
673 spin_lock_irqsave(&priv->lock, flags);
3195c1f3 674 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b5d7be5e 675 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 676
05c914fe 677 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
3195c1f3 678 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
b481de9c
ZY		 679 priv->rxon_timing.atim_window = 0;
680 } else {
3195c1f3
TW		 681 beacon_int = iwl_adjust_beacon_interval(conf->beacon_int);
682
b481de9c
ZY		 683 /* TODO: we need to get atim_window from upper stack
684 * for now we set to 0 */
685 priv->rxon_timing.atim_window = 0;
686 }
687
3195c1f3 688 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
b481de9c 689
3195c1f3
TW		 690 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
691 interval_tm = beacon_int * 1024;
692 rem = do_div(tsf, interval_tm);
693 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
694
695 spin_unlock_irqrestore(&priv->lock, flags);
696 IWL_DEBUG_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
697 le16_to_cpu(priv->rxon_timing.beacon_interval),
698 le32_to_cpu(priv->rxon_timing.beacon_init_val),
699 le16_to_cpu(priv->rxon_timing.atim_window));
b481de9c
ZY		 700}
701
82a66bbb
TW		 702static void iwl_set_flags_for_band(struct iwl_priv *priv,
703 enum ieee80211_band band)
b481de9c 704{
8318d78a 705 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY		 706 priv->staging_rxon.flags &=
707 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
708 | RXON_FLG_CCK_MSK);
709 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
710 } else {
5b9f8cd3 711 /* Copied from iwl_post_associate() */
b481de9c
ZY		 712 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
713 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
714 else
715 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
716
05c914fe 717 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 718 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
719
720 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
721 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
722 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
723 }
724}
725
726/*
01ebd063 727 * initialize rxon structure with default values from eeprom
b481de9c 728 */
5b9f8cd3 729static void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
b481de9c 730{
bf85ea4f 731 const struct iwl_channel_info *ch_info;
b481de9c
ZY		 732
733 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
734
60294de3 735 switch (mode) {
05c914fe 736 case NL80211_IFTYPE_AP:
b481de9c
ZY		 737 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
738 break;
739
05c914fe 740 case NL80211_IFTYPE_STATION:
b481de9c
ZY		 741 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
742 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
743 break;
744
05c914fe 745 case NL80211_IFTYPE_ADHOC:
b481de9c
ZY		 746 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
747 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
748 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
749 RXON_FILTER_ACCEPT_GRP_MSK;
750 break;
751
05c914fe 752 case NL80211_IFTYPE_MONITOR:
b481de9c
ZY		 753 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
754 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
755 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
756 break;
69dc5d9d 757 default:
60294de3 758 IWL_ERROR("Unsupported interface type %d\n", mode);
69dc5d9d 759 break;
b481de9c
ZY		 760 }
761
762#if 0
763 /* TODO: Figure out when short_preamble would be set and cache from
764 * that */
765 if (!hw_to_local(priv->hw)->short_preamble)
766 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
767 else
768 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
769#endif
770
8622e705 771 ch_info = iwl_get_channel_info(priv, priv->band,
25b3f57c 772 le16_to_cpu(priv->active_rxon.channel));
b481de9c
ZY		 773
774 if (!ch_info)
775 ch_info = &priv->channel_info[0];
776
777 /*
778 * in some case A channels are all non IBSS
779 * in this case force B/G channel
780 */
05c914fe 781 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
b481de9c
ZY		 782 !(is_channel_ibss(ch_info)))
783 ch_info = &priv->channel_info[0];
784
785 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 786 priv->band = ch_info->band;
b481de9c 787
82a66bbb 788 iwl_set_flags_for_band(priv, priv->band);
b481de9c
ZY		 789
790 priv->staging_rxon.ofdm_basic_rates =
791 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
792 priv->staging_rxon.cck_basic_rates =
793 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
794
795 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
796 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
797 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
798 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
799 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
800 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 801 iwl_set_rxon_chain(priv);
b481de9c
ZY		 802}
803
5b9f8cd3 804static int iwl_set_mode(struct iwl_priv *priv, int mode)
b481de9c 805{
5b9f8cd3 806 iwl_connection_init_rx_config(priv, mode);
b481de9c
ZY		 807 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
808
37deb2a0 809 iwl_clear_stations_table(priv);
b481de9c 810
fde3571f 811 /* dont commit rxon if rf-kill is on*/
fee1247a 812 if (!iwl_is_ready_rf(priv))
fde3571f
MA		 813 return -EAGAIN;
814
815 cancel_delayed_work(&priv->scan_check);
2a421b91 816 if (iwl_scan_cancel_timeout(priv, 100)) {
fde3571f
MA		 817 IWL_WARNING("Aborted scan still in progress after 100ms\n");
818 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
819 return -EAGAIN;
820 }
821
5b9f8cd3 822 iwl_commit_rxon(priv);
b481de9c
ZY		 823
824 return 0;
825}
826
5b9f8cd3 827static void iwl_set_rate(struct iwl_priv *priv)
b481de9c 828{
8318d78a 829 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY		 830 struct ieee80211_rate *rate;
831 int i;
832
d1141dfb 833 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA		 834 if (!hw) {
835 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
836 return;
837 }
b481de9c
ZY		 838
839 priv->active_rate = 0;
840 priv->active_rate_basic = 0;
841
8318d78a
JB		 842 for (i = 0; i < hw->n_bitrates; i++) {
843 rate = &(hw->bitrates[i]);
844 if (rate->hw_value < IWL_RATE_COUNT)
845 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY		 846 }
847
848 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
849 priv->active_rate, priv->active_rate_basic);
850
851 /*
852 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
853 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
854 * OFDM
855 */
856 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
857 priv->staging_rxon.cck_basic_rates =
858 ((priv->active_rate_basic &
859 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
860 else
861 priv->staging_rxon.cck_basic_rates =
862 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
863
864 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
865 priv->staging_rxon.ofdm_basic_rates =
866 ((priv->active_rate_basic &
867 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
868 IWL_FIRST_OFDM_RATE) & 0xFF;
869 else
870 priv->staging_rxon.ofdm_basic_rates =
871 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
872}
873
b481de9c 874
b481de9c
ZY		 875/******************************************************************************
876 *
877 * Generic RX handler implementations
878 *
879 ******************************************************************************/
885ba202
TW		 880static void iwl_rx_reply_alive(struct iwl_priv *priv,
881 struct iwl_rx_mem_buffer *rxb)
b481de9c 882{
db11d634 883 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 884 struct iwl_alive_resp *palive;
b481de9c
ZY		 885 struct delayed_work *pwork;
886
887 palive = &pkt->u.alive_frame;
888
889 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
890 "0x%01X 0x%01X\n",
891 palive->is_valid, palive->ver_type,
892 palive->ver_subtype);
893
894 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
895 IWL_DEBUG_INFO("Initialization Alive received.\n");
896 memcpy(&priv->card_alive_init,
897 &pkt->u.alive_frame,
885ba202 898 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY		 899 pwork = &priv->init_alive_start;
900 } else {
901 IWL_DEBUG_INFO("Runtime Alive received.\n");
902 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 903 sizeof(struct iwl_alive_resp));
b481de9c
ZY		 904 pwork = &priv->alive_start;
905 }
906
907 /* We delay the ALIVE response by 5ms to
908 * give the HW RF Kill time to activate... */
909 if (palive->is_valid == UCODE_VALID_OK)
910 queue_delayed_work(priv->workqueue, pwork,
911 msecs_to_jiffies(5));
912 else
913 IWL_WARNING("uCode did not respond OK.\n");
914}
915
5b9f8cd3 916static void iwl_rx_reply_error(struct iwl_priv *priv,
a55360e4 917 struct iwl_rx_mem_buffer *rxb)
b481de9c 918{
db11d634 919 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 920
921 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
922 "seq 0x%04X ser 0x%08X\n",
923 le32_to_cpu(pkt->u.err_resp.error_type),
924 get_cmd_string(pkt->u.err_resp.cmd_id),
925 pkt->u.err_resp.cmd_id,
926 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
927 le32_to_cpu(pkt->u.err_resp.error_info));
928}
929
930#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
931
5b9f8cd3 932static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
b481de9c 933{
db11d634 934 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
c1adf9fb 935 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
bb8c093b 936 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY		 937 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
938 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
939 rxon->channel = csa->channel;
940 priv->staging_rxon.channel = csa->channel;
941}
942
5b9f8cd3 943static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 944 struct iwl_rx_mem_buffer *rxb)
b481de9c 945{
0a6857e7 946#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 947 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 948 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY		 949 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
950 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
951#endif
952}
953
5b9f8cd3 954static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 955 struct iwl_rx_mem_buffer *rxb)
b481de9c 956{
db11d634 957 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 958 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
959 "notification for %s:\n",
960 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 961 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY		 962}
963
5b9f8cd3 964static void iwl_bg_beacon_update(struct work_struct *work)
b481de9c 965{
c79dd5b5
TW		 966 struct iwl_priv *priv =
967 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY		 968 struct sk_buff *beacon;
969
970 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 971 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY		 972
973 if (!beacon) {
974 IWL_ERROR("update beacon failed\n");
975 return;
976 }
977
978 mutex_lock(&priv->mutex);
979 /* new beacon skb is allocated every time; dispose previous.*/
980 if (priv->ibss_beacon)
981 dev_kfree_skb(priv->ibss_beacon);
982
983 priv->ibss_beacon = beacon;
984 mutex_unlock(&priv->mutex);
985
5b9f8cd3 986 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 987}
988
4e39317d 989/**
5b9f8cd3 990 * iwl_bg_statistics_periodic - Timer callback to queue statistics
4e39317d
EG		 991 *
992 * This callback is provided in order to send a statistics request.
993 *
994 * This timer function is continually reset to execute within
995 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
996 * was received. We need to ensure we receive the statistics in order
997 * to update the temperature used for calibrating the TXPOWER.
998 */
5b9f8cd3 999static void iwl_bg_statistics_periodic(unsigned long data)
4e39317d
EG		 1000{
1001 struct iwl_priv *priv = (struct iwl_priv *)data;
1002
1003 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1004 return;
1005
61780ee3
MA		 1006 /* dont send host command if rf-kill is on */
1007 if (!iwl_is_ready_rf(priv))
1008 return;
1009
4e39317d
EG		 1010 iwl_send_statistics_request(priv, CMD_ASYNC);
1011}
1012
5b9f8cd3 1013static void iwl_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 1014 struct iwl_rx_mem_buffer *rxb)
b481de9c 1015{
0a6857e7 1016#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1017 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1018 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
e7d326ac 1019 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY		 1020
1021 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
1022 "tsf %d %d rate %d\n",
25a6572c 1023 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY		 1024 beacon->beacon_notify_hdr.failure_frame,
1025 le32_to_cpu(beacon->ibss_mgr_status),
1026 le32_to_cpu(beacon->high_tsf),
1027 le32_to_cpu(beacon->low_tsf), rate);
1028#endif
1029
05c914fe 1030 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY		 1031 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1032 queue_work(priv->workqueue, &priv->beacon_update);
1033}
1034
b481de9c
ZY		 1035/* Handle notification from uCode that card's power state is changing
1036 * due to software, hardware, or critical temperature RFKILL */
5b9f8cd3 1037static void iwl_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 1038 struct iwl_rx_mem_buffer *rxb)
b481de9c 1039{
db11d634 1040 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 1041 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1042 unsigned long status = priv->status;
1043
1044 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
1045 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1046 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1047
1048 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
1049 RF_CARD_DISABLED)) {
1050
3395f6e9 1051 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 1052 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1053
3395f6e9
TW		 1054 if (!iwl_grab_nic_access(priv)) {
1055 iwl_write_direct32(
b481de9c
ZY		 1056 priv, HBUS_TARG_MBX_C,
1057 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1058
3395f6e9 1059 iwl_release_nic_access(priv);
b481de9c
ZY		 1060 }
1061
1062 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 1063 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 1064 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW		 1065 if (!iwl_grab_nic_access(priv)) {
1066 iwl_write_direct32(
b481de9c
ZY		 1067 priv, HBUS_TARG_MBX_C,
1068 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1069
3395f6e9 1070 iwl_release_nic_access(priv);
b481de9c
ZY		 1071 }
1072 }
1073
1074 if (flags & RF_CARD_DISABLED) {
3395f6e9 1075 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 1076 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW		 1077 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1078 if (!iwl_grab_nic_access(priv))
1079 iwl_release_nic_access(priv);
b481de9c
ZY		 1080 }
1081 }
1082
1083 if (flags & HW_CARD_DISABLED)
1084 set_bit(STATUS_RF_KILL_HW, &priv->status);
1085 else
1086 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1087
1088
1089 if (flags & SW_CARD_DISABLED)
1090 set_bit(STATUS_RF_KILL_SW, &priv->status);
1091 else
1092 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1093
1094 if (!(flags & RXON_CARD_DISABLED))
2a421b91 1095 iwl_scan_cancel(priv);
b481de9c
ZY		 1096
1097 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1098 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1099 (test_bit(STATUS_RF_KILL_SW, &status) !=
1100 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1101 queue_work(priv->workqueue, &priv->rf_kill);
1102 else
1103 wake_up_interruptible(&priv->wait_command_queue);
1104}
1105
5b9f8cd3 1106int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
e2e3c57b
TW		 1107{
1108 int ret;
1109 unsigned long flags;
1110
1111 spin_lock_irqsave(&priv->lock, flags);
1112 ret = iwl_grab_nic_access(priv);
1113 if (ret)
1114 goto err;
1115
1116 if (src == IWL_PWR_SRC_VAUX) {
1117 u32 val;
e7b63581 1118 ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE,
e2e3c57b
TW		 1119 &val);
1120
1121 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
1122 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1123 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1124 ~APMG_PS_CTRL_MSK_PWR_SRC);
1125 } else {
1126 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1127 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1128 ~APMG_PS_CTRL_MSK_PWR_SRC);
1129 }
1130
1131 iwl_release_nic_access(priv);
1132err:
1133 spin_unlock_irqrestore(&priv->lock, flags);
1134 return ret;
1135}
1136
b481de9c 1137/**
5b9f8cd3 1138 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 1139 *
1140 * Setup the RX handlers for each of the reply types sent from the uCode
1141 * to the host.
1142 *
1143 * This function chains into the hardware specific files for them to setup
1144 * any hardware specific handlers as well.
1145 */
653fa4a0 1146static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1147{
885ba202 1148 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
5b9f8cd3
EG		 1149 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
1150 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
5b9f8cd3 1151 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 1152 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
5b9f8cd3
EG		 1153 iwl_rx_pm_debug_statistics_notif;
1154 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
b481de9c 1155
9fbab516
BC		 1156 /*
1157 * The same handler is used for both the REPLY to a discrete
1158 * statistics request from the host as well as for the periodic
1159 * statistics notifications (after received beacons) from the uCode.
b481de9c 1160 */
8f91aecb
EG		 1161 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
1162 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91 1163
21c339bf 1164 iwl_setup_spectrum_handlers(priv);
2a421b91
TW		 1165 iwl_setup_rx_scan_handlers(priv);
1166
37a44211 1167 /* status change handler */
5b9f8cd3 1168 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
b481de9c 1169
c1354754
TW		 1170 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
1171 iwl_rx_missed_beacon_notif;
37a44211 1172 /* Rx handlers */
1781a07f
EG		 1173 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
1174 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG		 1175 /* block ack */
1176 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 1177 /* Set up hardware specific Rx handlers */
d4789efe 1178 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY		 1179}
1180
5c0eef96
MA		 1181/*
1182 * this should be called while priv->lock is locked
1183*/
a55360e4 1184static void __iwl_rx_replenish(struct iwl_priv *priv)
b481de9c 1185{
a55360e4
TW		 1186 iwl_rx_allocate(priv);
1187 iwl_rx_queue_restock(priv);
b481de9c
ZY		 1188}
1189
b481de9c
ZY		 1190
1191/**
a55360e4 1192 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 1193 *
1194 * Uses the priv->rx_handlers callback function array to invoke
1195 * the appropriate handlers, including command responses,
1196 * frame-received notifications, and other notifications.
1197 */
a55360e4 1198void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1199{
a55360e4 1200 struct iwl_rx_mem_buffer *rxb;
db11d634 1201 struct iwl_rx_packet *pkt;
a55360e4 1202 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 1203 u32 r, i;
1204 int reclaim;
1205 unsigned long flags;
5c0eef96 1206 u8 fill_rx = 0;
d68ab680 1207 u32 count = 8;
b481de9c 1208
6440adb5
BC		 1209 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1210 * buffer that the driver may process (last buffer filled by ucode). */
8d86422a 1211 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY		 1212 i = rxq->read;
1213
1214 /* Rx interrupt, but nothing sent from uCode */
1215 if (i == r)
f3d67999 1216 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
b481de9c 1217
a55360e4 1218 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA		 1219 fill_rx = 1;
1220
b481de9c
ZY		 1221 while (i != r) {
1222 rxb = rxq->queue[i];
1223
9fbab516 1224 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 1225 * then a bug has been introduced in the queue refilling
1226 * routines -- catch it here */
1227 BUG_ON(rxb == NULL);
1228
1229 rxq->queue[i] = NULL;
1230
4018517a 1231 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->aligned_dma_addr,
5425e490 1232 priv->hw_params.rx_buf_size,
b481de9c 1233 PCI_DMA_FROMDEVICE);
db11d634 1234 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 1235
1236 /* Reclaim a command buffer only if this packet is a response
1237 * to a (driver-originated) command.
1238 * If the packet (e.g. Rx frame) originated from uCode,
1239 * there is no command buffer to reclaim.
1240 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1241 * but apparently a few don't get set; catch them here. */
1242 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1243 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1244 (pkt->hdr.cmd != REPLY_RX) &&
7dddaf1a 1245 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
cfe01709 1246 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 1247 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1248 (pkt->hdr.cmd != REPLY_TX);
1249
1250 /* Based on type of command response or notification,
1251 * handle those that need handling via function in
5b9f8cd3 1252 * rx_handlers table. See iwl_setup_rx_handlers() */
b481de9c 1253 if (priv->rx_handlers[pkt->hdr.cmd]) {
f3d67999
EK		 1254 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
1255 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY		 1256 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1257 } else {
1258 /* No handling needed */
f3d67999 1259 IWL_DEBUG(IWL_DL_RX,
b481de9c
ZY		 1260 "r %d i %d No handler needed for %s, 0x%02x\n",
1261 r, i, get_cmd_string(pkt->hdr.cmd),
1262 pkt->hdr.cmd);
1263 }
1264
1265 if (reclaim) {
9fbab516 1266 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1267 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY		 1268 * as we reclaim the driver command queue */
1269 if (rxb && rxb->skb)
17b88929 1270 iwl_tx_cmd_complete(priv, rxb);
b481de9c
ZY		 1271 else
1272 IWL_WARNING("Claim null rxb?\n");
1273 }
1274
1275 /* For now we just don't re-use anything. We can tweak this
1276 * later to try and re-use notification packets and SKBs that
1277 * fail to Rx correctly */
1278 if (rxb->skb != NULL) {
1279 priv->alloc_rxb_skb--;
1280 dev_kfree_skb_any(rxb->skb);
1281 rxb->skb = NULL;
1282 }
1283
4018517a
JB		 1284 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1285 priv->hw_params.rx_buf_size + 256,
9ee1ba47 1286 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 1287 spin_lock_irqsave(&rxq->lock, flags);
1288 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1289 spin_unlock_irqrestore(&rxq->lock, flags);
1290 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 1291 /* If there are a lot of unused frames,
1292 * restock the Rx queue so ucode wont assert. */
1293 if (fill_rx) {
1294 count++;
1295 if (count >= 8) {
1296 priv->rxq.read = i;
a55360e4 1297 __iwl_rx_replenish(priv);
5c0eef96
MA		 1298 count = 0;
1299 }
1300 }
b481de9c
ZY		 1301 }
1302
1303 /* Backtrack one entry */
1304 priv->rxq.read = i;
a55360e4
TW		 1305 iwl_rx_queue_restock(priv);
1306}
a55360e4 1307
0a6857e7 1308#ifdef CONFIG_IWLWIFI_DEBUG
5b9f8cd3 1309static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
b481de9c 1310{
c1adf9fb 1311 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
0795af57 1312
b481de9c 1313 IWL_DEBUG_RADIO("RX CONFIG:\n");
bf403db8 1314 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY		 1315 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1316 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1317 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
1318 le32_to_cpu(rxon->filter_flags));
1319 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
1320 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
1321 rxon->ofdm_basic_rates);
1322 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
e174961c
JB		 1323 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
1324 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
b481de9c
ZY		 1325 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1326}
1327#endif
1328
5b9f8cd3 1329static void iwl_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 1330{
1331 IWL_DEBUG_ISR("Enabling interrupts\n");
1332 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 1333 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY		 1334}
1335
0359facc
MA		 1336/* call this function to flush any scheduled tasklet */
1337static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1338{
a96a27f9 1339 /* wait to make sure we flush pending tasklet*/
0359facc
MA		 1340 synchronize_irq(priv->pci_dev->irq);
1341 tasklet_kill(&priv->irq_tasklet);
1342}
1343
5b9f8cd3 1344static inline void iwl_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 1345{
1346 clear_bit(STATUS_INT_ENABLED, &priv->status);
1347
1348 /* disable interrupts from uCode/NIC to host */
3395f6e9 1349 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 1350
1351 /* acknowledge/clear/reset any interrupts still pending
1352 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW		 1353 iwl_write32(priv, CSR_INT, 0xffffffff);
1354 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY		 1355 IWL_DEBUG_ISR("Disabled interrupts\n");
1356}
1357
b481de9c 1358
b481de9c 1359/**
5b9f8cd3 1360 * iwl_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 1361 */
5b9f8cd3 1362static void iwl_irq_handle_error(struct iwl_priv *priv)
b481de9c 1363{
5b9f8cd3 1364 /* Set the FW error flag -- cleared on iwl_down */
b481de9c
ZY		 1365 set_bit(STATUS_FW_ERROR, &priv->status);
1366
1367 /* Cancel currently queued command. */
1368 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1369
0a6857e7 1370#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1371 if (priv->debug_level & IWL_DL_FW_ERRORS) {
ede0cba4 1372 iwl_dump_nic_error_log(priv);
189a2b59 1373 iwl_dump_nic_event_log(priv);
5b9f8cd3 1374 iwl_print_rx_config_cmd(priv);
b481de9c
ZY		 1375 }
1376#endif
1377
1378 wake_up_interruptible(&priv->wait_command_queue);
1379
1380 /* Keep the restart process from trying to send host
1381 * commands by clearing the INIT status bit */
1382 clear_bit(STATUS_READY, &priv->status);
1383
1384 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
f3d67999 1385 IWL_DEBUG(IWL_DL_FW_ERRORS,
b481de9c
ZY		 1386 "Restarting adapter due to uCode error.\n");
1387
3109ece1 1388 if (iwl_is_associated(priv)) {
b481de9c
ZY		 1389 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1390 sizeof(priv->recovery_rxon));
1391 priv->error_recovering = 1;
1392 }
3a1081e8
EK		 1393 if (priv->cfg->mod_params->restart_fw)
1394 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY		 1395 }
1396}
1397
5b9f8cd3 1398static void iwl_error_recovery(struct iwl_priv *priv)
b481de9c
ZY		 1399{
1400 unsigned long flags;
1401
1402 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1403 sizeof(priv->staging_rxon));
1404 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 1405 iwl_commit_rxon(priv);
b481de9c 1406
4f40e4d9 1407 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 1408
1409 spin_lock_irqsave(&priv->lock, flags);
1410 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1411 priv->error_recovering = 0;
1412 spin_unlock_irqrestore(&priv->lock, flags);
1413}
1414
5b9f8cd3 1415static void iwl_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY		 1416{
1417 u32 inta, handled = 0;
1418 u32 inta_fh;
1419 unsigned long flags;
0a6857e7 1420#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 1421 u32 inta_mask;
1422#endif
1423
1424 spin_lock_irqsave(&priv->lock, flags);
1425
1426 /* Ack/clear/reset pending uCode interrupts.
1427 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1428 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW		 1429 inta = iwl_read32(priv, CSR_INT);
1430 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY		 1431
1432 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1433 * Any new interrupts that happen after this, either while we're
1434 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW		 1435 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1436 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1437
0a6857e7 1438#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1439 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1440 /* just for debug */
3395f6e9 1441 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY		 1442 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1443 inta, inta_mask, inta_fh);
1444 }
1445#endif
1446
1447 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1448 * atomic, make sure that inta covers all the interrupts that
1449 * we've discovered, even if FH interrupt came in just after
1450 * reading CSR_INT. */
6f83eaa1 1451 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1452 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1453 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY		 1454 inta |= CSR_INT_BIT_FH_TX;
1455
1456 /* Now service all interrupt bits discovered above. */
1457 if (inta & CSR_INT_BIT_HW_ERR) {
1458 IWL_ERROR("Microcode HW error detected. Restarting.\n");
1459
1460 /* Tell the device to stop sending interrupts */
5b9f8cd3 1461 iwl_disable_interrupts(priv);
b481de9c 1462
5b9f8cd3 1463 iwl_irq_handle_error(priv);
b481de9c
ZY		 1464
1465 handled |= CSR_INT_BIT_HW_ERR;
1466
1467 spin_unlock_irqrestore(&priv->lock, flags);
1468
1469 return;
1470 }
1471
0a6857e7 1472#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1473 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1474 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP		 1475 if (inta & CSR_INT_BIT_SCD)
1476 IWL_DEBUG_ISR("Scheduler finished to transmit "
1477 "the frame/frames.\n");
b481de9c
ZY		 1478
1479 /* Alive notification via Rx interrupt will do the real work */
1480 if (inta & CSR_INT_BIT_ALIVE)
1481 IWL_DEBUG_ISR("Alive interrupt\n");
1482 }
1483#endif
1484 /* Safely ignore these bits for debug checks below */
25c03d8e 1485 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1486
9fbab516 1487 /* HW RF KILL switch toggled */
b481de9c
ZY		 1488 if (inta & CSR_INT_BIT_RF_KILL) {
1489 int hw_rf_kill = 0;
3395f6e9 1490 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 1491 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1492 hw_rf_kill = 1;
1493
f3d67999 1494 IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
b481de9c
ZY		 1495 hw_rf_kill ? "disable radio":"enable radio");
1496
a9efa652
EG		 1497 /* driver only loads ucode once setting the interface up.
1498 * the driver as well won't allow loading if RFKILL is set
1499 * therefore no need to restart the driver from this handler
1500 */
1501 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
53e49093 1502 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c
ZY		 1503
1504 handled |= CSR_INT_BIT_RF_KILL;
1505 }
1506
9fbab516 1507 /* Chip got too hot and stopped itself */
b481de9c
ZY		 1508 if (inta & CSR_INT_BIT_CT_KILL) {
1509 IWL_ERROR("Microcode CT kill error detected.\n");
1510 handled |= CSR_INT_BIT_CT_KILL;
1511 }
1512
1513 /* Error detected by uCode */
1514 if (inta & CSR_INT_BIT_SW_ERR) {
1515 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
1516 inta);
5b9f8cd3 1517 iwl_irq_handle_error(priv);
b481de9c
ZY		 1518 handled |= CSR_INT_BIT_SW_ERR;
1519 }
1520
1521 /* uCode wakes up after power-down sleep */
1522 if (inta & CSR_INT_BIT_WAKEUP) {
1523 IWL_DEBUG_ISR("Wakeup interrupt\n");
a55360e4 1524 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW		 1525 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1526 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1527 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1528 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1529 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1530 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 1531
1532 handled |= CSR_INT_BIT_WAKEUP;
1533 }
1534
1535 /* All uCode command responses, including Tx command responses,
1536 * Rx "responses" (frame-received notification), and other
1537 * notifications from uCode come through here*/
1538 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1539 iwl_rx_handle(priv);
b481de9c
ZY		 1540 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1541 }
1542
1543 if (inta & CSR_INT_BIT_FH_TX) {
1544 IWL_DEBUG_ISR("Tx interrupt\n");
1545 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR		 1546 /* FH finished to write, send event */
1547 priv->ucode_write_complete = 1;
1548 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 1549 }
1550
1551 if (inta & ~handled)
1552 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1553
1554 if (inta & ~CSR_INI_SET_MASK) {
1555 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
1556 inta & ~CSR_INI_SET_MASK);
1557 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
1558 }
1559
1560 /* Re-enable all interrupts */
0359facc
MA		 1561 /* only Re-enable if diabled by irq */
1562 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1563 iwl_enable_interrupts(priv);
b481de9c 1564
0a6857e7 1565#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1566 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW		 1567 inta = iwl_read32(priv, CSR_INT);
1568 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1569 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 1570 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1571 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1572 }
1573#endif
1574 spin_unlock_irqrestore(&priv->lock, flags);
1575}
1576
5b9f8cd3 1577static irqreturn_t iwl_isr(int irq, void *data)
b481de9c 1578{
c79dd5b5 1579 struct iwl_priv *priv = data;
b481de9c
ZY		 1580 u32 inta, inta_mask;
1581 u32 inta_fh;
1582 if (!priv)
1583 return IRQ_NONE;
1584
1585 spin_lock(&priv->lock);
1586
1587 /* Disable (but don't clear!) interrupts here to avoid
1588 * back-to-back ISRs and sporadic interrupts from our NIC.
1589 * If we have something to service, the tasklet will re-enable ints.
1590 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW		 1591 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1592 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 1593
1594 /* Discover which interrupts are active/pending */
3395f6e9
TW		 1595 inta = iwl_read32(priv, CSR_INT);
1596 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 1597
1598 /* Ignore interrupt if there's nothing in NIC to service.
1599 * This may be due to IRQ shared with another device,
1600 * or due to sporadic interrupts thrown from our NIC. */
1601 if (!inta && !inta_fh) {
1602 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
1603 goto none;
1604 }
1605
1606 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON		 1607 /* Hardware disappeared. It might have already raised
1608 * an interrupt */
b481de9c 1609 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 1610 goto unplugged;
b481de9c
ZY		 1611 }
1612
1613 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1614 inta, inta_mask, inta_fh);
1615
25c03d8e
JP		 1616 inta &= ~CSR_INT_BIT_SCD;
1617
5b9f8cd3 1618 /* iwl_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP		 1619 if (likely(inta || inta_fh))
1620 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1621
66fbb541
ON		 1622 unplugged:
1623 spin_unlock(&priv->lock);
b481de9c
ZY		 1624 return IRQ_HANDLED;
1625
1626 none:
1627 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA		 1628 /* only Re-enable if diabled by irq */
1629 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1630 iwl_enable_interrupts(priv);
b481de9c
ZY		 1631 spin_unlock(&priv->lock);
1632 return IRQ_NONE;
1633}
1634
b481de9c
ZY		 1635/******************************************************************************
1636 *
1637 * uCode download functions
1638 *
1639 ******************************************************************************/
1640
5b9f8cd3 1641static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1642{
98c92211
TW		 1643 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1644 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1645 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1646 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1647 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1648 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY		 1649}
1650
5b9f8cd3 1651static void iwl_nic_start(struct iwl_priv *priv)
edcdf8b2
RR		 1652{
1653 /* Remove all resets to allow NIC to operate */
1654 iwl_write32(priv, CSR_RESET, 0);
1655}
1656
1657
b481de9c 1658/**
5b9f8cd3 1659 * iwl_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 1660 *
1661 * Copy into buffers for card to fetch via bus-mastering
1662 */
5b9f8cd3 1663static int iwl_read_ucode(struct iwl_priv *priv)
b481de9c 1664{
14b3d338 1665 struct iwl_ucode *ucode;
90e759d1 1666 int ret;
b481de9c 1667 const struct firmware *ucode_raw;
4bf775cd 1668 const char *name = priv->cfg->fw_name;
b481de9c
ZY		 1669 u8 *src;
1670 size_t len;
1671 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
1672
1673 /* Ask kernel firmware_class module to get the boot firmware off disk.
1674 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW		 1675 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
1676 if (ret < 0) {
1677 IWL_ERROR("%s firmware file req failed: Reason %d\n",
1678 name, ret);
b481de9c
ZY		 1679 goto error;
1680 }
1681
1682 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
1683 name, ucode_raw->size);
1684
1685 /* Make sure that we got at least our header! */
1686 if (ucode_raw->size < sizeof(*ucode)) {
1687 IWL_ERROR("File size way too small!\n");
90e759d1 1688 ret = -EINVAL;
b481de9c
ZY		 1689 goto err_release;
1690 }
1691
1692 /* Data from ucode file: header followed by uCode images */
1693 ucode = (void *)ucode_raw->data;
1694
1695 ver = le32_to_cpu(ucode->ver);
1696 inst_size = le32_to_cpu(ucode->inst_size);
1697 data_size = le32_to_cpu(ucode->data_size);
1698 init_size = le32_to_cpu(ucode->init_size);
1699 init_data_size = le32_to_cpu(ucode->init_data_size);
1700 boot_size = le32_to_cpu(ucode->boot_size);
1701
1702 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
1703 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
1704 inst_size);
1705 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
1706 data_size);
1707 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
1708 init_size);
1709 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
1710 init_data_size);
1711 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
1712 boot_size);
1713
1714 /* Verify size of file vs. image size info in file's header */
1715 if (ucode_raw->size < sizeof(*ucode) +
1716 inst_size + data_size + init_size +
1717 init_data_size + boot_size) {
1718
1719 IWL_DEBUG_INFO("uCode file size %d too small\n",
1720 (int)ucode_raw->size);
90e759d1 1721 ret = -EINVAL;
b481de9c
ZY		 1722 goto err_release;
1723 }
1724
1725 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1726 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW		 1727 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
1728 inst_size);
1729 ret = -EINVAL;
b481de9c
ZY		 1730 goto err_release;
1731 }
1732
099b40b7 1733 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW		 1734 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
1735 data_size);
1736 ret = -EINVAL;
b481de9c
ZY		 1737 goto err_release;
1738 }
099b40b7 1739 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 1740 IWL_DEBUG_INFO
90e759d1
TW		 1741 ("uCode init instr len %d too large to fit in\n",
1742 init_size);
1743 ret = -EINVAL;
b481de9c
ZY		 1744 goto err_release;
1745 }
099b40b7 1746 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 1747 IWL_DEBUG_INFO
90e759d1
TW		 1748 ("uCode init data len %d too large to fit in\n",
1749 init_data_size);
1750 ret = -EINVAL;
b481de9c
ZY		 1751 goto err_release;
1752 }
099b40b7 1753 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 1754 IWL_DEBUG_INFO
90e759d1
TW		 1755 ("uCode boot instr len %d too large to fit in\n",
1756 boot_size);
1757 ret = -EINVAL;
b481de9c
ZY		 1758 goto err_release;
1759 }
1760
1761 /* Allocate ucode buffers for card's bus-master loading ... */
1762
1763 /* Runtime instructions and 2 copies of data:
1764 * 1) unmodified from disk
1765 * 2) backup cache for save/restore during power-downs */
1766 priv->ucode_code.len = inst_size;
98c92211 1767 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 1768
1769 priv->ucode_data.len = data_size;
98c92211 1770 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 1771
1772 priv->ucode_data_backup.len = data_size;
98c92211 1773 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY		 1774
1775 /* Initialization instructions and data */
90e759d1
TW		 1776 if (init_size && init_data_size) {
1777 priv->ucode_init.len = init_size;
98c92211 1778 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW		 1779
1780 priv->ucode_init_data.len = init_data_size;
98c92211 1781 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW		 1782
1783 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1784 goto err_pci_alloc;
1785 }
b481de9c
ZY		 1786
1787 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 1788 if (boot_size) {
1789 priv->ucode_boot.len = boot_size;
98c92211 1790 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1791
90e759d1
TW		 1792 if (!priv->ucode_boot.v_addr)
1793 goto err_pci_alloc;
1794 }
b481de9c
ZY		 1795
1796 /* Copy images into buffers for card's bus-master reads ... */
1797
1798 /* Runtime instructions (first block of data in file) */
1799 src = &ucode->data[0];
1800 len = priv->ucode_code.len;
90e759d1 1801 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY		 1802 memcpy(priv->ucode_code.v_addr, src, len);
1803 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1804 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1805
1806 /* Runtime data (2nd block)
5b9f8cd3 1807 * NOTE: Copy into backup buffer will be done in iwl_up() */
b481de9c
ZY		 1808 src = &ucode->data[inst_size];
1809 len = priv->ucode_data.len;
90e759d1 1810 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 1811 memcpy(priv->ucode_data.v_addr, src, len);
1812 memcpy(priv->ucode_data_backup.v_addr, src, len);
1813
1814 /* Initialization instructions (3rd block) */
1815 if (init_size) {
1816 src = &ucode->data[inst_size + data_size];
1817 len = priv->ucode_init.len;
90e759d1
TW		 1818 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
1819 len);
b481de9c
ZY		 1820 memcpy(priv->ucode_init.v_addr, src, len);
1821 }
1822
1823 /* Initialization data (4th block) */
1824 if (init_data_size) {
1825 src = &ucode->data[inst_size + data_size + init_size];
1826 len = priv->ucode_init_data.len;
90e759d1
TW		 1827 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
1828 len);
b481de9c
ZY		 1829 memcpy(priv->ucode_init_data.v_addr, src, len);
1830 }
1831
1832 /* Bootstrap instructions (5th block) */
1833 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1834 len = priv->ucode_boot.len;
90e759d1 1835 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 1836 memcpy(priv->ucode_boot.v_addr, src, len);
1837
1838 /* We have our copies now, allow OS release its copies */
1839 release_firmware(ucode_raw);
1840 return 0;
1841
1842 err_pci_alloc:
1843 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 1844 ret = -ENOMEM;
5b9f8cd3 1845 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY		 1846
1847 err_release:
1848 release_firmware(ucode_raw);
1849
1850 error:
90e759d1 1851 return ret;
b481de9c
ZY		 1852}
1853
ada17513
MA		 1854/* temporary */
1855static int iwl_mac_beacon_update(struct ieee80211_hw *hw,
1856 struct sk_buff *skb);
1857
b481de9c 1858/**
4a4a9e81 1859 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 1860 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 1861 * Alive gets handled by iwl_init_alive_start()).
b481de9c 1862 */
4a4a9e81 1863static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 1864{
57aab75a 1865 int ret = 0;
b481de9c
ZY		 1866
1867 IWL_DEBUG_INFO("Runtime Alive received.\n");
1868
1869 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1870 /* We had an error bringing up the hardware, so take it
1871 * all the way back down so we can try again */
1872 IWL_DEBUG_INFO("Alive failed.\n");
1873 goto restart;
1874 }
1875
1876 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1877 * This is a paranoid check, because we would not have gotten the
1878 * "runtime" alive if code weren't properly loaded. */
b0692f2f 1879 if (iwl_verify_ucode(priv)) {
b481de9c
ZY		 1880 /* Runtime instruction load was bad;
1881 * take it all the way back down so we can try again */
1882 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
1883 goto restart;
1884 }
1885
37deb2a0 1886 iwl_clear_stations_table(priv);
57aab75a
TW		 1887 ret = priv->cfg->ops->lib->alive_notify(priv);
1888 if (ret) {
b481de9c 1889 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 1890 ret);
b481de9c
ZY		 1891 goto restart;
1892 }
1893
5b9f8cd3 1894 /* After the ALIVE response, we can send host commands to the uCode */
b481de9c
ZY		 1895 set_bit(STATUS_ALIVE, &priv->status);
1896
fee1247a 1897 if (iwl_is_rfkill(priv))
b481de9c
ZY		 1898 return;
1899
36d6825b 1900 ieee80211_wake_queues(priv->hw);
b481de9c
ZY		 1901
1902 priv->active_rate = priv->rates_mask;
1903 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1904
3109ece1 1905 if (iwl_is_associated(priv)) {
c1adf9fb
GG		 1906 struct iwl_rxon_cmd *active_rxon =
1907 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY		 1908
1909 memcpy(&priv->staging_rxon, &priv->active_rxon,
1910 sizeof(priv->staging_rxon));
1911 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1912 } else {
1913 /* Initialize our rx_config data */
5b9f8cd3 1914 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY		 1915 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1916 }
1917
9fbab516 1918 /* Configure Bluetooth device coexistence support */
5b9f8cd3 1919 iwl_send_bt_config(priv);
b481de9c 1920
4a4a9e81
TW		 1921 iwl_reset_run_time_calib(priv);
1922
b481de9c 1923 /* Configure the adapter for unassociated operation */
5b9f8cd3 1924 iwl_commit_rxon(priv);
b481de9c
ZY		 1925
1926 /* At this point, the NIC is initialized and operational */
47f4a587 1927 iwl_rf_kill_ct_config(priv);
5a66926a 1928
fe00b5a5
RC		 1929 iwl_leds_register(priv);
1930
b481de9c 1931 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 1932 set_bit(STATUS_READY, &priv->status);
5a66926a 1933 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 1934
1935 if (priv->error_recovering)
5b9f8cd3 1936 iwl_error_recovery(priv);
b481de9c 1937
58d0f361 1938 iwl_power_update_mode(priv, 1);
c46fbefa 1939
ada17513
MA		 1940 /* reassociate for ADHOC mode */
1941 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1942 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1943 priv->vif);
1944 if (beacon)
1945 iwl_mac_beacon_update(priv->hw, beacon);
1946 }
1947
1948
c46fbefa 1949 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
5b9f8cd3 1950 iwl_set_mode(priv, priv->iw_mode);
c46fbefa 1951
b481de9c
ZY		 1952 return;
1953
1954 restart:
1955 queue_work(priv->workqueue, &priv->restart);
1956}
1957
4e39317d 1958static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 1959
5b9f8cd3 1960static void __iwl_down(struct iwl_priv *priv)
b481de9c
ZY		 1961{
1962 unsigned long flags;
1963 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY		 1964
1965 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
1966
b481de9c
ZY		 1967 if (!exit_pending)
1968 set_bit(STATUS_EXIT_PENDING, &priv->status);
1969
ab53d8af
MA		 1970 iwl_leds_unregister(priv);
1971
37deb2a0 1972 iwl_clear_stations_table(priv);
b481de9c
ZY		 1973
1974 /* Unblock any waiting calls */
1975 wake_up_interruptible_all(&priv->wait_command_queue);
1976
b481de9c
ZY		 1977 /* Wipe out the EXIT_PENDING status bit if we are not actually
1978 * exiting the module */
1979 if (!exit_pending)
1980 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1981
1982 /* stop and reset the on-board processor */
3395f6e9 1983 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 1984
1985 /* tell the device to stop sending interrupts */
0359facc 1986 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 1987 iwl_disable_interrupts(priv);
0359facc
MA		 1988 spin_unlock_irqrestore(&priv->lock, flags);
1989 iwl_synchronize_irq(priv);
b481de9c
ZY		 1990
1991 if (priv->mac80211_registered)
1992 ieee80211_stop_queues(priv->hw);
1993
5b9f8cd3 1994 /* If we have not previously called iwl_init() then
b481de9c 1995 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 1996 if (!iwl_is_init(priv)) {
b481de9c
ZY		 1997 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1998 STATUS_RF_KILL_HW |
1999 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2000 STATUS_RF_KILL_SW |
9788864e
RC		 2001 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2002 STATUS_GEO_CONFIGURED |
b481de9c 2003 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA		 2004 STATUS_IN_SUSPEND |
2005 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2006 STATUS_EXIT_PENDING;
b481de9c
ZY		 2007 goto exit;
2008 }
2009
2010 /* ...otherwise clear out all the status bits but the RF Kill and
2011 * SUSPEND bits and continue taking the NIC down. */
2012 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2013 STATUS_RF_KILL_HW |
2014 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2015 STATUS_RF_KILL_SW |
9788864e
RC		 2016 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2017 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 2018 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
2019 STATUS_IN_SUSPEND |
2020 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA		 2021 STATUS_FW_ERROR |
2022 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2023 STATUS_EXIT_PENDING;
b481de9c
ZY		 2024
2025 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2026 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 2027 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 2028 spin_unlock_irqrestore(&priv->lock, flags);
2029
da1bc453 2030 iwl_txq_ctx_stop(priv);
b3bbacb7 2031 iwl_rxq_stop(priv);
b481de9c
ZY		 2032
2033 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW		 2034 if (!iwl_grab_nic_access(priv)) {
2035 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 2036 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 2037 iwl_release_nic_access(priv);
b481de9c
ZY		 2038 }
2039 spin_unlock_irqrestore(&priv->lock, flags);
2040
2041 udelay(5);
2042
7f066108 2043 /* FIXME: apm_ops.suspend(priv) */
d535311e
GG		 2044 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
2045 priv->cfg->ops->lib->apm_ops.stop(priv);
2046 else
2047 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 2048 exit:
885ba202 2049 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY		 2050
2051 if (priv->ibss_beacon)
2052 dev_kfree_skb(priv->ibss_beacon);
2053 priv->ibss_beacon = NULL;
2054
2055 /* clear out any free frames */
fcab423d 2056 iwl_clear_free_frames(priv);
b481de9c
ZY		 2057}
2058
5b9f8cd3 2059static void iwl_down(struct iwl_priv *priv)
b481de9c
ZY		 2060{
2061 mutex_lock(&priv->mutex);
5b9f8cd3 2062 __iwl_down(priv);
b481de9c 2063 mutex_unlock(&priv->mutex);
b24d22b1 2064
4e39317d 2065 iwl_cancel_deferred_work(priv);
b481de9c
ZY		 2066}
2067
2068#define MAX_HW_RESTARTS 5
2069
5b9f8cd3 2070static int __iwl_up(struct iwl_priv *priv)
b481de9c 2071{
57aab75a
TW		 2072 int i;
2073 int ret;
b481de9c
ZY		 2074
2075 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2076 IWL_WARNING("Exit pending; will not bring the NIC up\n");
2077 return -EIO;
2078 }
2079
e903fbd4
RC		 2080 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2081 IWL_ERROR("ucode not available for device bringup\n");
2082 return -EIO;
2083 }
2084
e655b9f0 2085 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 2086 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 2087 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2088 else
e655b9f0 2089 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2090
c1842d61 2091 if (iwl_is_rfkill(priv)) {
5b9f8cd3 2092 iwl_enable_interrupts(priv);
3bff19c2
EG		 2093 IWL_WARNING("Radio disabled by %s RF Kill switch\n",
2094 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 2095 return 0;
b481de9c
ZY		 2096 }
2097
3395f6e9 2098 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2099
1053d35f 2100 ret = iwl_hw_nic_init(priv);
57aab75a
TW		 2101 if (ret) {
2102 IWL_ERROR("Unable to init nic\n");
2103 return ret;
b481de9c
ZY		 2104 }
2105
2106 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW		 2107 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2108 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 2109 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2110
2111 /* clear (again), then enable host interrupts */
3395f6e9 2112 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5b9f8cd3 2113 iwl_enable_interrupts(priv);
b481de9c
ZY		 2114
2115 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW		 2116 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2117 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 2118
2119 /* Copy original ucode data image from disk into backup cache.
2120 * This will be used to initialize the on-board processor's
2121 * data SRAM for a clean start when the runtime program first loads. */
2122 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2123 priv->ucode_data.len);
b481de9c 2124
b481de9c
ZY		 2125 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2126
37deb2a0 2127 iwl_clear_stations_table(priv);
b481de9c
ZY		 2128
2129 /* load bootstrap state machine,
2130 * load bootstrap program into processor's memory,
2131 * prepare to load the "initialize" uCode */
57aab75a 2132 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 2133
57aab75a
TW		 2134 if (ret) {
2135 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY		 2136 continue;
2137 }
2138
f3d5b45b
EG		 2139 /* Clear out the uCode error bit if it is set */
2140 clear_bit(STATUS_FW_ERROR, &priv->status);
2141
b481de9c 2142 /* start card; "initialize" will load runtime ucode */
5b9f8cd3 2143 iwl_nic_start(priv);
b481de9c 2144
b481de9c
ZY		 2145 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
2146
2147 return 0;
2148 }
2149
2150 set_bit(STATUS_EXIT_PENDING, &priv->status);
5b9f8cd3 2151 __iwl_down(priv);
64e72c3e 2152 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY		 2153
2154 /* tried to restart and config the device for as long as our
2155 * patience could withstand */
2156 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
2157 return -EIO;
2158}
2159
2160
2161/*****************************************************************************
2162 *
2163 * Workqueue callbacks
2164 *
2165 *****************************************************************************/
2166
4a4a9e81 2167static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 2168{
c79dd5b5
TW		 2169 struct iwl_priv *priv =
2170 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY		 2171
2172 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2173 return;
2174
2175 mutex_lock(&priv->mutex);
f3ccc08c 2176 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY		 2177 mutex_unlock(&priv->mutex);
2178}
2179
4a4a9e81 2180static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 2181{
c79dd5b5
TW		 2182 struct iwl_priv *priv =
2183 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY		 2184
2185 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2186 return;
2187
2188 mutex_lock(&priv->mutex);
4a4a9e81 2189 iwl_alive_start(priv);
b481de9c
ZY		 2190 mutex_unlock(&priv->mutex);
2191}
2192
5b9f8cd3 2193static void iwl_bg_rf_kill(struct work_struct *work)
b481de9c 2194{
c79dd5b5 2195 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY		 2196
2197 wake_up_interruptible(&priv->wait_command_queue);
2198
2199 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2200 return;
2201
2202 mutex_lock(&priv->mutex);
2203
fee1247a 2204 if (!iwl_is_rfkill(priv)) {
f3d67999 2205 IWL_DEBUG(IWL_DL_RF_KILL,
b481de9c
ZY		 2206 "HW and/or SW RF Kill no longer active, restarting "
2207 "device\n");
2208 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2209 queue_work(priv->workqueue, &priv->restart);
2210 } else {
ad97edd2
MA		 2211 /* make sure mac80211 stop sending Tx frame */
2212 if (priv->mac80211_registered)
2213 ieee80211_stop_queues(priv->hw);
b481de9c
ZY		 2214
2215 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2216 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2217 "disabled by SW switch\n");
2218 else
2219 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
2220 "Kill switch must be turned off for "
2221 "wireless networking to work.\n");
2222 }
2223 mutex_unlock(&priv->mutex);
80fcc9e2 2224 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY		 2225}
2226
5b9f8cd3 2227static void iwl_bg_set_monitor(struct work_struct *work)
4419e39b
AK		 2228{
2229 struct iwl_priv *priv = container_of(work,
2230 struct iwl_priv, set_monitor);
c46fbefa 2231 int ret;
4419e39b
AK		 2232
2233 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
2234
2235 mutex_lock(&priv->mutex);
2236
5b9f8cd3 2237 ret = iwl_set_mode(priv, NL80211_IFTYPE_MONITOR);
c46fbefa
AK		 2238 if (ret) {
2239 if (ret == -EAGAIN)
2240 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
2241 else
5b9f8cd3 2242 IWL_ERROR("iwl_set_mode() failed ret = %d\n", ret);
c46fbefa 2243 }
4419e39b
AK		 2244
2245 mutex_unlock(&priv->mutex);
2246}
2247
16e727e8
EG		 2248static void iwl_bg_run_time_calib_work(struct work_struct *work)
2249{
2250 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2251 run_time_calib_work);
2252
2253 mutex_lock(&priv->mutex);
2254
2255 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2256 test_bit(STATUS_SCANNING, &priv->status)) {
2257 mutex_unlock(&priv->mutex);
2258 return;
2259 }
2260
2261 if (priv->start_calib) {
2262 iwl_chain_noise_calibration(priv, &priv->statistics);
2263
2264 iwl_sensitivity_calibration(priv, &priv->statistics);
2265 }
2266
2267 mutex_unlock(&priv->mutex);
2268 return;
2269}
2270
5b9f8cd3 2271static void iwl_bg_up(struct work_struct *data)
b481de9c 2272{
c79dd5b5 2273 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY		 2274
2275 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2276 return;
2277
2278 mutex_lock(&priv->mutex);
5b9f8cd3 2279 __iwl_up(priv);
b481de9c 2280 mutex_unlock(&priv->mutex);
80fcc9e2 2281 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY		 2282}
2283
5b9f8cd3 2284static void iwl_bg_restart(struct work_struct *data)
b481de9c 2285{
c79dd5b5 2286 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY		 2287
2288 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2289 return;
2290
5b9f8cd3 2291 iwl_down(priv);
b481de9c
ZY		 2292 queue_work(priv->workqueue, &priv->up);
2293}
2294
5b9f8cd3 2295static void iwl_bg_rx_replenish(struct work_struct *data)
b481de9c 2296{
c79dd5b5
TW		 2297 struct iwl_priv *priv =
2298 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY		 2299
2300 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2301 return;
2302
2303 mutex_lock(&priv->mutex);
a55360e4 2304 iwl_rx_replenish(priv);
b481de9c
ZY		 2305 mutex_unlock(&priv->mutex);
2306}
2307
7878a5a4
MA		 2308#define IWL_DELAY_NEXT_SCAN (HZ*2)
2309
5b9f8cd3 2310static void iwl_post_associate(struct iwl_priv *priv)
b481de9c 2311{
b481de9c 2312 struct ieee80211_conf *conf = NULL;
857485c0 2313 int ret = 0;
1ff50bda 2314 unsigned long flags;
b481de9c 2315
05c914fe 2316 if (priv->iw_mode == NL80211_IFTYPE_AP) {
3ac7f146 2317 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
b481de9c
ZY		 2318 return;
2319 }
2320
e174961c
JB		 2321 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
2322 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY		 2323
2324
2325 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2326 return;
2327
b481de9c 2328
508e32e1 2329 if (!priv->vif || !priv->is_open)
948c171c 2330 return;
508e32e1 2331
c90a74ba 2332 iwl_power_cancel_timeout(priv);
2a421b91 2333 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2334
b481de9c
ZY		 2335 conf = ieee80211_get_hw_conf(priv->hw);
2336
2337 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2338 iwl_commit_rxon(priv);
b481de9c 2339
3195c1f3 2340 iwl_setup_rxon_timing(priv);
857485c0 2341 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2342 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2343 if (ret)
b481de9c
ZY		 2344 IWL_WARNING("REPLY_RXON_TIMING failed - "
2345 "Attempting to continue.\n");
2346
2347 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2348
42eb7c64 2349 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2350
c7de35cd 2351 iwl_set_rxon_chain(priv);
b481de9c
ZY		 2352 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2353
2354 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
2355 priv->assoc_id, priv->beacon_int);
2356
2357 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2358 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2359 else
2360 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2361
2362 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2363 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2364 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2365 else
2366 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2367
05c914fe 2368 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2369 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2370
2371 }
2372
5b9f8cd3 2373 iwl_commit_rxon(priv);
b481de9c
ZY		 2374
2375 switch (priv->iw_mode) {
05c914fe 2376 case NL80211_IFTYPE_STATION:
b481de9c
ZY		 2377 break;
2378
05c914fe 2379 case NL80211_IFTYPE_ADHOC:
b481de9c 2380
c46fbefa
AK		 2381 /* assume default assoc id */
2382 priv->assoc_id = 1;
b481de9c 2383
4f40e4d9 2384 iwl_rxon_add_station(priv, priv->bssid, 0);
5b9f8cd3 2385 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 2386
2387 break;
2388
2389 default:
2390 IWL_ERROR("%s Should not be called in %d mode\n",
3ac7f146 2391 __func__, priv->iw_mode);
b481de9c
ZY		 2392 break;
2393 }
2394
05c914fe 2395 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2396 priv->assoc_station_added = 1;
2397
1ff50bda
EG		 2398 spin_lock_irqsave(&priv->lock, flags);
2399 iwl_activate_qos(priv, 0);
2400 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2401
04816448
GE		 2402 /* the chain noise calibration will enabled PM upon completion
2403 * If chain noise has already been run, then we need to enable
2404 * power management here */
2405 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2406 iwl_power_enable_management(priv);
c90a74ba
EG		 2407
2408 /* Enable Rx differential gain and sensitivity calibrations */
2409 iwl_chain_noise_reset(priv);
2410 priv->start_calib = 1;
2411
508e32e1
RC		 2412}
2413
b481de9c
ZY		 2414/*****************************************************************************
2415 *
2416 * mac80211 entry point functions
2417 *
2418 *****************************************************************************/
2419
154b25ce 2420#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2421
5b9f8cd3 2422static int iwl_mac_start(struct ieee80211_hw *hw)
b481de9c 2423{
c79dd5b5 2424 struct iwl_priv *priv = hw->priv;
5a66926a 2425 int ret;
cf88c433 2426 u16 pci_cmd;
b481de9c
ZY		 2427
2428 IWL_DEBUG_MAC80211("enter\n");
2429
5a66926a
ZY		 2430 if (pci_enable_device(priv->pci_dev)) {
2431 IWL_ERROR("Fail to pci_enable_device\n");
2432 return -ENODEV;
2433 }
2434 pci_restore_state(priv->pci_dev);
2435 pci_enable_msi(priv->pci_dev);
2436
cf88c433
TW		 2437 /* enable interrupts if needed: hw bug w/a */
2438 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2439 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2440 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2441 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2442 }
2443
5b9f8cd3 2444 ret = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
5a66926a
ZY		 2445 DRV_NAME, priv);
2446 if (ret) {
2447 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
2448 goto out_disable_msi;
2449 }
2450
b481de9c
ZY		 2451 /* we should be verifying the device is ready to be opened */
2452 mutex_lock(&priv->mutex);
2453
c1adf9fb 2454 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY		 2455 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2456 * ucode filename and max sizes are card-specific. */
b481de9c 2457
5a66926a 2458 if (!priv->ucode_code.len) {
5b9f8cd3 2459 ret = iwl_read_ucode(priv);
5a66926a
ZY		 2460 if (ret) {
2461 IWL_ERROR("Could not read microcode: %d\n", ret);
2462 mutex_unlock(&priv->mutex);
2463 goto out_release_irq;
2464 }
2465 }
b481de9c 2466
5b9f8cd3 2467 ret = __iwl_up(priv);
5a66926a 2468
b481de9c 2469 mutex_unlock(&priv->mutex);
5a66926a 2470
80fcc9e2
AG		 2471 iwl_rfkill_set_hw_state(priv);
2472
e655b9f0
ZY		 2473 if (ret)
2474 goto out_release_irq;
2475
c1842d61
TW		 2476 if (iwl_is_rfkill(priv))
2477 goto out;
2478
e655b9f0
ZY		 2479 IWL_DEBUG_INFO("Start UP work done.\n");
2480
2481 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2482 return 0;
2483
fe9b6b72 2484 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2485 * mac80211 will not be run successfully. */
154b25ce
EG		 2486 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2487 test_bit(STATUS_READY, &priv->status),
2488 UCODE_READY_TIMEOUT);
2489 if (!ret) {
2490 if (!test_bit(STATUS_READY, &priv->status)) {
2491 IWL_ERROR("START_ALIVE timeout after %dms.\n",
2492 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2493 ret = -ETIMEDOUT;
2494 goto out_release_irq;
5a66926a 2495 }
fe9b6b72 2496 }
0a078ffa 2497
c1842d61 2498out:
0a078ffa 2499 priv->is_open = 1;
b481de9c
ZY		 2500 IWL_DEBUG_MAC80211("leave\n");
2501 return 0;
5a66926a
ZY		 2502
2503out_release_irq:
2504 free_irq(priv->pci_dev->irq, priv);
2505out_disable_msi:
2506 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY		 2507 pci_disable_device(priv->pci_dev);
2508 priv->is_open = 0;
2509 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 2510 return ret;
b481de9c
ZY		 2511}
2512
5b9f8cd3 2513static void iwl_mac_stop(struct ieee80211_hw *hw)
b481de9c 2514{
c79dd5b5 2515 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2516
2517 IWL_DEBUG_MAC80211("enter\n");
948c171c 2518
e655b9f0
ZY		 2519 if (!priv->is_open) {
2520 IWL_DEBUG_MAC80211("leave - skip\n");
2521 return;
2522 }
2523
b481de9c 2524 priv->is_open = 0;
5a66926a 2525
fee1247a 2526 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY		 2527 /* stop mac, cancel any scan request and clear
2528 * RXON_FILTER_ASSOC_MSK BIT
2529 */
5a66926a 2530 mutex_lock(&priv->mutex);
2a421b91 2531 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2532 mutex_unlock(&priv->mutex);
fde3571f
MA		 2533 }
2534
5b9f8cd3 2535 iwl_down(priv);
5a66926a
ZY		 2536
2537 flush_workqueue(priv->workqueue);
2538 free_irq(priv->pci_dev->irq, priv);
2539 pci_disable_msi(priv->pci_dev);
2540 pci_save_state(priv->pci_dev);
2541 pci_disable_device(priv->pci_dev);
948c171c 2542
b481de9c 2543 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 2544}
2545
5b9f8cd3 2546static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2547{
c79dd5b5 2548 struct iwl_priv *priv = hw->priv;
b481de9c 2549
f3674227 2550 IWL_DEBUG_MACDUMP("enter\n");
b481de9c 2551
b481de9c 2552 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2553 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2554
e039fa4a 2555 if (iwl_tx_skb(priv, skb))
b481de9c
ZY		 2556 dev_kfree_skb_any(skb);
2557
f3674227 2558 IWL_DEBUG_MACDUMP("leave\n");
b481de9c
ZY		 2559 return 0;
2560}
2561
5b9f8cd3 2562static int iwl_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 2563 struct ieee80211_if_init_conf *conf)
2564{
c79dd5b5 2565 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2566 unsigned long flags;
2567
32bfd35d 2568 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 2569
32bfd35d
JB		 2570 if (priv->vif) {
2571 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 2572 return -EOPNOTSUPP;
b481de9c
ZY		 2573 }
2574
2575 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2576 priv->vif = conf->vif;
60294de3 2577 priv->iw_mode = conf->type;
b481de9c
ZY		 2578
2579 spin_unlock_irqrestore(&priv->lock, flags);
2580
2581 mutex_lock(&priv->mutex);
864792e3
TW		 2582
2583 if (conf->mac_addr) {
e174961c 2584 IWL_DEBUG_MAC80211("Set %pM\n", conf->mac_addr);
864792e3
TW		 2585 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2586 }
b481de9c 2587
5b9f8cd3 2588 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
c46fbefa
AK		 2589 /* we are not ready, will run again when ready */
2590 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2591
b481de9c
ZY		 2592 mutex_unlock(&priv->mutex);
2593
5a66926a 2594 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 2595 return 0;
2596}
2597
2598/**
5b9f8cd3 2599 * iwl_mac_config - mac80211 config callback
b481de9c
ZY		 2600 *
2601 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2602 * be set inappropriately and the driver currently sets the hardware up to
2603 * use it whenever needed.
2604 */
5b9f8cd3 2605static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 2606{
c79dd5b5 2607 struct iwl_priv *priv = hw->priv;
bf85ea4f 2608 const struct iwl_channel_info *ch_info;
e8975581 2609 struct ieee80211_conf *conf = &hw->conf;
b481de9c 2610 unsigned long flags;
76bb77e0 2611 int ret = 0;
82a66bbb 2612 u16 channel;
b481de9c
ZY		 2613
2614 mutex_lock(&priv->mutex);
8318d78a 2615 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 2616
ae5eb026
JB		 2617 priv->current_ht_config.is_ht = conf->ht.enabled;
2618
14a08a7f 2619 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
64e72c3e 2620 IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
14a08a7f 2621 goto out;
64e72c3e
MA		 2622 }
2623
14a08a7f
EG		 2624 if (!conf->radio_enabled)
2625 iwl_radio_kill_sw_disable_radio(priv);
2626
fee1247a 2627 if (!iwl_is_ready(priv)) {
b481de9c 2628 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY		 2629 ret = -EIO;
2630 goto out;
b481de9c
ZY		 2631 }
2632
1ea87396 2633 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2634 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470 2635 IWL_DEBUG_MAC80211("leave - scanning\n");
b481de9c 2636 mutex_unlock(&priv->mutex);
a0646470 2637 return 0;
b481de9c
ZY		 2638 }
2639
82a66bbb
TW		 2640 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2641 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2642 if (!is_channel_valid(ch_info)) {
b481de9c 2643 IWL_DEBUG_MAC80211("leave - invalid channel\n");
76bb77e0
ZY		 2644 ret = -EINVAL;
2645 goto out;
b481de9c
ZY		 2646 }
2647
05c914fe 2648 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
398f9e76
AK		 2649 !is_channel_ibss(ch_info)) {
2650 IWL_ERROR("channel %d in band %d not IBSS channel\n",
2651 conf->channel->hw_value, conf->channel->band);
2652 ret = -EINVAL;
2653 goto out;
2654 }
2655
82a66bbb
TW		 2656 spin_lock_irqsave(&priv->lock, flags);
2657
b5d7be5e 2658
78330fdd 2659 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY		 2660 * from any ht related info since 2.4 does not
2661 * support ht */
82a66bbb 2662 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY		 2663#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2664 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2665#endif
2666 )
2667 priv->staging_rxon.flags = 0;
b481de9c 2668
17e72782 2669 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 2670
82a66bbb 2671 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY		 2672
2673 /* The list of supported rates and rate mask can be different
8318d78a 2674 * for each band; since the band may have changed, reset
b481de9c 2675 * the rate mask to what mac80211 lists */
5b9f8cd3 2676 iwl_set_rate(priv);
b481de9c
ZY		 2677
2678 spin_unlock_irqrestore(&priv->lock, flags);
2679
2680#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2681 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
5b9f8cd3 2682 iwl_hw_channel_switch(priv, conf->channel);
76bb77e0 2683 goto out;
b481de9c
ZY		 2684 }
2685#endif
2686
b481de9c
ZY		 2687 if (!conf->radio_enabled) {
2688 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 2689 goto out;
b481de9c
ZY		 2690 }
2691
fee1247a 2692 if (iwl_is_rfkill(priv)) {
b481de9c 2693 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY		 2694 ret = -EIO;
2695 goto out;
b481de9c
ZY		 2696 }
2697
e602cb18
EK		 2698 if (conf->flags & IEEE80211_CONF_PS)
2699 ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
2700 else
2701 ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
2702 if (ret)
2703 IWL_DEBUG_MAC80211("Error setting power level\n");
2704
630fe9b6
TW		 2705 IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
2706 priv->tx_power_user_lmt, conf->power_level);
2707
2708 iwl_set_tx_power(priv, conf->power_level, false);
2709
5b9f8cd3 2710 iwl_set_rate(priv);
b481de9c
ZY		 2711
2712 if (memcmp(&priv->active_rxon,
2713 &priv->staging_rxon, sizeof(priv->staging_rxon)))
5b9f8cd3 2714 iwl_commit_rxon(priv);
b481de9c
ZY		 2715 else
2716 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
2717
2718 IWL_DEBUG_MAC80211("leave\n");
2719
a0646470 2720out:
5a66926a 2721 mutex_unlock(&priv->mutex);
76bb77e0 2722 return ret;
b481de9c
ZY		 2723}
2724
5b9f8cd3 2725static void iwl_config_ap(struct iwl_priv *priv)
b481de9c 2726{
857485c0 2727 int ret = 0;
1ff50bda 2728 unsigned long flags;
b481de9c 2729
d986bcd1 2730 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY		 2731 return;
2732
2733 /* The following should be done only at AP bring up */
3195c1f3 2734 if (!iwl_is_associated(priv)) {
b481de9c
ZY		 2735
2736 /* RXON - unassoc (to set timing command) */
2737 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2738 iwl_commit_rxon(priv);
b481de9c
ZY		 2739
2740 /* RXON Timing */
3195c1f3 2741 iwl_setup_rxon_timing(priv);
857485c0 2742 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2743 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2744 if (ret)
b481de9c
ZY		 2745 IWL_WARNING("REPLY_RXON_TIMING failed - "
2746 "Attempting to continue.\n");
2747
c7de35cd 2748 iwl_set_rxon_chain(priv);
b481de9c
ZY		 2749
2750 /* FIXME: what should be the assoc_id for AP? */
2751 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2752 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2753 priv->staging_rxon.flags |=
2754 RXON_FLG_SHORT_PREAMBLE_MSK;
2755 else
2756 priv->staging_rxon.flags &=
2757 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2758
2759 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2760 if (priv->assoc_capability &
2761 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2762 priv->staging_rxon.flags |=
2763 RXON_FLG_SHORT_SLOT_MSK;
2764 else
2765 priv->staging_rxon.flags &=
2766 ~RXON_FLG_SHORT_SLOT_MSK;
2767
05c914fe 2768 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2769 priv->staging_rxon.flags &=
2770 ~RXON_FLG_SHORT_SLOT_MSK;
2771 }
2772 /* restore RXON assoc */
2773 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2774 iwl_commit_rxon(priv);
1ff50bda
EG		 2775 spin_lock_irqsave(&priv->lock, flags);
2776 iwl_activate_qos(priv, 1);
2777 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2778 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2779 }
5b9f8cd3 2780 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 2781
2782 /* FIXME - we need to add code here to detect a totally new
2783 * configuration, reset the AP, unassoc, rxon timing, assoc,
2784 * clear sta table, add BCAST sta... */
2785}
2786
9d139c81 2787
5b9f8cd3 2788static int iwl_mac_config_interface(struct ieee80211_hw *hw,
32bfd35d 2789 struct ieee80211_vif *vif,
b481de9c
ZY		 2790 struct ieee80211_if_conf *conf)
2791{
c79dd5b5 2792 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2793 int rc;
2794
2795 if (conf == NULL)
2796 return -EIO;
2797
b716bb91
EG		 2798 if (priv->vif != vif) {
2799 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG		 2800 return 0;
2801 }
2802
05c914fe 2803 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB		 2804 conf->changed & IEEE80211_IFCC_BEACON) {
2805 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2806 if (!beacon)
2807 return -ENOMEM;
ada17513 2808 mutex_lock(&priv->mutex);
5b9f8cd3 2809 rc = iwl_mac_beacon_update(hw, beacon);
ada17513 2810 mutex_unlock(&priv->mutex);
9d139c81
JB		 2811 if (rc)
2812 return rc;
2813 }
2814
fee1247a 2815 if (!iwl_is_alive(priv))
5a66926a
ZY		 2816 return -EAGAIN;
2817
b481de9c
ZY		 2818 mutex_lock(&priv->mutex);
2819
b481de9c 2820 if (conf->bssid)
e174961c 2821 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
b481de9c 2822
4150c572
JB		 2823/*
2824 * very dubious code was here; the probe filtering flag is never set:
2825 *
b481de9c
ZY		 2826 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2827 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 2828 */
b481de9c 2829
05c914fe 2830 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY		 2831 if (!conf->bssid) {
2832 conf->bssid = priv->mac_addr;
2833 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e174961c
JB		 2834 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
2835 conf->bssid);
b481de9c
ZY		 2836 }
2837 if (priv->ibss_beacon)
2838 dev_kfree_skb(priv->ibss_beacon);
2839
9d139c81 2840 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY		 2841 }
2842
fee1247a 2843 if (iwl_is_rfkill(priv))
fde3571f
MA		 2844 goto done;
2845
b481de9c
ZY		 2846 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
2847 !is_multicast_ether_addr(conf->bssid)) {
2848 /* If there is currently a HW scan going on in the background
2849 * then we need to cancel it else the RXON below will fail. */
2a421b91 2850 if (iwl_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY		 2851 IWL_WARNING("Aborted scan still in progress "
2852 "after 100ms\n");
2853 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2854 mutex_unlock(&priv->mutex);
2855 return -EAGAIN;
2856 }
2857 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
2858
2859 /* TODO: Audit driver for usage of these members and see
2860 * if mac80211 deprecates them (priv->bssid looks like it
2861 * shouldn't be there, but I haven't scanned the IBSS code
2862 * to verify) - jpk */
2863 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2864
05c914fe 2865 if (priv->iw_mode == NL80211_IFTYPE_AP)
5b9f8cd3 2866 iwl_config_ap(priv);
b481de9c 2867 else {
5b9f8cd3 2868 rc = iwl_commit_rxon(priv);
05c914fe 2869 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
4f40e4d9 2870 iwl_rxon_add_station(
b481de9c
ZY		 2871 priv, priv->active_rxon.bssid_addr, 1);
2872 }
2873
2874 } else {
2a421b91 2875 iwl_scan_cancel_timeout(priv, 100);
b481de9c 2876 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2877 iwl_commit_rxon(priv);
b481de9c
ZY		 2878 }
2879
fde3571f 2880 done:
b481de9c
ZY		 2881 IWL_DEBUG_MAC80211("leave\n");
2882 mutex_unlock(&priv->mutex);
2883
2884 return 0;
2885}
2886
5b9f8cd3 2887static void iwl_configure_filter(struct ieee80211_hw *hw,
4150c572
JB		 2888 unsigned int changed_flags,
2889 unsigned int *total_flags,
2890 int mc_count, struct dev_addr_list *mc_list)
2891{
4419e39b 2892 struct iwl_priv *priv = hw->priv;
25b3f57c
RF		 2893
2894 if (changed_flags & (*total_flags) & FIF_OTHER_BSS) {
2895 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
05c914fe 2896 NL80211_IFTYPE_MONITOR,
25b3f57c
RF		 2897 changed_flags, *total_flags);
2898 /* queue work 'cuz mac80211 is holding a lock which
2899 * prevents us from issuing (synchronous) f/w cmds */
2900 queue_work(priv->workqueue, &priv->set_monitor);
4419e39b 2901 }
25b3f57c
RF		 2902 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI |
2903 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
4150c572
JB		 2904}
2905
5b9f8cd3 2906static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 2907 struct ieee80211_if_init_conf *conf)
2908{
c79dd5b5 2909 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2910
2911 IWL_DEBUG_MAC80211("enter\n");
2912
2913 mutex_lock(&priv->mutex);
948c171c 2914
fee1247a 2915 if (iwl_is_ready_rf(priv)) {
2a421b91 2916 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2917 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2918 iwl_commit_rxon(priv);
fde3571f 2919 }
32bfd35d
JB		 2920 if (priv->vif == conf->vif) {
2921 priv->vif = NULL;
b481de9c 2922 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY		 2923 }
2924 mutex_unlock(&priv->mutex);
2925
2926 IWL_DEBUG_MAC80211("leave\n");
2927
2928}
471b3efd 2929
3109ece1 2930#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
5b9f8cd3 2931static void iwl_bss_info_changed(struct ieee80211_hw *hw,
471b3efd
JB		 2932 struct ieee80211_vif *vif,
2933 struct ieee80211_bss_conf *bss_conf,
2934 u32 changes)
220173b0 2935{
c79dd5b5 2936 struct iwl_priv *priv = hw->priv;
220173b0 2937
3109ece1
TW		 2938 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
2939
471b3efd 2940 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW		 2941 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
2942 bss_conf->use_short_preamble);
471b3efd 2943 if (bss_conf->use_short_preamble)
220173b0
TW		 2944 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2945 else
2946 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2947 }
2948
471b3efd 2949 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 2950 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 2951 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW		 2952 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2953 else
2954 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2955 }
2956
98952d5d 2957 if (changes & BSS_CHANGED_HT) {
5b9f8cd3 2958 iwl_ht_conf(priv, bss_conf);
c7de35cd 2959 iwl_set_rxon_chain(priv);
98952d5d
TW		 2960 }
2961
471b3efd 2962 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 2963 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC		 2964 /* This should never happen as this function should
2965 * never be called from interrupt context. */
2966 if (WARN_ON_ONCE(in_interrupt()))
2967 return;
3109ece1
TW		 2968 if (bss_conf->assoc) {
2969 priv->assoc_id = bss_conf->aid;
2970 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 2971 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW		 2972 priv->timestamp = bss_conf->timestamp;
2973 priv->assoc_capability = bss_conf->assoc_capability;
9ccacb86
TW		 2974
2975 /* we have just associated, don't start scan too early
2976 * leave time for EAPOL exchange to complete
2977 */
3109ece1
TW		 2978 priv->next_scan_jiffies = jiffies +
2979 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1 2980 mutex_lock(&priv->mutex);
5b9f8cd3 2981 iwl_post_associate(priv);
508e32e1 2982 mutex_unlock(&priv->mutex);
3109ece1
TW		 2983 } else {
2984 priv->assoc_id = 0;
2985 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
2986 }
2987 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2988 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 2989 iwl_send_rxon_assoc(priv);
471b3efd
JB		 2990 }
2991
220173b0 2992}
b481de9c 2993
cb43dc25 2994static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len)
b481de9c 2995{
b481de9c 2996 unsigned long flags;
c79dd5b5 2997 struct iwl_priv *priv = hw->priv;
8d09a5e1 2998 int ret;
b481de9c
ZY		 2999
3000 IWL_DEBUG_MAC80211("enter\n");
3001
052c4b9f 3002 mutex_lock(&priv->mutex);
b481de9c
ZY		 3003 spin_lock_irqsave(&priv->lock, flags);
3004
fee1247a 3005 if (!iwl_is_ready_rf(priv)) {
cb43dc25 3006 ret = -EIO;
b481de9c
ZY		 3007 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
3008 goto out_unlock;
3009 }
3010
05c914fe 3011 if (priv->iw_mode == NL80211_IFTYPE_AP) { /* APs don't scan */
cb43dc25 3012 ret = -EIO;
b481de9c
ZY		 3013 IWL_ERROR("ERROR: APs don't scan\n");
3014 goto out_unlock;
3015 }
3016
8d09a5e1
TW		 3017 /* We don't schedule scan within next_scan_jiffies period.
3018 * Avoid scanning during possible EAPOL exchange, return
3019 * success immediately.
3020 */
7878a5a4 3021 if (priv->next_scan_jiffies &&
cb43dc25 3022 time_after(priv->next_scan_jiffies, jiffies)) {
681c0050 3023 IWL_DEBUG_SCAN("scan rejected: within next scan period\n");
8d09a5e1
TW		 3024 queue_work(priv->workqueue, &priv->scan_completed);
3025 ret = 0;
7878a5a4
MA		 3026 goto out_unlock;
3027 }
8d09a5e1 3028
b481de9c 3029 /* if we just finished scan ask for delay */
681c0050 3030 if (iwl_is_associated(priv) && priv->last_scan_jiffies &&
cb43dc25 3031 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) {
681c0050 3032 IWL_DEBUG_SCAN("scan rejected: within previous scan period\n");
8d09a5e1
TW		 3033 queue_work(priv->workqueue, &priv->scan_completed);
3034 ret = 0;
b481de9c
ZY		 3035 goto out_unlock;
3036 }
8d09a5e1 3037
cb43dc25 3038 if (ssid_len) {
b481de9c 3039 priv->one_direct_scan = 1;
cb43dc25 3040 priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE);
b481de9c 3041 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
cb43dc25 3042 } else {
948c171c 3043 priv->one_direct_scan = 0;
cb43dc25 3044 }
b481de9c 3045
cb43dc25 3046 ret = iwl_scan_initiate(priv);
b481de9c
ZY		 3047
3048 IWL_DEBUG_MAC80211("leave\n");
3049
3050out_unlock:
3051 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 3052 mutex_unlock(&priv->mutex);
b481de9c 3053
cb43dc25 3054 return ret;
b481de9c
ZY		 3055}
3056
5b9f8cd3 3057static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
ab885f8c
EG		 3058 struct ieee80211_key_conf *keyconf, const u8 *addr,
3059 u32 iv32, u16 *phase1key)
3060{
ab885f8c 3061
9f58671e 3062 struct iwl_priv *priv = hw->priv;
ab885f8c
EG		 3063 IWL_DEBUG_MAC80211("enter\n");
3064
9f58671e 3065 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
ab885f8c
EG		 3066
3067 IWL_DEBUG_MAC80211("leave\n");
3068}
3069
5b9f8cd3 3070static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY		 3071 const u8 *local_addr, const u8 *addr,
3072 struct ieee80211_key_conf *key)
3073{
c79dd5b5 3074 struct iwl_priv *priv = hw->priv;
deb09c43
EG		 3075 int ret = 0;
3076 u8 sta_id = IWL_INVALID_STATION;
6974e363 3077 u8 is_default_wep_key = 0;
b481de9c
ZY		 3078
3079 IWL_DEBUG_MAC80211("enter\n");
3080
099b40b7 3081 if (priv->hw_params.sw_crypto) {
b481de9c
ZY		 3082 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
3083 return -EOPNOTSUPP;
3084 }
3085
3086 if (is_zero_ether_addr(addr))
3087 /* only support pairwise keys */
3088 return -EOPNOTSUPP;
3089
947b13a7 3090 sta_id = iwl_find_station(priv, addr);
6974e363 3091 if (sta_id == IWL_INVALID_STATION) {
e174961c
JB		 3092 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
3093 addr);
6974e363 3094 return -EINVAL;
b481de9c 3095
deb09c43 3096 }
b481de9c 3097
6974e363 3098 mutex_lock(&priv->mutex);
2a421b91 3099 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG		 3100 mutex_unlock(&priv->mutex);
3101
3102 /* If we are getting WEP group key and we didn't receive any key mapping
3103 * so far, we are in legacy wep mode (group key only), otherwise we are
3104 * in 1X mode.
3105 * In legacy wep mode, we use another host command to the uCode */
5425e490 3106 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
05c914fe 3107 priv->iw_mode != NL80211_IFTYPE_AP) {
6974e363
EG		 3108 if (cmd == SET_KEY)
3109 is_default_wep_key = !priv->key_mapping_key;
3110 else
ccc038ab
EG		 3111 is_default_wep_key =
3112 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 3113 }
052c4b9f 3114
b481de9c 3115 switch (cmd) {
deb09c43 3116 case SET_KEY:
6974e363
EG		 3117 if (is_default_wep_key)
3118 ret = iwl_set_default_wep_key(priv, key);
deb09c43 3119 else
7480513f 3120 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG		 3121
3122 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY		 3123 break;
3124 case DISABLE_KEY:
6974e363
EG		 3125 if (is_default_wep_key)
3126 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 3127 else
3ec47732 3128 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG		 3129
3130 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY		 3131 break;
3132 default:
deb09c43 3133 ret = -EINVAL;
b481de9c
ZY		 3134 }
3135
3136 IWL_DEBUG_MAC80211("leave\n");
b481de9c 3137
deb09c43 3138 return ret;
b481de9c
ZY		 3139}
3140
5b9f8cd3 3141static int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY		 3142 const struct ieee80211_tx_queue_params *params)
3143{
c79dd5b5 3144 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 3145 unsigned long flags;
3146 int q;
b481de9c
ZY		 3147
3148 IWL_DEBUG_MAC80211("enter\n");
3149
fee1247a 3150 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 3151 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3152 return -EIO;
3153 }
3154
3155 if (queue >= AC_NUM) {
3156 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
3157 return 0;
3158 }
3159
b481de9c
ZY		 3160 if (!priv->qos_data.qos_enable) {
3161 priv->qos_data.qos_active = 0;
3162 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
3163 return 0;
3164 }
3165 q = AC_NUM - 1 - queue;
3166
3167 spin_lock_irqsave(&priv->lock, flags);
3168
3169 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
3170 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
3171 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
3172 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 3173 cpu_to_le16((params->txop * 32));
b481de9c
ZY		 3174
3175 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
3176 priv->qos_data.qos_active = 1;
3177
05c914fe 3178 if (priv->iw_mode == NL80211_IFTYPE_AP)
1ff50bda 3179 iwl_activate_qos(priv, 1);
3109ece1 3180 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 3181 iwl_activate_qos(priv, 0);
b481de9c 3182
1ff50bda 3183 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3184
b481de9c
ZY		 3185 IWL_DEBUG_MAC80211("leave\n");
3186 return 0;
3187}
3188
5b9f8cd3 3189static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
d783b061 3190 enum ieee80211_ampdu_mlme_action action,
17741cdc 3191 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
d783b061
TW		 3192{
3193 struct iwl_priv *priv = hw->priv;
d783b061 3194
e174961c
JB		 3195 IWL_DEBUG_HT("A-MPDU action on addr %pM tid %d\n",
3196 sta->addr, tid);
d783b061
TW		 3197
3198 if (!(priv->cfg->sku & IWL_SKU_N))
3199 return -EACCES;
3200
3201 switch (action) {
3202 case IEEE80211_AMPDU_RX_START:
3203 IWL_DEBUG_HT("start Rx\n");
9f58671e 3204 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
d783b061
TW		 3205 case IEEE80211_AMPDU_RX_STOP:
3206 IWL_DEBUG_HT("stop Rx\n");
9f58671e 3207 return iwl_sta_rx_agg_stop(priv, sta->addr, tid);
d783b061
TW		 3208 case IEEE80211_AMPDU_TX_START:
3209 IWL_DEBUG_HT("start Tx\n");
17741cdc 3210 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
d783b061
TW		 3211 case IEEE80211_AMPDU_TX_STOP:
3212 IWL_DEBUG_HT("stop Tx\n");
17741cdc 3213 return iwl_tx_agg_stop(priv, sta->addr, tid);
d783b061
TW		 3214 default:
3215 IWL_DEBUG_HT("unknown\n");
3216 return -EINVAL;
3217 break;
3218 }
3219 return 0;
3220}
9f58671e 3221
5b9f8cd3 3222static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 3223 struct ieee80211_tx_queue_stats *stats)
3224{
c79dd5b5 3225 struct iwl_priv *priv = hw->priv;
b481de9c 3226 int i, avail;
16466903 3227 struct iwl_tx_queue *txq;
443cfd45 3228 struct iwl_queue *q;
b481de9c
ZY		 3229 unsigned long flags;
3230
3231 IWL_DEBUG_MAC80211("enter\n");
3232
fee1247a 3233 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 3234 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3235 return -EIO;
3236 }
3237
3238 spin_lock_irqsave(&priv->lock, flags);
3239
3240 for (i = 0; i < AC_NUM; i++) {
3241 txq = &priv->txq[i];
3242 q = &txq->q;
443cfd45 3243 avail = iwl_queue_space(q);
b481de9c 3244
57ffc589
JB		 3245 stats[i].len = q->n_window - avail;
3246 stats[i].limit = q->n_window - q->high_mark;
3247 stats[i].count = q->n_window;
b481de9c
ZY		 3248
3249 }
3250 spin_unlock_irqrestore(&priv->lock, flags);
3251
3252 IWL_DEBUG_MAC80211("leave\n");
3253
3254 return 0;
3255}
3256
5b9f8cd3 3257static int iwl_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 3258 struct ieee80211_low_level_stats *stats)
3259{
bf403db8
EK		 3260 struct iwl_priv *priv = hw->priv;
3261
3262 priv = hw->priv;
b481de9c
ZY		 3263 IWL_DEBUG_MAC80211("enter\n");
3264 IWL_DEBUG_MAC80211("leave\n");
3265
3266 return 0;
3267}
3268
5b9f8cd3 3269static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3270{
c79dd5b5 3271 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 3272 unsigned long flags;
3273
3274 mutex_lock(&priv->mutex);
3275 IWL_DEBUG_MAC80211("enter\n");
3276
b481de9c 3277 spin_lock_irqsave(&priv->lock, flags);
fd105e79 3278 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 3279 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3280
c7de35cd 3281 iwl_reset_qos(priv);
b481de9c 3282
b481de9c
ZY		 3283 spin_lock_irqsave(&priv->lock, flags);
3284 priv->assoc_id = 0;
3285 priv->assoc_capability = 0;
b481de9c
ZY		 3286 priv->assoc_station_added = 0;
3287
3288 /* new association get rid of ibss beacon skb */
3289 if (priv->ibss_beacon)
3290 dev_kfree_skb(priv->ibss_beacon);
3291
3292 priv->ibss_beacon = NULL;
3293
3294 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 3295 priv->timestamp = 0;
05c914fe 3296 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY		 3297 priv->beacon_int = 0;
3298
3299 spin_unlock_irqrestore(&priv->lock, flags);
3300
fee1247a 3301 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA		 3302 IWL_DEBUG_MAC80211("leave - not ready\n");
3303 mutex_unlock(&priv->mutex);
3304 return;
3305 }
3306
052c4b9f 3307 /* we are restarting association process
3308 * clear RXON_FILTER_ASSOC_MSK bit
3309 */
05c914fe 3310 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2a421b91 3311 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 3312 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 3313 iwl_commit_rxon(priv);
052c4b9f 3314 }
3315
5da4b55f
MA		 3316 iwl_power_update_mode(priv, 0);
3317
b481de9c 3318 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 3319 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
052c4b9f 3320
c90a74ba
EG		 3321 /* switch to CAM during association period.
3322 * the ucode will block any association/authentication
3323 * frome during assiciation period if it can not hear
3324 * the AP because of PM. the timer enable PM back is
3325 * association do not complete
3326 */
3327 if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN |
3328 IEEE80211_CHAN_RADAR))
3329 iwl_power_disable_management(priv, 3000);
3330
b481de9c
ZY		 3331 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
3332 mutex_unlock(&priv->mutex);
3333 return;
3334 }
3335
5b9f8cd3 3336 iwl_set_rate(priv);
b481de9c
ZY		 3337
3338 mutex_unlock(&priv->mutex);
3339
3340 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 3341}
3342
5b9f8cd3 3343static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3344{
c79dd5b5 3345 struct iwl_priv *priv = hw->priv;
b481de9c 3346 unsigned long flags;
2ff75b78 3347 __le64 timestamp;
b481de9c 3348
b481de9c
ZY		 3349 IWL_DEBUG_MAC80211("enter\n");
3350
fee1247a 3351 if (!iwl_is_ready_rf(priv)) {
b481de9c 3352 IWL_DEBUG_MAC80211("leave - RF not ready\n");
b481de9c
ZY		 3353 return -EIO;
3354 }
3355
05c914fe 3356 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
b481de9c 3357 IWL_DEBUG_MAC80211("leave - not IBSS\n");
b481de9c
ZY		 3358 return -EIO;
3359 }
3360
3361 spin_lock_irqsave(&priv->lock, flags);
3362
3363 if (priv->ibss_beacon)
3364 dev_kfree_skb(priv->ibss_beacon);
3365
3366 priv->ibss_beacon = skb;
3367
3368 priv->assoc_id = 0;
2ff75b78 3369 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b94d8eea 3370 priv->timestamp = le64_to_cpu(timestamp);
b481de9c
ZY		 3371
3372 IWL_DEBUG_MAC80211("leave\n");
3373 spin_unlock_irqrestore(&priv->lock, flags);
3374
c7de35cd 3375 iwl_reset_qos(priv);
b481de9c 3376
5b9f8cd3 3377 iwl_post_associate(priv);
b481de9c 3378
b481de9c
ZY		 3379
3380 return 0;
3381}
3382
b481de9c
ZY		 3383/*****************************************************************************
3384 *
3385 * sysfs attributes
3386 *
3387 *****************************************************************************/
3388
0a6857e7 3389#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 3390
3391/*
3392 * The following adds a new attribute to the sysfs representation
3393 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3394 * used for controlling the debug level.
3395 *
3396 * See the level definitions in iwl for details.
3397 */
3398
8cf769c6
EK		 3399static ssize_t show_debug_level(struct device *d,
3400 struct device_attribute *attr, char *buf)
b481de9c 3401{
8cf769c6
EK		 3402 struct iwl_priv *priv = d->driver_data;
3403
3404 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3405}
8cf769c6
EK		 3406static ssize_t store_debug_level(struct device *d,
3407 struct device_attribute *attr,
b481de9c
ZY		 3408 const char *buf, size_t count)
3409{
8cf769c6 3410 struct iwl_priv *priv = d->driver_data;
9257746f
TW		 3411 unsigned long val;
3412 int ret;
b481de9c 3413
9257746f
TW		 3414 ret = strict_strtoul(buf, 0, &val);
3415 if (ret)
b481de9c
ZY		 3416 printk(KERN_INFO DRV_NAME
3417 ": %s is not in hex or decimal form.\n", buf);
3418 else
8cf769c6 3419 priv->debug_level = val;
b481de9c
ZY		 3420
3421 return strnlen(buf, count);
3422}
3423
8cf769c6
EK		 3424static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3425 show_debug_level, store_debug_level);
3426
b481de9c 3427
0a6857e7 3428#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3429
b481de9c 3430
bc6f59bc
TW		 3431static ssize_t show_version(struct device *d,
3432 struct device_attribute *attr, char *buf)
3433{
3434 struct iwl_priv *priv = d->driver_data;
885ba202 3435 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW		 3436 ssize_t pos = 0;
3437 u16 eeprom_ver;
bc6f59bc
TW		 3438
3439 if (palive->is_valid)
f236a265
TW		 3440 pos += sprintf(buf + pos,
3441 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3442 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW		 3443 palive->ucode_major, palive->ucode_minor,
3444 palive->sw_rev[0], palive->sw_rev[1],
3445 palive->ver_type, palive->ver_subtype);
bc6f59bc 3446 else
f236a265
TW		 3447 pos += sprintf(buf + pos, "fw not loaded\n");
3448
3449 if (priv->eeprom) {
3450 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3451 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3452 eeprom_ver);
3453 } else {
3454 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3455 }
3456
3457 return pos;
bc6f59bc
TW		 3458}
3459
3460static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3461
b481de9c
ZY		 3462static ssize_t show_temperature(struct device *d,
3463 struct device_attribute *attr, char *buf)
3464{
c79dd5b5 3465 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3466
fee1247a 3467 if (!iwl_is_alive(priv))
b481de9c
ZY		 3468 return -EAGAIN;
3469
91dbc5bd 3470 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY		 3471}
3472
3473static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3474
b481de9c
ZY		 3475static ssize_t show_tx_power(struct device *d,
3476 struct device_attribute *attr, char *buf)
3477{
c79dd5b5 3478 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
630fe9b6 3479 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY		 3480}
3481
3482static ssize_t store_tx_power(struct device *d,
3483 struct device_attribute *attr,
3484 const char *buf, size_t count)
3485{
c79dd5b5 3486 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3487 unsigned long val;
3488 int ret;
b481de9c 3489
9257746f
TW		 3490 ret = strict_strtoul(buf, 10, &val);
3491 if (ret)
b481de9c
ZY		 3492 printk(KERN_INFO DRV_NAME
3493 ": %s is not in decimal form.\n", buf);
3494 else
630fe9b6 3495 iwl_set_tx_power(priv, val, false);
b481de9c
ZY		 3496
3497 return count;
3498}
3499
3500static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3501
3502static ssize_t show_flags(struct device *d,
3503 struct device_attribute *attr, char *buf)
3504{
c79dd5b5 3505 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 3506
3507 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3508}
3509
3510static ssize_t store_flags(struct device *d,
3511 struct device_attribute *attr,
3512 const char *buf, size_t count)
3513{
c79dd5b5 3514 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3515 unsigned long val;
3516 u32 flags;
3517 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3518 if (ret)
9257746f
TW		 3519 return ret;
3520 flags = (u32)val;
b481de9c
ZY		 3521
3522 mutex_lock(&priv->mutex);
3523 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3524 /* Cancel any currently running scans... */
2a421b91 3525 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 3526 IWL_WARNING("Could not cancel scan.\n");
3527 else {
9257746f 3528 IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags);
b481de9c 3529 priv->staging_rxon.flags = cpu_to_le32(flags);
5b9f8cd3 3530 iwl_commit_rxon(priv);
b481de9c
ZY		 3531 }
3532 }
3533 mutex_unlock(&priv->mutex);
3534
3535 return count;
3536}
3537
3538static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3539
3540static ssize_t show_filter_flags(struct device *d,
3541 struct device_attribute *attr, char *buf)
3542{
c79dd5b5 3543 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 3544
3545 return sprintf(buf, "0x%04X\n",
3546 le32_to_cpu(priv->active_rxon.filter_flags));
3547}
3548
3549static ssize_t store_filter_flags(struct device *d,
3550 struct device_attribute *attr,
3551 const char *buf, size_t count)
3552{
c79dd5b5 3553 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3554 unsigned long val;
3555 u32 filter_flags;
3556 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3557 if (ret)
9257746f
TW		 3558 return ret;
3559 filter_flags = (u32)val;
b481de9c
ZY		 3560
3561 mutex_lock(&priv->mutex);
3562 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3563 /* Cancel any currently running scans... */
2a421b91 3564 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 3565 IWL_WARNING("Could not cancel scan.\n");
3566 else {
3567 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
3568 "0x%04X\n", filter_flags);
3569 priv->staging_rxon.filter_flags =
3570 cpu_to_le32(filter_flags);
5b9f8cd3 3571 iwl_commit_rxon(priv);
b481de9c
ZY		 3572 }
3573 }
3574 mutex_unlock(&priv->mutex);
3575
3576 return count;
3577}
3578
3579static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3580 store_filter_flags);
3581
b481de9c
ZY		 3582static ssize_t store_retry_rate(struct device *d,
3583 struct device_attribute *attr,
3584 const char *buf, size_t count)
3585{
c79dd5b5 3586 struct iwl_priv *priv = dev_get_drvdata(d);
9257746f
TW		 3587 long val;
3588 int ret = strict_strtol(buf, 10, &val);
3589 if (!ret)
3590 return ret;
b481de9c 3591
9257746f 3592 priv->retry_rate = (val > 0) ? val : 1;
b481de9c
ZY		 3593
3594 return count;
3595}
3596
3597static ssize_t show_retry_rate(struct device *d,
3598 struct device_attribute *attr, char *buf)
3599{
c79dd5b5 3600 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 3601 return sprintf(buf, "%d", priv->retry_rate);
3602}
3603
3604static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3605 store_retry_rate);
3606
3607static ssize_t store_power_level(struct device *d,
3608 struct device_attribute *attr,
3609 const char *buf, size_t count)
3610{
c79dd5b5 3611 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3612 int ret;
9257746f
TW		 3613 unsigned long mode;
3614
b481de9c 3615
b481de9c
ZY		 3616 mutex_lock(&priv->mutex);
3617
fee1247a 3618 if (!iwl_is_ready(priv)) {
298df1f6 3619 ret = -EAGAIN;
b481de9c
ZY		 3620 goto out;
3621 }
3622
9257746f 3623 ret = strict_strtoul(buf, 10, &mode);
926f0b2e 3624 if (ret)
9257746f
TW		 3625 goto out;
3626
298df1f6
EK		 3627 ret = iwl_power_set_user_mode(priv, mode);
3628 if (ret) {
5da4b55f
MA		 3629 IWL_DEBUG_MAC80211("failed setting power mode.\n");
3630 goto out;
b481de9c 3631 }
298df1f6 3632 ret = count;
b481de9c
ZY		 3633
3634 out:
3635 mutex_unlock(&priv->mutex);
298df1f6 3636 return ret;
b481de9c
ZY		 3637}
3638
b481de9c
ZY		 3639static ssize_t show_power_level(struct device *d,
3640 struct device_attribute *attr, char *buf)
3641{
c79dd5b5 3642 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK		 3643 int mode = priv->power_data.user_power_setting;
3644 int system = priv->power_data.system_power_setting;
5da4b55f 3645 int level = priv->power_data.power_mode;
b481de9c
ZY		 3646 char *p = buf;
3647
298df1f6
EK		 3648 switch (system) {
3649 case IWL_POWER_SYS_AUTO:
3650 p += sprintf(p, "SYSTEM:auto");
b481de9c 3651 break;
298df1f6
EK		 3652 case IWL_POWER_SYS_AC:
3653 p += sprintf(p, "SYSTEM:ac");
3654 break;
3655 case IWL_POWER_SYS_BATTERY:
3656 p += sprintf(p, "SYSTEM:battery");
b481de9c 3657 break;
b481de9c 3658 }
298df1f6
EK		 3659
3660 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO)?"fixed":"auto");
3661 p += sprintf(p, "\tINDEX:%d", level);
3662 p += sprintf(p, "\n");
3ac7f146 3663 return p - buf + 1;
b481de9c
ZY		 3664}
3665
3666static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3667 store_power_level);
3668
3669static ssize_t show_channels(struct device *d,
3670 struct device_attribute *attr, char *buf)
3671{
5d72a1f5
EK		 3672
3673 struct iwl_priv *priv = dev_get_drvdata(d);
3674 struct ieee80211_channel *channels = NULL;
3675 const struct ieee80211_supported_band *supp_band = NULL;
3676 int len = 0, i;
3677 int count = 0;
3678
3679 if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status))
3680 return -EAGAIN;
3681
3682 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ);
3683 channels = supp_band->channels;
3684 count = supp_band->n_channels;
3685
3686 len += sprintf(&buf[len],
3687 "Displaying %d channels in 2.4GHz band "
3688 "(802.11bg):\n", count);
3689
3690 for (i = 0; i < count; i++)
3691 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3692 ieee80211_frequency_to_channel(
3693 channels[i].center_freq),
3694 channels[i].max_power,
3695 channels[i].flags & IEEE80211_CHAN_RADAR ?
3696 " (IEEE 802.11h required)" : "",
3697 (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3698 || (channels[i].flags &
3699 IEEE80211_CHAN_RADAR)) ? "" :
3700 ", IBSS",
3701 channels[i].flags &
3702 IEEE80211_CHAN_PASSIVE_SCAN ?
3703 "passive only" : "active/passive");
3704
3705 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
3706 channels = supp_band->channels;
3707 count = supp_band->n_channels;
3708
3709 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
3710 "(802.11a):\n", count);
3711
3712 for (i = 0; i < count; i++)
3713 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3714 ieee80211_frequency_to_channel(
3715 channels[i].center_freq),
3716 channels[i].max_power,
3717 channels[i].flags & IEEE80211_CHAN_RADAR ?
3718 " (IEEE 802.11h required)" : "",
3719 ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3720 || (channels[i].flags &
3721 IEEE80211_CHAN_RADAR)) ? "" :
3722 ", IBSS",
3723 channels[i].flags &
3724 IEEE80211_CHAN_PASSIVE_SCAN ?
3725 "passive only" : "active/passive");
3726
3727 return len;
b481de9c
ZY		 3728}
3729
3730static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3731
3732static ssize_t show_statistics(struct device *d,
3733 struct device_attribute *attr, char *buf)
3734{
c79dd5b5 3735 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 3736 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 3737 u32 len = 0, ofs = 0;
3ac7f146 3738 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY		 3739 int rc = 0;
3740
fee1247a 3741 if (!iwl_is_alive(priv))
b481de9c
ZY		 3742 return -EAGAIN;
3743
3744 mutex_lock(&priv->mutex);
49ea8596 3745 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY		 3746 mutex_unlock(&priv->mutex);
3747
3748 if (rc) {
3749 len = sprintf(buf,
3750 "Error sending statistics request: 0x%08X\n", rc);
3751 return len;
3752 }
3753
3754 while (size && (PAGE_SIZE - len)) {
3755 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3756 PAGE_SIZE - len, 1);
3757 len = strlen(buf);
3758 if (PAGE_SIZE - len)
3759 buf[len++] = '\n';
3760
3761 ofs += 16;
3762 size -= min(size, 16U);
3763 }
3764
3765 return len;
3766}
3767
3768static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3769
b481de9c
ZY		 3770static ssize_t show_status(struct device *d,
3771 struct device_attribute *attr, char *buf)
3772{
c79dd5b5 3773 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 3774 if (!iwl_is_alive(priv))
b481de9c
ZY		 3775 return -EAGAIN;
3776 return sprintf(buf, "0x%08x\n", (int)priv->status);
3777}
3778
3779static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3780
b481de9c
ZY		 3781/*****************************************************************************
3782 *
3783 * driver setup and teardown
3784 *
3785 *****************************************************************************/
3786
4e39317d 3787static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY		 3788{
3789 priv->workqueue = create_workqueue(DRV_NAME);
3790
3791 init_waitqueue_head(&priv->wait_command_queue);
3792
5b9f8cd3
EG		 3793 INIT_WORK(&priv->up, iwl_bg_up);
3794 INIT_WORK(&priv->restart, iwl_bg_restart);
3795 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3796 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
3797 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3798 INIT_WORK(&priv->set_monitor, iwl_bg_set_monitor);
16e727e8 3799 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW		 3800 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3801 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91 3802
2a421b91 3803 iwl_setup_scan_deferred_work(priv);
c90a74ba 3804 iwl_setup_power_deferred_work(priv);
bb8c093b 3805
4e39317d
EG		 3806 if (priv->cfg->ops->lib->setup_deferred_work)
3807 priv->cfg->ops->lib->setup_deferred_work(priv);
3808
3809 init_timer(&priv->statistics_periodic);
3810 priv->statistics_periodic.data = (unsigned long)priv;
5b9f8cd3 3811 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
b481de9c
ZY		 3812
3813 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
5b9f8cd3 3814 iwl_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 3815}
3816
4e39317d 3817static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 3818{
4e39317d
EG		 3819 if (priv->cfg->ops->lib->cancel_deferred_work)
3820 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 3821
3ae6a054 3822 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c 3823 cancel_delayed_work(&priv->scan_check);
c90a74ba 3824 cancel_delayed_work_sync(&priv->set_power_save);
b481de9c 3825 cancel_delayed_work(&priv->alive_start);
b481de9c 3826 cancel_work_sync(&priv->beacon_update);
4e39317d 3827 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY		 3828}
3829
5b9f8cd3 3830static struct attribute *iwl_sysfs_entries[] = {
b481de9c 3831 &dev_attr_channels.attr,
b481de9c
ZY		 3832 &dev_attr_flags.attr,
3833 &dev_attr_filter_flags.attr,
b481de9c
ZY		 3834 &dev_attr_power_level.attr,
3835 &dev_attr_retry_rate.attr,
b481de9c
ZY		 3836 &dev_attr_statistics.attr,
3837 &dev_attr_status.attr,
3838 &dev_attr_temperature.attr,
b481de9c 3839 &dev_attr_tx_power.attr,
8cf769c6
EK		 3840#ifdef CONFIG_IWLWIFI_DEBUG
3841 &dev_attr_debug_level.attr,
3842#endif
bc6f59bc 3843 &dev_attr_version.attr,
b481de9c
ZY		 3844
3845 NULL
3846};
3847
5b9f8cd3 3848static struct attribute_group iwl_attribute_group = {
b481de9c 3849 .name = NULL, /* put in device directory */
5b9f8cd3 3850 .attrs = iwl_sysfs_entries,
b481de9c
ZY		 3851};
3852
5b9f8cd3
EG		 3853static struct ieee80211_ops iwl_hw_ops = {
3854 .tx = iwl_mac_tx,
3855 .start = iwl_mac_start,
3856 .stop = iwl_mac_stop,
3857 .add_interface = iwl_mac_add_interface,
3858 .remove_interface = iwl_mac_remove_interface,
3859 .config = iwl_mac_config,
3860 .config_interface = iwl_mac_config_interface,
3861 .configure_filter = iwl_configure_filter,
3862 .set_key = iwl_mac_set_key,
3863 .update_tkip_key = iwl_mac_update_tkip_key,
3864 .get_stats = iwl_mac_get_stats,
3865 .get_tx_stats = iwl_mac_get_tx_stats,
3866 .conf_tx = iwl_mac_conf_tx,
3867 .reset_tsf = iwl_mac_reset_tsf,
3868 .bss_info_changed = iwl_bss_info_changed,
3869 .ampdu_action = iwl_mac_ampdu_action,
cb43dc25 3870 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY		 3871};
3872
5b9f8cd3 3873static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 3874{
3875 int err = 0;
c79dd5b5 3876 struct iwl_priv *priv;
b481de9c 3877 struct ieee80211_hw *hw;
82b9a121 3878 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 3879 unsigned long flags;
b481de9c 3880
316c30d9
AK		 3881 /************************
3882 * 1. Allocating HW data
3883 ************************/
3884
6440adb5
BC		 3885 /* Disabling hardware scan means that mac80211 will perform scans
3886 * "the hard way", rather than using device's scan. */
1ea87396 3887 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK		 3888 if (cfg->mod_params->debug & IWL_DL_INFO)
3889 dev_printk(KERN_DEBUG, &(pdev->dev),
3890 "Disabling hw_scan\n");
5b9f8cd3 3891 iwl_hw_ops.hw_scan = NULL;
b481de9c
ZY		 3892 }
3893
5b9f8cd3 3894 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
1d0a082d 3895 if (!hw) {
b481de9c
ZY		 3896 err = -ENOMEM;
3897 goto out;
3898 }
1d0a082d
AK		 3899 priv = hw->priv;
3900 /* At this point both hw and priv are allocated. */
3901
b481de9c
ZY		 3902 SET_IEEE80211_DEV(hw, &pdev->dev);
3903
3904 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 3905 priv->cfg = cfg;
b481de9c 3906 priv->pci_dev = pdev;
316c30d9 3907
0a6857e7 3908#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 3909 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY		 3910 atomic_set(&priv->restrict_refcnt, 0);
3911#endif
b481de9c 3912
316c30d9
AK		 3913 /**************************
3914 * 2. Initializing PCI bus
3915 **************************/
3916 if (pci_enable_device(pdev)) {
3917 err = -ENODEV;
3918 goto out_ieee80211_free_hw;
3919 }
3920
3921 pci_set_master(pdev);
3922
093d874c 3923 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
316c30d9 3924 if (!err)
093d874c 3925 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
cc2a8ea8 3926 if (err) {
093d874c 3927 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3928 if (!err)
093d874c 3929 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3930 /* both attempts failed: */
316c30d9 3931 if (err) {
cc2a8ea8
RR		 3932 printk(KERN_WARNING "%s: No suitable DMA available.\n",
3933 DRV_NAME);
316c30d9 3934 goto out_pci_disable_device;
cc2a8ea8 3935 }
316c30d9
AK		 3936 }
3937
3938 err = pci_request_regions(pdev, DRV_NAME);
3939 if (err)
3940 goto out_pci_disable_device;
3941
3942 pci_set_drvdata(pdev, priv);
3943
316c30d9
AK		 3944
3945 /***********************
3946 * 3. Read REV register
3947 ***********************/
3948 priv->hw_base = pci_iomap(pdev, 0, 0);
3949 if (!priv->hw_base) {
3950 err = -ENODEV;
3951 goto out_pci_release_regions;
3952 }
3953
3954 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
3955 (unsigned long long) pci_resource_len(pdev, 0));
3956 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
3957
b661c819 3958 iwl_hw_detect(priv);
316c30d9 3959 printk(KERN_INFO DRV_NAME
b661c819
TW		 3960 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3961 priv->cfg->name, priv->hw_rev);
316c30d9 3962
e7b63581
TW		 3963 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3964 * PCI Tx retries from interfering with C3 CPU state */
3965 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3966
91238714
TW		 3967 /* amp init */
3968 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 3969 if (err < 0) {
91238714 3970 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK		 3971 goto out_iounmap;
3972 }
91238714
TW		 3973 /*****************
3974 * 4. Read EEPROM
3975 *****************/
316c30d9
AK		 3976 /* Read the EEPROM */
3977 err = iwl_eeprom_init(priv);
3978 if (err) {
3979 IWL_ERROR("Unable to init EEPROM\n");
3980 goto out_iounmap;
3981 }
8614f360
TW		 3982 err = iwl_eeprom_check_version(priv);
3983 if (err)
3984 goto out_iounmap;
3985
02883017 3986 /* extract MAC Address */
316c30d9 3987 iwl_eeprom_get_mac(priv, priv->mac_addr);
e174961c 3988 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
316c30d9
AK		 3989 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3990
3991 /************************
3992 * 5. Setup HW constants
3993 ************************/
da154e30 3994 if (iwl_set_hw_params(priv)) {
5425e490 3995 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 3996 goto out_free_eeprom;
316c30d9
AK		 3997 }
3998
3999 /*******************
6ba87956 4000 * 6. Setup priv
316c30d9 4001 *******************/
b481de9c 4002
6ba87956 4003 err = iwl_init_drv(priv);
bf85ea4f 4004 if (err)
399f4900 4005 goto out_free_eeprom;
bf85ea4f 4006 /* At this point both hw and priv are initialized. */
316c30d9
AK		 4007
4008 /**********************************
4009 * 7. Initialize module parameters
4010 **********************************/
4011
4012 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 4013 if (priv->cfg->mod_params->disable) {
316c30d9
AK		 4014 set_bit(STATUS_RF_KILL_SW, &priv->status);
4015 IWL_DEBUG_INFO("Radio disabled.\n");
4016 }
4017
316c30d9
AK		 4018 /********************
4019 * 8. Setup services
4020 ********************/
0359facc 4021 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 4022 iwl_disable_interrupts(priv);
0359facc 4023 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9 4024
5b9f8cd3 4025 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
316c30d9
AK		 4026 if (err) {
4027 IWL_ERROR("failed to create sysfs device attributes\n");
6ba87956 4028 goto out_uninit_drv;
316c30d9
AK		 4029 }
4030
316c30d9 4031
4e39317d 4032 iwl_setup_deferred_work(priv);
653fa4a0 4033 iwl_setup_rx_handlers(priv);
316c30d9
AK		 4034
4035 /********************
4036 * 9. Conclude
4037 ********************/
5a66926a
ZY		 4038 pci_save_state(pdev);
4039 pci_disable_device(pdev);
b481de9c 4040
6ba87956
TW		 4041 /**********************************
4042 * 10. Setup and register mac80211
4043 **********************************/
4044
4045 err = iwl_setup_mac(priv);
4046 if (err)
4047 goto out_remove_sysfs;
4048
4049 err = iwl_dbgfs_register(priv, DRV_NAME);
4050 if (err)
4051 IWL_ERROR("failed to create debugfs files\n");
4052
58d0f361
EG		 4053 err = iwl_rfkill_init(priv);
4054 if (err)
4055 IWL_ERROR("Unable to initialize RFKILL system. "
4056 "Ignoring error: %d\n", err);
4057 iwl_power_initialize(priv);
b481de9c
ZY		 4058 return 0;
4059
316c30d9 4060 out_remove_sysfs:
5b9f8cd3 4061 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
6ba87956
TW		 4062 out_uninit_drv:
4063 iwl_uninit_drv(priv);
073d3f5f
TW		 4064 out_free_eeprom:
4065 iwl_eeprom_free(priv);
b481de9c
ZY		 4066 out_iounmap:
4067 pci_iounmap(pdev, priv->hw_base);
4068 out_pci_release_regions:
4069 pci_release_regions(pdev);
316c30d9 4070 pci_set_drvdata(pdev, NULL);
b481de9c
ZY		 4071 out_pci_disable_device:
4072 pci_disable_device(pdev);
b481de9c
ZY		 4073 out_ieee80211_free_hw:
4074 ieee80211_free_hw(priv->hw);
4075 out:
4076 return err;
4077}
4078
5b9f8cd3 4079static void __devexit iwl_pci_remove(struct pci_dev *pdev)
b481de9c 4080{
c79dd5b5 4081 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 4082 unsigned long flags;
b481de9c
ZY		 4083
4084 if (!priv)
4085 return;
4086
4087 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
4088
67249625 4089 iwl_dbgfs_unregister(priv);
5b9f8cd3 4090 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
67249625 4091
5b9f8cd3
EG		 4092 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4093 * to be called and iwl_down since we are removing the device
0b124c31
GG		 4094 * we need to set STATUS_EXIT_PENDING bit.
4095 */
4096 set_bit(STATUS_EXIT_PENDING, &priv->status);
c4f55232
RR		 4097 if (priv->mac80211_registered) {
4098 ieee80211_unregister_hw(priv->hw);
4099 priv->mac80211_registered = 0;
0b124c31 4100 } else {
5b9f8cd3 4101 iwl_down(priv);
c4f55232
RR		 4102 }
4103
0359facc
MA		 4104 /* make sure we flush any pending irq or
4105 * tasklet for the driver
4106 */
4107 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 4108 iwl_disable_interrupts(priv);
0359facc
MA		 4109 spin_unlock_irqrestore(&priv->lock, flags);
4110
4111 iwl_synchronize_irq(priv);
4112
58d0f361 4113 iwl_rfkill_unregister(priv);
5b9f8cd3 4114 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY		 4115
4116 if (priv->rxq.bd)
a55360e4 4117 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 4118 iwl_hw_txq_ctx_free(priv);
b481de9c 4119
37deb2a0 4120 iwl_clear_stations_table(priv);
073d3f5f 4121 iwl_eeprom_free(priv);
b481de9c 4122
b481de9c 4123
948c171c
MA		 4124 /*netif_stop_queue(dev); */
4125 flush_workqueue(priv->workqueue);
4126
5b9f8cd3 4127 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
b481de9c
ZY		 4128 * priv->workqueue... so we can't take down the workqueue
4129 * until now... */
4130 destroy_workqueue(priv->workqueue);
4131 priv->workqueue = NULL;
4132
b481de9c
ZY		 4133 pci_iounmap(pdev, priv->hw_base);
4134 pci_release_regions(pdev);
4135 pci_disable_device(pdev);
4136 pci_set_drvdata(pdev, NULL);
4137
6ba87956 4138 iwl_uninit_drv(priv);
b481de9c
ZY		 4139
4140 if (priv->ibss_beacon)
4141 dev_kfree_skb(priv->ibss_beacon);
4142
4143 ieee80211_free_hw(priv->hw);
4144}
4145
4146#ifdef CONFIG_PM
4147
5b9f8cd3 4148static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 4149{
c79dd5b5 4150 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4151
e655b9f0
ZY		 4152 if (priv->is_open) {
4153 set_bit(STATUS_IN_SUSPEND, &priv->status);
5b9f8cd3 4154 iwl_mac_stop(priv->hw);
e655b9f0
ZY		 4155 priv->is_open = 1;
4156 }
b481de9c 4157
b481de9c
ZY		 4158 pci_set_power_state(pdev, PCI_D3hot);
4159
b481de9c
ZY		 4160 return 0;
4161}
4162
5b9f8cd3 4163static int iwl_pci_resume(struct pci_dev *pdev)
b481de9c 4164{
c79dd5b5 4165 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4166
b481de9c 4167 pci_set_power_state(pdev, PCI_D0);
b481de9c 4168
e655b9f0 4169 if (priv->is_open)
5b9f8cd3 4170 iwl_mac_start(priv->hw);
b481de9c 4171
e655b9f0 4172 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY		 4173 return 0;
4174}
4175
4176#endif /* CONFIG_PM */
4177
4178/*****************************************************************************
4179 *
4180 * driver and module entry point
4181 *
4182 *****************************************************************************/
4183
fed9017e
RR		 4184/* Hardware specific file defines the PCI IDs table for that hardware module */
4185static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 4186#ifdef CONFIG_IWL4965
fed9017e
RR		 4187 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4188 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 4189#endif /* CONFIG_IWL4965 */
5a6a256e 4190#ifdef CONFIG_IWL5000
47408639
EK		 4191 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
4192 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
4193 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
4194 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
4195 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
4196 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 4197 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK		 4198 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
4199 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
4200 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
e96a8495
TW		 4201/* 5350 WiFi/WiMax */
4202 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
4203 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
4204 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
5a6a256e 4205#endif /* CONFIG_IWL5000 */
fed9017e
RR		 4206 {0}
4207};
4208MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4209
4210static struct pci_driver iwl_driver = {
b481de9c 4211 .name = DRV_NAME,
fed9017e 4212 .id_table = iwl_hw_card_ids,
5b9f8cd3
EG		 4213 .probe = iwl_pci_probe,
4214 .remove = __devexit_p(iwl_pci_remove),
b481de9c 4215#ifdef CONFIG_PM
5b9f8cd3
EG		 4216 .suspend = iwl_pci_suspend,
4217 .resume = iwl_pci_resume,
b481de9c
ZY		 4218#endif
4219};
4220
5b9f8cd3 4221static int __init iwl_init(void)
b481de9c
ZY		 4222{
4223
4224 int ret;
4225 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4226 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 4227
e227ceac 4228 ret = iwlagn_rate_control_register();
897e1cf2
RC		 4229 if (ret) {
4230 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
4231 return ret;
4232 }
4233
fed9017e 4234 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY		 4235 if (ret) {
4236 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 4237 goto error_register;
b481de9c 4238 }
b481de9c
ZY		 4239
4240 return ret;
897e1cf2 4241
897e1cf2 4242error_register:
e227ceac 4243 iwlagn_rate_control_unregister();
897e1cf2 4244 return ret;
b481de9c
ZY		 4245}
4246
5b9f8cd3 4247static void __exit iwl_exit(void)
b481de9c 4248{
fed9017e 4249 pci_unregister_driver(&iwl_driver);
e227ceac 4250 iwlagn_rate_control_unregister();
b481de9c
ZY		 4251}
4252
5b9f8cd3
EG		 4253module_exit(iwl_exit);
4254module_init(iwl_init);
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