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[net-next-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
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1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
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26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
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43#include <net/mac80211.h>
44
45#include <asm/div64.h>
46
6bc913bd 47#include "iwl-eeprom.h"
3e0d4cb1 48#include "iwl-dev.h"
fee1247a 49#include "iwl-core.h"
3395f6e9 50#include "iwl-io.h"
b481de9c 51#include "iwl-helpers.h"
6974e363 52#include "iwl-sta.h"
f0832f13 53#include "iwl-calib.h"
b481de9c 54
416e1438 55
b481de9c
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56/******************************************************************************
57 *
58 * module boiler plate
59 *
60 ******************************************************************************/
61
b481de9c
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62/*
63 * module name, copyright, version, etc.
64 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
65 */
66
d783b061 67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
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70#define VD "d"
71#else
72#define VD
73#endif
74
4fc22b21 75#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
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76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
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83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
a7b75207 86MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
b481de9c 87MODULE_LICENSE("GPL");
4fc22b21 88MODULE_ALIAS("iwl4965");
b481de9c 89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
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92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97
b481de9c 98
5b9f8cd3 99static void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
deb09c43 100{
c1adf9fb 101 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
deb09c43
EG
102
103 if (hw_decrypt)
104 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
105 else
106 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
107
108}
109
b481de9c 110/**
54559703 111 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 112 * @priv: staging_rxon is compared to active_rxon
b481de9c 113 *
9fbab516
BC
114 * If the RXON structure is changing enough to require a new tune,
115 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
116 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 117 */
54559703 118static int iwl_full_rxon_required(struct iwl_priv *priv)
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119{
120
121 /* These items are only settable from the full RXON command */
5d1e2325 122 if (!(iwl_is_associated(priv)) ||
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123 compare_ether_addr(priv->staging_rxon.bssid_addr,
124 priv->active_rxon.bssid_addr) ||
125 compare_ether_addr(priv->staging_rxon.node_addr,
126 priv->active_rxon.node_addr) ||
127 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
128 priv->active_rxon.wlap_bssid_addr) ||
129 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
130 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
131 (priv->staging_rxon.air_propagation !=
132 priv->active_rxon.air_propagation) ||
133 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
134 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
135 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
136 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
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137 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
138 return 1;
139
140 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
141 * be updated with the RXON_ASSOC command -- however only some
142 * flag transitions are allowed using RXON_ASSOC */
143
144 /* Check if we are not switching bands */
145 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
146 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
147 return 1;
148
149 /* Check if we are switching association toggle */
150 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
151 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
152 return 1;
153
154 return 0;
155}
156
b481de9c 157/**
5b9f8cd3 158 * iwl_commit_rxon - commit staging_rxon to hardware
b481de9c 159 *
01ebd063 160 * The RXON command in staging_rxon is committed to the hardware and
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161 * the active_rxon structure is updated with the new data. This
162 * function correctly transitions out of the RXON_ASSOC_MSK state if
163 * a HW tune is required based on the RXON structure changes.
164 */
5b9f8cd3 165static int iwl_commit_rxon(struct iwl_priv *priv)
b481de9c
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166{
167 /* cast away the const for active_rxon in this function */
c1adf9fb 168 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
43d59b32
EG
169 int ret;
170 bool new_assoc =
171 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 172
fee1247a 173 if (!iwl_is_alive(priv))
43d59b32 174 return -EBUSY;
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175
176 /* always get timestamp with Rx frame */
177 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG
178 /* allow CTS-to-self if possible. this is relevant only for
179 * 5000, but will not damage 4965 */
180 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 181
8f5c87dc 182 ret = iwl_agn_check_rxon_cmd(&priv->staging_rxon);
43d59b32 183 if (ret) {
b481de9c
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184 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
185 return -EINVAL;
186 }
187
188 /* If we don't need to send a full RXON, we can use
5b9f8cd3 189 * iwl_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 190 * and other flags for the current radio configuration. */
54559703 191 if (!iwl_full_rxon_required(priv)) {
43d59b32
EG
192 ret = iwl_send_rxon_assoc(priv);
193 if (ret) {
194 IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret);
195 return ret;
b481de9c
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196 }
197
198 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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199 return 0;
200 }
201
202 /* station table will be cleared */
203 priv->assoc_station_added = 0;
204
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205 /* If we are currently associated and the new config requires
206 * an RXON_ASSOC and the new config wants the associated mask enabled,
207 * we must clear the associated from the active configuration
208 * before we apply the new config */
43d59b32 209 if (iwl_is_associated(priv) && new_assoc) {
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210 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
211 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
212
43d59b32 213 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 214 sizeof(struct iwl_rxon_cmd),
b481de9c
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215 &priv->active_rxon);
216
217 /* If the mask clearing failed then we set
218 * active_rxon back to what it was previously */
43d59b32 219 if (ret) {
b481de9c 220 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
43d59b32
EG
221 IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret);
222 return ret;
b481de9c 223 }
b481de9c
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224 }
225
226 IWL_DEBUG_INFO("Sending RXON\n"
227 "* with%s RXON_FILTER_ASSOC_MSK\n"
228 "* channel = %d\n"
e174961c 229 "* bssid = %pM\n",
43d59b32 230 (new_assoc ? "" : "out"),
b481de9c 231 le16_to_cpu(priv->staging_rxon.channel),
e174961c 232 priv->staging_rxon.bssid_addr);
b481de9c 233
5b9f8cd3 234 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG
235
236 /* Apply the new configuration
237 * RXON unassoc clears the station table in uCode, send it before
238 * we add the bcast station. If assoc bit is set, we will send RXON
239 * after having added the bcast and bssid station.
240 */
241 if (!new_assoc) {
242 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 243 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32
EG
244 if (ret) {
245 IWL_ERROR("Error setting new RXON (%d)\n", ret);
246 return ret;
247 }
248 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
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249 }
250
37deb2a0 251 iwl_clear_stations_table(priv);
556f8db7 252
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253 if (!priv->error_recovering)
254 priv->start_calib = 0;
255
b481de9c 256 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 257 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 258 IWL_INVALID_STATION) {
b481de9c
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259 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
260 return -EIO;
261 }
262
263 /* If we have set the ASSOC_MSK and we are in BSS mode then
264 * add the IWL_AP_ID to the station rate table */
9185159d 265 if (new_assoc) {
05c914fe 266 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
9185159d
TW
267 ret = iwl_rxon_add_station(priv,
268 priv->active_rxon.bssid_addr, 1);
269 if (ret == IWL_INVALID_STATION) {
270 IWL_ERROR("Error adding AP address for TX.\n");
271 return -EIO;
272 }
273 priv->assoc_station_added = 1;
274 if (priv->default_wep_key &&
275 iwl_send_static_wepkey_cmd(priv, 0))
276 IWL_ERROR("Could not send WEP static key.\n");
b481de9c 277 }
43d59b32
EG
278
279 /* Apply the new configuration
280 * RXON assoc doesn't clear the station table in uCode,
281 */
282 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
283 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
284 if (ret) {
285 IWL_ERROR("Error setting new RXON (%d)\n", ret);
286 return ret;
287 }
288 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
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289 }
290
36da7d70
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291 iwl_init_sensitivity(priv);
292
293 /* If we issue a new RXON command which required a tune then we must
294 * send a new TXPOWER command or we won't be able to Tx any frames */
295 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
296 if (ret) {
297 IWL_ERROR("Error sending TX power (%d)\n", ret);
298 return ret;
299 }
300
b481de9c
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301 return 0;
302}
303
5b9f8cd3 304void iwl_update_chain_flags(struct iwl_priv *priv)
5da4b55f
MA
305{
306
c7de35cd 307 iwl_set_rxon_chain(priv);
5b9f8cd3 308 iwl_commit_rxon(priv);
5da4b55f
MA
309}
310
5b9f8cd3 311static int iwl_send_bt_config(struct iwl_priv *priv)
b481de9c 312{
2aa6ab86 313 struct iwl_bt_cmd bt_cmd = {
b481de9c
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314 .flags = 3,
315 .lead_time = 0xAA,
316 .max_kill = 1,
317 .kill_ack_mask = 0,
318 .kill_cts_mask = 0,
319 };
320
857485c0 321 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
2aa6ab86 322 sizeof(struct iwl_bt_cmd), &bt_cmd);
b481de9c
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323}
324
fcab423d 325static void iwl_clear_free_frames(struct iwl_priv *priv)
b481de9c
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326{
327 struct list_head *element;
328
329 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
330 priv->frames_count);
331
332 while (!list_empty(&priv->free_frames)) {
333 element = priv->free_frames.next;
334 list_del(element);
fcab423d 335 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
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336 priv->frames_count--;
337 }
338
339 if (priv->frames_count) {
340 IWL_WARNING("%d frames still in use. Did we lose one?\n",
341 priv->frames_count);
342 priv->frames_count = 0;
343 }
344}
345
fcab423d 346static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 347{
fcab423d 348 struct iwl_frame *frame;
b481de9c
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349 struct list_head *element;
350 if (list_empty(&priv->free_frames)) {
351 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
352 if (!frame) {
353 IWL_ERROR("Could not allocate frame!\n");
354 return NULL;
355 }
356
357 priv->frames_count++;
358 return frame;
359 }
360
361 element = priv->free_frames.next;
362 list_del(element);
fcab423d 363 return list_entry(element, struct iwl_frame, list);
b481de9c
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364}
365
fcab423d 366static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
b481de9c
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367{
368 memset(frame, 0, sizeof(*frame));
369 list_add(&frame->list, &priv->free_frames);
370}
371
4bf64efd
TW
372static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
373 struct ieee80211_hdr *hdr,
73ec1cc2 374 int left)
b481de9c 375{
3109ece1 376 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
377 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
378 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
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379 return 0;
380
381 if (priv->ibss_beacon->len > left)
382 return 0;
383
384 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
385
386 return priv->ibss_beacon->len;
387}
388
5b9f8cd3 389static u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 390{
39e88504
GC
391 int i;
392 int rate_mask;
393
394 /* Set rate mask*/
395 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
dbce56a4 396 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
39e88504 397 else
dbce56a4 398 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
b481de9c 399
39e88504 400 /* Find lowest valid rate */
b481de9c 401 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1826dcc0 402 i = iwl_rates[i].next_ieee) {
b481de9c 403 if (rate_mask & (1 << i))
1826dcc0 404 return iwl_rates[i].plcp;
b481de9c
ZY
405 }
406
39e88504
GC
407 /* No valid rate was found. Assign the lowest one */
408 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
409 return IWL_RATE_1M_PLCP;
410 else
411 return IWL_RATE_6M_PLCP;
b481de9c
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412}
413
5b9f8cd3 414static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
4bf64efd
TW
415 struct iwl_frame *frame, u8 rate)
416{
417 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
418 unsigned int frame_size;
419
420 tx_beacon_cmd = &frame->u.beacon;
421 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
422
423 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
424 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
425
426 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
4bf64efd
TW
427 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
428
429 BUG_ON(frame_size > MAX_MPDU_SIZE);
430 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
431
432 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
433 tx_beacon_cmd->tx.rate_n_flags =
434 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
435 else
436 tx_beacon_cmd->tx.rate_n_flags =
437 iwl_hw_set_rate_n_flags(rate, 0);
438
439 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
440 TX_CMD_FLG_TSF_MSK |
441 TX_CMD_FLG_STA_RATE_MSK;
442
443 return sizeof(*tx_beacon_cmd) + frame_size;
444}
5b9f8cd3 445static int iwl_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 446{
fcab423d 447 struct iwl_frame *frame;
b481de9c
ZY
448 unsigned int frame_size;
449 int rc;
450 u8 rate;
451
fcab423d 452 frame = iwl_get_free_frame(priv);
b481de9c
ZY
453
454 if (!frame) {
455 IWL_ERROR("Could not obtain free frame buffer for beacon "
456 "command.\n");
457 return -ENOMEM;
458 }
459
5b9f8cd3 460 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 461
5b9f8cd3 462 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 463
857485c0 464 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
465 &frame->u.cmd[0]);
466
fcab423d 467 iwl_free_frame(priv, frame);
b481de9c
ZY
468
469 return rc;
470}
471
b481de9c
ZY
472/******************************************************************************
473 *
474 * Misc. internal state and helper functions
475 *
476 ******************************************************************************/
b481de9c 477
5b9f8cd3 478static void iwl_ht_conf(struct iwl_priv *priv,
d1141dfb
EG
479 struct ieee80211_bss_conf *bss_conf)
480{
ae5eb026 481 struct ieee80211_sta_ht_cap *ht_conf;
d1141dfb 482 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
ae5eb026 483 struct ieee80211_sta *sta;
d1141dfb
EG
484
485 IWL_DEBUG_MAC80211("enter: \n");
486
d1141dfb
EG
487 if (!iwl_conf->is_ht)
488 return;
489
ae5eb026
JB
490
491 /*
492 * It is totally wrong to base global information on something
493 * that is valid only when associated, alas, this driver works
494 * that way and I don't know how to fix it.
495 */
496
497 rcu_read_lock();
498 sta = ieee80211_find_sta(priv->hw, priv->bssid);
499 if (!sta) {
500 rcu_read_unlock();
501 return;
502 }
503 ht_conf = &sta->ht_cap;
504
d1141dfb 505 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 506 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 507 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 508 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG
509
510 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
511 iwl_conf->max_amsdu_size =
512 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
513
514 iwl_conf->supported_chan_width =
d9fe60de 515 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
ae5eb026 516
094d05dc
S
517 /*
518 * XXX: The HT configuration needs to be moved into iwl_mac_config()
519 * to be done there correctly.
520 */
521
522 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
523 if (priv->hw->conf.ht.channel_type == NL80211_CHAN_HT40MINUS)
524 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
525 else if(priv->hw->conf.ht.channel_type == NL80211_CHAN_HT40PLUS)
526 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
527
d1141dfb 528 /* If no above or below channel supplied disable FAT channel */
d9fe60de 529 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
094d05dc 530 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
d1141dfb
EG
531 iwl_conf->supported_chan_width = 0;
532
12837be1
RR
533 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
534
d9fe60de 535 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
d1141dfb 536
094d05dc 537 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
d1141dfb 538 iwl_conf->ht_protection =
ae5eb026 539 bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
d1141dfb 540 iwl_conf->non_GF_STA_present =
ae5eb026
JB
541 !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
542
543 rcu_read_unlock();
d1141dfb 544
d1141dfb
EG
545 IWL_DEBUG_MAC80211("leave\n");
546}
547
b481de9c
ZY
548/*
549 * QoS support
550*/
1ff50bda 551static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c 552{
b481de9c
ZY
553 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
554 return;
555
b481de9c
ZY
556 priv->qos_data.def_qos_parm.qos_flags = 0;
557
558 if (priv->qos_data.qos_cap.q_AP.queue_request &&
559 !priv->qos_data.qos_cap.q_AP.txop_request)
560 priv->qos_data.def_qos_parm.qos_flags |=
561 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
562 if (priv->qos_data.qos_active)
563 priv->qos_data.def_qos_parm.qos_flags |=
564 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
565
fd105e79 566 if (priv->current_ht_config.is_ht)
f1f1f5c7 567 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 568
3109ece1 569 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW
570 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
571 priv->qos_data.qos_active,
572 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 573
1ff50bda
EG
574 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
575 sizeof(struct iwl_qosparam_cmd),
576 &priv->qos_data.def_qos_parm, NULL);
b481de9c
ZY
577 }
578}
579
b481de9c 580#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 581
3195c1f3 582static u16 iwl_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
583{
584 u16 new_val = 0;
585 u16 beacon_factor = 0;
586
3195c1f3
TW
587 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
588 / MAX_UCODE_BEACON_INTERVAL;
b481de9c
ZY
589 new_val = beacon_val / beacon_factor;
590
3195c1f3 591 return new_val;
b481de9c
ZY
592}
593
3195c1f3 594static void iwl_setup_rxon_timing(struct iwl_priv *priv)
b481de9c 595{
3195c1f3
TW
596 u64 tsf;
597 s32 interval_tm, rem;
b481de9c
ZY
598 unsigned long flags;
599 struct ieee80211_conf *conf = NULL;
600 u16 beacon_int = 0;
601
602 conf = ieee80211_get_hw_conf(priv->hw);
603
604 spin_lock_irqsave(&priv->lock, flags);
3195c1f3 605 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b5d7be5e 606 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 607
05c914fe 608 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
3195c1f3 609 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
b481de9c
ZY
610 priv->rxon_timing.atim_window = 0;
611 } else {
3195c1f3
TW
612 beacon_int = iwl_adjust_beacon_interval(conf->beacon_int);
613
b481de9c
ZY
614 /* TODO: we need to get atim_window from upper stack
615 * for now we set to 0 */
616 priv->rxon_timing.atim_window = 0;
617 }
618
3195c1f3 619 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
b481de9c 620
3195c1f3
TW
621 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
622 interval_tm = beacon_int * 1024;
623 rem = do_div(tsf, interval_tm);
624 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
625
626 spin_unlock_irqrestore(&priv->lock, flags);
627 IWL_DEBUG_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
628 le16_to_cpu(priv->rxon_timing.beacon_interval),
629 le32_to_cpu(priv->rxon_timing.beacon_init_val),
630 le16_to_cpu(priv->rxon_timing.atim_window));
b481de9c
ZY
631}
632
82a66bbb
TW
633static void iwl_set_flags_for_band(struct iwl_priv *priv,
634 enum ieee80211_band band)
b481de9c 635{
8318d78a 636 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY
637 priv->staging_rxon.flags &=
638 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
639 | RXON_FLG_CCK_MSK);
640 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
641 } else {
5b9f8cd3 642 /* Copied from iwl_post_associate() */
b481de9c
ZY
643 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
644 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
645 else
646 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
647
05c914fe 648 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
649 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
650
651 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
652 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
653 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
654 }
655}
656
657/*
01ebd063 658 * initialize rxon structure with default values from eeprom
b481de9c 659 */
5b9f8cd3 660static void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
b481de9c 661{
bf85ea4f 662 const struct iwl_channel_info *ch_info;
b481de9c
ZY
663
664 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
665
60294de3 666 switch (mode) {
05c914fe 667 case NL80211_IFTYPE_AP:
b481de9c
ZY
668 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
669 break;
670
05c914fe 671 case NL80211_IFTYPE_STATION:
b481de9c
ZY
672 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
673 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
674 break;
675
05c914fe 676 case NL80211_IFTYPE_ADHOC:
b481de9c
ZY
677 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
678 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
679 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
680 RXON_FILTER_ACCEPT_GRP_MSK;
681 break;
682
05c914fe 683 case NL80211_IFTYPE_MONITOR:
b481de9c
ZY
684 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
685 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
686 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
687 break;
69dc5d9d 688 default:
60294de3 689 IWL_ERROR("Unsupported interface type %d\n", mode);
69dc5d9d 690 break;
b481de9c
ZY
691 }
692
693#if 0
694 /* TODO: Figure out when short_preamble would be set and cache from
695 * that */
696 if (!hw_to_local(priv->hw)->short_preamble)
697 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
698 else
699 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
700#endif
701
8622e705 702 ch_info = iwl_get_channel_info(priv, priv->band,
25b3f57c 703 le16_to_cpu(priv->active_rxon.channel));
b481de9c
ZY
704
705 if (!ch_info)
706 ch_info = &priv->channel_info[0];
707
708 /*
709 * in some case A channels are all non IBSS
710 * in this case force B/G channel
711 */
05c914fe 712 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
b481de9c
ZY
713 !(is_channel_ibss(ch_info)))
714 ch_info = &priv->channel_info[0];
715
716 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 717 priv->band = ch_info->band;
b481de9c 718
82a66bbb 719 iwl_set_flags_for_band(priv, priv->band);
b481de9c
ZY
720
721 priv->staging_rxon.ofdm_basic_rates =
722 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
723 priv->staging_rxon.cck_basic_rates =
724 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
725
726 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
727 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
728 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
729 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
730 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
731 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 732 iwl_set_rxon_chain(priv);
b481de9c
ZY
733}
734
5b9f8cd3 735static int iwl_set_mode(struct iwl_priv *priv, int mode)
b481de9c 736{
5b9f8cd3 737 iwl_connection_init_rx_config(priv, mode);
b481de9c
ZY
738 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
739
37deb2a0 740 iwl_clear_stations_table(priv);
b481de9c 741
fde3571f 742 /* dont commit rxon if rf-kill is on*/
fee1247a 743 if (!iwl_is_ready_rf(priv))
fde3571f
MA
744 return -EAGAIN;
745
746 cancel_delayed_work(&priv->scan_check);
2a421b91 747 if (iwl_scan_cancel_timeout(priv, 100)) {
fde3571f
MA
748 IWL_WARNING("Aborted scan still in progress after 100ms\n");
749 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
750 return -EAGAIN;
751 }
752
5b9f8cd3 753 iwl_commit_rxon(priv);
b481de9c
ZY
754
755 return 0;
756}
757
5b9f8cd3 758static void iwl_set_rate(struct iwl_priv *priv)
b481de9c 759{
8318d78a 760 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY
761 struct ieee80211_rate *rate;
762 int i;
763
d1141dfb 764 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA
765 if (!hw) {
766 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
767 return;
768 }
b481de9c
ZY
769
770 priv->active_rate = 0;
771 priv->active_rate_basic = 0;
772
8318d78a
JB
773 for (i = 0; i < hw->n_bitrates; i++) {
774 rate = &(hw->bitrates[i]);
775 if (rate->hw_value < IWL_RATE_COUNT)
776 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY
777 }
778
779 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
780 priv->active_rate, priv->active_rate_basic);
781
782 /*
783 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
784 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
785 * OFDM
786 */
787 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
788 priv->staging_rxon.cck_basic_rates =
789 ((priv->active_rate_basic &
790 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
791 else
792 priv->staging_rxon.cck_basic_rates =
793 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
794
795 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
796 priv->staging_rxon.ofdm_basic_rates =
797 ((priv->active_rate_basic &
798 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
799 IWL_FIRST_OFDM_RATE) & 0xFF;
800 else
801 priv->staging_rxon.ofdm_basic_rates =
802 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
803}
804
b481de9c 805
b481de9c
ZY
806/******************************************************************************
807 *
808 * Generic RX handler implementations
809 *
810 ******************************************************************************/
885ba202
TW
811static void iwl_rx_reply_alive(struct iwl_priv *priv,
812 struct iwl_rx_mem_buffer *rxb)
b481de9c 813{
db11d634 814 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 815 struct iwl_alive_resp *palive;
b481de9c
ZY
816 struct delayed_work *pwork;
817
818 palive = &pkt->u.alive_frame;
819
820 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
821 "0x%01X 0x%01X\n",
822 palive->is_valid, palive->ver_type,
823 palive->ver_subtype);
824
825 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
826 IWL_DEBUG_INFO("Initialization Alive received.\n");
827 memcpy(&priv->card_alive_init,
828 &pkt->u.alive_frame,
885ba202 829 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY
830 pwork = &priv->init_alive_start;
831 } else {
832 IWL_DEBUG_INFO("Runtime Alive received.\n");
833 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 834 sizeof(struct iwl_alive_resp));
b481de9c
ZY
835 pwork = &priv->alive_start;
836 }
837
838 /* We delay the ALIVE response by 5ms to
839 * give the HW RF Kill time to activate... */
840 if (palive->is_valid == UCODE_VALID_OK)
841 queue_delayed_work(priv->workqueue, pwork,
842 msecs_to_jiffies(5));
843 else
844 IWL_WARNING("uCode did not respond OK.\n");
845}
846
5b9f8cd3 847static void iwl_rx_reply_error(struct iwl_priv *priv,
a55360e4 848 struct iwl_rx_mem_buffer *rxb)
b481de9c 849{
db11d634 850 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
851
852 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
853 "seq 0x%04X ser 0x%08X\n",
854 le32_to_cpu(pkt->u.err_resp.error_type),
855 get_cmd_string(pkt->u.err_resp.cmd_id),
856 pkt->u.err_resp.cmd_id,
857 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
858 le32_to_cpu(pkt->u.err_resp.error_info));
859}
860
861#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
862
5b9f8cd3 863static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
b481de9c 864{
db11d634 865 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
c1adf9fb 866 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
2aa6ab86 867 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
868 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
869 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
870 rxon->channel = csa->channel;
871 priv->staging_rxon.channel = csa->channel;
872}
873
5b9f8cd3 874static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 875 struct iwl_rx_mem_buffer *rxb)
b481de9c 876{
0a6857e7 877#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 878 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2aa6ab86 879 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
880 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
881 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
882#endif
883}
884
5b9f8cd3 885static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 886 struct iwl_rx_mem_buffer *rxb)
b481de9c 887{
db11d634 888 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
889 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
890 "notification for %s:\n",
891 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 892 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
893}
894
5b9f8cd3 895static void iwl_bg_beacon_update(struct work_struct *work)
b481de9c 896{
c79dd5b5
TW
897 struct iwl_priv *priv =
898 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
899 struct sk_buff *beacon;
900
901 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 902 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
903
904 if (!beacon) {
905 IWL_ERROR("update beacon failed\n");
906 return;
907 }
908
909 mutex_lock(&priv->mutex);
910 /* new beacon skb is allocated every time; dispose previous.*/
911 if (priv->ibss_beacon)
912 dev_kfree_skb(priv->ibss_beacon);
913
914 priv->ibss_beacon = beacon;
915 mutex_unlock(&priv->mutex);
916
5b9f8cd3 917 iwl_send_beacon_cmd(priv);
b481de9c
ZY
918}
919
4e39317d 920/**
5b9f8cd3 921 * iwl_bg_statistics_periodic - Timer callback to queue statistics
4e39317d
EG
922 *
923 * This callback is provided in order to send a statistics request.
924 *
925 * This timer function is continually reset to execute within
926 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
927 * was received. We need to ensure we receive the statistics in order
928 * to update the temperature used for calibrating the TXPOWER.
929 */
5b9f8cd3 930static void iwl_bg_statistics_periodic(unsigned long data)
4e39317d
EG
931{
932 struct iwl_priv *priv = (struct iwl_priv *)data;
933
934 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
935 return;
936
61780ee3
MA
937 /* dont send host command if rf-kill is on */
938 if (!iwl_is_ready_rf(priv))
939 return;
940
4e39317d
EG
941 iwl_send_statistics_request(priv, CMD_ASYNC);
942}
943
5b9f8cd3 944static void iwl_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 945 struct iwl_rx_mem_buffer *rxb)
b481de9c 946{
0a6857e7 947#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 948 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2aa6ab86
TW
949 struct iwl4965_beacon_notif *beacon =
950 (struct iwl4965_beacon_notif *)pkt->u.raw;
e7d326ac 951 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
952
953 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
954 "tsf %d %d rate %d\n",
25a6572c 955 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY
956 beacon->beacon_notify_hdr.failure_frame,
957 le32_to_cpu(beacon->ibss_mgr_status),
958 le32_to_cpu(beacon->high_tsf),
959 le32_to_cpu(beacon->low_tsf), rate);
960#endif
961
05c914fe 962 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
963 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
964 queue_work(priv->workqueue, &priv->beacon_update);
965}
966
b481de9c
ZY
967/* Handle notification from uCode that card's power state is changing
968 * due to software, hardware, or critical temperature RFKILL */
5b9f8cd3 969static void iwl_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 970 struct iwl_rx_mem_buffer *rxb)
b481de9c 971{
db11d634 972 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
973 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
974 unsigned long status = priv->status;
975
976 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
977 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
978 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
979
980 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
981 RF_CARD_DISABLED)) {
982
3395f6e9 983 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
984 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
985
3395f6e9
TW
986 if (!iwl_grab_nic_access(priv)) {
987 iwl_write_direct32(
b481de9c
ZY
988 priv, HBUS_TARG_MBX_C,
989 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
990
3395f6e9 991 iwl_release_nic_access(priv);
b481de9c
ZY
992 }
993
994 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 995 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 996 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
997 if (!iwl_grab_nic_access(priv)) {
998 iwl_write_direct32(
b481de9c
ZY
999 priv, HBUS_TARG_MBX_C,
1000 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1001
3395f6e9 1002 iwl_release_nic_access(priv);
b481de9c
ZY
1003 }
1004 }
1005
1006 if (flags & RF_CARD_DISABLED) {
3395f6e9 1007 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 1008 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
1009 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1010 if (!iwl_grab_nic_access(priv))
1011 iwl_release_nic_access(priv);
b481de9c
ZY
1012 }
1013 }
1014
1015 if (flags & HW_CARD_DISABLED)
1016 set_bit(STATUS_RF_KILL_HW, &priv->status);
1017 else
1018 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1019
1020
1021 if (flags & SW_CARD_DISABLED)
1022 set_bit(STATUS_RF_KILL_SW, &priv->status);
1023 else
1024 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1025
1026 if (!(flags & RXON_CARD_DISABLED))
2a421b91 1027 iwl_scan_cancel(priv);
b481de9c
ZY
1028
1029 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1030 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1031 (test_bit(STATUS_RF_KILL_SW, &status) !=
1032 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1033 queue_work(priv->workqueue, &priv->rf_kill);
1034 else
1035 wake_up_interruptible(&priv->wait_command_queue);
1036}
1037
5b9f8cd3 1038int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
e2e3c57b
TW
1039{
1040 int ret;
1041 unsigned long flags;
1042
1043 spin_lock_irqsave(&priv->lock, flags);
1044 ret = iwl_grab_nic_access(priv);
1045 if (ret)
1046 goto err;
1047
1048 if (src == IWL_PWR_SRC_VAUX) {
1049 u32 val;
e7b63581 1050 ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE,
e2e3c57b
TW
1051 &val);
1052
1053 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
1054 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1055 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1056 ~APMG_PS_CTRL_MSK_PWR_SRC);
1057 } else {
1058 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1059 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1060 ~APMG_PS_CTRL_MSK_PWR_SRC);
1061 }
1062
1063 iwl_release_nic_access(priv);
1064err:
1065 spin_unlock_irqrestore(&priv->lock, flags);
1066 return ret;
1067}
1068
b481de9c 1069/**
5b9f8cd3 1070 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1071 *
1072 * Setup the RX handlers for each of the reply types sent from the uCode
1073 * to the host.
1074 *
1075 * This function chains into the hardware specific files for them to setup
1076 * any hardware specific handlers as well.
1077 */
653fa4a0 1078static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1079{
885ba202 1080 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
5b9f8cd3
EG
1081 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
1082 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
5b9f8cd3 1083 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 1084 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
5b9f8cd3
EG
1085 iwl_rx_pm_debug_statistics_notif;
1086 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
b481de9c 1087
9fbab516
BC
1088 /*
1089 * The same handler is used for both the REPLY to a discrete
1090 * statistics request from the host as well as for the periodic
1091 * statistics notifications (after received beacons) from the uCode.
b481de9c 1092 */
8f91aecb
EG
1093 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
1094 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91 1095
21c339bf 1096 iwl_setup_spectrum_handlers(priv);
2a421b91
TW
1097 iwl_setup_rx_scan_handlers(priv);
1098
37a44211 1099 /* status change handler */
5b9f8cd3 1100 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
b481de9c 1101
c1354754
TW
1102 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
1103 iwl_rx_missed_beacon_notif;
37a44211 1104 /* Rx handlers */
1781a07f
EG
1105 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
1106 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG
1107 /* block ack */
1108 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 1109 /* Set up hardware specific Rx handlers */
d4789efe 1110 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY
1111}
1112
5c0eef96
MA
1113/*
1114 * this should be called while priv->lock is locked
1115*/
a55360e4 1116static void __iwl_rx_replenish(struct iwl_priv *priv)
b481de9c 1117{
a55360e4
TW
1118 iwl_rx_allocate(priv);
1119 iwl_rx_queue_restock(priv);
b481de9c
ZY
1120}
1121
b481de9c
ZY
1122
1123/**
a55360e4 1124 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1125 *
1126 * Uses the priv->rx_handlers callback function array to invoke
1127 * the appropriate handlers, including command responses,
1128 * frame-received notifications, and other notifications.
1129 */
a55360e4 1130void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1131{
a55360e4 1132 struct iwl_rx_mem_buffer *rxb;
db11d634 1133 struct iwl_rx_packet *pkt;
a55360e4 1134 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1135 u32 r, i;
1136 int reclaim;
1137 unsigned long flags;
5c0eef96 1138 u8 fill_rx = 0;
d68ab680 1139 u32 count = 8;
b481de9c 1140
6440adb5
BC
1141 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1142 * buffer that the driver may process (last buffer filled by ucode). */
8d86422a 1143 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY
1144 i = rxq->read;
1145
1146 /* Rx interrupt, but nothing sent from uCode */
1147 if (i == r)
f3d67999 1148 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
b481de9c 1149
a55360e4 1150 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA
1151 fill_rx = 1;
1152
b481de9c
ZY
1153 while (i != r) {
1154 rxb = rxq->queue[i];
1155
9fbab516 1156 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1157 * then a bug has been introduced in the queue refilling
1158 * routines -- catch it here */
1159 BUG_ON(rxb == NULL);
1160
1161 rxq->queue[i] = NULL;
1162
e91af0af
JB
1163 dma_sync_single_range_for_cpu(
1164 &priv->pci_dev->dev, rxb->real_dma_addr,
1165 rxb->aligned_dma_addr - rxb->real_dma_addr,
1166 priv->hw_params.rx_buf_size,
1167 PCI_DMA_FROMDEVICE);
db11d634 1168 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1169
1170 /* Reclaim a command buffer only if this packet is a response
1171 * to a (driver-originated) command.
1172 * If the packet (e.g. Rx frame) originated from uCode,
1173 * there is no command buffer to reclaim.
1174 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1175 * but apparently a few don't get set; catch them here. */
1176 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1177 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1178 (pkt->hdr.cmd != REPLY_RX) &&
7dddaf1a 1179 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
cfe01709 1180 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
1181 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1182 (pkt->hdr.cmd != REPLY_TX);
1183
1184 /* Based on type of command response or notification,
1185 * handle those that need handling via function in
5b9f8cd3 1186 * rx_handlers table. See iwl_setup_rx_handlers() */
b481de9c 1187 if (priv->rx_handlers[pkt->hdr.cmd]) {
f3d67999
EK
1188 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
1189 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY
1190 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1191 } else {
1192 /* No handling needed */
f3d67999 1193 IWL_DEBUG(IWL_DL_RX,
b481de9c
ZY
1194 "r %d i %d No handler needed for %s, 0x%02x\n",
1195 r, i, get_cmd_string(pkt->hdr.cmd),
1196 pkt->hdr.cmd);
1197 }
1198
1199 if (reclaim) {
9fbab516 1200 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1201 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1202 * as we reclaim the driver command queue */
1203 if (rxb && rxb->skb)
17b88929 1204 iwl_tx_cmd_complete(priv, rxb);
b481de9c
ZY
1205 else
1206 IWL_WARNING("Claim null rxb?\n");
1207 }
1208
1209 /* For now we just don't re-use anything. We can tweak this
1210 * later to try and re-use notification packets and SKBs that
1211 * fail to Rx correctly */
1212 if (rxb->skb != NULL) {
1213 priv->alloc_rxb_skb--;
1214 dev_kfree_skb_any(rxb->skb);
1215 rxb->skb = NULL;
1216 }
1217
4018517a
JB
1218 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1219 priv->hw_params.rx_buf_size + 256,
9ee1ba47 1220 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1221 spin_lock_irqsave(&rxq->lock, flags);
1222 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1223 spin_unlock_irqrestore(&rxq->lock, flags);
1224 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1225 /* If there are a lot of unused frames,
1226 * restock the Rx queue so ucode wont assert. */
1227 if (fill_rx) {
1228 count++;
1229 if (count >= 8) {
1230 priv->rxq.read = i;
a55360e4 1231 __iwl_rx_replenish(priv);
5c0eef96
MA
1232 count = 0;
1233 }
1234 }
b481de9c
ZY
1235 }
1236
1237 /* Backtrack one entry */
1238 priv->rxq.read = i;
a55360e4
TW
1239 iwl_rx_queue_restock(priv);
1240}
a55360e4 1241
0a6857e7 1242#ifdef CONFIG_IWLWIFI_DEBUG
5b9f8cd3 1243static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
b481de9c 1244{
c1adf9fb 1245 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
0795af57 1246
b481de9c 1247 IWL_DEBUG_RADIO("RX CONFIG:\n");
bf403db8 1248 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
1249 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1250 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1251 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
1252 le32_to_cpu(rxon->filter_flags));
1253 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
1254 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
1255 rxon->ofdm_basic_rates);
1256 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
e174961c
JB
1257 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
1258 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
b481de9c
ZY
1259 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1260}
1261#endif
1262
0359facc
MA
1263/* call this function to flush any scheduled tasklet */
1264static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1265{
a96a27f9 1266 /* wait to make sure we flush pending tasklet*/
0359facc
MA
1267 synchronize_irq(priv->pci_dev->irq);
1268 tasklet_kill(&priv->irq_tasklet);
1269}
1270
b481de9c 1271/**
5b9f8cd3 1272 * iwl_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 1273 */
5b9f8cd3 1274static void iwl_irq_handle_error(struct iwl_priv *priv)
b481de9c 1275{
5b9f8cd3 1276 /* Set the FW error flag -- cleared on iwl_down */
b481de9c
ZY
1277 set_bit(STATUS_FW_ERROR, &priv->status);
1278
1279 /* Cancel currently queued command. */
1280 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1281
0a6857e7 1282#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1283 if (priv->debug_level & IWL_DL_FW_ERRORS) {
ede0cba4 1284 iwl_dump_nic_error_log(priv);
189a2b59 1285 iwl_dump_nic_event_log(priv);
5b9f8cd3 1286 iwl_print_rx_config_cmd(priv);
b481de9c
ZY
1287 }
1288#endif
1289
1290 wake_up_interruptible(&priv->wait_command_queue);
1291
1292 /* Keep the restart process from trying to send host
1293 * commands by clearing the INIT status bit */
1294 clear_bit(STATUS_READY, &priv->status);
1295
1296 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
f3d67999 1297 IWL_DEBUG(IWL_DL_FW_ERRORS,
b481de9c
ZY
1298 "Restarting adapter due to uCode error.\n");
1299
3109ece1 1300 if (iwl_is_associated(priv)) {
b481de9c
ZY
1301 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1302 sizeof(priv->recovery_rxon));
1303 priv->error_recovering = 1;
1304 }
3a1081e8
EK
1305 if (priv->cfg->mod_params->restart_fw)
1306 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY
1307 }
1308}
1309
5b9f8cd3 1310static void iwl_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
1311{
1312 unsigned long flags;
1313
1314 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1315 sizeof(priv->staging_rxon));
1316 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 1317 iwl_commit_rxon(priv);
b481de9c 1318
4f40e4d9 1319 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
1320
1321 spin_lock_irqsave(&priv->lock, flags);
1322 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1323 priv->error_recovering = 0;
1324 spin_unlock_irqrestore(&priv->lock, flags);
1325}
1326
5b9f8cd3 1327static void iwl_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1328{
1329 u32 inta, handled = 0;
1330 u32 inta_fh;
1331 unsigned long flags;
0a6857e7 1332#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1333 u32 inta_mask;
1334#endif
1335
1336 spin_lock_irqsave(&priv->lock, flags);
1337
1338 /* Ack/clear/reset pending uCode interrupts.
1339 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1340 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
1341 inta = iwl_read32(priv, CSR_INT);
1342 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1343
1344 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1345 * Any new interrupts that happen after this, either while we're
1346 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
1347 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1348 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1349
0a6857e7 1350#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1351 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1352 /* just for debug */
3395f6e9 1353 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
1354 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1355 inta, inta_mask, inta_fh);
1356 }
1357#endif
1358
1359 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1360 * atomic, make sure that inta covers all the interrupts that
1361 * we've discovered, even if FH interrupt came in just after
1362 * reading CSR_INT. */
6f83eaa1 1363 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1364 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1365 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
1366 inta |= CSR_INT_BIT_FH_TX;
1367
1368 /* Now service all interrupt bits discovered above. */
1369 if (inta & CSR_INT_BIT_HW_ERR) {
1370 IWL_ERROR("Microcode HW error detected. Restarting.\n");
1371
1372 /* Tell the device to stop sending interrupts */
5b9f8cd3 1373 iwl_disable_interrupts(priv);
b481de9c 1374
5b9f8cd3 1375 iwl_irq_handle_error(priv);
b481de9c
ZY
1376
1377 handled |= CSR_INT_BIT_HW_ERR;
1378
1379 spin_unlock_irqrestore(&priv->lock, flags);
1380
1381 return;
1382 }
1383
0a6857e7 1384#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1385 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1386 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
1387 if (inta & CSR_INT_BIT_SCD)
1388 IWL_DEBUG_ISR("Scheduler finished to transmit "
1389 "the frame/frames.\n");
b481de9c
ZY
1390
1391 /* Alive notification via Rx interrupt will do the real work */
1392 if (inta & CSR_INT_BIT_ALIVE)
1393 IWL_DEBUG_ISR("Alive interrupt\n");
1394 }
1395#endif
1396 /* Safely ignore these bits for debug checks below */
25c03d8e 1397 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1398
9fbab516 1399 /* HW RF KILL switch toggled */
b481de9c
ZY
1400 if (inta & CSR_INT_BIT_RF_KILL) {
1401 int hw_rf_kill = 0;
3395f6e9 1402 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
1403 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1404 hw_rf_kill = 1;
1405
f3d67999 1406 IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
c3056065 1407 hw_rf_kill ? "disable radio" : "enable radio");
b481de9c 1408
a9efa652
EG
1409 /* driver only loads ucode once setting the interface up.
1410 * the driver as well won't allow loading if RFKILL is set
1411 * therefore no need to restart the driver from this handler
1412 */
edb34228 1413 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
53e49093 1414 clear_bit(STATUS_RF_KILL_HW, &priv->status);
edb34228
MA
1415 if (priv->is_open && !iwl_is_rfkill(priv))
1416 queue_work(priv->workqueue, &priv->up);
1417 }
b481de9c
ZY
1418
1419 handled |= CSR_INT_BIT_RF_KILL;
1420 }
1421
9fbab516 1422 /* Chip got too hot and stopped itself */
b481de9c
ZY
1423 if (inta & CSR_INT_BIT_CT_KILL) {
1424 IWL_ERROR("Microcode CT kill error detected.\n");
1425 handled |= CSR_INT_BIT_CT_KILL;
1426 }
1427
1428 /* Error detected by uCode */
1429 if (inta & CSR_INT_BIT_SW_ERR) {
1430 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
1431 inta);
5b9f8cd3 1432 iwl_irq_handle_error(priv);
b481de9c
ZY
1433 handled |= CSR_INT_BIT_SW_ERR;
1434 }
1435
1436 /* uCode wakes up after power-down sleep */
1437 if (inta & CSR_INT_BIT_WAKEUP) {
1438 IWL_DEBUG_ISR("Wakeup interrupt\n");
a55360e4 1439 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW
1440 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1441 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1442 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1443 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1444 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1445 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
1446
1447 handled |= CSR_INT_BIT_WAKEUP;
1448 }
1449
1450 /* All uCode command responses, including Tx command responses,
1451 * Rx "responses" (frame-received notification), and other
1452 * notifications from uCode come through here*/
1453 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1454 iwl_rx_handle(priv);
b481de9c
ZY
1455 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1456 }
1457
1458 if (inta & CSR_INT_BIT_FH_TX) {
1459 IWL_DEBUG_ISR("Tx interrupt\n");
1460 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR
1461 /* FH finished to write, send event */
1462 priv->ucode_write_complete = 1;
1463 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1464 }
1465
1466 if (inta & ~handled)
1467 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1468
1469 if (inta & ~CSR_INI_SET_MASK) {
1470 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
1471 inta & ~CSR_INI_SET_MASK);
1472 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
1473 }
1474
1475 /* Re-enable all interrupts */
0359facc
MA
1476 /* only Re-enable if diabled by irq */
1477 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1478 iwl_enable_interrupts(priv);
b481de9c 1479
0a6857e7 1480#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1481 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
1482 inta = iwl_read32(priv, CSR_INT);
1483 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1484 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1485 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1486 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1487 }
1488#endif
1489 spin_unlock_irqrestore(&priv->lock, flags);
1490}
1491
5b9f8cd3 1492static irqreturn_t iwl_isr(int irq, void *data)
b481de9c 1493{
c79dd5b5 1494 struct iwl_priv *priv = data;
b481de9c
ZY
1495 u32 inta, inta_mask;
1496 u32 inta_fh;
1497 if (!priv)
1498 return IRQ_NONE;
1499
1500 spin_lock(&priv->lock);
1501
1502 /* Disable (but don't clear!) interrupts here to avoid
1503 * back-to-back ISRs and sporadic interrupts from our NIC.
1504 * If we have something to service, the tasklet will re-enable ints.
1505 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW
1506 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1507 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1508
1509 /* Discover which interrupts are active/pending */
3395f6e9
TW
1510 inta = iwl_read32(priv, CSR_INT);
1511 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1512
1513 /* Ignore interrupt if there's nothing in NIC to service.
1514 * This may be due to IRQ shared with another device,
1515 * or due to sporadic interrupts thrown from our NIC. */
1516 if (!inta && !inta_fh) {
1517 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
1518 goto none;
1519 }
1520
1521 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
1522 /* Hardware disappeared. It might have already raised
1523 * an interrupt */
99df630c 1524 IWL_WARNING("HARDWARE GONE?? INTA == 0x%08x\n", inta);
66fbb541 1525 goto unplugged;
b481de9c
ZY
1526 }
1527
1528 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1529 inta, inta_mask, inta_fh);
1530
25c03d8e
JP
1531 inta &= ~CSR_INT_BIT_SCD;
1532
5b9f8cd3 1533 /* iwl_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
1534 if (likely(inta || inta_fh))
1535 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1536
66fbb541
ON
1537 unplugged:
1538 spin_unlock(&priv->lock);
b481de9c
ZY
1539 return IRQ_HANDLED;
1540
1541 none:
1542 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
1543 /* only Re-enable if diabled by irq */
1544 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1545 iwl_enable_interrupts(priv);
b481de9c
ZY
1546 spin_unlock(&priv->lock);
1547 return IRQ_NONE;
1548}
1549
b481de9c
ZY
1550/******************************************************************************
1551 *
1552 * uCode download functions
1553 *
1554 ******************************************************************************/
1555
5b9f8cd3 1556static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1557{
98c92211
TW
1558 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1559 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1560 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1561 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1562 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1563 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
1564}
1565
5b9f8cd3 1566static void iwl_nic_start(struct iwl_priv *priv)
edcdf8b2
RR
1567{
1568 /* Remove all resets to allow NIC to operate */
1569 iwl_write32(priv, CSR_RESET, 0);
1570}
1571
1572
b481de9c 1573/**
5b9f8cd3 1574 * iwl_read_ucode - Read uCode images from disk file.
b481de9c
ZY
1575 *
1576 * Copy into buffers for card to fetch via bus-mastering
1577 */
5b9f8cd3 1578static int iwl_read_ucode(struct iwl_priv *priv)
b481de9c 1579{
14b3d338 1580 struct iwl_ucode *ucode;
a0987a8d 1581 int ret = -EINVAL, index;
b481de9c 1582 const struct firmware *ucode_raw;
a0987a8d
RC
1583 const char *name_pre = priv->cfg->fw_name_pre;
1584 const unsigned int api_max = priv->cfg->ucode_api_max;
1585 const unsigned int api_min = priv->cfg->ucode_api_min;
1586 char buf[25];
b481de9c
ZY
1587 u8 *src;
1588 size_t len;
a0987a8d 1589 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY
1590
1591 /* Ask kernel firmware_class module to get the boot firmware off disk.
1592 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC
1593 for (index = api_max; index >= api_min; index--) {
1594 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1595 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1596 if (ret < 0) {
1597 IWL_ERROR("%s firmware file req failed: Reason %d\n",
1598 buf, ret);
1599 if (ret == -ENOENT)
1600 continue;
1601 else
1602 goto error;
1603 } else {
1604 if (index < api_max)
1605 IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n",
1606 buf, api_max);
1607 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
1608 buf, ucode_raw->size);
1609 break;
1610 }
b481de9c
ZY
1611 }
1612
a0987a8d
RC
1613 if (ret < 0)
1614 goto error;
b481de9c
ZY
1615
1616 /* Make sure that we got at least our header! */
1617 if (ucode_raw->size < sizeof(*ucode)) {
1618 IWL_ERROR("File size way too small!\n");
90e759d1 1619 ret = -EINVAL;
b481de9c
ZY
1620 goto err_release;
1621 }
1622
1623 /* Data from ucode file: header followed by uCode images */
1624 ucode = (void *)ucode_raw->data;
1625
c02b3acd 1626 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 1627 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY
1628 inst_size = le32_to_cpu(ucode->inst_size);
1629 data_size = le32_to_cpu(ucode->data_size);
1630 init_size = le32_to_cpu(ucode->init_size);
1631 init_data_size = le32_to_cpu(ucode->init_data_size);
1632 boot_size = le32_to_cpu(ucode->boot_size);
1633
a0987a8d
RC
1634 /* api_ver should match the api version forming part of the
1635 * firmware filename ... but we don't check for that and only rely
1636 * on the API version read from firware header from here on forward */
1637
1638 if (api_ver < api_min || api_ver > api_max) {
1639 IWL_ERROR("Driver unable to support your firmware API. "
1640 "Driver supports v%u, firmware is v%u.\n",
1641 api_max, api_ver);
1642 priv->ucode_ver = 0;
1643 ret = -EINVAL;
1644 goto err_release;
1645 }
1646 if (api_ver != api_max)
1647 IWL_ERROR("Firmware has old API version. Expected v%u, "
1648 "got v%u. New firmware can be obtained "
1649 "from http://www.intellinuxwireless.org.\n",
1650 api_max, api_ver);
1651
1652 printk(KERN_INFO DRV_NAME " loaded firmware version %u.%u.%u.%u\n",
c02b3acd
CR
1653 IWL_UCODE_MAJOR(priv->ucode_ver),
1654 IWL_UCODE_MINOR(priv->ucode_ver),
1655 IWL_UCODE_API(priv->ucode_ver),
1656 IWL_UCODE_SERIAL(priv->ucode_ver));
a0987a8d
RC
1657
1658 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
1659 priv->ucode_ver);
b481de9c
ZY
1660 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
1661 inst_size);
1662 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
1663 data_size);
1664 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
1665 init_size);
1666 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
1667 init_data_size);
1668 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
1669 boot_size);
1670
1671 /* Verify size of file vs. image size info in file's header */
1672 if (ucode_raw->size < sizeof(*ucode) +
1673 inst_size + data_size + init_size +
1674 init_data_size + boot_size) {
1675
1676 IWL_DEBUG_INFO("uCode file size %d too small\n",
1677 (int)ucode_raw->size);
90e759d1 1678 ret = -EINVAL;
b481de9c
ZY
1679 goto err_release;
1680 }
1681
1682 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1683 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW
1684 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
1685 inst_size);
1686 ret = -EINVAL;
b481de9c
ZY
1687 goto err_release;
1688 }
1689
099b40b7 1690 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW
1691 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
1692 data_size);
1693 ret = -EINVAL;
b481de9c
ZY
1694 goto err_release;
1695 }
099b40b7 1696 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 1697 IWL_DEBUG_INFO
90e759d1
TW
1698 ("uCode init instr len %d too large to fit in\n",
1699 init_size);
1700 ret = -EINVAL;
b481de9c
ZY
1701 goto err_release;
1702 }
099b40b7 1703 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 1704 IWL_DEBUG_INFO
90e759d1
TW
1705 ("uCode init data len %d too large to fit in\n",
1706 init_data_size);
1707 ret = -EINVAL;
b481de9c
ZY
1708 goto err_release;
1709 }
099b40b7 1710 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 1711 IWL_DEBUG_INFO
90e759d1
TW
1712 ("uCode boot instr len %d too large to fit in\n",
1713 boot_size);
1714 ret = -EINVAL;
b481de9c
ZY
1715 goto err_release;
1716 }
1717
1718 /* Allocate ucode buffers for card's bus-master loading ... */
1719
1720 /* Runtime instructions and 2 copies of data:
1721 * 1) unmodified from disk
1722 * 2) backup cache for save/restore during power-downs */
1723 priv->ucode_code.len = inst_size;
98c92211 1724 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
1725
1726 priv->ucode_data.len = data_size;
98c92211 1727 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
1728
1729 priv->ucode_data_backup.len = data_size;
98c92211 1730 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
1731
1732 /* Initialization instructions and data */
90e759d1
TW
1733 if (init_size && init_data_size) {
1734 priv->ucode_init.len = init_size;
98c92211 1735 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
1736
1737 priv->ucode_init_data.len = init_data_size;
98c92211 1738 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
1739
1740 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1741 goto err_pci_alloc;
1742 }
b481de9c
ZY
1743
1744 /* Bootstrap (instructions only, no data) */
90e759d1
TW
1745 if (boot_size) {
1746 priv->ucode_boot.len = boot_size;
98c92211 1747 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1748
90e759d1
TW
1749 if (!priv->ucode_boot.v_addr)
1750 goto err_pci_alloc;
1751 }
b481de9c
ZY
1752
1753 /* Copy images into buffers for card's bus-master reads ... */
1754
1755 /* Runtime instructions (first block of data in file) */
1756 src = &ucode->data[0];
1757 len = priv->ucode_code.len;
90e759d1 1758 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
1759 memcpy(priv->ucode_code.v_addr, src, len);
1760 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1761 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1762
1763 /* Runtime data (2nd block)
5b9f8cd3 1764 * NOTE: Copy into backup buffer will be done in iwl_up() */
b481de9c
ZY
1765 src = &ucode->data[inst_size];
1766 len = priv->ucode_data.len;
90e759d1 1767 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
1768 memcpy(priv->ucode_data.v_addr, src, len);
1769 memcpy(priv->ucode_data_backup.v_addr, src, len);
1770
1771 /* Initialization instructions (3rd block) */
1772 if (init_size) {
1773 src = &ucode->data[inst_size + data_size];
1774 len = priv->ucode_init.len;
90e759d1
TW
1775 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
1776 len);
b481de9c
ZY
1777 memcpy(priv->ucode_init.v_addr, src, len);
1778 }
1779
1780 /* Initialization data (4th block) */
1781 if (init_data_size) {
1782 src = &ucode->data[inst_size + data_size + init_size];
1783 len = priv->ucode_init_data.len;
90e759d1
TW
1784 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
1785 len);
b481de9c
ZY
1786 memcpy(priv->ucode_init_data.v_addr, src, len);
1787 }
1788
1789 /* Bootstrap instructions (5th block) */
1790 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1791 len = priv->ucode_boot.len;
90e759d1 1792 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
1793 memcpy(priv->ucode_boot.v_addr, src, len);
1794
1795 /* We have our copies now, allow OS release its copies */
1796 release_firmware(ucode_raw);
1797 return 0;
1798
1799 err_pci_alloc:
1800 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 1801 ret = -ENOMEM;
5b9f8cd3 1802 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY
1803
1804 err_release:
1805 release_firmware(ucode_raw);
1806
1807 error:
90e759d1 1808 return ret;
b481de9c
ZY
1809}
1810
ada17513
MA
1811/* temporary */
1812static int iwl_mac_beacon_update(struct ieee80211_hw *hw,
1813 struct sk_buff *skb);
1814
b481de9c 1815/**
4a4a9e81 1816 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 1817 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 1818 * Alive gets handled by iwl_init_alive_start()).
b481de9c 1819 */
4a4a9e81 1820static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 1821{
57aab75a 1822 int ret = 0;
b481de9c
ZY
1823
1824 IWL_DEBUG_INFO("Runtime Alive received.\n");
1825
1826 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1827 /* We had an error bringing up the hardware, so take it
1828 * all the way back down so we can try again */
1829 IWL_DEBUG_INFO("Alive failed.\n");
1830 goto restart;
1831 }
1832
1833 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1834 * This is a paranoid check, because we would not have gotten the
1835 * "runtime" alive if code weren't properly loaded. */
b0692f2f 1836 if (iwl_verify_ucode(priv)) {
b481de9c
ZY
1837 /* Runtime instruction load was bad;
1838 * take it all the way back down so we can try again */
1839 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
1840 goto restart;
1841 }
1842
37deb2a0 1843 iwl_clear_stations_table(priv);
57aab75a
TW
1844 ret = priv->cfg->ops->lib->alive_notify(priv);
1845 if (ret) {
b481de9c 1846 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 1847 ret);
b481de9c
ZY
1848 goto restart;
1849 }
1850
5b9f8cd3 1851 /* After the ALIVE response, we can send host commands to the uCode */
b481de9c
ZY
1852 set_bit(STATUS_ALIVE, &priv->status);
1853
fee1247a 1854 if (iwl_is_rfkill(priv))
b481de9c
ZY
1855 return;
1856
36d6825b 1857 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
1858
1859 priv->active_rate = priv->rates_mask;
1860 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1861
3109ece1 1862 if (iwl_is_associated(priv)) {
c1adf9fb
GG
1863 struct iwl_rxon_cmd *active_rxon =
1864 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY
1865
1866 memcpy(&priv->staging_rxon, &priv->active_rxon,
1867 sizeof(priv->staging_rxon));
1868 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1869 } else {
1870 /* Initialize our rx_config data */
5b9f8cd3 1871 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY
1872 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1873 }
1874
9fbab516 1875 /* Configure Bluetooth device coexistence support */
5b9f8cd3 1876 iwl_send_bt_config(priv);
b481de9c 1877
4a4a9e81
TW
1878 iwl_reset_run_time_calib(priv);
1879
b481de9c 1880 /* Configure the adapter for unassociated operation */
5b9f8cd3 1881 iwl_commit_rxon(priv);
b481de9c
ZY
1882
1883 /* At this point, the NIC is initialized and operational */
47f4a587 1884 iwl_rf_kill_ct_config(priv);
5a66926a 1885
fe00b5a5
RC
1886 iwl_leds_register(priv);
1887
b481de9c 1888 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 1889 set_bit(STATUS_READY, &priv->status);
5a66926a 1890 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1891
1892 if (priv->error_recovering)
5b9f8cd3 1893 iwl_error_recovery(priv);
b481de9c 1894
58d0f361 1895 iwl_power_update_mode(priv, 1);
c46fbefa 1896
ada17513
MA
1897 /* reassociate for ADHOC mode */
1898 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1899 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1900 priv->vif);
1901 if (beacon)
1902 iwl_mac_beacon_update(priv->hw, beacon);
1903 }
1904
1905
c46fbefa 1906 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
5b9f8cd3 1907 iwl_set_mode(priv, priv->iw_mode);
c46fbefa 1908
b481de9c
ZY
1909 return;
1910
1911 restart:
1912 queue_work(priv->workqueue, &priv->restart);
1913}
1914
4e39317d 1915static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 1916
5b9f8cd3 1917static void __iwl_down(struct iwl_priv *priv)
b481de9c
ZY
1918{
1919 unsigned long flags;
1920 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
1921
1922 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
1923
b481de9c
ZY
1924 if (!exit_pending)
1925 set_bit(STATUS_EXIT_PENDING, &priv->status);
1926
ab53d8af
MA
1927 iwl_leds_unregister(priv);
1928
37deb2a0 1929 iwl_clear_stations_table(priv);
b481de9c
ZY
1930
1931 /* Unblock any waiting calls */
1932 wake_up_interruptible_all(&priv->wait_command_queue);
1933
b481de9c
ZY
1934 /* Wipe out the EXIT_PENDING status bit if we are not actually
1935 * exiting the module */
1936 if (!exit_pending)
1937 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1938
1939 /* stop and reset the on-board processor */
3395f6e9 1940 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
1941
1942 /* tell the device to stop sending interrupts */
0359facc 1943 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 1944 iwl_disable_interrupts(priv);
0359facc
MA
1945 spin_unlock_irqrestore(&priv->lock, flags);
1946 iwl_synchronize_irq(priv);
b481de9c
ZY
1947
1948 if (priv->mac80211_registered)
1949 ieee80211_stop_queues(priv->hw);
1950
5b9f8cd3 1951 /* If we have not previously called iwl_init() then
b481de9c 1952 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 1953 if (!iwl_is_init(priv)) {
b481de9c
ZY
1954 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1955 STATUS_RF_KILL_HW |
1956 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1957 STATUS_RF_KILL_SW |
9788864e
RC
1958 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1959 STATUS_GEO_CONFIGURED |
b481de9c 1960 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA
1961 STATUS_IN_SUSPEND |
1962 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1963 STATUS_EXIT_PENDING;
b481de9c
ZY
1964 goto exit;
1965 }
1966
1967 /* ...otherwise clear out all the status bits but the RF Kill and
1968 * SUSPEND bits and continue taking the NIC down. */
1969 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1970 STATUS_RF_KILL_HW |
1971 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1972 STATUS_RF_KILL_SW |
9788864e
RC
1973 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1974 STATUS_GEO_CONFIGURED |
b481de9c
ZY
1975 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
1976 STATUS_IN_SUSPEND |
1977 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA
1978 STATUS_FW_ERROR |
1979 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1980 STATUS_EXIT_PENDING;
b481de9c
ZY
1981
1982 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 1983 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 1984 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
1985 spin_unlock_irqrestore(&priv->lock, flags);
1986
da1bc453 1987 iwl_txq_ctx_stop(priv);
b3bbacb7 1988 iwl_rxq_stop(priv);
b481de9c
ZY
1989
1990 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
1991 if (!iwl_grab_nic_access(priv)) {
1992 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 1993 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 1994 iwl_release_nic_access(priv);
b481de9c
ZY
1995 }
1996 spin_unlock_irqrestore(&priv->lock, flags);
1997
1998 udelay(5);
1999
7f066108 2000 /* FIXME: apm_ops.suspend(priv) */
d535311e
GG
2001 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
2002 priv->cfg->ops->lib->apm_ops.stop(priv);
2003 else
2004 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 2005 exit:
885ba202 2006 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
2007
2008 if (priv->ibss_beacon)
2009 dev_kfree_skb(priv->ibss_beacon);
2010 priv->ibss_beacon = NULL;
2011
2012 /* clear out any free frames */
fcab423d 2013 iwl_clear_free_frames(priv);
b481de9c
ZY
2014}
2015
5b9f8cd3 2016static void iwl_down(struct iwl_priv *priv)
b481de9c
ZY
2017{
2018 mutex_lock(&priv->mutex);
5b9f8cd3 2019 __iwl_down(priv);
b481de9c 2020 mutex_unlock(&priv->mutex);
b24d22b1 2021
4e39317d 2022 iwl_cancel_deferred_work(priv);
b481de9c
ZY
2023}
2024
2025#define MAX_HW_RESTARTS 5
2026
5b9f8cd3 2027static int __iwl_up(struct iwl_priv *priv)
b481de9c 2028{
57aab75a
TW
2029 int i;
2030 int ret;
b481de9c
ZY
2031
2032 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2033 IWL_WARNING("Exit pending; will not bring the NIC up\n");
2034 return -EIO;
2035 }
2036
e903fbd4
RC
2037 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2038 IWL_ERROR("ucode not available for device bringup\n");
2039 return -EIO;
2040 }
2041
e655b9f0 2042 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 2043 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 2044 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2045 else
e655b9f0 2046 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2047
c1842d61 2048 if (iwl_is_rfkill(priv)) {
5b9f8cd3 2049 iwl_enable_interrupts(priv);
3bff19c2
EG
2050 IWL_WARNING("Radio disabled by %s RF Kill switch\n",
2051 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 2052 return 0;
b481de9c
ZY
2053 }
2054
3395f6e9 2055 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2056
1053d35f 2057 ret = iwl_hw_nic_init(priv);
57aab75a
TW
2058 if (ret) {
2059 IWL_ERROR("Unable to init nic\n");
2060 return ret;
b481de9c
ZY
2061 }
2062
2063 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
2064 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2065 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2066 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2067
2068 /* clear (again), then enable host interrupts */
3395f6e9 2069 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5b9f8cd3 2070 iwl_enable_interrupts(priv);
b481de9c
ZY
2071
2072 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
2073 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2074 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2075
2076 /* Copy original ucode data image from disk into backup cache.
2077 * This will be used to initialize the on-board processor's
2078 * data SRAM for a clean start when the runtime program first loads. */
2079 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2080 priv->ucode_data.len);
b481de9c 2081
b481de9c
ZY
2082 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2083
37deb2a0 2084 iwl_clear_stations_table(priv);
b481de9c
ZY
2085
2086 /* load bootstrap state machine,
2087 * load bootstrap program into processor's memory,
2088 * prepare to load the "initialize" uCode */
57aab75a 2089 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 2090
57aab75a
TW
2091 if (ret) {
2092 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY
2093 continue;
2094 }
2095
f3d5b45b
EG
2096 /* Clear out the uCode error bit if it is set */
2097 clear_bit(STATUS_FW_ERROR, &priv->status);
2098
b481de9c 2099 /* start card; "initialize" will load runtime ucode */
5b9f8cd3 2100 iwl_nic_start(priv);
b481de9c 2101
b481de9c
ZY
2102 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
2103
2104 return 0;
2105 }
2106
2107 set_bit(STATUS_EXIT_PENDING, &priv->status);
5b9f8cd3 2108 __iwl_down(priv);
64e72c3e 2109 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2110
2111 /* tried to restart and config the device for as long as our
2112 * patience could withstand */
2113 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
2114 return -EIO;
2115}
2116
2117
2118/*****************************************************************************
2119 *
2120 * Workqueue callbacks
2121 *
2122 *****************************************************************************/
2123
4a4a9e81 2124static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 2125{
c79dd5b5
TW
2126 struct iwl_priv *priv =
2127 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2128
2129 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2130 return;
2131
2132 mutex_lock(&priv->mutex);
f3ccc08c 2133 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY
2134 mutex_unlock(&priv->mutex);
2135}
2136
4a4a9e81 2137static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 2138{
c79dd5b5
TW
2139 struct iwl_priv *priv =
2140 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2141
2142 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2143 return;
2144
2145 mutex_lock(&priv->mutex);
4a4a9e81 2146 iwl_alive_start(priv);
b481de9c
ZY
2147 mutex_unlock(&priv->mutex);
2148}
2149
5b9f8cd3 2150static void iwl_bg_rf_kill(struct work_struct *work)
b481de9c 2151{
c79dd5b5 2152 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY
2153
2154 wake_up_interruptible(&priv->wait_command_queue);
2155
2156 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2157 return;
2158
2159 mutex_lock(&priv->mutex);
2160
fee1247a 2161 if (!iwl_is_rfkill(priv)) {
f3d67999 2162 IWL_DEBUG(IWL_DL_RF_KILL,
b481de9c
ZY
2163 "HW and/or SW RF Kill no longer active, restarting "
2164 "device\n");
2165 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2166 queue_work(priv->workqueue, &priv->restart);
2167 } else {
ad97edd2
MA
2168 /* make sure mac80211 stop sending Tx frame */
2169 if (priv->mac80211_registered)
2170 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
2171
2172 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2173 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2174 "disabled by SW switch\n");
2175 else
2176 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
2177 "Kill switch must be turned off for "
2178 "wireless networking to work.\n");
2179 }
2180 mutex_unlock(&priv->mutex);
80fcc9e2 2181 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2182}
2183
16e727e8
EG
2184static void iwl_bg_run_time_calib_work(struct work_struct *work)
2185{
2186 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2187 run_time_calib_work);
2188
2189 mutex_lock(&priv->mutex);
2190
2191 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2192 test_bit(STATUS_SCANNING, &priv->status)) {
2193 mutex_unlock(&priv->mutex);
2194 return;
2195 }
2196
2197 if (priv->start_calib) {
2198 iwl_chain_noise_calibration(priv, &priv->statistics);
2199
2200 iwl_sensitivity_calibration(priv, &priv->statistics);
2201 }
2202
2203 mutex_unlock(&priv->mutex);
2204 return;
2205}
2206
5b9f8cd3 2207static void iwl_bg_up(struct work_struct *data)
b481de9c 2208{
c79dd5b5 2209 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
2210
2211 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2212 return;
2213
2214 mutex_lock(&priv->mutex);
5b9f8cd3 2215 __iwl_up(priv);
b481de9c 2216 mutex_unlock(&priv->mutex);
80fcc9e2 2217 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2218}
2219
5b9f8cd3 2220static void iwl_bg_restart(struct work_struct *data)
b481de9c 2221{
c79dd5b5 2222 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
2223
2224 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2225 return;
2226
5b9f8cd3 2227 iwl_down(priv);
b481de9c
ZY
2228 queue_work(priv->workqueue, &priv->up);
2229}
2230
5b9f8cd3 2231static void iwl_bg_rx_replenish(struct work_struct *data)
b481de9c 2232{
c79dd5b5
TW
2233 struct iwl_priv *priv =
2234 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
2235
2236 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2237 return;
2238
2239 mutex_lock(&priv->mutex);
a55360e4 2240 iwl_rx_replenish(priv);
b481de9c
ZY
2241 mutex_unlock(&priv->mutex);
2242}
2243
7878a5a4
MA
2244#define IWL_DELAY_NEXT_SCAN (HZ*2)
2245
5b9f8cd3 2246static void iwl_post_associate(struct iwl_priv *priv)
b481de9c 2247{
b481de9c 2248 struct ieee80211_conf *conf = NULL;
857485c0 2249 int ret = 0;
1ff50bda 2250 unsigned long flags;
b481de9c 2251
05c914fe 2252 if (priv->iw_mode == NL80211_IFTYPE_AP) {
3ac7f146 2253 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
2254 return;
2255 }
2256
e174961c
JB
2257 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
2258 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
2259
2260
2261 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2262 return;
2263
b481de9c 2264
508e32e1 2265 if (!priv->vif || !priv->is_open)
948c171c 2266 return;
508e32e1 2267
c90a74ba 2268 iwl_power_cancel_timeout(priv);
2a421b91 2269 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2270
b481de9c
ZY
2271 conf = ieee80211_get_hw_conf(priv->hw);
2272
2273 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2274 iwl_commit_rxon(priv);
b481de9c 2275
3195c1f3 2276 iwl_setup_rxon_timing(priv);
857485c0 2277 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2278 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2279 if (ret)
b481de9c
ZY
2280 IWL_WARNING("REPLY_RXON_TIMING failed - "
2281 "Attempting to continue.\n");
2282
2283 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2284
42eb7c64 2285 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2286
c7de35cd 2287 iwl_set_rxon_chain(priv);
b481de9c
ZY
2288 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2289
2290 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
2291 priv->assoc_id, priv->beacon_int);
2292
2293 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2294 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2295 else
2296 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2297
2298 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2299 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2300 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2301 else
2302 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2303
05c914fe 2304 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2305 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2306
2307 }
2308
5b9f8cd3 2309 iwl_commit_rxon(priv);
b481de9c
ZY
2310
2311 switch (priv->iw_mode) {
05c914fe 2312 case NL80211_IFTYPE_STATION:
b481de9c
ZY
2313 break;
2314
05c914fe 2315 case NL80211_IFTYPE_ADHOC:
b481de9c 2316
c46fbefa
AK
2317 /* assume default assoc id */
2318 priv->assoc_id = 1;
b481de9c 2319
4f40e4d9 2320 iwl_rxon_add_station(priv, priv->bssid, 0);
5b9f8cd3 2321 iwl_send_beacon_cmd(priv);
b481de9c
ZY
2322
2323 break;
2324
2325 default:
2326 IWL_ERROR("%s Should not be called in %d mode\n",
3ac7f146 2327 __func__, priv->iw_mode);
b481de9c
ZY
2328 break;
2329 }
2330
05c914fe 2331 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2332 priv->assoc_station_added = 1;
2333
1ff50bda
EG
2334 spin_lock_irqsave(&priv->lock, flags);
2335 iwl_activate_qos(priv, 0);
2336 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2337
04816448
GE
2338 /* the chain noise calibration will enabled PM upon completion
2339 * If chain noise has already been run, then we need to enable
2340 * power management here */
2341 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2342 iwl_power_enable_management(priv);
c90a74ba
EG
2343
2344 /* Enable Rx differential gain and sensitivity calibrations */
2345 iwl_chain_noise_reset(priv);
2346 priv->start_calib = 1;
2347
508e32e1
RC
2348}
2349
b481de9c
ZY
2350/*****************************************************************************
2351 *
2352 * mac80211 entry point functions
2353 *
2354 *****************************************************************************/
2355
154b25ce 2356#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2357
5b9f8cd3 2358static int iwl_mac_start(struct ieee80211_hw *hw)
b481de9c 2359{
c79dd5b5 2360 struct iwl_priv *priv = hw->priv;
5a66926a 2361 int ret;
cf88c433 2362 u16 pci_cmd;
b481de9c
ZY
2363
2364 IWL_DEBUG_MAC80211("enter\n");
2365
5a66926a
ZY
2366 if (pci_enable_device(priv->pci_dev)) {
2367 IWL_ERROR("Fail to pci_enable_device\n");
2368 return -ENODEV;
2369 }
2370 pci_restore_state(priv->pci_dev);
2371 pci_enable_msi(priv->pci_dev);
2372
cf88c433
TW
2373 /* enable interrupts if needed: hw bug w/a */
2374 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2375 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2376 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2377 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2378 }
2379
5b9f8cd3 2380 ret = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
5a66926a
ZY
2381 DRV_NAME, priv);
2382 if (ret) {
2383 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
2384 goto out_disable_msi;
2385 }
2386
b481de9c
ZY
2387 /* we should be verifying the device is ready to be opened */
2388 mutex_lock(&priv->mutex);
2389
c1adf9fb 2390 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY
2391 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2392 * ucode filename and max sizes are card-specific. */
b481de9c 2393
5a66926a 2394 if (!priv->ucode_code.len) {
5b9f8cd3 2395 ret = iwl_read_ucode(priv);
5a66926a
ZY
2396 if (ret) {
2397 IWL_ERROR("Could not read microcode: %d\n", ret);
2398 mutex_unlock(&priv->mutex);
2399 goto out_release_irq;
2400 }
2401 }
b481de9c 2402
5b9f8cd3 2403 ret = __iwl_up(priv);
5a66926a 2404
b481de9c 2405 mutex_unlock(&priv->mutex);
5a66926a 2406
80fcc9e2
AG
2407 iwl_rfkill_set_hw_state(priv);
2408
e655b9f0
ZY
2409 if (ret)
2410 goto out_release_irq;
2411
c1842d61
TW
2412 if (iwl_is_rfkill(priv))
2413 goto out;
2414
e655b9f0
ZY
2415 IWL_DEBUG_INFO("Start UP work done.\n");
2416
2417 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2418 return 0;
2419
fe9b6b72 2420 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2421 * mac80211 will not be run successfully. */
154b25ce
EG
2422 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2423 test_bit(STATUS_READY, &priv->status),
2424 UCODE_READY_TIMEOUT);
2425 if (!ret) {
2426 if (!test_bit(STATUS_READY, &priv->status)) {
2427 IWL_ERROR("START_ALIVE timeout after %dms.\n",
2428 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2429 ret = -ETIMEDOUT;
2430 goto out_release_irq;
5a66926a 2431 }
fe9b6b72 2432 }
0a078ffa 2433
c1842d61 2434out:
0a078ffa 2435 priv->is_open = 1;
b481de9c
ZY
2436 IWL_DEBUG_MAC80211("leave\n");
2437 return 0;
5a66926a
ZY
2438
2439out_release_irq:
2440 free_irq(priv->pci_dev->irq, priv);
2441out_disable_msi:
2442 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY
2443 pci_disable_device(priv->pci_dev);
2444 priv->is_open = 0;
2445 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 2446 return ret;
b481de9c
ZY
2447}
2448
5b9f8cd3 2449static void iwl_mac_stop(struct ieee80211_hw *hw)
b481de9c 2450{
c79dd5b5 2451 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2452
2453 IWL_DEBUG_MAC80211("enter\n");
948c171c 2454
e655b9f0
ZY
2455 if (!priv->is_open) {
2456 IWL_DEBUG_MAC80211("leave - skip\n");
2457 return;
2458 }
2459
b481de9c 2460 priv->is_open = 0;
5a66926a 2461
fee1247a 2462 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
2463 /* stop mac, cancel any scan request and clear
2464 * RXON_FILTER_ASSOC_MSK BIT
2465 */
5a66926a 2466 mutex_lock(&priv->mutex);
2a421b91 2467 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2468 mutex_unlock(&priv->mutex);
fde3571f
MA
2469 }
2470
5b9f8cd3 2471 iwl_down(priv);
5a66926a
ZY
2472
2473 flush_workqueue(priv->workqueue);
2474 free_irq(priv->pci_dev->irq, priv);
2475 pci_disable_msi(priv->pci_dev);
2476 pci_save_state(priv->pci_dev);
2477 pci_disable_device(priv->pci_dev);
948c171c 2478
b481de9c 2479 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2480}
2481
5b9f8cd3 2482static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2483{
c79dd5b5 2484 struct iwl_priv *priv = hw->priv;
b481de9c 2485
f3674227 2486 IWL_DEBUG_MACDUMP("enter\n");
b481de9c 2487
b481de9c 2488 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2489 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2490
e039fa4a 2491 if (iwl_tx_skb(priv, skb))
b481de9c
ZY
2492 dev_kfree_skb_any(skb);
2493
f3674227 2494 IWL_DEBUG_MACDUMP("leave\n");
b481de9c
ZY
2495 return 0;
2496}
2497
5b9f8cd3 2498static int iwl_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2499 struct ieee80211_if_init_conf *conf)
2500{
c79dd5b5 2501 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2502 unsigned long flags;
2503
32bfd35d 2504 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 2505
32bfd35d
JB
2506 if (priv->vif) {
2507 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 2508 return -EOPNOTSUPP;
b481de9c
ZY
2509 }
2510
2511 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2512 priv->vif = conf->vif;
60294de3 2513 priv->iw_mode = conf->type;
b481de9c
ZY
2514
2515 spin_unlock_irqrestore(&priv->lock, flags);
2516
2517 mutex_lock(&priv->mutex);
864792e3
TW
2518
2519 if (conf->mac_addr) {
e174961c 2520 IWL_DEBUG_MAC80211("Set %pM\n", conf->mac_addr);
864792e3
TW
2521 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2522 }
b481de9c 2523
5b9f8cd3 2524 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
c46fbefa
AK
2525 /* we are not ready, will run again when ready */
2526 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2527
b481de9c
ZY
2528 mutex_unlock(&priv->mutex);
2529
5a66926a 2530 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2531 return 0;
2532}
2533
2534/**
5b9f8cd3 2535 * iwl_mac_config - mac80211 config callback
b481de9c
ZY
2536 *
2537 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2538 * be set inappropriately and the driver currently sets the hardware up to
2539 * use it whenever needed.
2540 */
5b9f8cd3 2541static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 2542{
c79dd5b5 2543 struct iwl_priv *priv = hw->priv;
bf85ea4f 2544 const struct iwl_channel_info *ch_info;
e8975581 2545 struct ieee80211_conf *conf = &hw->conf;
b481de9c 2546 unsigned long flags;
76bb77e0 2547 int ret = 0;
82a66bbb 2548 u16 channel;
b481de9c
ZY
2549
2550 mutex_lock(&priv->mutex);
8318d78a 2551 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 2552
ae5eb026
JB
2553 priv->current_ht_config.is_ht = conf->ht.enabled;
2554
14a08a7f 2555 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
64e72c3e 2556 IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
14a08a7f 2557 goto out;
64e72c3e
MA
2558 }
2559
14a08a7f
EG
2560 if (!conf->radio_enabled)
2561 iwl_radio_kill_sw_disable_radio(priv);
2562
fee1247a 2563 if (!iwl_is_ready(priv)) {
b481de9c 2564 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
2565 ret = -EIO;
2566 goto out;
b481de9c
ZY
2567 }
2568
1ea87396 2569 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2570 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470 2571 IWL_DEBUG_MAC80211("leave - scanning\n");
b481de9c 2572 mutex_unlock(&priv->mutex);
a0646470 2573 return 0;
b481de9c
ZY
2574 }
2575
82a66bbb
TW
2576 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2577 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2578 if (!is_channel_valid(ch_info)) {
b481de9c 2579 IWL_DEBUG_MAC80211("leave - invalid channel\n");
76bb77e0
ZY
2580 ret = -EINVAL;
2581 goto out;
b481de9c
ZY
2582 }
2583
05c914fe 2584 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
398f9e76
AK
2585 !is_channel_ibss(ch_info)) {
2586 IWL_ERROR("channel %d in band %d not IBSS channel\n",
2587 conf->channel->hw_value, conf->channel->band);
2588 ret = -EINVAL;
2589 goto out;
2590 }
2591
82a66bbb
TW
2592 spin_lock_irqsave(&priv->lock, flags);
2593
b5d7be5e 2594
78330fdd 2595 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY
2596 * from any ht related info since 2.4 does not
2597 * support ht */
82a66bbb 2598 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY
2599#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2600 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2601#endif
2602 )
2603 priv->staging_rxon.flags = 0;
b481de9c 2604
17e72782 2605 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 2606
82a66bbb 2607 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
2608
2609 /* The list of supported rates and rate mask can be different
8318d78a 2610 * for each band; since the band may have changed, reset
b481de9c 2611 * the rate mask to what mac80211 lists */
5b9f8cd3 2612 iwl_set_rate(priv);
b481de9c
ZY
2613
2614 spin_unlock_irqrestore(&priv->lock, flags);
2615
2616#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2617 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
5b9f8cd3 2618 iwl_hw_channel_switch(priv, conf->channel);
76bb77e0 2619 goto out;
b481de9c
ZY
2620 }
2621#endif
2622
b481de9c
ZY
2623 if (!conf->radio_enabled) {
2624 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 2625 goto out;
b481de9c
ZY
2626 }
2627
fee1247a 2628 if (iwl_is_rfkill(priv)) {
b481de9c 2629 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
2630 ret = -EIO;
2631 goto out;
b481de9c
ZY
2632 }
2633
e602cb18
EK
2634 if (conf->flags & IEEE80211_CONF_PS)
2635 ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
2636 else
2637 ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
2638 if (ret)
2639 IWL_DEBUG_MAC80211("Error setting power level\n");
2640
630fe9b6
TW
2641 IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
2642 priv->tx_power_user_lmt, conf->power_level);
2643
2644 iwl_set_tx_power(priv, conf->power_level, false);
2645
5b9f8cd3 2646 iwl_set_rate(priv);
b481de9c
ZY
2647
2648 if (memcmp(&priv->active_rxon,
2649 &priv->staging_rxon, sizeof(priv->staging_rxon)))
5b9f8cd3 2650 iwl_commit_rxon(priv);
b481de9c
ZY
2651 else
2652 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
2653
2654 IWL_DEBUG_MAC80211("leave\n");
2655
a0646470 2656out:
5a66926a 2657 mutex_unlock(&priv->mutex);
76bb77e0 2658 return ret;
b481de9c
ZY
2659}
2660
5b9f8cd3 2661static void iwl_config_ap(struct iwl_priv *priv)
b481de9c 2662{
857485c0 2663 int ret = 0;
1ff50bda 2664 unsigned long flags;
b481de9c 2665
d986bcd1 2666 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
2667 return;
2668
2669 /* The following should be done only at AP bring up */
3195c1f3 2670 if (!iwl_is_associated(priv)) {
b481de9c
ZY
2671
2672 /* RXON - unassoc (to set timing command) */
2673 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2674 iwl_commit_rxon(priv);
b481de9c
ZY
2675
2676 /* RXON Timing */
3195c1f3 2677 iwl_setup_rxon_timing(priv);
857485c0 2678 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2679 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2680 if (ret)
b481de9c
ZY
2681 IWL_WARNING("REPLY_RXON_TIMING failed - "
2682 "Attempting to continue.\n");
2683
c7de35cd 2684 iwl_set_rxon_chain(priv);
b481de9c
ZY
2685
2686 /* FIXME: what should be the assoc_id for AP? */
2687 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2688 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2689 priv->staging_rxon.flags |=
2690 RXON_FLG_SHORT_PREAMBLE_MSK;
2691 else
2692 priv->staging_rxon.flags &=
2693 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2694
2695 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2696 if (priv->assoc_capability &
2697 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2698 priv->staging_rxon.flags |=
2699 RXON_FLG_SHORT_SLOT_MSK;
2700 else
2701 priv->staging_rxon.flags &=
2702 ~RXON_FLG_SHORT_SLOT_MSK;
2703
05c914fe 2704 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2705 priv->staging_rxon.flags &=
2706 ~RXON_FLG_SHORT_SLOT_MSK;
2707 }
2708 /* restore RXON assoc */
2709 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2710 iwl_commit_rxon(priv);
1ff50bda
EG
2711 spin_lock_irqsave(&priv->lock, flags);
2712 iwl_activate_qos(priv, 1);
2713 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2714 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2715 }
5b9f8cd3 2716 iwl_send_beacon_cmd(priv);
b481de9c
ZY
2717
2718 /* FIXME - we need to add code here to detect a totally new
2719 * configuration, reset the AP, unassoc, rxon timing, assoc,
2720 * clear sta table, add BCAST sta... */
2721}
2722
9d139c81 2723
5b9f8cd3 2724static int iwl_mac_config_interface(struct ieee80211_hw *hw,
32bfd35d 2725 struct ieee80211_vif *vif,
b481de9c
ZY
2726 struct ieee80211_if_conf *conf)
2727{
c79dd5b5 2728 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2729 int rc;
2730
2731 if (conf == NULL)
2732 return -EIO;
2733
b716bb91
EG
2734 if (priv->vif != vif) {
2735 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
2736 return 0;
2737 }
2738
05c914fe 2739 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB
2740 conf->changed & IEEE80211_IFCC_BEACON) {
2741 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2742 if (!beacon)
2743 return -ENOMEM;
ada17513 2744 mutex_lock(&priv->mutex);
5b9f8cd3 2745 rc = iwl_mac_beacon_update(hw, beacon);
ada17513 2746 mutex_unlock(&priv->mutex);
9d139c81
JB
2747 if (rc)
2748 return rc;
2749 }
2750
fee1247a 2751 if (!iwl_is_alive(priv))
5a66926a
ZY
2752 return -EAGAIN;
2753
b481de9c
ZY
2754 mutex_lock(&priv->mutex);
2755
b481de9c 2756 if (conf->bssid)
e174961c 2757 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
b481de9c 2758
4150c572
JB
2759/*
2760 * very dubious code was here; the probe filtering flag is never set:
2761 *
b481de9c
ZY
2762 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2763 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 2764 */
b481de9c 2765
05c914fe 2766 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY
2767 if (!conf->bssid) {
2768 conf->bssid = priv->mac_addr;
2769 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e174961c
JB
2770 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
2771 conf->bssid);
b481de9c
ZY
2772 }
2773 if (priv->ibss_beacon)
2774 dev_kfree_skb(priv->ibss_beacon);
2775
9d139c81 2776 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
2777 }
2778
fee1247a 2779 if (iwl_is_rfkill(priv))
fde3571f
MA
2780 goto done;
2781
b481de9c
ZY
2782 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
2783 !is_multicast_ether_addr(conf->bssid)) {
2784 /* If there is currently a HW scan going on in the background
2785 * then we need to cancel it else the RXON below will fail. */
2a421b91 2786 if (iwl_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
2787 IWL_WARNING("Aborted scan still in progress "
2788 "after 100ms\n");
2789 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2790 mutex_unlock(&priv->mutex);
2791 return -EAGAIN;
2792 }
2793 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
2794
2795 /* TODO: Audit driver for usage of these members and see
2796 * if mac80211 deprecates them (priv->bssid looks like it
2797 * shouldn't be there, but I haven't scanned the IBSS code
2798 * to verify) - jpk */
2799 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2800
05c914fe 2801 if (priv->iw_mode == NL80211_IFTYPE_AP)
5b9f8cd3 2802 iwl_config_ap(priv);
b481de9c 2803 else {
5b9f8cd3 2804 rc = iwl_commit_rxon(priv);
05c914fe 2805 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
4f40e4d9 2806 iwl_rxon_add_station(
b481de9c
ZY
2807 priv, priv->active_rxon.bssid_addr, 1);
2808 }
2809
2810 } else {
2a421b91 2811 iwl_scan_cancel_timeout(priv, 100);
b481de9c 2812 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2813 iwl_commit_rxon(priv);
b481de9c
ZY
2814 }
2815
fde3571f 2816 done:
b481de9c
ZY
2817 IWL_DEBUG_MAC80211("leave\n");
2818 mutex_unlock(&priv->mutex);
2819
2820 return 0;
2821}
2822
5b9f8cd3 2823static void iwl_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
2824 unsigned int changed_flags,
2825 unsigned int *total_flags,
2826 int mc_count, struct dev_addr_list *mc_list)
2827{
4419e39b 2828 struct iwl_priv *priv = hw->priv;
352bc8de
ZY
2829 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
2830
2831 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
2832 changed_flags, *total_flags);
25b3f57c 2833
352bc8de
ZY
2834 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
2835 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
2836 *filter_flags |= RXON_FILTER_PROMISC_MSK;
2837 else
2838 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
2839 }
2840 if (changed_flags & FIF_ALLMULTI) {
2841 if (*total_flags & FIF_ALLMULTI)
2842 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
2843 else
2844 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
2845 }
2846 if (changed_flags & FIF_CONTROL) {
2847 if (*total_flags & FIF_CONTROL)
2848 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
2849 else
2850 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
2851 }
2852 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
2853 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
2854 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
2855 else
2856 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
4419e39b 2857 }
352bc8de
ZY
2858
2859 /* We avoid iwl_commit_rxon here to commit the new filter flags
2860 * since mac80211 will call ieee80211_hw_config immediately.
2861 * (mc_list is not supported at this time). Otherwise, we need to
2862 * queue a background iwl_commit_rxon work.
2863 */
2864
2865 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
25b3f57c 2866 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
4150c572
JB
2867}
2868
5b9f8cd3 2869static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2870 struct ieee80211_if_init_conf *conf)
2871{
c79dd5b5 2872 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2873
2874 IWL_DEBUG_MAC80211("enter\n");
2875
2876 mutex_lock(&priv->mutex);
948c171c 2877
fee1247a 2878 if (iwl_is_ready_rf(priv)) {
2a421b91 2879 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2880 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2881 iwl_commit_rxon(priv);
fde3571f 2882 }
32bfd35d
JB
2883 if (priv->vif == conf->vif) {
2884 priv->vif = NULL;
b481de9c 2885 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY
2886 }
2887 mutex_unlock(&priv->mutex);
2888
2889 IWL_DEBUG_MAC80211("leave\n");
2890
2891}
471b3efd 2892
3109ece1 2893#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
5b9f8cd3 2894static void iwl_bss_info_changed(struct ieee80211_hw *hw,
471b3efd
JB
2895 struct ieee80211_vif *vif,
2896 struct ieee80211_bss_conf *bss_conf,
2897 u32 changes)
220173b0 2898{
c79dd5b5 2899 struct iwl_priv *priv = hw->priv;
220173b0 2900
3109ece1
TW
2901 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
2902
471b3efd 2903 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW
2904 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
2905 bss_conf->use_short_preamble);
471b3efd 2906 if (bss_conf->use_short_preamble)
220173b0
TW
2907 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2908 else
2909 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2910 }
2911
471b3efd 2912 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 2913 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 2914 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
2915 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2916 else
2917 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2918 }
2919
98952d5d 2920 if (changes & BSS_CHANGED_HT) {
5b9f8cd3 2921 iwl_ht_conf(priv, bss_conf);
c7de35cd 2922 iwl_set_rxon_chain(priv);
98952d5d
TW
2923 }
2924
471b3efd 2925 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 2926 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
2927 /* This should never happen as this function should
2928 * never be called from interrupt context. */
2929 if (WARN_ON_ONCE(in_interrupt()))
2930 return;
3109ece1
TW
2931 if (bss_conf->assoc) {
2932 priv->assoc_id = bss_conf->aid;
2933 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 2934 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW
2935 priv->timestamp = bss_conf->timestamp;
2936 priv->assoc_capability = bss_conf->assoc_capability;
9ccacb86
TW
2937
2938 /* we have just associated, don't start scan too early
2939 * leave time for EAPOL exchange to complete
2940 */
3109ece1
TW
2941 priv->next_scan_jiffies = jiffies +
2942 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1 2943 mutex_lock(&priv->mutex);
5b9f8cd3 2944 iwl_post_associate(priv);
508e32e1 2945 mutex_unlock(&priv->mutex);
3109ece1
TW
2946 } else {
2947 priv->assoc_id = 0;
2948 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
2949 }
2950 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2951 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 2952 iwl_send_rxon_assoc(priv);
471b3efd
JB
2953 }
2954
220173b0 2955}
b481de9c 2956
cb43dc25 2957static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len)
b481de9c 2958{
b481de9c 2959 unsigned long flags;
c79dd5b5 2960 struct iwl_priv *priv = hw->priv;
8d09a5e1 2961 int ret;
b481de9c
ZY
2962
2963 IWL_DEBUG_MAC80211("enter\n");
2964
052c4b9f 2965 mutex_lock(&priv->mutex);
b481de9c
ZY
2966 spin_lock_irqsave(&priv->lock, flags);
2967
fee1247a 2968 if (!iwl_is_ready_rf(priv)) {
cb43dc25 2969 ret = -EIO;
b481de9c
ZY
2970 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
2971 goto out_unlock;
2972 }
2973
8d09a5e1
TW
2974 /* We don't schedule scan within next_scan_jiffies period.
2975 * Avoid scanning during possible EAPOL exchange, return
2976 * success immediately.
2977 */
7878a5a4 2978 if (priv->next_scan_jiffies &&
cb43dc25 2979 time_after(priv->next_scan_jiffies, jiffies)) {
681c0050 2980 IWL_DEBUG_SCAN("scan rejected: within next scan period\n");
8d09a5e1
TW
2981 queue_work(priv->workqueue, &priv->scan_completed);
2982 ret = 0;
7878a5a4
MA
2983 goto out_unlock;
2984 }
8d09a5e1 2985
b481de9c 2986 /* if we just finished scan ask for delay */
681c0050 2987 if (iwl_is_associated(priv) && priv->last_scan_jiffies &&
cb43dc25 2988 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) {
681c0050 2989 IWL_DEBUG_SCAN("scan rejected: within previous scan period\n");
8d09a5e1
TW
2990 queue_work(priv->workqueue, &priv->scan_completed);
2991 ret = 0;
b481de9c
ZY
2992 goto out_unlock;
2993 }
8d09a5e1 2994
cb43dc25 2995 if (ssid_len) {
b481de9c 2996 priv->one_direct_scan = 1;
cb43dc25 2997 priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE);
b481de9c 2998 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
cb43dc25 2999 } else {
948c171c 3000 priv->one_direct_scan = 0;
cb43dc25 3001 }
b481de9c 3002
cb43dc25 3003 ret = iwl_scan_initiate(priv);
b481de9c
ZY
3004
3005 IWL_DEBUG_MAC80211("leave\n");
3006
3007out_unlock:
3008 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 3009 mutex_unlock(&priv->mutex);
b481de9c 3010
cb43dc25 3011 return ret;
b481de9c
ZY
3012}
3013
5b9f8cd3 3014static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
ab885f8c
EG
3015 struct ieee80211_key_conf *keyconf, const u8 *addr,
3016 u32 iv32, u16 *phase1key)
3017{
ab885f8c 3018
9f58671e 3019 struct iwl_priv *priv = hw->priv;
ab885f8c
EG
3020 IWL_DEBUG_MAC80211("enter\n");
3021
9f58671e 3022 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
ab885f8c
EG
3023
3024 IWL_DEBUG_MAC80211("leave\n");
3025}
3026
5b9f8cd3 3027static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
3028 const u8 *local_addr, const u8 *addr,
3029 struct ieee80211_key_conf *key)
3030{
c79dd5b5 3031 struct iwl_priv *priv = hw->priv;
deb09c43
EG
3032 int ret = 0;
3033 u8 sta_id = IWL_INVALID_STATION;
6974e363 3034 u8 is_default_wep_key = 0;
b481de9c
ZY
3035
3036 IWL_DEBUG_MAC80211("enter\n");
3037
099b40b7 3038 if (priv->hw_params.sw_crypto) {
b481de9c
ZY
3039 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
3040 return -EOPNOTSUPP;
3041 }
3042
3043 if (is_zero_ether_addr(addr))
3044 /* only support pairwise keys */
3045 return -EOPNOTSUPP;
3046
947b13a7 3047 sta_id = iwl_find_station(priv, addr);
6974e363 3048 if (sta_id == IWL_INVALID_STATION) {
e174961c
JB
3049 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
3050 addr);
6974e363 3051 return -EINVAL;
b481de9c 3052
deb09c43 3053 }
b481de9c 3054
6974e363 3055 mutex_lock(&priv->mutex);
2a421b91 3056 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG
3057 mutex_unlock(&priv->mutex);
3058
3059 /* If we are getting WEP group key and we didn't receive any key mapping
3060 * so far, we are in legacy wep mode (group key only), otherwise we are
3061 * in 1X mode.
3062 * In legacy wep mode, we use another host command to the uCode */
5425e490 3063 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
05c914fe 3064 priv->iw_mode != NL80211_IFTYPE_AP) {
6974e363
EG
3065 if (cmd == SET_KEY)
3066 is_default_wep_key = !priv->key_mapping_key;
3067 else
ccc038ab
EG
3068 is_default_wep_key =
3069 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 3070 }
052c4b9f 3071
b481de9c 3072 switch (cmd) {
deb09c43 3073 case SET_KEY:
6974e363
EG
3074 if (is_default_wep_key)
3075 ret = iwl_set_default_wep_key(priv, key);
deb09c43 3076 else
7480513f 3077 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG
3078
3079 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY
3080 break;
3081 case DISABLE_KEY:
6974e363
EG
3082 if (is_default_wep_key)
3083 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 3084 else
3ec47732 3085 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG
3086
3087 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY
3088 break;
3089 default:
deb09c43 3090 ret = -EINVAL;
b481de9c
ZY
3091 }
3092
3093 IWL_DEBUG_MAC80211("leave\n");
b481de9c 3094
deb09c43 3095 return ret;
b481de9c
ZY
3096}
3097
5b9f8cd3 3098static int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
3099 const struct ieee80211_tx_queue_params *params)
3100{
c79dd5b5 3101 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3102 unsigned long flags;
3103 int q;
b481de9c
ZY
3104
3105 IWL_DEBUG_MAC80211("enter\n");
3106
fee1247a 3107 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3108 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3109 return -EIO;
3110 }
3111
3112 if (queue >= AC_NUM) {
3113 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
3114 return 0;
3115 }
3116
b481de9c
ZY
3117 q = AC_NUM - 1 - queue;
3118
3119 spin_lock_irqsave(&priv->lock, flags);
3120
3121 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
3122 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
3123 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
3124 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 3125 cpu_to_le16((params->txop * 32));
b481de9c
ZY
3126
3127 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
3128 priv->qos_data.qos_active = 1;
3129
05c914fe 3130 if (priv->iw_mode == NL80211_IFTYPE_AP)
1ff50bda 3131 iwl_activate_qos(priv, 1);
3109ece1 3132 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 3133 iwl_activate_qos(priv, 0);
b481de9c 3134
1ff50bda 3135 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3136
b481de9c
ZY
3137 IWL_DEBUG_MAC80211("leave\n");
3138 return 0;
3139}
3140
5b9f8cd3 3141static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
d783b061 3142 enum ieee80211_ampdu_mlme_action action,
17741cdc 3143 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
d783b061
TW
3144{
3145 struct iwl_priv *priv = hw->priv;
d783b061 3146
e174961c
JB
3147 IWL_DEBUG_HT("A-MPDU action on addr %pM tid %d\n",
3148 sta->addr, tid);
d783b061
TW
3149
3150 if (!(priv->cfg->sku & IWL_SKU_N))
3151 return -EACCES;
3152
3153 switch (action) {
3154 case IEEE80211_AMPDU_RX_START:
3155 IWL_DEBUG_HT("start Rx\n");
9f58671e 3156 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
d783b061
TW
3157 case IEEE80211_AMPDU_RX_STOP:
3158 IWL_DEBUG_HT("stop Rx\n");
9f58671e 3159 return iwl_sta_rx_agg_stop(priv, sta->addr, tid);
d783b061
TW
3160 case IEEE80211_AMPDU_TX_START:
3161 IWL_DEBUG_HT("start Tx\n");
17741cdc 3162 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
d783b061
TW
3163 case IEEE80211_AMPDU_TX_STOP:
3164 IWL_DEBUG_HT("stop Tx\n");
17741cdc 3165 return iwl_tx_agg_stop(priv, sta->addr, tid);
d783b061
TW
3166 default:
3167 IWL_DEBUG_HT("unknown\n");
3168 return -EINVAL;
3169 break;
3170 }
3171 return 0;
3172}
9f58671e 3173
5b9f8cd3 3174static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3175 struct ieee80211_tx_queue_stats *stats)
3176{
c79dd5b5 3177 struct iwl_priv *priv = hw->priv;
b481de9c 3178 int i, avail;
16466903 3179 struct iwl_tx_queue *txq;
443cfd45 3180 struct iwl_queue *q;
b481de9c
ZY
3181 unsigned long flags;
3182
3183 IWL_DEBUG_MAC80211("enter\n");
3184
fee1247a 3185 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3186 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3187 return -EIO;
3188 }
3189
3190 spin_lock_irqsave(&priv->lock, flags);
3191
3192 for (i = 0; i < AC_NUM; i++) {
3193 txq = &priv->txq[i];
3194 q = &txq->q;
443cfd45 3195 avail = iwl_queue_space(q);
b481de9c 3196
57ffc589
JB
3197 stats[i].len = q->n_window - avail;
3198 stats[i].limit = q->n_window - q->high_mark;
3199 stats[i].count = q->n_window;
b481de9c
ZY
3200
3201 }
3202 spin_unlock_irqrestore(&priv->lock, flags);
3203
3204 IWL_DEBUG_MAC80211("leave\n");
3205
3206 return 0;
3207}
3208
5b9f8cd3 3209static int iwl_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3210 struct ieee80211_low_level_stats *stats)
3211{
bf403db8
EK
3212 struct iwl_priv *priv = hw->priv;
3213
3214 priv = hw->priv;
b481de9c
ZY
3215 IWL_DEBUG_MAC80211("enter\n");
3216 IWL_DEBUG_MAC80211("leave\n");
3217
3218 return 0;
3219}
3220
5b9f8cd3 3221static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3222{
c79dd5b5 3223 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3224 unsigned long flags;
3225
3226 mutex_lock(&priv->mutex);
3227 IWL_DEBUG_MAC80211("enter\n");
3228
b481de9c 3229 spin_lock_irqsave(&priv->lock, flags);
fd105e79 3230 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 3231 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3232
c7de35cd 3233 iwl_reset_qos(priv);
b481de9c 3234
b481de9c
ZY
3235 spin_lock_irqsave(&priv->lock, flags);
3236 priv->assoc_id = 0;
3237 priv->assoc_capability = 0;
b481de9c
ZY
3238 priv->assoc_station_added = 0;
3239
3240 /* new association get rid of ibss beacon skb */
3241 if (priv->ibss_beacon)
3242 dev_kfree_skb(priv->ibss_beacon);
3243
3244 priv->ibss_beacon = NULL;
3245
3246 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 3247 priv->timestamp = 0;
05c914fe 3248 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY
3249 priv->beacon_int = 0;
3250
3251 spin_unlock_irqrestore(&priv->lock, flags);
3252
fee1247a 3253 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
3254 IWL_DEBUG_MAC80211("leave - not ready\n");
3255 mutex_unlock(&priv->mutex);
3256 return;
3257 }
3258
052c4b9f 3259 /* we are restarting association process
3260 * clear RXON_FILTER_ASSOC_MSK bit
3261 */
05c914fe 3262 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2a421b91 3263 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 3264 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 3265 iwl_commit_rxon(priv);
052c4b9f 3266 }
3267
5da4b55f
MA
3268 iwl_power_update_mode(priv, 0);
3269
b481de9c 3270 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 3271 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
052c4b9f 3272
c90a74ba
EG
3273 /* switch to CAM during association period.
3274 * the ucode will block any association/authentication
3275 * frome during assiciation period if it can not hear
3276 * the AP because of PM. the timer enable PM back is
3277 * association do not complete
3278 */
3279 if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN |
3280 IEEE80211_CHAN_RADAR))
3281 iwl_power_disable_management(priv, 3000);
3282
b481de9c
ZY
3283 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
3284 mutex_unlock(&priv->mutex);
3285 return;
3286 }
3287
5b9f8cd3 3288 iwl_set_rate(priv);
b481de9c
ZY
3289
3290 mutex_unlock(&priv->mutex);
3291
3292 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
3293}
3294
5b9f8cd3 3295static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3296{
c79dd5b5 3297 struct iwl_priv *priv = hw->priv;
b481de9c 3298 unsigned long flags;
2ff75b78 3299 __le64 timestamp;
b481de9c 3300
b481de9c
ZY
3301 IWL_DEBUG_MAC80211("enter\n");
3302
fee1247a 3303 if (!iwl_is_ready_rf(priv)) {
b481de9c 3304 IWL_DEBUG_MAC80211("leave - RF not ready\n");
b481de9c
ZY
3305 return -EIO;
3306 }
3307
05c914fe 3308 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
b481de9c 3309 IWL_DEBUG_MAC80211("leave - not IBSS\n");
b481de9c
ZY
3310 return -EIO;
3311 }
3312
3313 spin_lock_irqsave(&priv->lock, flags);
3314
3315 if (priv->ibss_beacon)
3316 dev_kfree_skb(priv->ibss_beacon);
3317
3318 priv->ibss_beacon = skb;
3319
3320 priv->assoc_id = 0;
2ff75b78 3321 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b94d8eea 3322 priv->timestamp = le64_to_cpu(timestamp);
b481de9c
ZY
3323
3324 IWL_DEBUG_MAC80211("leave\n");
3325 spin_unlock_irqrestore(&priv->lock, flags);
3326
c7de35cd 3327 iwl_reset_qos(priv);
b481de9c 3328
5b9f8cd3 3329 iwl_post_associate(priv);
b481de9c 3330
b481de9c
ZY
3331
3332 return 0;
3333}
3334
b481de9c
ZY
3335/*****************************************************************************
3336 *
3337 * sysfs attributes
3338 *
3339 *****************************************************************************/
3340
0a6857e7 3341#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3342
3343/*
3344 * The following adds a new attribute to the sysfs representation
3345 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3346 * used for controlling the debug level.
3347 *
3348 * See the level definitions in iwl for details.
3349 */
3350
8cf769c6
EK
3351static ssize_t show_debug_level(struct device *d,
3352 struct device_attribute *attr, char *buf)
b481de9c 3353{
8cf769c6
EK
3354 struct iwl_priv *priv = d->driver_data;
3355
3356 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3357}
8cf769c6
EK
3358static ssize_t store_debug_level(struct device *d,
3359 struct device_attribute *attr,
b481de9c
ZY
3360 const char *buf, size_t count)
3361{
8cf769c6 3362 struct iwl_priv *priv = d->driver_data;
9257746f
TW
3363 unsigned long val;
3364 int ret;
b481de9c 3365
9257746f
TW
3366 ret = strict_strtoul(buf, 0, &val);
3367 if (ret)
b481de9c
ZY
3368 printk(KERN_INFO DRV_NAME
3369 ": %s is not in hex or decimal form.\n", buf);
3370 else
8cf769c6 3371 priv->debug_level = val;
b481de9c
ZY
3372
3373 return strnlen(buf, count);
3374}
3375
8cf769c6
EK
3376static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3377 show_debug_level, store_debug_level);
3378
b481de9c 3379
0a6857e7 3380#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3381
b481de9c 3382
bc6f59bc
TW
3383static ssize_t show_version(struct device *d,
3384 struct device_attribute *attr, char *buf)
3385{
3386 struct iwl_priv *priv = d->driver_data;
885ba202 3387 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW
3388 ssize_t pos = 0;
3389 u16 eeprom_ver;
bc6f59bc
TW
3390
3391 if (palive->is_valid)
f236a265
TW
3392 pos += sprintf(buf + pos,
3393 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3394 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW
3395 palive->ucode_major, palive->ucode_minor,
3396 palive->sw_rev[0], palive->sw_rev[1],
3397 palive->ver_type, palive->ver_subtype);
bc6f59bc 3398 else
f236a265
TW
3399 pos += sprintf(buf + pos, "fw not loaded\n");
3400
3401 if (priv->eeprom) {
3402 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3403 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3404 eeprom_ver);
3405 } else {
3406 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3407 }
3408
3409 return pos;
bc6f59bc
TW
3410}
3411
3412static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3413
b481de9c
ZY
3414static ssize_t show_temperature(struct device *d,
3415 struct device_attribute *attr, char *buf)
3416{
c79dd5b5 3417 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3418
fee1247a 3419 if (!iwl_is_alive(priv))
b481de9c
ZY
3420 return -EAGAIN;
3421
91dbc5bd 3422 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY
3423}
3424
3425static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3426
b481de9c
ZY
3427static ssize_t show_tx_power(struct device *d,
3428 struct device_attribute *attr, char *buf)
3429{
c79dd5b5 3430 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
630fe9b6 3431 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
3432}
3433
3434static ssize_t store_tx_power(struct device *d,
3435 struct device_attribute *attr,
3436 const char *buf, size_t count)
3437{
c79dd5b5 3438 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3439 unsigned long val;
3440 int ret;
b481de9c 3441
9257746f
TW
3442 ret = strict_strtoul(buf, 10, &val);
3443 if (ret)
b481de9c
ZY
3444 printk(KERN_INFO DRV_NAME
3445 ": %s is not in decimal form.\n", buf);
3446 else
630fe9b6 3447 iwl_set_tx_power(priv, val, false);
b481de9c
ZY
3448
3449 return count;
3450}
3451
3452static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3453
3454static ssize_t show_flags(struct device *d,
3455 struct device_attribute *attr, char *buf)
3456{
c79dd5b5 3457 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3458
3459 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3460}
3461
3462static ssize_t store_flags(struct device *d,
3463 struct device_attribute *attr,
3464 const char *buf, size_t count)
3465{
c79dd5b5 3466 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3467 unsigned long val;
3468 u32 flags;
3469 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3470 if (ret)
9257746f
TW
3471 return ret;
3472 flags = (u32)val;
b481de9c
ZY
3473
3474 mutex_lock(&priv->mutex);
3475 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3476 /* Cancel any currently running scans... */
2a421b91 3477 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3478 IWL_WARNING("Could not cancel scan.\n");
3479 else {
9257746f 3480 IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags);
b481de9c 3481 priv->staging_rxon.flags = cpu_to_le32(flags);
5b9f8cd3 3482 iwl_commit_rxon(priv);
b481de9c
ZY
3483 }
3484 }
3485 mutex_unlock(&priv->mutex);
3486
3487 return count;
3488}
3489
3490static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3491
3492static ssize_t show_filter_flags(struct device *d,
3493 struct device_attribute *attr, char *buf)
3494{
c79dd5b5 3495 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3496
3497 return sprintf(buf, "0x%04X\n",
3498 le32_to_cpu(priv->active_rxon.filter_flags));
3499}
3500
3501static ssize_t store_filter_flags(struct device *d,
3502 struct device_attribute *attr,
3503 const char *buf, size_t count)
3504{
c79dd5b5 3505 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3506 unsigned long val;
3507 u32 filter_flags;
3508 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3509 if (ret)
9257746f
TW
3510 return ret;
3511 filter_flags = (u32)val;
b481de9c
ZY
3512
3513 mutex_lock(&priv->mutex);
3514 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3515 /* Cancel any currently running scans... */
2a421b91 3516 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3517 IWL_WARNING("Could not cancel scan.\n");
3518 else {
3519 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
3520 "0x%04X\n", filter_flags);
3521 priv->staging_rxon.filter_flags =
3522 cpu_to_le32(filter_flags);
5b9f8cd3 3523 iwl_commit_rxon(priv);
b481de9c
ZY
3524 }
3525 }
3526 mutex_unlock(&priv->mutex);
3527
3528 return count;
3529}
3530
3531static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3532 store_filter_flags);
3533
b481de9c
ZY
3534static ssize_t store_retry_rate(struct device *d,
3535 struct device_attribute *attr,
3536 const char *buf, size_t count)
3537{
c79dd5b5 3538 struct iwl_priv *priv = dev_get_drvdata(d);
9257746f
TW
3539 long val;
3540 int ret = strict_strtol(buf, 10, &val);
3541 if (!ret)
3542 return ret;
b481de9c 3543
9257746f 3544 priv->retry_rate = (val > 0) ? val : 1;
b481de9c
ZY
3545
3546 return count;
3547}
3548
3549static ssize_t show_retry_rate(struct device *d,
3550 struct device_attribute *attr, char *buf)
3551{
c79dd5b5 3552 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3553 return sprintf(buf, "%d", priv->retry_rate);
3554}
3555
3556static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3557 store_retry_rate);
3558
3559static ssize_t store_power_level(struct device *d,
3560 struct device_attribute *attr,
3561 const char *buf, size_t count)
3562{
c79dd5b5 3563 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3564 int ret;
9257746f
TW
3565 unsigned long mode;
3566
b481de9c 3567
b481de9c
ZY
3568 mutex_lock(&priv->mutex);
3569
fee1247a 3570 if (!iwl_is_ready(priv)) {
298df1f6 3571 ret = -EAGAIN;
b481de9c
ZY
3572 goto out;
3573 }
3574
9257746f 3575 ret = strict_strtoul(buf, 10, &mode);
926f0b2e 3576 if (ret)
9257746f
TW
3577 goto out;
3578
298df1f6
EK
3579 ret = iwl_power_set_user_mode(priv, mode);
3580 if (ret) {
5da4b55f
MA
3581 IWL_DEBUG_MAC80211("failed setting power mode.\n");
3582 goto out;
b481de9c 3583 }
298df1f6 3584 ret = count;
b481de9c
ZY
3585
3586 out:
3587 mutex_unlock(&priv->mutex);
298df1f6 3588 return ret;
b481de9c
ZY
3589}
3590
b481de9c
ZY
3591static ssize_t show_power_level(struct device *d,
3592 struct device_attribute *attr, char *buf)
3593{
c79dd5b5 3594 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK
3595 int mode = priv->power_data.user_power_setting;
3596 int system = priv->power_data.system_power_setting;
5da4b55f 3597 int level = priv->power_data.power_mode;
b481de9c
ZY
3598 char *p = buf;
3599
298df1f6
EK
3600 switch (system) {
3601 case IWL_POWER_SYS_AUTO:
3602 p += sprintf(p, "SYSTEM:auto");
b481de9c 3603 break;
298df1f6
EK
3604 case IWL_POWER_SYS_AC:
3605 p += sprintf(p, "SYSTEM:ac");
3606 break;
3607 case IWL_POWER_SYS_BATTERY:
3608 p += sprintf(p, "SYSTEM:battery");
b481de9c 3609 break;
b481de9c 3610 }
298df1f6 3611
c3056065
AK
3612 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
3613 "fixed" : "auto");
298df1f6
EK
3614 p += sprintf(p, "\tINDEX:%d", level);
3615 p += sprintf(p, "\n");
3ac7f146 3616 return p - buf + 1;
b481de9c
ZY
3617}
3618
3619static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3620 store_power_level);
3621
b481de9c
ZY
3622
3623static ssize_t show_statistics(struct device *d,
3624 struct device_attribute *attr, char *buf)
3625{
c79dd5b5 3626 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 3627 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 3628 u32 len = 0, ofs = 0;
3ac7f146 3629 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY
3630 int rc = 0;
3631
fee1247a 3632 if (!iwl_is_alive(priv))
b481de9c
ZY
3633 return -EAGAIN;
3634
3635 mutex_lock(&priv->mutex);
49ea8596 3636 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
3637 mutex_unlock(&priv->mutex);
3638
3639 if (rc) {
3640 len = sprintf(buf,
3641 "Error sending statistics request: 0x%08X\n", rc);
3642 return len;
3643 }
3644
3645 while (size && (PAGE_SIZE - len)) {
3646 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3647 PAGE_SIZE - len, 1);
3648 len = strlen(buf);
3649 if (PAGE_SIZE - len)
3650 buf[len++] = '\n';
3651
3652 ofs += 16;
3653 size -= min(size, 16U);
3654 }
3655
3656 return len;
3657}
3658
3659static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3660
b481de9c
ZY
3661static ssize_t show_status(struct device *d,
3662 struct device_attribute *attr, char *buf)
3663{
c79dd5b5 3664 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 3665 if (!iwl_is_alive(priv))
b481de9c
ZY
3666 return -EAGAIN;
3667 return sprintf(buf, "0x%08x\n", (int)priv->status);
3668}
3669
3670static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3671
b481de9c
ZY
3672/*****************************************************************************
3673 *
3674 * driver setup and teardown
3675 *
3676 *****************************************************************************/
3677
4e39317d 3678static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
3679{
3680 priv->workqueue = create_workqueue(DRV_NAME);
3681
3682 init_waitqueue_head(&priv->wait_command_queue);
3683
5b9f8cd3
EG
3684 INIT_WORK(&priv->up, iwl_bg_up);
3685 INIT_WORK(&priv->restart, iwl_bg_restart);
3686 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3687 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
3688 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
16e727e8 3689 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW
3690 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3691 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91 3692
2a421b91 3693 iwl_setup_scan_deferred_work(priv);
c90a74ba 3694 iwl_setup_power_deferred_work(priv);
bb8c093b 3695
4e39317d
EG
3696 if (priv->cfg->ops->lib->setup_deferred_work)
3697 priv->cfg->ops->lib->setup_deferred_work(priv);
3698
3699 init_timer(&priv->statistics_periodic);
3700 priv->statistics_periodic.data = (unsigned long)priv;
5b9f8cd3 3701 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
b481de9c
ZY
3702
3703 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
5b9f8cd3 3704 iwl_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
3705}
3706
4e39317d 3707static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 3708{
4e39317d
EG
3709 if (priv->cfg->ops->lib->cancel_deferred_work)
3710 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 3711
3ae6a054 3712 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c 3713 cancel_delayed_work(&priv->scan_check);
c90a74ba 3714 cancel_delayed_work_sync(&priv->set_power_save);
b481de9c 3715 cancel_delayed_work(&priv->alive_start);
b481de9c 3716 cancel_work_sync(&priv->beacon_update);
4e39317d 3717 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY
3718}
3719
5b9f8cd3 3720static struct attribute *iwl_sysfs_entries[] = {
b481de9c
ZY
3721 &dev_attr_flags.attr,
3722 &dev_attr_filter_flags.attr,
b481de9c
ZY
3723 &dev_attr_power_level.attr,
3724 &dev_attr_retry_rate.attr,
b481de9c
ZY
3725 &dev_attr_statistics.attr,
3726 &dev_attr_status.attr,
3727 &dev_attr_temperature.attr,
b481de9c 3728 &dev_attr_tx_power.attr,
8cf769c6
EK
3729#ifdef CONFIG_IWLWIFI_DEBUG
3730 &dev_attr_debug_level.attr,
3731#endif
bc6f59bc 3732 &dev_attr_version.attr,
b481de9c
ZY
3733
3734 NULL
3735};
3736
5b9f8cd3 3737static struct attribute_group iwl_attribute_group = {
b481de9c 3738 .name = NULL, /* put in device directory */
5b9f8cd3 3739 .attrs = iwl_sysfs_entries,
b481de9c
ZY
3740};
3741
5b9f8cd3
EG
3742static struct ieee80211_ops iwl_hw_ops = {
3743 .tx = iwl_mac_tx,
3744 .start = iwl_mac_start,
3745 .stop = iwl_mac_stop,
3746 .add_interface = iwl_mac_add_interface,
3747 .remove_interface = iwl_mac_remove_interface,
3748 .config = iwl_mac_config,
3749 .config_interface = iwl_mac_config_interface,
3750 .configure_filter = iwl_configure_filter,
3751 .set_key = iwl_mac_set_key,
3752 .update_tkip_key = iwl_mac_update_tkip_key,
3753 .get_stats = iwl_mac_get_stats,
3754 .get_tx_stats = iwl_mac_get_tx_stats,
3755 .conf_tx = iwl_mac_conf_tx,
3756 .reset_tsf = iwl_mac_reset_tsf,
3757 .bss_info_changed = iwl_bss_info_changed,
3758 .ampdu_action = iwl_mac_ampdu_action,
cb43dc25 3759 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
3760};
3761
5b9f8cd3 3762static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
3763{
3764 int err = 0;
c79dd5b5 3765 struct iwl_priv *priv;
b481de9c 3766 struct ieee80211_hw *hw;
82b9a121 3767 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 3768 unsigned long flags;
b481de9c 3769
316c30d9
AK
3770 /************************
3771 * 1. Allocating HW data
3772 ************************/
3773
6440adb5
BC
3774 /* Disabling hardware scan means that mac80211 will perform scans
3775 * "the hard way", rather than using device's scan. */
1ea87396 3776 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK
3777 if (cfg->mod_params->debug & IWL_DL_INFO)
3778 dev_printk(KERN_DEBUG, &(pdev->dev),
3779 "Disabling hw_scan\n");
5b9f8cd3 3780 iwl_hw_ops.hw_scan = NULL;
b481de9c
ZY
3781 }
3782
5b9f8cd3 3783 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
1d0a082d 3784 if (!hw) {
b481de9c
ZY
3785 err = -ENOMEM;
3786 goto out;
3787 }
1d0a082d
AK
3788 priv = hw->priv;
3789 /* At this point both hw and priv are allocated. */
3790
b481de9c
ZY
3791 SET_IEEE80211_DEV(hw, &pdev->dev);
3792
3793 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 3794 priv->cfg = cfg;
b481de9c 3795 priv->pci_dev = pdev;
316c30d9 3796
0a6857e7 3797#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 3798 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
3799 atomic_set(&priv->restrict_refcnt, 0);
3800#endif
b481de9c 3801
316c30d9
AK
3802 /**************************
3803 * 2. Initializing PCI bus
3804 **************************/
3805 if (pci_enable_device(pdev)) {
3806 err = -ENODEV;
3807 goto out_ieee80211_free_hw;
3808 }
3809
3810 pci_set_master(pdev);
3811
093d874c 3812 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
316c30d9 3813 if (!err)
093d874c 3814 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
cc2a8ea8 3815 if (err) {
093d874c 3816 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3817 if (!err)
093d874c 3818 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3819 /* both attempts failed: */
316c30d9 3820 if (err) {
cc2a8ea8
RR
3821 printk(KERN_WARNING "%s: No suitable DMA available.\n",
3822 DRV_NAME);
316c30d9 3823 goto out_pci_disable_device;
cc2a8ea8 3824 }
316c30d9
AK
3825 }
3826
3827 err = pci_request_regions(pdev, DRV_NAME);
3828 if (err)
3829 goto out_pci_disable_device;
3830
3831 pci_set_drvdata(pdev, priv);
3832
316c30d9
AK
3833
3834 /***********************
3835 * 3. Read REV register
3836 ***********************/
3837 priv->hw_base = pci_iomap(pdev, 0, 0);
3838 if (!priv->hw_base) {
3839 err = -ENODEV;
3840 goto out_pci_release_regions;
3841 }
3842
3843 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
3844 (unsigned long long) pci_resource_len(pdev, 0));
3845 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
3846
b661c819 3847 iwl_hw_detect(priv);
316c30d9 3848 printk(KERN_INFO DRV_NAME
b661c819
TW
3849 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3850 priv->cfg->name, priv->hw_rev);
316c30d9 3851
e7b63581
TW
3852 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3853 * PCI Tx retries from interfering with C3 CPU state */
3854 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3855
91238714
TW
3856 /* amp init */
3857 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 3858 if (err < 0) {
91238714 3859 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK
3860 goto out_iounmap;
3861 }
91238714
TW
3862 /*****************
3863 * 4. Read EEPROM
3864 *****************/
316c30d9
AK
3865 /* Read the EEPROM */
3866 err = iwl_eeprom_init(priv);
3867 if (err) {
3868 IWL_ERROR("Unable to init EEPROM\n");
3869 goto out_iounmap;
3870 }
8614f360
TW
3871 err = iwl_eeprom_check_version(priv);
3872 if (err)
3873 goto out_iounmap;
3874
02883017 3875 /* extract MAC Address */
316c30d9 3876 iwl_eeprom_get_mac(priv, priv->mac_addr);
e174961c 3877 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
316c30d9
AK
3878 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3879
3880 /************************
3881 * 5. Setup HW constants
3882 ************************/
da154e30 3883 if (iwl_set_hw_params(priv)) {
5425e490 3884 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 3885 goto out_free_eeprom;
316c30d9
AK
3886 }
3887
3888 /*******************
6ba87956 3889 * 6. Setup priv
316c30d9 3890 *******************/
b481de9c 3891
6ba87956 3892 err = iwl_init_drv(priv);
bf85ea4f 3893 if (err)
399f4900 3894 goto out_free_eeprom;
bf85ea4f 3895 /* At this point both hw and priv are initialized. */
316c30d9
AK
3896
3897 /**********************************
3898 * 7. Initialize module parameters
3899 **********************************/
3900
3901 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 3902 if (priv->cfg->mod_params->disable) {
316c30d9
AK
3903 set_bit(STATUS_RF_KILL_SW, &priv->status);
3904 IWL_DEBUG_INFO("Radio disabled.\n");
3905 }
3906
316c30d9
AK
3907 /********************
3908 * 8. Setup services
3909 ********************/
0359facc 3910 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3911 iwl_disable_interrupts(priv);
0359facc 3912 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9 3913
5b9f8cd3 3914 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
316c30d9
AK
3915 if (err) {
3916 IWL_ERROR("failed to create sysfs device attributes\n");
6ba87956 3917 goto out_uninit_drv;
316c30d9
AK
3918 }
3919
316c30d9 3920
4e39317d 3921 iwl_setup_deferred_work(priv);
653fa4a0 3922 iwl_setup_rx_handlers(priv);
316c30d9
AK
3923
3924 /********************
3925 * 9. Conclude
3926 ********************/
5a66926a
ZY
3927 pci_save_state(pdev);
3928 pci_disable_device(pdev);
b481de9c 3929
6ba87956
TW
3930 /**********************************
3931 * 10. Setup and register mac80211
3932 **********************************/
3933
3934 err = iwl_setup_mac(priv);
3935 if (err)
3936 goto out_remove_sysfs;
3937
3938 err = iwl_dbgfs_register(priv, DRV_NAME);
3939 if (err)
3940 IWL_ERROR("failed to create debugfs files\n");
3941
58d0f361
EG
3942 err = iwl_rfkill_init(priv);
3943 if (err)
3944 IWL_ERROR("Unable to initialize RFKILL system. "
3945 "Ignoring error: %d\n", err);
3946 iwl_power_initialize(priv);
b481de9c
ZY
3947 return 0;
3948
316c30d9 3949 out_remove_sysfs:
5b9f8cd3 3950 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
6ba87956
TW
3951 out_uninit_drv:
3952 iwl_uninit_drv(priv);
073d3f5f
TW
3953 out_free_eeprom:
3954 iwl_eeprom_free(priv);
b481de9c
ZY
3955 out_iounmap:
3956 pci_iounmap(pdev, priv->hw_base);
3957 out_pci_release_regions:
3958 pci_release_regions(pdev);
316c30d9 3959 pci_set_drvdata(pdev, NULL);
b481de9c
ZY
3960 out_pci_disable_device:
3961 pci_disable_device(pdev);
b481de9c
ZY
3962 out_ieee80211_free_hw:
3963 ieee80211_free_hw(priv->hw);
3964 out:
3965 return err;
3966}
3967
5b9f8cd3 3968static void __devexit iwl_pci_remove(struct pci_dev *pdev)
b481de9c 3969{
c79dd5b5 3970 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 3971 unsigned long flags;
b481de9c
ZY
3972
3973 if (!priv)
3974 return;
3975
3976 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
3977
67249625 3978 iwl_dbgfs_unregister(priv);
5b9f8cd3 3979 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
67249625 3980
5b9f8cd3
EG
3981 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3982 * to be called and iwl_down since we are removing the device
0b124c31
GG
3983 * we need to set STATUS_EXIT_PENDING bit.
3984 */
3985 set_bit(STATUS_EXIT_PENDING, &priv->status);
c4f55232
RR
3986 if (priv->mac80211_registered) {
3987 ieee80211_unregister_hw(priv->hw);
3988 priv->mac80211_registered = 0;
0b124c31 3989 } else {
5b9f8cd3 3990 iwl_down(priv);
c4f55232
RR
3991 }
3992
0359facc
MA
3993 /* make sure we flush any pending irq or
3994 * tasklet for the driver
3995 */
3996 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3997 iwl_disable_interrupts(priv);
0359facc
MA
3998 spin_unlock_irqrestore(&priv->lock, flags);
3999
4000 iwl_synchronize_irq(priv);
4001
58d0f361 4002 iwl_rfkill_unregister(priv);
5b9f8cd3 4003 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY
4004
4005 if (priv->rxq.bd)
a55360e4 4006 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 4007 iwl_hw_txq_ctx_free(priv);
b481de9c 4008
37deb2a0 4009 iwl_clear_stations_table(priv);
073d3f5f 4010 iwl_eeprom_free(priv);
b481de9c 4011
b481de9c 4012
948c171c
MA
4013 /*netif_stop_queue(dev); */
4014 flush_workqueue(priv->workqueue);
4015
5b9f8cd3 4016 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
b481de9c
ZY
4017 * priv->workqueue... so we can't take down the workqueue
4018 * until now... */
4019 destroy_workqueue(priv->workqueue);
4020 priv->workqueue = NULL;
4021
b481de9c
ZY
4022 pci_iounmap(pdev, priv->hw_base);
4023 pci_release_regions(pdev);
4024 pci_disable_device(pdev);
4025 pci_set_drvdata(pdev, NULL);
4026
6ba87956 4027 iwl_uninit_drv(priv);
b481de9c
ZY
4028
4029 if (priv->ibss_beacon)
4030 dev_kfree_skb(priv->ibss_beacon);
4031
4032 ieee80211_free_hw(priv->hw);
4033}
4034
4035#ifdef CONFIG_PM
4036
5b9f8cd3 4037static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 4038{
c79dd5b5 4039 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4040
e655b9f0
ZY
4041 if (priv->is_open) {
4042 set_bit(STATUS_IN_SUSPEND, &priv->status);
5b9f8cd3 4043 iwl_mac_stop(priv->hw);
e655b9f0
ZY
4044 priv->is_open = 1;
4045 }
b481de9c 4046
b481de9c
ZY
4047 pci_set_power_state(pdev, PCI_D3hot);
4048
b481de9c
ZY
4049 return 0;
4050}
4051
5b9f8cd3 4052static int iwl_pci_resume(struct pci_dev *pdev)
b481de9c 4053{
c79dd5b5 4054 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4055
b481de9c 4056 pci_set_power_state(pdev, PCI_D0);
b481de9c 4057
e655b9f0 4058 if (priv->is_open)
5b9f8cd3 4059 iwl_mac_start(priv->hw);
b481de9c 4060
e655b9f0 4061 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
4062 return 0;
4063}
4064
4065#endif /* CONFIG_PM */
4066
4067/*****************************************************************************
4068 *
4069 * driver and module entry point
4070 *
4071 *****************************************************************************/
4072
fed9017e
RR
4073/* Hardware specific file defines the PCI IDs table for that hardware module */
4074static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 4075#ifdef CONFIG_IWL4965
fed9017e
RR
4076 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4077 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 4078#endif /* CONFIG_IWL4965 */
5a6a256e 4079#ifdef CONFIG_IWL5000
47408639
EK
4080 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
4081 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
4082 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
4083 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
4084 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
4085 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 4086 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK
4087 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
4088 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
4089 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
e96a8495
TW
4090/* 5350 WiFi/WiMax */
4091 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
4092 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
4093 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
7100e924
TW
4094/* 5150 Wifi/WiMax */
4095 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
4096 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
5a6a256e 4097#endif /* CONFIG_IWL5000 */
7100e924 4098
fed9017e
RR
4099 {0}
4100};
4101MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4102
4103static struct pci_driver iwl_driver = {
b481de9c 4104 .name = DRV_NAME,
fed9017e 4105 .id_table = iwl_hw_card_ids,
5b9f8cd3
EG
4106 .probe = iwl_pci_probe,
4107 .remove = __devexit_p(iwl_pci_remove),
b481de9c 4108#ifdef CONFIG_PM
5b9f8cd3
EG
4109 .suspend = iwl_pci_suspend,
4110 .resume = iwl_pci_resume,
b481de9c
ZY
4111#endif
4112};
4113
5b9f8cd3 4114static int __init iwl_init(void)
b481de9c
ZY
4115{
4116
4117 int ret;
4118 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4119 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 4120
e227ceac 4121 ret = iwlagn_rate_control_register();
897e1cf2
RC
4122 if (ret) {
4123 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
4124 return ret;
4125 }
4126
fed9017e 4127 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY
4128 if (ret) {
4129 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 4130 goto error_register;
b481de9c 4131 }
b481de9c
ZY
4132
4133 return ret;
897e1cf2 4134
897e1cf2 4135error_register:
e227ceac 4136 iwlagn_rate_control_unregister();
897e1cf2 4137 return ret;
b481de9c
ZY
4138}
4139
5b9f8cd3 4140static void __exit iwl_exit(void)
b481de9c 4141{
fed9017e 4142 pci_unregister_driver(&iwl_driver);
e227ceac 4143 iwlagn_rate_control_unregister();
b481de9c
ZY
4144}
4145
5b9f8cd3
EG
4146module_exit(iwl_exit);
4147module_init(iwl_init);