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iwl3945: use changed in iwl3945_mac_config
[net-next-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
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1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
b481de9c
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
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26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
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43#include <net/mac80211.h>
44
45#include <asm/div64.h>
46
a3139c59
SO
47#define DRV_NAME "iwlagn"
48
6bc913bd 49#include "iwl-eeprom.h"
3e0d4cb1 50#include "iwl-dev.h"
fee1247a 51#include "iwl-core.h"
3395f6e9 52#include "iwl-io.h"
b481de9c 53#include "iwl-helpers.h"
6974e363 54#include "iwl-sta.h"
f0832f13 55#include "iwl-calib.h"
b481de9c 56
416e1438 57
b481de9c
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58/******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
b481de9c
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64/*
65 * module name, copyright, version, etc.
b481de9c 66 */
d783b061 67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
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70#define VD "d"
71#else
72#define VD
73#endif
74
80bc5393 75#ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
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76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
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83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
a7b75207 86MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
b481de9c 87MODULE_LICENSE("GPL");
4fc22b21 88MODULE_ALIAS("iwl4965");
b481de9c 89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
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92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97/**
5b9f8cd3 98 * iwl_commit_rxon - commit staging_rxon to hardware
b481de9c 99 *
01ebd063 100 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
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101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
104 */
5b9f8cd3 105static int iwl_commit_rxon(struct iwl_priv *priv)
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106{
107 /* cast away the const for active_rxon in this function */
c1adf9fb 108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
43d59b32
EG
109 int ret;
110 bool new_assoc =
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 112
fee1247a 113 if (!iwl_is_alive(priv))
43d59b32 114 return -EBUSY;
b481de9c
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115
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG
118 /* allow CTS-to-self if possible. this is relevant only for
119 * 5000, but will not damage 4965 */
120 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 121
8ccde88a 122 ret = iwl_check_rxon_cmd(priv);
43d59b32 123 if (ret) {
15b1687c 124 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
b481de9c
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125 return -EINVAL;
126 }
127
128 /* If we don't need to send a full RXON, we can use
5b9f8cd3 129 * iwl_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 130 * and other flags for the current radio configuration. */
54559703 131 if (!iwl_full_rxon_required(priv)) {
43d59b32
EG
132 ret = iwl_send_rxon_assoc(priv);
133 if (ret) {
15b1687c 134 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
43d59b32 135 return ret;
b481de9c
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136 }
137
138 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
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139 return 0;
140 }
141
142 /* station table will be cleared */
143 priv->assoc_station_added = 0;
144
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145 /* If we are currently associated and the new config requires
146 * an RXON_ASSOC and the new config wants the associated mask enabled,
147 * we must clear the associated from the active configuration
148 * before we apply the new config */
43d59b32 149 if (iwl_is_associated(priv) && new_assoc) {
e1623446 150 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
b481de9c
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151 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
152
43d59b32 153 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 154 sizeof(struct iwl_rxon_cmd),
b481de9c
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155 &priv->active_rxon);
156
157 /* If the mask clearing failed then we set
158 * active_rxon back to what it was previously */
43d59b32 159 if (ret) {
b481de9c 160 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
15b1687c 161 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
43d59b32 162 return ret;
b481de9c 163 }
b481de9c
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164 }
165
e1623446 166 IWL_DEBUG_INFO(priv, "Sending RXON\n"
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167 "* with%s RXON_FILTER_ASSOC_MSK\n"
168 "* channel = %d\n"
e174961c 169 "* bssid = %pM\n",
43d59b32 170 (new_assoc ? "" : "out"),
b481de9c 171 le16_to_cpu(priv->staging_rxon.channel),
e174961c 172 priv->staging_rxon.bssid_addr);
b481de9c 173
5b9f8cd3 174 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG
175
176 /* Apply the new configuration
177 * RXON unassoc clears the station table in uCode, send it before
178 * we add the bcast station. If assoc bit is set, we will send RXON
179 * after having added the bcast and bssid station.
180 */
181 if (!new_assoc) {
182 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 183 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32 184 if (ret) {
15b1687c 185 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
43d59b32
EG
186 return ret;
187 }
188 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
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189 }
190
37deb2a0 191 iwl_clear_stations_table(priv);
556f8db7 192
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193 if (!priv->error_recovering)
194 priv->start_calib = 0;
195
b481de9c 196 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 197 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 198 IWL_INVALID_STATION) {
15b1687c 199 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
b481de9c
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200 return -EIO;
201 }
202
203 /* If we have set the ASSOC_MSK and we are in BSS mode then
204 * add the IWL_AP_ID to the station rate table */
9185159d 205 if (new_assoc) {
05c914fe 206 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
9185159d
TW
207 ret = iwl_rxon_add_station(priv,
208 priv->active_rxon.bssid_addr, 1);
209 if (ret == IWL_INVALID_STATION) {
15b1687c
WT
210 IWL_ERR(priv,
211 "Error adding AP address for TX.\n");
9185159d
TW
212 return -EIO;
213 }
214 priv->assoc_station_added = 1;
215 if (priv->default_wep_key &&
216 iwl_send_static_wepkey_cmd(priv, 0))
15b1687c
WT
217 IWL_ERR(priv,
218 "Could not send WEP static key.\n");
b481de9c 219 }
43d59b32
EG
220
221 /* Apply the new configuration
222 * RXON assoc doesn't clear the station table in uCode,
223 */
224 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
225 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
226 if (ret) {
15b1687c 227 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
43d59b32
EG
228 return ret;
229 }
230 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
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231 }
232
36da7d70
ZY
233 iwl_init_sensitivity(priv);
234
235 /* If we issue a new RXON command which required a tune then we must
236 * send a new TXPOWER command or we won't be able to Tx any frames */
237 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
238 if (ret) {
15b1687c 239 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
36da7d70
ZY
240 return ret;
241 }
242
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243 return 0;
244}
245
5b9f8cd3 246void iwl_update_chain_flags(struct iwl_priv *priv)
5da4b55f
MA
247{
248
c7de35cd 249 iwl_set_rxon_chain(priv);
5b9f8cd3 250 iwl_commit_rxon(priv);
5da4b55f
MA
251}
252
fcab423d 253static void iwl_clear_free_frames(struct iwl_priv *priv)
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254{
255 struct list_head *element;
256
e1623446 257 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
b481de9c
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258 priv->frames_count);
259
260 while (!list_empty(&priv->free_frames)) {
261 element = priv->free_frames.next;
262 list_del(element);
fcab423d 263 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
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264 priv->frames_count--;
265 }
266
267 if (priv->frames_count) {
39aadf8c 268 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
b481de9c
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269 priv->frames_count);
270 priv->frames_count = 0;
271 }
272}
273
fcab423d 274static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 275{
fcab423d 276 struct iwl_frame *frame;
b481de9c
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277 struct list_head *element;
278 if (list_empty(&priv->free_frames)) {
279 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
280 if (!frame) {
15b1687c 281 IWL_ERR(priv, "Could not allocate frame!\n");
b481de9c
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282 return NULL;
283 }
284
285 priv->frames_count++;
286 return frame;
287 }
288
289 element = priv->free_frames.next;
290 list_del(element);
fcab423d 291 return list_entry(element, struct iwl_frame, list);
b481de9c
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292}
293
fcab423d 294static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
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295{
296 memset(frame, 0, sizeof(*frame));
297 list_add(&frame->list, &priv->free_frames);
298}
299
4bf64efd
TW
300static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
301 struct ieee80211_hdr *hdr,
73ec1cc2 302 int left)
b481de9c 303{
3109ece1 304 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
305 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
306 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
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307 return 0;
308
309 if (priv->ibss_beacon->len > left)
310 return 0;
311
312 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
313
314 return priv->ibss_beacon->len;
315}
316
5b9f8cd3 317static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
4bf64efd
TW
318 struct iwl_frame *frame, u8 rate)
319{
320 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
321 unsigned int frame_size;
322
323 tx_beacon_cmd = &frame->u.beacon;
324 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
325
326 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
327 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
328
329 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
4bf64efd
TW
330 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
331
332 BUG_ON(frame_size > MAX_MPDU_SIZE);
333 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
334
335 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
336 tx_beacon_cmd->tx.rate_n_flags =
337 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
338 else
339 tx_beacon_cmd->tx.rate_n_flags =
340 iwl_hw_set_rate_n_flags(rate, 0);
341
342 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
343 TX_CMD_FLG_TSF_MSK |
344 TX_CMD_FLG_STA_RATE_MSK;
345
346 return sizeof(*tx_beacon_cmd) + frame_size;
347}
5b9f8cd3 348static int iwl_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 349{
fcab423d 350 struct iwl_frame *frame;
b481de9c
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351 unsigned int frame_size;
352 int rc;
353 u8 rate;
354
fcab423d 355 frame = iwl_get_free_frame(priv);
b481de9c
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356
357 if (!frame) {
15b1687c 358 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
b481de9c
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359 "command.\n");
360 return -ENOMEM;
361 }
362
5b9f8cd3 363 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 364
5b9f8cd3 365 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 366
857485c0 367 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
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368 &frame->u.cmd[0]);
369
fcab423d 370 iwl_free_frame(priv, frame);
b481de9c
ZY
371
372 return rc;
373}
374
7aaa1d79
SO
375static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
376{
377 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
378
379 dma_addr_t addr = get_unaligned_le32(&tb->lo);
380 if (sizeof(dma_addr_t) > sizeof(u32))
381 addr |=
382 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
383
384 return addr;
385}
386
387static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
388{
389 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
390
391 return le16_to_cpu(tb->hi_n_len) >> 4;
392}
393
394static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
395 dma_addr_t addr, u16 len)
396{
397 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
398 u16 hi_n_len = len << 4;
399
400 put_unaligned_le32(addr, &tb->lo);
401 if (sizeof(dma_addr_t) > sizeof(u32))
402 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
403
404 tb->hi_n_len = cpu_to_le16(hi_n_len);
405
406 tfd->num_tbs = idx + 1;
407}
408
409static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
410{
411 return tfd->num_tbs & 0x1f;
412}
413
414/**
415 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
416 * @priv - driver private data
417 * @txq - tx queue
418 *
419 * Does NOT advance any TFD circular buffer read/write indexes
420 * Does NOT free the TFD itself (which is within circular buffer)
421 */
422void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
423{
59606ffa 424 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
7aaa1d79
SO
425 struct iwl_tfd *tfd;
426 struct pci_dev *dev = priv->pci_dev;
427 int index = txq->q.read_ptr;
428 int i;
429 int num_tbs;
430
431 tfd = &tfd_tmp[index];
432
433 /* Sanity check on number of chunks */
434 num_tbs = iwl_tfd_get_num_tbs(tfd);
435
436 if (num_tbs >= IWL_NUM_OF_TBS) {
437 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
438 /* @todo issue fatal error, it is quite serious situation */
439 return;
440 }
441
442 /* Unmap tx_cmd */
443 if (num_tbs)
444 pci_unmap_single(dev,
445 pci_unmap_addr(&txq->cmd[index]->meta, mapping),
446 pci_unmap_len(&txq->cmd[index]->meta, len),
96891cee 447 PCI_DMA_BIDIRECTIONAL);
7aaa1d79
SO
448
449 /* Unmap chunks, if any. */
450 for (i = 1; i < num_tbs; i++) {
451 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
452 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
453
454 if (txq->txb) {
455 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
456 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
457 }
458 }
459}
460
461int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
462 struct iwl_tx_queue *txq,
463 dma_addr_t addr, u16 len,
464 u8 reset, u8 pad)
465{
466 struct iwl_queue *q;
59606ffa 467 struct iwl_tfd *tfd, *tfd_tmp;
7aaa1d79
SO
468 u32 num_tbs;
469
470 q = &txq->q;
59606ffa
SO
471 tfd_tmp = (struct iwl_tfd *)txq->tfds;
472 tfd = &tfd_tmp[q->write_ptr];
7aaa1d79
SO
473
474 if (reset)
475 memset(tfd, 0, sizeof(*tfd));
476
477 num_tbs = iwl_tfd_get_num_tbs(tfd);
478
479 /* Each TFD can point to a maximum 20 Tx buffers */
480 if (num_tbs >= IWL_NUM_OF_TBS) {
481 IWL_ERR(priv, "Error can not send more than %d chunks\n",
482 IWL_NUM_OF_TBS);
483 return -EINVAL;
484 }
485
486 BUG_ON(addr & ~DMA_BIT_MASK(36));
487 if (unlikely(addr & ~IWL_TX_DMA_MASK))
488 IWL_ERR(priv, "Unaligned address = %llx\n",
489 (unsigned long long)addr);
490
491 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
492
493 return 0;
494}
495
a8e74e27
SO
496/*
497 * Tell nic where to find circular buffer of Tx Frame Descriptors for
498 * given Tx queue, and enable the DMA channel used for that queue.
499 *
500 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
501 * channels supported in hardware.
502 */
503int iwl_hw_tx_queue_init(struct iwl_priv *priv,
504 struct iwl_tx_queue *txq)
505{
506 int ret;
507 unsigned long flags;
508 int txq_id = txq->q.id;
509
510 spin_lock_irqsave(&priv->lock, flags);
511 ret = iwl_grab_nic_access(priv);
512 if (ret) {
513 spin_unlock_irqrestore(&priv->lock, flags);
514 return ret;
515 }
516
517 /* Circular buffer (TFD queue in DRAM) physical base address */
518 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
519 txq->q.dma_addr >> 8);
520
521 iwl_release_nic_access(priv);
522 spin_unlock_irqrestore(&priv->lock, flags);
523
524 return 0;
525}
526
527
b481de9c
ZY
528/******************************************************************************
529 *
530 * Misc. internal state and helper functions
531 *
532 ******************************************************************************/
b481de9c 533
5b9f8cd3 534static void iwl_ht_conf(struct iwl_priv *priv,
d1141dfb
EG
535 struct ieee80211_bss_conf *bss_conf)
536{
ae5eb026 537 struct ieee80211_sta_ht_cap *ht_conf;
d1141dfb 538 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
ae5eb026 539 struct ieee80211_sta *sta;
d1141dfb 540
e1623446 541 IWL_DEBUG_MAC80211(priv, "enter: \n");
d1141dfb 542
d1141dfb
EG
543 if (!iwl_conf->is_ht)
544 return;
545
ae5eb026
JB
546
547 /*
548 * It is totally wrong to base global information on something
549 * that is valid only when associated, alas, this driver works
550 * that way and I don't know how to fix it.
551 */
552
553 rcu_read_lock();
554 sta = ieee80211_find_sta(priv->hw, priv->bssid);
555 if (!sta) {
556 rcu_read_unlock();
557 return;
558 }
559 ht_conf = &sta->ht_cap;
560
d1141dfb 561 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 562 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 563 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 564 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG
565
566 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
567 iwl_conf->max_amsdu_size =
568 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
569
570 iwl_conf->supported_chan_width =
d9fe60de 571 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
ae5eb026 572
094d05dc
S
573 /*
574 * XXX: The HT configuration needs to be moved into iwl_mac_config()
575 * to be done there correctly.
576 */
577
578 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
de27e64e 579 if (conf_is_ht40_minus(&priv->hw->conf))
094d05dc 580 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
de27e64e 581 else if (conf_is_ht40_plus(&priv->hw->conf))
094d05dc
S
582 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
583
d1141dfb 584 /* If no above or below channel supplied disable FAT channel */
d9fe60de 585 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
094d05dc 586 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
d1141dfb
EG
587 iwl_conf->supported_chan_width = 0;
588
12837be1
RR
589 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
590
d9fe60de 591 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
d1141dfb 592
094d05dc 593 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
d1141dfb 594 iwl_conf->ht_protection =
ae5eb026 595 bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
d1141dfb 596 iwl_conf->non_GF_STA_present =
ae5eb026
JB
597 !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
598
599 rcu_read_unlock();
d1141dfb 600
e1623446 601 IWL_DEBUG_MAC80211(priv, "leave\n");
d1141dfb
EG
602}
603
b481de9c 604#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 605
3195c1f3 606static u16 iwl_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
607{
608 u16 new_val = 0;
609 u16 beacon_factor = 0;
610
3195c1f3
TW
611 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
612 / MAX_UCODE_BEACON_INTERVAL;
b481de9c
ZY
613 new_val = beacon_val / beacon_factor;
614
41d2f291
JL
615 if (!new_val)
616 new_val = MAX_UCODE_BEACON_INTERVAL;
617
3195c1f3 618 return new_val;
b481de9c
ZY
619}
620
3195c1f3 621static void iwl_setup_rxon_timing(struct iwl_priv *priv)
b481de9c 622{
3195c1f3
TW
623 u64 tsf;
624 s32 interval_tm, rem;
b481de9c
ZY
625 unsigned long flags;
626 struct ieee80211_conf *conf = NULL;
627 u16 beacon_int = 0;
628
629 conf = ieee80211_get_hw_conf(priv->hw);
630
631 spin_lock_irqsave(&priv->lock, flags);
3195c1f3 632 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b5d7be5e 633 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 634
05c914fe 635 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
3195c1f3 636 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
b481de9c
ZY
637 priv->rxon_timing.atim_window = 0;
638 } else {
3195c1f3
TW
639 beacon_int = iwl_adjust_beacon_interval(conf->beacon_int);
640
b481de9c
ZY
641 /* TODO: we need to get atim_window from upper stack
642 * for now we set to 0 */
643 priv->rxon_timing.atim_window = 0;
644 }
645
3195c1f3 646 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
b481de9c 647
3195c1f3
TW
648 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
649 interval_tm = beacon_int * 1024;
650 rem = do_div(tsf, interval_tm);
651 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
652
653 spin_unlock_irqrestore(&priv->lock, flags);
e1623446 654 IWL_DEBUG_ASSOC(priv, "beacon interval %d beacon timer %d beacon tim %d\n",
3195c1f3
TW
655 le16_to_cpu(priv->rxon_timing.beacon_interval),
656 le32_to_cpu(priv->rxon_timing.beacon_init_val),
657 le16_to_cpu(priv->rxon_timing.atim_window));
b481de9c
ZY
658}
659
5b9f8cd3 660static int iwl_set_mode(struct iwl_priv *priv, int mode)
b481de9c 661{
5b9f8cd3 662 iwl_connection_init_rx_config(priv, mode);
8ccde88a 663 iwl_set_rxon_chain(priv);
b481de9c
ZY
664 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
665
37deb2a0 666 iwl_clear_stations_table(priv);
b481de9c 667
fde3571f 668 /* dont commit rxon if rf-kill is on*/
fee1247a 669 if (!iwl_is_ready_rf(priv))
fde3571f
MA
670 return -EAGAIN;
671
672 cancel_delayed_work(&priv->scan_check);
2a421b91 673 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 674 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
e1623446 675 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
fde3571f
MA
676 return -EAGAIN;
677 }
678
5b9f8cd3 679 iwl_commit_rxon(priv);
b481de9c
ZY
680
681 return 0;
682}
683
b481de9c
ZY
684/******************************************************************************
685 *
686 * Generic RX handler implementations
687 *
688 ******************************************************************************/
885ba202
TW
689static void iwl_rx_reply_alive(struct iwl_priv *priv,
690 struct iwl_rx_mem_buffer *rxb)
b481de9c 691{
db11d634 692 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 693 struct iwl_alive_resp *palive;
b481de9c
ZY
694 struct delayed_work *pwork;
695
696 palive = &pkt->u.alive_frame;
697
e1623446 698 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
b481de9c
ZY
699 "0x%01X 0x%01X\n",
700 palive->is_valid, palive->ver_type,
701 palive->ver_subtype);
702
703 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
e1623446 704 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
b481de9c
ZY
705 memcpy(&priv->card_alive_init,
706 &pkt->u.alive_frame,
885ba202 707 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY
708 pwork = &priv->init_alive_start;
709 } else {
e1623446 710 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c 711 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 712 sizeof(struct iwl_alive_resp));
b481de9c
ZY
713 pwork = &priv->alive_start;
714 }
715
716 /* We delay the ALIVE response by 5ms to
717 * give the HW RF Kill time to activate... */
718 if (palive->is_valid == UCODE_VALID_OK)
719 queue_delayed_work(priv->workqueue, pwork,
720 msecs_to_jiffies(5));
721 else
39aadf8c 722 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY
723}
724
5b9f8cd3 725static void iwl_bg_beacon_update(struct work_struct *work)
b481de9c 726{
c79dd5b5
TW
727 struct iwl_priv *priv =
728 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
729 struct sk_buff *beacon;
730
731 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 732 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
733
734 if (!beacon) {
15b1687c 735 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY
736 return;
737 }
738
739 mutex_lock(&priv->mutex);
740 /* new beacon skb is allocated every time; dispose previous.*/
741 if (priv->ibss_beacon)
742 dev_kfree_skb(priv->ibss_beacon);
743
744 priv->ibss_beacon = beacon;
745 mutex_unlock(&priv->mutex);
746
5b9f8cd3 747 iwl_send_beacon_cmd(priv);
b481de9c
ZY
748}
749
4e39317d 750/**
5b9f8cd3 751 * iwl_bg_statistics_periodic - Timer callback to queue statistics
4e39317d
EG
752 *
753 * This callback is provided in order to send a statistics request.
754 *
755 * This timer function is continually reset to execute within
756 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
757 * was received. We need to ensure we receive the statistics in order
758 * to update the temperature used for calibrating the TXPOWER.
759 */
5b9f8cd3 760static void iwl_bg_statistics_periodic(unsigned long data)
4e39317d
EG
761{
762 struct iwl_priv *priv = (struct iwl_priv *)data;
763
764 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
765 return;
766
61780ee3
MA
767 /* dont send host command if rf-kill is on */
768 if (!iwl_is_ready_rf(priv))
769 return;
770
4e39317d
EG
771 iwl_send_statistics_request(priv, CMD_ASYNC);
772}
773
5b9f8cd3 774static void iwl_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 775 struct iwl_rx_mem_buffer *rxb)
b481de9c 776{
0a6857e7 777#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 778 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2aa6ab86
TW
779 struct iwl4965_beacon_notif *beacon =
780 (struct iwl4965_beacon_notif *)pkt->u.raw;
e7d326ac 781 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c 782
e1623446 783 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
b481de9c 784 "tsf %d %d rate %d\n",
25a6572c 785 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY
786 beacon->beacon_notify_hdr.failure_frame,
787 le32_to_cpu(beacon->ibss_mgr_status),
788 le32_to_cpu(beacon->high_tsf),
789 le32_to_cpu(beacon->low_tsf), rate);
790#endif
791
05c914fe 792 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
793 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
794 queue_work(priv->workqueue, &priv->beacon_update);
795}
796
b481de9c
ZY
797/* Handle notification from uCode that card's power state is changing
798 * due to software, hardware, or critical temperature RFKILL */
5b9f8cd3 799static void iwl_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 800 struct iwl_rx_mem_buffer *rxb)
b481de9c 801{
db11d634 802 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
803 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
804 unsigned long status = priv->status;
805
e1623446 806 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
b481de9c
ZY
807 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
808 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
809
810 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
811 RF_CARD_DISABLED)) {
812
3395f6e9 813 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
814 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
815
3395f6e9
TW
816 if (!iwl_grab_nic_access(priv)) {
817 iwl_write_direct32(
b481de9c
ZY
818 priv, HBUS_TARG_MBX_C,
819 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
820
3395f6e9 821 iwl_release_nic_access(priv);
b481de9c
ZY
822 }
823
824 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 825 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 826 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
827 if (!iwl_grab_nic_access(priv)) {
828 iwl_write_direct32(
b481de9c
ZY
829 priv, HBUS_TARG_MBX_C,
830 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
831
3395f6e9 832 iwl_release_nic_access(priv);
b481de9c
ZY
833 }
834 }
835
836 if (flags & RF_CARD_DISABLED) {
3395f6e9 837 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 838 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
839 iwl_read32(priv, CSR_UCODE_DRV_GP1);
840 if (!iwl_grab_nic_access(priv))
841 iwl_release_nic_access(priv);
b481de9c
ZY
842 }
843 }
844
845 if (flags & HW_CARD_DISABLED)
846 set_bit(STATUS_RF_KILL_HW, &priv->status);
847 else
848 clear_bit(STATUS_RF_KILL_HW, &priv->status);
849
850
851 if (flags & SW_CARD_DISABLED)
852 set_bit(STATUS_RF_KILL_SW, &priv->status);
853 else
854 clear_bit(STATUS_RF_KILL_SW, &priv->status);
855
856 if (!(flags & RXON_CARD_DISABLED))
2a421b91 857 iwl_scan_cancel(priv);
b481de9c
ZY
858
859 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
860 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
861 (test_bit(STATUS_RF_KILL_SW, &status) !=
862 test_bit(STATUS_RF_KILL_SW, &priv->status)))
863 queue_work(priv->workqueue, &priv->rf_kill);
864 else
865 wake_up_interruptible(&priv->wait_command_queue);
866}
867
5b9f8cd3 868int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
e2e3c57b
TW
869{
870 int ret;
871 unsigned long flags;
872
873 spin_lock_irqsave(&priv->lock, flags);
874 ret = iwl_grab_nic_access(priv);
875 if (ret)
876 goto err;
877
878 if (src == IWL_PWR_SRC_VAUX) {
3fdb68de 879 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
e2e3c57b
TW
880 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
881 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
882 ~APMG_PS_CTRL_MSK_PWR_SRC);
883 } else {
884 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
885 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
886 ~APMG_PS_CTRL_MSK_PWR_SRC);
887 }
888
889 iwl_release_nic_access(priv);
890err:
891 spin_unlock_irqrestore(&priv->lock, flags);
892 return ret;
893}
894
b481de9c 895/**
5b9f8cd3 896 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
897 *
898 * Setup the RX handlers for each of the reply types sent from the uCode
899 * to the host.
900 *
901 * This function chains into the hardware specific files for them to setup
902 * any hardware specific handlers as well.
903 */
653fa4a0 904static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 905{
885ba202 906 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
5b9f8cd3
EG
907 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
908 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
5b9f8cd3 909 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 910 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
5b9f8cd3
EG
911 iwl_rx_pm_debug_statistics_notif;
912 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
b481de9c 913
9fbab516
BC
914 /*
915 * The same handler is used for both the REPLY to a discrete
916 * statistics request from the host as well as for the periodic
917 * statistics notifications (after received beacons) from the uCode.
b481de9c 918 */
8f91aecb
EG
919 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
920 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91 921
21c339bf 922 iwl_setup_spectrum_handlers(priv);
2a421b91
TW
923 iwl_setup_rx_scan_handlers(priv);
924
37a44211 925 /* status change handler */
5b9f8cd3 926 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
b481de9c 927
c1354754
TW
928 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
929 iwl_rx_missed_beacon_notif;
37a44211 930 /* Rx handlers */
1781a07f
EG
931 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
932 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG
933 /* block ack */
934 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 935 /* Set up hardware specific Rx handlers */
d4789efe 936 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY
937}
938
b481de9c 939/**
a55360e4 940 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
941 *
942 * Uses the priv->rx_handlers callback function array to invoke
943 * the appropriate handlers, including command responses,
944 * frame-received notifications, and other notifications.
945 */
a55360e4 946void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 947{
a55360e4 948 struct iwl_rx_mem_buffer *rxb;
db11d634 949 struct iwl_rx_packet *pkt;
a55360e4 950 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
951 u32 r, i;
952 int reclaim;
953 unsigned long flags;
5c0eef96 954 u8 fill_rx = 0;
d68ab680 955 u32 count = 8;
b481de9c 956
6440adb5
BC
957 /* uCode's read index (stored in shared DRAM) indicates the last Rx
958 * buffer that the driver may process (last buffer filled by ucode). */
8d86422a 959 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY
960 i = rxq->read;
961
962 /* Rx interrupt, but nothing sent from uCode */
963 if (i == r)
e1623446 964 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
b481de9c 965
a55360e4 966 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA
967 fill_rx = 1;
968
b481de9c
ZY
969 while (i != r) {
970 rxb = rxq->queue[i];
971
9fbab516 972 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
973 * then a bug has been introduced in the queue refilling
974 * routines -- catch it here */
975 BUG_ON(rxb == NULL);
976
977 rxq->queue[i] = NULL;
978
e91af0af
JB
979 dma_sync_single_range_for_cpu(
980 &priv->pci_dev->dev, rxb->real_dma_addr,
981 rxb->aligned_dma_addr - rxb->real_dma_addr,
982 priv->hw_params.rx_buf_size,
983 PCI_DMA_FROMDEVICE);
db11d634 984 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
985
986 /* Reclaim a command buffer only if this packet is a response
987 * to a (driver-originated) command.
988 * If the packet (e.g. Rx frame) originated from uCode,
989 * there is no command buffer to reclaim.
990 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
991 * but apparently a few don't get set; catch them here. */
992 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
993 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 994 (pkt->hdr.cmd != REPLY_RX) &&
7dddaf1a 995 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
cfe01709 996 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
997 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
998 (pkt->hdr.cmd != REPLY_TX);
999
1000 /* Based on type of command response or notification,
1001 * handle those that need handling via function in
5b9f8cd3 1002 * rx_handlers table. See iwl_setup_rx_handlers() */
b481de9c 1003 if (priv->rx_handlers[pkt->hdr.cmd]) {
e1623446 1004 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
f3d67999 1005 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY
1006 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1007 } else {
1008 /* No handling needed */
e1623446 1009 IWL_DEBUG_RX(priv,
b481de9c
ZY
1010 "r %d i %d No handler needed for %s, 0x%02x\n",
1011 r, i, get_cmd_string(pkt->hdr.cmd),
1012 pkt->hdr.cmd);
1013 }
1014
1015 if (reclaim) {
9fbab516 1016 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1017 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1018 * as we reclaim the driver command queue */
1019 if (rxb && rxb->skb)
17b88929 1020 iwl_tx_cmd_complete(priv, rxb);
b481de9c 1021 else
39aadf8c 1022 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY
1023 }
1024
1025 /* For now we just don't re-use anything. We can tweak this
1026 * later to try and re-use notification packets and SKBs that
1027 * fail to Rx correctly */
1028 if (rxb->skb != NULL) {
1029 priv->alloc_rxb_skb--;
1030 dev_kfree_skb_any(rxb->skb);
1031 rxb->skb = NULL;
1032 }
1033
4018517a
JB
1034 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1035 priv->hw_params.rx_buf_size + 256,
9ee1ba47 1036 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1037 spin_lock_irqsave(&rxq->lock, flags);
1038 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1039 spin_unlock_irqrestore(&rxq->lock, flags);
1040 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1041 /* If there are a lot of unused frames,
1042 * restock the Rx queue so ucode wont assert. */
1043 if (fill_rx) {
1044 count++;
1045 if (count >= 8) {
1046 priv->rxq.read = i;
f1bc4ac6 1047 iwl_rx_queue_restock(priv);
5c0eef96
MA
1048 count = 0;
1049 }
1050 }
b481de9c
ZY
1051 }
1052
1053 /* Backtrack one entry */
1054 priv->rxq.read = i;
a55360e4
TW
1055 iwl_rx_queue_restock(priv);
1056}
a55360e4 1057
0359facc
MA
1058/* call this function to flush any scheduled tasklet */
1059static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1060{
a96a27f9 1061 /* wait to make sure we flush pending tasklet*/
0359facc
MA
1062 synchronize_irq(priv->pci_dev->irq);
1063 tasklet_kill(&priv->irq_tasklet);
1064}
1065
5b9f8cd3 1066static void iwl_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
1067{
1068 unsigned long flags;
1069
1070 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1071 sizeof(priv->staging_rxon));
1072 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 1073 iwl_commit_rxon(priv);
b481de9c 1074
4f40e4d9 1075 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
1076
1077 spin_lock_irqsave(&priv->lock, flags);
1078 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1079 priv->error_recovering = 0;
1080 spin_unlock_irqrestore(&priv->lock, flags);
1081}
1082
5b9f8cd3 1083static void iwl_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1084{
1085 u32 inta, handled = 0;
1086 u32 inta_fh;
1087 unsigned long flags;
0a6857e7 1088#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1089 u32 inta_mask;
1090#endif
1091
1092 spin_lock_irqsave(&priv->lock, flags);
1093
1094 /* Ack/clear/reset pending uCode interrupts.
1095 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1096 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
1097 inta = iwl_read32(priv, CSR_INT);
1098 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1099
1100 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1101 * Any new interrupts that happen after this, either while we're
1102 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
1103 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1104 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1105
0a6857e7 1106#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1107 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1108 /* just for debug */
3395f6e9 1109 inta_mask = iwl_read32(priv, CSR_INT_MASK);
e1623446 1110 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY
1111 inta, inta_mask, inta_fh);
1112 }
1113#endif
1114
1115 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1116 * atomic, make sure that inta covers all the interrupts that
1117 * we've discovered, even if FH interrupt came in just after
1118 * reading CSR_INT. */
6f83eaa1 1119 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1120 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1121 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
1122 inta |= CSR_INT_BIT_FH_TX;
1123
1124 /* Now service all interrupt bits discovered above. */
1125 if (inta & CSR_INT_BIT_HW_ERR) {
15b1687c 1126 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
b481de9c
ZY
1127
1128 /* Tell the device to stop sending interrupts */
5b9f8cd3 1129 iwl_disable_interrupts(priv);
b481de9c 1130
5b9f8cd3 1131 iwl_irq_handle_error(priv);
b481de9c
ZY
1132
1133 handled |= CSR_INT_BIT_HW_ERR;
1134
1135 spin_unlock_irqrestore(&priv->lock, flags);
1136
1137 return;
1138 }
1139
0a6857e7 1140#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1141 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1142 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e 1143 if (inta & CSR_INT_BIT_SCD)
e1623446 1144 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
25c03d8e 1145 "the frame/frames.\n");
b481de9c
ZY
1146
1147 /* Alive notification via Rx interrupt will do the real work */
1148 if (inta & CSR_INT_BIT_ALIVE)
e1623446 1149 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
b481de9c
ZY
1150 }
1151#endif
1152 /* Safely ignore these bits for debug checks below */
25c03d8e 1153 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1154
9fbab516 1155 /* HW RF KILL switch toggled */
b481de9c
ZY
1156 if (inta & CSR_INT_BIT_RF_KILL) {
1157 int hw_rf_kill = 0;
3395f6e9 1158 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
1159 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1160 hw_rf_kill = 1;
1161
e1623446 1162 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
c3056065 1163 hw_rf_kill ? "disable radio" : "enable radio");
b481de9c 1164
a9efa652 1165 /* driver only loads ucode once setting the interface up.
6cd0b1cb
HS
1166 * the driver allows loading the ucode even if the radio
1167 * is killed. Hence update the killswitch state here. The
1168 * rfkill handler will care about restarting if needed.
a9efa652 1169 */
6cd0b1cb
HS
1170 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1171 if (hw_rf_kill)
1172 set_bit(STATUS_RF_KILL_HW, &priv->status);
1173 else
1174 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1175 queue_work(priv->workqueue, &priv->rf_kill);
edb34228 1176 }
b481de9c
ZY
1177
1178 handled |= CSR_INT_BIT_RF_KILL;
1179 }
1180
9fbab516 1181 /* Chip got too hot and stopped itself */
b481de9c 1182 if (inta & CSR_INT_BIT_CT_KILL) {
15b1687c 1183 IWL_ERR(priv, "Microcode CT kill error detected.\n");
b481de9c
ZY
1184 handled |= CSR_INT_BIT_CT_KILL;
1185 }
1186
1187 /* Error detected by uCode */
1188 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT
1189 IWL_ERR(priv, "Microcode SW error detected. "
1190 " Restarting 0x%X.\n", inta);
5b9f8cd3 1191 iwl_irq_handle_error(priv);
b481de9c
ZY
1192 handled |= CSR_INT_BIT_SW_ERR;
1193 }
1194
1195 /* uCode wakes up after power-down sleep */
1196 if (inta & CSR_INT_BIT_WAKEUP) {
e1623446 1197 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
a55360e4 1198 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW
1199 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1200 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1201 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1202 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1203 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1204 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
1205
1206 handled |= CSR_INT_BIT_WAKEUP;
1207 }
1208
1209 /* All uCode command responses, including Tx command responses,
1210 * Rx "responses" (frame-received notification), and other
1211 * notifications from uCode come through here*/
1212 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1213 iwl_rx_handle(priv);
b481de9c
ZY
1214 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1215 }
1216
1217 if (inta & CSR_INT_BIT_FH_TX) {
e1623446 1218 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
b481de9c 1219 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR
1220 /* FH finished to write, send event */
1221 priv->ucode_write_complete = 1;
1222 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1223 }
1224
1225 if (inta & ~handled)
15b1687c 1226 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
b481de9c
ZY
1227
1228 if (inta & ~CSR_INI_SET_MASK) {
39aadf8c 1229 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
b481de9c 1230 inta & ~CSR_INI_SET_MASK);
39aadf8c 1231 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY
1232 }
1233
1234 /* Re-enable all interrupts */
0359facc
MA
1235 /* only Re-enable if diabled by irq */
1236 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1237 iwl_enable_interrupts(priv);
b481de9c 1238
0a6857e7 1239#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1240 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
1241 inta = iwl_read32(priv, CSR_INT);
1242 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1243 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
e1623446 1244 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
b481de9c
ZY
1245 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1246 }
1247#endif
1248 spin_unlock_irqrestore(&priv->lock, flags);
1249}
1250
b481de9c
ZY
1251/******************************************************************************
1252 *
1253 * uCode download functions
1254 *
1255 ******************************************************************************/
1256
5b9f8cd3 1257static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1258{
98c92211
TW
1259 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1260 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1261 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1262 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1263 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1264 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
1265}
1266
5b9f8cd3 1267static void iwl_nic_start(struct iwl_priv *priv)
edcdf8b2
RR
1268{
1269 /* Remove all resets to allow NIC to operate */
1270 iwl_write32(priv, CSR_RESET, 0);
1271}
1272
1273
b481de9c 1274/**
5b9f8cd3 1275 * iwl_read_ucode - Read uCode images from disk file.
b481de9c
ZY
1276 *
1277 * Copy into buffers for card to fetch via bus-mastering
1278 */
5b9f8cd3 1279static int iwl_read_ucode(struct iwl_priv *priv)
b481de9c 1280{
14b3d338 1281 struct iwl_ucode *ucode;
a0987a8d 1282 int ret = -EINVAL, index;
b481de9c 1283 const struct firmware *ucode_raw;
a0987a8d
RC
1284 const char *name_pre = priv->cfg->fw_name_pre;
1285 const unsigned int api_max = priv->cfg->ucode_api_max;
1286 const unsigned int api_min = priv->cfg->ucode_api_min;
1287 char buf[25];
b481de9c
ZY
1288 u8 *src;
1289 size_t len;
a0987a8d 1290 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY
1291
1292 /* Ask kernel firmware_class module to get the boot firmware off disk.
1293 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC
1294 for (index = api_max; index >= api_min; index--) {
1295 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1296 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1297 if (ret < 0) {
15b1687c 1298 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC
1299 buf, ret);
1300 if (ret == -ENOENT)
1301 continue;
1302 else
1303 goto error;
1304 } else {
1305 if (index < api_max)
15b1687c
WT
1306 IWL_ERR(priv, "Loaded firmware %s, "
1307 "which is deprecated. "
1308 "Please use API v%u instead.\n",
a0987a8d 1309 buf, api_max);
15b1687c 1310
e1623446 1311 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
a0987a8d
RC
1312 buf, ucode_raw->size);
1313 break;
1314 }
b481de9c
ZY
1315 }
1316
a0987a8d
RC
1317 if (ret < 0)
1318 goto error;
b481de9c
ZY
1319
1320 /* Make sure that we got at least our header! */
1321 if (ucode_raw->size < sizeof(*ucode)) {
15b1687c 1322 IWL_ERR(priv, "File size way too small!\n");
90e759d1 1323 ret = -EINVAL;
b481de9c
ZY
1324 goto err_release;
1325 }
1326
1327 /* Data from ucode file: header followed by uCode images */
1328 ucode = (void *)ucode_raw->data;
1329
c02b3acd 1330 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 1331 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY
1332 inst_size = le32_to_cpu(ucode->inst_size);
1333 data_size = le32_to_cpu(ucode->data_size);
1334 init_size = le32_to_cpu(ucode->init_size);
1335 init_data_size = le32_to_cpu(ucode->init_data_size);
1336 boot_size = le32_to_cpu(ucode->boot_size);
1337
a0987a8d
RC
1338 /* api_ver should match the api version forming part of the
1339 * firmware filename ... but we don't check for that and only rely
1340 * on the API version read from firware header from here on forward */
1341
1342 if (api_ver < api_min || api_ver > api_max) {
15b1687c 1343 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC
1344 "Driver supports v%u, firmware is v%u.\n",
1345 api_max, api_ver);
1346 priv->ucode_ver = 0;
1347 ret = -EINVAL;
1348 goto err_release;
1349 }
1350 if (api_ver != api_max)
978785a3 1351 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
a0987a8d
RC
1352 "got v%u. New firmware can be obtained "
1353 "from http://www.intellinuxwireless.org.\n",
1354 api_max, api_ver);
1355
978785a3
TW
1356 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1357 IWL_UCODE_MAJOR(priv->ucode_ver),
1358 IWL_UCODE_MINOR(priv->ucode_ver),
1359 IWL_UCODE_API(priv->ucode_ver),
1360 IWL_UCODE_SERIAL(priv->ucode_ver));
a0987a8d 1361
e1623446 1362 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
a0987a8d 1363 priv->ucode_ver);
e1623446 1364 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
b481de9c 1365 inst_size);
e1623446 1366 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
b481de9c 1367 data_size);
e1623446 1368 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
b481de9c 1369 init_size);
e1623446 1370 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
b481de9c 1371 init_data_size);
e1623446 1372 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
b481de9c
ZY
1373 boot_size);
1374
1375 /* Verify size of file vs. image size info in file's header */
1376 if (ucode_raw->size < sizeof(*ucode) +
1377 inst_size + data_size + init_size +
1378 init_data_size + boot_size) {
1379
e1623446 1380 IWL_DEBUG_INFO(priv, "uCode file size %d too small\n",
b481de9c 1381 (int)ucode_raw->size);
90e759d1 1382 ret = -EINVAL;
b481de9c
ZY
1383 goto err_release;
1384 }
1385
1386 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1387 if (inst_size > priv->hw_params.max_inst_size) {
e1623446 1388 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
90e759d1
TW
1389 inst_size);
1390 ret = -EINVAL;
b481de9c
ZY
1391 goto err_release;
1392 }
1393
099b40b7 1394 if (data_size > priv->hw_params.max_data_size) {
e1623446 1395 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
90e759d1
TW
1396 data_size);
1397 ret = -EINVAL;
b481de9c
ZY
1398 goto err_release;
1399 }
099b40b7 1400 if (init_size > priv->hw_params.max_inst_size) {
e1623446
TW
1401 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1402 init_size);
90e759d1 1403 ret = -EINVAL;
b481de9c
ZY
1404 goto err_release;
1405 }
099b40b7 1406 if (init_data_size > priv->hw_params.max_data_size) {
e1623446 1407 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
90e759d1
TW
1408 init_data_size);
1409 ret = -EINVAL;
b481de9c
ZY
1410 goto err_release;
1411 }
099b40b7 1412 if (boot_size > priv->hw_params.max_bsm_size) {
e1623446
TW
1413 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1414 boot_size);
90e759d1 1415 ret = -EINVAL;
b481de9c
ZY
1416 goto err_release;
1417 }
1418
1419 /* Allocate ucode buffers for card's bus-master loading ... */
1420
1421 /* Runtime instructions and 2 copies of data:
1422 * 1) unmodified from disk
1423 * 2) backup cache for save/restore during power-downs */
1424 priv->ucode_code.len = inst_size;
98c92211 1425 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
1426
1427 priv->ucode_data.len = data_size;
98c92211 1428 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
1429
1430 priv->ucode_data_backup.len = data_size;
98c92211 1431 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 1432
1f304e4e
ZY
1433 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1434 !priv->ucode_data_backup.v_addr)
1435 goto err_pci_alloc;
1436
b481de9c 1437 /* Initialization instructions and data */
90e759d1
TW
1438 if (init_size && init_data_size) {
1439 priv->ucode_init.len = init_size;
98c92211 1440 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
1441
1442 priv->ucode_init_data.len = init_data_size;
98c92211 1443 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
1444
1445 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1446 goto err_pci_alloc;
1447 }
b481de9c
ZY
1448
1449 /* Bootstrap (instructions only, no data) */
90e759d1
TW
1450 if (boot_size) {
1451 priv->ucode_boot.len = boot_size;
98c92211 1452 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1453
90e759d1
TW
1454 if (!priv->ucode_boot.v_addr)
1455 goto err_pci_alloc;
1456 }
b481de9c
ZY
1457
1458 /* Copy images into buffers for card's bus-master reads ... */
1459
1460 /* Runtime instructions (first block of data in file) */
1461 src = &ucode->data[0];
1462 len = priv->ucode_code.len;
e1623446 1463 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c 1464 memcpy(priv->ucode_code.v_addr, src, len);
e1623446 1465 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
b481de9c
ZY
1466 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1467
1468 /* Runtime data (2nd block)
5b9f8cd3 1469 * NOTE: Copy into backup buffer will be done in iwl_up() */
b481de9c
ZY
1470 src = &ucode->data[inst_size];
1471 len = priv->ucode_data.len;
e1623446 1472 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
1473 memcpy(priv->ucode_data.v_addr, src, len);
1474 memcpy(priv->ucode_data_backup.v_addr, src, len);
1475
1476 /* Initialization instructions (3rd block) */
1477 if (init_size) {
1478 src = &ucode->data[inst_size + data_size];
1479 len = priv->ucode_init.len;
e1623446 1480 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
90e759d1 1481 len);
b481de9c
ZY
1482 memcpy(priv->ucode_init.v_addr, src, len);
1483 }
1484
1485 /* Initialization data (4th block) */
1486 if (init_data_size) {
1487 src = &ucode->data[inst_size + data_size + init_size];
1488 len = priv->ucode_init_data.len;
e1623446 1489 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
90e759d1 1490 len);
b481de9c
ZY
1491 memcpy(priv->ucode_init_data.v_addr, src, len);
1492 }
1493
1494 /* Bootstrap instructions (5th block) */
1495 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1496 len = priv->ucode_boot.len;
e1623446 1497 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
1498 memcpy(priv->ucode_boot.v_addr, src, len);
1499
1500 /* We have our copies now, allow OS release its copies */
1501 release_firmware(ucode_raw);
1502 return 0;
1503
1504 err_pci_alloc:
15b1687c 1505 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 1506 ret = -ENOMEM;
5b9f8cd3 1507 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY
1508
1509 err_release:
1510 release_firmware(ucode_raw);
1511
1512 error:
90e759d1 1513 return ret;
b481de9c
ZY
1514}
1515
ada17513
MA
1516/* temporary */
1517static int iwl_mac_beacon_update(struct ieee80211_hw *hw,
1518 struct sk_buff *skb);
1519
b481de9c 1520/**
4a4a9e81 1521 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 1522 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 1523 * Alive gets handled by iwl_init_alive_start()).
b481de9c 1524 */
4a4a9e81 1525static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 1526{
57aab75a 1527 int ret = 0;
b481de9c 1528
e1623446 1529 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c
ZY
1530
1531 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1532 /* We had an error bringing up the hardware, so take it
1533 * all the way back down so we can try again */
e1623446 1534 IWL_DEBUG_INFO(priv, "Alive failed.\n");
b481de9c
ZY
1535 goto restart;
1536 }
1537
1538 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1539 * This is a paranoid check, because we would not have gotten the
1540 * "runtime" alive if code weren't properly loaded. */
b0692f2f 1541 if (iwl_verify_ucode(priv)) {
b481de9c
ZY
1542 /* Runtime instruction load was bad;
1543 * take it all the way back down so we can try again */
e1623446 1544 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
b481de9c
ZY
1545 goto restart;
1546 }
1547
37deb2a0 1548 iwl_clear_stations_table(priv);
57aab75a
TW
1549 ret = priv->cfg->ops->lib->alive_notify(priv);
1550 if (ret) {
39aadf8c
WT
1551 IWL_WARN(priv,
1552 "Could not complete ALIVE transition [ntf]: %d\n", ret);
b481de9c
ZY
1553 goto restart;
1554 }
1555
5b9f8cd3 1556 /* After the ALIVE response, we can send host commands to the uCode */
b481de9c
ZY
1557 set_bit(STATUS_ALIVE, &priv->status);
1558
fee1247a 1559 if (iwl_is_rfkill(priv))
b481de9c
ZY
1560 return;
1561
36d6825b 1562 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
1563
1564 priv->active_rate = priv->rates_mask;
1565 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1566
3109ece1 1567 if (iwl_is_associated(priv)) {
c1adf9fb
GG
1568 struct iwl_rxon_cmd *active_rxon =
1569 (struct iwl_rxon_cmd *)&priv->active_rxon;
019fb97d
MA
1570 /* apply any changes in staging */
1571 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c
ZY
1572 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1573 } else {
1574 /* Initialize our rx_config data */
5b9f8cd3 1575 iwl_connection_init_rx_config(priv, priv->iw_mode);
8ccde88a 1576 iwl_set_rxon_chain(priv);
b481de9c
ZY
1577 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1578 }
1579
9fbab516 1580 /* Configure Bluetooth device coexistence support */
5b9f8cd3 1581 iwl_send_bt_config(priv);
b481de9c 1582
4a4a9e81
TW
1583 iwl_reset_run_time_calib(priv);
1584
b481de9c 1585 /* Configure the adapter for unassociated operation */
5b9f8cd3 1586 iwl_commit_rxon(priv);
b481de9c
ZY
1587
1588 /* At this point, the NIC is initialized and operational */
47f4a587 1589 iwl_rf_kill_ct_config(priv);
5a66926a 1590
fe00b5a5
RC
1591 iwl_leds_register(priv);
1592
e1623446 1593 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
a9f46786 1594 set_bit(STATUS_READY, &priv->status);
5a66926a 1595 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1596
1597 if (priv->error_recovering)
5b9f8cd3 1598 iwl_error_recovery(priv);
b481de9c 1599
58d0f361 1600 iwl_power_update_mode(priv, 1);
c46fbefa 1601
ada17513
MA
1602 /* reassociate for ADHOC mode */
1603 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1604 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1605 priv->vif);
1606 if (beacon)
1607 iwl_mac_beacon_update(priv->hw, beacon);
1608 }
1609
1610
c46fbefa 1611 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
5b9f8cd3 1612 iwl_set_mode(priv, priv->iw_mode);
c46fbefa 1613
b481de9c
ZY
1614 return;
1615
1616 restart:
1617 queue_work(priv->workqueue, &priv->restart);
1618}
1619
4e39317d 1620static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 1621
5b9f8cd3 1622static void __iwl_down(struct iwl_priv *priv)
b481de9c
ZY
1623{
1624 unsigned long flags;
1625 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c 1626
e1623446 1627 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
b481de9c 1628
b481de9c
ZY
1629 if (!exit_pending)
1630 set_bit(STATUS_EXIT_PENDING, &priv->status);
1631
ab53d8af
MA
1632 iwl_leds_unregister(priv);
1633
37deb2a0 1634 iwl_clear_stations_table(priv);
b481de9c
ZY
1635
1636 /* Unblock any waiting calls */
1637 wake_up_interruptible_all(&priv->wait_command_queue);
1638
b481de9c
ZY
1639 /* Wipe out the EXIT_PENDING status bit if we are not actually
1640 * exiting the module */
1641 if (!exit_pending)
1642 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1643
1644 /* stop and reset the on-board processor */
3395f6e9 1645 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
1646
1647 /* tell the device to stop sending interrupts */
0359facc 1648 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 1649 iwl_disable_interrupts(priv);
0359facc
MA
1650 spin_unlock_irqrestore(&priv->lock, flags);
1651 iwl_synchronize_irq(priv);
b481de9c
ZY
1652
1653 if (priv->mac80211_registered)
1654 ieee80211_stop_queues(priv->hw);
1655
5b9f8cd3 1656 /* If we have not previously called iwl_init() then
b481de9c 1657 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 1658 if (!iwl_is_init(priv)) {
b481de9c
ZY
1659 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1660 STATUS_RF_KILL_HW |
1661 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1662 STATUS_RF_KILL_SW |
9788864e
RC
1663 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1664 STATUS_GEO_CONFIGURED |
b481de9c 1665 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA
1666 STATUS_IN_SUSPEND |
1667 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1668 STATUS_EXIT_PENDING;
b481de9c
ZY
1669 goto exit;
1670 }
1671
1672 /* ...otherwise clear out all the status bits but the RF Kill and
1673 * SUSPEND bits and continue taking the NIC down. */
1674 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1675 STATUS_RF_KILL_HW |
1676 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1677 STATUS_RF_KILL_SW |
9788864e
RC
1678 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1679 STATUS_GEO_CONFIGURED |
b481de9c
ZY
1680 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
1681 STATUS_IN_SUSPEND |
1682 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA
1683 STATUS_FW_ERROR |
1684 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1685 STATUS_EXIT_PENDING;
b481de9c
ZY
1686
1687 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 1688 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 1689 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
1690 spin_unlock_irqrestore(&priv->lock, flags);
1691
da1bc453 1692 iwl_txq_ctx_stop(priv);
b3bbacb7 1693 iwl_rxq_stop(priv);
b481de9c
ZY
1694
1695 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
1696 if (!iwl_grab_nic_access(priv)) {
1697 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 1698 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 1699 iwl_release_nic_access(priv);
b481de9c
ZY
1700 }
1701 spin_unlock_irqrestore(&priv->lock, flags);
1702
1703 udelay(5);
1704
7f066108 1705 /* FIXME: apm_ops.suspend(priv) */
d535311e
GG
1706 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
1707 priv->cfg->ops->lib->apm_ops.stop(priv);
1708 else
1709 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 1710 exit:
885ba202 1711 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
1712
1713 if (priv->ibss_beacon)
1714 dev_kfree_skb(priv->ibss_beacon);
1715 priv->ibss_beacon = NULL;
1716
1717 /* clear out any free frames */
fcab423d 1718 iwl_clear_free_frames(priv);
b481de9c
ZY
1719}
1720
5b9f8cd3 1721static void iwl_down(struct iwl_priv *priv)
b481de9c
ZY
1722{
1723 mutex_lock(&priv->mutex);
5b9f8cd3 1724 __iwl_down(priv);
b481de9c 1725 mutex_unlock(&priv->mutex);
b24d22b1 1726
4e39317d 1727 iwl_cancel_deferred_work(priv);
b481de9c
ZY
1728}
1729
1730#define MAX_HW_RESTARTS 5
1731
5b9f8cd3 1732static int __iwl_up(struct iwl_priv *priv)
b481de9c 1733{
57aab75a
TW
1734 int i;
1735 int ret;
b481de9c
ZY
1736
1737 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 1738 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY
1739 return -EIO;
1740 }
1741
e903fbd4 1742 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 1743 IWL_ERR(priv, "ucode not available for device bringup\n");
e903fbd4
RC
1744 return -EIO;
1745 }
1746
e655b9f0 1747 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 1748 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 1749 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 1750 else
e655b9f0 1751 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 1752
c1842d61 1753 if (iwl_is_rfkill(priv)) {
5b9f8cd3 1754 iwl_enable_interrupts(priv);
39aadf8c 1755 IWL_WARN(priv, "Radio disabled by %s RF Kill switch\n",
3bff19c2 1756 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 1757 return 0;
b481de9c
ZY
1758 }
1759
3395f6e9 1760 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 1761
1053d35f 1762 ret = iwl_hw_nic_init(priv);
57aab75a 1763 if (ret) {
15b1687c 1764 IWL_ERR(priv, "Unable to init nic\n");
57aab75a 1765 return ret;
b481de9c
ZY
1766 }
1767
1768 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
1769 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1770 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
1771 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1772
1773 /* clear (again), then enable host interrupts */
3395f6e9 1774 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5b9f8cd3 1775 iwl_enable_interrupts(priv);
b481de9c
ZY
1776
1777 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
1778 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1779 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
1780
1781 /* Copy original ucode data image from disk into backup cache.
1782 * This will be used to initialize the on-board processor's
1783 * data SRAM for a clean start when the runtime program first loads. */
1784 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 1785 priv->ucode_data.len);
b481de9c 1786
b481de9c
ZY
1787 for (i = 0; i < MAX_HW_RESTARTS; i++) {
1788
37deb2a0 1789 iwl_clear_stations_table(priv);
b481de9c
ZY
1790
1791 /* load bootstrap state machine,
1792 * load bootstrap program into processor's memory,
1793 * prepare to load the "initialize" uCode */
57aab75a 1794 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 1795
57aab75a 1796 if (ret) {
15b1687c
WT
1797 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
1798 ret);
b481de9c
ZY
1799 continue;
1800 }
1801
f3d5b45b
EG
1802 /* Clear out the uCode error bit if it is set */
1803 clear_bit(STATUS_FW_ERROR, &priv->status);
1804
b481de9c 1805 /* start card; "initialize" will load runtime ucode */
5b9f8cd3 1806 iwl_nic_start(priv);
b481de9c 1807
e1623446 1808 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
b481de9c
ZY
1809
1810 return 0;
1811 }
1812
1813 set_bit(STATUS_EXIT_PENDING, &priv->status);
5b9f8cd3 1814 __iwl_down(priv);
64e72c3e 1815 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
1816
1817 /* tried to restart and config the device for as long as our
1818 * patience could withstand */
15b1687c 1819 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY
1820 return -EIO;
1821}
1822
1823
1824/*****************************************************************************
1825 *
1826 * Workqueue callbacks
1827 *
1828 *****************************************************************************/
1829
4a4a9e81 1830static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 1831{
c79dd5b5
TW
1832 struct iwl_priv *priv =
1833 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
1834
1835 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1836 return;
1837
1838 mutex_lock(&priv->mutex);
f3ccc08c 1839 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY
1840 mutex_unlock(&priv->mutex);
1841}
1842
4a4a9e81 1843static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 1844{
c79dd5b5
TW
1845 struct iwl_priv *priv =
1846 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
1847
1848 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1849 return;
1850
1851 mutex_lock(&priv->mutex);
4a4a9e81 1852 iwl_alive_start(priv);
b481de9c
ZY
1853 mutex_unlock(&priv->mutex);
1854}
1855
16e727e8
EG
1856static void iwl_bg_run_time_calib_work(struct work_struct *work)
1857{
1858 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1859 run_time_calib_work);
1860
1861 mutex_lock(&priv->mutex);
1862
1863 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1864 test_bit(STATUS_SCANNING, &priv->status)) {
1865 mutex_unlock(&priv->mutex);
1866 return;
1867 }
1868
1869 if (priv->start_calib) {
1870 iwl_chain_noise_calibration(priv, &priv->statistics);
1871
1872 iwl_sensitivity_calibration(priv, &priv->statistics);
1873 }
1874
1875 mutex_unlock(&priv->mutex);
1876 return;
1877}
1878
5b9f8cd3 1879static void iwl_bg_up(struct work_struct *data)
b481de9c 1880{
c79dd5b5 1881 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
1882
1883 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1884 return;
1885
1886 mutex_lock(&priv->mutex);
5b9f8cd3 1887 __iwl_up(priv);
b481de9c 1888 mutex_unlock(&priv->mutex);
80fcc9e2 1889 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
1890}
1891
5b9f8cd3 1892static void iwl_bg_restart(struct work_struct *data)
b481de9c 1893{
c79dd5b5 1894 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
1895
1896 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1897 return;
1898
5b9f8cd3 1899 iwl_down(priv);
b481de9c
ZY
1900 queue_work(priv->workqueue, &priv->up);
1901}
1902
5b9f8cd3 1903static void iwl_bg_rx_replenish(struct work_struct *data)
b481de9c 1904{
c79dd5b5
TW
1905 struct iwl_priv *priv =
1906 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
1907
1908 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1909 return;
1910
1911 mutex_lock(&priv->mutex);
a55360e4 1912 iwl_rx_replenish(priv);
b481de9c
ZY
1913 mutex_unlock(&priv->mutex);
1914}
1915
7878a5a4
MA
1916#define IWL_DELAY_NEXT_SCAN (HZ*2)
1917
5b9f8cd3 1918static void iwl_post_associate(struct iwl_priv *priv)
b481de9c 1919{
b481de9c 1920 struct ieee80211_conf *conf = NULL;
857485c0 1921 int ret = 0;
1ff50bda 1922 unsigned long flags;
b481de9c 1923
05c914fe 1924 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 1925 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
1926 return;
1927 }
1928
e1623446 1929 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
e174961c 1930 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
1931
1932
1933 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1934 return;
1935
b481de9c 1936
508e32e1 1937 if (!priv->vif || !priv->is_open)
948c171c 1938 return;
508e32e1 1939
c90a74ba 1940 iwl_power_cancel_timeout(priv);
2a421b91 1941 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 1942
b481de9c
ZY
1943 conf = ieee80211_get_hw_conf(priv->hw);
1944
1945 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 1946 iwl_commit_rxon(priv);
b481de9c 1947
3195c1f3 1948 iwl_setup_rxon_timing(priv);
857485c0 1949 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 1950 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 1951 if (ret)
39aadf8c 1952 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
1953 "Attempting to continue.\n");
1954
1955 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1956
42eb7c64 1957 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 1958
c7de35cd 1959 iwl_set_rxon_chain(priv);
b481de9c
ZY
1960 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
1961
e1623446 1962 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
b481de9c
ZY
1963 priv->assoc_id, priv->beacon_int);
1964
1965 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
1966 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1967 else
1968 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1969
1970 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
1971 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1972 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1973 else
1974 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1975
05c914fe 1976 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
1977 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1978
1979 }
1980
5b9f8cd3 1981 iwl_commit_rxon(priv);
b481de9c
ZY
1982
1983 switch (priv->iw_mode) {
05c914fe 1984 case NL80211_IFTYPE_STATION:
b481de9c
ZY
1985 break;
1986
05c914fe 1987 case NL80211_IFTYPE_ADHOC:
b481de9c 1988
c46fbefa
AK
1989 /* assume default assoc id */
1990 priv->assoc_id = 1;
b481de9c 1991
4f40e4d9 1992 iwl_rxon_add_station(priv, priv->bssid, 0);
5b9f8cd3 1993 iwl_send_beacon_cmd(priv);
b481de9c
ZY
1994
1995 break;
1996
1997 default:
15b1687c 1998 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 1999 __func__, priv->iw_mode);
b481de9c
ZY
2000 break;
2001 }
2002
05c914fe 2003 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2004 priv->assoc_station_added = 1;
2005
1ff50bda
EG
2006 spin_lock_irqsave(&priv->lock, flags);
2007 iwl_activate_qos(priv, 0);
2008 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2009
04816448
GE
2010 /* the chain noise calibration will enabled PM upon completion
2011 * If chain noise has already been run, then we need to enable
2012 * power management here */
2013 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2014 iwl_power_enable_management(priv);
c90a74ba
EG
2015
2016 /* Enable Rx differential gain and sensitivity calibrations */
2017 iwl_chain_noise_reset(priv);
2018 priv->start_calib = 1;
2019
508e32e1
RC
2020}
2021
b481de9c
ZY
2022/*****************************************************************************
2023 *
2024 * mac80211 entry point functions
2025 *
2026 *****************************************************************************/
2027
154b25ce 2028#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2029
5b9f8cd3 2030static int iwl_mac_start(struct ieee80211_hw *hw)
b481de9c 2031{
c79dd5b5 2032 struct iwl_priv *priv = hw->priv;
5a66926a 2033 int ret;
b481de9c 2034
e1623446 2035 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
2036
2037 /* we should be verifying the device is ready to be opened */
2038 mutex_lock(&priv->mutex);
2039
c1adf9fb 2040 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY
2041 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2042 * ucode filename and max sizes are card-specific. */
b481de9c 2043
5a66926a 2044 if (!priv->ucode_code.len) {
5b9f8cd3 2045 ret = iwl_read_ucode(priv);
5a66926a 2046 if (ret) {
15b1687c 2047 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a 2048 mutex_unlock(&priv->mutex);
6cd0b1cb 2049 return ret;
5a66926a
ZY
2050 }
2051 }
b481de9c 2052
5b9f8cd3 2053 ret = __iwl_up(priv);
5a66926a 2054
b481de9c 2055 mutex_unlock(&priv->mutex);
5a66926a 2056
80fcc9e2
AG
2057 iwl_rfkill_set_hw_state(priv);
2058
e655b9f0 2059 if (ret)
6cd0b1cb 2060 return ret;
e655b9f0 2061
c1842d61
TW
2062 if (iwl_is_rfkill(priv))
2063 goto out;
2064
e1623446 2065 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
e655b9f0
ZY
2066
2067 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2068 return 0;
2069
fe9b6b72 2070 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2071 * mac80211 will not be run successfully. */
154b25ce
EG
2072 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2073 test_bit(STATUS_READY, &priv->status),
2074 UCODE_READY_TIMEOUT);
2075 if (!ret) {
2076 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c 2077 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
154b25ce 2078 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6cd0b1cb 2079 return -ETIMEDOUT;
5a66926a 2080 }
fe9b6b72 2081 }
0a078ffa 2082
c1842d61 2083out:
0a078ffa 2084 priv->is_open = 1;
e1623446 2085 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
2086 return 0;
2087}
2088
5b9f8cd3 2089static void iwl_mac_stop(struct ieee80211_hw *hw)
b481de9c 2090{
c79dd5b5 2091 struct iwl_priv *priv = hw->priv;
b481de9c 2092
e1623446 2093 IWL_DEBUG_MAC80211(priv, "enter\n");
948c171c 2094
e655b9f0 2095 if (!priv->is_open) {
e1623446 2096 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
e655b9f0
ZY
2097 return;
2098 }
2099
b481de9c 2100 priv->is_open = 0;
5a66926a 2101
fee1247a 2102 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
2103 /* stop mac, cancel any scan request and clear
2104 * RXON_FILTER_ASSOC_MSK BIT
2105 */
5a66926a 2106 mutex_lock(&priv->mutex);
2a421b91 2107 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2108 mutex_unlock(&priv->mutex);
fde3571f
MA
2109 }
2110
5b9f8cd3 2111 iwl_down(priv);
5a66926a
ZY
2112
2113 flush_workqueue(priv->workqueue);
6cd0b1cb
HS
2114
2115 /* enable interrupts again in order to receive rfkill changes */
2116 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2117 iwl_enable_interrupts(priv);
948c171c 2118
e1623446 2119 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
2120}
2121
5b9f8cd3 2122static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2123{
c79dd5b5 2124 struct iwl_priv *priv = hw->priv;
b481de9c 2125
e1623446 2126 IWL_DEBUG_MACDUMP(priv, "enter\n");
b481de9c 2127
e1623446 2128 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2129 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2130
e039fa4a 2131 if (iwl_tx_skb(priv, skb))
b481de9c
ZY
2132 dev_kfree_skb_any(skb);
2133
e1623446 2134 IWL_DEBUG_MACDUMP(priv, "leave\n");
637f8837 2135 return NETDEV_TX_OK;
b481de9c
ZY
2136}
2137
5b9f8cd3 2138static int iwl_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2139 struct ieee80211_if_init_conf *conf)
2140{
c79dd5b5 2141 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2142 unsigned long flags;
2143
e1623446 2144 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
b481de9c 2145
32bfd35d 2146 if (priv->vif) {
e1623446 2147 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
75849d28 2148 return -EOPNOTSUPP;
b481de9c
ZY
2149 }
2150
2151 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2152 priv->vif = conf->vif;
60294de3 2153 priv->iw_mode = conf->type;
b481de9c
ZY
2154
2155 spin_unlock_irqrestore(&priv->lock, flags);
2156
2157 mutex_lock(&priv->mutex);
864792e3
TW
2158
2159 if (conf->mac_addr) {
e1623446 2160 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
864792e3
TW
2161 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2162 }
b481de9c 2163
5b9f8cd3 2164 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
c46fbefa
AK
2165 /* we are not ready, will run again when ready */
2166 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2167
b481de9c
ZY
2168 mutex_unlock(&priv->mutex);
2169
e1623446 2170 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
2171 return 0;
2172}
2173
2174/**
5b9f8cd3 2175 * iwl_mac_config - mac80211 config callback
b481de9c
ZY
2176 *
2177 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2178 * be set inappropriately and the driver currently sets the hardware up to
2179 * use it whenever needed.
2180 */
5b9f8cd3 2181static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 2182{
c79dd5b5 2183 struct iwl_priv *priv = hw->priv;
bf85ea4f 2184 const struct iwl_channel_info *ch_info;
e8975581 2185 struct ieee80211_conf *conf = &hw->conf;
019fb97d 2186 unsigned long flags = 0;
76bb77e0 2187 int ret = 0;
019fb97d
MA
2188 u16 ch;
2189 int scan_active = 0;
b481de9c
ZY
2190
2191 mutex_lock(&priv->mutex);
019fb97d
MA
2192 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2193 conf->channel->hw_value, changed);
b481de9c 2194
019fb97d
MA
2195 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2196 test_bit(STATUS_SCANNING, &priv->status))) {
2197 scan_active = 1;
2198 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
64e72c3e
MA
2199 }
2200
14a08a7f 2201
019fb97d
MA
2202 /* during scanning mac80211 will delay channel setting until
2203 * scan finish with changed = 0
2204 */
2205 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2206 if (scan_active)
2207 goto set_ch_out;
2208
2209 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2210 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2211 if (!is_channel_valid(ch_info)) {
2212 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2213 ret = -EINVAL;
2214 goto set_ch_out;
2215 }
b481de9c 2216
019fb97d
MA
2217 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2218 !is_channel_ibss(ch_info)) {
2219 IWL_ERR(priv, "channel %d in band %d not "
2220 "IBSS channel\n",
2221 conf->channel->hw_value, conf->channel->band);
2222 ret = -EINVAL;
2223 goto set_ch_out;
2224 }
b481de9c 2225
019fb97d 2226 priv->current_ht_config.is_ht = conf_is_ht(conf);
b481de9c 2227
019fb97d 2228 spin_lock_irqsave(&priv->lock, flags);
398f9e76 2229
82a66bbb 2230
019fb97d
MA
2231 /* if we are switching from ht to 2.4 clear flags
2232 * from any ht related info since 2.4 does not
2233 * support ht */
2234 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2235 priv->staging_rxon.flags = 0;
b5d7be5e 2236
019fb97d 2237 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 2238
019fb97d
MA
2239 iwl_set_flags_for_band(priv, conf->channel->band);
2240 spin_unlock_irqrestore(&priv->lock, flags);
2241 set_ch_out:
2242 /* The list of supported rates and rate mask can be different
2243 * for each band; since the band may have changed, reset
2244 * the rate mask to what mac80211 lists */
2245 iwl_set_rate(priv);
2246 }
b481de9c 2247
019fb97d
MA
2248 if (changed & IEEE80211_CONF_CHANGE_PS) {
2249 if (conf->flags & IEEE80211_CONF_PS)
2250 ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
2251 else
2252 ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
2253 if (ret)
2254 IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
b481de9c 2255
019fb97d 2256 }
b481de9c 2257
019fb97d
MA
2258 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2259 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2260 priv->tx_power_user_lmt, conf->power_level);
b481de9c 2261
019fb97d
MA
2262 iwl_set_tx_power(priv, conf->power_level, false);
2263 }
2264
2265 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2266 iwl_set_rxon_chain(priv);
2267
2268 if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
2269 if (conf->radio_enabled &&
2270 iwl_radio_kill_sw_enable_radio(priv)) {
2271 IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - "
2272 "waiting for uCode\n");
2273 goto out;
2274 }
2275
2276 if (!conf->radio_enabled)
2277 iwl_radio_kill_sw_disable_radio(priv);
b481de9c 2278 }
b481de9c 2279
b481de9c 2280 if (!conf->radio_enabled) {
e1623446 2281 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
76bb77e0 2282 goto out;
b481de9c
ZY
2283 }
2284
019fb97d
MA
2285 if (!iwl_is_ready(priv)) {
2286 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
76bb77e0 2287 goto out;
b481de9c
ZY
2288 }
2289
019fb97d
MA
2290 if (scan_active)
2291 goto out;
7b841727 2292
b481de9c
ZY
2293 if (memcmp(&priv->active_rxon,
2294 &priv->staging_rxon, sizeof(priv->staging_rxon)))
5b9f8cd3 2295 iwl_commit_rxon(priv);
b481de9c 2296 else
e1623446 2297 IWL_DEBUG_INFO(priv, "No re-sending same RXON configuration.\n");
b481de9c 2298
b481de9c 2299
a0646470 2300out:
019fb97d 2301 IWL_DEBUG_MAC80211(priv, "leave\n");
5a66926a 2302 mutex_unlock(&priv->mutex);
76bb77e0 2303 return ret;
b481de9c
ZY
2304}
2305
5b9f8cd3 2306static void iwl_config_ap(struct iwl_priv *priv)
b481de9c 2307{
857485c0 2308 int ret = 0;
1ff50bda 2309 unsigned long flags;
b481de9c 2310
d986bcd1 2311 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
2312 return;
2313
2314 /* The following should be done only at AP bring up */
3195c1f3 2315 if (!iwl_is_associated(priv)) {
b481de9c
ZY
2316
2317 /* RXON - unassoc (to set timing command) */
2318 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2319 iwl_commit_rxon(priv);
b481de9c
ZY
2320
2321 /* RXON Timing */
3195c1f3 2322 iwl_setup_rxon_timing(priv);
857485c0 2323 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2324 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2325 if (ret)
39aadf8c 2326 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
2327 "Attempting to continue.\n");
2328
c7de35cd 2329 iwl_set_rxon_chain(priv);
b481de9c
ZY
2330
2331 /* FIXME: what should be the assoc_id for AP? */
2332 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2333 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2334 priv->staging_rxon.flags |=
2335 RXON_FLG_SHORT_PREAMBLE_MSK;
2336 else
2337 priv->staging_rxon.flags &=
2338 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2339
2340 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2341 if (priv->assoc_capability &
2342 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2343 priv->staging_rxon.flags |=
2344 RXON_FLG_SHORT_SLOT_MSK;
2345 else
2346 priv->staging_rxon.flags &=
2347 ~RXON_FLG_SHORT_SLOT_MSK;
2348
05c914fe 2349 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2350 priv->staging_rxon.flags &=
2351 ~RXON_FLG_SHORT_SLOT_MSK;
2352 }
2353 /* restore RXON assoc */
2354 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2355 iwl_commit_rxon(priv);
1ff50bda
EG
2356 spin_lock_irqsave(&priv->lock, flags);
2357 iwl_activate_qos(priv, 1);
2358 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2359 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2360 }
5b9f8cd3 2361 iwl_send_beacon_cmd(priv);
b481de9c
ZY
2362
2363 /* FIXME - we need to add code here to detect a totally new
2364 * configuration, reset the AP, unassoc, rxon timing, assoc,
2365 * clear sta table, add BCAST sta... */
2366}
2367
9d139c81 2368
5b9f8cd3 2369static int iwl_mac_config_interface(struct ieee80211_hw *hw,
32bfd35d 2370 struct ieee80211_vif *vif,
b481de9c
ZY
2371 struct ieee80211_if_conf *conf)
2372{
c79dd5b5 2373 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2374 int rc;
2375
2376 if (conf == NULL)
2377 return -EIO;
2378
b716bb91 2379 if (priv->vif != vif) {
e1623446 2380 IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n");
b716bb91
EG
2381 return 0;
2382 }
2383
05c914fe 2384 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB
2385 conf->changed & IEEE80211_IFCC_BEACON) {
2386 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2387 if (!beacon)
2388 return -ENOMEM;
ada17513 2389 mutex_lock(&priv->mutex);
5b9f8cd3 2390 rc = iwl_mac_beacon_update(hw, beacon);
ada17513 2391 mutex_unlock(&priv->mutex);
9d139c81
JB
2392 if (rc)
2393 return rc;
2394 }
2395
fee1247a 2396 if (!iwl_is_alive(priv))
5a66926a
ZY
2397 return -EAGAIN;
2398
b481de9c
ZY
2399 mutex_lock(&priv->mutex);
2400
b481de9c 2401 if (conf->bssid)
e1623446 2402 IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid);
b481de9c 2403
4150c572
JB
2404/*
2405 * very dubious code was here; the probe filtering flag is never set:
2406 *
b481de9c
ZY
2407 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2408 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 2409 */
b481de9c 2410
05c914fe 2411 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY
2412 if (!conf->bssid) {
2413 conf->bssid = priv->mac_addr;
2414 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e1623446 2415 IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n",
e174961c 2416 conf->bssid);
b481de9c
ZY
2417 }
2418 if (priv->ibss_beacon)
2419 dev_kfree_skb(priv->ibss_beacon);
2420
9d139c81 2421 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
2422 }
2423
fee1247a 2424 if (iwl_is_rfkill(priv))
fde3571f
MA
2425 goto done;
2426
b481de9c
ZY
2427 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
2428 !is_multicast_ether_addr(conf->bssid)) {
2429 /* If there is currently a HW scan going on in the background
2430 * then we need to cancel it else the RXON below will fail. */
2a421b91 2431 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 2432 IWL_WARN(priv, "Aborted scan still in progress "
b481de9c 2433 "after 100ms\n");
e1623446 2434 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
b481de9c
ZY
2435 mutex_unlock(&priv->mutex);
2436 return -EAGAIN;
2437 }
2438 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
2439
2440 /* TODO: Audit driver for usage of these members and see
2441 * if mac80211 deprecates them (priv->bssid looks like it
2442 * shouldn't be there, but I haven't scanned the IBSS code
2443 * to verify) - jpk */
2444 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2445
05c914fe 2446 if (priv->iw_mode == NL80211_IFTYPE_AP)
5b9f8cd3 2447 iwl_config_ap(priv);
b481de9c 2448 else {
5b9f8cd3 2449 rc = iwl_commit_rxon(priv);
05c914fe 2450 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
4f40e4d9 2451 iwl_rxon_add_station(
b481de9c
ZY
2452 priv, priv->active_rxon.bssid_addr, 1);
2453 }
2454
2455 } else {
2a421b91 2456 iwl_scan_cancel_timeout(priv, 100);
b481de9c 2457 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2458 iwl_commit_rxon(priv);
b481de9c
ZY
2459 }
2460
fde3571f 2461 done:
e1623446 2462 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
2463 mutex_unlock(&priv->mutex);
2464
2465 return 0;
2466}
2467
5b9f8cd3 2468static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2469 struct ieee80211_if_init_conf *conf)
2470{
c79dd5b5 2471 struct iwl_priv *priv = hw->priv;
b481de9c 2472
e1623446 2473 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
2474
2475 mutex_lock(&priv->mutex);
948c171c 2476
fee1247a 2477 if (iwl_is_ready_rf(priv)) {
2a421b91 2478 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2479 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2480 iwl_commit_rxon(priv);
fde3571f 2481 }
32bfd35d
JB
2482 if (priv->vif == conf->vif) {
2483 priv->vif = NULL;
b481de9c 2484 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY
2485 }
2486 mutex_unlock(&priv->mutex);
2487
e1623446 2488 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
2489
2490}
471b3efd 2491
3109ece1 2492#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
5b9f8cd3 2493static void iwl_bss_info_changed(struct ieee80211_hw *hw,
471b3efd
JB
2494 struct ieee80211_vif *vif,
2495 struct ieee80211_bss_conf *bss_conf,
2496 u32 changes)
220173b0 2497{
c79dd5b5 2498 struct iwl_priv *priv = hw->priv;
220173b0 2499
e1623446 2500 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
3109ece1 2501
471b3efd 2502 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
e1623446 2503 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
3109ece1 2504 bss_conf->use_short_preamble);
471b3efd 2505 if (bss_conf->use_short_preamble)
220173b0
TW
2506 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2507 else
2508 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2509 }
2510
471b3efd 2511 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
e1623446 2512 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 2513 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
2514 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2515 else
2516 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2517 }
2518
98952d5d 2519 if (changes & BSS_CHANGED_HT) {
5b9f8cd3 2520 iwl_ht_conf(priv, bss_conf);
c7de35cd 2521 iwl_set_rxon_chain(priv);
98952d5d
TW
2522 }
2523
471b3efd 2524 if (changes & BSS_CHANGED_ASSOC) {
e1623446 2525 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
2526 /* This should never happen as this function should
2527 * never be called from interrupt context. */
2528 if (WARN_ON_ONCE(in_interrupt()))
2529 return;
3109ece1
TW
2530 if (bss_conf->assoc) {
2531 priv->assoc_id = bss_conf->aid;
2532 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 2533 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW
2534 priv->timestamp = bss_conf->timestamp;
2535 priv->assoc_capability = bss_conf->assoc_capability;
9ccacb86
TW
2536
2537 /* we have just associated, don't start scan too early
2538 * leave time for EAPOL exchange to complete
2539 */
3109ece1
TW
2540 priv->next_scan_jiffies = jiffies +
2541 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1 2542 mutex_lock(&priv->mutex);
5b9f8cd3 2543 iwl_post_associate(priv);
508e32e1 2544 mutex_unlock(&priv->mutex);
3109ece1
TW
2545 } else {
2546 priv->assoc_id = 0;
e1623446 2547 IWL_DEBUG_MAC80211(priv, "DISASSOC %d\n", bss_conf->assoc);
3109ece1
TW
2548 }
2549 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
e1623446 2550 IWL_DEBUG_MAC80211(priv, "Associated Changes %d\n", changes);
7e8c519e 2551 iwl_send_rxon_assoc(priv);
471b3efd
JB
2552 }
2553
220173b0 2554}
b481de9c 2555
5b9f8cd3 2556static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
ab885f8c
EG
2557 struct ieee80211_key_conf *keyconf, const u8 *addr,
2558 u32 iv32, u16 *phase1key)
2559{
ab885f8c 2560
9f58671e 2561 struct iwl_priv *priv = hw->priv;
e1623446 2562 IWL_DEBUG_MAC80211(priv, "enter\n");
ab885f8c 2563
9f58671e 2564 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
ab885f8c 2565
e1623446 2566 IWL_DEBUG_MAC80211(priv, "leave\n");
ab885f8c
EG
2567}
2568
5b9f8cd3 2569static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB
2570 struct ieee80211_vif *vif,
2571 struct ieee80211_sta *sta,
b481de9c
ZY
2572 struct ieee80211_key_conf *key)
2573{
c79dd5b5 2574 struct iwl_priv *priv = hw->priv;
42986796
WT
2575 const u8 *addr;
2576 int ret;
2577 u8 sta_id;
2578 bool is_default_wep_key = false;
b481de9c 2579
e1623446 2580 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2581
099b40b7 2582 if (priv->hw_params.sw_crypto) {
e1623446 2583 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
b481de9c
ZY
2584 return -EOPNOTSUPP;
2585 }
42986796 2586 addr = sta ? sta->addr : iwl_bcast_addr;
947b13a7 2587 sta_id = iwl_find_station(priv, addr);
6974e363 2588 if (sta_id == IWL_INVALID_STATION) {
e1623446 2589 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
e174961c 2590 addr);
6974e363 2591 return -EINVAL;
b481de9c 2592
deb09c43 2593 }
b481de9c 2594
6974e363 2595 mutex_lock(&priv->mutex);
2a421b91 2596 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG
2597 mutex_unlock(&priv->mutex);
2598
2599 /* If we are getting WEP group key and we didn't receive any key mapping
2600 * so far, we are in legacy wep mode (group key only), otherwise we are
2601 * in 1X mode.
2602 * In legacy wep mode, we use another host command to the uCode */
5425e490 2603 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
05c914fe 2604 priv->iw_mode != NL80211_IFTYPE_AP) {
6974e363
EG
2605 if (cmd == SET_KEY)
2606 is_default_wep_key = !priv->key_mapping_key;
2607 else
ccc038ab
EG
2608 is_default_wep_key =
2609 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 2610 }
052c4b9f 2611
b481de9c 2612 switch (cmd) {
deb09c43 2613 case SET_KEY:
6974e363
EG
2614 if (is_default_wep_key)
2615 ret = iwl_set_default_wep_key(priv, key);
deb09c43 2616 else
7480513f 2617 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43 2618
e1623446 2619 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
b481de9c
ZY
2620 break;
2621 case DISABLE_KEY:
6974e363
EG
2622 if (is_default_wep_key)
2623 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 2624 else
3ec47732 2625 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43 2626
e1623446 2627 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
b481de9c
ZY
2628 break;
2629 default:
deb09c43 2630 ret = -EINVAL;
b481de9c
ZY
2631 }
2632
e1623446 2633 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 2634
deb09c43 2635 return ret;
b481de9c
ZY
2636}
2637
5b9f8cd3 2638static int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
2639 const struct ieee80211_tx_queue_params *params)
2640{
c79dd5b5 2641 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2642 unsigned long flags;
2643 int q;
b481de9c 2644
e1623446 2645 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2646
fee1247a 2647 if (!iwl_is_ready_rf(priv)) {
e1623446 2648 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
2649 return -EIO;
2650 }
2651
2652 if (queue >= AC_NUM) {
e1623446 2653 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
b481de9c
ZY
2654 return 0;
2655 }
2656
b481de9c
ZY
2657 q = AC_NUM - 1 - queue;
2658
2659 spin_lock_irqsave(&priv->lock, flags);
2660
2661 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2662 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2663 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2664 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 2665 cpu_to_le16((params->txop * 32));
b481de9c
ZY
2666
2667 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2668 priv->qos_data.qos_active = 1;
2669
05c914fe 2670 if (priv->iw_mode == NL80211_IFTYPE_AP)
1ff50bda 2671 iwl_activate_qos(priv, 1);
3109ece1 2672 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 2673 iwl_activate_qos(priv, 0);
b481de9c 2674
1ff50bda 2675 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 2676
e1623446 2677 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
2678 return 0;
2679}
2680
5b9f8cd3 2681static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
d783b061 2682 enum ieee80211_ampdu_mlme_action action,
17741cdc 2683 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
d783b061
TW
2684{
2685 struct iwl_priv *priv = hw->priv;
d783b061 2686
e1623446 2687 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
e174961c 2688 sta->addr, tid);
d783b061
TW
2689
2690 if (!(priv->cfg->sku & IWL_SKU_N))
2691 return -EACCES;
2692
2693 switch (action) {
2694 case IEEE80211_AMPDU_RX_START:
e1623446 2695 IWL_DEBUG_HT(priv, "start Rx\n");
9f58671e 2696 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
d783b061 2697 case IEEE80211_AMPDU_RX_STOP:
e1623446 2698 IWL_DEBUG_HT(priv, "stop Rx\n");
9f58671e 2699 return iwl_sta_rx_agg_stop(priv, sta->addr, tid);
d783b061 2700 case IEEE80211_AMPDU_TX_START:
e1623446 2701 IWL_DEBUG_HT(priv, "start Tx\n");
17741cdc 2702 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
d783b061 2703 case IEEE80211_AMPDU_TX_STOP:
e1623446 2704 IWL_DEBUG_HT(priv, "stop Tx\n");
17741cdc 2705 return iwl_tx_agg_stop(priv, sta->addr, tid);
d783b061 2706 default:
e1623446 2707 IWL_DEBUG_HT(priv, "unknown\n");
d783b061
TW
2708 return -EINVAL;
2709 break;
2710 }
2711 return 0;
2712}
9f58671e 2713
5b9f8cd3 2714static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
2715 struct ieee80211_tx_queue_stats *stats)
2716{
c79dd5b5 2717 struct iwl_priv *priv = hw->priv;
b481de9c 2718 int i, avail;
16466903 2719 struct iwl_tx_queue *txq;
443cfd45 2720 struct iwl_queue *q;
b481de9c
ZY
2721 unsigned long flags;
2722
e1623446 2723 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2724
fee1247a 2725 if (!iwl_is_ready_rf(priv)) {
e1623446 2726 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
2727 return -EIO;
2728 }
2729
2730 spin_lock_irqsave(&priv->lock, flags);
2731
2732 for (i = 0; i < AC_NUM; i++) {
2733 txq = &priv->txq[i];
2734 q = &txq->q;
443cfd45 2735 avail = iwl_queue_space(q);
b481de9c 2736
57ffc589
JB
2737 stats[i].len = q->n_window - avail;
2738 stats[i].limit = q->n_window - q->high_mark;
2739 stats[i].count = q->n_window;
b481de9c
ZY
2740
2741 }
2742 spin_unlock_irqrestore(&priv->lock, flags);
2743
e1623446 2744 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
2745
2746 return 0;
2747}
2748
5b9f8cd3 2749static int iwl_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
2750 struct ieee80211_low_level_stats *stats)
2751{
bf403db8
EK
2752 struct iwl_priv *priv = hw->priv;
2753
2754 priv = hw->priv;
e1623446
TW
2755 IWL_DEBUG_MAC80211(priv, "enter\n");
2756 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
2757
2758 return 0;
2759}
2760
5b9f8cd3 2761static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 2762{
c79dd5b5 2763 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2764 unsigned long flags;
2765
2766 mutex_lock(&priv->mutex);
e1623446 2767 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2768
b481de9c 2769 spin_lock_irqsave(&priv->lock, flags);
fd105e79 2770 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 2771 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 2772
c7de35cd 2773 iwl_reset_qos(priv);
b481de9c 2774
b481de9c
ZY
2775 spin_lock_irqsave(&priv->lock, flags);
2776 priv->assoc_id = 0;
2777 priv->assoc_capability = 0;
b481de9c
ZY
2778 priv->assoc_station_added = 0;
2779
2780 /* new association get rid of ibss beacon skb */
2781 if (priv->ibss_beacon)
2782 dev_kfree_skb(priv->ibss_beacon);
2783
2784 priv->ibss_beacon = NULL;
2785
2786 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 2787 priv->timestamp = 0;
05c914fe 2788 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY
2789 priv->beacon_int = 0;
2790
2791 spin_unlock_irqrestore(&priv->lock, flags);
2792
fee1247a 2793 if (!iwl_is_ready_rf(priv)) {
e1623446 2794 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
fde3571f
MA
2795 mutex_unlock(&priv->mutex);
2796 return;
2797 }
2798
052c4b9f 2799 /* we are restarting association process
2800 * clear RXON_FILTER_ASSOC_MSK bit
2801 */
05c914fe 2802 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2a421b91 2803 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 2804 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2805 iwl_commit_rxon(priv);
052c4b9f 2806 }
2807
5da4b55f
MA
2808 iwl_power_update_mode(priv, 0);
2809
b481de9c 2810 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 2811 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
052c4b9f 2812
c90a74ba
EG
2813 /* switch to CAM during association period.
2814 * the ucode will block any association/authentication
2815 * frome during assiciation period if it can not hear
2816 * the AP because of PM. the timer enable PM back is
2817 * association do not complete
2818 */
2819 if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN |
2820 IEEE80211_CHAN_RADAR))
2821 iwl_power_disable_management(priv, 3000);
2822
e1623446 2823 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
b481de9c
ZY
2824 mutex_unlock(&priv->mutex);
2825 return;
2826 }
2827
5b9f8cd3 2828 iwl_set_rate(priv);
b481de9c
ZY
2829
2830 mutex_unlock(&priv->mutex);
2831
e1623446 2832 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
2833}
2834
5b9f8cd3 2835static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2836{
c79dd5b5 2837 struct iwl_priv *priv = hw->priv;
b481de9c 2838 unsigned long flags;
2ff75b78 2839 __le64 timestamp;
b481de9c 2840
e1623446 2841 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2842
fee1247a 2843 if (!iwl_is_ready_rf(priv)) {
e1623446 2844 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
2845 return -EIO;
2846 }
2847
05c914fe 2848 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
e1623446 2849 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
b481de9c
ZY
2850 return -EIO;
2851 }
2852
2853 spin_lock_irqsave(&priv->lock, flags);
2854
2855 if (priv->ibss_beacon)
2856 dev_kfree_skb(priv->ibss_beacon);
2857
2858 priv->ibss_beacon = skb;
2859
2860 priv->assoc_id = 0;
2ff75b78 2861 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b94d8eea 2862 priv->timestamp = le64_to_cpu(timestamp);
b481de9c 2863
e1623446 2864 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
2865 spin_unlock_irqrestore(&priv->lock, flags);
2866
c7de35cd 2867 iwl_reset_qos(priv);
b481de9c 2868
5b9f8cd3 2869 iwl_post_associate(priv);
b481de9c 2870
b481de9c
ZY
2871
2872 return 0;
2873}
2874
b481de9c
ZY
2875/*****************************************************************************
2876 *
2877 * sysfs attributes
2878 *
2879 *****************************************************************************/
2880
0a6857e7 2881#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
2882
2883/*
2884 * The following adds a new attribute to the sysfs representation
c3a739fa 2885 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
b481de9c
ZY
2886 * used for controlling the debug level.
2887 *
2888 * See the level definitions in iwl for details.
2889 */
2890
8cf769c6
EK
2891static ssize_t show_debug_level(struct device *d,
2892 struct device_attribute *attr, char *buf)
b481de9c 2893{
8cf769c6
EK
2894 struct iwl_priv *priv = d->driver_data;
2895
2896 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 2897}
8cf769c6
EK
2898static ssize_t store_debug_level(struct device *d,
2899 struct device_attribute *attr,
b481de9c
ZY
2900 const char *buf, size_t count)
2901{
8cf769c6 2902 struct iwl_priv *priv = d->driver_data;
9257746f
TW
2903 unsigned long val;
2904 int ret;
b481de9c 2905
9257746f
TW
2906 ret = strict_strtoul(buf, 0, &val);
2907 if (ret)
978785a3 2908 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
b481de9c 2909 else
8cf769c6 2910 priv->debug_level = val;
b481de9c
ZY
2911
2912 return strnlen(buf, count);
2913}
2914
8cf769c6
EK
2915static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2916 show_debug_level, store_debug_level);
2917
b481de9c 2918
0a6857e7 2919#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 2920
b481de9c 2921
bc6f59bc
TW
2922static ssize_t show_version(struct device *d,
2923 struct device_attribute *attr, char *buf)
2924{
2925 struct iwl_priv *priv = d->driver_data;
885ba202 2926 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW
2927 ssize_t pos = 0;
2928 u16 eeprom_ver;
bc6f59bc
TW
2929
2930 if (palive->is_valid)
f236a265
TW
2931 pos += sprintf(buf + pos,
2932 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
2933 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW
2934 palive->ucode_major, palive->ucode_minor,
2935 palive->sw_rev[0], palive->sw_rev[1],
2936 palive->ver_type, palive->ver_subtype);
bc6f59bc 2937 else
f236a265
TW
2938 pos += sprintf(buf + pos, "fw not loaded\n");
2939
2940 if (priv->eeprom) {
2941 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
2942 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
2943 eeprom_ver);
2944 } else {
2945 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
2946 }
2947
2948 return pos;
bc6f59bc
TW
2949}
2950
2951static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
2952
b481de9c
ZY
2953static ssize_t show_temperature(struct device *d,
2954 struct device_attribute *attr, char *buf)
2955{
c79dd5b5 2956 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 2957
fee1247a 2958 if (!iwl_is_alive(priv))
b481de9c
ZY
2959 return -EAGAIN;
2960
91dbc5bd 2961 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY
2962}
2963
2964static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2965
b481de9c
ZY
2966static ssize_t show_tx_power(struct device *d,
2967 struct device_attribute *attr, char *buf)
2968{
c79dd5b5 2969 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
91f39e8e
JS
2970
2971 if (!iwl_is_ready_rf(priv))
2972 return sprintf(buf, "off\n");
2973 else
2974 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
2975}
2976
2977static ssize_t store_tx_power(struct device *d,
2978 struct device_attribute *attr,
2979 const char *buf, size_t count)
2980{
c79dd5b5 2981 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
2982 unsigned long val;
2983 int ret;
b481de9c 2984
9257746f
TW
2985 ret = strict_strtoul(buf, 10, &val);
2986 if (ret)
978785a3 2987 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
b481de9c 2988 else
630fe9b6 2989 iwl_set_tx_power(priv, val, false);
b481de9c
ZY
2990
2991 return count;
2992}
2993
2994static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2995
2996static ssize_t show_flags(struct device *d,
2997 struct device_attribute *attr, char *buf)
2998{
c79dd5b5 2999 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3000
3001 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3002}
3003
3004static ssize_t store_flags(struct device *d,
3005 struct device_attribute *attr,
3006 const char *buf, size_t count)
3007{
c79dd5b5 3008 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3009 unsigned long val;
3010 u32 flags;
3011 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3012 if (ret)
9257746f
TW
3013 return ret;
3014 flags = (u32)val;
b481de9c
ZY
3015
3016 mutex_lock(&priv->mutex);
3017 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3018 /* Cancel any currently running scans... */
2a421b91 3019 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3020 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3021 else {
e1623446 3022 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
b481de9c 3023 priv->staging_rxon.flags = cpu_to_le32(flags);
5b9f8cd3 3024 iwl_commit_rxon(priv);
b481de9c
ZY
3025 }
3026 }
3027 mutex_unlock(&priv->mutex);
3028
3029 return count;
3030}
3031
3032static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3033
3034static ssize_t show_filter_flags(struct device *d,
3035 struct device_attribute *attr, char *buf)
3036{
c79dd5b5 3037 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3038
3039 return sprintf(buf, "0x%04X\n",
3040 le32_to_cpu(priv->active_rxon.filter_flags));
3041}
3042
3043static ssize_t store_filter_flags(struct device *d,
3044 struct device_attribute *attr,
3045 const char *buf, size_t count)
3046{
c79dd5b5 3047 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3048 unsigned long val;
3049 u32 filter_flags;
3050 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3051 if (ret)
9257746f
TW
3052 return ret;
3053 filter_flags = (u32)val;
b481de9c
ZY
3054
3055 mutex_lock(&priv->mutex);
3056 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3057 /* Cancel any currently running scans... */
2a421b91 3058 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3059 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3060 else {
e1623446 3061 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
b481de9c
ZY
3062 "0x%04X\n", filter_flags);
3063 priv->staging_rxon.filter_flags =
3064 cpu_to_le32(filter_flags);
5b9f8cd3 3065 iwl_commit_rxon(priv);
b481de9c
ZY
3066 }
3067 }
3068 mutex_unlock(&priv->mutex);
3069
3070 return count;
3071}
3072
3073static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3074 store_filter_flags);
3075
b481de9c
ZY
3076static ssize_t store_power_level(struct device *d,
3077 struct device_attribute *attr,
3078 const char *buf, size_t count)
3079{
c79dd5b5 3080 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3081 int ret;
9257746f
TW
3082 unsigned long mode;
3083
b481de9c 3084
b481de9c
ZY
3085 mutex_lock(&priv->mutex);
3086
fee1247a 3087 if (!iwl_is_ready(priv)) {
298df1f6 3088 ret = -EAGAIN;
b481de9c
ZY
3089 goto out;
3090 }
3091
9257746f 3092 ret = strict_strtoul(buf, 10, &mode);
926f0b2e 3093 if (ret)
9257746f
TW
3094 goto out;
3095
298df1f6
EK
3096 ret = iwl_power_set_user_mode(priv, mode);
3097 if (ret) {
e1623446 3098 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
5da4b55f 3099 goto out;
b481de9c 3100 }
298df1f6 3101 ret = count;
b481de9c
ZY
3102
3103 out:
3104 mutex_unlock(&priv->mutex);
298df1f6 3105 return ret;
b481de9c
ZY
3106}
3107
b481de9c
ZY
3108static ssize_t show_power_level(struct device *d,
3109 struct device_attribute *attr, char *buf)
3110{
c79dd5b5 3111 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK
3112 int mode = priv->power_data.user_power_setting;
3113 int system = priv->power_data.system_power_setting;
5da4b55f 3114 int level = priv->power_data.power_mode;
b481de9c
ZY
3115 char *p = buf;
3116
298df1f6
EK
3117 switch (system) {
3118 case IWL_POWER_SYS_AUTO:
3119 p += sprintf(p, "SYSTEM:auto");
b481de9c 3120 break;
298df1f6
EK
3121 case IWL_POWER_SYS_AC:
3122 p += sprintf(p, "SYSTEM:ac");
3123 break;
3124 case IWL_POWER_SYS_BATTERY:
3125 p += sprintf(p, "SYSTEM:battery");
b481de9c 3126 break;
b481de9c 3127 }
298df1f6 3128
c3056065
AK
3129 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
3130 "fixed" : "auto");
298df1f6
EK
3131 p += sprintf(p, "\tINDEX:%d", level);
3132 p += sprintf(p, "\n");
3ac7f146 3133 return p - buf + 1;
b481de9c
ZY
3134}
3135
3136static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3137 store_power_level);
3138
b481de9c
ZY
3139
3140static ssize_t show_statistics(struct device *d,
3141 struct device_attribute *attr, char *buf)
3142{
c79dd5b5 3143 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 3144 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 3145 u32 len = 0, ofs = 0;
3ac7f146 3146 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY
3147 int rc = 0;
3148
fee1247a 3149 if (!iwl_is_alive(priv))
b481de9c
ZY
3150 return -EAGAIN;
3151
3152 mutex_lock(&priv->mutex);
49ea8596 3153 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
3154 mutex_unlock(&priv->mutex);
3155
3156 if (rc) {
3157 len = sprintf(buf,
3158 "Error sending statistics request: 0x%08X\n", rc);
3159 return len;
3160 }
3161
3162 while (size && (PAGE_SIZE - len)) {
3163 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3164 PAGE_SIZE - len, 1);
3165 len = strlen(buf);
3166 if (PAGE_SIZE - len)
3167 buf[len++] = '\n';
3168
3169 ofs += 16;
3170 size -= min(size, 16U);
3171 }
3172
3173 return len;
3174}
3175
3176static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3177
b481de9c 3178
b481de9c
ZY
3179/*****************************************************************************
3180 *
3181 * driver setup and teardown
3182 *
3183 *****************************************************************************/
3184
4e39317d 3185static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c 3186{
d21050c7 3187 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
b481de9c
ZY
3188
3189 init_waitqueue_head(&priv->wait_command_queue);
3190
5b9f8cd3
EG
3191 INIT_WORK(&priv->up, iwl_bg_up);
3192 INIT_WORK(&priv->restart, iwl_bg_restart);
3193 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3194 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
3195 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
16e727e8 3196 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW
3197 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3198 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91 3199
2a421b91 3200 iwl_setup_scan_deferred_work(priv);
c90a74ba 3201 iwl_setup_power_deferred_work(priv);
bb8c093b 3202
4e39317d
EG
3203 if (priv->cfg->ops->lib->setup_deferred_work)
3204 priv->cfg->ops->lib->setup_deferred_work(priv);
3205
3206 init_timer(&priv->statistics_periodic);
3207 priv->statistics_periodic.data = (unsigned long)priv;
5b9f8cd3 3208 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
b481de9c
ZY
3209
3210 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
5b9f8cd3 3211 iwl_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
3212}
3213
4e39317d 3214static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 3215{
4e39317d
EG
3216 if (priv->cfg->ops->lib->cancel_deferred_work)
3217 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 3218
3ae6a054 3219 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c 3220 cancel_delayed_work(&priv->scan_check);
c90a74ba 3221 cancel_delayed_work_sync(&priv->set_power_save);
b481de9c 3222 cancel_delayed_work(&priv->alive_start);
b481de9c 3223 cancel_work_sync(&priv->beacon_update);
4e39317d 3224 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY
3225}
3226
5b9f8cd3 3227static struct attribute *iwl_sysfs_entries[] = {
b481de9c
ZY
3228 &dev_attr_flags.attr,
3229 &dev_attr_filter_flags.attr,
b481de9c 3230 &dev_attr_power_level.attr,
b481de9c 3231 &dev_attr_statistics.attr,
b481de9c 3232 &dev_attr_temperature.attr,
b481de9c 3233 &dev_attr_tx_power.attr,
8cf769c6
EK
3234#ifdef CONFIG_IWLWIFI_DEBUG
3235 &dev_attr_debug_level.attr,
3236#endif
bc6f59bc 3237 &dev_attr_version.attr,
b481de9c
ZY
3238
3239 NULL
3240};
3241
5b9f8cd3 3242static struct attribute_group iwl_attribute_group = {
b481de9c 3243 .name = NULL, /* put in device directory */
5b9f8cd3 3244 .attrs = iwl_sysfs_entries,
b481de9c
ZY
3245};
3246
5b9f8cd3
EG
3247static struct ieee80211_ops iwl_hw_ops = {
3248 .tx = iwl_mac_tx,
3249 .start = iwl_mac_start,
3250 .stop = iwl_mac_stop,
3251 .add_interface = iwl_mac_add_interface,
3252 .remove_interface = iwl_mac_remove_interface,
3253 .config = iwl_mac_config,
3254 .config_interface = iwl_mac_config_interface,
3255 .configure_filter = iwl_configure_filter,
3256 .set_key = iwl_mac_set_key,
3257 .update_tkip_key = iwl_mac_update_tkip_key,
3258 .get_stats = iwl_mac_get_stats,
3259 .get_tx_stats = iwl_mac_get_tx_stats,
3260 .conf_tx = iwl_mac_conf_tx,
3261 .reset_tsf = iwl_mac_reset_tsf,
3262 .bss_info_changed = iwl_bss_info_changed,
3263 .ampdu_action = iwl_mac_ampdu_action,
cb43dc25 3264 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
3265};
3266
5b9f8cd3 3267static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
3268{
3269 int err = 0;
c79dd5b5 3270 struct iwl_priv *priv;
b481de9c 3271 struct ieee80211_hw *hw;
82b9a121 3272 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 3273 unsigned long flags;
6cd0b1cb 3274 u16 pci_cmd;
b481de9c 3275
316c30d9
AK
3276 /************************
3277 * 1. Allocating HW data
3278 ************************/
3279
6440adb5
BC
3280 /* Disabling hardware scan means that mac80211 will perform scans
3281 * "the hard way", rather than using device's scan. */
1ea87396 3282 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK
3283 if (cfg->mod_params->debug & IWL_DL_INFO)
3284 dev_printk(KERN_DEBUG, &(pdev->dev),
3285 "Disabling hw_scan\n");
5b9f8cd3 3286 iwl_hw_ops.hw_scan = NULL;
b481de9c
ZY
3287 }
3288
5b9f8cd3 3289 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
1d0a082d 3290 if (!hw) {
b481de9c
ZY
3291 err = -ENOMEM;
3292 goto out;
3293 }
1d0a082d
AK
3294 priv = hw->priv;
3295 /* At this point both hw and priv are allocated. */
3296
b481de9c
ZY
3297 SET_IEEE80211_DEV(hw, &pdev->dev);
3298
e1623446 3299 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
82b9a121 3300 priv->cfg = cfg;
b481de9c 3301 priv->pci_dev = pdev;
316c30d9 3302
0a6857e7 3303#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 3304 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
3305 atomic_set(&priv->restrict_refcnt, 0);
3306#endif
b481de9c 3307
316c30d9
AK
3308 /**************************
3309 * 2. Initializing PCI bus
3310 **************************/
3311 if (pci_enable_device(pdev)) {
3312 err = -ENODEV;
3313 goto out_ieee80211_free_hw;
3314 }
3315
3316 pci_set_master(pdev);
3317
093d874c 3318 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
316c30d9 3319 if (!err)
093d874c 3320 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
cc2a8ea8 3321 if (err) {
093d874c 3322 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3323 if (!err)
093d874c 3324 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3325 /* both attempts failed: */
316c30d9 3326 if (err) {
978785a3 3327 IWL_WARN(priv, "No suitable DMA available.\n");
316c30d9 3328 goto out_pci_disable_device;
cc2a8ea8 3329 }
316c30d9
AK
3330 }
3331
3332 err = pci_request_regions(pdev, DRV_NAME);
3333 if (err)
3334 goto out_pci_disable_device;
3335
3336 pci_set_drvdata(pdev, priv);
3337
316c30d9
AK
3338
3339 /***********************
3340 * 3. Read REV register
3341 ***********************/
3342 priv->hw_base = pci_iomap(pdev, 0, 0);
3343 if (!priv->hw_base) {
3344 err = -ENODEV;
3345 goto out_pci_release_regions;
3346 }
3347
e1623446 3348 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
316c30d9 3349 (unsigned long long) pci_resource_len(pdev, 0));
e1623446 3350 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
316c30d9 3351
b661c819 3352 iwl_hw_detect(priv);
978785a3 3353 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
b661c819 3354 priv->cfg->name, priv->hw_rev);
316c30d9 3355
e7b63581
TW
3356 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3357 * PCI Tx retries from interfering with C3 CPU state */
3358 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3359
91238714
TW
3360 /* amp init */
3361 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 3362 if (err < 0) {
808ff697 3363 IWL_ERR(priv, "Failed to init APMG\n");
316c30d9
AK
3364 goto out_iounmap;
3365 }
91238714
TW
3366 /*****************
3367 * 4. Read EEPROM
3368 *****************/
316c30d9
AK
3369 /* Read the EEPROM */
3370 err = iwl_eeprom_init(priv);
3371 if (err) {
15b1687c 3372 IWL_ERR(priv, "Unable to init EEPROM\n");
316c30d9
AK
3373 goto out_iounmap;
3374 }
8614f360
TW
3375 err = iwl_eeprom_check_version(priv);
3376 if (err)
c8f16138 3377 goto out_free_eeprom;
8614f360 3378
02883017 3379 /* extract MAC Address */
316c30d9 3380 iwl_eeprom_get_mac(priv, priv->mac_addr);
e1623446 3381 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
316c30d9
AK
3382 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3383
3384 /************************
3385 * 5. Setup HW constants
3386 ************************/
da154e30 3387 if (iwl_set_hw_params(priv)) {
15b1687c 3388 IWL_ERR(priv, "failed to set hw parameters\n");
073d3f5f 3389 goto out_free_eeprom;
316c30d9
AK
3390 }
3391
3392 /*******************
6ba87956 3393 * 6. Setup priv
316c30d9 3394 *******************/
b481de9c 3395
6ba87956 3396 err = iwl_init_drv(priv);
bf85ea4f 3397 if (err)
399f4900 3398 goto out_free_eeprom;
bf85ea4f 3399 /* At this point both hw and priv are initialized. */
316c30d9
AK
3400
3401 /**********************************
3402 * 7. Initialize module parameters
3403 **********************************/
3404
3405 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 3406 if (priv->cfg->mod_params->disable) {
316c30d9 3407 set_bit(STATUS_RF_KILL_SW, &priv->status);
e1623446 3408 IWL_DEBUG_INFO(priv, "Radio disabled.\n");
316c30d9
AK
3409 }
3410
316c30d9
AK
3411 /********************
3412 * 8. Setup services
3413 ********************/
0359facc 3414 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3415 iwl_disable_interrupts(priv);
0359facc 3416 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9 3417
6cd0b1cb
HS
3418 pci_enable_msi(priv->pci_dev);
3419
3420 err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
3421 DRV_NAME, priv);
3422 if (err) {
3423 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3424 goto out_disable_msi;
3425 }
5b9f8cd3 3426 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
316c30d9 3427 if (err) {
15b1687c 3428 IWL_ERR(priv, "failed to create sysfs device attributes\n");
795cc0ad 3429 goto out_free_irq;
316c30d9
AK
3430 }
3431
4e39317d 3432 iwl_setup_deferred_work(priv);
653fa4a0 3433 iwl_setup_rx_handlers(priv);
316c30d9 3434
6ba87956 3435 /**********************************
6cd0b1cb 3436 * 9. Setup and register mac80211
6ba87956
TW
3437 **********************************/
3438
6cd0b1cb
HS
3439 /* enable interrupts if needed: hw bug w/a */
3440 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3441 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3442 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3443 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3444 }
3445
3446 iwl_enable_interrupts(priv);
3447
6ba87956
TW
3448 err = iwl_setup_mac(priv);
3449 if (err)
3450 goto out_remove_sysfs;
3451
3452 err = iwl_dbgfs_register(priv, DRV_NAME);
3453 if (err)
15b1687c 3454 IWL_ERR(priv, "failed to create debugfs files\n");
6ba87956 3455
6cd0b1cb
HS
3456 /* If platform's RF_KILL switch is NOT set to KILL */
3457 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3458 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3459 else
3460 set_bit(STATUS_RF_KILL_HW, &priv->status);
6ba87956 3461
58d0f361
EG
3462 err = iwl_rfkill_init(priv);
3463 if (err)
15b1687c 3464 IWL_ERR(priv, "Unable to initialize RFKILL system. "
58d0f361 3465 "Ignoring error: %d\n", err);
6cd0b1cb
HS
3466 else
3467 iwl_rfkill_set_hw_state(priv);
3468
58d0f361 3469 iwl_power_initialize(priv);
b481de9c
ZY
3470 return 0;
3471
316c30d9 3472 out_remove_sysfs:
c8f16138
RC
3473 destroy_workqueue(priv->workqueue);
3474 priv->workqueue = NULL;
5b9f8cd3 3475 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
795cc0ad
HS
3476 out_free_irq:
3477 free_irq(priv->pci_dev->irq, priv);
6cd0b1cb
HS
3478 out_disable_msi:
3479 pci_disable_msi(priv->pci_dev);
6ba87956 3480 iwl_uninit_drv(priv);
073d3f5f
TW
3481 out_free_eeprom:
3482 iwl_eeprom_free(priv);
b481de9c
ZY
3483 out_iounmap:
3484 pci_iounmap(pdev, priv->hw_base);
3485 out_pci_release_regions:
316c30d9 3486 pci_set_drvdata(pdev, NULL);
623d563e 3487 pci_release_regions(pdev);
b481de9c
ZY
3488 out_pci_disable_device:
3489 pci_disable_device(pdev);
b481de9c
ZY
3490 out_ieee80211_free_hw:
3491 ieee80211_free_hw(priv->hw);
3492 out:
3493 return err;
3494}
3495
5b9f8cd3 3496static void __devexit iwl_pci_remove(struct pci_dev *pdev)
b481de9c 3497{
c79dd5b5 3498 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 3499 unsigned long flags;
b481de9c
ZY
3500
3501 if (!priv)
3502 return;
3503
e1623446 3504 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
b481de9c 3505
67249625 3506 iwl_dbgfs_unregister(priv);
5b9f8cd3 3507 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
67249625 3508
5b9f8cd3
EG
3509 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3510 * to be called and iwl_down since we are removing the device
0b124c31
GG
3511 * we need to set STATUS_EXIT_PENDING bit.
3512 */
3513 set_bit(STATUS_EXIT_PENDING, &priv->status);
c4f55232
RR
3514 if (priv->mac80211_registered) {
3515 ieee80211_unregister_hw(priv->hw);
3516 priv->mac80211_registered = 0;
0b124c31 3517 } else {
5b9f8cd3 3518 iwl_down(priv);
c4f55232
RR
3519 }
3520
0359facc
MA
3521 /* make sure we flush any pending irq or
3522 * tasklet for the driver
3523 */
3524 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3525 iwl_disable_interrupts(priv);
0359facc
MA
3526 spin_unlock_irqrestore(&priv->lock, flags);
3527
3528 iwl_synchronize_irq(priv);
3529
58d0f361 3530 iwl_rfkill_unregister(priv);
5b9f8cd3 3531 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY
3532
3533 if (priv->rxq.bd)
a55360e4 3534 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 3535 iwl_hw_txq_ctx_free(priv);
b481de9c 3536
37deb2a0 3537 iwl_clear_stations_table(priv);
073d3f5f 3538 iwl_eeprom_free(priv);
b481de9c 3539
b481de9c 3540
948c171c
MA
3541 /*netif_stop_queue(dev); */
3542 flush_workqueue(priv->workqueue);
3543
5b9f8cd3 3544 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
b481de9c
ZY
3545 * priv->workqueue... so we can't take down the workqueue
3546 * until now... */
3547 destroy_workqueue(priv->workqueue);
3548 priv->workqueue = NULL;
3549
6cd0b1cb
HS
3550 free_irq(priv->pci_dev->irq, priv);
3551 pci_disable_msi(priv->pci_dev);
b481de9c
ZY
3552 pci_iounmap(pdev, priv->hw_base);
3553 pci_release_regions(pdev);
3554 pci_disable_device(pdev);
3555 pci_set_drvdata(pdev, NULL);
3556
6ba87956 3557 iwl_uninit_drv(priv);
b481de9c
ZY
3558
3559 if (priv->ibss_beacon)
3560 dev_kfree_skb(priv->ibss_beacon);
3561
3562 ieee80211_free_hw(priv->hw);
3563}
3564
3565#ifdef CONFIG_PM
3566
5b9f8cd3 3567static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 3568{
c79dd5b5 3569 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 3570
e655b9f0
ZY
3571 if (priv->is_open) {
3572 set_bit(STATUS_IN_SUSPEND, &priv->status);
5b9f8cd3 3573 iwl_mac_stop(priv->hw);
e655b9f0
ZY
3574 priv->is_open = 1;
3575 }
b481de9c 3576
6cd0b1cb
HS
3577 pci_save_state(pdev);
3578 pci_disable_device(pdev);
b481de9c
ZY
3579 pci_set_power_state(pdev, PCI_D3hot);
3580
b481de9c
ZY
3581 return 0;
3582}
3583
5b9f8cd3 3584static int iwl_pci_resume(struct pci_dev *pdev)
b481de9c 3585{
c79dd5b5 3586 struct iwl_priv *priv = pci_get_drvdata(pdev);
450154e4 3587 int ret;
b481de9c 3588
b481de9c 3589 pci_set_power_state(pdev, PCI_D0);
450154e4
WT
3590 ret = pci_enable_device(pdev);
3591 if (ret)
3592 return ret;
6cd0b1cb
HS
3593 pci_restore_state(pdev);
3594 iwl_enable_interrupts(priv);
b481de9c 3595
e655b9f0 3596 if (priv->is_open)
5b9f8cd3 3597 iwl_mac_start(priv->hw);
b481de9c 3598
e655b9f0 3599 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
3600 return 0;
3601}
3602
3603#endif /* CONFIG_PM */
3604
3605/*****************************************************************************
3606 *
3607 * driver and module entry point
3608 *
3609 *****************************************************************************/
3610
fed9017e
RR
3611/* Hardware specific file defines the PCI IDs table for that hardware module */
3612static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 3613#ifdef CONFIG_IWL4965
fed9017e
RR
3614 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3615 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 3616#endif /* CONFIG_IWL4965 */
5a6a256e 3617#ifdef CONFIG_IWL5000
47408639
EK
3618 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3619 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3620 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3621 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3622 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3623 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 3624 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK
3625 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3626 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3627 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
e96a8495
TW
3628/* 5350 WiFi/WiMax */
3629 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3630 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3631 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
7100e924
TW
3632/* 5150 Wifi/WiMax */
3633 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3634 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
e1228374
JS
3635/* 6000/6050 Series */
3636 {IWL_PCI_DEVICE(0x0082, 0x1102, iwl6000_2ag_cfg)},
3637 {IWL_PCI_DEVICE(0x0085, 0x1112, iwl6000_2ag_cfg)},
3638 {IWL_PCI_DEVICE(0x0082, 0x1122, iwl6000_2ag_cfg)},
3639 {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
3640 {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
3641 {IWL_PCI_DEVICE(0x0082, PCI_ANY_ID, iwl6000_2agn_cfg)},
3642 {IWL_PCI_DEVICE(0x0085, PCI_ANY_ID, iwl6000_3agn_cfg)},
3643 {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
3644 {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
3645 {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
3646 {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
77dcb6a9
JS
3647/* 1000 Series WiFi */
3648 {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl1000_bgn_cfg)},
3649 {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl1000_bgn_cfg)},
5a6a256e 3650#endif /* CONFIG_IWL5000 */
7100e924 3651
fed9017e
RR
3652 {0}
3653};
3654MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3655
3656static struct pci_driver iwl_driver = {
b481de9c 3657 .name = DRV_NAME,
fed9017e 3658 .id_table = iwl_hw_card_ids,
5b9f8cd3
EG
3659 .probe = iwl_pci_probe,
3660 .remove = __devexit_p(iwl_pci_remove),
b481de9c 3661#ifdef CONFIG_PM
5b9f8cd3
EG
3662 .suspend = iwl_pci_suspend,
3663 .resume = iwl_pci_resume,
b481de9c
ZY
3664#endif
3665};
3666
5b9f8cd3 3667static int __init iwl_init(void)
b481de9c
ZY
3668{
3669
3670 int ret;
3671 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3672 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 3673
e227ceac 3674 ret = iwlagn_rate_control_register();
897e1cf2 3675 if (ret) {
a3139c59
SO
3676 printk(KERN_ERR DRV_NAME
3677 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC
3678 return ret;
3679 }
3680
fed9017e 3681 ret = pci_register_driver(&iwl_driver);
b481de9c 3682 if (ret) {
a3139c59 3683 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 3684 goto error_register;
b481de9c 3685 }
b481de9c
ZY
3686
3687 return ret;
897e1cf2 3688
897e1cf2 3689error_register:
e227ceac 3690 iwlagn_rate_control_unregister();
897e1cf2 3691 return ret;
b481de9c
ZY
3692}
3693
5b9f8cd3 3694static void __exit iwl_exit(void)
b481de9c 3695{
fed9017e 3696 pci_unregister_driver(&iwl_driver);
e227ceac 3697 iwlagn_rate_control_unregister();
b481de9c
ZY
3698}
3699
5b9f8cd3
EG
3700module_exit(iwl_exit);
3701module_init(iwl_init);