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ath9k: remove sc->cur_rate_table and sc->cur_rate_mode
[net-next-2.6.git] / drivers / net / wireless / ath / ath9k / htc_drv_init.c
CommitLineData
fb9987d0
S		 1/*
2 * Copyright (c) 2010 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include "htc.h"
18
19MODULE_AUTHOR("Atheros Communications");
20MODULE_LICENSE("Dual BSD/GPL");
21MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
22
23static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
24module_param_named(debug, ath9k_debug, uint, 0);
25MODULE_PARM_DESC(debug, "Debugging mask");
26
e1572c5e
S		 27int htc_modparam_nohwcrypt;
28module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
fb9987d0
S		 29MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
30
31#define CHAN2G(_freq, _idx) { \
32 .center_freq = (_freq), \
33 .hw_value = (_idx), \
34 .max_power = 20, \
35}
36
ea46e644
S		 37#define CHAN5G(_freq, _idx) { \
38 .band = IEEE80211_BAND_5GHZ, \
39 .center_freq = (_freq), \
40 .hw_value = (_idx), \
41 .max_power = 20, \
42}
43
21cb9879
VN		 44#define ATH_HTC_BTCOEX_PRODUCT_ID "wb193"
45
fb9987d0
S		 46static struct ieee80211_channel ath9k_2ghz_channels[] = {
47 CHAN2G(2412, 0), /* Channel 1 */
48 CHAN2G(2417, 1), /* Channel 2 */
49 CHAN2G(2422, 2), /* Channel 3 */
50 CHAN2G(2427, 3), /* Channel 4 */
51 CHAN2G(2432, 4), /* Channel 5 */
52 CHAN2G(2437, 5), /* Channel 6 */
53 CHAN2G(2442, 6), /* Channel 7 */
54 CHAN2G(2447, 7), /* Channel 8 */
55 CHAN2G(2452, 8), /* Channel 9 */
56 CHAN2G(2457, 9), /* Channel 10 */
57 CHAN2G(2462, 10), /* Channel 11 */
58 CHAN2G(2467, 11), /* Channel 12 */
59 CHAN2G(2472, 12), /* Channel 13 */
60 CHAN2G(2484, 13), /* Channel 14 */
61};
62
ea46e644
S		 63static struct ieee80211_channel ath9k_5ghz_channels[] = {
64 /* _We_ call this UNII 1 */
65 CHAN5G(5180, 14), /* Channel 36 */
66 CHAN5G(5200, 15), /* Channel 40 */
67 CHAN5G(5220, 16), /* Channel 44 */
68 CHAN5G(5240, 17), /* Channel 48 */
69 /* _We_ call this UNII 2 */
70 CHAN5G(5260, 18), /* Channel 52 */
71 CHAN5G(5280, 19), /* Channel 56 */
72 CHAN5G(5300, 20), /* Channel 60 */
73 CHAN5G(5320, 21), /* Channel 64 */
74 /* _We_ call this "Middle band" */
75 CHAN5G(5500, 22), /* Channel 100 */
76 CHAN5G(5520, 23), /* Channel 104 */
77 CHAN5G(5540, 24), /* Channel 108 */
78 CHAN5G(5560, 25), /* Channel 112 */
79 CHAN5G(5580, 26), /* Channel 116 */
80 CHAN5G(5600, 27), /* Channel 120 */
81 CHAN5G(5620, 28), /* Channel 124 */
82 CHAN5G(5640, 29), /* Channel 128 */
83 CHAN5G(5660, 30), /* Channel 132 */
84 CHAN5G(5680, 31), /* Channel 136 */
85 CHAN5G(5700, 32), /* Channel 140 */
86 /* _We_ call this UNII 3 */
87 CHAN5G(5745, 33), /* Channel 149 */
88 CHAN5G(5765, 34), /* Channel 153 */
89 CHAN5G(5785, 35), /* Channel 157 */
90 CHAN5G(5805, 36), /* Channel 161 */
91 CHAN5G(5825, 37), /* Channel 165 */
92};
93
fb9987d0
S		 94/* Atheros hardware rate code addition for short premble */
95#define SHPCHECK(__hw_rate, __flags) \
96 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
97
98#define RATE(_bitrate, _hw_rate, _flags) { \
99 .bitrate = (_bitrate), \
100 .flags = (_flags), \
101 .hw_value = (_hw_rate), \
102 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
103}
104
105static struct ieee80211_rate ath9k_legacy_rates[] = {
106 RATE(10, 0x1b, 0),
107 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
108 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
109 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
110 RATE(60, 0x0b, 0),
111 RATE(90, 0x0f, 0),
112 RATE(120, 0x0a, 0),
113 RATE(180, 0x0e, 0),
114 RATE(240, 0x09, 0),
115 RATE(360, 0x0d, 0),
116 RATE(480, 0x08, 0),
117 RATE(540, 0x0c, 0),
118};
119
120static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
121{
122 int time_left;
123
d8c49ffb
SM		 124 if (atomic_read(&priv->htc->tgt_ready) > 0) {
125 atomic_dec(&priv->htc->tgt_ready);
126 return 0;
127 }
128
fb9987d0
S		 129 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
130 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
131 if (!time_left) {
132 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
133 return -ETIMEDOUT;
134 }
135
d8c49ffb
SM		 136 atomic_dec(&priv->htc->tgt_ready);
137
fb9987d0
S		 138 return 0;
139}
140
141static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
142{
e1572c5e 143 ath9k_htc_exit_debug(priv->ah);
fb9987d0
S		 144 ath9k_hw_deinit(priv->ah);
145 tasklet_kill(&priv->wmi_tasklet);
146 tasklet_kill(&priv->rx_tasklet);
147 tasklet_kill(&priv->tx_tasklet);
148 kfree(priv->ah);
149 priv->ah = NULL;
150}
151
152static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
153{
154 struct ieee80211_hw *hw = priv->hw;
155
156 wiphy_rfkill_stop_polling(hw->wiphy);
157 ath9k_deinit_leds(priv);
158 ieee80211_unregister_hw(hw);
159 ath9k_rx_cleanup(priv);
160 ath9k_tx_cleanup(priv);
161 ath9k_deinit_priv(priv);
162}
163
164static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
165 u16 service_id,
166 void (*tx) (void *,
167 struct sk_buff *,
168 enum htc_endpoint_id,
169 bool txok),
170 enum htc_endpoint_id *ep_id)
171{
172 struct htc_service_connreq req;
173
174 memset(&req, 0, sizeof(struct htc_service_connreq));
175
176 req.service_id = service_id;
177 req.ep_callbacks.priv = priv;
178 req.ep_callbacks.rx = ath9k_htc_rxep;
179 req.ep_callbacks.tx = tx;
180
181 return htc_connect_service(priv->htc, &req, ep_id);
182}
183
6267dc70 184static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid)
fb9987d0
S		 185{
186 int ret;
187
188 /* WMI CMD*/
189 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
190 if (ret)
191 goto err;
192
193 /* Beacon */
9c6dda4e 194 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
fb9987d0
S		 195 &priv->beacon_ep);
196 if (ret)
197 goto err;
198
199 /* CAB */
200 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
201 &priv->cab_ep);
202 if (ret)
203 goto err;
204
205
206 /* UAPSD */
207 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
208 &priv->uapsd_ep);
209 if (ret)
210 goto err;
211
212 /* MGMT */
213 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
214 &priv->mgmt_ep);
215 if (ret)
216 goto err;
217
218 /* DATA BE */
219 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
220 &priv->data_be_ep);
221 if (ret)
222 goto err;
223
224 /* DATA BK */
225 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
226 &priv->data_bk_ep);
227 if (ret)
228 goto err;
229
230 /* DATA VI */
231 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
232 &priv->data_vi_ep);
233 if (ret)
234 goto err;
235
236 /* DATA VO */
237 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
238 &priv->data_vo_ep);
239 if (ret)
240 goto err;
241
6267dc70
S		 242 /*
243 * Setup required credits before initializing HTC.
244 * This is a bit hacky, but, since queuing is done in
245 * the HIF layer, shouldn't matter much.
246 */
247
248 switch(devid) {
6267dc70 249 case 0x7010:
ca6cff1f 250 case 0x7015:
4e63f768 251 case 0x9018:
6267dc70
S		 252 priv->htc->credits = 45;
253 break;
254 default:
4e63f768 255 priv->htc->credits = 33;
6267dc70
S		 256 }
257
fb9987d0
S		 258 ret = htc_init(priv->htc);
259 if (ret)
260 goto err;
261
6267dc70
S		 262 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
263 priv->htc->credits);
264
fb9987d0
S		 265 return 0;
266
267err:
268 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
269 return ret;
270}
271
272static int ath9k_reg_notifier(struct wiphy *wiphy,
273 struct regulatory_request *request)
274{
275 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
276 struct ath9k_htc_priv *priv = hw->priv;
277
278 return ath_reg_notifier_apply(wiphy, request,
279 ath9k_hw_regulatory(priv->ah));
280}
281
4a22fe10 282static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
fb9987d0
S		 283{
284 struct ath_hw *ah = (struct ath_hw *) hw_priv;
285 struct ath_common *common = ath9k_hw_common(ah);
286 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
287 __be32 val, reg = cpu_to_be32(reg_offset);
288 int r;
289
290 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
291 (u8 *) &reg, sizeof(reg),
292 (u8 *) &val, sizeof(val),
293 100);
294 if (unlikely(r)) {
295 ath_print(common, ATH_DBG_WMI,
296 "REGISTER READ FAILED: (0x%04x, %d)\n",
297 reg_offset, r);
298 return -EIO;
299 }
300
301 return be32_to_cpu(val);
302}
303
4a22fe10 304static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
fb9987d0
S		 305{
306 struct ath_hw *ah = (struct ath_hw *) hw_priv;
307 struct ath_common *common = ath9k_hw_common(ah);
308 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
309 __be32 buf[2] = {
310 cpu_to_be32(reg_offset),
311 cpu_to_be32(val),
312 };
313 int r;
314
315 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
316 (u8 *) &buf, sizeof(buf),
317 (u8 *) &val, sizeof(val),
318 100);
319 if (unlikely(r)) {
320 ath_print(common, ATH_DBG_WMI,
321 "REGISTER WRITE FAILED:(0x%04x, %d)\n",
322 reg_offset, r);
323 }
324}
325
4a22fe10
S		 326static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
327{
328 struct ath_hw *ah = (struct ath_hw *) hw_priv;
329 struct ath_common *common = ath9k_hw_common(ah);
330 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
331 u32 rsp_status;
332 int r;
333
334 mutex_lock(&priv->wmi->multi_write_mutex);
335
336 /* Store the register/value */
337 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
338 cpu_to_be32(reg_offset);
339 priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
340 cpu_to_be32(val);
341
342 priv->wmi->multi_write_idx++;
343
344 /* If the buffer is full, send it out. */
345 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
346 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
347 (u8 *) &priv->wmi->multi_write,
348 sizeof(struct register_write) * priv->wmi->multi_write_idx,
349 (u8 *) &rsp_status, sizeof(rsp_status),
350 100);
351 if (unlikely(r)) {
352 ath_print(common, ATH_DBG_WMI,
353 "REGISTER WRITE FAILED, multi len: %d\n",
354 priv->wmi->multi_write_idx);
355 }
356 priv->wmi->multi_write_idx = 0;
357 }
358
359 mutex_unlock(&priv->wmi->multi_write_mutex);
360}
361
362static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
363{
364 struct ath_hw *ah = (struct ath_hw *) hw_priv;
365 struct ath_common *common = ath9k_hw_common(ah);
366 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
367
368 if (atomic_read(&priv->wmi->mwrite_cnt))
369 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
370 else
371 ath9k_regwrite_single(hw_priv, val, reg_offset);
372}
373
374static void ath9k_enable_regwrite_buffer(void *hw_priv)
375{
376 struct ath_hw *ah = (struct ath_hw *) hw_priv;
377 struct ath_common *common = ath9k_hw_common(ah);
378 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
379
380 atomic_inc(&priv->wmi->mwrite_cnt);
381}
382
4a22fe10
S		 383static void ath9k_regwrite_flush(void *hw_priv)
384{
385 struct ath_hw *ah = (struct ath_hw *) hw_priv;
386 struct ath_common *common = ath9k_hw_common(ah);
387 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
388 u32 rsp_status;
389 int r;
390
435c1610
FF		 391 atomic_dec(&priv->wmi->mwrite_cnt);
392
4a22fe10
S		 393 mutex_lock(&priv->wmi->multi_write_mutex);
394
395 if (priv->wmi->multi_write_idx) {
396 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
397 (u8 *) &priv->wmi->multi_write,
398 sizeof(struct register_write) * priv->wmi->multi_write_idx,
399 (u8 *) &rsp_status, sizeof(rsp_status),
400 100);
401 if (unlikely(r)) {
402 ath_print(common, ATH_DBG_WMI,
403 "REGISTER WRITE FAILED, multi len: %d\n",
404 priv->wmi->multi_write_idx);
405 }
406 priv->wmi->multi_write_idx = 0;
407 }
408
409 mutex_unlock(&priv->wmi->multi_write_mutex);
410}
411
fb9987d0 412static const struct ath_ops ath9k_common_ops = {
4a22fe10
S		 413 .read = ath9k_regread,
414 .write = ath9k_regwrite,
415 .enable_write_buffer = ath9k_enable_regwrite_buffer,
4a22fe10 416 .write_flush = ath9k_regwrite_flush,
fb9987d0
S		 417};
418
419static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
420{
421 *csz = L1_CACHE_BYTES >> 2;
422}
423
424static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
425{
426 struct ath_hw *ah = (struct ath_hw *) common->ah;
427
428 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
429
430 if (!ath9k_hw_wait(ah,
431 AR_EEPROM_STATUS_DATA,
432 AR_EEPROM_STATUS_DATA_BUSY |
433 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
434 AH_WAIT_TIMEOUT))
435 return false;
436
437 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
438 AR_EEPROM_STATUS_DATA_VAL);
439
440 return true;
441}
442
443static const struct ath_bus_ops ath9k_usb_bus_ops = {
497ad9ad 444 .ath_bus_type = ATH_USB,
fb9987d0
S		 445 .read_cachesize = ath_usb_read_cachesize,
446 .eeprom_read = ath_usb_eeprom_read,
447};
448
449static void setup_ht_cap(struct ath9k_htc_priv *priv,
450 struct ieee80211_sta_ht_cap *ht_info)
451{
6debecad
S		 452 struct ath_common *common = ath9k_hw_common(priv->ah);
453 u8 tx_streams, rx_streams;
454 int i;
455
fb9987d0
S		 456 ht_info->ht_supported = true;
457 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
458 IEEE80211_HT_CAP_SM_PS |
459 IEEE80211_HT_CAP_SGI_40 |
460 IEEE80211_HT_CAP_DSSSCCK40;
461
b4dec5e8
S		 462 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
463 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
464
17525f96
S		 465 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
466
fb9987d0
S		 467 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
468 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
469
470 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
6debecad
S		 471
472 /* ath9k_htc supports only 1 or 2 stream devices */
473 tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2);
474 rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2);
475
476 ath_print(common, ATH_DBG_CONFIG,
477 "TX streams %d, RX streams: %d\n",
478 tx_streams, rx_streams);
479
480 if (tx_streams != rx_streams) {
481 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
482 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
483 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
484 }
485
486 for (i = 0; i < rx_streams; i++)
487 ht_info->mcs.rx_mask[i] = 0xff;
488
fb9987d0
S		 489 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
490}
491
492static int ath9k_init_queues(struct ath9k_htc_priv *priv)
493{
494 struct ath_common *common = ath9k_hw_common(priv->ah);
495 int i;
496
497 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
498 priv->hwq_map[i] = -1;
499
ca74b83b
S		 500 priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
501 if (priv->beaconq == -1) {
502 ath_print(common, ATH_DBG_FATAL,
503 "Unable to setup BEACON xmit queue\n");
504 goto err;
505 }
506
507 priv->cabq = ath9k_htc_cabq_setup(priv);
508 if (priv->cabq == -1) {
509 ath_print(common, ATH_DBG_FATAL,
510 "Unable to setup CAB xmit queue\n");
511 goto err;
512 }
513
e8c35a77 514 if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
fb9987d0
S		 515 ath_print(common, ATH_DBG_FATAL,
516 "Unable to setup xmit queue for BE traffic\n");
517 goto err;
518 }
519
e8c35a77 520 if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
fb9987d0
S		 521 ath_print(common, ATH_DBG_FATAL,
522 "Unable to setup xmit queue for BK traffic\n");
523 goto err;
524 }
e8c35a77 525 if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
fb9987d0
S		 526 ath_print(common, ATH_DBG_FATAL,
527 "Unable to setup xmit queue for VI traffic\n");
528 goto err;
529 }
e8c35a77 530 if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
fb9987d0
S		 531 ath_print(common, ATH_DBG_FATAL,
532 "Unable to setup xmit queue for VO traffic\n");
533 goto err;
534 }
535
536 return 0;
537
538err:
539 return -EINVAL;
540}
541
542static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
543{
544 struct ath_common *common = ath9k_hw_common(priv->ah);
545 int i = 0;
546
547 /* Get the hardware key cache size. */
548 common->keymax = priv->ah->caps.keycache_size;
549 if (common->keymax > ATH_KEYMAX) {
550 ath_print(common, ATH_DBG_ANY,
551 "Warning, using only %u entries in %u key cache\n",
552 ATH_KEYMAX, common->keymax);
553 common->keymax = ATH_KEYMAX;
554 }
555
e2b62624
RM		 556 if (priv->ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
557 common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
558
fb9987d0
S		 559 /*
560 * Reset the key cache since some parts do not
561 * reset the contents on initial power up.
562 */
563 for (i = 0; i < common->keymax; i++)
040e539e 564 ath_hw_keyreset(common, (u16) i);
fb9987d0
S		 565}
566
567static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
568{
569 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) {
570 priv->sbands[IEEE80211_BAND_2GHZ].channels =
571 ath9k_2ghz_channels;
572 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
573 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
574 ARRAY_SIZE(ath9k_2ghz_channels);
575 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
576 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
577 ARRAY_SIZE(ath9k_legacy_rates);
578 }
ea46e644
S		 579
580 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) {
581 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
582 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
583 priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
584 ARRAY_SIZE(ath9k_5ghz_channels);
585 priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
586 ath9k_legacy_rates + 4;
587 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
588 ARRAY_SIZE(ath9k_legacy_rates) - 4;
589 }
fb9987d0
S		 590}
591
592static void ath9k_init_misc(struct ath9k_htc_priv *priv)
593{
594 struct ath_common *common = ath9k_hw_common(priv->ah);
595
596 common->tx_chainmask = priv->ah->caps.tx_chainmask;
597 common->rx_chainmask = priv->ah->caps.rx_chainmask;
598
364734fa 599 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
fb9987d0 600
9f01a84e 601 priv->ah->opmode = NL80211_IFTYPE_STATION;
fb9987d0
S		 602}
603
21cb9879
VN		 604static void ath9k_init_btcoex(struct ath9k_htc_priv *priv)
605{
606 int qnum;
607
608 switch (priv->ah->btcoex_hw.scheme) {
609 case ATH_BTCOEX_CFG_NONE:
610 break;
611 case ATH_BTCOEX_CFG_3WIRE:
612 priv->ah->btcoex_hw.btactive_gpio = 7;
613 priv->ah->btcoex_hw.btpriority_gpio = 6;
614 priv->ah->btcoex_hw.wlanactive_gpio = 8;
615 priv->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
616 ath9k_hw_btcoex_init_3wire(priv->ah);
617 ath_htc_init_btcoex_work(priv);
618 qnum = priv->hwq_map[WME_AC_BE];
619 ath9k_hw_init_btcoex_hw(priv->ah, qnum);
620 break;
621 default:
622 WARN_ON(1);
623 break;
624 }
625}
626
627static int ath9k_init_priv(struct ath9k_htc_priv *priv,
628 u16 devid, char *product)
fb9987d0
S		 629{
630 struct ath_hw *ah = NULL;
631 struct ath_common *common;
632 int ret = 0, csz = 0;
633
634 priv->op_flags |= OP_INVALID;
635
636 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
637 if (!ah)
638 return -ENOMEM;
639
640 ah->hw_version.devid = devid;
641 ah->hw_version.subsysid = 0; /* FIXME */
642 priv->ah = ah;
643
644 common = ath9k_hw_common(ah);
645 common->ops = &ath9k_common_ops;
646 common->bus_ops = &ath9k_usb_bus_ops;
647 common->ah = ah;
648 common->hw = priv->hw;
649 common->priv = priv;
650 common->debug_mask = ath9k_debug;
651
652 spin_lock_init(&priv->wmi->wmi_lock);
653 spin_lock_init(&priv->beacon_lock);
7757dfed 654 spin_lock_init(&priv->tx_lock);
fb9987d0 655 mutex_init(&priv->mutex);
bde748a4 656 mutex_init(&priv->htc_pm_lock);
fb9987d0
S		 657 tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet,
658 (unsigned long)priv);
659 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
660 (unsigned long)priv);
661 tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv);
fb9987d0 662 INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work);
bde748a4 663 INIT_WORK(&priv->ps_work, ath9k_ps_work);
fb9987d0
S		 664
665 /*
666 * Cache line size is used to size and align various
667 * structures used to communicate with the hardware.
668 */
669 ath_read_cachesize(common, &csz);
670 common->cachelsz = csz << 2; /* convert to bytes */
671
672 ret = ath9k_hw_init(ah);
673 if (ret) {
674 ath_print(common, ATH_DBG_FATAL,
675 "Unable to initialize hardware; "
676 "initialization status: %d\n", ret);
677 goto err_hw;
678 }
679
e1572c5e 680 ret = ath9k_htc_init_debug(ah);
fb9987d0
S		 681 if (ret) {
682 ath_print(common, ATH_DBG_FATAL,
683 "Unable to create debugfs files\n");
684 goto err_debug;
685 }
686
687 ret = ath9k_init_queues(priv);
688 if (ret)
689 goto err_queues;
690
691 ath9k_init_crypto(priv);
692 ath9k_init_channels_rates(priv);
693 ath9k_init_misc(priv);
694
21cb9879
VN		 695 if (product && strncmp(product, ATH_HTC_BTCOEX_PRODUCT_ID, 5) == 0) {
696 ah->btcoex_hw.scheme = ATH_BTCOEX_CFG_3WIRE;
697 ath9k_init_btcoex(priv);
698 }
699
fb9987d0
S		 700 return 0;
701
702err_queues:
e1572c5e 703 ath9k_htc_exit_debug(ah);
fb9987d0
S		 704err_debug:
705 ath9k_hw_deinit(ah);
706err_hw:
707
708 kfree(ah);
709 priv->ah = NULL;
710
711 return ret;
712}
713
714static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
715 struct ieee80211_hw *hw)
716{
717 struct ath_common *common = ath9k_hw_common(priv->ah);
718
719 hw->flags = IEEE80211_HW_SIGNAL_DBM |
720 IEEE80211_HW_AMPDU_AGGREGATION |
721 IEEE80211_HW_SPECTRUM_MGMT |
32fbccaf 722 IEEE80211_HW_HAS_RATE_CONTROL |
bde748a4
VN		 723 IEEE80211_HW_RX_INCLUDES_FCS |
724 IEEE80211_HW_SUPPORTS_PS |
725 IEEE80211_HW_PS_NULLFUNC_STACK;
fb9987d0
S		 726
727 hw->wiphy->interface_modes =
728 BIT(NL80211_IFTYPE_STATION) |
729 BIT(NL80211_IFTYPE_ADHOC);
730
bde748a4
VN		 731 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
732
fb9987d0
S		 733 hw->queues = 4;
734 hw->channel_change_time = 5000;
735 hw->max_listen_interval = 10;
736 hw->vif_data_size = sizeof(struct ath9k_htc_vif);
737 hw->sta_data_size = sizeof(struct ath9k_htc_sta);
738
739 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
740 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
741 sizeof(struct htc_frame_hdr) + 4;
742
743 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
744 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
745 &priv->sbands[IEEE80211_BAND_2GHZ];
ea46e644
S		 746 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes))
747 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
748 &priv->sbands[IEEE80211_BAND_5GHZ];
fb9987d0
S		 749
750 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
751 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
752 setup_ht_cap(priv,
753 &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
ea46e644
S		 754 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes))
755 setup_ht_cap(priv,
756 &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
fb9987d0
S		 757 }
758
759 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
760}
761
21cb9879
VN		 762static int ath9k_init_device(struct ath9k_htc_priv *priv,
763 u16 devid, char *product)
fb9987d0
S		 764{
765 struct ieee80211_hw *hw = priv->hw;
766 struct ath_common *common;
767 struct ath_hw *ah;
768 int error = 0;
769 struct ath_regulatory *reg;
770
771 /* Bring up device */
21cb9879 772 error = ath9k_init_priv(priv, devid, product);
fb9987d0
S		 773 if (error != 0)
774 goto err_init;
775
776 ah = priv->ah;
777 common = ath9k_hw_common(ah);
778 ath9k_set_hw_capab(priv, hw);
779
780 /* Initialize regulatory */
781 error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
782 ath9k_reg_notifier);
783 if (error)
784 goto err_regd;
785
786 reg = &common->regulatory;
787
788 /* Setup TX */
789 error = ath9k_tx_init(priv);
790 if (error != 0)
791 goto err_tx;
792
793 /* Setup RX */
794 error = ath9k_rx_init(priv);
795 if (error != 0)
796 goto err_rx;
797
798 /* Register with mac80211 */
799 error = ieee80211_register_hw(hw);
800 if (error)
801 goto err_register;
802
803 /* Handle world regulatory */
804 if (!ath_is_world_regd(reg)) {
805 error = regulatory_hint(hw->wiphy, reg->alpha2);
806 if (error)
807 goto err_world;
808 }
809
810 ath9k_init_leds(priv);
811 ath9k_start_rfkill_poll(priv);
812
813 return 0;
814
815err_world:
816 ieee80211_unregister_hw(hw);
817err_register:
818 ath9k_rx_cleanup(priv);
819err_rx:
820 ath9k_tx_cleanup(priv);
821err_tx:
822 /* Nothing */
823err_regd:
824 ath9k_deinit_priv(priv);
825err_init:
826 return error;
827}
828
829int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
21cb9879 830 u16 devid, char *product)
fb9987d0
S		 831{
832 struct ieee80211_hw *hw;
833 struct ath9k_htc_priv *priv;
834 int ret;
835
836 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
837 if (!hw)
838 return -ENOMEM;
839
840 priv = hw->priv;
841 priv->hw = hw;
842 priv->htc = htc_handle;
843 priv->dev = dev;
844 htc_handle->drv_priv = priv;
845 SET_IEEE80211_DEV(hw, priv->dev);
846
847 ret = ath9k_htc_wait_for_target(priv);
848 if (ret)
849 goto err_free;
850
851 priv->wmi = ath9k_init_wmi(priv);
852 if (!priv->wmi) {
853 ret = -EINVAL;
854 goto err_free;
855 }
856
6267dc70 857 ret = ath9k_init_htc_services(priv, devid);
fb9987d0
S		 858 if (ret)
859 goto err_init;
860
a3be14b7
S		 861 /* The device may have been unplugged earlier. */
862 priv->op_flags &= ~OP_UNPLUGGED;
863
21cb9879 864 ret = ath9k_init_device(priv, devid, product);
fb9987d0
S		 865 if (ret)
866 goto err_init;
867
868 return 0;
869
870err_init:
871 ath9k_deinit_wmi(priv);
872err_free:
873 ieee80211_free_hw(hw);
874 return ret;
875}
876
877void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
878{
879 if (htc_handle->drv_priv) {
a3be14b7
S		 880
881 /* Check if the device has been yanked out. */
882 if (hotunplug)
883 htc_handle->drv_priv->op_flags |= OP_UNPLUGGED;
884
fb9987d0
S		 885 ath9k_deinit_device(htc_handle->drv_priv);
886 ath9k_deinit_wmi(htc_handle->drv_priv);
887 ieee80211_free_hw(htc_handle->drv_priv->hw);
888 }
889}
890
891#ifdef CONFIG_PM
892int ath9k_htc_resume(struct htc_target *htc_handle)
893{
894 int ret;
895
896 ret = ath9k_htc_wait_for_target(htc_handle->drv_priv);
897 if (ret)
898 return ret;
899
6267dc70
S		 900 ret = ath9k_init_htc_services(htc_handle->drv_priv,
901 htc_handle->drv_priv->ah->hw_version.devid);
fb9987d0
S		 902 return ret;
903}
904#endif
905
906static int __init ath9k_htc_init(void)
907{
908 int error;
909
e1572c5e 910 error = ath9k_htc_debug_create_root();
fb9987d0
S		 911 if (error < 0) {
912 printk(KERN_ERR
913 "ath9k_htc: Unable to create debugfs root: %d\n",
914 error);
915 goto err_dbg;
916 }
917
918 error = ath9k_hif_usb_init();
919 if (error < 0) {
920 printk(KERN_ERR
921 "ath9k_htc: No USB devices found,"
922 " driver not installed.\n");
923 error = -ENODEV;
924 goto err_usb;
925 }
926
927 return 0;
928
929err_usb:
e1572c5e 930 ath9k_htc_debug_remove_root();
fb9987d0
S		 931err_dbg:
932 return error;
933}
934module_init(ath9k_htc_init);
935
936static void __exit ath9k_htc_exit(void)
937{
938 ath9k_hif_usb_exit();
e1572c5e 939 ath9k_htc_debug_remove_root();
fb9987d0
S		 940 printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
941}
942module_exit(ath9k_htc_exit);
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