]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/net/vxge/vxge-main.h
vxge: Fixed MSIX interrupt configuration.
[net-next-2.6.git] / drivers / net / vxge / vxge-main.h
CommitLineData
703da5a1
RV
1/******************************************************************************
2 * This software may be used and distributed according to the terms of
3 * the GNU General Public License (GPL), incorporated herein by reference.
4 * Drivers based on or derived from this code fall under the GPL and must
5 * retain the authorship, copyright and license notice. This file is not
6 * a complete program and may only be used when the entire operating
7 * system is licensed under the GPL.
8 * See the file COPYING in this distribution for more information.
9 *
10 * vxge-main.h: Driver for Neterion Inc's X3100 Series 10GbE PCIe I/O
11 * Virtualized Server Adapter.
12 * Copyright(c) 2002-2009 Neterion Inc.
13 ******************************************************************************/
14#ifndef VXGE_MAIN_H
15#define VXGE_MAIN_H
16
17#include "vxge-traffic.h"
18#include "vxge-config.h"
19#include "vxge-version.h"
20#include <linux/list.h>
21
22#define VXGE_DRIVER_NAME "vxge"
23#define VXGE_DRIVER_VENDOR "Neterion, Inc"
22fa125e 24#define VXGE_DRIVER_FW_VERSION_MAJOR 1
703da5a1
RV
25
26#define DRV_VERSION VXGE_VERSION_MAJOR"."VXGE_VERSION_MINOR"."\
27 VXGE_VERSION_FIX"."VXGE_VERSION_BUILD"-"\
28 VXGE_VERSION_FOR
29
30#define PCI_DEVICE_ID_TITAN_WIN 0x5733
31#define PCI_DEVICE_ID_TITAN_UNI 0x5833
32#define VXGE_USE_DEFAULT 0xffffffff
33#define VXGE_HW_VPATH_MSIX_ACTIVE 4
b59c9457 34#define VXGE_ALARM_MSIX_ID 2
703da5a1
RV
35#define VXGE_HW_RXSYNC_FREQ_CNT 4
36#define VXGE_LL_WATCH_DOG_TIMEOUT (15 * HZ)
37#define VXGE_LL_RX_COPY_THRESHOLD 256
38#define VXGE_DEF_FIFO_LENGTH 84
39
40#define NO_STEERING 0
41#define PORT_STEERING 0x1
42#define RTH_STEERING 0x2
43#define RX_TOS_STEERING 0x3
44#define RX_VLAN_STEERING 0x4
45#define RTH_BUCKET_SIZE 4
46
47#define TX_PRIORITY_STEERING 1
48#define TX_VLAN_STEERING 2
49#define TX_PORT_STEERING 3
50#define TX_MULTIQ_STEERING 4
51
52#define VXGE_HW_MAC_ADDR_LEARN_DEFAULT VXGE_HW_RTS_MAC_DISABLE
53
54#define VXGE_TTI_BTIMER_VAL 250000
55
56#define VXGE_TTI_LTIMER_VAL 1000
57#define VXGE_TTI_RTIMER_VAL 0
58#define VXGE_RTI_BTIMER_VAL 250
59#define VXGE_RTI_LTIMER_VAL 100
60#define VXGE_RTI_RTIMER_VAL 0
61#define VXGE_FIFO_INDICATE_MAX_PKTS VXGE_DEF_FIFO_LENGTH
62#define VXGE_ISR_POLLING_CNT 8
63#define VXGE_MAX_CONFIG_DEV 0xFF
64#define VXGE_EXEC_MODE_DISABLE 0
65#define VXGE_EXEC_MODE_ENABLE 1
66#define VXGE_MAX_CONFIG_PORT 1
67#define VXGE_ALL_VID_DISABLE 0
68#define VXGE_ALL_VID_ENABLE 1
69#define VXGE_PAUSE_CTRL_DISABLE 0
70#define VXGE_PAUSE_CTRL_ENABLE 1
71
72#define TTI_TX_URANGE_A 5
73#define TTI_TX_URANGE_B 15
74#define TTI_TX_URANGE_C 40
75#define TTI_TX_UFC_A 5
76#define TTI_TX_UFC_B 40
77#define TTI_TX_UFC_C 60
78#define TTI_TX_UFC_D 100
79
80#define RTI_RX_URANGE_A 5
81#define RTI_RX_URANGE_B 15
82#define RTI_RX_URANGE_C 40
83#define RTI_RX_UFC_A 1
84#define RTI_RX_UFC_B 5
85#define RTI_RX_UFC_C 10
86#define RTI_RX_UFC_D 15
87
88/* Milli secs timer period */
89#define VXGE_TIMER_DELAY 10000
90
91#define VXGE_LL_MAX_FRAME_SIZE(dev) ((dev)->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE)
92
93enum vxge_reset_event {
94 /* reset events */
95 VXGE_LL_VPATH_RESET = 0,
96 VXGE_LL_DEVICE_RESET = 1,
97 VXGE_LL_FULL_RESET = 2,
98 VXGE_LL_START_RESET = 3,
99 VXGE_LL_COMPL_RESET = 4
100};
101/* These flags represent the devices temporary state */
102enum vxge_device_state_t {
103__VXGE_STATE_RESET_CARD = 0,
104__VXGE_STATE_CARD_UP
105};
106
107enum vxge_mac_addr_state {
108 /* mac address states */
109 VXGE_LL_MAC_ADDR_IN_LIST = 0,
110 VXGE_LL_MAC_ADDR_IN_DA_TABLE = 1
111};
112
113struct vxge_drv_config {
114 int config_dev_cnt;
115 int total_dev_cnt;
703da5a1
RV
116 int g_no_cpus;
117 unsigned int vpath_per_dev;
118};
119
120struct macInfo {
121 unsigned char macaddr[ETH_ALEN];
122 unsigned char macmask[ETH_ALEN];
123 unsigned int vpath_no;
124 enum vxge_mac_addr_state state;
125};
126
127struct vxge_config {
128 int tx_pause_enable;
129 int rx_pause_enable;
130
131#define NEW_NAPI_WEIGHT 64
132 int napi_weight;
133#define VXGE_GRO_DONOT_AGGREGATE 0
134#define VXGE_GRO_ALWAYS_AGGREGATE 1
135 int gro_enable;
136 int intr_type;
137#define INTA 0
138#define MSI 1
139#define MSI_X 2
140
141 int addr_learn_en;
142
143 int rth_steering;
144 int rth_algorithm;
145 int rth_hash_type_tcpipv4;
146 int rth_hash_type_ipv4;
147 int rth_hash_type_tcpipv6;
148 int rth_hash_type_ipv6;
149 int rth_hash_type_tcpipv6ex;
150 int rth_hash_type_ipv6ex;
151 int rth_bkt_sz;
152 int rth_jhash_golden_ratio;
153 int tx_steering_type;
154 int fifo_indicate_max_pkts;
155 struct vxge_hw_device_hw_info device_hw_info;
156};
157
158struct vxge_msix_entry {
159 /* Mimicing the msix_entry struct of Kernel. */
160 u16 vector;
161 u16 entry;
162 u16 in_use;
163 void *arg;
164};
165
166/* Software Statistics */
167
168struct vxge_sw_stats {
169 /* Network Stats (interface stats) */
170 struct net_device_stats net_stats;
171
172 /* Tx */
173 u64 tx_frms;
174 u64 tx_errors;
175 u64 tx_bytes;
176 u64 txd_not_free;
177 u64 txd_out_of_desc;
178
179 /* Virtual Path */
180 u64 vpaths_open;
181 u64 vpath_open_fail;
182
183 /* Rx */
184 u64 rx_frms;
185 u64 rx_errors;
186 u64 rx_bytes;
187 u64 rx_mcast;
188
189 /* Misc. */
190 u64 link_up;
191 u64 link_down;
192 u64 pci_map_fail;
193 u64 skb_alloc_fail;
194};
195
196struct vxge_mac_addrs {
197 struct list_head item;
198 u64 macaddr;
199 u64 macmask;
200 enum vxge_mac_addr_state state;
201};
202
203struct vxgedev;
204
205struct vxge_fifo_stats {
206 u64 tx_frms;
207 u64 tx_errors;
208 u64 tx_bytes;
209 u64 txd_not_free;
210 u64 txd_out_of_desc;
211 u64 pci_map_fail;
212};
213
214struct vxge_fifo {
215 struct net_device *ndev;
216 struct pci_dev *pdev;
217 struct __vxge_hw_fifo *handle;
218
219 /* The vpath id maintained in the driver -
220 * 0 to 'maximum_vpaths_in_function - 1'
221 */
222 int driver_id;
223 int tx_steering_type;
224 int indicate_max_pkts;
225 spinlock_t tx_lock;
226 /* flag used to maintain queue state when MULTIQ is not enabled */
227#define VPATH_QUEUE_START 0
228#define VPATH_QUEUE_STOP 1
229 int queue_state;
230
231 /* Tx stats */
232 struct vxge_fifo_stats stats;
233} ____cacheline_aligned;
234
235struct vxge_ring_stats {
236 u64 prev_rx_frms;
237 u64 rx_frms;
238 u64 rx_errors;
239 u64 rx_dropped;
240 u64 rx_bytes;
241 u64 rx_mcast;
242 u64 pci_map_fail;
243 u64 skb_alloc_fail;
244};
245
246struct vxge_ring {
247 struct net_device *ndev;
248 struct pci_dev *pdev;
249 struct __vxge_hw_ring *handle;
250 /* The vpath id maintained in the driver -
251 * 0 to 'maximum_vpaths_in_function - 1'
252 */
253 int driver_id;
254
255 /* copy of the flag indicating whether rx_csum is to be used */
256 u32 rx_csum;
257
258 int pkts_processed;
259 int budget;
260 int gro_enable;
261
262 struct napi_struct napi;
a5d165b5 263 struct napi_struct *napi_p;
703da5a1
RV
264
265#define VXGE_MAX_MAC_ADDR_COUNT 30
266
267 int vlan_tag_strip;
268 struct vlan_group *vlgrp;
269 int rx_vector_no;
270 enum vxge_hw_status last_status;
271
272 /* Rx stats */
273 struct vxge_ring_stats stats;
274} ____cacheline_aligned;
275
276struct vxge_vpath {
277
278 struct vxge_fifo fifo;
279 struct vxge_ring ring;
280
281 struct __vxge_hw_vpath_handle *handle;
282
283 /* Actual vpath id for this vpath in the device - 0 to 16 */
284 int device_id;
285 int max_mac_addr_cnt;
286 int is_configured;
287 int is_open;
288 struct vxgedev *vdev;
289 u8 (macaddr)[ETH_ALEN];
290 u8 (macmask)[ETH_ALEN];
291
292#define VXGE_MAX_LEARN_MAC_ADDR_CNT 2048
293 /* mac addresses currently programmed into NIC */
294 u16 mac_addr_cnt;
295 u16 mcast_addr_cnt;
296 struct list_head mac_addr_list;
297
298 u32 level_err;
299 u32 level_trace;
300};
301#define VXGE_COPY_DEBUG_INFO_TO_LL(vdev, err, trace) { \
302 for (i = 0; i < vdev->no_of_vpath; i++) { \
303 vdev->vpaths[i].level_err = err; \
304 vdev->vpaths[i].level_trace = trace; \
305 } \
306 vdev->level_err = err; \
307 vdev->level_trace = trace; \
308}
309
310struct vxgedev {
311 struct net_device *ndev;
312 struct pci_dev *pdev;
313 struct __vxge_hw_device *devh;
314 struct vlan_group *vlgrp;
315 int vlan_tag_strip;
316 struct vxge_config config;
317 unsigned long state;
318
319 /* Indicates which vpath to reset */
320 unsigned long vp_reset;
321
322 /* Timer used for polling vpath resets */
323 struct timer_list vp_reset_timer;
324
325 /* Timer used for polling vpath lockup */
326 struct timer_list vp_lockup_timer;
327
328 /*
329 * Flags to track whether device is in All Multicast
330 * or in promiscuous mode.
331 */
332 u16 all_multi_flg;
333
334 /* A flag indicating whether rx_csum is to be used or not. */
335 u32 rx_csum;
336
337 struct vxge_msix_entry *vxge_entries;
338 struct msix_entry *entries;
339 /*
340 * 4 for each vpath * 17;
341 * total is 68
342 */
343#define VXGE_MAX_REQUESTED_MSIX 68
344#define VXGE_INTR_STRLEN 80
345 char desc[VXGE_MAX_REQUESTED_MSIX][VXGE_INTR_STRLEN];
346
347 enum vxge_hw_event cric_err_event;
348
349 int max_vpath_supported;
350 int no_of_vpath;
351
352 struct napi_struct napi;
353 /* A debug option, when enabled and if error condition occurs,
354 * the driver will do following steps:
355 * - mask all interrupts
356 * - Not clear the source of the alarm
357 * - gracefully stop all I/O
358 * A diagnostic dump of register and stats at this point
359 * reveals very useful information.
360 */
361 int exec_mode;
362 int max_config_port;
363 struct vxge_vpath *vpaths;
364
365 struct __vxge_hw_vpath_handle *vp_handles[VXGE_HW_MAX_VIRTUAL_PATHS];
366 void __iomem *bar0;
703da5a1
RV
367 struct vxge_sw_stats stats;
368 int mtu;
369 /* Below variables are used for vpath selection to transmit a packet */
370 u8 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS];
371 u64 vpaths_deployed;
372
373 u32 intr_cnt;
374 u32 level_err;
375 u32 level_trace;
376 char fw_version[VXGE_HW_FW_STRLEN];
377};
378
379struct vxge_rx_priv {
380 struct sk_buff *skb;
ea11bbe0 381 unsigned char *skb_data;
703da5a1
RV
382 dma_addr_t data_dma;
383 dma_addr_t data_size;
384};
385
386struct vxge_tx_priv {
387 struct sk_buff *skb;
388 dma_addr_t dma_buffers[MAX_SKB_FRAGS+1];
389};
390
391#define VXGE_MODULE_PARAM_INT(p, val) \
392 static int p = val; \
393 module_param(p, int, 0)
394
395#define vxge_os_bug(fmt...) { printk(fmt); BUG(); }
396
397#define vxge_os_timer(timer, handle, arg, exp) do { \
398 init_timer(&timer); \
399 timer.function = handle; \
400 timer.data = (unsigned long) arg; \
401 mod_timer(&timer, (jiffies + exp)); \
402 } while (0);
403
404int __devinit vxge_device_register(struct __vxge_hw_device *devh,
405 struct vxge_config *config,
406 int high_dma, int no_of_vpath,
407 struct vxgedev **vdev);
408
409void vxge_device_unregister(struct __vxge_hw_device *devh);
410
411void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id);
412
413void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id);
414
415void vxge_callback_link_up(struct __vxge_hw_device *devh);
416
417void vxge_callback_link_down(struct __vxge_hw_device *devh);
418
419enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev,
420 struct macInfo *mac);
421
422int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac);
423
424int vxge_reset(struct vxgedev *vdev);
425
426enum vxge_hw_status
427vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
428 u8 t_code, void *userdata);
429
430enum vxge_hw_status
431vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
ff67df55
BL
432 enum vxge_hw_fifo_tcode t_code, void *userdata,
433 struct sk_buff ***skb_ptr, int nr_skbs, int *more);
703da5a1
RV
434
435int vxge_close(struct net_device *dev);
436
437int vxge_open(struct net_device *dev);
438
439void vxge_close_vpaths(struct vxgedev *vdev, int index);
440
441int vxge_open_vpaths(struct vxgedev *vdev);
442
443enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
444
445void vxge_stop_all_tx_queue(struct vxgedev *vdev);
446
447void vxge_stop_tx_queue(struct vxge_fifo *fifo);
448
449void vxge_start_all_tx_queue(struct vxgedev *vdev);
450
451void vxge_wake_tx_queue(struct vxge_fifo *fifo, struct sk_buff *skb);
452
453enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev,
454 struct macInfo *mac);
455
456enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev,
457 struct macInfo *mac);
458
459int vxge_mac_list_add(struct vxge_vpath *vpath,
460 struct macInfo *mac);
461
462void vxge_free_mac_add_list(struct vxge_vpath *vpath);
463
464enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath);
465
466enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath);
467
468int do_vxge_close(struct net_device *dev, int do_io);
469extern void initialize_ethtool_ops(struct net_device *ndev);
470/**
471 * #define VXGE_DEBUG_INIT: debug for initialization functions
472 * #define VXGE_DEBUG_TX : debug transmit related functions
473 * #define VXGE_DEBUG_RX : debug recevice related functions
474 * #define VXGE_DEBUG_MEM : debug memory module
475 * #define VXGE_DEBUG_LOCK: debug locks
476 * #define VXGE_DEBUG_SEM : debug semaphore
477 * #define VXGE_DEBUG_ENTRYEXIT: debug functions by adding entry exit statements
478*/
479#define VXGE_DEBUG_INIT 0x00000001
480#define VXGE_DEBUG_TX 0x00000002
481#define VXGE_DEBUG_RX 0x00000004
482#define VXGE_DEBUG_MEM 0x00000008
483#define VXGE_DEBUG_LOCK 0x00000010
484#define VXGE_DEBUG_SEM 0x00000020
485#define VXGE_DEBUG_ENTRYEXIT 0x00000040
486#define VXGE_DEBUG_INTR 0x00000080
487#define VXGE_DEBUG_LL_CONFIG 0x00000100
488
489/* Debug tracing for VXGE driver */
490#ifndef VXGE_DEBUG_MASK
491#define VXGE_DEBUG_MASK 0x0
492#endif
493
494#if (VXGE_DEBUG_LL_CONFIG & VXGE_DEBUG_MASK)
495#define vxge_debug_ll_config(level, fmt, ...) \
496 vxge_debug_ll(level, VXGE_DEBUG_LL_CONFIG, fmt, __VA_ARGS__)
497#else
498#define vxge_debug_ll_config(level, fmt, ...)
499#endif
500
501#if (VXGE_DEBUG_INIT & VXGE_DEBUG_MASK)
502#define vxge_debug_init(level, fmt, ...) \
503 vxge_debug_ll(level, VXGE_DEBUG_INIT, fmt, __VA_ARGS__)
504#else
505#define vxge_debug_init(level, fmt, ...)
506#endif
507
508#if (VXGE_DEBUG_TX & VXGE_DEBUG_MASK)
509#define vxge_debug_tx(level, fmt, ...) \
510 vxge_debug_ll(level, VXGE_DEBUG_TX, fmt, __VA_ARGS__)
511#else
512#define vxge_debug_tx(level, fmt, ...)
513#endif
514
515#if (VXGE_DEBUG_RX & VXGE_DEBUG_MASK)
516#define vxge_debug_rx(level, fmt, ...) \
517 vxge_debug_ll(level, VXGE_DEBUG_RX, fmt, __VA_ARGS__)
518#else
519#define vxge_debug_rx(level, fmt, ...)
520#endif
521
522#if (VXGE_DEBUG_MEM & VXGE_DEBUG_MASK)
523#define vxge_debug_mem(level, fmt, ...) \
524 vxge_debug_ll(level, VXGE_DEBUG_MEM, fmt, __VA_ARGS__)
525#else
526#define vxge_debug_mem(level, fmt, ...)
527#endif
528
529#if (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK)
530#define vxge_debug_entryexit(level, fmt, ...) \
531 vxge_debug_ll(level, VXGE_DEBUG_ENTRYEXIT, fmt, __VA_ARGS__)
532#else
533#define vxge_debug_entryexit(level, fmt, ...)
534#endif
535
536#if (VXGE_DEBUG_INTR & VXGE_DEBUG_MASK)
537#define vxge_debug_intr(level, fmt, ...) \
538 vxge_debug_ll(level, VXGE_DEBUG_INTR, fmt, __VA_ARGS__)
539#else
540#define vxge_debug_intr(level, fmt, ...)
541#endif
542
543#define VXGE_DEVICE_DEBUG_LEVEL_SET(level, mask, vdev) {\
544 vxge_hw_device_debug_set((struct __vxge_hw_device *)vdev->devh, \
545 level, mask);\
546 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, \
547 vxge_hw_device_error_level_get((struct __vxge_hw_device *) \
548 vdev->devh), \
549 vxge_hw_device_trace_level_get((struct __vxge_hw_device *) \
550 vdev->devh));\
551}
552
553#ifdef NETIF_F_GSO
554#define vxge_tcp_mss(skb) (skb_shinfo(skb)->gso_size)
555#define vxge_udp_mss(skb) (skb_shinfo(skb)->gso_size)
556#define vxge_offload_type(skb) (skb_shinfo(skb)->gso_type)
557#endif
558
559#endif