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net-next: vmxnet3 fixes [5/5] Respect the interrupt type in VM configuration
[net-next-2.6.git] / drivers / net / vmxnet3 / vmxnet3_drv.c
CommitLineData
d1a890fa
SB		 1/*
2 * Linux driver for VMware's vmxnet3 ethernet NIC.
3 *
4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
22 *
23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
24 *
25 */
26
b038b040
SR		 27#include <net/ip6_checksum.h>
28
d1a890fa
SB		 29#include "vmxnet3_int.h"
30
31char vmxnet3_driver_name[] = "vmxnet3";
32#define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
33
d1a890fa
SB		 34/*
35 * PCI Device ID Table
36 * Last entry must be all 0s
37 */
a3aa1884 38static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = {
d1a890fa
SB		 39 {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
40 {0}
41};
42
43MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
44
45static atomic_t devices_found;
46
47
48/*
49 * Enable/Disable the given intr
50 */
51static void
52vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
53{
54 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
55}
56
57
58static void
59vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
60{
61 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
62}
63
64
65/*
66 * Enable/Disable all intrs used by the device
67 */
68static void
69vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
70{
71 int i;
72
73 for (i = 0; i < adapter->intr.num_intrs; i++)
74 vmxnet3_enable_intr(adapter, i);
6929fe8a
RZ		 75 adapter->shared->devRead.intrConf.intrCtrl &=
76 cpu_to_le32(~VMXNET3_IC_DISABLE_ALL);
d1a890fa
SB		 77}
78
79
80static void
81vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
82{
83 int i;
84
6929fe8a
RZ		 85 adapter->shared->devRead.intrConf.intrCtrl |=
86 cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
d1a890fa
SB		 87 for (i = 0; i < adapter->intr.num_intrs; i++)
88 vmxnet3_disable_intr(adapter, i);
89}
90
91
92static void
93vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
94{
95 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
96}
97
98
99static bool
100vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
101{
102 return netif_queue_stopped(adapter->netdev);
103}
104
105
106static void
107vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
108{
109 tq->stopped = false;
110 netif_start_queue(adapter->netdev);
111}
112
113
114static void
115vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
116{
117 tq->stopped = false;
118 netif_wake_queue(adapter->netdev);
119}
120
121
122static void
123vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
124{
125 tq->stopped = true;
126 tq->num_stop++;
127 netif_stop_queue(adapter->netdev);
128}
129
130
131/*
132 * Check the link state. This may start or stop the tx queue.
133 */
134static void
4a1745fc 135vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
d1a890fa
SB		 136{
137 u32 ret;
138
139 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
140 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
141 adapter->link_speed = ret >> 16;
142 if (ret & 1) { /* Link is up. */
143 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n",
144 adapter->netdev->name, adapter->link_speed);
145 if (!netif_carrier_ok(adapter->netdev))
146 netif_carrier_on(adapter->netdev);
147
4a1745fc
SB		 148 if (affectTxQueue)
149 vmxnet3_tq_start(&adapter->tx_queue, adapter);
d1a890fa
SB		 150 } else {
151 printk(KERN_INFO "%s: NIC Link is Down\n",
152 adapter->netdev->name);
153 if (netif_carrier_ok(adapter->netdev))
154 netif_carrier_off(adapter->netdev);
155
4a1745fc
SB		 156 if (affectTxQueue)
157 vmxnet3_tq_stop(&adapter->tx_queue, adapter);
d1a890fa
SB		 158 }
159}
160
d1a890fa
SB		 161static void
162vmxnet3_process_events(struct vmxnet3_adapter *adapter)
163{
115924b6 164 u32 events = le32_to_cpu(adapter->shared->ecr);
d1a890fa
SB		 165 if (!events)
166 return;
167
168 vmxnet3_ack_events(adapter, events);
169
170 /* Check if link state has changed */
171 if (events & VMXNET3_ECR_LINK)
4a1745fc 172 vmxnet3_check_link(adapter, true);
d1a890fa
SB		 173
174 /* Check if there is an error on xmit/recv queues */
175 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
176 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
177 VMXNET3_CMD_GET_QUEUE_STATUS);
178
179 if (adapter->tqd_start->status.stopped) {
180 printk(KERN_ERR "%s: tq error 0x%x\n",
181 adapter->netdev->name,
115924b6 182 le32_to_cpu(adapter->tqd_start->status.error));
d1a890fa
SB		 183 }
184 if (adapter->rqd_start->status.stopped) {
185 printk(KERN_ERR "%s: rq error 0x%x\n",
186 adapter->netdev->name,
187 adapter->rqd_start->status.error);
188 }
189
190 schedule_work(&adapter->work);
191 }
192}
193
115924b6
SB		 194#ifdef __BIG_ENDIAN_BITFIELD
195/*
196 * The device expects the bitfields in shared structures to be written in
197 * little endian. When CPU is big endian, the following routines are used to
198 * correctly read and write into ABI.
199 * The general technique used here is : double word bitfields are defined in
200 * opposite order for big endian architecture. Then before reading them in
201 * driver the complete double word is translated using le32_to_cpu. Similarly
202 * After the driver writes into bitfields, cpu_to_le32 is used to translate the
203 * double words into required format.
204 * In order to avoid touching bits in shared structure more than once, temporary
205 * descriptors are used. These are passed as srcDesc to following functions.
206 */
207static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc,
208 struct Vmxnet3_RxDesc *dstDesc)
209{
210 u32 *src = (u32 *)srcDesc + 2;
211 u32 *dst = (u32 *)dstDesc + 2;
212 dstDesc->addr = le64_to_cpu(srcDesc->addr);
213 *dst = le32_to_cpu(*src);
214 dstDesc->ext1 = le32_to_cpu(srcDesc->ext1);
215}
216
217static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc,
218 struct Vmxnet3_TxDesc *dstDesc)
219{
220 int i;
221 u32 *src = (u32 *)(srcDesc + 1);
222 u32 *dst = (u32 *)(dstDesc + 1);
223
224 /* Working backwards so that the gen bit is set at the end. */
225 for (i = 2; i > 0; i--) {
226 src--;
227 dst--;
228 *dst = cpu_to_le32(*src);
229 }
230}
231
232
233static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc,
234 struct Vmxnet3_RxCompDesc *dstDesc)
235{
236 int i = 0;
237 u32 *src = (u32 *)srcDesc;
238 u32 *dst = (u32 *)dstDesc;
239 for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) {
240 *dst = le32_to_cpu(*src);
241 src++;
242 dst++;
243 }
244}
245
246
247/* Used to read bitfield values from double words. */
248static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size)
249{
250 u32 temp = le32_to_cpu(*bitfield);
251 u32 mask = ((1 << size) - 1) << pos;
252 temp &= mask;
253 temp >>= pos;
254 return temp;
255}
256
257
258
259#endif /* __BIG_ENDIAN_BITFIELD */
260
261#ifdef __BIG_ENDIAN_BITFIELD
262
263# define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
264 txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
265 VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
266# define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
267 txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
268 VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
269# define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
270 VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
271 VMXNET3_TCD_GEN_SIZE)
272# define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
273 VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
274# define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
275 (dstrcd) = (tmp); \
276 vmxnet3_RxCompToCPU((rcd), (tmp)); \
277 } while (0)
278# define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
279 (dstrxd) = (tmp); \
280 vmxnet3_RxDescToCPU((rxd), (tmp)); \
281 } while (0)
282
283#else
284
285# define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
286# define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
287# define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
288# define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
289# define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
290# define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
291
292#endif /* __BIG_ENDIAN_BITFIELD */
293
d1a890fa
SB		 294
295static void
296vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
297 struct pci_dev *pdev)
298{
299 if (tbi->map_type == VMXNET3_MAP_SINGLE)
300 pci_unmap_single(pdev, tbi->dma_addr, tbi->len,
301 PCI_DMA_TODEVICE);
302 else if (tbi->map_type == VMXNET3_MAP_PAGE)
303 pci_unmap_page(pdev, tbi->dma_addr, tbi->len,
304 PCI_DMA_TODEVICE);
305 else
306 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
307
308 tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
309}
310
311
312static int
313vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
314 struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
315{
316 struct sk_buff *skb;
317 int entries = 0;
318
319 /* no out of order completion */
320 BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
115924b6 321 BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1);
d1a890fa
SB		 322
323 skb = tq->buf_info[eop_idx].skb;
324 BUG_ON(skb == NULL);
325 tq->buf_info[eop_idx].skb = NULL;
326
327 VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
328
329 while (tq->tx_ring.next2comp != eop_idx) {
330 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
331 pdev);
332
333 /* update next2comp w/o tx_lock. Since we are marking more,
334 * instead of less, tx ring entries avail, the worst case is
335 * that the tx routine incorrectly re-queues a pkt due to
336 * insufficient tx ring entries.
337 */
338 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
339 entries++;
340 }
341
342 dev_kfree_skb_any(skb);
343 return entries;
344}
345
346
347static int
348vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
349 struct vmxnet3_adapter *adapter)
350{
351 int completed = 0;
352 union Vmxnet3_GenericDesc *gdesc;
353
354 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
115924b6
SB		 355 while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) {
356 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
357 &gdesc->tcd), tq, adapter->pdev,
358 adapter);
d1a890fa
SB		 359
360 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
361 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
362 }
363
364 if (completed) {
365 spin_lock(&tq->tx_lock);
366 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
367 vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
368 VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
369 netif_carrier_ok(adapter->netdev))) {
370 vmxnet3_tq_wake(tq, adapter);
371 }
372 spin_unlock(&tq->tx_lock);
373 }
374 return completed;
375}
376
377
378static void
379vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
380 struct vmxnet3_adapter *adapter)
381{
382 int i;
383
384 while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
385 struct vmxnet3_tx_buf_info *tbi;
386 union Vmxnet3_GenericDesc *gdesc;
387
388 tbi = tq->buf_info + tq->tx_ring.next2comp;
389 gdesc = tq->tx_ring.base + tq->tx_ring.next2comp;
390
391 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
392 if (tbi->skb) {
393 dev_kfree_skb_any(tbi->skb);
394 tbi->skb = NULL;
395 }
396 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
397 }
398
399 /* sanity check, verify all buffers are indeed unmapped and freed */
400 for (i = 0; i < tq->tx_ring.size; i++) {
401 BUG_ON(tq->buf_info[i].skb != NULL ||
402 tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
403 }
404
405 tq->tx_ring.gen = VMXNET3_INIT_GEN;
406 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
407
408 tq->comp_ring.gen = VMXNET3_INIT_GEN;
409 tq->comp_ring.next2proc = 0;
410}
411
412
413void
414vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
415 struct vmxnet3_adapter *adapter)
416{
417 if (tq->tx_ring.base) {
418 pci_free_consistent(adapter->pdev, tq->tx_ring.size *
419 sizeof(struct Vmxnet3_TxDesc),
420 tq->tx_ring.base, tq->tx_ring.basePA);
421 tq->tx_ring.base = NULL;
422 }
423 if (tq->data_ring.base) {
424 pci_free_consistent(adapter->pdev, tq->data_ring.size *
425 sizeof(struct Vmxnet3_TxDataDesc),
426 tq->data_ring.base, tq->data_ring.basePA);
427 tq->data_ring.base = NULL;
428 }
429 if (tq->comp_ring.base) {
430 pci_free_consistent(adapter->pdev, tq->comp_ring.size *
431 sizeof(struct Vmxnet3_TxCompDesc),
432 tq->comp_ring.base, tq->comp_ring.basePA);
433 tq->comp_ring.base = NULL;
434 }
435 kfree(tq->buf_info);
436 tq->buf_info = NULL;
437}
438
439
440static void
441vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
442 struct vmxnet3_adapter *adapter)
443{
444 int i;
445
446 /* reset the tx ring contents to 0 and reset the tx ring states */
447 memset(tq->tx_ring.base, 0, tq->tx_ring.size *
448 sizeof(struct Vmxnet3_TxDesc));
449 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
450 tq->tx_ring.gen = VMXNET3_INIT_GEN;
451
452 memset(tq->data_ring.base, 0, tq->data_ring.size *
453 sizeof(struct Vmxnet3_TxDataDesc));
454
455 /* reset the tx comp ring contents to 0 and reset comp ring states */
456 memset(tq->comp_ring.base, 0, tq->comp_ring.size *
457 sizeof(struct Vmxnet3_TxCompDesc));
458 tq->comp_ring.next2proc = 0;
459 tq->comp_ring.gen = VMXNET3_INIT_GEN;
460
461 /* reset the bookkeeping data */
462 memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
463 for (i = 0; i < tq->tx_ring.size; i++)
464 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
465
466 /* stats are not reset */
467}
468
469
470static int
471vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
472 struct vmxnet3_adapter *adapter)
473{
474 BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
475 tq->comp_ring.base || tq->buf_info);
476
477 tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size
478 * sizeof(struct Vmxnet3_TxDesc),
479 &tq->tx_ring.basePA);
480 if (!tq->tx_ring.base) {
481 printk(KERN_ERR "%s: failed to allocate tx ring\n",
482 adapter->netdev->name);
483 goto err;
484 }
485
486 tq->data_ring.base = pci_alloc_consistent(adapter->pdev,
487 tq->data_ring.size *
488 sizeof(struct Vmxnet3_TxDataDesc),
489 &tq->data_ring.basePA);
490 if (!tq->data_ring.base) {
491 printk(KERN_ERR "%s: failed to allocate data ring\n",
492 adapter->netdev->name);
493 goto err;
494 }
495
496 tq->comp_ring.base = pci_alloc_consistent(adapter->pdev,
497 tq->comp_ring.size *
498 sizeof(struct Vmxnet3_TxCompDesc),
499 &tq->comp_ring.basePA);
500 if (!tq->comp_ring.base) {
501 printk(KERN_ERR "%s: failed to allocate tx comp ring\n",
502 adapter->netdev->name);
503 goto err;
504 }
505
506 tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]),
507 GFP_KERNEL);
508 if (!tq->buf_info) {
509 printk(KERN_ERR "%s: failed to allocate tx bufinfo\n",
510 adapter->netdev->name);
511 goto err;
512 }
513
514 return 0;
515
516err:
517 vmxnet3_tq_destroy(tq, adapter);
518 return -ENOMEM;
519}
520
521
522/*
523 * starting from ring->next2fill, allocate rx buffers for the given ring
524 * of the rx queue and update the rx desc. stop after @num_to_alloc buffers
525 * are allocated or allocation fails
526 */
527
528static int
529vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
530 int num_to_alloc, struct vmxnet3_adapter *adapter)
531{
532 int num_allocated = 0;
533 struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
534 struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
535 u32 val;
536
537 while (num_allocated < num_to_alloc) {
538 struct vmxnet3_rx_buf_info *rbi;
539 union Vmxnet3_GenericDesc *gd;
540
541 rbi = rbi_base + ring->next2fill;
542 gd = ring->base + ring->next2fill;
543
544 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
545 if (rbi->skb == NULL) {
546 rbi->skb = dev_alloc_skb(rbi->len +
547 NET_IP_ALIGN);
548 if (unlikely(rbi->skb == NULL)) {
549 rq->stats.rx_buf_alloc_failure++;
550 break;
551 }
552 rbi->skb->dev = adapter->netdev;
553
554 skb_reserve(rbi->skb, NET_IP_ALIGN);
555 rbi->dma_addr = pci_map_single(adapter->pdev,
556 rbi->skb->data, rbi->len,
557 PCI_DMA_FROMDEVICE);
558 } else {
559 /* rx buffer skipped by the device */
560 }
561 val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
562 } else {
563 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
564 rbi->len != PAGE_SIZE);
565
566 if (rbi->page == NULL) {
567 rbi->page = alloc_page(GFP_ATOMIC);
568 if (unlikely(rbi->page == NULL)) {
569 rq->stats.rx_buf_alloc_failure++;
570 break;
571 }
572 rbi->dma_addr = pci_map_page(adapter->pdev,
573 rbi->page, 0, PAGE_SIZE,
574 PCI_DMA_FROMDEVICE);
575 } else {
576 /* rx buffers skipped by the device */
577 }
578 val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
579 }
580
581 BUG_ON(rbi->dma_addr == 0);
115924b6
SB		 582 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
583 gd->dword[2] = cpu_to_le32((ring->gen << VMXNET3_RXD_GEN_SHIFT)
584 | val | rbi->len);
d1a890fa
SB		 585
586 num_allocated++;
587 vmxnet3_cmd_ring_adv_next2fill(ring);
588 }
589 rq->uncommitted[ring_idx] += num_allocated;
590
f6965582
RD		 591 dev_dbg(&adapter->netdev->dev,
592 "alloc_rx_buf: %d allocated, next2fill %u, next2comp "
d1a890fa
SB		 593 "%u, uncommited %u\n", num_allocated, ring->next2fill,
594 ring->next2comp, rq->uncommitted[ring_idx]);
595
596 /* so that the device can distinguish a full ring and an empty ring */
597 BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
598
599 return num_allocated;
600}
601
602
603static void
604vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
605 struct vmxnet3_rx_buf_info *rbi)
606{
607 struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
608 skb_shinfo(skb)->nr_frags;
609
610 BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
611
612 frag->page = rbi->page;
613 frag->page_offset = 0;
614 frag->size = rcd->len;
615 skb->data_len += frag->size;
616 skb_shinfo(skb)->nr_frags++;
617}
618
619
620static void
621vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
622 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
623 struct vmxnet3_adapter *adapter)
624{
625 u32 dw2, len;
626 unsigned long buf_offset;
627 int i;
628 union Vmxnet3_GenericDesc *gdesc;
629 struct vmxnet3_tx_buf_info *tbi = NULL;
630
631 BUG_ON(ctx->copy_size > skb_headlen(skb));
632
633 /* use the previous gen bit for the SOP desc */
634 dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
635
636 ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
637 gdesc = ctx->sop_txd; /* both loops below can be skipped */
638
639 /* no need to map the buffer if headers are copied */
640 if (ctx->copy_size) {
115924b6 641 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA +
d1a890fa 642 tq->tx_ring.next2fill *
115924b6
SB		 643 sizeof(struct Vmxnet3_TxDataDesc));
644 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size);
d1a890fa
SB		 645 ctx->sop_txd->dword[3] = 0;
646
647 tbi = tq->buf_info + tq->tx_ring.next2fill;
648 tbi->map_type = VMXNET3_MAP_NONE;
649
f6965582
RD		 650 dev_dbg(&adapter->netdev->dev,
651 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
115924b6
SB		 652 tq->tx_ring.next2fill,
653 le64_to_cpu(ctx->sop_txd->txd.addr),
d1a890fa
SB		 654 ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
655 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
656
657 /* use the right gen for non-SOP desc */
658 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
659 }
660
661 /* linear part can use multiple tx desc if it's big */
662 len = skb_headlen(skb) - ctx->copy_size;
663 buf_offset = ctx->copy_size;
664 while (len) {
665 u32 buf_size;
666
667 buf_size = len > VMXNET3_MAX_TX_BUF_SIZE ?
668 VMXNET3_MAX_TX_BUF_SIZE : len;
669
670 tbi = tq->buf_info + tq->tx_ring.next2fill;
671 tbi->map_type = VMXNET3_MAP_SINGLE;
672 tbi->dma_addr = pci_map_single(adapter->pdev,
673 skb->data + buf_offset, buf_size,
674 PCI_DMA_TODEVICE);
675
676 tbi->len = buf_size; /* this automatically convert 2^14 to 0 */
677
678 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
679 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
680
115924b6
SB		 681 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
682 gdesc->dword[2] = cpu_to_le32(dw2 | buf_size);
d1a890fa
SB		 683 gdesc->dword[3] = 0;
684
f6965582
RD		 685 dev_dbg(&adapter->netdev->dev,
686 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
115924b6
SB		 687 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
688 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
d1a890fa
SB		 689 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
690 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
691
692 len -= buf_size;
693 buf_offset += buf_size;
694 }
695
696 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
697 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
698
699 tbi = tq->buf_info + tq->tx_ring.next2fill;
700 tbi->map_type = VMXNET3_MAP_PAGE;
701 tbi->dma_addr = pci_map_page(adapter->pdev, frag->page,
702 frag->page_offset, frag->size,
703 PCI_DMA_TODEVICE);
704
705 tbi->len = frag->size;
706
707 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
708 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
709
115924b6
SB		 710 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
711 gdesc->dword[2] = cpu_to_le32(dw2 | frag->size);
d1a890fa
SB		 712 gdesc->dword[3] = 0;
713
f6965582
RD		 714 dev_dbg(&adapter->netdev->dev,
715 "txd[%u]: 0x%llu %u %u\n",
115924b6
SB		 716 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
717 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
d1a890fa
SB		 718 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
719 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
720 }
721
722 ctx->eop_txd = gdesc;
723
724 /* set the last buf_info for the pkt */
725 tbi->skb = skb;
726 tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
727}
728
729
730/*
731 * parse and copy relevant protocol headers:
732 * For a tso pkt, relevant headers are L2/3/4 including options
733 * For a pkt requesting csum offloading, they are L2/3 and may include L4
734 * if it's a TCP/UDP pkt
735 *
736 * Returns:
737 * -1: error happens during parsing
738 * 0: protocol headers parsed, but too big to be copied
739 * 1: protocol headers parsed and copied
740 *
741 * Other effects:
742 * 1. related *ctx fields are updated.
743 * 2. ctx->copy_size is # of bytes copied
744 * 3. the portion copied is guaranteed to be in the linear part
745 *
746 */
747static int
748vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
749 struct vmxnet3_tx_ctx *ctx,
750 struct vmxnet3_adapter *adapter)
751{
752 struct Vmxnet3_TxDataDesc *tdd;
753
754 if (ctx->mss) {
755 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
756 ctx->l4_hdr_size = ((struct tcphdr *)
757 skb_transport_header(skb))->doff * 4;
758 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
759 } else {
760 unsigned int pull_size;
761
762 if (skb->ip_summed == CHECKSUM_PARTIAL) {
763 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
764
765 if (ctx->ipv4) {
766 struct iphdr *iph = (struct iphdr *)
767 skb_network_header(skb);
768 if (iph->protocol == IPPROTO_TCP) {
769 pull_size = ctx->eth_ip_hdr_size +
770 sizeof(struct tcphdr);
771
772 if (unlikely(!pskb_may_pull(skb,
773 pull_size))) {
774 goto err;
775 }
776 ctx->l4_hdr_size = ((struct tcphdr *)
777 skb_transport_header(skb))->doff * 4;
778 } else if (iph->protocol == IPPROTO_UDP) {
779 ctx->l4_hdr_size =
780 sizeof(struct udphdr);
781 } else {
782 ctx->l4_hdr_size = 0;
783 }
784 } else {
785 /* for simplicity, don't copy L4 headers */
786 ctx->l4_hdr_size = 0;
787 }
788 ctx->copy_size = ctx->eth_ip_hdr_size +
789 ctx->l4_hdr_size;
790 } else {
791 ctx->eth_ip_hdr_size = 0;
792 ctx->l4_hdr_size = 0;
793 /* copy as much as allowed */
794 ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE
795 , skb_headlen(skb));
796 }
797
798 /* make sure headers are accessible directly */
799 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
800 goto err;
801 }
802
803 if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) {
804 tq->stats.oversized_hdr++;
805 ctx->copy_size = 0;
806 return 0;
807 }
808
809 tdd = tq->data_ring.base + tq->tx_ring.next2fill;
810
811 memcpy(tdd->data, skb->data, ctx->copy_size);
f6965582
RD		 812 dev_dbg(&adapter->netdev->dev,
813 "copy %u bytes to dataRing[%u]\n",
d1a890fa
SB		 814 ctx->copy_size, tq->tx_ring.next2fill);
815 return 1;
816
817err:
818 return -1;
819}
820
821
822static void
823vmxnet3_prepare_tso(struct sk_buff *skb,
824 struct vmxnet3_tx_ctx *ctx)
825{
826 struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb);
827 if (ctx->ipv4) {
828 struct iphdr *iph = (struct iphdr *)skb_network_header(skb);
829 iph->check = 0;
830 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
831 IPPROTO_TCP, 0);
832 } else {
833 struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb);
834 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
835 IPPROTO_TCP, 0);
836 }
837}
838
839
840/*
841 * Transmits a pkt thru a given tq
842 * Returns:
843 * NETDEV_TX_OK: descriptors are setup successfully
844 * NETDEV_TX_OK: error occured, the pkt is dropped
845 * NETDEV_TX_BUSY: tx ring is full, queue is stopped
846 *
847 * Side-effects:
848 * 1. tx ring may be changed
849 * 2. tq stats may be updated accordingly
850 * 3. shared->txNumDeferred may be updated
851 */
852
853static int
854vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
855 struct vmxnet3_adapter *adapter, struct net_device *netdev)
856{
857 int ret;
858 u32 count;
859 unsigned long flags;
860 struct vmxnet3_tx_ctx ctx;
861 union Vmxnet3_GenericDesc *gdesc;
115924b6
SB		 862#ifdef __BIG_ENDIAN_BITFIELD
863 /* Use temporary descriptor to avoid touching bits multiple times */
864 union Vmxnet3_GenericDesc tempTxDesc;
865#endif
d1a890fa
SB		 866
867 /* conservatively estimate # of descriptors to use */
868 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) +
869 skb_shinfo(skb)->nr_frags + 1;
870
871 ctx.ipv4 = (skb->protocol == __constant_ntohs(ETH_P_IP));
872
873 ctx.mss = skb_shinfo(skb)->gso_size;
874 if (ctx.mss) {
875 if (skb_header_cloned(skb)) {
876 if (unlikely(pskb_expand_head(skb, 0, 0,
877 GFP_ATOMIC) != 0)) {
878 tq->stats.drop_tso++;
879 goto drop_pkt;
880 }
881 tq->stats.copy_skb_header++;
882 }
883 vmxnet3_prepare_tso(skb, &ctx);
884 } else {
885 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
886
887 /* non-tso pkts must not use more than
888 * VMXNET3_MAX_TXD_PER_PKT entries
889 */
890 if (skb_linearize(skb) != 0) {
891 tq->stats.drop_too_many_frags++;
892 goto drop_pkt;
893 }
894 tq->stats.linearized++;
895
896 /* recalculate the # of descriptors to use */
897 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
898 }
899 }
900
901 ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter);
902 if (ret >= 0) {
903 BUG_ON(ret <= 0 && ctx.copy_size != 0);
904 /* hdrs parsed, check against other limits */
905 if (ctx.mss) {
906 if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
907 VMXNET3_MAX_TX_BUF_SIZE)) {
908 goto hdr_too_big;
909 }
910 } else {
911 if (skb->ip_summed == CHECKSUM_PARTIAL) {
912 if (unlikely(ctx.eth_ip_hdr_size +
913 skb->csum_offset >
914 VMXNET3_MAX_CSUM_OFFSET)) {
915 goto hdr_too_big;
916 }
917 }
918 }
919 } else {
920 tq->stats.drop_hdr_inspect_err++;
921 goto drop_pkt;
922 }
923
924 spin_lock_irqsave(&tq->tx_lock, flags);
925
926 if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
927 tq->stats.tx_ring_full++;
f6965582
RD		 928 dev_dbg(&adapter->netdev->dev,
929 "tx queue stopped on %s, next2comp %u"
d1a890fa
SB		 930 " next2fill %u\n", adapter->netdev->name,
931 tq->tx_ring.next2comp, tq->tx_ring.next2fill);
932
933 vmxnet3_tq_stop(tq, adapter);
934 spin_unlock_irqrestore(&tq->tx_lock, flags);
935 return NETDEV_TX_BUSY;
936 }
937
938 /* fill tx descs related to addr & len */
939 vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter);
940
941 /* setup the EOP desc */
115924b6 942 ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP);
d1a890fa
SB		 943
944 /* setup the SOP desc */
115924b6
SB		 945#ifdef __BIG_ENDIAN_BITFIELD
946 gdesc = &tempTxDesc;
947 gdesc->dword[2] = ctx.sop_txd->dword[2];
948 gdesc->dword[3] = ctx.sop_txd->dword[3];
949#else
d1a890fa 950 gdesc = ctx.sop_txd;
115924b6 951#endif
d1a890fa
SB		 952 if (ctx.mss) {
953 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
954 gdesc->txd.om = VMXNET3_OM_TSO;
955 gdesc->txd.msscof = ctx.mss;
115924b6
SB		 956 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len -
957 gdesc->txd.hlen + ctx.mss - 1) / ctx.mss);
d1a890fa
SB		 958 } else {
959 if (skb->ip_summed == CHECKSUM_PARTIAL) {
960 gdesc->txd.hlen = ctx.eth_ip_hdr_size;
961 gdesc->txd.om = VMXNET3_OM_CSUM;
962 gdesc->txd.msscof = ctx.eth_ip_hdr_size +
963 skb->csum_offset;
964 } else {
965 gdesc->txd.om = 0;
966 gdesc->txd.msscof = 0;
967 }
115924b6 968 le32_add_cpu(&tq->shared->txNumDeferred, 1);
d1a890fa
SB		 969 }
970
971 if (vlan_tx_tag_present(skb)) {
972 gdesc->txd.ti = 1;
973 gdesc->txd.tci = vlan_tx_tag_get(skb);
974 }
975
115924b6
SB		 976 /* finally flips the GEN bit of the SOP desc. */
977 gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^
978 VMXNET3_TXD_GEN);
979#ifdef __BIG_ENDIAN_BITFIELD
980 /* Finished updating in bitfields of Tx Desc, so write them in original
981 * place.
982 */
983 vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc,
984 (struct Vmxnet3_TxDesc *)ctx.sop_txd);
985 gdesc = ctx.sop_txd;
986#endif
f6965582
RD		 987 dev_dbg(&adapter->netdev->dev,
988 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
d1a890fa 989 (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd -
115924b6
SB		 990 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr),
991 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3]));
d1a890fa
SB		 992
993 spin_unlock_irqrestore(&tq->tx_lock, flags);
994
115924b6
SB		 995 if (le32_to_cpu(tq->shared->txNumDeferred) >=
996 le32_to_cpu(tq->shared->txThreshold)) {
d1a890fa
SB		 997 tq->shared->txNumDeferred = 0;
998 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_TXPROD,
999 tq->tx_ring.next2fill);
1000 }
d1a890fa
SB		 1001
1002 return NETDEV_TX_OK;
1003
1004hdr_too_big:
1005 tq->stats.drop_oversized_hdr++;
1006drop_pkt:
1007 tq->stats.drop_total++;
1008 dev_kfree_skb(skb);
1009 return NETDEV_TX_OK;
1010}
1011
1012
1013static netdev_tx_t
1014vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1015{
1016 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
d1a890fa 1017
115924b6 1018 return vmxnet3_tq_xmit(skb, &adapter->tx_queue, adapter, netdev);
d1a890fa
SB		 1019}
1020
1021
1022static void
1023vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
1024 struct sk_buff *skb,
1025 union Vmxnet3_GenericDesc *gdesc)
1026{
1027 if (!gdesc->rcd.cnc && adapter->rxcsum) {
1028 /* typical case: TCP/UDP over IP and both csums are correct */
115924b6 1029 if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) ==
d1a890fa
SB		 1030 VMXNET3_RCD_CSUM_OK) {
1031 skb->ip_summed = CHECKSUM_UNNECESSARY;
1032 BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1033 BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6));
1034 BUG_ON(gdesc->rcd.frg);
1035 } else {
1036 if (gdesc->rcd.csum) {
1037 skb->csum = htons(gdesc->rcd.csum);
1038 skb->ip_summed = CHECKSUM_PARTIAL;
1039 } else {
1040 skb->ip_summed = CHECKSUM_NONE;
1041 }
1042 }
1043 } else {
1044 skb->ip_summed = CHECKSUM_NONE;
1045 }
1046}
1047
1048
1049static void
1050vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
1051 struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter)
1052{
1053 rq->stats.drop_err++;
1054 if (!rcd->fcs)
1055 rq->stats.drop_fcs++;
1056
1057 rq->stats.drop_total++;
1058
1059 /*
1060 * We do not unmap and chain the rx buffer to the skb.
1061 * We basically pretend this buffer is not used and will be recycled
1062 * by vmxnet3_rq_alloc_rx_buf()
1063 */
1064
1065 /*
1066 * ctx->skb may be NULL if this is the first and the only one
1067 * desc for the pkt
1068 */
1069 if (ctx->skb)
1070 dev_kfree_skb_irq(ctx->skb);
1071
1072 ctx->skb = NULL;
1073}
1074
1075
1076static int
1077vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1078 struct vmxnet3_adapter *adapter, int quota)
1079{
1080 static u32 rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2};
1081 u32 num_rxd = 0;
1082 struct Vmxnet3_RxCompDesc *rcd;
1083 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
115924b6
SB		 1084#ifdef __BIG_ENDIAN_BITFIELD
1085 struct Vmxnet3_RxDesc rxCmdDesc;
1086 struct Vmxnet3_RxCompDesc rxComp;
1087#endif
1088 vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd,
1089 &rxComp);
d1a890fa
SB		 1090 while (rcd->gen == rq->comp_ring.gen) {
1091 struct vmxnet3_rx_buf_info *rbi;
1092 struct sk_buff *skb;
1093 int num_to_alloc;
1094 struct Vmxnet3_RxDesc *rxd;
1095 u32 idx, ring_idx;
1096
1097 if (num_rxd >= quota) {
1098 /* we may stop even before we see the EOP desc of
1099 * the current pkt
1100 */
1101 break;
1102 }
1103 num_rxd++;
1104
1105 idx = rcd->rxdIdx;
1106 ring_idx = rcd->rqID == rq->qid ? 0 : 1;
115924b6
SB		 1107 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1108 &rxCmdDesc);
d1a890fa
SB		 1109 rbi = rq->buf_info[ring_idx] + idx;
1110
115924b6
SB		 1111 BUG_ON(rxd->addr != rbi->dma_addr ||
1112 rxd->len != rbi->len);
d1a890fa
SB		 1113
1114 if (unlikely(rcd->eop && rcd->err)) {
1115 vmxnet3_rx_error(rq, rcd, ctx, adapter);
1116 goto rcd_done;
1117 }
1118
1119 if (rcd->sop) { /* first buf of the pkt */
1120 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
1121 rcd->rqID != rq->qid);
1122
1123 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
1124 BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
1125
1126 if (unlikely(rcd->len == 0)) {
1127 /* Pretend the rx buffer is skipped. */
1128 BUG_ON(!(rcd->sop && rcd->eop));
f6965582
RD		 1129 dev_dbg(&adapter->netdev->dev,
1130 "rxRing[%u][%u] 0 length\n",
d1a890fa
SB		 1131 ring_idx, idx);
1132 goto rcd_done;
1133 }
1134
1135 ctx->skb = rbi->skb;
1136 rbi->skb = NULL;
1137
1138 pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len,
1139 PCI_DMA_FROMDEVICE);
1140
1141 skb_put(ctx->skb, rcd->len);
1142 } else {
1143 BUG_ON(ctx->skb == NULL);
1144 /* non SOP buffer must be type 1 in most cases */
1145 if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) {
1146 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1147
1148 if (rcd->len) {
1149 pci_unmap_page(adapter->pdev,
1150 rbi->dma_addr, rbi->len,
1151 PCI_DMA_FROMDEVICE);
1152
1153 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1154 rbi->page = NULL;
1155 }
1156 } else {
1157 /*
1158 * The only time a non-SOP buffer is type 0 is
1159 * when it's EOP and error flag is raised, which
1160 * has already been handled.
1161 */
1162 BUG_ON(true);
1163 }
1164 }
1165
1166 skb = ctx->skb;
1167 if (rcd->eop) {
1168 skb->len += skb->data_len;
1169 skb->truesize += skb->data_len;
1170
1171 vmxnet3_rx_csum(adapter, skb,
1172 (union Vmxnet3_GenericDesc *)rcd);
1173 skb->protocol = eth_type_trans(skb, adapter->netdev);
1174
1175 if (unlikely(adapter->vlan_grp && rcd->ts)) {
1176 vlan_hwaccel_receive_skb(skb,
1177 adapter->vlan_grp, rcd->tci);
1178 } else {
1179 netif_receive_skb(skb);
1180 }
1181
d1a890fa
SB		 1182 ctx->skb = NULL;
1183 }
1184
1185rcd_done:
1186 /* device may skip some rx descs */
1187 rq->rx_ring[ring_idx].next2comp = idx;
1188 VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp,
1189 rq->rx_ring[ring_idx].size);
1190
1191 /* refill rx buffers frequently to avoid starving the h/w */
1192 num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring +
1193 ring_idx);
1194 if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq,
1195 ring_idx, adapter))) {
1196 vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc,
1197 adapter);
1198
1199 /* if needed, update the register */
1200 if (unlikely(rq->shared->updateRxProd)) {
1201 VMXNET3_WRITE_BAR0_REG(adapter,
1202 rxprod_reg[ring_idx] + rq->qid * 8,
1203 rq->rx_ring[ring_idx].next2fill);
1204 rq->uncommitted[ring_idx] = 0;
1205 }
1206 }
1207
1208 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
115924b6
SB		 1209 vmxnet3_getRxComp(rcd,
1210 &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp);
d1a890fa
SB		 1211 }
1212
1213 return num_rxd;
1214}
1215
1216
1217static void
1218vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1219 struct vmxnet3_adapter *adapter)
1220{
1221 u32 i, ring_idx;
1222 struct Vmxnet3_RxDesc *rxd;
1223
1224 for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1225 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
115924b6
SB		 1226#ifdef __BIG_ENDIAN_BITFIELD
1227 struct Vmxnet3_RxDesc rxDesc;
1228#endif
1229 vmxnet3_getRxDesc(rxd,
1230 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc);
d1a890fa
SB		 1231
1232 if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1233 rq->buf_info[ring_idx][i].skb) {
1234 pci_unmap_single(adapter->pdev, rxd->addr,
1235 rxd->len, PCI_DMA_FROMDEVICE);
1236 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1237 rq->buf_info[ring_idx][i].skb = NULL;
1238 } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1239 rq->buf_info[ring_idx][i].page) {
1240 pci_unmap_page(adapter->pdev, rxd->addr,
1241 rxd->len, PCI_DMA_FROMDEVICE);
1242 put_page(rq->buf_info[ring_idx][i].page);
1243 rq->buf_info[ring_idx][i].page = NULL;
1244 }
1245 }
1246
1247 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1248 rq->rx_ring[ring_idx].next2fill =
1249 rq->rx_ring[ring_idx].next2comp = 0;
1250 rq->uncommitted[ring_idx] = 0;
1251 }
1252
1253 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1254 rq->comp_ring.next2proc = 0;
1255}
1256
1257
1258void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1259 struct vmxnet3_adapter *adapter)
1260{
1261 int i;
1262 int j;
1263
1264 /* all rx buffers must have already been freed */
1265 for (i = 0; i < 2; i++) {
1266 if (rq->buf_info[i]) {
1267 for (j = 0; j < rq->rx_ring[i].size; j++)
1268 BUG_ON(rq->buf_info[i][j].page != NULL);
1269 }
1270 }
1271
1272
1273 kfree(rq->buf_info[0]);
1274
1275 for (i = 0; i < 2; i++) {
1276 if (rq->rx_ring[i].base) {
1277 pci_free_consistent(adapter->pdev, rq->rx_ring[i].size
1278 * sizeof(struct Vmxnet3_RxDesc),
1279 rq->rx_ring[i].base,
1280 rq->rx_ring[i].basePA);
1281 rq->rx_ring[i].base = NULL;
1282 }
1283 rq->buf_info[i] = NULL;
1284 }
1285
1286 if (rq->comp_ring.base) {
1287 pci_free_consistent(adapter->pdev, rq->comp_ring.size *
1288 sizeof(struct Vmxnet3_RxCompDesc),
1289 rq->comp_ring.base, rq->comp_ring.basePA);
1290 rq->comp_ring.base = NULL;
1291 }
1292}
1293
1294
1295static int
1296vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1297 struct vmxnet3_adapter *adapter)
1298{
1299 int i;
1300
1301 /* initialize buf_info */
1302 for (i = 0; i < rq->rx_ring[0].size; i++) {
1303
1304 /* 1st buf for a pkt is skbuff */
1305 if (i % adapter->rx_buf_per_pkt == 0) {
1306 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1307 rq->buf_info[0][i].len = adapter->skb_buf_size;
1308 } else { /* subsequent bufs for a pkt is frag */
1309 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1310 rq->buf_info[0][i].len = PAGE_SIZE;
1311 }
1312 }
1313 for (i = 0; i < rq->rx_ring[1].size; i++) {
1314 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1315 rq->buf_info[1][i].len = PAGE_SIZE;
1316 }
1317
1318 /* reset internal state and allocate buffers for both rings */
1319 for (i = 0; i < 2; i++) {
1320 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1321 rq->uncommitted[i] = 0;
1322
1323 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1324 sizeof(struct Vmxnet3_RxDesc));
1325 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1326 }
1327 if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1328 adapter) == 0) {
1329 /* at least has 1 rx buffer for the 1st ring */
1330 return -ENOMEM;
1331 }
1332 vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1333
1334 /* reset the comp ring */
1335 rq->comp_ring.next2proc = 0;
1336 memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1337 sizeof(struct Vmxnet3_RxCompDesc));
1338 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1339
1340 /* reset rxctx */
1341 rq->rx_ctx.skb = NULL;
1342
1343 /* stats are not reset */
1344 return 0;
1345}
1346
1347
1348static int
1349vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1350{
1351 int i;
1352 size_t sz;
1353 struct vmxnet3_rx_buf_info *bi;
1354
1355 for (i = 0; i < 2; i++) {
1356
1357 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1358 rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz,
1359 &rq->rx_ring[i].basePA);
1360 if (!rq->rx_ring[i].base) {
1361 printk(KERN_ERR "%s: failed to allocate rx ring %d\n",
1362 adapter->netdev->name, i);
1363 goto err;
1364 }
1365 }
1366
1367 sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1368 rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz,
1369 &rq->comp_ring.basePA);
1370 if (!rq->comp_ring.base) {
1371 printk(KERN_ERR "%s: failed to allocate rx comp ring\n",
1372 adapter->netdev->name);
1373 goto err;
1374 }
1375
1376 sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1377 rq->rx_ring[1].size);
476c609e 1378 bi = kzalloc(sz, GFP_KERNEL);
d1a890fa
SB		 1379 if (!bi) {
1380 printk(KERN_ERR "%s: failed to allocate rx bufinfo\n",
1381 adapter->netdev->name);
1382 goto err;
1383 }
d1a890fa
SB		 1384 rq->buf_info[0] = bi;
1385 rq->buf_info[1] = bi + rq->rx_ring[0].size;
1386
1387 return 0;
1388
1389err:
1390 vmxnet3_rq_destroy(rq, adapter);
1391 return -ENOMEM;
1392}
1393
1394
1395static int
1396vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1397{
1398 if (unlikely(adapter->shared->ecr))
1399 vmxnet3_process_events(adapter);
1400
1401 vmxnet3_tq_tx_complete(&adapter->tx_queue, adapter);
1402 return vmxnet3_rq_rx_complete(&adapter->rx_queue, adapter, budget);
1403}
1404
1405
1406static int
1407vmxnet3_poll(struct napi_struct *napi, int budget)
1408{
1409 struct vmxnet3_adapter *adapter = container_of(napi,
1410 struct vmxnet3_adapter, napi);
1411 int rxd_done;
1412
1413 rxd_done = vmxnet3_do_poll(adapter, budget);
1414
1415 if (rxd_done < budget) {
1416 napi_complete(napi);
1417 vmxnet3_enable_intr(adapter, 0);
1418 }
1419 return rxd_done;
1420}
1421
1422
1423/* Interrupt handler for vmxnet3 */
1424static irqreturn_t
1425vmxnet3_intr(int irq, void *dev_id)
1426{
1427 struct net_device *dev = dev_id;
1428 struct vmxnet3_adapter *adapter = netdev_priv(dev);
1429
1430 if (unlikely(adapter->intr.type == VMXNET3_IT_INTX)) {
1431 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
1432 if (unlikely(icr == 0))
1433 /* not ours */
1434 return IRQ_NONE;
1435 }
1436
1437
1438 /* disable intr if needed */
1439 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1440 vmxnet3_disable_intr(adapter, 0);
1441
1442 napi_schedule(&adapter->napi);
1443
1444 return IRQ_HANDLED;
1445}
1446
1447#ifdef CONFIG_NET_POLL_CONTROLLER
1448
1449
1450/* netpoll callback. */
1451static void
1452vmxnet3_netpoll(struct net_device *netdev)
1453{
1454 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1455 int irq;
1456
8f7e524c 1457#ifdef CONFIG_PCI_MSI
d1a890fa
SB		 1458 if (adapter->intr.type == VMXNET3_IT_MSIX)
1459 irq = adapter->intr.msix_entries[0].vector;
1460 else
8f7e524c 1461#endif
d1a890fa
SB		 1462 irq = adapter->pdev->irq;
1463
1464 disable_irq(irq);
1465 vmxnet3_intr(irq, netdev);
1466 enable_irq(irq);
1467}
1468#endif
1469
1470static int
1471vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
1472{
1473 int err;
1474
8f7e524c 1475#ifdef CONFIG_PCI_MSI
d1a890fa
SB		 1476 if (adapter->intr.type == VMXNET3_IT_MSIX) {
1477 /* we only use 1 MSI-X vector */
1478 err = request_irq(adapter->intr.msix_entries[0].vector,
1479 vmxnet3_intr, 0, adapter->netdev->name,
1480 adapter->netdev);
115924b6 1481 } else if (adapter->intr.type == VMXNET3_IT_MSI) {
d1a890fa
SB		 1482 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
1483 adapter->netdev->name, adapter->netdev);
115924b6
SB		 1484 } else
1485#endif
1486 {
d1a890fa
SB		 1487 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
1488 IRQF_SHARED, adapter->netdev->name,
1489 adapter->netdev);
1490 }
1491
1492 if (err)
1493 printk(KERN_ERR "Failed to request irq %s (intr type:%d), error"
1494 ":%d\n", adapter->netdev->name, adapter->intr.type, err);
1495
1496
1497 if (!err) {
1498 int i;
1499 /* init our intr settings */
1500 for (i = 0; i < adapter->intr.num_intrs; i++)
1501 adapter->intr.mod_levels[i] = UPT1_IML_ADAPTIVE;
1502
1503 /* next setup intr index for all intr sources */
1504 adapter->tx_queue.comp_ring.intr_idx = 0;
1505 adapter->rx_queue.comp_ring.intr_idx = 0;
1506 adapter->intr.event_intr_idx = 0;
1507
1508 printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors "
1509 "allocated\n", adapter->netdev->name, adapter->intr.type,
1510 adapter->intr.mask_mode, adapter->intr.num_intrs);
1511 }
1512
1513 return err;
1514}
1515
1516
1517static void
1518vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
1519{
1520 BUG_ON(adapter->intr.type == VMXNET3_IT_AUTO ||
1521 adapter->intr.num_intrs <= 0);
1522
1523 switch (adapter->intr.type) {
8f7e524c 1524#ifdef CONFIG_PCI_MSI
d1a890fa
SB		 1525 case VMXNET3_IT_MSIX:
1526 {
1527 int i;
1528
1529 for (i = 0; i < adapter->intr.num_intrs; i++)
1530 free_irq(adapter->intr.msix_entries[i].vector,
1531 adapter->netdev);
1532 break;
1533 }
8f7e524c 1534#endif
d1a890fa
SB		 1535 case VMXNET3_IT_MSI:
1536 free_irq(adapter->pdev->irq, adapter->netdev);
1537 break;
1538 case VMXNET3_IT_INTX:
1539 free_irq(adapter->pdev->irq, adapter->netdev);
1540 break;
1541 default:
1542 BUG_ON(true);
1543 }
1544}
1545
1546
115924b6
SB		 1547inline void set_flag_le16(__le16 *data, u16 flag)
1548{
1549 *data = cpu_to_le16(le16_to_cpu(*data) | flag);
1550}
1551
1552inline void set_flag_le64(__le64 *data, u64 flag)
1553{
1554 *data = cpu_to_le64(le64_to_cpu(*data) | flag);
1555}
1556
1557inline void reset_flag_le64(__le64 *data, u64 flag)
1558{
1559 *data = cpu_to_le64(le64_to_cpu(*data) & ~flag);
1560}
1561
1562
d1a890fa
SB		 1563static void
1564vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
1565{
1566 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1567 struct Vmxnet3_DriverShared *shared = adapter->shared;
1568 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1569
1570 if (grp) {
1571 /* add vlan rx stripping. */
1572 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) {
1573 int i;
1574 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1575 adapter->vlan_grp = grp;
1576
1577 /* update FEATURES to device */
115924b6
SB		 1578 set_flag_le64(&devRead->misc.uptFeatures,
1579 UPT1_F_RXVLAN);
d1a890fa
SB		 1580 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1581 VMXNET3_CMD_UPDATE_FEATURE);
1582 /*
1583 * Clear entire vfTable; then enable untagged pkts.
1584 * Note: setting one entry in vfTable to non-zero turns
1585 * on VLAN rx filtering.
1586 */
1587 for (i = 0; i < VMXNET3_VFT_SIZE; i++)
1588 vfTable[i] = 0;
1589
1590 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1591 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1592 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1593 } else {
1594 printk(KERN_ERR "%s: vlan_rx_register when device has "
1595 "no NETIF_F_HW_VLAN_RX\n", netdev->name);
1596 }
1597 } else {
1598 /* remove vlan rx stripping. */
1599 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1600 adapter->vlan_grp = NULL;
1601
115924b6 1602 if (le64_to_cpu(devRead->misc.uptFeatures) & UPT1_F_RXVLAN) {
d1a890fa
SB		 1603 int i;
1604
1605 for (i = 0; i < VMXNET3_VFT_SIZE; i++) {
1606 /* clear entire vfTable; this also disables
1607 * VLAN rx filtering
1608 */
1609 vfTable[i] = 0;
1610 }
1611 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1612 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1613
1614 /* update FEATURES to device */
115924b6
SB		 1615 reset_flag_le64(&devRead->misc.uptFeatures,
1616 UPT1_F_RXVLAN);
d1a890fa
SB		 1617 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1618 VMXNET3_CMD_UPDATE_FEATURE);
1619 }
1620 }
1621}
1622
1623
1624static void
1625vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
1626{
1627 if (adapter->vlan_grp) {
1628 u16 vid;
1629 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1630 bool activeVlan = false;
1631
1632 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1633 if (vlan_group_get_device(adapter->vlan_grp, vid)) {
1634 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1635 activeVlan = true;
1636 }
1637 }
1638 if (activeVlan) {
1639 /* continue to allow untagged pkts */
1640 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1641 }
1642 }
1643}
1644
1645
1646static void
1647vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1648{
1649 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1650 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1651
1652 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1653 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1654 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1655}
1656
1657
1658static void
1659vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1660{
1661 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1662 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1663
1664 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
1665 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1666 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1667}
1668
1669
1670static u8 *
1671vmxnet3_copy_mc(struct net_device *netdev)
1672{
1673 u8 *buf = NULL;
4cd24eaf 1674 u32 sz = netdev_mc_count(netdev) * ETH_ALEN;
d1a890fa
SB		 1675
1676 /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
1677 if (sz <= 0xffff) {
1678 /* We may be called with BH disabled */
1679 buf = kmalloc(sz, GFP_ATOMIC);
1680 if (buf) {
22bedad3 1681 struct netdev_hw_addr *ha;
567ec874 1682 int i = 0;
d1a890fa 1683
22bedad3
JP		 1684 netdev_for_each_mc_addr(ha, netdev)
1685 memcpy(buf + i++ * ETH_ALEN, ha->addr,
d1a890fa 1686 ETH_ALEN);
d1a890fa
SB		 1687 }
1688 }
1689 return buf;
1690}
1691
1692
1693static void
1694vmxnet3_set_mc(struct net_device *netdev)
1695{
1696 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1697 struct Vmxnet3_RxFilterConf *rxConf =
1698 &adapter->shared->devRead.rxFilterConf;
1699 u8 *new_table = NULL;
1700 u32 new_mode = VMXNET3_RXM_UCAST;
1701
1702 if (netdev->flags & IFF_PROMISC)
1703 new_mode |= VMXNET3_RXM_PROMISC;
1704
1705 if (netdev->flags & IFF_BROADCAST)
1706 new_mode |= VMXNET3_RXM_BCAST;
1707
1708 if (netdev->flags & IFF_ALLMULTI)
1709 new_mode |= VMXNET3_RXM_ALL_MULTI;
1710 else
4cd24eaf 1711 if (!netdev_mc_empty(netdev)) {
d1a890fa
SB		 1712 new_table = vmxnet3_copy_mc(netdev);
1713 if (new_table) {
1714 new_mode |= VMXNET3_RXM_MCAST;
115924b6 1715 rxConf->mfTableLen = cpu_to_le16(
4cd24eaf 1716 netdev_mc_count(netdev) * ETH_ALEN);
115924b6
SB		 1717 rxConf->mfTablePA = cpu_to_le64(virt_to_phys(
1718 new_table));
d1a890fa
SB		 1719 } else {
1720 printk(KERN_INFO "%s: failed to copy mcast list"
1721 ", setting ALL_MULTI\n", netdev->name);
1722 new_mode |= VMXNET3_RXM_ALL_MULTI;
1723 }
1724 }
1725
1726
1727 if (!(new_mode & VMXNET3_RXM_MCAST)) {
1728 rxConf->mfTableLen = 0;
1729 rxConf->mfTablePA = 0;
1730 }
1731
1732 if (new_mode != rxConf->rxMode) {
115924b6 1733 rxConf->rxMode = cpu_to_le32(new_mode);
d1a890fa
SB		 1734 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1735 VMXNET3_CMD_UPDATE_RX_MODE);
1736 }
1737
1738 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1739 VMXNET3_CMD_UPDATE_MAC_FILTERS);
1740
1741 kfree(new_table);
1742}
1743
1744
1745/*
1746 * Set up driver_shared based on settings in adapter.
1747 */
1748
1749static void
1750vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
1751{
1752 struct Vmxnet3_DriverShared *shared = adapter->shared;
1753 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1754 struct Vmxnet3_TxQueueConf *tqc;
1755 struct Vmxnet3_RxQueueConf *rqc;
1756 int i;
1757
1758 memset(shared, 0, sizeof(*shared));
1759
1760 /* driver settings */
115924b6
SB		 1761 shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC);
1762 devRead->misc.driverInfo.version = cpu_to_le32(
1763 VMXNET3_DRIVER_VERSION_NUM);
d1a890fa
SB		 1764 devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
1765 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
1766 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
115924b6
SB		 1767 *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32(
1768 *((u32 *)&devRead->misc.driverInfo.gos));
1769 devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1);
1770 devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1);
d1a890fa 1771
115924b6
SB		 1772 devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter));
1773 devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter));
d1a890fa
SB		 1774
1775 /* set up feature flags */
1776 if (adapter->rxcsum)
115924b6 1777 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXCSUM);
d1a890fa
SB		 1778
1779 if (adapter->lro) {
115924b6
SB		 1780 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_LRO);
1781 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
d1a890fa 1782 }
8e95a202
JP		 1783 if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) &&
1784 adapter->vlan_grp) {
115924b6 1785 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXVLAN);
d1a890fa
SB		 1786 }
1787
115924b6
SB		 1788 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
1789 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
1790 devRead->misc.queueDescLen = cpu_to_le32(
1791 sizeof(struct Vmxnet3_TxQueueDesc) +
1792 sizeof(struct Vmxnet3_RxQueueDesc));
d1a890fa
SB		 1793
1794 /* tx queue settings */
1795 BUG_ON(adapter->tx_queue.tx_ring.base == NULL);
1796
1797 devRead->misc.numTxQueues = 1;
1798 tqc = &adapter->tqd_start->conf;
115924b6
SB		 1799 tqc->txRingBasePA = cpu_to_le64(adapter->tx_queue.tx_ring.basePA);
1800 tqc->dataRingBasePA = cpu_to_le64(adapter->tx_queue.data_ring.basePA);
1801 tqc->compRingBasePA = cpu_to_le64(adapter->tx_queue.comp_ring.basePA);
1802 tqc->ddPA = cpu_to_le64(virt_to_phys(
1803 adapter->tx_queue.buf_info));
1804 tqc->txRingSize = cpu_to_le32(adapter->tx_queue.tx_ring.size);
1805 tqc->dataRingSize = cpu_to_le32(adapter->tx_queue.data_ring.size);
1806 tqc->compRingSize = cpu_to_le32(adapter->tx_queue.comp_ring.size);
1807 tqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_tx_buf_info) *
1808 tqc->txRingSize);
d1a890fa
SB		 1809 tqc->intrIdx = adapter->tx_queue.comp_ring.intr_idx;
1810
1811 /* rx queue settings */
1812 devRead->misc.numRxQueues = 1;
1813 rqc = &adapter->rqd_start->conf;
115924b6
SB		 1814 rqc->rxRingBasePA[0] = cpu_to_le64(adapter->rx_queue.rx_ring[0].basePA);
1815 rqc->rxRingBasePA[1] = cpu_to_le64(adapter->rx_queue.rx_ring[1].basePA);
1816 rqc->compRingBasePA = cpu_to_le64(adapter->rx_queue.comp_ring.basePA);
1817 rqc->ddPA = cpu_to_le64(virt_to_phys(
1818 adapter->rx_queue.buf_info));
1819 rqc->rxRingSize[0] = cpu_to_le32(adapter->rx_queue.rx_ring[0].size);
1820 rqc->rxRingSize[1] = cpu_to_le32(adapter->rx_queue.rx_ring[1].size);
1821 rqc->compRingSize = cpu_to_le32(adapter->rx_queue.comp_ring.size);
1822 rqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_rx_buf_info) *
1823 (rqc->rxRingSize[0] + rqc->rxRingSize[1]));
d1a890fa
SB		 1824 rqc->intrIdx = adapter->rx_queue.comp_ring.intr_idx;
1825
1826 /* intr settings */
1827 devRead->intrConf.autoMask = adapter->intr.mask_mode ==
1828 VMXNET3_IMM_AUTO;
1829 devRead->intrConf.numIntrs = adapter->intr.num_intrs;
1830 for (i = 0; i < adapter->intr.num_intrs; i++)
1831 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
1832
1833 devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
6929fe8a 1834 devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
d1a890fa
SB		 1835
1836 /* rx filter settings */
1837 devRead->rxFilterConf.rxMode = 0;
1838 vmxnet3_restore_vlan(adapter);
1839 /* the rest are already zeroed */
1840}
1841
1842
1843int
1844vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
1845{
1846 int err;
1847 u32 ret;
1848
f6965582
RD		 1849 dev_dbg(&adapter->netdev->dev,
1850 "%s: skb_buf_size %d, rx_buf_per_pkt %d, ring sizes"
d1a890fa
SB		 1851 " %u %u %u\n", adapter->netdev->name, adapter->skb_buf_size,
1852 adapter->rx_buf_per_pkt, adapter->tx_queue.tx_ring.size,
1853 adapter->rx_queue.rx_ring[0].size,
1854 adapter->rx_queue.rx_ring[1].size);
1855
1856 vmxnet3_tq_init(&adapter->tx_queue, adapter);
1857 err = vmxnet3_rq_init(&adapter->rx_queue, adapter);
1858 if (err) {
1859 printk(KERN_ERR "Failed to init rx queue for %s: error %d\n",
1860 adapter->netdev->name, err);
1861 goto rq_err;
1862 }
1863
1864 err = vmxnet3_request_irqs(adapter);
1865 if (err) {
1866 printk(KERN_ERR "Failed to setup irq for %s: error %d\n",
1867 adapter->netdev->name, err);
1868 goto irq_err;
1869 }
1870
1871 vmxnet3_setup_driver_shared(adapter);
1872
115924b6
SB		 1873 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
1874 adapter->shared_pa));
1875 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
1876 adapter->shared_pa));
d1a890fa
SB		 1877 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1878 VMXNET3_CMD_ACTIVATE_DEV);
1879 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
1880
1881 if (ret != 0) {
1882 printk(KERN_ERR "Failed to activate dev %s: error %u\n",
1883 adapter->netdev->name, ret);
1884 err = -EINVAL;
1885 goto activate_err;
1886 }
1887 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD,
1888 adapter->rx_queue.rx_ring[0].next2fill);
1889 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD2,
1890 adapter->rx_queue.rx_ring[1].next2fill);
1891
1892 /* Apply the rx filter settins last. */
1893 vmxnet3_set_mc(adapter->netdev);
1894
1895 /*
1896 * Check link state when first activating device. It will start the
1897 * tx queue if the link is up.
1898 */
4a1745fc 1899 vmxnet3_check_link(adapter, true);
d1a890fa
SB		 1900
1901 napi_enable(&adapter->napi);
1902 vmxnet3_enable_all_intrs(adapter);
1903 clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
1904 return 0;
1905
1906activate_err:
1907 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
1908 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
1909 vmxnet3_free_irqs(adapter);
1910irq_err:
1911rq_err:
1912 /* free up buffers we allocated */
1913 vmxnet3_rq_cleanup(&adapter->rx_queue, adapter);
1914 return err;
1915}
1916
1917
1918void
1919vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
1920{
1921 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
1922}
1923
1924
1925int
1926vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
1927{
1928 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
1929 return 0;
1930
1931
1932 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1933 VMXNET3_CMD_QUIESCE_DEV);
1934 vmxnet3_disable_all_intrs(adapter);
1935
1936 napi_disable(&adapter->napi);
1937 netif_tx_disable(adapter->netdev);
1938 adapter->link_speed = 0;
1939 netif_carrier_off(adapter->netdev);
1940
1941 vmxnet3_tq_cleanup(&adapter->tx_queue, adapter);
1942 vmxnet3_rq_cleanup(&adapter->rx_queue, adapter);
1943 vmxnet3_free_irqs(adapter);
1944 return 0;
1945}
1946
1947
1948static void
1949vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
1950{
1951 u32 tmp;
1952
1953 tmp = *(u32 *)mac;
1954 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
1955
1956 tmp = (mac[5] << 8) | mac[4];
1957 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
1958}
1959
1960
1961static int
1962vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
1963{
1964 struct sockaddr *addr = p;
1965 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1966
1967 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1968 vmxnet3_write_mac_addr(adapter, addr->sa_data);
1969
1970 return 0;
1971}
1972
1973
1974/* ==================== initialization and cleanup routines ============ */
1975
1976static int
1977vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64)
1978{
1979 int err;
1980 unsigned long mmio_start, mmio_len;
1981 struct pci_dev *pdev = adapter->pdev;
1982
1983 err = pci_enable_device(pdev);
1984 if (err) {
1985 printk(KERN_ERR "Failed to enable adapter %s: error %d\n",
1986 pci_name(pdev), err);
1987 return err;
1988 }
1989
1990 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
1991 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
1992 printk(KERN_ERR "pci_set_consistent_dma_mask failed "
1993 "for adapter %s\n", pci_name(pdev));
1994 err = -EIO;
1995 goto err_set_mask;
1996 }
1997 *dma64 = true;
1998 } else {
1999 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
2000 printk(KERN_ERR "pci_set_dma_mask failed for adapter "
2001 "%s\n", pci_name(pdev));
2002 err = -EIO;
2003 goto err_set_mask;
2004 }
2005 *dma64 = false;
2006 }
2007
2008 err = pci_request_selected_regions(pdev, (1 << 2) - 1,
2009 vmxnet3_driver_name);
2010 if (err) {
2011 printk(KERN_ERR "Failed to request region for adapter %s: "
2012 "error %d\n", pci_name(pdev), err);
2013 goto err_set_mask;
2014 }
2015
2016 pci_set_master(pdev);
2017
2018 mmio_start = pci_resource_start(pdev, 0);
2019 mmio_len = pci_resource_len(pdev, 0);
2020 adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
2021 if (!adapter->hw_addr0) {
2022 printk(KERN_ERR "Failed to map bar0 for adapter %s\n",
2023 pci_name(pdev));
2024 err = -EIO;
2025 goto err_ioremap;
2026 }
2027
2028 mmio_start = pci_resource_start(pdev, 1);
2029 mmio_len = pci_resource_len(pdev, 1);
2030 adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
2031 if (!adapter->hw_addr1) {
2032 printk(KERN_ERR "Failed to map bar1 for adapter %s\n",
2033 pci_name(pdev));
2034 err = -EIO;
2035 goto err_bar1;
2036 }
2037 return 0;
2038
2039err_bar1:
2040 iounmap(adapter->hw_addr0);
2041err_ioremap:
2042 pci_release_selected_regions(pdev, (1 << 2) - 1);
2043err_set_mask:
2044 pci_disable_device(pdev);
2045 return err;
2046}
2047
2048
2049static void
2050vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
2051{
2052 BUG_ON(!adapter->pdev);
2053
2054 iounmap(adapter->hw_addr0);
2055 iounmap(adapter->hw_addr1);
2056 pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
2057 pci_disable_device(adapter->pdev);
2058}
2059
2060
2061static void
2062vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2063{
2064 size_t sz;
2065
2066 if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
2067 VMXNET3_MAX_ETH_HDR_SIZE) {
2068 adapter->skb_buf_size = adapter->netdev->mtu +
2069 VMXNET3_MAX_ETH_HDR_SIZE;
2070 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
2071 adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
2072
2073 adapter->rx_buf_per_pkt = 1;
2074 } else {
2075 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
2076 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
2077 VMXNET3_MAX_ETH_HDR_SIZE;
2078 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
2079 }
2080
2081 /*
2082 * for simplicity, force the ring0 size to be a multiple of
2083 * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2084 */
2085 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2086 adapter->rx_queue.rx_ring[0].size = (adapter->rx_queue.rx_ring[0].size +
2087 sz - 1) / sz * sz;
2088 adapter->rx_queue.rx_ring[0].size = min_t(u32,
2089 adapter->rx_queue.rx_ring[0].size,
2090 VMXNET3_RX_RING_MAX_SIZE / sz * sz);
2091}
2092
2093
2094int
2095vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
2096 u32 rx_ring_size, u32 rx_ring2_size)
2097{
2098 int err;
2099
2100 adapter->tx_queue.tx_ring.size = tx_ring_size;
2101 adapter->tx_queue.data_ring.size = tx_ring_size;
2102 adapter->tx_queue.comp_ring.size = tx_ring_size;
2103 adapter->tx_queue.shared = &adapter->tqd_start->ctrl;
2104 adapter->tx_queue.stopped = true;
2105 err = vmxnet3_tq_create(&adapter->tx_queue, adapter);
2106 if (err)
2107 return err;
2108
2109 adapter->rx_queue.rx_ring[0].size = rx_ring_size;
2110 adapter->rx_queue.rx_ring[1].size = rx_ring2_size;
2111 vmxnet3_adjust_rx_ring_size(adapter);
2112 adapter->rx_queue.comp_ring.size = adapter->rx_queue.rx_ring[0].size +
2113 adapter->rx_queue.rx_ring[1].size;
2114 adapter->rx_queue.qid = 0;
2115 adapter->rx_queue.qid2 = 1;
2116 adapter->rx_queue.shared = &adapter->rqd_start->ctrl;
2117 err = vmxnet3_rq_create(&adapter->rx_queue, adapter);
2118 if (err)
2119 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2120
2121 return err;
2122}
2123
2124static int
2125vmxnet3_open(struct net_device *netdev)
2126{
2127 struct vmxnet3_adapter *adapter;
2128 int err;
2129
2130 adapter = netdev_priv(netdev);
2131
2132 spin_lock_init(&adapter->tx_queue.tx_lock);
2133
2134 err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE,
2135 VMXNET3_DEF_RX_RING_SIZE,
2136 VMXNET3_DEF_RX_RING_SIZE);
2137 if (err)
2138 goto queue_err;
2139
2140 err = vmxnet3_activate_dev(adapter);
2141 if (err)
2142 goto activate_err;
2143
2144 return 0;
2145
2146activate_err:
2147 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2148 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2149queue_err:
2150 return err;
2151}
2152
2153
2154static int
2155vmxnet3_close(struct net_device *netdev)
2156{
2157 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2158
2159 /*
2160 * Reset_work may be in the middle of resetting the device, wait for its
2161 * completion.
2162 */
2163 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2164 msleep(1);
2165
2166 vmxnet3_quiesce_dev(adapter);
2167
2168 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2169 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2170
2171 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2172
2173
2174 return 0;
2175}
2176
2177
2178void
2179vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2180{
2181 /*
2182 * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2183 * vmxnet3_close() will deadlock.
2184 */
2185 BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2186
2187 /* we need to enable NAPI, otherwise dev_close will deadlock */
2188 napi_enable(&adapter->napi);
2189 dev_close(adapter->netdev);
2190}
2191
2192
2193static int
2194vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2195{
2196 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2197 int err = 0;
2198
2199 if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU)
2200 return -EINVAL;
2201
2202 if (new_mtu > 1500 && !adapter->jumbo_frame)
2203 return -EINVAL;
2204
2205 netdev->mtu = new_mtu;
2206
2207 /*
2208 * Reset_work may be in the middle of resetting the device, wait for its
2209 * completion.
2210 */
2211 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2212 msleep(1);
2213
2214 if (netif_running(netdev)) {
2215 vmxnet3_quiesce_dev(adapter);
2216 vmxnet3_reset_dev(adapter);
2217
2218 /* we need to re-create the rx queue based on the new mtu */
2219 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2220 vmxnet3_adjust_rx_ring_size(adapter);
2221 adapter->rx_queue.comp_ring.size =
2222 adapter->rx_queue.rx_ring[0].size +
2223 adapter->rx_queue.rx_ring[1].size;
2224 err = vmxnet3_rq_create(&adapter->rx_queue, adapter);
2225 if (err) {
2226 printk(KERN_ERR "%s: failed to re-create rx queue,"
2227 " error %d. Closing it.\n", netdev->name, err);
2228 goto out;
2229 }
2230
2231 err = vmxnet3_activate_dev(adapter);
2232 if (err) {
2233 printk(KERN_ERR "%s: failed to re-activate, error %d. "
2234 "Closing it\n", netdev->name, err);
2235 goto out;
2236 }
2237 }
2238
2239out:
2240 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2241 if (err)
2242 vmxnet3_force_close(adapter);
2243
2244 return err;
2245}
2246
2247
2248static void
2249vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
2250{
2251 struct net_device *netdev = adapter->netdev;
2252
2253 netdev->features = NETIF_F_SG |
2254 NETIF_F_HW_CSUM |
2255 NETIF_F_HW_VLAN_TX |
2256 NETIF_F_HW_VLAN_RX |
2257 NETIF_F_HW_VLAN_FILTER |
2258 NETIF_F_TSO |
2259 NETIF_F_TSO6 |
2260 NETIF_F_LRO;
2261
2262 printk(KERN_INFO "features: sg csum vlan jf tso tsoIPv6 lro");
2263
2264 adapter->rxcsum = true;
2265 adapter->jumbo_frame = true;
2266 adapter->lro = true;
2267
2268 if (dma64) {
2269 netdev->features |= NETIF_F_HIGHDMA;
2270 printk(" highDMA");
2271 }
2272
2273 netdev->vlan_features = netdev->features;
2274 printk("\n");
2275}
2276
2277
2278static void
2279vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2280{
2281 u32 tmp;
2282
2283 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
2284 *(u32 *)mac = tmp;
2285
2286 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
2287 mac[4] = tmp & 0xff;
2288 mac[5] = (tmp >> 8) & 0xff;
2289}
2290
2291
2292static void
2293vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2294{
2295 u32 cfg;
2296
2297 /* intr settings */
2298 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2299 VMXNET3_CMD_GET_CONF_INTR);
2300 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2301 adapter->intr.type = cfg & 0x3;
2302 adapter->intr.mask_mode = (cfg >> 2) & 0x3;
2303
2304 if (adapter->intr.type == VMXNET3_IT_AUTO) {
0bdc0d70
SB		 2305 adapter->intr.type = VMXNET3_IT_MSIX;
2306 }
d1a890fa 2307
8f7e524c 2308#ifdef CONFIG_PCI_MSI
0bdc0d70
SB		 2309 if (adapter->intr.type == VMXNET3_IT_MSIX) {
2310 int err;
2311
d1a890fa
SB		 2312 adapter->intr.msix_entries[0].entry = 0;
2313 err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries,
2314 VMXNET3_LINUX_MAX_MSIX_VECT);
2315 if (!err) {
2316 adapter->intr.num_intrs = 1;
2317 adapter->intr.type = VMXNET3_IT_MSIX;
2318 return;
2319 }
0bdc0d70
SB		 2320 adapter->intr.type = VMXNET3_IT_MSI;
2321 }
d1a890fa 2322
0bdc0d70
SB		 2323 if (adapter->intr.type == VMXNET3_IT_MSI) {
2324 int err;
d1a890fa
SB		 2325 err = pci_enable_msi(adapter->pdev);
2326 if (!err) {
2327 adapter->intr.num_intrs = 1;
d1a890fa
SB		 2328 return;
2329 }
2330 }
0bdc0d70 2331#endif /* CONFIG_PCI_MSI */
d1a890fa
SB		 2332
2333 adapter->intr.type = VMXNET3_IT_INTX;
2334
2335 /* INT-X related setting */
2336 adapter->intr.num_intrs = 1;
2337}
2338
2339
2340static void
2341vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
2342{
2343 if (adapter->intr.type == VMXNET3_IT_MSIX)
2344 pci_disable_msix(adapter->pdev);
2345 else if (adapter->intr.type == VMXNET3_IT_MSI)
2346 pci_disable_msi(adapter->pdev);
2347 else
2348 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
2349}
2350
2351
2352static void
2353vmxnet3_tx_timeout(struct net_device *netdev)
2354{
2355 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2356 adapter->tx_timeout_count++;
2357
2358 printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name);
2359 schedule_work(&adapter->work);
2360}
2361
2362
2363static void
2364vmxnet3_reset_work(struct work_struct *data)
2365{
2366 struct vmxnet3_adapter *adapter;
2367
2368 adapter = container_of(data, struct vmxnet3_adapter, work);
2369
2370 /* if another thread is resetting the device, no need to proceed */
2371 if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2372 return;
2373
2374 /* if the device is closed, we must leave it alone */
d9a5f210 2375 rtnl_lock();
d1a890fa
SB		 2376 if (netif_running(adapter->netdev)) {
2377 printk(KERN_INFO "%s: resetting\n", adapter->netdev->name);
2378 vmxnet3_quiesce_dev(adapter);
2379 vmxnet3_reset_dev(adapter);
2380 vmxnet3_activate_dev(adapter);
2381 } else {
2382 printk(KERN_INFO "%s: already closed\n", adapter->netdev->name);
2383 }
d9a5f210 2384 rtnl_unlock();
d1a890fa
SB		 2385
2386 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2387}
2388
2389
2390static int __devinit
2391vmxnet3_probe_device(struct pci_dev *pdev,
2392 const struct pci_device_id *id)
2393{
2394 static const struct net_device_ops vmxnet3_netdev_ops = {
2395 .ndo_open = vmxnet3_open,
2396 .ndo_stop = vmxnet3_close,
2397 .ndo_start_xmit = vmxnet3_xmit_frame,
2398 .ndo_set_mac_address = vmxnet3_set_mac_addr,
2399 .ndo_change_mtu = vmxnet3_change_mtu,
2400 .ndo_get_stats = vmxnet3_get_stats,
2401 .ndo_tx_timeout = vmxnet3_tx_timeout,
2402 .ndo_set_multicast_list = vmxnet3_set_mc,
2403 .ndo_vlan_rx_register = vmxnet3_vlan_rx_register,
2404 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
2405 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
2406#ifdef CONFIG_NET_POLL_CONTROLLER
2407 .ndo_poll_controller = vmxnet3_netpoll,
2408#endif
2409 };
2410 int err;
2411 bool dma64 = false; /* stupid gcc */
2412 u32 ver;
2413 struct net_device *netdev;
2414 struct vmxnet3_adapter *adapter;
2415 u8 mac[ETH_ALEN];
2416
2417 netdev = alloc_etherdev(sizeof(struct vmxnet3_adapter));
2418 if (!netdev) {
2419 printk(KERN_ERR "Failed to alloc ethernet device for adapter "
2420 "%s\n", pci_name(pdev));
2421 return -ENOMEM;
2422 }
2423
2424 pci_set_drvdata(pdev, netdev);
2425 adapter = netdev_priv(netdev);
2426 adapter->netdev = netdev;
2427 adapter->pdev = pdev;
2428
2429 adapter->shared = pci_alloc_consistent(adapter->pdev,
2430 sizeof(struct Vmxnet3_DriverShared),
2431 &adapter->shared_pa);
2432 if (!adapter->shared) {
2433 printk(KERN_ERR "Failed to allocate memory for %s\n",
2434 pci_name(pdev));
2435 err = -ENOMEM;
2436 goto err_alloc_shared;
2437 }
2438
2439 adapter->tqd_start = pci_alloc_consistent(adapter->pdev,
2440 sizeof(struct Vmxnet3_TxQueueDesc) +
2441 sizeof(struct Vmxnet3_RxQueueDesc),
2442 &adapter->queue_desc_pa);
2443
2444 if (!adapter->tqd_start) {
2445 printk(KERN_ERR "Failed to allocate memory for %s\n",
2446 pci_name(pdev));
2447 err = -ENOMEM;
2448 goto err_alloc_queue_desc;
2449 }
2450 adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start
2451 + 1);
2452
2453 adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL);
2454 if (adapter->pm_conf == NULL) {
2455 printk(KERN_ERR "Failed to allocate memory for %s\n",
2456 pci_name(pdev));
2457 err = -ENOMEM;
2458 goto err_alloc_pm;
2459 }
2460
2461 err = vmxnet3_alloc_pci_resources(adapter, &dma64);
2462 if (err < 0)
2463 goto err_alloc_pci;
2464
2465 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
2466 if (ver & 1) {
2467 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1);
2468 } else {
2469 printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter"
2470 " %s\n", ver, pci_name(pdev));
2471 err = -EBUSY;
2472 goto err_ver;
2473 }
2474
2475 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
2476 if (ver & 1) {
2477 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
2478 } else {
2479 printk(KERN_ERR "Incompatible upt version (0x%x) for "
2480 "adapter %s\n", ver, pci_name(pdev));
2481 err = -EBUSY;
2482 goto err_ver;
2483 }
2484
2485 vmxnet3_declare_features(adapter, dma64);
2486
2487 adapter->dev_number = atomic_read(&devices_found);
2488 vmxnet3_alloc_intr_resources(adapter);
2489
2490 vmxnet3_read_mac_addr(adapter, mac);
2491 memcpy(netdev->dev_addr, mac, netdev->addr_len);
2492
2493 netdev->netdev_ops = &vmxnet3_netdev_ops;
2494 netdev->watchdog_timeo = 5 * HZ;
2495 vmxnet3_set_ethtool_ops(netdev);
2496
2497 INIT_WORK(&adapter->work, vmxnet3_reset_work);
2498
2499 netif_napi_add(netdev, &adapter->napi, vmxnet3_poll, 64);
2500 SET_NETDEV_DEV(netdev, &pdev->dev);
2501 err = register_netdev(netdev);
2502
2503 if (err) {
2504 printk(KERN_ERR "Failed to register adapter %s\n",
2505 pci_name(pdev));
2506 goto err_register;
2507 }
2508
2509 set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
4a1745fc 2510 vmxnet3_check_link(adapter, false);
d1a890fa
SB		 2511 atomic_inc(&devices_found);
2512 return 0;
2513
2514err_register:
2515 vmxnet3_free_intr_resources(adapter);
2516err_ver:
2517 vmxnet3_free_pci_resources(adapter);
2518err_alloc_pci:
2519 kfree(adapter->pm_conf);
2520err_alloc_pm:
2521 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) +
2522 sizeof(struct Vmxnet3_RxQueueDesc),
2523 adapter->tqd_start, adapter->queue_desc_pa);
2524err_alloc_queue_desc:
2525 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
2526 adapter->shared, adapter->shared_pa);
2527err_alloc_shared:
2528 pci_set_drvdata(pdev, NULL);
2529 free_netdev(netdev);
2530 return err;
2531}
2532
2533
2534static void __devexit
2535vmxnet3_remove_device(struct pci_dev *pdev)
2536{
2537 struct net_device *netdev = pci_get_drvdata(pdev);
2538 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2539
2540 flush_scheduled_work();
2541
2542 unregister_netdev(netdev);
2543
2544 vmxnet3_free_intr_resources(adapter);
2545 vmxnet3_free_pci_resources(adapter);
2546 kfree(adapter->pm_conf);
2547 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) +
2548 sizeof(struct Vmxnet3_RxQueueDesc),
2549 adapter->tqd_start, adapter->queue_desc_pa);
2550 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
2551 adapter->shared, adapter->shared_pa);
2552 free_netdev(netdev);
2553}
2554
2555
2556#ifdef CONFIG_PM
2557
2558static int
2559vmxnet3_suspend(struct device *device)
2560{
2561 struct pci_dev *pdev = to_pci_dev(device);
2562 struct net_device *netdev = pci_get_drvdata(pdev);
2563 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2564 struct Vmxnet3_PMConf *pmConf;
2565 struct ethhdr *ehdr;
2566 struct arphdr *ahdr;
2567 u8 *arpreq;
2568 struct in_device *in_dev;
2569 struct in_ifaddr *ifa;
2570 int i = 0;
2571
2572 if (!netif_running(netdev))
2573 return 0;
2574
2575 vmxnet3_disable_all_intrs(adapter);
2576 vmxnet3_free_irqs(adapter);
2577 vmxnet3_free_intr_resources(adapter);
2578
2579 netif_device_detach(netdev);
2580 netif_stop_queue(netdev);
2581
2582 /* Create wake-up filters. */
2583 pmConf = adapter->pm_conf;
2584 memset(pmConf, 0, sizeof(*pmConf));
2585
2586 if (adapter->wol & WAKE_UCAST) {
2587 pmConf->filters[i].patternSize = ETH_ALEN;
2588 pmConf->filters[i].maskSize = 1;
2589 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
2590 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
2591
115924b6 2592 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER);
d1a890fa
SB		 2593 i++;
2594 }
2595
2596 if (adapter->wol & WAKE_ARP) {
2597 in_dev = in_dev_get(netdev);
2598 if (!in_dev)
2599 goto skip_arp;
2600
2601 ifa = (struct in_ifaddr *)in_dev->ifa_list;
2602 if (!ifa)
2603 goto skip_arp;
2604
2605 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
2606 sizeof(struct arphdr) + /* ARP header */
2607 2 * ETH_ALEN + /* 2 Ethernet addresses*/
2608 2 * sizeof(u32); /*2 IPv4 addresses */
2609 pmConf->filters[i].maskSize =
2610 (pmConf->filters[i].patternSize - 1) / 8 + 1;
2611
2612 /* ETH_P_ARP in Ethernet header. */
2613 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
2614 ehdr->h_proto = htons(ETH_P_ARP);
2615
2616 /* ARPOP_REQUEST in ARP header. */
2617 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
2618 ahdr->ar_op = htons(ARPOP_REQUEST);
2619 arpreq = (u8 *)(ahdr + 1);
2620
2621 /* The Unicast IPv4 address in 'tip' field. */
2622 arpreq += 2 * ETH_ALEN + sizeof(u32);
2623 *(u32 *)arpreq = ifa->ifa_address;
2624
2625 /* The mask for the relevant bits. */
2626 pmConf->filters[i].mask[0] = 0x00;
2627 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
2628 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
2629 pmConf->filters[i].mask[3] = 0x00;
2630 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
2631 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
2632 in_dev_put(in_dev);
2633
115924b6 2634 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER);
d1a890fa
SB		 2635 i++;
2636 }
2637
2638skip_arp:
2639 if (adapter->wol & WAKE_MAGIC)
115924b6 2640 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_MAGIC);
d1a890fa
SB		 2641
2642 pmConf->numFilters = i;
2643
115924b6
SB		 2644 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
2645 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
2646 *pmConf));
2647 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
2648 pmConf));
d1a890fa
SB		 2649
2650 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2651 VMXNET3_CMD_UPDATE_PMCFG);
2652
2653 pci_save_state(pdev);
2654 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
2655 adapter->wol);
2656 pci_disable_device(pdev);
2657 pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
2658
2659 return 0;
2660}
2661
2662
2663static int
2664vmxnet3_resume(struct device *device)
2665{
2666 int err;
2667 struct pci_dev *pdev = to_pci_dev(device);
2668 struct net_device *netdev = pci_get_drvdata(pdev);
2669 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2670 struct Vmxnet3_PMConf *pmConf;
2671
2672 if (!netif_running(netdev))
2673 return 0;
2674
2675 /* Destroy wake-up filters. */
2676 pmConf = adapter->pm_conf;
2677 memset(pmConf, 0, sizeof(*pmConf));
2678
115924b6
SB		 2679 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
2680 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
2681 *pmConf));
2682 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le32(virt_to_phys(
2683 pmConf));
d1a890fa
SB		 2684
2685 netif_device_attach(netdev);
2686 pci_set_power_state(pdev, PCI_D0);
2687 pci_restore_state(pdev);
2688 err = pci_enable_device_mem(pdev);
2689 if (err != 0)
2690 return err;
2691
2692 pci_enable_wake(pdev, PCI_D0, 0);
2693
2694 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2695 VMXNET3_CMD_UPDATE_PMCFG);
2696 vmxnet3_alloc_intr_resources(adapter);
2697 vmxnet3_request_irqs(adapter);
2698 vmxnet3_enable_all_intrs(adapter);
2699
2700 return 0;
2701}
2702
47145210 2703static const struct dev_pm_ops vmxnet3_pm_ops = {
d1a890fa
SB		 2704 .suspend = vmxnet3_suspend,
2705 .resume = vmxnet3_resume,
2706};
2707#endif
2708
2709static struct pci_driver vmxnet3_driver = {
2710 .name = vmxnet3_driver_name,
2711 .id_table = vmxnet3_pciid_table,
2712 .probe = vmxnet3_probe_device,
2713 .remove = __devexit_p(vmxnet3_remove_device),
2714#ifdef CONFIG_PM
2715 .driver.pm = &vmxnet3_pm_ops,
2716#endif
2717};
2718
2719
2720static int __init
2721vmxnet3_init_module(void)
2722{
2723 printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC,
2724 VMXNET3_DRIVER_VERSION_REPORT);
2725 return pci_register_driver(&vmxnet3_driver);
2726}
2727
2728module_init(vmxnet3_init_module);
2729
2730
2731static void
2732vmxnet3_exit_module(void)
2733{
2734 pci_unregister_driver(&vmxnet3_driver);
2735}
2736
2737module_exit(vmxnet3_exit_module);
2738
2739MODULE_AUTHOR("VMware, Inc.");
2740MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
2741MODULE_LICENSE("GPL v2");
2742MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);
Clone of davem's net-next-2.6 tree