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1da177e4
LT		 1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
1da177e4
LT		 11 * rx_copybreak/alignment
12 * Scatter gather
13 * More testing
14 *
113aa838 15 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk>
1da177e4
LT		 16 * Additional fixes and clean up: Francois Romieu
17 *
18 * This source has not been verified for use in safety critical systems.
19 *
20 * Please direct queries about the revamped driver to the linux-kernel
21 * list not VIA.
22 *
23 * Original code:
24 *
25 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
26 * All rights reserved.
27 *
28 * This software may be redistributed and/or modified under
29 * the terms of the GNU General Public License as published by the Free
30 * Software Foundation; either version 2 of the License, or
31 * any later version.
32 *
33 * This program is distributed in the hope that it will be useful, but
34 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
35 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
36 * for more details.
37 *
38 * Author: Chuang Liang-Shing, AJ Jiang
39 *
40 * Date: Jan 24, 2003
41 *
42 * MODULE_LICENSE("GPL");
43 *
44 */
45
46
47#include <linux/module.h>
48#include <linux/types.h>
1da177e4
LT		 49#include <linux/init.h>
50#include <linux/mm.h>
51#include <linux/errno.h>
52#include <linux/ioport.h>
53#include <linux/pci.h>
54#include <linux/kernel.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/skbuff.h>
58#include <linux/delay.h>
59#include <linux/timer.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
1da177e4
LT		 62#include <linux/string.h>
63#include <linux/wait.h>
c4067400 64#include <linux/io.h>
1da177e4 65#include <linux/if.h>
c4067400 66#include <linux/uaccess.h>
1da177e4
LT		 67#include <linux/proc_fs.h>
68#include <linux/inetdevice.h>
69#include <linux/reboot.h>
70#include <linux/ethtool.h>
71#include <linux/mii.h>
72#include <linux/in.h>
73#include <linux/if_arp.h>
501e4d24 74#include <linux/if_vlan.h>
1da177e4
LT		 75#include <linux/ip.h>
76#include <linux/tcp.h>
77#include <linux/udp.h>
78#include <linux/crc-ccitt.h>
79#include <linux/crc32.h>
80
81#include "via-velocity.h"
82
83
c4067400 84static int velocity_nics;
1da177e4
LT		 85static int msglevel = MSG_LEVEL_INFO;
86
01faccbf
SH		 87/**
88 * mac_get_cam_mask - Read a CAM mask
89 * @regs: register block for this velocity
90 * @mask: buffer to store mask
91 *
92 * Fetch the mask bits of the selected CAM and store them into the
93 * provided mask buffer.
94 */
c4067400 95static void mac_get_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
01faccbf
SH		 96{
97 int i;
98
99 /* Select CAM mask */
100 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
101
102 writeb(0, &regs->CAMADDR);
103
104 /* read mask */
105 for (i = 0; i < 8; i++)
106 *mask++ = readb(&(regs->MARCAM[i]));
107
108 /* disable CAMEN */
109 writeb(0, &regs->CAMADDR);
110
111 /* Select mar */
112 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
01faccbf
SH		 113}
114
115
116/**
117 * mac_set_cam_mask - Set a CAM mask
118 * @regs: register block for this velocity
119 * @mask: CAM mask to load
120 *
121 * Store a new mask into a CAM
122 */
c4067400 123static void mac_set_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
01faccbf
SH		 124{
125 int i;
126 /* Select CAM mask */
127 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
128
129 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
130
c4067400 131 for (i = 0; i < 8; i++)
01faccbf 132 writeb(*mask++, &(regs->MARCAM[i]));
c4067400 133
01faccbf
SH		 134 /* disable CAMEN */
135 writeb(0, &regs->CAMADDR);
136
137 /* Select mar */
138 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
139}
140
c4067400 141static void mac_set_vlan_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
01faccbf
SH		 142{
143 int i;
144 /* Select CAM mask */
145 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
146
147 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
148
c4067400 149 for (i = 0; i < 8; i++)
01faccbf 150 writeb(*mask++, &(regs->MARCAM[i]));
c4067400 151
01faccbf
SH		 152 /* disable CAMEN */
153 writeb(0, &regs->CAMADDR);
154
155 /* Select mar */
156 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
157}
158
159/**
160 * mac_set_cam - set CAM data
161 * @regs: register block of this velocity
162 * @idx: Cam index
163 * @addr: 2 or 6 bytes of CAM data
164 *
165 * Load an address or vlan tag into a CAM
166 */
c4067400 167static void mac_set_cam(struct mac_regs __iomem *regs, int idx, const u8 *addr)
01faccbf
SH		 168{
169 int i;
170
171 /* Select CAM mask */
172 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
173
174 idx &= (64 - 1);
175
176 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
177
c4067400 178 for (i = 0; i < 6; i++)
01faccbf 179 writeb(*addr++, &(regs->MARCAM[i]));
c4067400 180
01faccbf
SH		 181 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
182
183 udelay(10);
184
185 writeb(0, &regs->CAMADDR);
186
187 /* Select mar */
188 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
189}
190
c4067400 191static void mac_set_vlan_cam(struct mac_regs __iomem *regs, int idx,
01faccbf
SH		 192 const u8 *addr)
193{
194
195 /* Select CAM mask */
196 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
197
198 idx &= (64 - 1);
199
200 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
201 writew(*((u16 *) addr), &regs->MARCAM[0]);
202
203 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
204
205 udelay(10);
206
207 writeb(0, &regs->CAMADDR);
208
209 /* Select mar */
210 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
211}
212
213
214/**
215 * mac_wol_reset - reset WOL after exiting low power
216 * @regs: register block of this velocity
217 *
218 * Called after we drop out of wake on lan mode in order to
219 * reset the Wake on lan features. This function doesn't restore
220 * the rest of the logic from the result of sleep/wakeup
221 */
c4067400 222static void mac_wol_reset(struct mac_regs __iomem *regs)
01faccbf
SH		 223{
224
225 /* Turn off SWPTAG right after leaving power mode */
226 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
227 /* clear sticky bits */
228 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
229
230 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
231 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
232 /* disable force PME-enable */
233 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
234 /* disable power-event config bit */
235 writew(0xFFFF, &regs->WOLCRClr);
236 /* clear power status */
237 writew(0xFFFF, &regs->WOLSRClr);
238}
1da177e4 239
7282d491 240static const struct ethtool_ops velocity_ethtool_ops;
1da177e4
LT		 241
242/*
243 Define module options
244*/
245
246MODULE_AUTHOR("VIA Networking Technologies, Inc.");
247MODULE_LICENSE("GPL");
248MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
249
c4067400
DJ		 250#define VELOCITY_PARAM(N, D) \
251 static int N[MAX_UNITS] = OPTION_DEFAULT;\
1da177e4 252 module_param_array(N, int, NULL, 0); \
c4067400 253 MODULE_PARM_DESC(N, D);
1da177e4
LT		 254
255#define RX_DESC_MIN 64
256#define RX_DESC_MAX 255
257#define RX_DESC_DEF 64
258VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
259
260#define TX_DESC_MIN 16
261#define TX_DESC_MAX 256
262#define TX_DESC_DEF 64
263VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
264
1da177e4
LT		 265#define RX_THRESH_MIN 0
266#define RX_THRESH_MAX 3
267#define RX_THRESH_DEF 0
268/* rx_thresh[] is used for controlling the receive fifo threshold.
269 0: indicate the rxfifo threshold is 128 bytes.
270 1: indicate the rxfifo threshold is 512 bytes.
271 2: indicate the rxfifo threshold is 1024 bytes.
272 3: indicate the rxfifo threshold is store & forward.
273*/
274VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
275
276#define DMA_LENGTH_MIN 0
277#define DMA_LENGTH_MAX 7
278#define DMA_LENGTH_DEF 0
279
280/* DMA_length[] is used for controlling the DMA length
281 0: 8 DWORDs
282 1: 16 DWORDs
283 2: 32 DWORDs
284 3: 64 DWORDs
285 4: 128 DWORDs
286 5: 256 DWORDs
287 6: SF(flush till emply)
288 7: SF(flush till emply)
289*/
290VELOCITY_PARAM(DMA_length, "DMA length");
291
1da177e4
LT		 292#define IP_ALIG_DEF 0
293/* IP_byte_align[] is used for IP header DWORD byte aligned
294 0: indicate the IP header won't be DWORD byte aligned.(Default) .
295 1: indicate the IP header will be DWORD byte aligned.
296 In some enviroment, the IP header should be DWORD byte aligned,
297 or the packet will be droped when we receive it. (eg: IPVS)
298*/
299VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
300
301#define TX_CSUM_DEF 1
302/* txcsum_offload[] is used for setting the checksum offload ability of NIC.
303 (We only support RX checksum offload now)
304 0: disable csum_offload[checksum offload
305 1: enable checksum offload. (Default)
306*/
307VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
308
309#define FLOW_CNTL_DEF 1
310#define FLOW_CNTL_MIN 1
311#define FLOW_CNTL_MAX 5
312
313/* flow_control[] is used for setting the flow control ability of NIC.
314 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
315 2: enable TX flow control.
316 3: enable RX flow control.
317 4: enable RX/TX flow control.
318 5: disable
319*/
320VELOCITY_PARAM(flow_control, "Enable flow control ability");
321
322#define MED_LNK_DEF 0
323#define MED_LNK_MIN 0
324#define MED_LNK_MAX 4
325/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
326 0: indicate autonegotiation for both speed and duplex mode
327 1: indicate 100Mbps half duplex mode
328 2: indicate 100Mbps full duplex mode
329 3: indicate 10Mbps half duplex mode
330 4: indicate 10Mbps full duplex mode
331
332 Note:
c4067400
DJ		 333 if EEPROM have been set to the force mode, this option is ignored
334 by driver.
1da177e4
LT		 335*/
336VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
337
338#define VAL_PKT_LEN_DEF 0
339/* ValPktLen[] is used for setting the checksum offload ability of NIC.
340 0: Receive frame with invalid layer 2 length (Default)
341 1: Drop frame with invalid layer 2 length
342*/
343VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
344
345#define WOL_OPT_DEF 0
346#define WOL_OPT_MIN 0
347#define WOL_OPT_MAX 7
348/* wol_opts[] is used for controlling wake on lan behavior.
349 0: Wake up if recevied a magic packet. (Default)
350 1: Wake up if link status is on/off.
351 2: Wake up if recevied an arp packet.
352 4: Wake up if recevied any unicast packet.
353 Those value can be sumed up to support more than one option.
354*/
355VELOCITY_PARAM(wol_opts, "Wake On Lan options");
356
357#define INT_WORKS_DEF 20
358#define INT_WORKS_MIN 10
359#define INT_WORKS_MAX 64
360
361VELOCITY_PARAM(int_works, "Number of packets per interrupt services");
362
363static int rx_copybreak = 200;
364module_param(rx_copybreak, int, 0644);
365MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
366
1da177e4 367#ifdef CONFIG_PM
ce9f7fe3
RD		 368static DEFINE_SPINLOCK(velocity_dev_list_lock);
369static LIST_HEAD(velocity_dev_list);
ce9f7fe3 370#endif
1da177e4
LT		 371
372/*
373 * Internal board variants. At the moment we have only one
374 */
4f14b92f 375static struct velocity_info_tbl chip_info_table[] = {
cabb7667
JG		 376 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
377 { }
1da177e4
LT		 378};
379
380/*
381 * Describe the PCI device identifiers that we support in this
382 * device driver. Used for hotplug autoloading.
383 */
e54f4893
JG		 384static const struct pci_device_id velocity_id_table[] __devinitdata = {
385 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
386 { }
1da177e4
LT		 387};
388
389MODULE_DEVICE_TABLE(pci, velocity_id_table);
390
391/**
392 * get_chip_name - identifier to name
393 * @id: chip identifier
394 *
395 * Given a chip identifier return a suitable description. Returns
396 * a pointer a static string valid while the driver is loaded.
397 */
01faccbf 398static const char __devinit *get_chip_name(enum chip_type chip_id)
1da177e4
LT		 399{
400 int i;
401 for (i = 0; chip_info_table[i].name != NULL; i++)
402 if (chip_info_table[i].chip_id == chip_id)
403 break;
404 return chip_info_table[i].name;
405}
406
407/**
408 * velocity_remove1 - device unplug
409 * @pdev: PCI device being removed
410 *
411 * Device unload callback. Called on an unplug or on module
412 * unload for each active device that is present. Disconnects
413 * the device from the network layer and frees all the resources
414 */
1da177e4
LT		 415static void __devexit velocity_remove1(struct pci_dev *pdev)
416{
417 struct net_device *dev = pci_get_drvdata(pdev);
8ab6f3f7 418 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 419
420#ifdef CONFIG_PM
421 unsigned long flags;
422
423 spin_lock_irqsave(&velocity_dev_list_lock, flags);
424 if (!list_empty(&velocity_dev_list))
425 list_del(&vptr->list);
426 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
427#endif
428 unregister_netdev(dev);
429 iounmap(vptr->mac_regs);
430 pci_release_regions(pdev);
431 pci_disable_device(pdev);
432 pci_set_drvdata(pdev, NULL);
433 free_netdev(dev);
434
435 velocity_nics--;
436}
437
438/**
439 * velocity_set_int_opt - parser for integer options
440 * @opt: pointer to option value
441 * @val: value the user requested (or -1 for default)
442 * @min: lowest value allowed
443 * @max: highest value allowed
444 * @def: default value
445 * @name: property name
446 * @dev: device name
447 *
448 * Set an integer property in the module options. This function does
449 * all the verification and checking as well as reporting so that
450 * we don't duplicate code for each option.
451 */
07b5f6a6 452static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, const char *devname)
1da177e4
LT		 453{
454 if (val == -1)
455 *opt = def;
456 else if (val < min || val > max) {
457 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
458 devname, name, min, max);
459 *opt = def;
460 } else {
461 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
462 devname, name, val);
463 *opt = val;
464 }
465}
466
467/**
468 * velocity_set_bool_opt - parser for boolean options
469 * @opt: pointer to option value
470 * @val: value the user requested (or -1 for default)
471 * @def: default value (yes/no)
472 * @flag: numeric value to set for true.
473 * @name: property name
474 * @dev: device name
475 *
476 * Set a boolean property in the module options. This function does
477 * all the verification and checking as well as reporting so that
478 * we don't duplicate code for each option.
479 */
c4067400 480static void __devinit velocity_set_bool_opt(u32 *opt, int val, int def, u32 flag, char *name, const char *devname)
1da177e4
LT		 481{
482 (*opt) &= (~flag);
483 if (val == -1)
484 *opt |= (def ? flag : 0);
485 else if (val < 0 || val > 1) {
6aa20a22 486 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT		 487 devname, name);
488 *opt |= (def ? flag : 0);
489 } else {
6aa20a22 490 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT		 491 devname, name, val ? "TRUE" : "FALSE");
492 *opt |= (val ? flag : 0);
493 }
494}
495
496/**
497 * velocity_get_options - set options on device
498 * @opts: option structure for the device
499 * @index: index of option to use in module options array
500 * @devname: device name
501 *
502 * Turn the module and command options into a single structure
503 * for the current device
504 */
07b5f6a6 505static void __devinit velocity_get_options(struct velocity_opt *opts, int index, const char *devname)
1da177e4
LT		 506{
507
508 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
509 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
510 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
511 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
501e4d24 512
1da177e4
LT		 513 velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname);
514 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
515 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
516 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
517 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
518 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
519 velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname);
520 opts->numrx = (opts->numrx & ~3);
521}
522
523/**
524 * velocity_init_cam_filter - initialise CAM
525 * @vptr: velocity to program
526 *
527 * Initialize the content addressable memory used for filters. Load
528 * appropriately according to the presence of VLAN
529 */
1da177e4
LT		 530static void velocity_init_cam_filter(struct velocity_info *vptr)
531{
c4067400 532 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4
LT		 533
534 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
535 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
536 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
537
538 /* Disable all CAMs */
539 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
540 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
01faccbf
SH		 541 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
542 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4 543
d4f73c8e 544 /* Enable VCAMs */
501e4d24 545 if (vptr->vlgrp) {
d4f73c8e
FR		 546 unsigned int vid, i = 0;
547
548 if (!vlan_group_get_device(vptr->vlgrp, 0))
549 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
501e4d24 550
d4f73c8e
FR		 551 for (vid = 1; (vid < VLAN_VID_MASK); vid++) {
552 if (vlan_group_get_device(vptr->vlgrp, vid)) {
553 mac_set_vlan_cam(regs, i, (u8 *) &vid);
554 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
555 if (++i >= VCAM_SIZE)
556 break;
501e4d24
SH		 557 }
558 }
01faccbf 559 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
1da177e4
LT		 560 }
561}
562
d4f73c8e
FR		 563static void velocity_vlan_rx_register(struct net_device *dev,
564 struct vlan_group *grp)
565{
566 struct velocity_info *vptr = netdev_priv(dev);
567
568 vptr->vlgrp = grp;
569}
570
501e4d24
SH		 571static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
572{
573 struct velocity_info *vptr = netdev_priv(dev);
574
c4067400 575 spin_lock_irq(&vptr->lock);
501e4d24 576 velocity_init_cam_filter(vptr);
c4067400 577 spin_unlock_irq(&vptr->lock);
501e4d24
SH		 578}
579
580static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
581{
582 struct velocity_info *vptr = netdev_priv(dev);
583
c4067400 584 spin_lock_irq(&vptr->lock);
501e4d24
SH		 585 vlan_group_set_device(vptr->vlgrp, vid, NULL);
586 velocity_init_cam_filter(vptr);
c4067400 587 spin_unlock_irq(&vptr->lock);
501e4d24
SH		 588}
589
3c4dc711
FR		 590static void velocity_init_rx_ring_indexes(struct velocity_info *vptr)
591{
592 vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0;
593}
501e4d24 594
1da177e4
LT		 595/**
596 * velocity_rx_reset - handle a receive reset
597 * @vptr: velocity we are resetting
598 *
599 * Reset the ownership and status for the receive ring side.
600 * Hand all the receive queue to the NIC.
601 */
1da177e4
LT		 602static void velocity_rx_reset(struct velocity_info *vptr)
603{
604
c4067400 605 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4
LT		 606 int i;
607
3c4dc711 608 velocity_init_rx_ring_indexes(vptr);
1da177e4
LT		 609
610 /*
611 * Init state, all RD entries belong to the NIC
612 */
613 for (i = 0; i < vptr->options.numrx; ++i)
0fe9f15e 614 vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 615
616 writew(vptr->options.numrx, &regs->RBRDU);
0fe9f15e 617 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1da177e4
LT		 618 writew(0, &regs->RDIdx);
619 writew(vptr->options.numrx - 1, &regs->RDCSize);
620}
621
622/**
2cf71d2e
DJ		 623 * velocity_get_opt_media_mode - get media selection
624 * @vptr: velocity adapter
1da177e4 625 *
2cf71d2e
DJ		 626 * Get the media mode stored in EEPROM or module options and load
627 * mii_status accordingly. The requested link state information
628 * is also returned.
1da177e4 629 */
2cf71d2e 630static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
1da177e4 631{
2cf71d2e 632 u32 status = 0;
1da177e4 633
2cf71d2e
DJ		 634 switch (vptr->options.spd_dpx) {
635 case SPD_DPX_AUTO:
636 status = VELOCITY_AUTONEG_ENABLE;
1da177e4 637 break;
2cf71d2e
DJ		 638 case SPD_DPX_100_FULL:
639 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
640 break;
641 case SPD_DPX_10_FULL:
642 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
643 break;
644 case SPD_DPX_100_HALF:
645 status = VELOCITY_SPEED_100;
646 break;
647 case SPD_DPX_10_HALF:
648 status = VELOCITY_SPEED_10;
649 break;
650 }
651 vptr->mii_status = status;
652 return status;
653}
1da177e4 654
2cf71d2e
DJ		 655/**
656 * safe_disable_mii_autopoll - autopoll off
657 * @regs: velocity registers
658 *
659 * Turn off the autopoll and wait for it to disable on the chip
660 */
661static void safe_disable_mii_autopoll(struct mac_regs __iomem *regs)
662{
663 u16 ww;
1da177e4 664
2cf71d2e
DJ		 665 /* turn off MAUTO */
666 writeb(0, &regs->MIICR);
667 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
668 udelay(1);
669 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
670 break;
671 }
672}
1da177e4 673
2cf71d2e
DJ		 674/**
675 * enable_mii_autopoll - turn on autopolling
676 * @regs: velocity registers
677 *
678 * Enable the MII link status autopoll feature on the Velocity
679 * hardware. Wait for it to enable.
680 */
681static void enable_mii_autopoll(struct mac_regs __iomem *regs)
682{
683 int ii;
1da177e4 684
2cf71d2e
DJ		 685 writeb(0, &(regs->MIICR));
686 writeb(MIIADR_SWMPL, &regs->MIIADR);
1da177e4 687
2cf71d2e
DJ		 688 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
689 udelay(1);
690 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
691 break;
692 }
1da177e4 693
2cf71d2e 694 writeb(MIICR_MAUTO, &regs->MIICR);
1da177e4 695
2cf71d2e
DJ		 696 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
697 udelay(1);
698 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
699 break;
700 }
1da177e4 701
2cf71d2e 702}
1da177e4 703
2cf71d2e
DJ		 704/**
705 * velocity_mii_read - read MII data
706 * @regs: velocity registers
707 * @index: MII register index
708 * @data: buffer for received data
709 *
710 * Perform a single read of an MII 16bit register. Returns zero
711 * on success or -ETIMEDOUT if the PHY did not respond.
712 */
713static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
714{
715 u16 ww;
1da177e4 716
2cf71d2e
DJ		 717 /*
718 * Disable MIICR_MAUTO, so that mii addr can be set normally
719 */
720 safe_disable_mii_autopoll(regs);
1da177e4 721
2cf71d2e 722 writeb(index, &regs->MIIADR);
1da177e4 723
2cf71d2e 724 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
1da177e4 725
2cf71d2e
DJ		 726 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
727 if (!(readb(&regs->MIICR) & MIICR_RCMD))
728 break;
729 }
1da177e4 730
2cf71d2e 731 *data = readw(&regs->MIIDATA);
1da177e4 732
2cf71d2e
DJ		 733 enable_mii_autopoll(regs);
734 if (ww == W_MAX_TIMEOUT)
735 return -ETIMEDOUT;
736 return 0;
1da177e4
LT		 737}
738
2cf71d2e 739
1da177e4 740/**
2cf71d2e
DJ		 741 * mii_check_media_mode - check media state
742 * @regs: velocity registers
1da177e4 743 *
2cf71d2e
DJ		 744 * Check the current MII status and determine the link status
745 * accordingly
1da177e4 746 */
2cf71d2e 747static u32 mii_check_media_mode(struct mac_regs __iomem *regs)
1da177e4 748{
2cf71d2e
DJ		 749 u32 status = 0;
750 u16 ANAR;
1da177e4 751
2cf71d2e
DJ		 752 if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
753 status |= VELOCITY_LINK_FAIL;
1da177e4 754
2cf71d2e
DJ		 755 if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
756 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
757 else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
758 status |= (VELOCITY_SPEED_1000);
759 else {
760 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
761 if (ANAR & ANAR_TXFD)
762 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
763 else if (ANAR & ANAR_TX)
764 status |= VELOCITY_SPEED_100;
765 else if (ANAR & ANAR_10FD)
766 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
767 else
768 status |= (VELOCITY_SPEED_10);
1da177e4
LT		 769 }
770
2cf71d2e
DJ		 771 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
772 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
773 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
774 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
775 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
776 status |= VELOCITY_AUTONEG_ENABLE;
777 }
1da177e4 778 }
1da177e4 779
2cf71d2e
DJ		 780 return status;
781}
39a11bd9 782
1da177e4 783/**
2cf71d2e
DJ		 784 * velocity_mii_write - write MII data
785 * @regs: velocity registers
786 * @index: MII register index
787 * @data: 16bit data for the MII register
1da177e4 788 *
2cf71d2e
DJ		 789 * Perform a single write to an MII 16bit register. Returns zero
790 * on success or -ETIMEDOUT if the PHY did not respond.
1da177e4 791 */
2cf71d2e 792static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
1da177e4 793{
2cf71d2e 794 u16 ww;
1da177e4 795
2cf71d2e
DJ		 796 /*
797 * Disable MIICR_MAUTO, so that mii addr can be set normally
e54f4893 798 */
2cf71d2e 799 safe_disable_mii_autopoll(regs);
1da177e4 800
2cf71d2e
DJ		 801 /* MII reg offset */
802 writeb(mii_addr, &regs->MIIADR);
803 /* set MII data */
804 writew(data, &regs->MIIDATA);
805
806 /* turn on MIICR_WCMD */
807 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
808
809 /* W_MAX_TIMEOUT is the timeout period */
810 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
811 udelay(5);
812 if (!(readb(&regs->MIICR) & MIICR_WCMD))
813 break;
1da177e4 814 }
2cf71d2e 815 enable_mii_autopoll(regs);
6aa20a22 816
2cf71d2e
DJ		 817 if (ww == W_MAX_TIMEOUT)
818 return -ETIMEDOUT;
819 return 0;
820}
6aa20a22 821
2cf71d2e
DJ		 822/**
823 * set_mii_flow_control - flow control setup
824 * @vptr: velocity interface
825 *
826 * Set up the flow control on this interface according to
827 * the supplied user/eeprom options.
828 */
829static void set_mii_flow_control(struct velocity_info *vptr)
830{
831 /*Enable or Disable PAUSE in ANAR */
832 switch (vptr->options.flow_cntl) {
833 case FLOW_CNTL_TX:
834 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
835 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
836 break;
1da177e4 837
2cf71d2e
DJ		 838 case FLOW_CNTL_RX:
839 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
840 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
841 break;
1da177e4 842
2cf71d2e
DJ		 843 case FLOW_CNTL_TX_RX:
844 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
845 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
846 break;
1da177e4 847
2cf71d2e
DJ		 848 case FLOW_CNTL_DISABLE:
849 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
850 MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
851 break;
852 default:
853 break;
854 }
855}
1da177e4 856
2cf71d2e
DJ		 857/**
858 * mii_set_auto_on - autonegotiate on
859 * @vptr: velocity
860 *
861 * Enable autonegotation on this interface
862 */
863static void mii_set_auto_on(struct velocity_info *vptr)
864{
865 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
866 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
867 else
868 MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
869}
1da177e4 870
2cf71d2e
DJ		 871static u32 check_connection_type(struct mac_regs __iomem *regs)
872{
873 u32 status = 0;
874 u8 PHYSR0;
875 u16 ANAR;
876 PHYSR0 = readb(&regs->PHYSR0);
1da177e4 877
2cf71d2e
DJ		 878 /*
879 if (!(PHYSR0 & PHYSR0_LINKGD))
880 status|=VELOCITY_LINK_FAIL;
881 */
1da177e4 882
2cf71d2e
DJ		 883 if (PHYSR0 & PHYSR0_FDPX)
884 status |= VELOCITY_DUPLEX_FULL;
1da177e4 885
2cf71d2e
DJ		 886 if (PHYSR0 & PHYSR0_SPDG)
887 status |= VELOCITY_SPEED_1000;
888 else if (PHYSR0 & PHYSR0_SPD10)
889 status |= VELOCITY_SPEED_10;
890 else
891 status |= VELOCITY_SPEED_100;
1da177e4 892
2cf71d2e
DJ		 893 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
894 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
895 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
896 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
897 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
898 status |= VELOCITY_AUTONEG_ENABLE;
899 }
1da177e4
LT		 900 }
901
2cf71d2e
DJ		 902 return status;
903}
1da177e4 904
1da177e4 905
1da177e4 906
2cf71d2e
DJ		 907/**
908 * velocity_set_media_mode - set media mode
909 * @mii_status: old MII link state
910 *
911 * Check the media link state and configure the flow control
912 * PHY and also velocity hardware setup accordingly. In particular
913 * we need to set up CD polling and frame bursting.
914 */
915static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
916{
917 u32 curr_status;
918 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4 919
2cf71d2e
DJ		 920 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
921 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
07b5f6a6 922
2cf71d2e
DJ		 923 /* Set mii link status */
924 set_mii_flow_control(vptr);
1da177e4 925
6aa20a22 926 /*
2cf71d2e
DJ		 927 Check if new status is consisent with current status
928 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE)
929 || (mii_status==curr_status)) {
930 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
931 vptr->mii_status=check_connection_type(vptr->mac_regs);
932 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
933 return 0;
934 }
1da177e4 935 */
6aa20a22 936
2cf71d2e
DJ		 937 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
938 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
1da177e4
LT		 939
940 /*
2cf71d2e 941 * If connection type is AUTO
1da177e4 942 */
2cf71d2e
DJ		 943 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
944 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
945 /* clear force MAC mode bit */
946 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
947 /* set duplex mode of MAC according to duplex mode of MII */
948 MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs);
949 MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
950 MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs);
6aa20a22 951
2cf71d2e
DJ		 952 /* enable AUTO-NEGO mode */
953 mii_set_auto_on(vptr);
954 } else {
955 u16 ANAR;
956 u8 CHIPGCR;
1da177e4 957
2cf71d2e
DJ		 958 /*
959 * 1. if it's 3119, disable frame bursting in halfduplex mode
960 * and enable it in fullduplex mode
961 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
962 * 3. only enable CD heart beat counter in 10HD mode
963 */
1da177e4 964
2cf71d2e
DJ		 965 /* set force MAC mode bit */
966 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
1da177e4 967
2cf71d2e
DJ		 968 CHIPGCR = readb(&regs->CHIPGCR);
969 CHIPGCR &= ~CHIPGCR_FCGMII;
501e4d24 970
2cf71d2e
DJ		 971 if (mii_status & VELOCITY_DUPLEX_FULL) {
972 CHIPGCR |= CHIPGCR_FCFDX;
973 writeb(CHIPGCR, &regs->CHIPGCR);
974 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
975 if (vptr->rev_id < REV_ID_VT3216_A0)
976 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
977 } else {
978 CHIPGCR &= ~CHIPGCR_FCFDX;
979 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
980 writeb(CHIPGCR, &regs->CHIPGCR);
981 if (vptr->rev_id < REV_ID_VT3216_A0)
982 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
983 }
1da177e4 984
2cf71d2e 985 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
1da177e4 986
2cf71d2e
DJ		 987 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10))
988 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
989 else
990 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1da177e4 991
2cf71d2e
DJ		 992 /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
993 velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
994 ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
995 if (mii_status & VELOCITY_SPEED_100) {
996 if (mii_status & VELOCITY_DUPLEX_FULL)
997 ANAR |= ANAR_TXFD;
998 else
999 ANAR |= ANAR_TX;
1000 } else {
1001 if (mii_status & VELOCITY_DUPLEX_FULL)
1002 ANAR |= ANAR_10FD;
1003 else
1004 ANAR |= ANAR_10;
1005 }
1006 velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
1007 /* enable AUTO-NEGO mode */
1008 mii_set_auto_on(vptr);
1009 /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
d3b238a0 1010 }
2cf71d2e
DJ		 1011 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
1012 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
1013 return VELOCITY_LINK_CHANGE;
1014}
8a22dddb 1015
2cf71d2e
DJ		 1016/**
1017 * velocity_print_link_status - link status reporting
1018 * @vptr: velocity to report on
1019 *
1020 * Turn the link status of the velocity card into a kernel log
1021 * description of the new link state, detailing speed and duplex
1022 * status
1023 */
1024static void velocity_print_link_status(struct velocity_info *vptr)
1025{
6aa20a22 1026
2cf71d2e
DJ		 1027 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1028 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1029 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1030 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
6aa20a22 1031
2cf71d2e
DJ		 1032 if (vptr->mii_status & VELOCITY_SPEED_1000)
1033 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1034 else if (vptr->mii_status & VELOCITY_SPEED_100)
1035 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1036 else
1037 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1da177e4 1038
2cf71d2e
DJ		 1039 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1040 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1041 else
1042 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1043 } else {
1044 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1045 switch (vptr->options.spd_dpx) {
1046 case SPD_DPX_100_HALF:
1047 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1048 break;
1049 case SPD_DPX_100_FULL:
1050 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1051 break;
1052 case SPD_DPX_10_HALF:
1053 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1054 break;
1055 case SPD_DPX_10_FULL:
1056 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1057 break;
1058 default:
1059 break;
1060 }
1da177e4 1061 }
1da177e4
LT		 1062}
1063
1064/**
2cf71d2e
DJ		 1065 * enable_flow_control_ability - flow control
1066 * @vptr: veloity to configure
1da177e4 1067 *
2cf71d2e
DJ		 1068 * Set up flow control according to the flow control options
1069 * determined by the eeprom/configuration.
1da177e4 1070 */
2cf71d2e 1071static void enable_flow_control_ability(struct velocity_info *vptr)
1da177e4 1072{
1da177e4 1073
2cf71d2e 1074 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4 1075
2cf71d2e 1076 switch (vptr->options.flow_cntl) {
1da177e4 1077
2cf71d2e
DJ		 1078 case FLOW_CNTL_DEFAULT:
1079 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
1080 writel(CR0_FDXRFCEN, &regs->CR0Set);
1081 else
1082 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1083
1084 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
1085 writel(CR0_FDXTFCEN, &regs->CR0Set);
1086 else
1087 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1088 break;
1089
1090 case FLOW_CNTL_TX:
1091 writel(CR0_FDXTFCEN, &regs->CR0Set);
1092 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1093 break;
1094
1095 case FLOW_CNTL_RX:
1096 writel(CR0_FDXRFCEN, &regs->CR0Set);
1097 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1098 break;
1099
1100 case FLOW_CNTL_TX_RX:
1101 writel(CR0_FDXTFCEN, &regs->CR0Set);
1102 writel(CR0_FDXRFCEN, &regs->CR0Set);
1103 break;
1104
1105 case FLOW_CNTL_DISABLE:
1106 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1107 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1108 break;
1109
1110 default:
1111 break;
1112 }
1da177e4 1113
1da177e4
LT		 1114}
1115
1116/**
2cf71d2e
DJ		 1117 * velocity_soft_reset - soft reset
1118 * @vptr: velocity to reset
1da177e4 1119 *
2cf71d2e
DJ		 1120 * Kick off a soft reset of the velocity adapter and then poll
1121 * until the reset sequence has completed before returning.
1da177e4 1122 */
2cf71d2e 1123static int velocity_soft_reset(struct velocity_info *vptr)
1da177e4 1124{
2cf71d2e
DJ		 1125 struct mac_regs __iomem *regs = vptr->mac_regs;
1126 int i = 0;
6aa20a22 1127
2cf71d2e 1128 writel(CR0_SFRST, &regs->CR0Set);
1da177e4 1129
2cf71d2e
DJ		 1130 for (i = 0; i < W_MAX_TIMEOUT; i++) {
1131 udelay(5);
1132 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
1133 break;
1da177e4
LT		 1134 }
1135
2cf71d2e
DJ		 1136 if (i == W_MAX_TIMEOUT) {
1137 writel(CR0_FORSRST, &regs->CR0Set);
1138 /* FIXME: PCI POSTING */
1139 /* delay 2ms */
1140 mdelay(2);
1da177e4 1141 }
1da177e4
LT		 1142 return 0;
1143}
1144
1145/**
2cf71d2e
DJ		 1146 * velocity_set_multi - filter list change callback
1147 * @dev: network device
1da177e4 1148 *
2cf71d2e
DJ		 1149 * Called by the network layer when the filter lists need to change
1150 * for a velocity adapter. Reload the CAMs with the new address
1151 * filter ruleset.
1da177e4 1152 */
2cf71d2e 1153static void velocity_set_multi(struct net_device *dev)
1da177e4 1154{
2cf71d2e 1155 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 1156 struct mac_regs __iomem *regs = vptr->mac_regs;
2cf71d2e
DJ		 1157 u8 rx_mode;
1158 int i;
1159 struct dev_mc_list *mclist;
1da177e4 1160
2cf71d2e
DJ		 1161 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1162 writel(0xffffffff, &regs->MARCAM[0]);
1163 writel(0xffffffff, &regs->MARCAM[4]);
1164 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
1165 } else if ((dev->mc_count > vptr->multicast_limit)
1166 || (dev->flags & IFF_ALLMULTI)) {
1167 writel(0xffffffff, &regs->MARCAM[0]);
1168 writel(0xffffffff, &regs->MARCAM[4]);
1169 rx_mode = (RCR_AM | RCR_AB);
1170 } else {
1171 int offset = MCAM_SIZE - vptr->multicast_limit;
1172 mac_get_cam_mask(regs, vptr->mCAMmask);
1da177e4 1173
2cf71d2e
DJ		 1174 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
1175 mac_set_cam(regs, i + offset, mclist->dmi_addr);
1176 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
1da177e4 1177 }
1da177e4 1178
2cf71d2e
DJ		 1179 mac_set_cam_mask(regs, vptr->mCAMmask);
1180 rx_mode = RCR_AM | RCR_AB | RCR_AP;
1da177e4 1181 }
2cf71d2e
DJ		 1182 if (dev->mtu > 1500)
1183 rx_mode |= RCR_AL;
1da177e4 1184
2cf71d2e 1185 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
1da177e4 1186
9088d9a4
FR		 1187}
1188
2cf71d2e
DJ		 1189/*
1190 * MII access , media link mode setting functions
1da177e4
LT		 1191 */
1192
1da177e4 1193/**
2cf71d2e
DJ		 1194 * mii_init - set up MII
1195 * @vptr: velocity adapter
1196 * @mii_status: links tatus
1da177e4 1197 *
2cf71d2e 1198 * Set up the PHY for the current link state.
1da177e4 1199 */
2cf71d2e 1200static void mii_init(struct velocity_info *vptr, u32 mii_status)
1da177e4 1201{
2cf71d2e 1202 u16 BMCR;
1da177e4 1203
2cf71d2e
DJ		 1204 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
1205 case PHYID_CICADA_CS8201:
1206 /*
1207 * Reset to hardware default
1208 */
1209 MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
1210 /*
1211 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1212 * off it in NWay-forced half mode for NWay-forced v.s.
1213 * legacy-forced issue.
1214 */
1215 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1216 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
1217 else
1218 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
1219 /*
1220 * Turn on Link/Activity LED enable bit for CIS8201
1221 */
1222 MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
1223 break;
1224 case PHYID_VT3216_32BIT:
1225 case PHYID_VT3216_64BIT:
1226 /*
1227 * Reset to hardware default
1228 */
1229 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
1230 /*
1231 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1232 * off it in NWay-forced half mode for NWay-forced v.s.
1233 * legacy-forced issue
1234 */
1235 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1236 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
1237 else
1238 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
1239 break;
1da177e4 1240
2cf71d2e
DJ		 1241 case PHYID_MARVELL_1000:
1242 case PHYID_MARVELL_1000S:
1243 /*
1244 * Assert CRS on Transmit
1245 */
1246 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
1247 /*
1248 * Reset to hardware default
1249 */
1250 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
1251 break;
1252 default:
1253 ;
1254 }
1255 velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
1256 if (BMCR & BMCR_ISO) {
1257 BMCR &= ~BMCR_ISO;
1258 velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
1da177e4 1259 }
1da177e4
LT		 1260}
1261
2cf71d2e 1262
1da177e4 1263/**
2cf71d2e
DJ		 1264 * velocity_init_registers - initialise MAC registers
1265 * @vptr: velocity to init
1266 * @type: type of initialisation (hot or cold)
1da177e4 1267 *
2cf71d2e
DJ		 1268 * Initialise the MAC on a reset or on first set up on the
1269 * hardware.
1da177e4 1270 */
2cf71d2e
DJ		 1271static void velocity_init_registers(struct velocity_info *vptr,
1272 enum velocity_init_type type)
1da177e4 1273{
2cf71d2e
DJ		 1274 struct mac_regs __iomem *regs = vptr->mac_regs;
1275 int i, mii_status;
1da177e4 1276
2cf71d2e 1277 mac_wol_reset(regs);
1da177e4 1278
2cf71d2e
DJ		 1279 switch (type) {
1280 case VELOCITY_INIT_RESET:
1281 case VELOCITY_INIT_WOL:
1da177e4 1282
2cf71d2e 1283 netif_stop_queue(vptr->dev);
6aa20a22 1284
2cf71d2e
DJ		 1285 /*
1286 * Reset RX to prevent RX pointer not on the 4X location
1287 */
1288 velocity_rx_reset(vptr);
1289 mac_rx_queue_run(regs);
1290 mac_rx_queue_wake(regs);
6aa20a22 1291
2cf71d2e
DJ		 1292 mii_status = velocity_get_opt_media_mode(vptr);
1293 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1294 velocity_print_link_status(vptr);
1295 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
1296 netif_wake_queue(vptr->dev);
1da177e4 1297 }
1da177e4 1298
2cf71d2e 1299 enable_flow_control_ability(vptr);
1da177e4 1300
2cf71d2e
DJ		 1301 mac_clear_isr(regs);
1302 writel(CR0_STOP, &regs->CR0Clr);
1303 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1304 &regs->CR0Set);
6aa20a22 1305
2cf71d2e 1306 break;
1da177e4 1307
2cf71d2e
DJ		 1308 case VELOCITY_INIT_COLD:
1309 default:
1310 /*
1311 * Do reset
1312 */
1313 velocity_soft_reset(vptr);
1314 mdelay(5);
1da177e4 1315
2cf71d2e
DJ		 1316 mac_eeprom_reload(regs);
1317 for (i = 0; i < 6; i++)
1318 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
1da177e4 1319
2cf71d2e
DJ		 1320 /*
1321 * clear Pre_ACPI bit.
1322 */
1323 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
1324 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
1325 mac_set_dma_length(regs, vptr->options.DMA_length);
1da177e4 1326
2cf71d2e
DJ		 1327 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
1328 /*
1329 * Back off algorithm use original IEEE standard
1330 */
1331 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
1da177e4
LT		 1332
1333 /*
2cf71d2e 1334 * Init CAM filter
1da177e4 1335 */
2cf71d2e 1336 velocity_init_cam_filter(vptr);
1da177e4 1337
2cf71d2e
DJ		 1338 /*
1339 * Set packet filter: Receive directed and broadcast address
1340 */
1341 velocity_set_multi(vptr->dev);
1da177e4 1342
2cf71d2e
DJ		 1343 /*
1344 * Enable MII auto-polling
1345 */
1346 enable_mii_autopoll(regs);
1da177e4 1347
2cf71d2e 1348 vptr->int_mask = INT_MASK_DEF;
1da177e4 1349
2cf71d2e
DJ		 1350 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1351 writew(vptr->options.numrx - 1, &regs->RDCSize);
1352 mac_rx_queue_run(regs);
1353 mac_rx_queue_wake(regs);
1da177e4 1354
2cf71d2e 1355 writew(vptr->options.numtx - 1, &regs->TDCSize);
1da177e4 1356
2cf71d2e
DJ		 1357 for (i = 0; i < vptr->tx.numq; i++) {
1358 writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
1359 mac_tx_queue_run(regs, i);
1360 }
1da177e4 1361
2cf71d2e 1362 init_flow_control_register(vptr);
6aa20a22 1363
2cf71d2e
DJ		 1364 writel(CR0_STOP, &regs->CR0Clr);
1365 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
1da177e4 1366
2cf71d2e
DJ		 1367 mii_status = velocity_get_opt_media_mode(vptr);
1368 netif_stop_queue(vptr->dev);
1da177e4 1369
2cf71d2e 1370 mii_init(vptr, mii_status);
1da177e4 1371
2cf71d2e
DJ		 1372 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1373 velocity_print_link_status(vptr);
1374 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
1375 netif_wake_queue(vptr->dev);
1da177e4 1376 }
6aa20a22 1377
2cf71d2e
DJ		 1378 enable_flow_control_ability(vptr);
1379 mac_hw_mibs_init(regs);
1380 mac_write_int_mask(vptr->int_mask, regs);
1381 mac_clear_isr(regs);
1382
1da177e4 1383 }
1da177e4
LT		 1384}
1385
2cf71d2e 1386static void velocity_give_many_rx_descs(struct velocity_info *vptr)
1da177e4 1387{
2cf71d2e
DJ		 1388 struct mac_regs __iomem *regs = vptr->mac_regs;
1389 int avail, dirty, unusable;
1390
1391 /*
1392 * RD number must be equal to 4X per hardware spec
1393 * (programming guide rev 1.20, p.13)
1394 */
1395 if (vptr->rx.filled < 4)
1396 return;
1397
1398 wmb();
1399
1400 unusable = vptr->rx.filled & 0x0003;
1401 dirty = vptr->rx.dirty - unusable;
1402 for (avail = vptr->rx.filled & 0xfffc; avail; avail--) {
1403 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
1404 vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1da177e4 1405 }
2cf71d2e
DJ		 1406
1407 writew(vptr->rx.filled & 0xfffc, &regs->RBRDU);
1408 vptr->rx.filled = unusable;
1da177e4
LT		 1409}
1410
1411/**
2cf71d2e
DJ		 1412 * velocity_init_dma_rings - set up DMA rings
1413 * @vptr: Velocity to set up
6aa20a22 1414 *
2cf71d2e
DJ		 1415 * Allocate PCI mapped DMA rings for the receive and transmit layer
1416 * to use.
1da177e4 1417 */
2cf71d2e 1418static int velocity_init_dma_rings(struct velocity_info *vptr)
1da177e4 1419{
2cf71d2e
DJ		 1420 struct velocity_opt *opt = &vptr->options;
1421 const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
1422 const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
1423 struct pci_dev *pdev = vptr->pdev;
1424 dma_addr_t pool_dma;
1425 void *pool;
1426 unsigned int i;
1da177e4
LT		 1427
1428 /*
2cf71d2e
DJ		 1429 * Allocate all RD/TD rings a single pool.
1430 *
1431 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1432 * alignment
1da177e4 1433 */
2cf71d2e
DJ		 1434 pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq +
1435 rx_ring_size, &pool_dma);
1436 if (!pool) {
1437 dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
1438 vptr->dev->name);
1439 return -ENOMEM;
1da177e4
LT		 1440 }
1441
2cf71d2e
DJ		 1442 vptr->rx.ring = pool;
1443 vptr->rx.pool_dma = pool_dma;
1da177e4 1444
2cf71d2e
DJ		 1445 pool += rx_ring_size;
1446 pool_dma += rx_ring_size;
d4f73c8e 1447
2cf71d2e
DJ		 1448 for (i = 0; i < vptr->tx.numq; i++) {
1449 vptr->tx.rings[i] = pool;
1450 vptr->tx.pool_dma[i] = pool_dma;
1451 pool += tx_ring_size;
1452 pool_dma += tx_ring_size;
1453 }
1da177e4
LT		 1454
1455 return 0;
1456}
1457
2cf71d2e
DJ		 1458static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
1459{
1460 vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
1461}
1462
1da177e4
LT		 1463/**
1464 * velocity_alloc_rx_buf - allocate aligned receive buffer
1465 * @vptr: velocity
1466 * @idx: ring index
1467 *
1468 * Allocate a new full sized buffer for the reception of a frame and
1469 * map it into PCI space for the hardware to use. The hardware
1470 * requires *64* byte alignment of the buffer which makes life
1471 * less fun than would be ideal.
1472 */
1da177e4
LT		 1473static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1474{
0fe9f15e
FR		 1475 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1476 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1da177e4 1477
0fe9f15e 1478 rd_info->skb = dev_alloc_skb(vptr->rx.buf_sz + 64);
1da177e4
LT		 1479 if (rd_info->skb == NULL)
1480 return -ENOMEM;
1481
1482 /*
1483 * Do the gymnastics to get the buffer head for data at
1484 * 64byte alignment.
1485 */
689be439 1486 skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63);
0fe9f15e
FR		 1487 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data,
1488 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
6aa20a22 1489
1da177e4
LT		 1490 /*
1491 * Fill in the descriptor to match
0fe9f15e 1492 */
6aa20a22 1493
1da177e4 1494 *((u32 *) & (rd->rdesc0)) = 0;
0fe9f15e 1495 rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN;
1da177e4
LT		 1496 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1497 rd->pa_high = 0;
1498 return 0;
1499}
1500
6aa20a22 1501
2cf71d2e 1502static int velocity_rx_refill(struct velocity_info *vptr)
1da177e4 1503{
2cf71d2e 1504 int dirty = vptr->rx.dirty, done = 0;
1da177e4 1505
2cf71d2e
DJ		 1506 do {
1507 struct rx_desc *rd = vptr->rx.ring + dirty;
1da177e4 1508
2cf71d2e
DJ		 1509 /* Fine for an all zero Rx desc at init time as well */
1510 if (rd->rdesc0.len & OWNED_BY_NIC)
1511 break;
1da177e4 1512
2cf71d2e
DJ		 1513 if (!vptr->rx.info[dirty].skb) {
1514 if (velocity_alloc_rx_buf(vptr, dirty) < 0)
1da177e4 1515 break;
1da177e4 1516 }
2cf71d2e
DJ		 1517 done++;
1518 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1519 } while (dirty != vptr->rx.curr);
1da177e4 1520
2cf71d2e
DJ		 1521 if (done) {
1522 vptr->rx.dirty = dirty;
1523 vptr->rx.filled += done;
1da177e4 1524 }
2cf71d2e
DJ		 1525
1526 return done;
1da177e4
LT		 1527}
1528
1529/**
2cf71d2e
DJ		 1530 * velocity_free_rd_ring - free receive ring
1531 * @vptr: velocity to clean up
1da177e4 1532 *
2cf71d2e
DJ		 1533 * Free the receive buffers for each ring slot and any
1534 * attached socket buffers that need to go away.
1da177e4 1535 */
2cf71d2e 1536static void velocity_free_rd_ring(struct velocity_info *vptr)
1da177e4 1537{
2cf71d2e 1538 int i;
1da177e4 1539
2cf71d2e
DJ		 1540 if (vptr->rx.info == NULL)
1541 return;
6aa20a22 1542
2cf71d2e
DJ		 1543 for (i = 0; i < vptr->options.numrx; i++) {
1544 struct velocity_rd_info *rd_info = &(vptr->rx.info[i]);
1545 struct rx_desc *rd = vptr->rx.ring + i;
1da177e4 1546
2cf71d2e 1547 memset(rd, 0, sizeof(*rd));
1da177e4 1548
2cf71d2e
DJ		 1549 if (!rd_info->skb)
1550 continue;
1551 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
1552 PCI_DMA_FROMDEVICE);
1553 rd_info->skb_dma = 0;
6aa20a22 1554
2cf71d2e
DJ		 1555 dev_kfree_skb(rd_info->skb);
1556 rd_info->skb = NULL;
1da177e4
LT		 1557 }
1558
2cf71d2e
DJ		 1559 kfree(vptr->rx.info);
1560 vptr->rx.info = NULL;
1561}
1da177e4 1562
1da177e4 1563
1da177e4 1564
2cf71d2e
DJ		 1565/**
1566 * velocity_init_rd_ring - set up receive ring
1567 * @vptr: velocity to configure
1568 *
1569 * Allocate and set up the receive buffers for each ring slot and
1570 * assign them to the network adapter.
1571 */
1572static int velocity_init_rd_ring(struct velocity_info *vptr)
1573{
1574 int ret = -ENOMEM;
1da177e4 1575
2cf71d2e
DJ		 1576 vptr->rx.info = kcalloc(vptr->options.numrx,
1577 sizeof(struct velocity_rd_info), GFP_KERNEL);
1578 if (!vptr->rx.info)
1579 goto out;
6aa20a22 1580
2cf71d2e 1581 velocity_init_rx_ring_indexes(vptr);
1da177e4 1582
2cf71d2e
DJ		 1583 if (velocity_rx_refill(vptr) != vptr->options.numrx) {
1584 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1585 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1586 velocity_free_rd_ring(vptr);
1587 goto out;
1588 }
1da177e4 1589
2cf71d2e
DJ		 1590 ret = 0;
1591out:
1592 return ret;
1da177e4
LT		 1593}
1594
1595/**
2cf71d2e
DJ		 1596 * velocity_init_td_ring - set up transmit ring
1597 * @vptr: velocity
1da177e4 1598 *
2cf71d2e
DJ		 1599 * Set up the transmit ring and chain the ring pointers together.
1600 * Returns zero on success or a negative posix errno code for
1601 * failure.
1da177e4 1602 */
2cf71d2e 1603static int velocity_init_td_ring(struct velocity_info *vptr)
1da177e4 1604{
2cf71d2e
DJ		 1605 dma_addr_t curr;
1606 int j;
1da177e4 1607
2cf71d2e
DJ		 1608 /* Init the TD ring entries */
1609 for (j = 0; j < vptr->tx.numq; j++) {
1610 curr = vptr->tx.pool_dma[j];
1da177e4 1611
2cf71d2e
DJ		 1612 vptr->tx.infos[j] = kcalloc(vptr->options.numtx,
1613 sizeof(struct velocity_td_info),
1614 GFP_KERNEL);
1615 if (!vptr->tx.infos[j]) {
1616 while (--j >= 0)
1617 kfree(vptr->tx.infos[j]);
1618 return -ENOMEM;
1da177e4 1619 }
2cf71d2e
DJ		 1620
1621 vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0;
1da177e4 1622 }
2cf71d2e
DJ		 1623 return 0;
1624}
1625
1626/**
1627 * velocity_free_dma_rings - free PCI ring pointers
1628 * @vptr: Velocity to free from
1629 *
1630 * Clean up the PCI ring buffers allocated to this velocity.
1631 */
1632static void velocity_free_dma_rings(struct velocity_info *vptr)
1633{
1634 const int size = vptr->options.numrx * sizeof(struct rx_desc) +
1635 vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq;
1636
1637 pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma);
1da177e4
LT		 1638}
1639
2cf71d2e 1640
3c4dc711
FR		 1641static int velocity_init_rings(struct velocity_info *vptr, int mtu)
1642{
1643 int ret;
1644
1645 velocity_set_rxbufsize(vptr, mtu);
1646
1647 ret = velocity_init_dma_rings(vptr);
1648 if (ret < 0)
1649 goto out;
1650
1651 ret = velocity_init_rd_ring(vptr);
1652 if (ret < 0)
1653 goto err_free_dma_rings_0;
1654
1655 ret = velocity_init_td_ring(vptr);
1656 if (ret < 0)
1657 goto err_free_rd_ring_1;
1658out:
1659 return ret;
1660
1661err_free_rd_ring_1:
1662 velocity_free_rd_ring(vptr);
1663err_free_dma_rings_0:
1664 velocity_free_dma_rings(vptr);
1665 goto out;
1666}
1667
1da177e4 1668/**
2cf71d2e
DJ		 1669 * velocity_free_tx_buf - free transmit buffer
1670 * @vptr: velocity
1671 * @tdinfo: buffer
1da177e4 1672 *
2cf71d2e
DJ		 1673 * Release an transmit buffer. If the buffer was preallocated then
1674 * recycle it, if not then unmap the buffer.
1da177e4 1675 */
2cf71d2e 1676static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo)
1da177e4 1677{
2cf71d2e
DJ		 1678 struct sk_buff *skb = tdinfo->skb;
1679 int i;
1680 int pktlen;
28133176 1681
2cf71d2e
DJ		 1682 /*
1683 * Don't unmap the pre-allocated tx_bufs
1684 */
1685 if (tdinfo->skb_dma) {
1da177e4 1686
2cf71d2e
DJ		 1687 pktlen = max_t(unsigned int, skb->len, ETH_ZLEN);
1688 for (i = 0; i < tdinfo->nskb_dma; i++) {
1689 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], pktlen, PCI_DMA_TODEVICE);
1690 tdinfo->skb_dma[i] = 0;
1691 }
1da177e4 1692 }
2cf71d2e
DJ		 1693 dev_kfree_skb_irq(skb);
1694 tdinfo->skb = NULL;
1da177e4
LT		 1695}
1696
6aa20a22 1697
2cf71d2e
DJ		 1698/*
1699 * FIXME: could we merge this with velocity_free_tx_buf ?
1700 */
1701static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1702 int q, int n)
1da177e4 1703{
2cf71d2e
DJ		 1704 struct velocity_td_info *td_info = &(vptr->tx.infos[q][n]);
1705 int i;
bd7b3f34 1706
2cf71d2e
DJ		 1707 if (td_info == NULL)
1708 return;
3c4dc711 1709
2cf71d2e
DJ		 1710 if (td_info->skb) {
1711 for (i = 0; i < td_info->nskb_dma; i++) {
1712 if (td_info->skb_dma[i]) {
1713 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1714 td_info->skb->len, PCI_DMA_TODEVICE);
1715 td_info->skb_dma[i] = 0;
1716 }
3c4dc711 1717 }
2cf71d2e
DJ		 1718 dev_kfree_skb(td_info->skb);
1719 td_info->skb = NULL;
3c4dc711 1720 }
1da177e4
LT		 1721}
1722
1723/**
2cf71d2e
DJ		 1724 * velocity_free_td_ring - free td ring
1725 * @vptr: velocity
1da177e4 1726 *
2cf71d2e
DJ		 1727 * Free up the transmit ring for this particular velocity adapter.
1728 * We free the ring contents but not the ring itself.
1729 */
1730static void velocity_free_td_ring(struct velocity_info *vptr)
1731{
1732 int i, j;
1da177e4 1733
2cf71d2e
DJ		 1734 for (j = 0; j < vptr->tx.numq; j++) {
1735 if (vptr->tx.infos[j] == NULL)
1736 continue;
1737 for (i = 0; i < vptr->options.numtx; i++)
1738 velocity_free_td_ring_entry(vptr, j, i);
6aa20a22 1739
2cf71d2e
DJ		 1740 kfree(vptr->tx.infos[j]);
1741 vptr->tx.infos[j] = NULL;
1742 }
1743}
6aa20a22 1744
1da177e4 1745
2cf71d2e
DJ		 1746static void velocity_free_rings(struct velocity_info *vptr)
1747{
1748 velocity_free_td_ring(vptr);
1749 velocity_free_rd_ring(vptr);
1750 velocity_free_dma_rings(vptr);
1da177e4
LT		 1751}
1752
1753/**
2cf71d2e
DJ		 1754 * velocity_error - handle error from controller
1755 * @vptr: velocity
1756 * @status: card status
1757 *
1758 * Process an error report from the hardware and attempt to recover
1759 * the card itself. At the moment we cannot recover from some
1760 * theoretically impossible errors but this could be fixed using
1761 * the pci_device_failed logic to bounce the hardware
1da177e4 1762 *
1da177e4 1763 */
2cf71d2e 1764static void velocity_error(struct velocity_info *vptr, int status)
1da177e4 1765{
580a6902 1766
2cf71d2e
DJ		 1767 if (status & ISR_TXSTLI) {
1768 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4 1769
2cf71d2e
DJ		 1770 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1771 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1772 writew(TRDCSR_RUN, &regs->TDCSRClr);
1773 netif_stop_queue(vptr->dev);
1da177e4 1774
2cf71d2e
DJ		 1775 /* FIXME: port over the pci_device_failed code and use it
1776 here */
1777 }
1da177e4 1778
2cf71d2e
DJ		 1779 if (status & ISR_SRCI) {
1780 struct mac_regs __iomem *regs = vptr->mac_regs;
1781 int linked;
1da177e4 1782
2cf71d2e
DJ		 1783 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1784 vptr->mii_status = check_connection_type(regs);
1da177e4 1785
2cf71d2e
DJ		 1786 /*
1787 * If it is a 3119, disable frame bursting in
1788 * halfduplex mode and enable it in fullduplex
1789 * mode
1790 */
1791 if (vptr->rev_id < REV_ID_VT3216_A0) {
0527a1a8 1792 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2cf71d2e
DJ		 1793 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1794 else
1795 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1796 }
1797 /*
1798 * Only enable CD heart beat counter in 10HD mode
1799 */
1800 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10))
1801 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1802 else
1803 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1804 }
1805 /*
1806 * Get link status from PHYSR0
1807 */
1808 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1da177e4 1809
2cf71d2e
DJ		 1810 if (linked) {
1811 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
1812 netif_carrier_on(vptr->dev);
1813 } else {
1814 vptr->mii_status |= VELOCITY_LINK_FAIL;
1815 netif_carrier_off(vptr->dev);
1816 }
1da177e4 1817
2cf71d2e
DJ		 1818 velocity_print_link_status(vptr);
1819 enable_flow_control_ability(vptr);
1da177e4 1820
2cf71d2e
DJ		 1821 /*
1822 * Re-enable auto-polling because SRCI will disable
1823 * auto-polling
1824 */
1da177e4 1825
2cf71d2e 1826 enable_mii_autopoll(regs);
1da177e4 1827
2cf71d2e
DJ		 1828 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1829 netif_stop_queue(vptr->dev);
1830 else
1831 netif_wake_queue(vptr->dev);
1da177e4 1832
2cf71d2e
DJ		 1833 };
1834 if (status & ISR_MIBFI)
1835 velocity_update_hw_mibs(vptr);
1836 if (status & ISR_LSTEI)
1837 mac_rx_queue_wake(vptr->mac_regs);
1da177e4
LT		 1838}
1839
1840/**
2cf71d2e
DJ		 1841 * tx_srv - transmit interrupt service
1842 * @vptr; Velocity
1843 * @status:
1da177e4 1844 *
2cf71d2e
DJ		 1845 * Scan the queues looking for transmitted packets that
1846 * we can complete and clean up. Update any statistics as
1847 * necessary/
1da177e4 1848 */
2cf71d2e 1849static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1da177e4 1850{
2cf71d2e
DJ		 1851 struct tx_desc *td;
1852 int qnum;
1853 int full = 0;
1854 int idx;
1855 int works = 0;
1856 struct velocity_td_info *tdinfo;
1857 struct net_device_stats *stats = &vptr->dev->stats;
1da177e4 1858
2cf71d2e
DJ		 1859 for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
1860 for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
1861 idx = (idx + 1) % vptr->options.numtx) {
1da177e4 1862
2cf71d2e
DJ		 1863 /*
1864 * Get Tx Descriptor
1865 */
1866 td = &(vptr->tx.rings[qnum][idx]);
1867 tdinfo = &(vptr->tx.infos[qnum][idx]);
1da177e4 1868
2cf71d2e
DJ		 1869 if (td->tdesc0.len & OWNED_BY_NIC)
1870 break;
1da177e4 1871
2cf71d2e
DJ		 1872 if ((works++ > 15))
1873 break;
1874
1875 if (td->tdesc0.TSR & TSR0_TERR) {
1876 stats->tx_errors++;
1877 stats->tx_dropped++;
1878 if (td->tdesc0.TSR & TSR0_CDH)
1879 stats->tx_heartbeat_errors++;
1880 if (td->tdesc0.TSR & TSR0_CRS)
1881 stats->tx_carrier_errors++;
1882 if (td->tdesc0.TSR & TSR0_ABT)
1883 stats->tx_aborted_errors++;
1884 if (td->tdesc0.TSR & TSR0_OWC)
1885 stats->tx_window_errors++;
1886 } else {
1887 stats->tx_packets++;
1888 stats->tx_bytes += tdinfo->skb->len;
1889 }
1890 velocity_free_tx_buf(vptr, tdinfo);
1891 vptr->tx.used[qnum]--;
1892 }
1893 vptr->tx.tail[qnum] = idx;
1da177e4 1894
2cf71d2e
DJ		 1895 if (AVAIL_TD(vptr, qnum) < 1)
1896 full = 1;
1897 }
1da177e4 1898 /*
2cf71d2e
DJ		 1899 * Look to see if we should kick the transmit network
1900 * layer for more work.
1da177e4 1901 */
2cf71d2e
DJ		 1902 if (netif_queue_stopped(vptr->dev) && (full == 0)
1903 && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1904 netif_wake_queue(vptr->dev);
1905 }
1906 return works;
1907}
1908
1909/**
1910 * velocity_rx_csum - checksum process
1911 * @rd: receive packet descriptor
1912 * @skb: network layer packet buffer
1913 *
1914 * Process the status bits for the received packet and determine
1915 * if the checksum was computed and verified by the hardware
1916 */
1917static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1918{
1919 skb->ip_summed = CHECKSUM_NONE;
6aa20a22 1920
2cf71d2e
DJ		 1921 if (rd->rdesc1.CSM & CSM_IPKT) {
1922 if (rd->rdesc1.CSM & CSM_IPOK) {
1923 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1924 (rd->rdesc1.CSM & CSM_UDPKT)) {
1925 if (!(rd->rdesc1.CSM & CSM_TUPOK))
1926 return;
1927 }
1928 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4
LT		 1929 }
1930 }
1da177e4
LT		 1931}
1932
1da177e4 1933/**
2cf71d2e
DJ		 1934 * velocity_rx_copy - in place Rx copy for small packets
1935 * @rx_skb: network layer packet buffer candidate
1936 * @pkt_size: received data size
1937 * @rd: receive packet descriptor
1da177e4
LT		 1938 * @dev: network device
1939 *
2cf71d2e
DJ		 1940 * Replace the current skb that is scheduled for Rx processing by a
1941 * shorter, immediatly allocated skb, if the received packet is small
1942 * enough. This function returns a negative value if the received
1943 * packet is too big or if memory is exhausted.
1da177e4 1944 */
2cf71d2e
DJ		 1945static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1946 struct velocity_info *vptr)
1da177e4 1947{
2cf71d2e
DJ		 1948 int ret = -1;
1949 if (pkt_size < rx_copybreak) {
1950 struct sk_buff *new_skb;
1da177e4 1951
89d71a66 1952 new_skb = netdev_alloc_skb_ip_align(vptr->dev, pkt_size);
2cf71d2e
DJ		 1953 if (new_skb) {
1954 new_skb->ip_summed = rx_skb[0]->ip_summed;
2cf71d2e
DJ		 1955 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
1956 *rx_skb = new_skb;
1957 ret = 0;
1da177e4
LT		 1958 }
1959
1da177e4 1960 }
2cf71d2e 1961 return ret;
1da177e4
LT		 1962}
1963
1964/**
2cf71d2e
DJ		 1965 * velocity_iph_realign - IP header alignment
1966 * @vptr: velocity we are handling
1967 * @skb: network layer packet buffer
1968 * @pkt_size: received data size
1da177e4 1969 *
2cf71d2e
DJ		 1970 * Align IP header on a 2 bytes boundary. This behavior can be
1971 * configured by the user.
1da177e4 1972 */
2cf71d2e
DJ		 1973static inline void velocity_iph_realign(struct velocity_info *vptr,
1974 struct sk_buff *skb, int pkt_size)
1da177e4 1975{
2cf71d2e
DJ		 1976 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
1977 memmove(skb->data + 2, skb->data, pkt_size);
1978 skb_reserve(skb, 2);
1979 }
1980}
6aa20a22 1981
1da177e4 1982
2cf71d2e
DJ		 1983/**
1984 * velocity_receive_frame - received packet processor
1985 * @vptr: velocity we are handling
1986 * @idx: ring index
1987 *
1988 * A packet has arrived. We process the packet and if appropriate
1989 * pass the frame up the network stack
1990 */
1991static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1992{
1993 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
1994 struct net_device_stats *stats = &vptr->dev->stats;
1995 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1996 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1997 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
1998 struct sk_buff *skb;
1da177e4 1999
2cf71d2e
DJ		 2000 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
2001 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
2002 stats->rx_length_errors++;
2003 return -EINVAL;
2004 }
1da177e4 2005
2cf71d2e
DJ		 2006 if (rd->rdesc0.RSR & RSR_MAR)
2007 stats->multicast++;
1da177e4 2008
2cf71d2e 2009 skb = rd_info->skb;
1da177e4 2010
2cf71d2e
DJ		 2011 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
2012 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
1da177e4 2013
2cf71d2e
DJ		 2014 /*
2015 * Drop frame not meeting IEEE 802.3
2016 */
1da177e4 2017
2cf71d2e
DJ		 2018 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
2019 if (rd->rdesc0.RSR & RSR_RL) {
2020 stats->rx_length_errors++;
2021 return -EINVAL;
2022 }
2023 }
6aa20a22 2024
2cf71d2e 2025 pci_action = pci_dma_sync_single_for_device;
1da177e4 2026
2cf71d2e 2027 velocity_rx_csum(rd, skb);
6aa20a22 2028
2cf71d2e
DJ		 2029 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
2030 velocity_iph_realign(vptr, skb, pkt_len);
2031 pci_action = pci_unmap_single;
2032 rd_info->skb = NULL;
2033 }
6aa20a22 2034
2cf71d2e
DJ		 2035 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
2036 PCI_DMA_FROMDEVICE);
1da177e4 2037
2cf71d2e
DJ		 2038 skb_put(skb, pkt_len - 4);
2039 skb->protocol = eth_type_trans(skb, vptr->dev);
2040
2041 if (vptr->vlgrp && (rd->rdesc0.RSR & RSR_DETAG)) {
2042 vlan_hwaccel_rx(skb, vptr->vlgrp,
2043 swab16(le16_to_cpu(rd->rdesc1.PQTAG)));
2044 } else
2045 netif_rx(skb);
6aa20a22 2046
2cf71d2e 2047 stats->rx_bytes += pkt_len;
6aa20a22 2048
2cf71d2e 2049 return 0;
1da177e4
LT		 2050}
2051
1da177e4
LT		 2052
2053/**
2cf71d2e
DJ		 2054 * velocity_rx_srv - service RX interrupt
2055 * @vptr: velocity
2056 * @status: adapter status (unused)
1da177e4 2057 *
2cf71d2e
DJ		 2058 * Walk the receive ring of the velocity adapter and remove
2059 * any received packets from the receive queue. Hand the ring
2060 * slots back to the adapter for reuse.
1da177e4 2061 */
2cf71d2e 2062static int velocity_rx_srv(struct velocity_info *vptr, int status)
1da177e4 2063{
2cf71d2e
DJ		 2064 struct net_device_stats *stats = &vptr->dev->stats;
2065 int rd_curr = vptr->rx.curr;
2066 int works = 0;
2067
2068 do {
2069 struct rx_desc *rd = vptr->rx.ring + rd_curr;
2070
2071 if (!vptr->rx.info[rd_curr].skb)
2072 break;
2073
2074 if (rd->rdesc0.len & OWNED_BY_NIC)
2075 break;
2076
2077 rmb();
1da177e4 2078
2cf71d2e
DJ		 2079 /*
2080 * Don't drop CE or RL error frame although RXOK is off
2081 */
2082 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
2083 if (velocity_receive_frame(vptr, rd_curr) < 0)
2084 stats->rx_dropped++;
2085 } else {
2086 if (rd->rdesc0.RSR & RSR_CRC)
2087 stats->rx_crc_errors++;
2088 if (rd->rdesc0.RSR & RSR_FAE)
2089 stats->rx_frame_errors++;
1da177e4 2090
2cf71d2e
DJ		 2091 stats->rx_dropped++;
2092 }
6aa20a22 2093
2cf71d2e 2094 rd->size |= RX_INTEN;
1da177e4 2095
2cf71d2e
DJ		 2096 rd_curr++;
2097 if (rd_curr >= vptr->options.numrx)
2098 rd_curr = 0;
2099 } while (++works <= 15);
1da177e4 2100
2cf71d2e 2101 vptr->rx.curr = rd_curr;
1da177e4 2102
2cf71d2e
DJ		 2103 if ((works > 0) && (velocity_rx_refill(vptr) > 0))
2104 velocity_give_many_rx_descs(vptr);
2105
2106 VAR_USED(stats);
2107 return works;
2108}
6aa20a22
JG		 2109
2110
1da177e4 2111/**
2cf71d2e
DJ		 2112 * velocity_intr - interrupt callback
2113 * @irq: interrupt number
2114 * @dev_instance: interrupting device
1da177e4 2115 *
2cf71d2e
DJ		 2116 * Called whenever an interrupt is generated by the velocity
2117 * adapter IRQ line. We may not be the source of the interrupt
2118 * and need to identify initially if we are, and if not exit as
2119 * efficiently as possible.
1da177e4 2120 */
2cf71d2e 2121static irqreturn_t velocity_intr(int irq, void *dev_instance)
1da177e4 2122{
2cf71d2e
DJ		 2123 struct net_device *dev = dev_instance;
2124 struct velocity_info *vptr = netdev_priv(dev);
2125 u32 isr_status;
2126 int max_count = 0;
1da177e4 2127
1da177e4 2128
2cf71d2e
DJ		 2129 spin_lock(&vptr->lock);
2130 isr_status = mac_read_isr(vptr->mac_regs);
2131
2132 /* Not us ? */
2133 if (isr_status == 0) {
2134 spin_unlock(&vptr->lock);
2135 return IRQ_NONE;
1da177e4 2136 }
1da177e4 2137
2cf71d2e 2138 mac_disable_int(vptr->mac_regs);
6aa20a22 2139
2cf71d2e
DJ		 2140 /*
2141 * Keep processing the ISR until we have completed
2142 * processing and the isr_status becomes zero
2143 */
1da177e4 2144
2cf71d2e
DJ		 2145 while (isr_status != 0) {
2146 mac_write_isr(vptr->mac_regs, isr_status);
2147 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2148 velocity_error(vptr, isr_status);
2149 if (isr_status & (ISR_PRXI | ISR_PPRXI))
2150 max_count += velocity_rx_srv(vptr, isr_status);
2151 if (isr_status & (ISR_PTXI | ISR_PPTXI))
2152 max_count += velocity_tx_srv(vptr, isr_status);
2153 isr_status = mac_read_isr(vptr->mac_regs);
2154 if (max_count > vptr->options.int_works) {
2155 printk(KERN_WARNING "%s: excessive work at interrupt.\n",
2156 dev->name);
2157 max_count = 0;
2158 }
1da177e4 2159 }
2cf71d2e
DJ		 2160 spin_unlock(&vptr->lock);
2161 mac_enable_int(vptr->mac_regs);
2162 return IRQ_HANDLED;
2163
1da177e4
LT		 2164}
2165
2166/**
2cf71d2e
DJ		 2167 * velocity_open - interface activation callback
2168 * @dev: network layer device to open
1da177e4 2169 *
2cf71d2e
DJ		 2170 * Called when the network layer brings the interface up. Returns
2171 * a negative posix error code on failure, or zero on success.
2172 *
2173 * All the ring allocation and set up is done on open for this
2174 * adapter to minimise memory usage when inactive
1da177e4 2175 */
2cf71d2e 2176static int velocity_open(struct net_device *dev)
1da177e4 2177{
2cf71d2e
DJ		 2178 struct velocity_info *vptr = netdev_priv(dev);
2179 int ret;
1da177e4 2180
2cf71d2e
DJ		 2181 ret = velocity_init_rings(vptr, dev->mtu);
2182 if (ret < 0)
2183 goto out;
1da177e4 2184
2cf71d2e
DJ		 2185 /* Ensure chip is running */
2186 pci_set_power_state(vptr->pdev, PCI_D0);
1da177e4 2187
2cf71d2e 2188 velocity_give_many_rx_descs(vptr);
1da177e4 2189
2cf71d2e
DJ		 2190 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2191
2192 ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED,
2193 dev->name, dev);
2194 if (ret < 0) {
2195 /* Power down the chip */
2196 pci_set_power_state(vptr->pdev, PCI_D3hot);
2197 velocity_free_rings(vptr);
2198 goto out;
1da177e4
LT		 2199 }
2200
2cf71d2e
DJ		 2201 mac_enable_int(vptr->mac_regs);
2202 netif_start_queue(dev);
2203 vptr->flags |= VELOCITY_FLAGS_OPENED;
2204out:
2205 return ret;
1da177e4
LT		 2206}
2207
2208/**
2cf71d2e
DJ		 2209 * velocity_shutdown - shut down the chip
2210 * @vptr: velocity to deactivate
1da177e4 2211 *
2cf71d2e
DJ		 2212 * Shuts down the internal operations of the velocity and
2213 * disables interrupts, autopolling, transmit and receive
1da177e4 2214 */
2cf71d2e 2215static void velocity_shutdown(struct velocity_info *vptr)
1da177e4 2216{
2cf71d2e
DJ		 2217 struct mac_regs __iomem *regs = vptr->mac_regs;
2218 mac_disable_int(regs);
2219 writel(CR0_STOP, &regs->CR0Set);
2220 writew(0xFFFF, &regs->TDCSRClr);
2221 writeb(0xFF, &regs->RDCSRClr);
1da177e4 2222 safe_disable_mii_autopoll(regs);
2cf71d2e
DJ		 2223 mac_clear_isr(regs);
2224}
1da177e4 2225
2cf71d2e
DJ		 2226/**
2227 * velocity_change_mtu - MTU change callback
2228 * @dev: network device
2229 * @new_mtu: desired MTU
2230 *
2231 * Handle requests from the networking layer for MTU change on
2232 * this interface. It gets called on a change by the network layer.
2233 * Return zero for success or negative posix error code.
2234 */
2235static int velocity_change_mtu(struct net_device *dev, int new_mtu)
2236{
2237 struct velocity_info *vptr = netdev_priv(dev);
2238 int ret = 0;
1da177e4 2239
2cf71d2e
DJ		 2240 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
2241 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
2242 vptr->dev->name);
2243 ret = -EINVAL;
2244 goto out_0;
2245 }
1da177e4 2246
2cf71d2e
DJ		 2247 if (!netif_running(dev)) {
2248 dev->mtu = new_mtu;
2249 goto out_0;
1da177e4
LT		 2250 }
2251
2cf71d2e
DJ		 2252 if (dev->mtu != new_mtu) {
2253 struct velocity_info *tmp_vptr;
2254 unsigned long flags;
2255 struct rx_info rx;
2256 struct tx_info tx;
1da177e4 2257
2cf71d2e
DJ		 2258 tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL);
2259 if (!tmp_vptr) {
2260 ret = -ENOMEM;
2261 goto out_0;
2262 }
1da177e4 2263
2cf71d2e
DJ		 2264 tmp_vptr->dev = dev;
2265 tmp_vptr->pdev = vptr->pdev;
2266 tmp_vptr->options = vptr->options;
2267 tmp_vptr->tx.numq = vptr->tx.numq;
6aa20a22 2268
2cf71d2e
DJ		 2269 ret = velocity_init_rings(tmp_vptr, new_mtu);
2270 if (ret < 0)
2271 goto out_free_tmp_vptr_1;
1da177e4 2272
2cf71d2e 2273 spin_lock_irqsave(&vptr->lock, flags);
1da177e4 2274
2cf71d2e
DJ		 2275 netif_stop_queue(dev);
2276 velocity_shutdown(vptr);
1da177e4 2277
2cf71d2e
DJ		 2278 rx = vptr->rx;
2279 tx = vptr->tx;
1da177e4 2280
2cf71d2e
DJ		 2281 vptr->rx = tmp_vptr->rx;
2282 vptr->tx = tmp_vptr->tx;
1da177e4 2283
2cf71d2e
DJ		 2284 tmp_vptr->rx = rx;
2285 tmp_vptr->tx = tx;
1da177e4 2286
2cf71d2e 2287 dev->mtu = new_mtu;
6aa20a22 2288
2cf71d2e 2289 velocity_give_many_rx_descs(vptr);
1da177e4 2290
2cf71d2e 2291 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1da177e4 2292
2cf71d2e
DJ		 2293 mac_enable_int(vptr->mac_regs);
2294 netif_start_queue(dev);
6aa20a22 2295
2cf71d2e 2296 spin_unlock_irqrestore(&vptr->lock, flags);
1da177e4 2297
2cf71d2e 2298 velocity_free_rings(tmp_vptr);
1da177e4 2299
2cf71d2e
DJ		 2300out_free_tmp_vptr_1:
2301 kfree(tmp_vptr);
2302 }
2303out_0:
2304 return ret;
1da177e4 2305}
1da177e4
LT		 2306
2307/**
2cf71d2e
DJ		 2308 * velocity_mii_ioctl - MII ioctl handler
2309 * @dev: network device
2310 * @ifr: the ifreq block for the ioctl
2311 * @cmd: the command
1da177e4 2312 *
2cf71d2e
DJ		 2313 * Process MII requests made via ioctl from the network layer. These
2314 * are used by tools like kudzu to interrogate the link state of the
2315 * hardware
1da177e4 2316 */
2cf71d2e 2317static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1da177e4 2318{
2cf71d2e
DJ		 2319 struct velocity_info *vptr = netdev_priv(dev);
2320 struct mac_regs __iomem *regs = vptr->mac_regs;
2321 unsigned long flags;
2322 struct mii_ioctl_data *miidata = if_mii(ifr);
2323 int err;
1da177e4 2324
2cf71d2e
DJ		 2325 switch (cmd) {
2326 case SIOCGMIIPHY:
2327 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
1da177e4 2328 break;
2cf71d2e 2329 case SIOCGMIIREG:
2cf71d2e
DJ		 2330 if (velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
2331 return -ETIMEDOUT;
1da177e4 2332 break;
2cf71d2e 2333 case SIOCSMIIREG:
2cf71d2e
DJ		 2334 spin_lock_irqsave(&vptr->lock, flags);
2335 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
2336 spin_unlock_irqrestore(&vptr->lock, flags);
2337 check_connection_type(vptr->mac_regs);
2338 if (err)
2339 return err;
1da177e4
LT		 2340 break;
2341 default:
2cf71d2e 2342 return -EOPNOTSUPP;
1da177e4 2343 }
2cf71d2e 2344 return 0;
1da177e4
LT		 2345}
2346
2cf71d2e 2347
1da177e4 2348/**
2cf71d2e
DJ		 2349 * velocity_ioctl - ioctl entry point
2350 * @dev: network device
2351 * @rq: interface request ioctl
2352 * @cmd: command code
1da177e4 2353 *
2cf71d2e
DJ		 2354 * Called when the user issues an ioctl request to the network
2355 * device in question. The velocity interface supports MII.
1da177e4 2356 */
2cf71d2e
DJ		 2357static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2358{
2359 struct velocity_info *vptr = netdev_priv(dev);
2360 int ret;
6aa20a22 2361
2cf71d2e
DJ		 2362 /* If we are asked for information and the device is power
2363 saving then we need to bring the device back up to talk to it */
1da177e4 2364
2cf71d2e
DJ		 2365 if (!netif_running(dev))
2366 pci_set_power_state(vptr->pdev, PCI_D0);
1da177e4 2367
2cf71d2e
DJ		 2368 switch (cmd) {
2369 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2370 case SIOCGMIIREG: /* Read MII PHY register. */
2371 case SIOCSMIIREG: /* Write to MII PHY register. */
2372 ret = velocity_mii_ioctl(dev, rq, cmd);
2373 break;
1da177e4 2374
2cf71d2e
DJ		 2375 default:
2376 ret = -EOPNOTSUPP;
2377 }
2378 if (!netif_running(dev))
2379 pci_set_power_state(vptr->pdev, PCI_D3hot);
1da177e4 2380
c4067400 2381
2cf71d2e 2382 return ret;
1da177e4
LT		 2383}
2384
2385/**
2cf71d2e
DJ		 2386 * velocity_get_status - statistics callback
2387 * @dev: network device
1da177e4 2388 *
2cf71d2e
DJ		 2389 * Callback from the network layer to allow driver statistics
2390 * to be resynchronized with hardware collected state. In the
2391 * case of the velocity we need to pull the MIB counters from
2392 * the hardware into the counters before letting the network
2393 * layer display them.
1da177e4 2394 */
2cf71d2e 2395static struct net_device_stats *velocity_get_stats(struct net_device *dev)
1da177e4 2396{
2cf71d2e 2397 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 2398
2cf71d2e
DJ		 2399 /* If the hardware is down, don't touch MII */
2400 if (!netif_running(dev))
2401 return &dev->stats;
1da177e4 2402
2cf71d2e
DJ		 2403 spin_lock_irq(&vptr->lock);
2404 velocity_update_hw_mibs(vptr);
2405 spin_unlock_irq(&vptr->lock);
1da177e4 2406
2cf71d2e
DJ		 2407 dev->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2408 dev->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2409 dev->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
1da177e4 2410
2cf71d2e
DJ		 2411// unsigned long rx_dropped; /* no space in linux buffers */
2412 dev->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2413 /* detailed rx_errors: */
2414// unsigned long rx_length_errors;
2415// unsigned long rx_over_errors; /* receiver ring buff overflow */
2416 dev->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2417// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2418// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2419// unsigned long rx_missed_errors; /* receiver missed packet */
2420
2421 /* detailed tx_errors */
2422// unsigned long tx_fifo_errors;
2423
2424 return &dev->stats;
1da177e4
LT		 2425}
2426
2cf71d2e
DJ		 2427/**
2428 * velocity_close - close adapter callback
2429 * @dev: network device
2430 *
2431 * Callback from the network layer when the velocity is being
2432 * deactivated by the network layer
2433 */
2434static int velocity_close(struct net_device *dev)
1da177e4 2435{
2cf71d2e 2436 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 2437
2cf71d2e
DJ		 2438 netif_stop_queue(dev);
2439 velocity_shutdown(vptr);
1da177e4 2440
2cf71d2e
DJ		 2441 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2442 velocity_get_ip(vptr);
2443 if (dev->irq != 0)
2444 free_irq(dev->irq, dev);
1da177e4 2445
2cf71d2e
DJ		 2446 /* Power down the chip */
2447 pci_set_power_state(vptr->pdev, PCI_D3hot);
1da177e4 2448
2cf71d2e 2449 velocity_free_rings(vptr);
1da177e4 2450
2cf71d2e
DJ		 2451 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2452 return 0;
1da177e4
LT		 2453}
2454
2455/**
2cf71d2e
DJ		 2456 * velocity_xmit - transmit packet callback
2457 * @skb: buffer to transmit
2458 * @dev: network device
1da177e4 2459 *
2cf71d2e
DJ		 2460 * Called by the networ layer to request a packet is queued to
2461 * the velocity. Returns zero on success.
1da177e4 2462 */
61357325
SH		 2463static netdev_tx_t velocity_xmit(struct sk_buff *skb,
2464 struct net_device *dev)
1da177e4 2465{
2cf71d2e
DJ		 2466 struct velocity_info *vptr = netdev_priv(dev);
2467 int qnum = 0;
2468 struct tx_desc *td_ptr;
2469 struct velocity_td_info *tdinfo;
2470 unsigned long flags;
2471 int pktlen;
2472 __le16 len;
2473 int index;
1da177e4 2474
2cf71d2e
DJ		 2475 if (skb_padto(skb, ETH_ZLEN))
2476 goto out;
2477 pktlen = max_t(unsigned int, skb->len, ETH_ZLEN);
1da177e4 2478
2cf71d2e 2479 len = cpu_to_le16(pktlen);
1da177e4 2480
2cf71d2e 2481 spin_lock_irqsave(&vptr->lock, flags);
1da177e4 2482
2cf71d2e
DJ		 2483 index = vptr->tx.curr[qnum];
2484 td_ptr = &(vptr->tx.rings[qnum][index]);
2485 tdinfo = &(vptr->tx.infos[qnum][index]);
1da177e4 2486
2cf71d2e
DJ		 2487 td_ptr->tdesc1.TCR = TCR0_TIC;
2488 td_ptr->td_buf[0].size &= ~TD_QUEUE;
1da177e4 2489
2cf71d2e
DJ		 2490 /*
2491 * Map the linear network buffer into PCI space and
2492 * add it to the transmit ring.
2493 */
2494 tdinfo->skb = skb;
2495 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
2496 td_ptr->tdesc0.len = len;
2497 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2498 td_ptr->td_buf[0].pa_high = 0;
2499 td_ptr->td_buf[0].size = len;
2500 tdinfo->nskb_dma = 1;
2501
2502 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
2503
2504 if (vptr->vlgrp && vlan_tx_tag_present(skb)) {
2505 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2506 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2507 }
2508
2509 /*
2510 * Handle hardware checksum
2511 */
2512 if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM)
2513 && (skb->ip_summed == CHECKSUM_PARTIAL)) {
2514 const struct iphdr *ip = ip_hdr(skb);
2515 if (ip->protocol == IPPROTO_TCP)
2516 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2517 else if (ip->protocol == IPPROTO_UDP)
2518 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2519 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2520 }
2521 {
1da177e4 2522
2cf71d2e 2523 int prev = index - 1;
1da177e4 2524
2cf71d2e
DJ		 2525 if (prev < 0)
2526 prev = vptr->options.numtx - 1;
2527 td_ptr->tdesc0.len |= OWNED_BY_NIC;
2528 vptr->tx.used[qnum]++;
2529 vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx;
1da177e4 2530
2cf71d2e
DJ		 2531 if (AVAIL_TD(vptr, qnum) < 1)
2532 netif_stop_queue(dev);
1da177e4 2533
2cf71d2e
DJ		 2534 td_ptr = &(vptr->tx.rings[qnum][prev]);
2535 td_ptr->td_buf[0].size |= TD_QUEUE;
2536 mac_tx_queue_wake(vptr->mac_regs, qnum);
2537 }
2538 dev->trans_start = jiffies;
2539 spin_unlock_irqrestore(&vptr->lock, flags);
2540out:
2541 return NETDEV_TX_OK;
1da177e4
LT		 2542}
2543
2544
2cf71d2e
DJ		 2545static const struct net_device_ops velocity_netdev_ops = {
2546 .ndo_open = velocity_open,
2547 .ndo_stop = velocity_close,
2548 .ndo_start_xmit = velocity_xmit,
2549 .ndo_get_stats = velocity_get_stats,
2550 .ndo_validate_addr = eth_validate_addr,
2551 .ndo_set_mac_address = eth_mac_addr,
2552 .ndo_set_multicast_list = velocity_set_multi,
2553 .ndo_change_mtu = velocity_change_mtu,
2554 .ndo_do_ioctl = velocity_ioctl,
2555 .ndo_vlan_rx_add_vid = velocity_vlan_rx_add_vid,
2556 .ndo_vlan_rx_kill_vid = velocity_vlan_rx_kill_vid,
2557 .ndo_vlan_rx_register = velocity_vlan_rx_register,
2558};
2559
1da177e4 2560/**
2cf71d2e
DJ		 2561 * velocity_init_info - init private data
2562 * @pdev: PCI device
2563 * @vptr: Velocity info
2564 * @info: Board type
1da177e4 2565 *
2cf71d2e
DJ		 2566 * Set up the initial velocity_info struct for the device that has been
2567 * discovered.
1da177e4 2568 */
2cf71d2e
DJ		 2569static void __devinit velocity_init_info(struct pci_dev *pdev,
2570 struct velocity_info *vptr,
2571 const struct velocity_info_tbl *info)
1da177e4 2572{
2cf71d2e
DJ		 2573 memset(vptr, 0, sizeof(struct velocity_info));
2574
2575 vptr->pdev = pdev;
2576 vptr->chip_id = info->chip_id;
2577 vptr->tx.numq = info->txqueue;
2578 vptr->multicast_limit = MCAM_SIZE;
2579 spin_lock_init(&vptr->lock);
2580 INIT_LIST_HEAD(&vptr->list);
6aa20a22 2581}
1da177e4
LT		 2582
2583/**
2cf71d2e
DJ		 2584 * velocity_get_pci_info - retrieve PCI info for device
2585 * @vptr: velocity device
2586 * @pdev: PCI device it matches
1da177e4 2587 *
2cf71d2e
DJ		 2588 * Retrieve the PCI configuration space data that interests us from
2589 * the kernel PCI layer
1da177e4 2590 */
2cf71d2e 2591static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
1da177e4 2592{
2cf71d2e 2593 vptr->rev_id = pdev->revision;
1da177e4 2594
2cf71d2e 2595 pci_set_master(pdev);
1da177e4 2596
2cf71d2e
DJ		 2597 vptr->ioaddr = pci_resource_start(pdev, 0);
2598 vptr->memaddr = pci_resource_start(pdev, 1);
1da177e4 2599
2cf71d2e
DJ		 2600 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
2601 dev_err(&pdev->dev,
2602 "region #0 is not an I/O resource, aborting.\n");
2603 return -EINVAL;
2604 }
2605
2606 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
2607 dev_err(&pdev->dev,
2608 "region #1 is an I/O resource, aborting.\n");
2609 return -EINVAL;
2610 }
2611
2612 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
2613 dev_err(&pdev->dev, "region #1 is too small.\n");
2614 return -EINVAL;
2615 }
2616 vptr->pdev = pdev;
6aa20a22 2617
1da177e4
LT		 2618 return 0;
2619}
2620
2cf71d2e
DJ		 2621/**
2622 * velocity_print_info - per driver data
2623 * @vptr: velocity
2624 *
2625 * Print per driver data as the kernel driver finds Velocity
2626 * hardware
2627 */
2628static void __devinit velocity_print_info(struct velocity_info *vptr)
1da177e4 2629{
2cf71d2e 2630 struct net_device *dev = vptr->dev;
1da177e4 2631
2cf71d2e
DJ		 2632 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
2633 printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
2634 dev->name,
2635 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
2636 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1da177e4
LT		 2637}
2638
2639static u32 velocity_get_link(struct net_device *dev)
2640{
8ab6f3f7 2641 struct velocity_info *vptr = netdev_priv(dev);
c4067400 2642 struct mac_regs __iomem *regs = vptr->mac_regs;
59b693fb 2643 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT		 2644}
2645
1da177e4 2646
2cf71d2e
DJ		 2647/**
2648 * velocity_found1 - set up discovered velocity card
2649 * @pdev: PCI device
2650 * @ent: PCI device table entry that matched
2651 *
2652 * Configure a discovered adapter from scratch. Return a negative
2653 * errno error code on failure paths.
2654 */
2655static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4 2656{
2cf71d2e
DJ		 2657 static int first = 1;
2658 struct net_device *dev;
2659 int i;
2660 const char *drv_string;
2661 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
2662 struct velocity_info *vptr;
2663 struct mac_regs __iomem *regs;
2664 int ret = -ENOMEM;
1da177e4 2665
2cf71d2e
DJ		 2666 /* FIXME: this driver, like almost all other ethernet drivers,
2667 * can support more than MAX_UNITS.
2668 */
2669 if (velocity_nics >= MAX_UNITS) {
2670 dev_notice(&pdev->dev, "already found %d NICs.\n",
2671 velocity_nics);
2672 return -ENODEV;
2673 }
1da177e4 2674
2cf71d2e
DJ		 2675 dev = alloc_etherdev(sizeof(struct velocity_info));
2676 if (!dev) {
2677 dev_err(&pdev->dev, "allocate net device failed.\n");
2678 goto out;
2679 }
1da177e4 2680
2cf71d2e 2681 /* Chain it all together */
1da177e4 2682
2cf71d2e
DJ		 2683 SET_NETDEV_DEV(dev, &pdev->dev);
2684 vptr = netdev_priv(dev);
2685
2686
2687 if (first) {
2688 printk(KERN_INFO "%s Ver. %s\n",
2689 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
2690 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
2691 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
2692 first = 0;
2693 }
2694
2695 velocity_init_info(pdev, vptr, info);
2696
2697 vptr->dev = dev;
2698
2699 dev->irq = pdev->irq;
2700
2701 ret = pci_enable_device(pdev);
2702 if (ret < 0)
2703 goto err_free_dev;
2704
2705 ret = velocity_get_pci_info(vptr, pdev);
2706 if (ret < 0) {
2707 /* error message already printed */
2708 goto err_disable;
1da177e4 2709 }
2cf71d2e
DJ		 2710
2711 ret = pci_request_regions(pdev, VELOCITY_NAME);
2712 if (ret < 0) {
2713 dev_err(&pdev->dev, "No PCI resources.\n");
2714 goto err_disable;
1da177e4 2715 }
2cf71d2e
DJ		 2716
2717 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
2718 if (regs == NULL) {
2719 ret = -EIO;
2720 goto err_release_res;
1da177e4 2721 }
1da177e4 2722
2cf71d2e 2723 vptr->mac_regs = regs;
1da177e4 2724
2cf71d2e 2725 mac_wol_reset(regs);
1da177e4 2726
2cf71d2e 2727 dev->base_addr = vptr->ioaddr;
1da177e4 2728
2cf71d2e
DJ		 2729 for (i = 0; i < 6; i++)
2730 dev->dev_addr[i] = readb(&regs->PAR[i]);
6aa20a22 2731
6aa20a22 2732
2cf71d2e 2733 drv_string = dev_driver_string(&pdev->dev);
1da177e4 2734
2cf71d2e 2735 velocity_get_options(&vptr->options, velocity_nics, drv_string);
1da177e4 2736
2cf71d2e
DJ		 2737 /*
2738 * Mask out the options cannot be set to the chip
2739 */
6aa20a22 2740
2cf71d2e 2741 vptr->options.flags &= info->flags;
1da177e4 2742
2cf71d2e
DJ		 2743 /*
2744 * Enable the chip specified capbilities
2745 */
1da177e4 2746
2cf71d2e 2747 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
1da177e4 2748
2cf71d2e
DJ		 2749 vptr->wol_opts = vptr->options.wol_opts;
2750 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
1da177e4 2751
2cf71d2e 2752 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
1da177e4 2753
2cf71d2e
DJ		 2754 dev->irq = pdev->irq;
2755 dev->netdev_ops = &velocity_netdev_ops;
2756 dev->ethtool_ops = &velocity_ethtool_ops;
6aa20a22 2757
2cf71d2e
DJ		 2758 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
2759 NETIF_F_HW_VLAN_RX;
1da177e4 2760
2cf71d2e
DJ		 2761 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM)
2762 dev->features |= NETIF_F_IP_CSUM;
1da177e4 2763
2cf71d2e
DJ		 2764 ret = register_netdev(dev);
2765 if (ret < 0)
2766 goto err_iounmap;
2767
2768 if (!velocity_get_link(dev)) {
2769 netif_carrier_off(dev);
2770 vptr->mii_status |= VELOCITY_LINK_FAIL;
1da177e4
LT		 2771 }
2772
2cf71d2e
DJ		 2773 velocity_print_info(vptr);
2774 pci_set_drvdata(pdev, dev);
1da177e4 2775
2cf71d2e 2776 /* and leave the chip powered down */
1da177e4 2777
2cf71d2e
DJ		 2778 pci_set_power_state(pdev, PCI_D3hot);
2779#ifdef CONFIG_PM
2780 {
2781 unsigned long flags;
2782
2783 spin_lock_irqsave(&velocity_dev_list_lock, flags);
2784 list_add(&vptr->list, &velocity_dev_list);
2785 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
2786 }
2787#endif
2788 velocity_nics++;
2789out:
2790 return ret;
2791
2792err_iounmap:
2793 iounmap(regs);
2794err_release_res:
2795 pci_release_regions(pdev);
2796err_disable:
2797 pci_disable_device(pdev);
2798err_free_dev:
2799 free_netdev(dev);
2800 goto out;
1da177e4
LT		 2801}
2802
2cf71d2e
DJ		 2803
2804#ifdef CONFIG_PM
1da177e4
LT		 2805/**
2806 * wol_calc_crc - WOL CRC
2807 * @pattern: data pattern
2808 * @mask_pattern: mask
2809 *
2810 * Compute the wake on lan crc hashes for the packet header
2811 * we are interested in.
2812 */
c4067400 2813static u16 wol_calc_crc(int size, u8 *pattern, u8 *mask_pattern)
1da177e4
LT		 2814{
2815 u16 crc = 0xFFFF;
2816 u8 mask;
2817 int i, j;
2818
2819 for (i = 0; i < size; i++) {
2820 mask = mask_pattern[i];
2821
2822 /* Skip this loop if the mask equals to zero */
2823 if (mask == 0x00)
2824 continue;
2825
2826 for (j = 0; j < 8; j++) {
2827 if ((mask & 0x01) == 0) {
2828 mask >>= 1;
2829 continue;
2830 }
2831 mask >>= 1;
2832 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
2833 }
2834 }
2835 /* Finally, invert the result once to get the correct data */
2836 crc = ~crc;
906d66df 2837 return bitrev32(crc) >> 16;
1da177e4
LT		 2838}
2839
2840/**
2841 * velocity_set_wol - set up for wake on lan
2842 * @vptr: velocity to set WOL status on
2843 *
2844 * Set a card up for wake on lan either by unicast or by
2845 * ARP packet.
2846 *
2847 * FIXME: check static buffer is safe here
2848 */
1da177e4
LT		 2849static int velocity_set_wol(struct velocity_info *vptr)
2850{
c4067400 2851 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4
LT		 2852 static u8 buf[256];
2853 int i;
2854
2855 static u32 mask_pattern[2][4] = {
2856 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
2857 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
2858 };
2859
2860 writew(0xFFFF, &regs->WOLCRClr);
2861 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
2862 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
2863
2864 /*
2865 if (vptr->wol_opts & VELOCITY_WOL_PHY)
2866 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
2867 */
2868
c4067400 2869 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
1da177e4 2870 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
1da177e4
LT		 2871
2872 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
2873 struct arp_packet *arp = (struct arp_packet *) buf;
2874 u16 crc;
2875 memset(buf, 0, sizeof(struct arp_packet) + 7);
2876
2877 for (i = 0; i < 4; i++)
2878 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
2879
2880 arp->type = htons(ETH_P_ARP);
2881 arp->ar_op = htons(1);
2882
2883 memcpy(arp->ar_tip, vptr->ip_addr, 4);
2884
2885 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
2886 (u8 *) & mask_pattern[0][0]);
2887
2888 writew(crc, &regs->PatternCRC[0]);
2889 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
2890 }
2891
2892 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
2893 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
2894
2895 writew(0x0FFF, &regs->WOLSRClr);
2896
2897 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
2898 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
2899 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
2900
2901 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2902 }
2903
2904 if (vptr->mii_status & VELOCITY_SPEED_1000)
2905 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
2906
2907 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2908
2909 {
2910 u8 GCR;
2911 GCR = readb(&regs->CHIPGCR);
2912 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
2913 writeb(GCR, &regs->CHIPGCR);
2914 }
2915
2916 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
2917 /* Turn on SWPTAG just before entering power mode */
2918 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
2919 /* Go to bed ..... */
2920 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
2921
2922 return 0;
2923}
2924
2cf71d2e
DJ		 2925/**
2926 * velocity_save_context - save registers
2927 * @vptr: velocity
2928 * @context: buffer for stored context
2929 *
2930 * Retrieve the current configuration from the velocity hardware
2931 * and stash it in the context structure, for use by the context
2932 * restore functions. This allows us to save things we need across
2933 * power down states
2934 */
2935static void velocity_save_context(struct velocity_info *vptr, struct velocity_context *context)
2936{
2937 struct mac_regs __iomem *regs = vptr->mac_regs;
2938 u16 i;
2939 u8 __iomem *ptr = (u8 __iomem *)regs;
2940
2941 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
2942 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
2943
2944 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
2945 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
2946
2947 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
2948 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
2949
2950}
2951
1da177e4
LT		 2952static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
2953{
2954 struct net_device *dev = pci_get_drvdata(pdev);
2955 struct velocity_info *vptr = netdev_priv(dev);
2956 unsigned long flags;
2957
c4067400 2958 if (!netif_running(vptr->dev))
1da177e4
LT		 2959 return 0;
2960
2961 netif_device_detach(vptr->dev);
2962
2963 spin_lock_irqsave(&vptr->lock, flags);
2964 pci_save_state(pdev);
2965#ifdef ETHTOOL_GWOL
2966 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
2967 velocity_get_ip(vptr);
2968 velocity_save_context(vptr, &vptr->context);
2969 velocity_shutdown(vptr);
2970 velocity_set_wol(vptr);
4a51c0d0 2971 pci_enable_wake(pdev, PCI_D3hot, 1);
1da177e4
LT		 2972 pci_set_power_state(pdev, PCI_D3hot);
2973 } else {
2974 velocity_save_context(vptr, &vptr->context);
2975 velocity_shutdown(vptr);
2976 pci_disable_device(pdev);
2977 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2978 }
2cf71d2e
DJ		 2979#else
2980 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2981#endif
2982 spin_unlock_irqrestore(&vptr->lock, flags);
2983 return 0;
2984}
2985
2986/**
2987 * velocity_restore_context - restore registers
2988 * @vptr: velocity
2989 * @context: buffer for stored context
2990 *
2991 * Reload the register configuration from the velocity context
2992 * created by velocity_save_context.
2993 */
2994static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
2995{
2996 struct mac_regs __iomem *regs = vptr->mac_regs;
2997 int i;
2998 u8 __iomem *ptr = (u8 __iomem *)regs;
2999
3000 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4)
3001 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3002
3003 /* Just skip cr0 */
3004 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3005 /* Clear */
3006 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3007 /* Set */
3008 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3009 }
3010
3011 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4)
3012 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3013
3014 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3015 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3016
3017 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++)
3018 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
1da177e4
LT		 3019}
3020
3021static int velocity_resume(struct pci_dev *pdev)
3022{
3023 struct net_device *dev = pci_get_drvdata(pdev);
3024 struct velocity_info *vptr = netdev_priv(dev);
3025 unsigned long flags;
3026 int i;
3027
c4067400 3028 if (!netif_running(vptr->dev))
1da177e4
LT		 3029 return 0;
3030
3031 pci_set_power_state(pdev, PCI_D0);
3032 pci_enable_wake(pdev, 0, 0);
3033 pci_restore_state(pdev);
3034
3035 mac_wol_reset(vptr->mac_regs);
3036
3037 spin_lock_irqsave(&vptr->lock, flags);
3038 velocity_restore_context(vptr, &vptr->context);
3039 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3040 mac_disable_int(vptr->mac_regs);
3041
3042 velocity_tx_srv(vptr, 0);
3043
0fe9f15e 3044 for (i = 0; i < vptr->tx.numq; i++) {
c4067400 3045 if (vptr->tx.used[i])
1da177e4 3046 mac_tx_queue_wake(vptr->mac_regs, i);
1da177e4
LT		 3047 }
3048
3049 mac_enable_int(vptr->mac_regs);
3050 spin_unlock_irqrestore(&vptr->lock, flags);
3051 netif_device_attach(vptr->dev);
3052
3053 return 0;
3054}
2cf71d2e 3055#endif
1da177e4 3056
2cf71d2e
DJ		 3057/*
3058 * Definition for our device driver. The PCI layer interface
3059 * uses this to handle all our card discover and plugging
3060 */
3061static struct pci_driver velocity_driver = {
3062 .name = VELOCITY_NAME,
3063 .id_table = velocity_id_table,
3064 .probe = velocity_found1,
3065 .remove = __devexit_p(velocity_remove1),
3066#ifdef CONFIG_PM
3067 .suspend = velocity_suspend,
3068 .resume = velocity_resume,
3069#endif
3070};
3071
3072
3073/**
3074 * velocity_ethtool_up - pre hook for ethtool
3075 * @dev: network device
3076 *
3077 * Called before an ethtool operation. We need to make sure the
3078 * chip is out of D3 state before we poke at it.
3079 */
3080static int velocity_ethtool_up(struct net_device *dev)
3081{
3082 struct velocity_info *vptr = netdev_priv(dev);
3083 if (!netif_running(dev))
3084 pci_set_power_state(vptr->pdev, PCI_D0);
3085 return 0;
3086}
3087
3088/**
3089 * velocity_ethtool_down - post hook for ethtool
3090 * @dev: network device
3091 *
3092 * Called after an ethtool operation. Restore the chip back to D3
3093 * state if it isn't running.
3094 */
3095static void velocity_ethtool_down(struct net_device *dev)
3096{
3097 struct velocity_info *vptr = netdev_priv(dev);
3098 if (!netif_running(dev))
3099 pci_set_power_state(vptr->pdev, PCI_D3hot);
3100}
3101
3102static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3103{
3104 struct velocity_info *vptr = netdev_priv(dev);
3105 struct mac_regs __iomem *regs = vptr->mac_regs;
3106 u32 status;
3107 status = check_connection_type(vptr->mac_regs);
3108
3109 cmd->supported = SUPPORTED_TP |
3110 SUPPORTED_Autoneg |
3111 SUPPORTED_10baseT_Half |
3112 SUPPORTED_10baseT_Full |
3113 SUPPORTED_100baseT_Half |
3114 SUPPORTED_100baseT_Full |
3115 SUPPORTED_1000baseT_Half |
3116 SUPPORTED_1000baseT_Full;
3117 if (status & VELOCITY_SPEED_1000)
3118 cmd->speed = SPEED_1000;
3119 else if (status & VELOCITY_SPEED_100)
3120 cmd->speed = SPEED_100;
3121 else
3122 cmd->speed = SPEED_10;
3123 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
3124 cmd->port = PORT_TP;
3125 cmd->transceiver = XCVR_INTERNAL;
3126 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
3127
3128 if (status & VELOCITY_DUPLEX_FULL)
3129 cmd->duplex = DUPLEX_FULL;
3130 else
3131 cmd->duplex = DUPLEX_HALF;
3132
3133 return 0;
3134}
3135
3136static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3137{
3138 struct velocity_info *vptr = netdev_priv(dev);
3139 u32 curr_status;
3140 u32 new_status = 0;
3141 int ret = 0;
3142
3143 curr_status = check_connection_type(vptr->mac_regs);
3144 curr_status &= (~VELOCITY_LINK_FAIL);
3145
3146 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3147 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3148 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3149 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3150
3151 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
3152 ret = -EINVAL;
3153 else
3154 velocity_set_media_mode(vptr, new_status);
3155
3156 return ret;
3157}
3158
3159static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3160{
3161 struct velocity_info *vptr = netdev_priv(dev);
3162 strcpy(info->driver, VELOCITY_NAME);
3163 strcpy(info->version, VELOCITY_VERSION);
3164 strcpy(info->bus_info, pci_name(vptr->pdev));
3165}
3166
3167static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3168{
3169 struct velocity_info *vptr = netdev_priv(dev);
3170 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3171 wol->wolopts |= WAKE_MAGIC;
3172 /*
3173 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3174 wol.wolopts|=WAKE_PHY;
3175 */
3176 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3177 wol->wolopts |= WAKE_UCAST;
3178 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3179 wol->wolopts |= WAKE_ARP;
3180 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3181}
3182
3183static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3184{
3185 struct velocity_info *vptr = netdev_priv(dev);
3186
3187 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3188 return -EFAULT;
3189 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3190
3191 /*
3192 if (wol.wolopts & WAKE_PHY) {
3193 vptr->wol_opts|=VELOCITY_WOL_PHY;
3194 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3195 }
3196 */
3197
3198 if (wol->wolopts & WAKE_MAGIC) {
3199 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3200 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3201 }
3202 if (wol->wolopts & WAKE_UCAST) {
3203 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3204 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3205 }
3206 if (wol->wolopts & WAKE_ARP) {
3207 vptr->wol_opts |= VELOCITY_WOL_ARP;
3208 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3209 }
3210 memcpy(vptr->wol_passwd, wol->sopass, 6);
3211 return 0;
3212}
3213
3214static u32 velocity_get_msglevel(struct net_device *dev)
3215{
3216 return msglevel;
3217}
3218
3219static void velocity_set_msglevel(struct net_device *dev, u32 value)
3220{
3221 msglevel = value;
3222}
3223
3224static const struct ethtool_ops velocity_ethtool_ops = {
3225 .get_settings = velocity_get_settings,
3226 .set_settings = velocity_set_settings,
3227 .get_drvinfo = velocity_get_drvinfo,
3228 .get_wol = velocity_ethtool_get_wol,
3229 .set_wol = velocity_ethtool_set_wol,
3230 .get_msglevel = velocity_get_msglevel,
3231 .set_msglevel = velocity_set_msglevel,
3232 .get_link = velocity_get_link,
3233 .begin = velocity_ethtool_up,
3234 .complete = velocity_ethtool_down
3235};
ce9f7fe3 3236
2cf71d2e
DJ		 3237#ifdef CONFIG_PM
3238#ifdef CONFIG_INET
1da177e4
LT		 3239static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3240{
3241 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
a337499f
DL		 3242 struct net_device *dev = ifa->ifa_dev->dev;
3243 struct velocity_info *vptr;
3244 unsigned long flags;
1da177e4 3245
c346dca1 3246 if (dev_net(dev) != &init_net)
6133fb1a
DL		 3247 return NOTIFY_DONE;
3248
a337499f
DL		 3249 spin_lock_irqsave(&velocity_dev_list_lock, flags);
3250 list_for_each_entry(vptr, &velocity_dev_list, list) {
3251 if (vptr->dev == dev) {
3252 velocity_get_ip(vptr);
3253 break;
1da177e4 3254 }
1da177e4 3255 }
a337499f
DL		 3256 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
3257
1da177e4
LT		 3258 return NOTIFY_DONE;
3259}
2cf71d2e
DJ		 3260#endif /* CONFIG_INET */
3261#endif /* CONFIG_PM */
ce9f7fe3 3262
2cf71d2e
DJ		 3263#if defined(CONFIG_PM) && defined(CONFIG_INET)
3264static struct notifier_block velocity_inetaddr_notifier = {
3265 .notifier_call = velocity_netdev_event,
3266};
3267
3268static void velocity_register_notifier(void)
3269{
3270 register_inetaddr_notifier(&velocity_inetaddr_notifier);
3271}
3272
3273static void velocity_unregister_notifier(void)
3274{
3275 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
3276}
3277
3278#else
3279
3280#define velocity_register_notifier() do {} while (0)
3281#define velocity_unregister_notifier() do {} while (0)
3282
3283#endif /* defined(CONFIG_PM) && defined(CONFIG_INET) */
3284
3285/**
3286 * velocity_init_module - load time function
3287 *
3288 * Called when the velocity module is loaded. The PCI driver
3289 * is registered with the PCI layer, and in turn will call
3290 * the probe functions for each velocity adapter installed
3291 * in the system.
3292 */
3293static int __init velocity_init_module(void)
3294{
3295 int ret;
3296
3297 velocity_register_notifier();
3298 ret = pci_register_driver(&velocity_driver);
3299 if (ret < 0)
3300 velocity_unregister_notifier();
3301 return ret;
3302}
3303
3304/**
3305 * velocity_cleanup - module unload
3306 *
3307 * When the velocity hardware is unloaded this function is called.
3308 * It will clean up the notifiers and the unregister the PCI
3309 * driver interface for this hardware. This in turn cleans up
3310 * all discovered interfaces before returning from the function
3311 */
3312static void __exit velocity_cleanup_module(void)
3313{
3314 velocity_unregister_notifier();
3315 pci_unregister_driver(&velocity_driver);
3316}
3317
3318module_init(velocity_init_module);
3319module_exit(velocity_cleanup_module);
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