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netdev: Move atomic queue state bits into netdev_queue.
[net-next-2.6.git] / drivers / net / via-velocity.c
CommitLineData
1da177e4
LT		 1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
1da177e4
LT		 11 * rx_copybreak/alignment
12 * Scatter gather
13 * More testing
14 *
15 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@redhat.com>
16 * Additional fixes and clean up: Francois Romieu
17 *
18 * This source has not been verified for use in safety critical systems.
19 *
20 * Please direct queries about the revamped driver to the linux-kernel
21 * list not VIA.
22 *
23 * Original code:
24 *
25 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
26 * All rights reserved.
27 *
28 * This software may be redistributed and/or modified under
29 * the terms of the GNU General Public License as published by the Free
30 * Software Foundation; either version 2 of the License, or
31 * any later version.
32 *
33 * This program is distributed in the hope that it will be useful, but
34 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
35 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
36 * for more details.
37 *
38 * Author: Chuang Liang-Shing, AJ Jiang
39 *
40 * Date: Jan 24, 2003
41 *
42 * MODULE_LICENSE("GPL");
43 *
44 */
45
46
47#include <linux/module.h>
48#include <linux/types.h>
1da177e4
LT		 49#include <linux/init.h>
50#include <linux/mm.h>
51#include <linux/errno.h>
52#include <linux/ioport.h>
53#include <linux/pci.h>
54#include <linux/kernel.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/skbuff.h>
58#include <linux/delay.h>
59#include <linux/timer.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
1da177e4
LT		 62#include <linux/string.h>
63#include <linux/wait.h>
64#include <asm/io.h>
65#include <linux/if.h>
1da177e4
LT		 66#include <asm/uaccess.h>
67#include <linux/proc_fs.h>
68#include <linux/inetdevice.h>
69#include <linux/reboot.h>
70#include <linux/ethtool.h>
71#include <linux/mii.h>
72#include <linux/in.h>
73#include <linux/if_arp.h>
501e4d24 74#include <linux/if_vlan.h>
1da177e4
LT		 75#include <linux/ip.h>
76#include <linux/tcp.h>
77#include <linux/udp.h>
78#include <linux/crc-ccitt.h>
79#include <linux/crc32.h>
80
81#include "via-velocity.h"
82
83
84static int velocity_nics = 0;
85static int msglevel = MSG_LEVEL_INFO;
86
01faccbf
SH		 87/**
88 * mac_get_cam_mask - Read a CAM mask
89 * @regs: register block for this velocity
90 * @mask: buffer to store mask
91 *
92 * Fetch the mask bits of the selected CAM and store them into the
93 * provided mask buffer.
94 */
95
96static void mac_get_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
97{
98 int i;
99
100 /* Select CAM mask */
101 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
102
103 writeb(0, &regs->CAMADDR);
104
105 /* read mask */
106 for (i = 0; i < 8; i++)
107 *mask++ = readb(&(regs->MARCAM[i]));
108
109 /* disable CAMEN */
110 writeb(0, &regs->CAMADDR);
111
112 /* Select mar */
113 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
114
115}
116
117
118/**
119 * mac_set_cam_mask - Set a CAM mask
120 * @regs: register block for this velocity
121 * @mask: CAM mask to load
122 *
123 * Store a new mask into a CAM
124 */
125
126static void mac_set_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
127{
128 int i;
129 /* Select CAM mask */
130 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
131
132 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
133
134 for (i = 0; i < 8; i++) {
135 writeb(*mask++, &(regs->MARCAM[i]));
136 }
137 /* disable CAMEN */
138 writeb(0, &regs->CAMADDR);
139
140 /* Select mar */
141 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
142}
143
144static void mac_set_vlan_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
145{
146 int i;
147 /* Select CAM mask */
148 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
149
150 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
151
152 for (i = 0; i < 8; i++) {
153 writeb(*mask++, &(regs->MARCAM[i]));
154 }
155 /* disable CAMEN */
156 writeb(0, &regs->CAMADDR);
157
158 /* Select mar */
159 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
160}
161
162/**
163 * mac_set_cam - set CAM data
164 * @regs: register block of this velocity
165 * @idx: Cam index
166 * @addr: 2 or 6 bytes of CAM data
167 *
168 * Load an address or vlan tag into a CAM
169 */
170
171static void mac_set_cam(struct mac_regs __iomem * regs, int idx, const u8 *addr)
172{
173 int i;
174
175 /* Select CAM mask */
176 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
177
178 idx &= (64 - 1);
179
180 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
181
182 for (i = 0; i < 6; i++) {
183 writeb(*addr++, &(regs->MARCAM[i]));
184 }
185 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
186
187 udelay(10);
188
189 writeb(0, &regs->CAMADDR);
190
191 /* Select mar */
192 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
193}
194
195static void mac_set_vlan_cam(struct mac_regs __iomem * regs, int idx,
196 const u8 *addr)
197{
198
199 /* Select CAM mask */
200 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
201
202 idx &= (64 - 1);
203
204 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
205 writew(*((u16 *) addr), &regs->MARCAM[0]);
206
207 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
208
209 udelay(10);
210
211 writeb(0, &regs->CAMADDR);
212
213 /* Select mar */
214 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
215}
216
217
218/**
219 * mac_wol_reset - reset WOL after exiting low power
220 * @regs: register block of this velocity
221 *
222 * Called after we drop out of wake on lan mode in order to
223 * reset the Wake on lan features. This function doesn't restore
224 * the rest of the logic from the result of sleep/wakeup
225 */
226
227static void mac_wol_reset(struct mac_regs __iomem * regs)
228{
229
230 /* Turn off SWPTAG right after leaving power mode */
231 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
232 /* clear sticky bits */
233 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
234
235 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
236 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
237 /* disable force PME-enable */
238 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
239 /* disable power-event config bit */
240 writew(0xFFFF, &regs->WOLCRClr);
241 /* clear power status */
242 writew(0xFFFF, &regs->WOLSRClr);
243}
1da177e4
LT		 244
245static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
7282d491 246static const struct ethtool_ops velocity_ethtool_ops;
1da177e4
LT		 247
248/*
249 Define module options
250*/
251
252MODULE_AUTHOR("VIA Networking Technologies, Inc.");
253MODULE_LICENSE("GPL");
254MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
255
256#define VELOCITY_PARAM(N,D) \
257 static int N[MAX_UNITS]=OPTION_DEFAULT;\
258 module_param_array(N, int, NULL, 0); \
259 MODULE_PARM_DESC(N, D);
260
261#define RX_DESC_MIN 64
262#define RX_DESC_MAX 255
263#define RX_DESC_DEF 64
264VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
265
266#define TX_DESC_MIN 16
267#define TX_DESC_MAX 256
268#define TX_DESC_DEF 64
269VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
270
1da177e4
LT		 271#define RX_THRESH_MIN 0
272#define RX_THRESH_MAX 3
273#define RX_THRESH_DEF 0
274/* rx_thresh[] is used for controlling the receive fifo threshold.
275 0: indicate the rxfifo threshold is 128 bytes.
276 1: indicate the rxfifo threshold is 512 bytes.
277 2: indicate the rxfifo threshold is 1024 bytes.
278 3: indicate the rxfifo threshold is store & forward.
279*/
280VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
281
282#define DMA_LENGTH_MIN 0
283#define DMA_LENGTH_MAX 7
284#define DMA_LENGTH_DEF 0
285
286/* DMA_length[] is used for controlling the DMA length
287 0: 8 DWORDs
288 1: 16 DWORDs
289 2: 32 DWORDs
290 3: 64 DWORDs
291 4: 128 DWORDs
292 5: 256 DWORDs
293 6: SF(flush till emply)
294 7: SF(flush till emply)
295*/
296VELOCITY_PARAM(DMA_length, "DMA length");
297
1da177e4
LT		 298#define IP_ALIG_DEF 0
299/* IP_byte_align[] is used for IP header DWORD byte aligned
300 0: indicate the IP header won't be DWORD byte aligned.(Default) .
301 1: indicate the IP header will be DWORD byte aligned.
302 In some enviroment, the IP header should be DWORD byte aligned,
303 or the packet will be droped when we receive it. (eg: IPVS)
304*/
305VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
306
307#define TX_CSUM_DEF 1
308/* txcsum_offload[] is used for setting the checksum offload ability of NIC.
309 (We only support RX checksum offload now)
310 0: disable csum_offload[checksum offload
311 1: enable checksum offload. (Default)
312*/
313VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
314
315#define FLOW_CNTL_DEF 1
316#define FLOW_CNTL_MIN 1
317#define FLOW_CNTL_MAX 5
318
319/* flow_control[] is used for setting the flow control ability of NIC.
320 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
321 2: enable TX flow control.
322 3: enable RX flow control.
323 4: enable RX/TX flow control.
324 5: disable
325*/
326VELOCITY_PARAM(flow_control, "Enable flow control ability");
327
328#define MED_LNK_DEF 0
329#define MED_LNK_MIN 0
330#define MED_LNK_MAX 4
331/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
332 0: indicate autonegotiation for both speed and duplex mode
333 1: indicate 100Mbps half duplex mode
334 2: indicate 100Mbps full duplex mode
335 3: indicate 10Mbps half duplex mode
336 4: indicate 10Mbps full duplex mode
337
338 Note:
339 if EEPROM have been set to the force mode, this option is ignored
340 by driver.
341*/
342VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
343
344#define VAL_PKT_LEN_DEF 0
345/* ValPktLen[] is used for setting the checksum offload ability of NIC.
346 0: Receive frame with invalid layer 2 length (Default)
347 1: Drop frame with invalid layer 2 length
348*/
349VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
350
351#define WOL_OPT_DEF 0
352#define WOL_OPT_MIN 0
353#define WOL_OPT_MAX 7
354/* wol_opts[] is used for controlling wake on lan behavior.
355 0: Wake up if recevied a magic packet. (Default)
356 1: Wake up if link status is on/off.
357 2: Wake up if recevied an arp packet.
358 4: Wake up if recevied any unicast packet.
359 Those value can be sumed up to support more than one option.
360*/
361VELOCITY_PARAM(wol_opts, "Wake On Lan options");
362
363#define INT_WORKS_DEF 20
364#define INT_WORKS_MIN 10
365#define INT_WORKS_MAX 64
366
367VELOCITY_PARAM(int_works, "Number of packets per interrupt services");
368
369static int rx_copybreak = 200;
370module_param(rx_copybreak, int, 0644);
371MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
372
cabb7667
JG		 373static void velocity_init_info(struct pci_dev *pdev, struct velocity_info *vptr,
374 const struct velocity_info_tbl *info);
1da177e4
LT		 375static int velocity_get_pci_info(struct velocity_info *, struct pci_dev *pdev);
376static void velocity_print_info(struct velocity_info *vptr);
377static int velocity_open(struct net_device *dev);
378static int velocity_change_mtu(struct net_device *dev, int mtu);
379static int velocity_xmit(struct sk_buff *skb, struct net_device *dev);
7d12e780 380static int velocity_intr(int irq, void *dev_instance);
1da177e4
LT		 381static void velocity_set_multi(struct net_device *dev);
382static struct net_device_stats *velocity_get_stats(struct net_device *dev);
383static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
384static int velocity_close(struct net_device *dev);
385static int velocity_receive_frame(struct velocity_info *, int idx);
386static int velocity_alloc_rx_buf(struct velocity_info *, int idx);
387static void velocity_free_rd_ring(struct velocity_info *vptr);
388static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *);
389static int velocity_soft_reset(struct velocity_info *vptr);
390static void mii_init(struct velocity_info *vptr, u32 mii_status);
8a22dddb 391static u32 velocity_get_link(struct net_device *dev);
1da177e4
LT		 392static u32 velocity_get_opt_media_mode(struct velocity_info *vptr);
393static void velocity_print_link_status(struct velocity_info *vptr);
394static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs);
395static void velocity_shutdown(struct velocity_info *vptr);
396static void enable_flow_control_ability(struct velocity_info *vptr);
397static void enable_mii_autopoll(struct mac_regs __iomem * regs);
398static int velocity_mii_read(struct mac_regs __iomem *, u8 byIdx, u16 * pdata);
399static int velocity_mii_write(struct mac_regs __iomem *, u8 byMiiAddr, u16 data);
400static u32 mii_check_media_mode(struct mac_regs __iomem * regs);
401static u32 check_connection_type(struct mac_regs __iomem * regs);
402static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status);
403
404#ifdef CONFIG_PM
405
406static int velocity_suspend(struct pci_dev *pdev, pm_message_t state);
407static int velocity_resume(struct pci_dev *pdev);
408
ce9f7fe3
RD		 409static DEFINE_SPINLOCK(velocity_dev_list_lock);
410static LIST_HEAD(velocity_dev_list);
411
412#endif
413
414#if defined(CONFIG_PM) && defined(CONFIG_INET)
415
1da177e4
LT		 416static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr);
417
418static struct notifier_block velocity_inetaddr_notifier = {
419 .notifier_call = velocity_netdev_event,
420};
421
1da177e4
LT		 422static void velocity_register_notifier(void)
423{
424 register_inetaddr_notifier(&velocity_inetaddr_notifier);
425}
426
427static void velocity_unregister_notifier(void)
428{
429 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
430}
431
ce9f7fe3 432#else
1da177e4
LT		 433
434#define velocity_register_notifier() do {} while (0)
435#define velocity_unregister_notifier() do {} while (0)
436
ce9f7fe3 437#endif
1da177e4
LT		 438
439/*
440 * Internal board variants. At the moment we have only one
441 */
442
4f14b92f 443static struct velocity_info_tbl chip_info_table[] = {
cabb7667
JG		 444 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
445 { }
1da177e4
LT		 446};
447
448/*
449 * Describe the PCI device identifiers that we support in this
450 * device driver. Used for hotplug autoloading.
451 */
452
e54f4893
JG		 453static const struct pci_device_id velocity_id_table[] __devinitdata = {
454 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
455 { }
1da177e4
LT		 456};
457
458MODULE_DEVICE_TABLE(pci, velocity_id_table);
459
460/**
461 * get_chip_name - identifier to name
462 * @id: chip identifier
463 *
464 * Given a chip identifier return a suitable description. Returns
465 * a pointer a static string valid while the driver is loaded.
466 */
467
01faccbf 468static const char __devinit *get_chip_name(enum chip_type chip_id)
1da177e4
LT		 469{
470 int i;
471 for (i = 0; chip_info_table[i].name != NULL; i++)
472 if (chip_info_table[i].chip_id == chip_id)
473 break;
474 return chip_info_table[i].name;
475}
476
477/**
478 * velocity_remove1 - device unplug
479 * @pdev: PCI device being removed
480 *
481 * Device unload callback. Called on an unplug or on module
482 * unload for each active device that is present. Disconnects
483 * the device from the network layer and frees all the resources
484 */
485
486static void __devexit velocity_remove1(struct pci_dev *pdev)
487{
488 struct net_device *dev = pci_get_drvdata(pdev);
8ab6f3f7 489 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 490
491#ifdef CONFIG_PM
492 unsigned long flags;
493
494 spin_lock_irqsave(&velocity_dev_list_lock, flags);
495 if (!list_empty(&velocity_dev_list))
496 list_del(&vptr->list);
497 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
498#endif
499 unregister_netdev(dev);
500 iounmap(vptr->mac_regs);
501 pci_release_regions(pdev);
502 pci_disable_device(pdev);
503 pci_set_drvdata(pdev, NULL);
504 free_netdev(dev);
505
506 velocity_nics--;
507}
508
509/**
510 * velocity_set_int_opt - parser for integer options
511 * @opt: pointer to option value
512 * @val: value the user requested (or -1 for default)
513 * @min: lowest value allowed
514 * @max: highest value allowed
515 * @def: default value
516 * @name: property name
517 * @dev: device name
518 *
519 * Set an integer property in the module options. This function does
520 * all the verification and checking as well as reporting so that
521 * we don't duplicate code for each option.
522 */
523
524static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, char *devname)
525{
526 if (val == -1)
527 *opt = def;
528 else if (val < min || val > max) {
529 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
530 devname, name, min, max);
531 *opt = def;
532 } else {
533 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
534 devname, name, val);
535 *opt = val;
536 }
537}
538
539/**
540 * velocity_set_bool_opt - parser for boolean options
541 * @opt: pointer to option value
542 * @val: value the user requested (or -1 for default)
543 * @def: default value (yes/no)
544 * @flag: numeric value to set for true.
545 * @name: property name
546 * @dev: device name
547 *
548 * Set a boolean property in the module options. This function does
549 * all the verification and checking as well as reporting so that
550 * we don't duplicate code for each option.
551 */
552
553static void __devinit velocity_set_bool_opt(u32 * opt, int val, int def, u32 flag, char *name, char *devname)
554{
555 (*opt) &= (~flag);
556 if (val == -1)
557 *opt |= (def ? flag : 0);
558 else if (val < 0 || val > 1) {
6aa20a22 559 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT		 560 devname, name);
561 *opt |= (def ? flag : 0);
562 } else {
6aa20a22 563 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT		 564 devname, name, val ? "TRUE" : "FALSE");
565 *opt |= (val ? flag : 0);
566 }
567}
568
569/**
570 * velocity_get_options - set options on device
571 * @opts: option structure for the device
572 * @index: index of option to use in module options array
573 * @devname: device name
574 *
575 * Turn the module and command options into a single structure
576 * for the current device
577 */
578
579static void __devinit velocity_get_options(struct velocity_opt *opts, int index, char *devname)
580{
581
582 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
583 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
584 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
585 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
501e4d24 586
1da177e4
LT		 587 velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname);
588 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
589 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
590 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
591 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
592 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
593 velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname);
594 opts->numrx = (opts->numrx & ~3);
595}
596
597/**
598 * velocity_init_cam_filter - initialise CAM
599 * @vptr: velocity to program
600 *
601 * Initialize the content addressable memory used for filters. Load
602 * appropriately according to the presence of VLAN
603 */
604
605static void velocity_init_cam_filter(struct velocity_info *vptr)
606{
607 struct mac_regs __iomem * regs = vptr->mac_regs;
608
609 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
610 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
611 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
612
613 /* Disable all CAMs */
614 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
615 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
01faccbf
SH		 616 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
617 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4 618
d4f73c8e 619 /* Enable VCAMs */
501e4d24 620 if (vptr->vlgrp) {
d4f73c8e
FR		 621 unsigned int vid, i = 0;
622
623 if (!vlan_group_get_device(vptr->vlgrp, 0))
624 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
501e4d24 625
d4f73c8e
FR		 626 for (vid = 1; (vid < VLAN_VID_MASK); vid++) {
627 if (vlan_group_get_device(vptr->vlgrp, vid)) {
628 mac_set_vlan_cam(regs, i, (u8 *) &vid);
629 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
630 if (++i >= VCAM_SIZE)
631 break;
501e4d24
SH		 632 }
633 }
01faccbf 634 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
1da177e4
LT		 635 }
636}
637
d4f73c8e
FR		 638static void velocity_vlan_rx_register(struct net_device *dev,
639 struct vlan_group *grp)
640{
641 struct velocity_info *vptr = netdev_priv(dev);
642
643 vptr->vlgrp = grp;
644}
645
501e4d24
SH		 646static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
647{
648 struct velocity_info *vptr = netdev_priv(dev);
649
650 spin_lock_irq(&vptr->lock);
651 velocity_init_cam_filter(vptr);
652 spin_unlock_irq(&vptr->lock);
653}
654
655static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
656{
657 struct velocity_info *vptr = netdev_priv(dev);
658
659 spin_lock_irq(&vptr->lock);
660 vlan_group_set_device(vptr->vlgrp, vid, NULL);
661 velocity_init_cam_filter(vptr);
662 spin_unlock_irq(&vptr->lock);
663}
664
665
1da177e4
LT		 666/**
667 * velocity_rx_reset - handle a receive reset
668 * @vptr: velocity we are resetting
669 *
670 * Reset the ownership and status for the receive ring side.
671 * Hand all the receive queue to the NIC.
672 */
673
674static void velocity_rx_reset(struct velocity_info *vptr)
675{
676
677 struct mac_regs __iomem * regs = vptr->mac_regs;
678 int i;
679
680 vptr->rd_dirty = vptr->rd_filled = vptr->rd_curr = 0;
681
682 /*
683 * Init state, all RD entries belong to the NIC
684 */
685 for (i = 0; i < vptr->options.numrx; ++i)
4a51c0d0 686 vptr->rd_ring[i].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 687
688 writew(vptr->options.numrx, &regs->RBRDU);
689 writel(vptr->rd_pool_dma, &regs->RDBaseLo);
690 writew(0, &regs->RDIdx);
691 writew(vptr->options.numrx - 1, &regs->RDCSize);
692}
693
694/**
695 * velocity_init_registers - initialise MAC registers
696 * @vptr: velocity to init
697 * @type: type of initialisation (hot or cold)
698 *
699 * Initialise the MAC on a reset or on first set up on the
700 * hardware.
701 */
702
6aa20a22 703static void velocity_init_registers(struct velocity_info *vptr,
1da177e4
LT		 704 enum velocity_init_type type)
705{
706 struct mac_regs __iomem * regs = vptr->mac_regs;
707 int i, mii_status;
708
709 mac_wol_reset(regs);
710
711 switch (type) {
712 case VELOCITY_INIT_RESET:
713 case VELOCITY_INIT_WOL:
714
715 netif_stop_queue(vptr->dev);
716
717 /*
718 * Reset RX to prevent RX pointer not on the 4X location
719 */
720 velocity_rx_reset(vptr);
721 mac_rx_queue_run(regs);
722 mac_rx_queue_wake(regs);
723
724 mii_status = velocity_get_opt_media_mode(vptr);
725 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
726 velocity_print_link_status(vptr);
727 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
728 netif_wake_queue(vptr->dev);
729 }
730
731 enable_flow_control_ability(vptr);
732
733 mac_clear_isr(regs);
734 writel(CR0_STOP, &regs->CR0Clr);
6aa20a22 735 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1da177e4
LT		 736 &regs->CR0Set);
737
738 break;
739
740 case VELOCITY_INIT_COLD:
741 default:
742 /*
743 * Do reset
744 */
745 velocity_soft_reset(vptr);
746 mdelay(5);
747
748 mac_eeprom_reload(regs);
749 for (i = 0; i < 6; i++) {
750 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
751 }
752 /*
753 * clear Pre_ACPI bit.
754 */
755 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
756 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
757 mac_set_dma_length(regs, vptr->options.DMA_length);
758
759 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
760 /*
761 * Back off algorithm use original IEEE standard
762 */
763 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
764
765 /*
766 * Init CAM filter
767 */
768 velocity_init_cam_filter(vptr);
769
770 /*
771 * Set packet filter: Receive directed and broadcast address
772 */
773 velocity_set_multi(vptr->dev);
774
775 /*
776 * Enable MII auto-polling
777 */
778 enable_mii_autopoll(regs);
779
780 vptr->int_mask = INT_MASK_DEF;
781
4a51c0d0 782 writel(vptr->rd_pool_dma, &regs->RDBaseLo);
1da177e4
LT		 783 writew(vptr->options.numrx - 1, &regs->RDCSize);
784 mac_rx_queue_run(regs);
785 mac_rx_queue_wake(regs);
786
787 writew(vptr->options.numtx - 1, &regs->TDCSize);
788
789 for (i = 0; i < vptr->num_txq; i++) {
4a51c0d0 790 writel(vptr->td_pool_dma[i], &regs->TDBaseLo[i]);
1da177e4
LT		 791 mac_tx_queue_run(regs, i);
792 }
793
794 init_flow_control_register(vptr);
795
796 writel(CR0_STOP, &regs->CR0Clr);
797 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
798
799 mii_status = velocity_get_opt_media_mode(vptr);
800 netif_stop_queue(vptr->dev);
801
802 mii_init(vptr, mii_status);
803
804 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
805 velocity_print_link_status(vptr);
806 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
807 netif_wake_queue(vptr->dev);
808 }
809
810 enable_flow_control_ability(vptr);
811 mac_hw_mibs_init(regs);
812 mac_write_int_mask(vptr->int_mask, regs);
813 mac_clear_isr(regs);
814
815 }
816}
817
818/**
819 * velocity_soft_reset - soft reset
820 * @vptr: velocity to reset
821 *
822 * Kick off a soft reset of the velocity adapter and then poll
823 * until the reset sequence has completed before returning.
824 */
825
826static int velocity_soft_reset(struct velocity_info *vptr)
827{
828 struct mac_regs __iomem * regs = vptr->mac_regs;
829 int i = 0;
830
831 writel(CR0_SFRST, &regs->CR0Set);
832
833 for (i = 0; i < W_MAX_TIMEOUT; i++) {
834 udelay(5);
835 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
836 break;
837 }
838
839 if (i == W_MAX_TIMEOUT) {
840 writel(CR0_FORSRST, &regs->CR0Set);
841 /* FIXME: PCI POSTING */
842 /* delay 2ms */
843 mdelay(2);
844 }
845 return 0;
846}
847
848/**
849 * velocity_found1 - set up discovered velocity card
850 * @pdev: PCI device
851 * @ent: PCI device table entry that matched
852 *
853 * Configure a discovered adapter from scratch. Return a negative
854 * errno error code on failure paths.
855 */
856
857static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
858{
859 static int first = 1;
860 struct net_device *dev;
861 int i;
cabb7667 862 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
1da177e4
LT		 863 struct velocity_info *vptr;
864 struct mac_regs __iomem * regs;
865 int ret = -ENOMEM;
866
e54f4893
JG		 867 /* FIXME: this driver, like almost all other ethernet drivers,
868 * can support more than MAX_UNITS.
869 */
1da177e4 870 if (velocity_nics >= MAX_UNITS) {
6aa20a22 871 dev_notice(&pdev->dev, "already found %d NICs.\n",
e54f4893 872 velocity_nics);
1da177e4
LT		 873 return -ENODEV;
874 }
875
876 dev = alloc_etherdev(sizeof(struct velocity_info));
e54f4893 877 if (!dev) {
9b91cf9d 878 dev_err(&pdev->dev, "allocate net device failed.\n");
1da177e4
LT		 879 goto out;
880 }
6aa20a22 881
1da177e4 882 /* Chain it all together */
6aa20a22 883
1da177e4 884 SET_NETDEV_DEV(dev, &pdev->dev);
8ab6f3f7 885 vptr = netdev_priv(dev);
1da177e4
LT		 886
887
888 if (first) {
6aa20a22 889 printk(KERN_INFO "%s Ver. %s\n",
1da177e4
LT		 890 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
891 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
892 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
893 first = 0;
894 }
895
896 velocity_init_info(pdev, vptr, info);
897
898 vptr->dev = dev;
899
900 dev->irq = pdev->irq;
901
902 ret = pci_enable_device(pdev);
6aa20a22 903 if (ret < 0)
1da177e4
LT		 904 goto err_free_dev;
905
906 ret = velocity_get_pci_info(vptr, pdev);
907 if (ret < 0) {
e54f4893 908 /* error message already printed */
1da177e4
LT		 909 goto err_disable;
910 }
911
912 ret = pci_request_regions(pdev, VELOCITY_NAME);
913 if (ret < 0) {
9b91cf9d 914 dev_err(&pdev->dev, "No PCI resources.\n");
1da177e4
LT		 915 goto err_disable;
916 }
917
cabb7667 918 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
1da177e4
LT		 919 if (regs == NULL) {
920 ret = -EIO;
921 goto err_release_res;
922 }
923
924 vptr->mac_regs = regs;
925
926 mac_wol_reset(regs);
927
928 dev->base_addr = vptr->ioaddr;
929
930 for (i = 0; i < 6; i++)
931 dev->dev_addr[i] = readb(&regs->PAR[i]);
932
933
934 velocity_get_options(&vptr->options, velocity_nics, dev->name);
935
6aa20a22 936 /*
1da177e4
LT		 937 * Mask out the options cannot be set to the chip
938 */
6aa20a22 939
1da177e4
LT		 940 vptr->options.flags &= info->flags;
941
942 /*
943 * Enable the chip specified capbilities
944 */
6aa20a22 945
1da177e4
LT		 946 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
947
948 vptr->wol_opts = vptr->options.wol_opts;
949 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
950
951 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
952
953 dev->irq = pdev->irq;
954 dev->open = velocity_open;
955 dev->hard_start_xmit = velocity_xmit;
956 dev->stop = velocity_close;
957 dev->get_stats = velocity_get_stats;
958 dev->set_multicast_list = velocity_set_multi;
959 dev->do_ioctl = velocity_ioctl;
960 dev->ethtool_ops = &velocity_ethtool_ops;
961 dev->change_mtu = velocity_change_mtu;
501e4d24
SH		 962
963 dev->vlan_rx_add_vid = velocity_vlan_rx_add_vid;
964 dev->vlan_rx_kill_vid = velocity_vlan_rx_kill_vid;
d4f73c8e 965 dev->vlan_rx_register = velocity_vlan_rx_register;
501e4d24 966
1da177e4
LT		 967#ifdef VELOCITY_ZERO_COPY_SUPPORT
968 dev->features |= NETIF_F_SG;
969#endif
d4f73c8e
FR		 970 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
971 NETIF_F_HW_VLAN_RX;
1da177e4 972
501e4d24 973 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM)
9f3f46b5 974 dev->features |= NETIF_F_IP_CSUM;
1da177e4
LT		 975
976 ret = register_netdev(dev);
977 if (ret < 0)
978 goto err_iounmap;
979
8a22dddb
FR		 980 if (velocity_get_link(dev))
981 netif_carrier_off(dev);
982
1da177e4
LT		 983 velocity_print_info(vptr);
984 pci_set_drvdata(pdev, dev);
6aa20a22 985
1da177e4 986 /* and leave the chip powered down */
6aa20a22 987
1da177e4
LT		 988 pci_set_power_state(pdev, PCI_D3hot);
989#ifdef CONFIG_PM
990 {
991 unsigned long flags;
992
993 spin_lock_irqsave(&velocity_dev_list_lock, flags);
994 list_add(&vptr->list, &velocity_dev_list);
995 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
996 }
997#endif
998 velocity_nics++;
999out:
1000 return ret;
1001
1002err_iounmap:
1003 iounmap(regs);
1004err_release_res:
1005 pci_release_regions(pdev);
1006err_disable:
1007 pci_disable_device(pdev);
1008err_free_dev:
1009 free_netdev(dev);
1010 goto out;
1011}
1012
1013/**
1014 * velocity_print_info - per driver data
1015 * @vptr: velocity
1016 *
1017 * Print per driver data as the kernel driver finds Velocity
1018 * hardware
1019 */
1020
1021static void __devinit velocity_print_info(struct velocity_info *vptr)
1022{
1023 struct net_device *dev = vptr->dev;
1024
1025 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
6aa20a22
JG		 1026 printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
1027 dev->name,
1028 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1da177e4
LT		 1029 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1030}
1031
1032/**
1033 * velocity_init_info - init private data
1034 * @pdev: PCI device
1035 * @vptr: Velocity info
1036 * @info: Board type
1037 *
1038 * Set up the initial velocity_info struct for the device that has been
1039 * discovered.
1040 */
1041
cabb7667
JG		 1042static void __devinit velocity_init_info(struct pci_dev *pdev,
1043 struct velocity_info *vptr,
1044 const struct velocity_info_tbl *info)
1da177e4
LT		 1045{
1046 memset(vptr, 0, sizeof(struct velocity_info));
1047
1048 vptr->pdev = pdev;
1049 vptr->chip_id = info->chip_id;
1da177e4
LT		 1050 vptr->num_txq = info->txqueue;
1051 vptr->multicast_limit = MCAM_SIZE;
1052 spin_lock_init(&vptr->lock);
1053 INIT_LIST_HEAD(&vptr->list);
1054}
1055
1056/**
1057 * velocity_get_pci_info - retrieve PCI info for device
1058 * @vptr: velocity device
1059 * @pdev: PCI device it matches
1060 *
1061 * Retrieve the PCI configuration space data that interests us from
1062 * the kernel PCI layer
1063 */
1064
1065static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
1066{
44c10138 1067 vptr->rev_id = pdev->revision;
6aa20a22 1068
1da177e4
LT		 1069 pci_set_master(pdev);
1070
1071 vptr->ioaddr = pci_resource_start(pdev, 0);
1072 vptr->memaddr = pci_resource_start(pdev, 1);
6aa20a22 1073
e54f4893 1074 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
9b91cf9d 1075 dev_err(&pdev->dev,
e54f4893 1076 "region #0 is not an I/O resource, aborting.\n");
1da177e4
LT		 1077 return -EINVAL;
1078 }
1079
e54f4893 1080 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
9b91cf9d 1081 dev_err(&pdev->dev,
e54f4893 1082 "region #1 is an I/O resource, aborting.\n");
1da177e4
LT		 1083 return -EINVAL;
1084 }
1085
cabb7667 1086 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
9b91cf9d 1087 dev_err(&pdev->dev, "region #1 is too small.\n");
1da177e4
LT		 1088 return -EINVAL;
1089 }
1090 vptr->pdev = pdev;
1091
1092 return 0;
1093}
1094
1095/**
1096 * velocity_init_rings - set up DMA rings
1097 * @vptr: Velocity to set up
1098 *
1099 * Allocate PCI mapped DMA rings for the receive and transmit layer
1100 * to use.
1101 */
1102
1103static int velocity_init_rings(struct velocity_info *vptr)
1104{
1105 int i;
1106 unsigned int psize;
1107 unsigned int tsize;
1108 dma_addr_t pool_dma;
1109 u8 *pool;
1110
1111 /*
6aa20a22 1112 * Allocate all RD/TD rings a single pool
1da177e4 1113 */
6aa20a22
JG		 1114
1115 psize = vptr->options.numrx * sizeof(struct rx_desc) +
1da177e4
LT		 1116 vptr->options.numtx * sizeof(struct tx_desc) * vptr->num_txq;
1117
1118 /*
1119 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1120 * alignment
1121 */
1122 pool = pci_alloc_consistent(vptr->pdev, psize, &pool_dma);
1123
1124 if (pool == NULL) {
6aa20a22 1125 printk(KERN_ERR "%s : DMA memory allocation failed.\n",
1da177e4
LT		 1126 vptr->dev->name);
1127 return -ENOMEM;
1128 }
1129
1130 memset(pool, 0, psize);
1131
1132 vptr->rd_ring = (struct rx_desc *) pool;
1133
1134 vptr->rd_pool_dma = pool_dma;
1135
1136 tsize = vptr->options.numtx * PKT_BUF_SZ * vptr->num_txq;
6aa20a22 1137 vptr->tx_bufs = pci_alloc_consistent(vptr->pdev, tsize,
1da177e4
LT		 1138 &vptr->tx_bufs_dma);
1139
1140 if (vptr->tx_bufs == NULL) {
6aa20a22 1141 printk(KERN_ERR "%s: DMA memory allocation failed.\n",
1da177e4
LT		 1142 vptr->dev->name);
1143 pci_free_consistent(vptr->pdev, psize, pool, pool_dma);
1144 return -ENOMEM;
1145 }
1146
1147 memset(vptr->tx_bufs, 0, vptr->options.numtx * PKT_BUF_SZ * vptr->num_txq);
1148
1149 i = vptr->options.numrx * sizeof(struct rx_desc);
1150 pool += i;
1151 pool_dma += i;
1152 for (i = 0; i < vptr->num_txq; i++) {
1153 int offset = vptr->options.numtx * sizeof(struct tx_desc);
1154
1155 vptr->td_pool_dma[i] = pool_dma;
1156 vptr->td_rings[i] = (struct tx_desc *) pool;
1157 pool += offset;
1158 pool_dma += offset;
1159 }
1160 return 0;
1161}
1162
1163/**
1164 * velocity_free_rings - free PCI ring pointers
1165 * @vptr: Velocity to free from
1166 *
1167 * Clean up the PCI ring buffers allocated to this velocity.
1168 */
1169
1170static void velocity_free_rings(struct velocity_info *vptr)
1171{
1172 int size;
1173
6aa20a22 1174 size = vptr->options.numrx * sizeof(struct rx_desc) +
1da177e4
LT		 1175 vptr->options.numtx * sizeof(struct tx_desc) * vptr->num_txq;
1176
1177 pci_free_consistent(vptr->pdev, size, vptr->rd_ring, vptr->rd_pool_dma);
1178
1179 size = vptr->options.numtx * PKT_BUF_SZ * vptr->num_txq;
1180
1181 pci_free_consistent(vptr->pdev, size, vptr->tx_bufs, vptr->tx_bufs_dma);
1182}
1183
1184static inline void velocity_give_many_rx_descs(struct velocity_info *vptr)
1185{
1186 struct mac_regs __iomem *regs = vptr->mac_regs;
1187 int avail, dirty, unusable;
1188
1189 /*
1190 * RD number must be equal to 4X per hardware spec
1191 * (programming guide rev 1.20, p.13)
1192 */
1193 if (vptr->rd_filled < 4)
1194 return;
1195
1196 wmb();
1197
1198 unusable = vptr->rd_filled & 0x0003;
1199 dirty = vptr->rd_dirty - unusable;
1200 for (avail = vptr->rd_filled & 0xfffc; avail; avail--) {
1201 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
4a51c0d0 1202 vptr->rd_ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 1203 }
1204
1205 writew(vptr->rd_filled & 0xfffc, &regs->RBRDU);
1206 vptr->rd_filled = unusable;
1207}
1208
1209static int velocity_rx_refill(struct velocity_info *vptr)
1210{
1211 int dirty = vptr->rd_dirty, done = 0, ret = 0;
1212
1213 do {
1214 struct rx_desc *rd = vptr->rd_ring + dirty;
1215
1216 /* Fine for an all zero Rx desc at init time as well */
4a51c0d0 1217 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1218 break;
1219
1220 if (!vptr->rd_info[dirty].skb) {
1221 ret = velocity_alloc_rx_buf(vptr, dirty);
1222 if (ret < 0)
1223 break;
1224 }
1225 done++;
6aa20a22 1226 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1da177e4
LT		 1227 } while (dirty != vptr->rd_curr);
1228
1229 if (done) {
1230 vptr->rd_dirty = dirty;
1231 vptr->rd_filled += done;
1232 velocity_give_many_rx_descs(vptr);
1233 }
1234
1235 return ret;
1236}
1237
1238/**
1239 * velocity_init_rd_ring - set up receive ring
1240 * @vptr: velocity to configure
1241 *
1242 * Allocate and set up the receive buffers for each ring slot and
1243 * assign them to the network adapter.
1244 */
1245
1246static int velocity_init_rd_ring(struct velocity_info *vptr)
1247{
ae94607d 1248 int ret;
48f6b053
SH		 1249 int mtu = vptr->dev->mtu;
1250
1251 vptr->rx_buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
1da177e4 1252
ae94607d
MK		 1253 vptr->rd_info = kcalloc(vptr->options.numrx,
1254 sizeof(struct velocity_rd_info), GFP_KERNEL);
1255 if (!vptr->rd_info)
1256 return -ENOMEM;
1da177e4
LT		 1257
1258 vptr->rd_filled = vptr->rd_dirty = vptr->rd_curr = 0;
1259
1260 ret = velocity_rx_refill(vptr);
1261 if (ret < 0) {
1262 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1263 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1264 velocity_free_rd_ring(vptr);
1265 }
ae94607d 1266
1da177e4
LT		 1267 return ret;
1268}
1269
1270/**
1271 * velocity_free_rd_ring - free receive ring
1272 * @vptr: velocity to clean up
1273 *
1274 * Free the receive buffers for each ring slot and any
1275 * attached socket buffers that need to go away.
1276 */
1277
1278static void velocity_free_rd_ring(struct velocity_info *vptr)
1279{
1280 int i;
1281
1282 if (vptr->rd_info == NULL)
1283 return;
1284
1285 for (i = 0; i < vptr->options.numrx; i++) {
1286 struct velocity_rd_info *rd_info = &(vptr->rd_info[i]);
b3c3e7d7
FR		 1287 struct rx_desc *rd = vptr->rd_ring + i;
1288
1289 memset(rd, 0, sizeof(*rd));
1da177e4
LT		 1290
1291 if (!rd_info->skb)
1292 continue;
1293 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
1294 PCI_DMA_FROMDEVICE);
1295 rd_info->skb_dma = (dma_addr_t) NULL;
1296
1297 dev_kfree_skb(rd_info->skb);
1298 rd_info->skb = NULL;
1299 }
1300
1301 kfree(vptr->rd_info);
1302 vptr->rd_info = NULL;
1303}
1304
1305/**
1306 * velocity_init_td_ring - set up transmit ring
1307 * @vptr: velocity
1308 *
1309 * Set up the transmit ring and chain the ring pointers together.
1310 * Returns zero on success or a negative posix errno code for
1311 * failure.
1312 */
6aa20a22 1313
1da177e4
LT		 1314static int velocity_init_td_ring(struct velocity_info *vptr)
1315{
1316 int i, j;
1317 dma_addr_t curr;
1318 struct tx_desc *td;
1319 struct velocity_td_info *td_info;
1da177e4
LT		 1320
1321 /* Init the TD ring entries */
1322 for (j = 0; j < vptr->num_txq; j++) {
1323 curr = vptr->td_pool_dma[j];
1324
ae94607d
MK		 1325 vptr->td_infos[j] = kcalloc(vptr->options.numtx,
1326 sizeof(struct velocity_td_info),
1327 GFP_KERNEL);
1328 if (!vptr->td_infos[j]) {
1da177e4
LT		 1329 while(--j >= 0)
1330 kfree(vptr->td_infos[j]);
1331 return -ENOMEM;
1332 }
1da177e4
LT		 1333
1334 for (i = 0; i < vptr->options.numtx; i++, curr += sizeof(struct tx_desc)) {
1335 td = &(vptr->td_rings[j][i]);
1336 td_info = &(vptr->td_infos[j][i]);
1337 td_info->buf = vptr->tx_bufs +
1338 (j * vptr->options.numtx + i) * PKT_BUF_SZ;
1339 td_info->buf_dma = vptr->tx_bufs_dma +
1340 (j * vptr->options.numtx + i) * PKT_BUF_SZ;
1341 }
1342 vptr->td_tail[j] = vptr->td_curr[j] = vptr->td_used[j] = 0;
1343 }
1344 return 0;
1345}
1346
1347/*
1348 * FIXME: could we merge this with velocity_free_tx_buf ?
1349 */
1350
1351static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1352 int q, int n)
1353{
1354 struct velocity_td_info * td_info = &(vptr->td_infos[q][n]);
1355 int i;
6aa20a22 1356
1da177e4
LT		 1357 if (td_info == NULL)
1358 return;
6aa20a22 1359
1da177e4
LT		 1360 if (td_info->skb) {
1361 for (i = 0; i < td_info->nskb_dma; i++)
1362 {
1363 if (td_info->skb_dma[i]) {
6aa20a22 1364 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1da177e4
LT		 1365 td_info->skb->len, PCI_DMA_TODEVICE);
1366 td_info->skb_dma[i] = (dma_addr_t) NULL;
1367 }
1368 }
1369 dev_kfree_skb(td_info->skb);
1370 td_info->skb = NULL;
1371 }
1372}
1373
1374/**
1375 * velocity_free_td_ring - free td ring
1376 * @vptr: velocity
1377 *
1378 * Free up the transmit ring for this particular velocity adapter.
1379 * We free the ring contents but not the ring itself.
1380 */
6aa20a22 1381
1da177e4
LT		 1382static void velocity_free_td_ring(struct velocity_info *vptr)
1383{
1384 int i, j;
1385
1386 for (j = 0; j < vptr->num_txq; j++) {
1387 if (vptr->td_infos[j] == NULL)
1388 continue;
1389 for (i = 0; i < vptr->options.numtx; i++) {
1390 velocity_free_td_ring_entry(vptr, j, i);
1391
1392 }
b4558ea9
JJ		 1393 kfree(vptr->td_infos[j]);
1394 vptr->td_infos[j] = NULL;
1da177e4
LT		 1395 }
1396}
1397
1398/**
1399 * velocity_rx_srv - service RX interrupt
1400 * @vptr: velocity
1401 * @status: adapter status (unused)
1402 *
1403 * Walk the receive ring of the velocity adapter and remove
1404 * any received packets from the receive queue. Hand the ring
1405 * slots back to the adapter for reuse.
1406 */
6aa20a22 1407
1da177e4
LT		 1408static int velocity_rx_srv(struct velocity_info *vptr, int status)
1409{
1410 struct net_device_stats *stats = &vptr->stats;
1411 int rd_curr = vptr->rd_curr;
1412 int works = 0;
1413
1414 do {
1415 struct rx_desc *rd = vptr->rd_ring + rd_curr;
1416
1417 if (!vptr->rd_info[rd_curr].skb)
1418 break;
1419
4a51c0d0 1420 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1421 break;
1422
1423 rmb();
1424
1425 /*
1426 * Don't drop CE or RL error frame although RXOK is off
1427 */
4a51c0d0 1428 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
1da177e4
LT		 1429 if (velocity_receive_frame(vptr, rd_curr) < 0)
1430 stats->rx_dropped++;
1431 } else {
1432 if (rd->rdesc0.RSR & RSR_CRC)
1433 stats->rx_crc_errors++;
1434 if (rd->rdesc0.RSR & RSR_FAE)
1435 stats->rx_frame_errors++;
1436
1437 stats->rx_dropped++;
1438 }
1439
4a51c0d0 1440 rd->size |= RX_INTEN;
1da177e4
LT		 1441
1442 vptr->dev->last_rx = jiffies;
1443
1444 rd_curr++;
1445 if (rd_curr >= vptr->options.numrx)
1446 rd_curr = 0;
1447 } while (++works <= 15);
1448
1449 vptr->rd_curr = rd_curr;
1450
1451 if (works > 0 && velocity_rx_refill(vptr) < 0) {
1452 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1453 "%s: rx buf allocation failure\n", vptr->dev->name);
1454 }
1455
1456 VAR_USED(stats);
1457 return works;
1458}
1459
1460/**
1461 * velocity_rx_csum - checksum process
1462 * @rd: receive packet descriptor
1463 * @skb: network layer packet buffer
1464 *
1465 * Process the status bits for the received packet and determine
1466 * if the checksum was computed and verified by the hardware
1467 */
6aa20a22 1468
1da177e4
LT		 1469static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1470{
1471 skb->ip_summed = CHECKSUM_NONE;
1472
1473 if (rd->rdesc1.CSM & CSM_IPKT) {
1474 if (rd->rdesc1.CSM & CSM_IPOK) {
6aa20a22 1475 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1da177e4
LT		 1476 (rd->rdesc1.CSM & CSM_UDPKT)) {
1477 if (!(rd->rdesc1.CSM & CSM_TUPOK)) {
1478 return;
1479 }
1480 }
1481 skb->ip_summed = CHECKSUM_UNNECESSARY;
1482 }
1483 }
1484}
1485
1486/**
1487 * velocity_rx_copy - in place Rx copy for small packets
1488 * @rx_skb: network layer packet buffer candidate
1489 * @pkt_size: received data size
1490 * @rd: receive packet descriptor
1491 * @dev: network device
1492 *
1493 * Replace the current skb that is scheduled for Rx processing by a
1494 * shorter, immediatly allocated skb, if the received packet is small
1495 * enough. This function returns a negative value if the received
1496 * packet is too big or if memory is exhausted.
1497 */
c73d2589
SH		 1498static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1499 struct velocity_info *vptr)
1da177e4
LT		 1500{
1501 int ret = -1;
1da177e4
LT		 1502 if (pkt_size < rx_copybreak) {
1503 struct sk_buff *new_skb;
1504
c73d2589 1505 new_skb = netdev_alloc_skb(vptr->dev, pkt_size + 2);
1da177e4 1506 if (new_skb) {
1da177e4 1507 new_skb->ip_summed = rx_skb[0]->ip_summed;
c73d2589
SH		 1508 skb_reserve(new_skb, 2);
1509 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
1da177e4
LT		 1510 *rx_skb = new_skb;
1511 ret = 0;
1512 }
6aa20a22 1513
1da177e4
LT		 1514 }
1515 return ret;
1516}
1517
1518/**
1519 * velocity_iph_realign - IP header alignment
1520 * @vptr: velocity we are handling
1521 * @skb: network layer packet buffer
1522 * @pkt_size: received data size
1523 *
1524 * Align IP header on a 2 bytes boundary. This behavior can be
1525 * configured by the user.
1526 */
1527static inline void velocity_iph_realign(struct velocity_info *vptr,
1528 struct sk_buff *skb, int pkt_size)
1529{
1da177e4 1530 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
c03571a3 1531 memmove(skb->data + 2, skb->data, pkt_size);
1da177e4
LT		 1532 skb_reserve(skb, 2);
1533 }
1534}
1535
1536/**
1537 * velocity_receive_frame - received packet processor
1538 * @vptr: velocity we are handling
1539 * @idx: ring index
6aa20a22 1540 *
1da177e4
LT		 1541 * A packet has arrived. We process the packet and if appropriate
1542 * pass the frame up the network stack
1543 */
6aa20a22 1544
1da177e4
LT		 1545static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1546{
1547 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
1548 struct net_device_stats *stats = &vptr->stats;
1549 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
1550 struct rx_desc *rd = &(vptr->rd_ring[idx]);
4a51c0d0 1551 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
1da177e4
LT		 1552 struct sk_buff *skb;
1553
1554 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
1555 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
1556 stats->rx_length_errors++;
1557 return -EINVAL;
1558 }
1559
1560 if (rd->rdesc0.RSR & RSR_MAR)
1561 vptr->stats.multicast++;
1562
1563 skb = rd_info->skb;
1da177e4
LT		 1564
1565 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
1566 vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
1567
1568 /*
1569 * Drop frame not meeting IEEE 802.3
1570 */
6aa20a22 1571
1da177e4
LT		 1572 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
1573 if (rd->rdesc0.RSR & RSR_RL) {
1574 stats->rx_length_errors++;
1575 return -EINVAL;
1576 }
1577 }
1578
1579 pci_action = pci_dma_sync_single_for_device;
1580
1581 velocity_rx_csum(rd, skb);
1582
1583 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
1584 velocity_iph_realign(vptr, skb, pkt_len);
1585 pci_action = pci_unmap_single;
1586 rd_info->skb = NULL;
1587 }
1588
1589 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
1590 PCI_DMA_FROMDEVICE);
1591
1592 skb_put(skb, pkt_len - 4);
4c13eb66 1593 skb->protocol = eth_type_trans(skb, vptr->dev);
1da177e4 1594
d4f73c8e
FR		 1595 if (vptr->vlgrp && (rd->rdesc0.RSR & RSR_DETAG)) {
1596 vlan_hwaccel_rx(skb, vptr->vlgrp,
1597 swab16(le16_to_cpu(rd->rdesc1.PQTAG)));
1598 } else
1599 netif_rx(skb);
1600
1da177e4 1601 stats->rx_bytes += pkt_len;
1da177e4
LT		 1602
1603 return 0;
1604}
1605
1606/**
1607 * velocity_alloc_rx_buf - allocate aligned receive buffer
1608 * @vptr: velocity
1609 * @idx: ring index
1610 *
1611 * Allocate a new full sized buffer for the reception of a frame and
1612 * map it into PCI space for the hardware to use. The hardware
1613 * requires *64* byte alignment of the buffer which makes life
1614 * less fun than would be ideal.
1615 */
6aa20a22 1616
1da177e4
LT		 1617static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1618{
1619 struct rx_desc *rd = &(vptr->rd_ring[idx]);
1620 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
1621
c73d2589 1622 rd_info->skb = netdev_alloc_skb(vptr->dev, vptr->rx_buf_sz + 64);
1da177e4
LT		 1623 if (rd_info->skb == NULL)
1624 return -ENOMEM;
1625
1626 /*
1627 * Do the gymnastics to get the buffer head for data at
1628 * 64byte alignment.
1629 */
689be439 1630 skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63);
689be439 1631 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data, vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
6aa20a22 1632
1da177e4
LT		 1633 /*
1634 * Fill in the descriptor to match
6aa20a22
JG		 1635 */
1636
1da177e4 1637 *((u32 *) & (rd->rdesc0)) = 0;
4a51c0d0 1638 rd->size = cpu_to_le16(vptr->rx_buf_sz) | RX_INTEN;
1da177e4
LT		 1639 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1640 rd->pa_high = 0;
1641 return 0;
1642}
1643
1644/**
1645 * tx_srv - transmit interrupt service
1646 * @vptr; Velocity
1647 * @status:
1648 *
1649 * Scan the queues looking for transmitted packets that
1650 * we can complete and clean up. Update any statistics as
3a4fa0a2 1651 * necessary/
1da177e4 1652 */
6aa20a22 1653
1da177e4
LT		 1654static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1655{
1656 struct tx_desc *td;
1657 int qnum;
1658 int full = 0;
1659 int idx;
1660 int works = 0;
1661 struct velocity_td_info *tdinfo;
1662 struct net_device_stats *stats = &vptr->stats;
1663
1664 for (qnum = 0; qnum < vptr->num_txq; qnum++) {
6aa20a22 1665 for (idx = vptr->td_tail[qnum]; vptr->td_used[qnum] > 0;
1da177e4
LT		 1666 idx = (idx + 1) % vptr->options.numtx) {
1667
1668 /*
1669 * Get Tx Descriptor
1670 */
1671 td = &(vptr->td_rings[qnum][idx]);
1672 tdinfo = &(vptr->td_infos[qnum][idx]);
1673
4a51c0d0 1674 if (td->tdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1675 break;
1676
1677 if ((works++ > 15))
1678 break;
1679
1680 if (td->tdesc0.TSR & TSR0_TERR) {
1681 stats->tx_errors++;
1682 stats->tx_dropped++;
1683 if (td->tdesc0.TSR & TSR0_CDH)
1684 stats->tx_heartbeat_errors++;
1685 if (td->tdesc0.TSR & TSR0_CRS)
1686 stats->tx_carrier_errors++;
1687 if (td->tdesc0.TSR & TSR0_ABT)
1688 stats->tx_aborted_errors++;
1689 if (td->tdesc0.TSR & TSR0_OWC)
1690 stats->tx_window_errors++;
1691 } else {
1692 stats->tx_packets++;
1693 stats->tx_bytes += tdinfo->skb->len;
1694 }
1695 velocity_free_tx_buf(vptr, tdinfo);
1696 vptr->td_used[qnum]--;
1697 }
1698 vptr->td_tail[qnum] = idx;
1699
1700 if (AVAIL_TD(vptr, qnum) < 1) {
1701 full = 1;
1702 }
1703 }
1704 /*
1705 * Look to see if we should kick the transmit network
1706 * layer for more work.
1707 */
1708 if (netif_queue_stopped(vptr->dev) && (full == 0)
1709 && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1710 netif_wake_queue(vptr->dev);
1711 }
1712 return works;
1713}
1714
1715/**
1716 * velocity_print_link_status - link status reporting
1717 * @vptr: velocity to report on
1718 *
1719 * Turn the link status of the velocity card into a kernel log
1720 * description of the new link state, detailing speed and duplex
1721 * status
1722 */
1723
1724static void velocity_print_link_status(struct velocity_info *vptr)
1725{
1726
1727 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1728 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1729 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
b4fea61a 1730 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
1da177e4
LT		 1731
1732 if (vptr->mii_status & VELOCITY_SPEED_1000)
1733 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1734 else if (vptr->mii_status & VELOCITY_SPEED_100)
1735 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1736 else
1737 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1738
1739 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1740 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1741 else
1742 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1743 } else {
1744 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1745 switch (vptr->options.spd_dpx) {
1746 case SPD_DPX_100_HALF:
1747 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1748 break;
1749 case SPD_DPX_100_FULL:
1750 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1751 break;
1752 case SPD_DPX_10_HALF:
1753 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1754 break;
1755 case SPD_DPX_10_FULL:
1756 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1757 break;
1758 default:
1759 break;
1760 }
1761 }
1762}
1763
1764/**
1765 * velocity_error - handle error from controller
1766 * @vptr: velocity
1767 * @status: card status
1768 *
1769 * Process an error report from the hardware and attempt to recover
6aa20a22 1770 * the card itself. At the moment we cannot recover from some
1da177e4
LT		 1771 * theoretically impossible errors but this could be fixed using
1772 * the pci_device_failed logic to bounce the hardware
1773 *
1774 */
6aa20a22 1775
1da177e4
LT		 1776static void velocity_error(struct velocity_info *vptr, int status)
1777{
1778
1779 if (status & ISR_TXSTLI) {
1780 struct mac_regs __iomem * regs = vptr->mac_regs;
1781
0e6ff158 1782 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1da177e4
LT		 1783 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1784 writew(TRDCSR_RUN, &regs->TDCSRClr);
1785 netif_stop_queue(vptr->dev);
6aa20a22 1786
1da177e4
LT		 1787 /* FIXME: port over the pci_device_failed code and use it
1788 here */
1789 }
1790
1791 if (status & ISR_SRCI) {
1792 struct mac_regs __iomem * regs = vptr->mac_regs;
1793 int linked;
1794
1795 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1796 vptr->mii_status = check_connection_type(regs);
1797
1798 /*
6aa20a22 1799 * If it is a 3119, disable frame bursting in
1da177e4
LT		 1800 * halfduplex mode and enable it in fullduplex
1801 * mode
1802 */
1803 if (vptr->rev_id < REV_ID_VT3216_A0) {
1804 if (vptr->mii_status | VELOCITY_DUPLEX_FULL)
1805 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1806 else
1807 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1808 }
1809 /*
1810 * Only enable CD heart beat counter in 10HD mode
1811 */
1812 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) {
1813 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1814 } else {
1815 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1816 }
1817 }
1818 /*
1819 * Get link status from PHYSR0
1820 */
1821 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1822
1823 if (linked) {
1824 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
8a22dddb 1825 netif_carrier_on(vptr->dev);
1da177e4
LT		 1826 } else {
1827 vptr->mii_status |= VELOCITY_LINK_FAIL;
8a22dddb 1828 netif_carrier_off(vptr->dev);
1da177e4
LT		 1829 }
1830
1831 velocity_print_link_status(vptr);
1832 enable_flow_control_ability(vptr);
1833
1834 /*
6aa20a22 1835 * Re-enable auto-polling because SRCI will disable
1da177e4
LT		 1836 * auto-polling
1837 */
6aa20a22 1838
1da177e4
LT		 1839 enable_mii_autopoll(regs);
1840
1841 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1842 netif_stop_queue(vptr->dev);
1843 else
1844 netif_wake_queue(vptr->dev);
1845
1846 };
1847 if (status & ISR_MIBFI)
1848 velocity_update_hw_mibs(vptr);
1849 if (status & ISR_LSTEI)
1850 mac_rx_queue_wake(vptr->mac_regs);
1851}
1852
1853/**
1854 * velocity_free_tx_buf - free transmit buffer
1855 * @vptr: velocity
1856 * @tdinfo: buffer
1857 *
1858 * Release an transmit buffer. If the buffer was preallocated then
1859 * recycle it, if not then unmap the buffer.
1860 */
6aa20a22 1861
1da177e4
LT		 1862static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo)
1863{
1864 struct sk_buff *skb = tdinfo->skb;
1865 int i;
1866
1867 /*
1868 * Don't unmap the pre-allocated tx_bufs
1869 */
1870 if (tdinfo->skb_dma && (tdinfo->skb_dma[0] != tdinfo->buf_dma)) {
1871
1872 for (i = 0; i < tdinfo->nskb_dma; i++) {
1873#ifdef VELOCITY_ZERO_COPY_SUPPORT
4a51c0d0 1874 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], le16_to_cpu(td->tdesc1.len), PCI_DMA_TODEVICE);
1da177e4
LT		 1875#else
1876 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], skb->len, PCI_DMA_TODEVICE);
1877#endif
1878 tdinfo->skb_dma[i] = 0;
1879 }
1880 }
1881 dev_kfree_skb_irq(skb);
1882 tdinfo->skb = NULL;
1883}
1884
1885/**
1886 * velocity_open - interface activation callback
1887 * @dev: network layer device to open
1888 *
1889 * Called when the network layer brings the interface up. Returns
1890 * a negative posix error code on failure, or zero on success.
1891 *
1892 * All the ring allocation and set up is done on open for this
1893 * adapter to minimise memory usage when inactive
1894 */
6aa20a22 1895
1da177e4
LT		 1896static int velocity_open(struct net_device *dev)
1897{
8ab6f3f7 1898 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1899 int ret;
1900
1da177e4
LT		 1901 ret = velocity_init_rings(vptr);
1902 if (ret < 0)
1903 goto out;
1904
1905 ret = velocity_init_rd_ring(vptr);
1906 if (ret < 0)
1907 goto err_free_desc_rings;
1908
1909 ret = velocity_init_td_ring(vptr);
1910 if (ret < 0)
1911 goto err_free_rd_ring;
6aa20a22
JG		 1912
1913 /* Ensure chip is running */
1da177e4 1914 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 1915
1da177e4
LT		 1916 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1917
1fb9df5d 1918 ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED,
1da177e4
LT		 1919 dev->name, dev);
1920 if (ret < 0) {
1921 /* Power down the chip */
1922 pci_set_power_state(vptr->pdev, PCI_D3hot);
1923 goto err_free_td_ring;
1924 }
1925
1926 mac_enable_int(vptr->mac_regs);
1927 netif_start_queue(dev);
1928 vptr->flags |= VELOCITY_FLAGS_OPENED;
1929out:
1930 return ret;
1931
1932err_free_td_ring:
1933 velocity_free_td_ring(vptr);
1934err_free_rd_ring:
1935 velocity_free_rd_ring(vptr);
1936err_free_desc_rings:
1937 velocity_free_rings(vptr);
1938 goto out;
1939}
1940
6aa20a22 1941/**
1da177e4
LT		 1942 * velocity_change_mtu - MTU change callback
1943 * @dev: network device
1944 * @new_mtu: desired MTU
1945 *
1946 * Handle requests from the networking layer for MTU change on
1947 * this interface. It gets called on a change by the network layer.
1948 * Return zero for success or negative posix error code.
1949 */
6aa20a22 1950
1da177e4
LT		 1951static int velocity_change_mtu(struct net_device *dev, int new_mtu)
1952{
8ab6f3f7 1953 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1954 unsigned long flags;
1955 int oldmtu = dev->mtu;
1956 int ret = 0;
1957
1958 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
6aa20a22 1959 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
1da177e4
LT		 1960 vptr->dev->name);
1961 return -EINVAL;
1962 }
1963
bd7b3f34
SH		 1964 if (!netif_running(dev)) {
1965 dev->mtu = new_mtu;
1966 return 0;
1967 }
1968
1da177e4
LT		 1969 if (new_mtu != oldmtu) {
1970 spin_lock_irqsave(&vptr->lock, flags);
1971
1972 netif_stop_queue(dev);
1973 velocity_shutdown(vptr);
1974
1975 velocity_free_td_ring(vptr);
1976 velocity_free_rd_ring(vptr);
1977
1978 dev->mtu = new_mtu;
1da177e4
LT		 1979
1980 ret = velocity_init_rd_ring(vptr);
1981 if (ret < 0)
1982 goto out_unlock;
1983
1984 ret = velocity_init_td_ring(vptr);
1985 if (ret < 0)
1986 goto out_unlock;
1987
1988 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1989
1990 mac_enable_int(vptr->mac_regs);
1991 netif_start_queue(dev);
1992out_unlock:
1993 spin_unlock_irqrestore(&vptr->lock, flags);
1994 }
1995
1996 return ret;
1997}
1998
1999/**
2000 * velocity_shutdown - shut down the chip
2001 * @vptr: velocity to deactivate
2002 *
2003 * Shuts down the internal operations of the velocity and
2004 * disables interrupts, autopolling, transmit and receive
2005 */
6aa20a22 2006
1da177e4
LT		 2007static void velocity_shutdown(struct velocity_info *vptr)
2008{
2009 struct mac_regs __iomem * regs = vptr->mac_regs;
2010 mac_disable_int(regs);
2011 writel(CR0_STOP, &regs->CR0Set);
2012 writew(0xFFFF, &regs->TDCSRClr);
2013 writeb(0xFF, &regs->RDCSRClr);
2014 safe_disable_mii_autopoll(regs);
2015 mac_clear_isr(regs);
2016}
2017
2018/**
2019 * velocity_close - close adapter callback
2020 * @dev: network device
2021 *
2022 * Callback from the network layer when the velocity is being
2023 * deactivated by the network layer
2024 */
2025
2026static int velocity_close(struct net_device *dev)
2027{
8ab6f3f7 2028 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2029
2030 netif_stop_queue(dev);
2031 velocity_shutdown(vptr);
2032
2033 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2034 velocity_get_ip(vptr);
2035 if (dev->irq != 0)
2036 free_irq(dev->irq, dev);
6aa20a22 2037
1da177e4
LT		 2038 /* Power down the chip */
2039 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22 2040
1da177e4
LT		 2041 /* Free the resources */
2042 velocity_free_td_ring(vptr);
2043 velocity_free_rd_ring(vptr);
2044 velocity_free_rings(vptr);
2045
2046 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2047 return 0;
2048}
2049
2050/**
2051 * velocity_xmit - transmit packet callback
2052 * @skb: buffer to transmit
2053 * @dev: network device
2054 *
2055 * Called by the networ layer to request a packet is queued to
2056 * the velocity. Returns zero on success.
2057 */
6aa20a22 2058
1da177e4
LT		 2059static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
2060{
8ab6f3f7 2061 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2062 int qnum = 0;
2063 struct tx_desc *td_ptr;
2064 struct velocity_td_info *tdinfo;
2065 unsigned long flags;
2066 int index;
1da177e4 2067 int pktlen = skb->len;
4a51c0d0 2068 __le16 len = cpu_to_le16(pktlen);
1da177e4 2069
364c6bad
HX		 2070#ifdef VELOCITY_ZERO_COPY_SUPPORT
2071 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
2072 kfree_skb(skb);
2073 return 0;
2074 }
2075#endif
2076
1da177e4
LT		 2077 spin_lock_irqsave(&vptr->lock, flags);
2078
2079 index = vptr->td_curr[qnum];
2080 td_ptr = &(vptr->td_rings[qnum][index]);
2081 tdinfo = &(vptr->td_infos[qnum][index]);
2082
1da177e4 2083 td_ptr->tdesc1.TCR = TCR0_TIC;
4a51c0d0 2084 td_ptr->td_buf[0].size &= ~TD_QUEUE;
1da177e4
LT		 2085
2086 /*
6aa20a22 2087 * Pad short frames.
1da177e4
LT		 2088 */
2089 if (pktlen < ETH_ZLEN) {
2090 /* Cannot occur until ZC support */
1da177e4 2091 pktlen = ETH_ZLEN;
4a51c0d0 2092 len = cpu_to_le16(ETH_ZLEN);
d626f62b 2093 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4
LT		 2094 memset(tdinfo->buf + skb->len, 0, ETH_ZLEN - skb->len);
2095 tdinfo->skb = skb;
2096 tdinfo->skb_dma[0] = tdinfo->buf_dma;
4a51c0d0 2097 td_ptr->tdesc0.len = len;
1da177e4
LT		 2098 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2099 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2100 td_ptr->td_buf[0].size = len; /* queue is 0 anyway */
1da177e4 2101 tdinfo->nskb_dma = 1;
1da177e4
LT		 2102 } else
2103#ifdef VELOCITY_ZERO_COPY_SUPPORT
2104 if (skb_shinfo(skb)->nr_frags > 0) {
2105 int nfrags = skb_shinfo(skb)->nr_frags;
2106 tdinfo->skb = skb;
2107 if (nfrags > 6) {
d626f62b 2108 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4 2109 tdinfo->skb_dma[0] = tdinfo->buf_dma;
4a51c0d0 2110 td_ptr->tdesc0.len = len;
1da177e4
LT		 2111 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2112 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2113 td_ptr->td_buf[0].size = len; /* queue is 0 anyway */
1da177e4 2114 tdinfo->nskb_dma = 1;
1da177e4
LT		 2115 } else {
2116 int i = 0;
2117 tdinfo->nskb_dma = 0;
4a51c0d0
AV		 2118 tdinfo->skb_dma[i] = pci_map_single(vptr->pdev, skb->data,
2119 skb_headlen(skb), PCI_DMA_TODEVICE);
1da177e4 2120
4a51c0d0 2121 td_ptr->tdesc0.len = len;
1da177e4
LT		 2122
2123 /* FIXME: support 48bit DMA later */
2124 td_ptr->td_buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma);
2125 td_ptr->td_buf[i].pa_high = 0;
4a51c0d0 2126 td_ptr->td_buf[i].size = cpu_to_le16(skb_headlen(skb));
1da177e4
LT		 2127
2128 for (i = 0; i < nfrags; i++) {
2129 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
4a51c0d0 2130 void *addr = (void *)page_address(frag->page) + frag->page_offset;
1da177e4
LT		 2131
2132 tdinfo->skb_dma[i + 1] = pci_map_single(vptr->pdev, addr, frag->size, PCI_DMA_TODEVICE);
2133
2134 td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
2135 td_ptr->td_buf[i + 1].pa_high = 0;
4a51c0d0 2136 td_ptr->td_buf[i + 1].size = cpu_to_le16(frag->size);
1da177e4
LT		 2137 }
2138 tdinfo->nskb_dma = i - 1;
1da177e4
LT		 2139 }
2140
2141 } else
2142#endif
2143 {
2144 /*
2145 * Map the linear network buffer into PCI space and
2146 * add it to the transmit ring.
2147 */
2148 tdinfo->skb = skb;
2149 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
4a51c0d0 2150 td_ptr->tdesc0.len = len;
1da177e4
LT		 2151 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2152 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2153 td_ptr->td_buf[0].size = len;
1da177e4 2154 tdinfo->nskb_dma = 1;
1da177e4 2155 }
4a51c0d0 2156 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
1da177e4 2157
501e4d24 2158 if (vptr->vlgrp && vlan_tx_tag_present(skb)) {
4a51c0d0 2159 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1da177e4
LT		 2160 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2161 }
2162
2163 /*
2164 * Handle hardware checksum
2165 */
2166 if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM)
84fa7933 2167 && (skb->ip_summed == CHECKSUM_PARTIAL)) {
eddc9ec5 2168 const struct iphdr *ip = ip_hdr(skb);
1da177e4
LT		 2169 if (ip->protocol == IPPROTO_TCP)
2170 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2171 else if (ip->protocol == IPPROTO_UDP)
2172 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2173 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2174 }
2175 {
2176
2177 int prev = index - 1;
2178
2179 if (prev < 0)
2180 prev = vptr->options.numtx - 1;
4a51c0d0 2181 td_ptr->tdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 2182 vptr->td_used[qnum]++;
2183 vptr->td_curr[qnum] = (index + 1) % vptr->options.numtx;
2184
2185 if (AVAIL_TD(vptr, qnum) < 1)
2186 netif_stop_queue(dev);
2187
2188 td_ptr = &(vptr->td_rings[qnum][prev]);
4a51c0d0 2189 td_ptr->td_buf[0].size |= TD_QUEUE;
1da177e4
LT		 2190 mac_tx_queue_wake(vptr->mac_regs, qnum);
2191 }
2192 dev->trans_start = jiffies;
2193 spin_unlock_irqrestore(&vptr->lock, flags);
2194 return 0;
2195}
2196
2197/**
2198 * velocity_intr - interrupt callback
2199 * @irq: interrupt number
2200 * @dev_instance: interrupting device
1da177e4
LT		 2201 *
2202 * Called whenever an interrupt is generated by the velocity
2203 * adapter IRQ line. We may not be the source of the interrupt
2204 * and need to identify initially if we are, and if not exit as
2205 * efficiently as possible.
2206 */
6aa20a22 2207
7d12e780 2208static int velocity_intr(int irq, void *dev_instance)
1da177e4
LT		 2209{
2210 struct net_device *dev = dev_instance;
8ab6f3f7 2211 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2212 u32 isr_status;
2213 int max_count = 0;
2214
2215
2216 spin_lock(&vptr->lock);
2217 isr_status = mac_read_isr(vptr->mac_regs);
2218
2219 /* Not us ? */
2220 if (isr_status == 0) {
2221 spin_unlock(&vptr->lock);
2222 return IRQ_NONE;
2223 }
2224
2225 mac_disable_int(vptr->mac_regs);
2226
2227 /*
2228 * Keep processing the ISR until we have completed
2229 * processing and the isr_status becomes zero
2230 */
6aa20a22 2231
1da177e4
LT		 2232 while (isr_status != 0) {
2233 mac_write_isr(vptr->mac_regs, isr_status);
2234 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2235 velocity_error(vptr, isr_status);
2236 if (isr_status & (ISR_PRXI | ISR_PPRXI))
2237 max_count += velocity_rx_srv(vptr, isr_status);
2238 if (isr_status & (ISR_PTXI | ISR_PPTXI))
2239 max_count += velocity_tx_srv(vptr, isr_status);
2240 isr_status = mac_read_isr(vptr->mac_regs);
2241 if (max_count > vptr->options.int_works)
2242 {
6aa20a22 2243 printk(KERN_WARNING "%s: excessive work at interrupt.\n",
1da177e4
LT		 2244 dev->name);
2245 max_count = 0;
2246 }
2247 }
2248 spin_unlock(&vptr->lock);
2249 mac_enable_int(vptr->mac_regs);
2250 return IRQ_HANDLED;
2251
2252}
2253
2254
2255/**
2256 * velocity_set_multi - filter list change callback
2257 * @dev: network device
2258 *
2259 * Called by the network layer when the filter lists need to change
2260 * for a velocity adapter. Reload the CAMs with the new address
2261 * filter ruleset.
2262 */
6aa20a22 2263
1da177e4
LT		 2264static void velocity_set_multi(struct net_device *dev)
2265{
8ab6f3f7 2266 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2267 struct mac_regs __iomem * regs = vptr->mac_regs;
2268 u8 rx_mode;
2269 int i;
2270 struct dev_mc_list *mclist;
2271
2272 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1da177e4
LT		 2273 writel(0xffffffff, &regs->MARCAM[0]);
2274 writel(0xffffffff, &regs->MARCAM[4]);
2275 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
2276 } else if ((dev->mc_count > vptr->multicast_limit)
2277 || (dev->flags & IFF_ALLMULTI)) {
2278 writel(0xffffffff, &regs->MARCAM[0]);
2279 writel(0xffffffff, &regs->MARCAM[4]);
2280 rx_mode = (RCR_AM | RCR_AB);
2281 } else {
2282 int offset = MCAM_SIZE - vptr->multicast_limit;
01faccbf 2283 mac_get_cam_mask(regs, vptr->mCAMmask);
1da177e4
LT		 2284
2285 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
01faccbf 2286 mac_set_cam(regs, i + offset, mclist->dmi_addr);
1da177e4
LT		 2287 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
2288 }
2289
01faccbf 2290 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4
LT		 2291 rx_mode = (RCR_AM | RCR_AB);
2292 }
2293 if (dev->mtu > 1500)
2294 rx_mode |= RCR_AL;
2295
2296 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
2297
2298}
2299
2300/**
2301 * velocity_get_status - statistics callback
2302 * @dev: network device
2303 *
2304 * Callback from the network layer to allow driver statistics
2305 * to be resynchronized with hardware collected state. In the
2306 * case of the velocity we need to pull the MIB counters from
2307 * the hardware into the counters before letting the network
2308 * layer display them.
2309 */
6aa20a22 2310
1da177e4
LT		 2311static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2312{
8ab6f3f7 2313 struct velocity_info *vptr = netdev_priv(dev);
6aa20a22 2314
1da177e4
LT		 2315 /* If the hardware is down, don't touch MII */
2316 if(!netif_running(dev))
2317 return &vptr->stats;
2318
2319 spin_lock_irq(&vptr->lock);
2320 velocity_update_hw_mibs(vptr);
2321 spin_unlock_irq(&vptr->lock);
2322
2323 vptr->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2324 vptr->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2325 vptr->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2326
2327// unsigned long rx_dropped; /* no space in linux buffers */
2328 vptr->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2329 /* detailed rx_errors: */
2330// unsigned long rx_length_errors;
2331// unsigned long rx_over_errors; /* receiver ring buff overflow */
2332 vptr->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2333// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2334// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2335// unsigned long rx_missed_errors; /* receiver missed packet */
2336
2337 /* detailed tx_errors */
2338// unsigned long tx_fifo_errors;
2339
2340 return &vptr->stats;
2341}
2342
2343
2344/**
2345 * velocity_ioctl - ioctl entry point
2346 * @dev: network device
2347 * @rq: interface request ioctl
2348 * @cmd: command code
2349 *
2350 * Called when the user issues an ioctl request to the network
2351 * device in question. The velocity interface supports MII.
2352 */
6aa20a22 2353
1da177e4
LT		 2354static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2355{
8ab6f3f7 2356 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2357 int ret;
2358
2359 /* If we are asked for information and the device is power
2360 saving then we need to bring the device back up to talk to it */
6aa20a22 2361
1da177e4
LT		 2362 if (!netif_running(dev))
2363 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 2364
1da177e4
LT		 2365 switch (cmd) {
2366 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2367 case SIOCGMIIREG: /* Read MII PHY register. */
2368 case SIOCSMIIREG: /* Write to MII PHY register. */
2369 ret = velocity_mii_ioctl(dev, rq, cmd);
2370 break;
2371
2372 default:
2373 ret = -EOPNOTSUPP;
2374 }
2375 if (!netif_running(dev))
2376 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22
JG		 2377
2378
1da177e4
LT		 2379 return ret;
2380}
2381
2382/*
2383 * Definition for our device driver. The PCI layer interface
2384 * uses this to handle all our card discover and plugging
2385 */
6aa20a22 2386
1da177e4
LT		 2387static struct pci_driver velocity_driver = {
2388 .name = VELOCITY_NAME,
2389 .id_table = velocity_id_table,
2390 .probe = velocity_found1,
2391 .remove = __devexit_p(velocity_remove1),
2392#ifdef CONFIG_PM
2393 .suspend = velocity_suspend,
2394 .resume = velocity_resume,
2395#endif
2396};
2397
2398/**
2399 * velocity_init_module - load time function
2400 *
2401 * Called when the velocity module is loaded. The PCI driver
2402 * is registered with the PCI layer, and in turn will call
2403 * the probe functions for each velocity adapter installed
2404 * in the system.
2405 */
6aa20a22 2406
1da177e4
LT		 2407static int __init velocity_init_module(void)
2408{
2409 int ret;
2410
2411 velocity_register_notifier();
29917620 2412 ret = pci_register_driver(&velocity_driver);
1da177e4
LT		 2413 if (ret < 0)
2414 velocity_unregister_notifier();
2415 return ret;
2416}
2417
2418/**
2419 * velocity_cleanup - module unload
2420 *
2421 * When the velocity hardware is unloaded this function is called.
6aa20a22 2422 * It will clean up the notifiers and the unregister the PCI
1da177e4
LT		 2423 * driver interface for this hardware. This in turn cleans up
2424 * all discovered interfaces before returning from the function
2425 */
6aa20a22 2426
1da177e4
LT		 2427static void __exit velocity_cleanup_module(void)
2428{
2429 velocity_unregister_notifier();
2430 pci_unregister_driver(&velocity_driver);
2431}
2432
2433module_init(velocity_init_module);
2434module_exit(velocity_cleanup_module);
2435
2436
2437/*
2438 * MII access , media link mode setting functions
2439 */
6aa20a22
JG		 2440
2441
1da177e4
LT		 2442/**
2443 * mii_init - set up MII
2444 * @vptr: velocity adapter
2445 * @mii_status: links tatus
2446 *
2447 * Set up the PHY for the current link state.
2448 */
6aa20a22 2449
1da177e4
LT		 2450static void mii_init(struct velocity_info *vptr, u32 mii_status)
2451{
2452 u16 BMCR;
2453
2454 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
2455 case PHYID_CICADA_CS8201:
2456 /*
2457 * Reset to hardware default
2458 */
2459 MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2460 /*
2461 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2462 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2463 * legacy-forced issue.
2464 */
2465 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2466 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2467 else
2468 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2469 /*
2470 * Turn on Link/Activity LED enable bit for CIS8201
2471 */
2472 MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
2473 break;
2474 case PHYID_VT3216_32BIT:
2475 case PHYID_VT3216_64BIT:
2476 /*
2477 * Reset to hardware default
2478 */
2479 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2480 /*
2481 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2482 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2483 * legacy-forced issue
2484 */
2485 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2486 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2487 else
2488 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2489 break;
2490
2491 case PHYID_MARVELL_1000:
2492 case PHYID_MARVELL_1000S:
2493 /*
6aa20a22 2494 * Assert CRS on Transmit
1da177e4
LT		 2495 */
2496 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
2497 /*
6aa20a22 2498 * Reset to hardware default
1da177e4
LT		 2499 */
2500 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2501 break;
2502 default:
2503 ;
2504 }
2505 velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
2506 if (BMCR & BMCR_ISO) {
2507 BMCR &= ~BMCR_ISO;
2508 velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
2509 }
2510}
2511
2512/**
2513 * safe_disable_mii_autopoll - autopoll off
2514 * @regs: velocity registers
2515 *
2516 * Turn off the autopoll and wait for it to disable on the chip
2517 */
6aa20a22 2518
1da177e4
LT		 2519static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs)
2520{
2521 u16 ww;
2522
2523 /* turn off MAUTO */
2524 writeb(0, &regs->MIICR);
2525 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2526 udelay(1);
2527 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2528 break;
2529 }
2530}
2531
2532/**
2533 * enable_mii_autopoll - turn on autopolling
2534 * @regs: velocity registers
2535 *
2536 * Enable the MII link status autopoll feature on the Velocity
2537 * hardware. Wait for it to enable.
2538 */
2539
2540static void enable_mii_autopoll(struct mac_regs __iomem * regs)
2541{
2542 int ii;
2543
2544 writeb(0, &(regs->MIICR));
2545 writeb(MIIADR_SWMPL, &regs->MIIADR);
2546
2547 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2548 udelay(1);
2549 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2550 break;
2551 }
2552
2553 writeb(MIICR_MAUTO, &regs->MIICR);
2554
2555 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2556 udelay(1);
2557 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2558 break;
2559 }
2560
2561}
2562
2563/**
2564 * velocity_mii_read - read MII data
2565 * @regs: velocity registers
2566 * @index: MII register index
2567 * @data: buffer for received data
2568 *
2569 * Perform a single read of an MII 16bit register. Returns zero
2570 * on success or -ETIMEDOUT if the PHY did not respond.
2571 */
6aa20a22 2572
1da177e4
LT		 2573static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
2574{
2575 u16 ww;
2576
2577 /*
2578 * Disable MIICR_MAUTO, so that mii addr can be set normally
2579 */
2580 safe_disable_mii_autopoll(regs);
2581
2582 writeb(index, &regs->MIIADR);
2583
2584 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
2585
2586 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2587 if (!(readb(&regs->MIICR) & MIICR_RCMD))
2588 break;
2589 }
2590
2591 *data = readw(&regs->MIIDATA);
2592
2593 enable_mii_autopoll(regs);
2594 if (ww == W_MAX_TIMEOUT)
2595 return -ETIMEDOUT;
2596 return 0;
2597}
2598
2599/**
2600 * velocity_mii_write - write MII data
2601 * @regs: velocity registers
2602 * @index: MII register index
2603 * @data: 16bit data for the MII register
2604 *
2605 * Perform a single write to an MII 16bit register. Returns zero
2606 * on success or -ETIMEDOUT if the PHY did not respond.
2607 */
6aa20a22 2608
1da177e4
LT		 2609static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
2610{
2611 u16 ww;
2612
2613 /*
2614 * Disable MIICR_MAUTO, so that mii addr can be set normally
2615 */
2616 safe_disable_mii_autopoll(regs);
2617
2618 /* MII reg offset */
2619 writeb(mii_addr, &regs->MIIADR);
2620 /* set MII data */
2621 writew(data, &regs->MIIDATA);
2622
2623 /* turn on MIICR_WCMD */
2624 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
2625
2626 /* W_MAX_TIMEOUT is the timeout period */
2627 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2628 udelay(5);
2629 if (!(readb(&regs->MIICR) & MIICR_WCMD))
2630 break;
2631 }
2632 enable_mii_autopoll(regs);
2633
2634 if (ww == W_MAX_TIMEOUT)
2635 return -ETIMEDOUT;
2636 return 0;
2637}
2638
2639/**
2640 * velocity_get_opt_media_mode - get media selection
2641 * @vptr: velocity adapter
2642 *
2643 * Get the media mode stored in EEPROM or module options and load
2644 * mii_status accordingly. The requested link state information
2645 * is also returned.
2646 */
6aa20a22 2647
1da177e4
LT		 2648static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
2649{
2650 u32 status = 0;
2651
2652 switch (vptr->options.spd_dpx) {
2653 case SPD_DPX_AUTO:
2654 status = VELOCITY_AUTONEG_ENABLE;
2655 break;
2656 case SPD_DPX_100_FULL:
2657 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
2658 break;
2659 case SPD_DPX_10_FULL:
2660 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
2661 break;
2662 case SPD_DPX_100_HALF:
2663 status = VELOCITY_SPEED_100;
2664 break;
2665 case SPD_DPX_10_HALF:
2666 status = VELOCITY_SPEED_10;
2667 break;
2668 }
2669 vptr->mii_status = status;
2670 return status;
2671}
2672
2673/**
2674 * mii_set_auto_on - autonegotiate on
2675 * @vptr: velocity
2676 *
2677 * Enable autonegotation on this interface
2678 */
6aa20a22 2679
1da177e4
LT		 2680static void mii_set_auto_on(struct velocity_info *vptr)
2681{
2682 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
2683 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
2684 else
2685 MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2686}
2687
2688
2689/*
2690static void mii_set_auto_off(struct velocity_info * vptr)
2691{
2692 MII_REG_BITS_OFF(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2693}
2694*/
2695
2696/**
2697 * set_mii_flow_control - flow control setup
2698 * @vptr: velocity interface
2699 *
2700 * Set up the flow control on this interface according to
2701 * the supplied user/eeprom options.
2702 */
6aa20a22 2703
1da177e4
LT		 2704static void set_mii_flow_control(struct velocity_info *vptr)
2705{
2706 /*Enable or Disable PAUSE in ANAR */
2707 switch (vptr->options.flow_cntl) {
2708 case FLOW_CNTL_TX:
2709 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2710 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2711 break;
2712
2713 case FLOW_CNTL_RX:
2714 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2715 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2716 break;
2717
2718 case FLOW_CNTL_TX_RX:
2719 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2720 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2721 break;
2722
2723 case FLOW_CNTL_DISABLE:
2724 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2725 MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2726 break;
2727 default:
2728 break;
2729 }
2730}
2731
2732/**
2733 * velocity_set_media_mode - set media mode
2734 * @mii_status: old MII link state
2735 *
2736 * Check the media link state and configure the flow control
2737 * PHY and also velocity hardware setup accordingly. In particular
2738 * we need to set up CD polling and frame bursting.
2739 */
6aa20a22 2740
1da177e4
LT		 2741static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
2742{
2743 u32 curr_status;
2744 struct mac_regs __iomem * regs = vptr->mac_regs;
2745
2746 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
2747 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
2748
2749 /* Set mii link status */
2750 set_mii_flow_control(vptr);
2751
2752 /*
2753 Check if new status is consisent with current status
2754 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE)
2755 || (mii_status==curr_status)) {
2756 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
2757 vptr->mii_status=check_connection_type(vptr->mac_regs);
2758 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
2759 return 0;
2760 }
2761 */
2762
2763 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) {
2764 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
2765 }
2766
2767 /*
2768 * If connection type is AUTO
2769 */
2770 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
2771 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
2772 /* clear force MAC mode bit */
2773 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
2774 /* set duplex mode of MAC according to duplex mode of MII */
2775 MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs);
2776 MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2777 MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs);
2778
2779 /* enable AUTO-NEGO mode */
2780 mii_set_auto_on(vptr);
2781 } else {
2782 u16 ANAR;
2783 u8 CHIPGCR;
2784
2785 /*
2786 * 1. if it's 3119, disable frame bursting in halfduplex mode
2787 * and enable it in fullduplex mode
2788 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
2789 * 3. only enable CD heart beat counter in 10HD mode
2790 */
2791
2792 /* set force MAC mode bit */
2793 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2794
2795 CHIPGCR = readb(&regs->CHIPGCR);
2796 CHIPGCR &= ~CHIPGCR_FCGMII;
2797
2798 if (mii_status & VELOCITY_DUPLEX_FULL) {
2799 CHIPGCR |= CHIPGCR_FCFDX;
2800 writeb(CHIPGCR, &regs->CHIPGCR);
2801 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
2802 if (vptr->rev_id < REV_ID_VT3216_A0)
2803 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
2804 } else {
2805 CHIPGCR &= ~CHIPGCR_FCFDX;
2806 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
2807 writeb(CHIPGCR, &regs->CHIPGCR);
2808 if (vptr->rev_id < REV_ID_VT3216_A0)
2809 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
2810 }
2811
2812 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2813
2814 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) {
2815 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
2816 } else {
2817 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
2818 }
2819 /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
2820 velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
2821 ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
2822 if (mii_status & VELOCITY_SPEED_100) {
2823 if (mii_status & VELOCITY_DUPLEX_FULL)
2824 ANAR |= ANAR_TXFD;
2825 else
2826 ANAR |= ANAR_TX;
2827 } else {
2828 if (mii_status & VELOCITY_DUPLEX_FULL)
2829 ANAR |= ANAR_10FD;
2830 else
2831 ANAR |= ANAR_10;
2832 }
2833 velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
2834 /* enable AUTO-NEGO mode */
2835 mii_set_auto_on(vptr);
2836 /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
2837 }
2838 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
2839 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
2840 return VELOCITY_LINK_CHANGE;
2841}
2842
2843/**
2844 * mii_check_media_mode - check media state
2845 * @regs: velocity registers
2846 *
2847 * Check the current MII status and determine the link status
2848 * accordingly
2849 */
6aa20a22 2850
1da177e4
LT		 2851static u32 mii_check_media_mode(struct mac_regs __iomem * regs)
2852{
2853 u32 status = 0;
2854 u16 ANAR;
2855
2856 if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
2857 status |= VELOCITY_LINK_FAIL;
2858
2859 if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
2860 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
2861 else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
2862 status |= (VELOCITY_SPEED_1000);
2863 else {
2864 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2865 if (ANAR & ANAR_TXFD)
2866 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
2867 else if (ANAR & ANAR_TX)
2868 status |= VELOCITY_SPEED_100;
2869 else if (ANAR & ANAR_10FD)
2870 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
2871 else
2872 status |= (VELOCITY_SPEED_10);
2873 }
2874
2875 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2876 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2877 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2878 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2879 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2880 status |= VELOCITY_AUTONEG_ENABLE;
2881 }
2882 }
2883
2884 return status;
2885}
2886
2887static u32 check_connection_type(struct mac_regs __iomem * regs)
2888{
2889 u32 status = 0;
2890 u8 PHYSR0;
2891 u16 ANAR;
2892 PHYSR0 = readb(&regs->PHYSR0);
2893
2894 /*
2895 if (!(PHYSR0 & PHYSR0_LINKGD))
2896 status|=VELOCITY_LINK_FAIL;
2897 */
2898
2899 if (PHYSR0 & PHYSR0_FDPX)
2900 status |= VELOCITY_DUPLEX_FULL;
2901
2902 if (PHYSR0 & PHYSR0_SPDG)
2903 status |= VELOCITY_SPEED_1000;
59b693fb 2904 else if (PHYSR0 & PHYSR0_SPD10)
1da177e4
LT		 2905 status |= VELOCITY_SPEED_10;
2906 else
2907 status |= VELOCITY_SPEED_100;
2908
2909 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2910 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2911 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2912 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2913 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2914 status |= VELOCITY_AUTONEG_ENABLE;
2915 }
2916 }
2917
2918 return status;
2919}
2920
2921/**
2922 * enable_flow_control_ability - flow control
2923 * @vptr: veloity to configure
2924 *
2925 * Set up flow control according to the flow control options
2926 * determined by the eeprom/configuration.
2927 */
2928
2929static void enable_flow_control_ability(struct velocity_info *vptr)
2930{
2931
2932 struct mac_regs __iomem * regs = vptr->mac_regs;
2933
2934 switch (vptr->options.flow_cntl) {
2935
2936 case FLOW_CNTL_DEFAULT:
2937 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
2938 writel(CR0_FDXRFCEN, &regs->CR0Set);
2939 else
2940 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2941
2942 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
2943 writel(CR0_FDXTFCEN, &regs->CR0Set);
2944 else
2945 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2946 break;
2947
2948 case FLOW_CNTL_TX:
2949 writel(CR0_FDXTFCEN, &regs->CR0Set);
2950 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2951 break;
2952
2953 case FLOW_CNTL_RX:
2954 writel(CR0_FDXRFCEN, &regs->CR0Set);
2955 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2956 break;
2957
2958 case FLOW_CNTL_TX_RX:
2959 writel(CR0_FDXTFCEN, &regs->CR0Set);
2960 writel(CR0_FDXRFCEN, &regs->CR0Set);
2961 break;
2962
2963 case FLOW_CNTL_DISABLE:
2964 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2965 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2966 break;
2967
2968 default:
2969 break;
2970 }
2971
2972}
2973
2974
2975/**
2976 * velocity_ethtool_up - pre hook for ethtool
2977 * @dev: network device
2978 *
2979 * Called before an ethtool operation. We need to make sure the
2980 * chip is out of D3 state before we poke at it.
2981 */
6aa20a22 2982
1da177e4
LT		 2983static int velocity_ethtool_up(struct net_device *dev)
2984{
8ab6f3f7 2985 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2986 if (!netif_running(dev))
2987 pci_set_power_state(vptr->pdev, PCI_D0);
2988 return 0;
6aa20a22 2989}
1da177e4
LT		 2990
2991/**
2992 * velocity_ethtool_down - post hook for ethtool
2993 * @dev: network device
2994 *
2995 * Called after an ethtool operation. Restore the chip back to D3
2996 * state if it isn't running.
2997 */
6aa20a22 2998
1da177e4
LT		 2999static void velocity_ethtool_down(struct net_device *dev)
3000{
8ab6f3f7 3001 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3002 if (!netif_running(dev))
3003 pci_set_power_state(vptr->pdev, PCI_D3hot);
3004}
3005
3006static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3007{
8ab6f3f7 3008 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3009 struct mac_regs __iomem * regs = vptr->mac_regs;
3010 u32 status;
3011 status = check_connection_type(vptr->mac_regs);
3012
59b693fb
JC		 3013 cmd->supported = SUPPORTED_TP |
3014 SUPPORTED_Autoneg |
3015 SUPPORTED_10baseT_Half |
3016 SUPPORTED_10baseT_Full |
3017 SUPPORTED_100baseT_Half |
3018 SUPPORTED_100baseT_Full |
3019 SUPPORTED_1000baseT_Half |
3020 SUPPORTED_1000baseT_Full;
3021 if (status & VELOCITY_SPEED_1000)
3022 cmd->speed = SPEED_1000;
3023 else if (status & VELOCITY_SPEED_100)
1da177e4
LT		 3024 cmd->speed = SPEED_100;
3025 else
3026 cmd->speed = SPEED_10;
3027 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
3028 cmd->port = PORT_TP;
3029 cmd->transceiver = XCVR_INTERNAL;
3030 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
3031
3032 if (status & VELOCITY_DUPLEX_FULL)
3033 cmd->duplex = DUPLEX_FULL;
3034 else
3035 cmd->duplex = DUPLEX_HALF;
6aa20a22 3036
1da177e4
LT		 3037 return 0;
3038}
3039
3040static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3041{
8ab6f3f7 3042 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3043 u32 curr_status;
3044 u32 new_status = 0;
3045 int ret = 0;
6aa20a22 3046
1da177e4
LT		 3047 curr_status = check_connection_type(vptr->mac_regs);
3048 curr_status &= (~VELOCITY_LINK_FAIL);
3049
3050 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3051 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3052 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3053 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3054
3055 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
3056 ret = -EINVAL;
3057 else
3058 velocity_set_media_mode(vptr, new_status);
3059
3060 return ret;
3061}
3062
3063static u32 velocity_get_link(struct net_device *dev)
3064{
8ab6f3f7 3065 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 3066 struct mac_regs __iomem * regs = vptr->mac_regs;
59b693fb 3067 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT		 3068}
3069
3070static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3071{
8ab6f3f7 3072 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3073 strcpy(info->driver, VELOCITY_NAME);
3074 strcpy(info->version, VELOCITY_VERSION);
3075 strcpy(info->bus_info, pci_name(vptr->pdev));
3076}
3077
3078static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3079{
8ab6f3f7 3080 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3081 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3082 wol->wolopts |= WAKE_MAGIC;
3083 /*
3084 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3085 wol.wolopts|=WAKE_PHY;
3086 */
3087 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3088 wol->wolopts |= WAKE_UCAST;
3089 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3090 wol->wolopts |= WAKE_ARP;
3091 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3092}
3093
3094static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3095{
8ab6f3f7 3096 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3097
3098 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3099 return -EFAULT;
3100 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3101
3102 /*
3103 if (wol.wolopts & WAKE_PHY) {
3104 vptr->wol_opts|=VELOCITY_WOL_PHY;
3105 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3106 }
3107 */
3108
3109 if (wol->wolopts & WAKE_MAGIC) {
3110 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3111 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3112 }
3113 if (wol->wolopts & WAKE_UCAST) {
3114 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3115 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3116 }
3117 if (wol->wolopts & WAKE_ARP) {
3118 vptr->wol_opts |= VELOCITY_WOL_ARP;
3119 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3120 }
3121 memcpy(vptr->wol_passwd, wol->sopass, 6);
3122 return 0;
3123}
3124
3125static u32 velocity_get_msglevel(struct net_device *dev)
3126{
3127 return msglevel;
3128}
3129
3130static void velocity_set_msglevel(struct net_device *dev, u32 value)
3131{
3132 msglevel = value;
3133}
3134
7282d491 3135static const struct ethtool_ops velocity_ethtool_ops = {
1da177e4
LT		 3136 .get_settings = velocity_get_settings,
3137 .set_settings = velocity_set_settings,
3138 .get_drvinfo = velocity_get_drvinfo,
3139 .get_wol = velocity_ethtool_get_wol,
3140 .set_wol = velocity_ethtool_set_wol,
3141 .get_msglevel = velocity_get_msglevel,
3142 .set_msglevel = velocity_set_msglevel,
3143 .get_link = velocity_get_link,
3144 .begin = velocity_ethtool_up,
3145 .complete = velocity_ethtool_down
3146};
3147
3148/**
3149 * velocity_mii_ioctl - MII ioctl handler
3150 * @dev: network device
3151 * @ifr: the ifreq block for the ioctl
3152 * @cmd: the command
3153 *
3154 * Process MII requests made via ioctl from the network layer. These
3155 * are used by tools like kudzu to interrogate the link state of the
3156 * hardware
3157 */
6aa20a22 3158
1da177e4
LT		 3159static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
3160{
8ab6f3f7 3161 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3162 struct mac_regs __iomem * regs = vptr->mac_regs;
3163 unsigned long flags;
3164 struct mii_ioctl_data *miidata = if_mii(ifr);
3165 int err;
6aa20a22 3166
1da177e4
LT		 3167 switch (cmd) {
3168 case SIOCGMIIPHY:
3169 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
3170 break;
3171 case SIOCGMIIREG:
3172 if (!capable(CAP_NET_ADMIN))
3173 return -EPERM;
3174 if(velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
3175 return -ETIMEDOUT;
3176 break;
3177 case SIOCSMIIREG:
3178 if (!capable(CAP_NET_ADMIN))
3179 return -EPERM;
3180 spin_lock_irqsave(&vptr->lock, flags);
3181 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
3182 spin_unlock_irqrestore(&vptr->lock, flags);
3183 check_connection_type(vptr->mac_regs);
3184 if(err)
3185 return err;
3186 break;
3187 default:
3188 return -EOPNOTSUPP;
3189 }
3190 return 0;
3191}
3192
3193#ifdef CONFIG_PM
3194
3195/**
3196 * velocity_save_context - save registers
6aa20a22 3197 * @vptr: velocity
1da177e4
LT		 3198 * @context: buffer for stored context
3199 *
3200 * Retrieve the current configuration from the velocity hardware
3201 * and stash it in the context structure, for use by the context
3202 * restore functions. This allows us to save things we need across
3203 * power down states
3204 */
6aa20a22 3205
1da177e4
LT		 3206static void velocity_save_context(struct velocity_info *vptr, struct velocity_context * context)
3207{
3208 struct mac_regs __iomem * regs = vptr->mac_regs;
3209 u16 i;
3210 u8 __iomem *ptr = (u8 __iomem *)regs;
3211
3212 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
3213 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3214
3215 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3216 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3217
3218 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3219 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3220
3221}
3222
3223/**
3224 * velocity_restore_context - restore registers
6aa20a22 3225 * @vptr: velocity
1da177e4
LT		 3226 * @context: buffer for stored context
3227 *
6aa20a22 3228 * Reload the register configuration from the velocity context
1da177e4
LT		 3229 * created by velocity_save_context.
3230 */
6aa20a22 3231
1da177e4
LT		 3232static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3233{
3234 struct mac_regs __iomem * regs = vptr->mac_regs;
3235 int i;
3236 u8 __iomem *ptr = (u8 __iomem *)regs;
3237
3238 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) {
3239 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3240 }
3241
3242 /* Just skip cr0 */
3243 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3244 /* Clear */
3245 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3246 /* Set */
3247 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3248 }
3249
3250 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) {
3251 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3252 }
3253
3254 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) {
3255 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3256 }
3257
3258 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) {
3259 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3260 }
3261
3262}
3263
3264/**
3265 * wol_calc_crc - WOL CRC
3266 * @pattern: data pattern
3267 * @mask_pattern: mask
3268 *
3269 * Compute the wake on lan crc hashes for the packet header
3270 * we are interested in.
3271 */
3272
3273static u16 wol_calc_crc(int size, u8 * pattern, u8 *mask_pattern)
3274{
3275 u16 crc = 0xFFFF;
3276 u8 mask;
3277 int i, j;
3278
3279 for (i = 0; i < size; i++) {
3280 mask = mask_pattern[i];
3281
3282 /* Skip this loop if the mask equals to zero */
3283 if (mask == 0x00)
3284 continue;
3285
3286 for (j = 0; j < 8; j++) {
3287 if ((mask & 0x01) == 0) {
3288 mask >>= 1;
3289 continue;
3290 }
3291 mask >>= 1;
3292 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
3293 }
3294 }
3295 /* Finally, invert the result once to get the correct data */
3296 crc = ~crc;
906d66df 3297 return bitrev32(crc) >> 16;
1da177e4
LT		 3298}
3299
3300/**
3301 * velocity_set_wol - set up for wake on lan
3302 * @vptr: velocity to set WOL status on
3303 *
3304 * Set a card up for wake on lan either by unicast or by
3305 * ARP packet.
3306 *
3307 * FIXME: check static buffer is safe here
3308 */
3309
3310static int velocity_set_wol(struct velocity_info *vptr)
3311{
3312 struct mac_regs __iomem * regs = vptr->mac_regs;
3313 static u8 buf[256];
3314 int i;
3315
3316 static u32 mask_pattern[2][4] = {
3317 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
3318 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
3319 };
3320
3321 writew(0xFFFF, &regs->WOLCRClr);
3322 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
3323 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
3324
3325 /*
3326 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3327 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
3328 */
3329
3330 if (vptr->wol_opts & VELOCITY_WOL_UCAST) {
3331 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
3332 }
3333
3334 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
3335 struct arp_packet *arp = (struct arp_packet *) buf;
3336 u16 crc;
3337 memset(buf, 0, sizeof(struct arp_packet) + 7);
3338
3339 for (i = 0; i < 4; i++)
3340 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
3341
3342 arp->type = htons(ETH_P_ARP);
3343 arp->ar_op = htons(1);
3344
3345 memcpy(arp->ar_tip, vptr->ip_addr, 4);
3346
3347 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
3348 (u8 *) & mask_pattern[0][0]);
3349
3350 writew(crc, &regs->PatternCRC[0]);
3351 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
3352 }
3353
3354 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
3355 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
3356
3357 writew(0x0FFF, &regs->WOLSRClr);
3358
3359 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
3360 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3361 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
3362
3363 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
3364 }
3365
3366 if (vptr->mii_status & VELOCITY_SPEED_1000)
3367 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
3368
3369 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
3370
3371 {
3372 u8 GCR;
3373 GCR = readb(&regs->CHIPGCR);
3374 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
3375 writeb(GCR, &regs->CHIPGCR);
3376 }
3377
3378 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
3379 /* Turn on SWPTAG just before entering power mode */
3380 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
3381 /* Go to bed ..... */
3382 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
3383
3384 return 0;
3385}
3386
3387static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3388{
3389 struct net_device *dev = pci_get_drvdata(pdev);
3390 struct velocity_info *vptr = netdev_priv(dev);
3391 unsigned long flags;
3392
3393 if(!netif_running(vptr->dev))
3394 return 0;
3395
3396 netif_device_detach(vptr->dev);
3397
3398 spin_lock_irqsave(&vptr->lock, flags);
3399 pci_save_state(pdev);
3400#ifdef ETHTOOL_GWOL
3401 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3402 velocity_get_ip(vptr);
3403 velocity_save_context(vptr, &vptr->context);
3404 velocity_shutdown(vptr);
3405 velocity_set_wol(vptr);
4a51c0d0 3406 pci_enable_wake(pdev, PCI_D3hot, 1);
1da177e4
LT		 3407 pci_set_power_state(pdev, PCI_D3hot);
3408 } else {
3409 velocity_save_context(vptr, &vptr->context);
3410 velocity_shutdown(vptr);
3411 pci_disable_device(pdev);
3412 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3413 }
3414#else
3415 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3416#endif
3417 spin_unlock_irqrestore(&vptr->lock, flags);
3418 return 0;
3419}
3420
3421static int velocity_resume(struct pci_dev *pdev)
3422{
3423 struct net_device *dev = pci_get_drvdata(pdev);
3424 struct velocity_info *vptr = netdev_priv(dev);
3425 unsigned long flags;
3426 int i;
3427
3428 if(!netif_running(vptr->dev))
3429 return 0;
3430
3431 pci_set_power_state(pdev, PCI_D0);
3432 pci_enable_wake(pdev, 0, 0);
3433 pci_restore_state(pdev);
3434
3435 mac_wol_reset(vptr->mac_regs);
3436
3437 spin_lock_irqsave(&vptr->lock, flags);
3438 velocity_restore_context(vptr, &vptr->context);
3439 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3440 mac_disable_int(vptr->mac_regs);
3441
3442 velocity_tx_srv(vptr, 0);
3443
3444 for (i = 0; i < vptr->num_txq; i++) {
3445 if (vptr->td_used[i]) {
3446 mac_tx_queue_wake(vptr->mac_regs, i);
3447 }
3448 }
3449
3450 mac_enable_int(vptr->mac_regs);
3451 spin_unlock_irqrestore(&vptr->lock, flags);
3452 netif_device_attach(vptr->dev);
3453
3454 return 0;
3455}
3456
ce9f7fe3
RD		 3457#ifdef CONFIG_INET
3458
1da177e4
LT		 3459static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3460{
3461 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
a337499f
DL		 3462 struct net_device *dev = ifa->ifa_dev->dev;
3463 struct velocity_info *vptr;
3464 unsigned long flags;
1da177e4 3465
c346dca1 3466 if (dev_net(dev) != &init_net)
6133fb1a
DL		 3467 return NOTIFY_DONE;
3468
a337499f
DL		 3469 spin_lock_irqsave(&velocity_dev_list_lock, flags);
3470 list_for_each_entry(vptr, &velocity_dev_list, list) {
3471 if (vptr->dev == dev) {
3472 velocity_get_ip(vptr);
3473 break;
1da177e4 3474 }
1da177e4 3475 }
a337499f
DL		 3476 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
3477
1da177e4
LT		 3478 return NOTIFY_DONE;
3479}
ce9f7fe3
RD		 3480
3481#endif
1da177e4 3482#endif
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