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r8169: move PHY regs tables to .rodata
[net-next-2.6.git] / drivers / net / via-velocity.c
CommitLineData
1da177e4
LT
1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
1da177e4
LT
11 * rx_copybreak/alignment
12 * Scatter gather
13 * More testing
14 *
113aa838 15 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk>
1da177e4
LT
16 * Additional fixes and clean up: Francois Romieu
17 *
18 * This source has not been verified for use in safety critical systems.
19 *
20 * Please direct queries about the revamped driver to the linux-kernel
21 * list not VIA.
22 *
23 * Original code:
24 *
25 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
26 * All rights reserved.
27 *
28 * This software may be redistributed and/or modified under
29 * the terms of the GNU General Public License as published by the Free
30 * Software Foundation; either version 2 of the License, or
31 * any later version.
32 *
33 * This program is distributed in the hope that it will be useful, but
34 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
35 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
36 * for more details.
37 *
38 * Author: Chuang Liang-Shing, AJ Jiang
39 *
40 * Date: Jan 24, 2003
41 *
42 * MODULE_LICENSE("GPL");
43 *
44 */
45
46
47#include <linux/module.h>
48#include <linux/types.h>
1da177e4
LT
49#include <linux/init.h>
50#include <linux/mm.h>
51#include <linux/errno.h>
52#include <linux/ioport.h>
53#include <linux/pci.h>
54#include <linux/kernel.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/skbuff.h>
58#include <linux/delay.h>
59#include <linux/timer.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
1da177e4
LT
62#include <linux/string.h>
63#include <linux/wait.h>
c4067400 64#include <linux/io.h>
1da177e4 65#include <linux/if.h>
c4067400 66#include <linux/uaccess.h>
1da177e4
LT
67#include <linux/proc_fs.h>
68#include <linux/inetdevice.h>
69#include <linux/reboot.h>
70#include <linux/ethtool.h>
71#include <linux/mii.h>
72#include <linux/in.h>
73#include <linux/if_arp.h>
501e4d24 74#include <linux/if_vlan.h>
1da177e4
LT
75#include <linux/ip.h>
76#include <linux/tcp.h>
77#include <linux/udp.h>
78#include <linux/crc-ccitt.h>
79#include <linux/crc32.h>
80
81#include "via-velocity.h"
82
83
c4067400 84static int velocity_nics;
1da177e4
LT
85static int msglevel = MSG_LEVEL_INFO;
86
01faccbf
SH
87/**
88 * mac_get_cam_mask - Read a CAM mask
89 * @regs: register block for this velocity
90 * @mask: buffer to store mask
91 *
92 * Fetch the mask bits of the selected CAM and store them into the
93 * provided mask buffer.
94 */
c4067400 95static void mac_get_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
01faccbf
SH
96{
97 int i;
98
99 /* Select CAM mask */
100 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
101
102 writeb(0, &regs->CAMADDR);
103
104 /* read mask */
105 for (i = 0; i < 8; i++)
106 *mask++ = readb(&(regs->MARCAM[i]));
107
108 /* disable CAMEN */
109 writeb(0, &regs->CAMADDR);
110
111 /* Select mar */
112 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
01faccbf
SH
113}
114
115
116/**
117 * mac_set_cam_mask - Set a CAM mask
118 * @regs: register block for this velocity
119 * @mask: CAM mask to load
120 *
121 * Store a new mask into a CAM
122 */
c4067400 123static void mac_set_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
01faccbf
SH
124{
125 int i;
126 /* Select CAM mask */
127 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
128
129 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
130
c4067400 131 for (i = 0; i < 8; i++)
01faccbf 132 writeb(*mask++, &(regs->MARCAM[i]));
c4067400 133
01faccbf
SH
134 /* disable CAMEN */
135 writeb(0, &regs->CAMADDR);
136
137 /* Select mar */
138 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
139}
140
c4067400 141static void mac_set_vlan_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
01faccbf
SH
142{
143 int i;
144 /* Select CAM mask */
145 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
146
147 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
148
c4067400 149 for (i = 0; i < 8; i++)
01faccbf 150 writeb(*mask++, &(regs->MARCAM[i]));
c4067400 151
01faccbf
SH
152 /* disable CAMEN */
153 writeb(0, &regs->CAMADDR);
154
155 /* Select mar */
156 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
157}
158
159/**
160 * mac_set_cam - set CAM data
161 * @regs: register block of this velocity
162 * @idx: Cam index
163 * @addr: 2 or 6 bytes of CAM data
164 *
165 * Load an address or vlan tag into a CAM
166 */
c4067400 167static void mac_set_cam(struct mac_regs __iomem *regs, int idx, const u8 *addr)
01faccbf
SH
168{
169 int i;
170
171 /* Select CAM mask */
172 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
173
174 idx &= (64 - 1);
175
176 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
177
c4067400 178 for (i = 0; i < 6; i++)
01faccbf 179 writeb(*addr++, &(regs->MARCAM[i]));
c4067400 180
01faccbf
SH
181 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
182
183 udelay(10);
184
185 writeb(0, &regs->CAMADDR);
186
187 /* Select mar */
188 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
189}
190
c4067400 191static void mac_set_vlan_cam(struct mac_regs __iomem *regs, int idx,
01faccbf
SH
192 const u8 *addr)
193{
194
195 /* Select CAM mask */
196 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
197
198 idx &= (64 - 1);
199
200 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
201 writew(*((u16 *) addr), &regs->MARCAM[0]);
202
203 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
204
205 udelay(10);
206
207 writeb(0, &regs->CAMADDR);
208
209 /* Select mar */
210 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
211}
212
213
214/**
215 * mac_wol_reset - reset WOL after exiting low power
216 * @regs: register block of this velocity
217 *
218 * Called after we drop out of wake on lan mode in order to
219 * reset the Wake on lan features. This function doesn't restore
220 * the rest of the logic from the result of sleep/wakeup
221 */
c4067400 222static void mac_wol_reset(struct mac_regs __iomem *regs)
01faccbf
SH
223{
224
225 /* Turn off SWPTAG right after leaving power mode */
226 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
227 /* clear sticky bits */
228 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
229
230 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
231 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
232 /* disable force PME-enable */
233 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
234 /* disable power-event config bit */
235 writew(0xFFFF, &regs->WOLCRClr);
236 /* clear power status */
237 writew(0xFFFF, &regs->WOLSRClr);
238}
1da177e4 239
7282d491 240static const struct ethtool_ops velocity_ethtool_ops;
1da177e4
LT
241
242/*
243 Define module options
244*/
245
246MODULE_AUTHOR("VIA Networking Technologies, Inc.");
247MODULE_LICENSE("GPL");
248MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
249
c4067400
DJ
250#define VELOCITY_PARAM(N, D) \
251 static int N[MAX_UNITS] = OPTION_DEFAULT;\
1da177e4 252 module_param_array(N, int, NULL, 0); \
c4067400 253 MODULE_PARM_DESC(N, D);
1da177e4
LT
254
255#define RX_DESC_MIN 64
256#define RX_DESC_MAX 255
257#define RX_DESC_DEF 64
258VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
259
260#define TX_DESC_MIN 16
261#define TX_DESC_MAX 256
262#define TX_DESC_DEF 64
263VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
264
1da177e4
LT
265#define RX_THRESH_MIN 0
266#define RX_THRESH_MAX 3
267#define RX_THRESH_DEF 0
268/* rx_thresh[] is used for controlling the receive fifo threshold.
269 0: indicate the rxfifo threshold is 128 bytes.
270 1: indicate the rxfifo threshold is 512 bytes.
271 2: indicate the rxfifo threshold is 1024 bytes.
272 3: indicate the rxfifo threshold is store & forward.
273*/
274VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
275
276#define DMA_LENGTH_MIN 0
277#define DMA_LENGTH_MAX 7
278#define DMA_LENGTH_DEF 0
279
280/* DMA_length[] is used for controlling the DMA length
281 0: 8 DWORDs
282 1: 16 DWORDs
283 2: 32 DWORDs
284 3: 64 DWORDs
285 4: 128 DWORDs
286 5: 256 DWORDs
287 6: SF(flush till emply)
288 7: SF(flush till emply)
289*/
290VELOCITY_PARAM(DMA_length, "DMA length");
291
1da177e4
LT
292#define IP_ALIG_DEF 0
293/* IP_byte_align[] is used for IP header DWORD byte aligned
294 0: indicate the IP header won't be DWORD byte aligned.(Default) .
295 1: indicate the IP header will be DWORD byte aligned.
296 In some enviroment, the IP header should be DWORD byte aligned,
297 or the packet will be droped when we receive it. (eg: IPVS)
298*/
299VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
300
301#define TX_CSUM_DEF 1
302/* txcsum_offload[] is used for setting the checksum offload ability of NIC.
303 (We only support RX checksum offload now)
304 0: disable csum_offload[checksum offload
305 1: enable checksum offload. (Default)
306*/
307VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
308
309#define FLOW_CNTL_DEF 1
310#define FLOW_CNTL_MIN 1
311#define FLOW_CNTL_MAX 5
312
313/* flow_control[] is used for setting the flow control ability of NIC.
314 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
315 2: enable TX flow control.
316 3: enable RX flow control.
317 4: enable RX/TX flow control.
318 5: disable
319*/
320VELOCITY_PARAM(flow_control, "Enable flow control ability");
321
322#define MED_LNK_DEF 0
323#define MED_LNK_MIN 0
324#define MED_LNK_MAX 4
325/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
326 0: indicate autonegotiation for both speed and duplex mode
327 1: indicate 100Mbps half duplex mode
328 2: indicate 100Mbps full duplex mode
329 3: indicate 10Mbps half duplex mode
330 4: indicate 10Mbps full duplex mode
331
332 Note:
c4067400
DJ
333 if EEPROM have been set to the force mode, this option is ignored
334 by driver.
1da177e4
LT
335*/
336VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
337
338#define VAL_PKT_LEN_DEF 0
339/* ValPktLen[] is used for setting the checksum offload ability of NIC.
340 0: Receive frame with invalid layer 2 length (Default)
341 1: Drop frame with invalid layer 2 length
342*/
343VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
344
345#define WOL_OPT_DEF 0
346#define WOL_OPT_MIN 0
347#define WOL_OPT_MAX 7
348/* wol_opts[] is used for controlling wake on lan behavior.
349 0: Wake up if recevied a magic packet. (Default)
350 1: Wake up if link status is on/off.
351 2: Wake up if recevied an arp packet.
352 4: Wake up if recevied any unicast packet.
353 Those value can be sumed up to support more than one option.
354*/
355VELOCITY_PARAM(wol_opts, "Wake On Lan options");
356
357#define INT_WORKS_DEF 20
358#define INT_WORKS_MIN 10
359#define INT_WORKS_MAX 64
360
361VELOCITY_PARAM(int_works, "Number of packets per interrupt services");
362
363static int rx_copybreak = 200;
364module_param(rx_copybreak, int, 0644);
365MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
366
1da177e4
LT
367/*
368 * Internal board variants. At the moment we have only one
369 */
4f14b92f 370static struct velocity_info_tbl chip_info_table[] = {
cabb7667
JG
371 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
372 { }
1da177e4
LT
373};
374
375/*
376 * Describe the PCI device identifiers that we support in this
377 * device driver. Used for hotplug autoloading.
378 */
e54f4893
JG
379static const struct pci_device_id velocity_id_table[] __devinitdata = {
380 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
381 { }
1da177e4
LT
382};
383
384MODULE_DEVICE_TABLE(pci, velocity_id_table);
385
386/**
387 * get_chip_name - identifier to name
388 * @id: chip identifier
389 *
390 * Given a chip identifier return a suitable description. Returns
391 * a pointer a static string valid while the driver is loaded.
392 */
01faccbf 393static const char __devinit *get_chip_name(enum chip_type chip_id)
1da177e4
LT
394{
395 int i;
396 for (i = 0; chip_info_table[i].name != NULL; i++)
397 if (chip_info_table[i].chip_id == chip_id)
398 break;
399 return chip_info_table[i].name;
400}
401
402/**
403 * velocity_remove1 - device unplug
404 * @pdev: PCI device being removed
405 *
406 * Device unload callback. Called on an unplug or on module
407 * unload for each active device that is present. Disconnects
408 * the device from the network layer and frees all the resources
409 */
1da177e4
LT
410static void __devexit velocity_remove1(struct pci_dev *pdev)
411{
412 struct net_device *dev = pci_get_drvdata(pdev);
8ab6f3f7 413 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 414
1da177e4
LT
415 unregister_netdev(dev);
416 iounmap(vptr->mac_regs);
417 pci_release_regions(pdev);
418 pci_disable_device(pdev);
419 pci_set_drvdata(pdev, NULL);
420 free_netdev(dev);
421
422 velocity_nics--;
423}
424
425/**
426 * velocity_set_int_opt - parser for integer options
427 * @opt: pointer to option value
428 * @val: value the user requested (or -1 for default)
429 * @min: lowest value allowed
430 * @max: highest value allowed
431 * @def: default value
432 * @name: property name
433 * @dev: device name
434 *
435 * Set an integer property in the module options. This function does
436 * all the verification and checking as well as reporting so that
437 * we don't duplicate code for each option.
438 */
07b5f6a6 439static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, const char *devname)
1da177e4
LT
440{
441 if (val == -1)
442 *opt = def;
443 else if (val < min || val > max) {
444 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
445 devname, name, min, max);
446 *opt = def;
447 } else {
448 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
449 devname, name, val);
450 *opt = val;
451 }
452}
453
454/**
455 * velocity_set_bool_opt - parser for boolean options
456 * @opt: pointer to option value
457 * @val: value the user requested (or -1 for default)
458 * @def: default value (yes/no)
459 * @flag: numeric value to set for true.
460 * @name: property name
461 * @dev: device name
462 *
463 * Set a boolean property in the module options. This function does
464 * all the verification and checking as well as reporting so that
465 * we don't duplicate code for each option.
466 */
c4067400 467static void __devinit velocity_set_bool_opt(u32 *opt, int val, int def, u32 flag, char *name, const char *devname)
1da177e4
LT
468{
469 (*opt) &= (~flag);
470 if (val == -1)
471 *opt |= (def ? flag : 0);
472 else if (val < 0 || val > 1) {
6aa20a22 473 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT
474 devname, name);
475 *opt |= (def ? flag : 0);
476 } else {
6aa20a22 477 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT
478 devname, name, val ? "TRUE" : "FALSE");
479 *opt |= (val ? flag : 0);
480 }
481}
482
483/**
484 * velocity_get_options - set options on device
485 * @opts: option structure for the device
486 * @index: index of option to use in module options array
487 * @devname: device name
488 *
489 * Turn the module and command options into a single structure
490 * for the current device
491 */
07b5f6a6 492static void __devinit velocity_get_options(struct velocity_opt *opts, int index, const char *devname)
1da177e4
LT
493{
494
495 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
496 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
497 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
498 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
501e4d24 499
1da177e4
LT
500 velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname);
501 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
502 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
503 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
504 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
505 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
506 velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname);
507 opts->numrx = (opts->numrx & ~3);
508}
509
510/**
511 * velocity_init_cam_filter - initialise CAM
512 * @vptr: velocity to program
513 *
514 * Initialize the content addressable memory used for filters. Load
515 * appropriately according to the presence of VLAN
516 */
1da177e4
LT
517static void velocity_init_cam_filter(struct velocity_info *vptr)
518{
c4067400 519 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4
LT
520
521 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
522 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
523 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
524
525 /* Disable all CAMs */
526 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
527 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
01faccbf
SH
528 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
529 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4 530
d4f73c8e 531 /* Enable VCAMs */
501e4d24 532 if (vptr->vlgrp) {
d4f73c8e
FR
533 unsigned int vid, i = 0;
534
535 if (!vlan_group_get_device(vptr->vlgrp, 0))
536 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
501e4d24 537
d4f73c8e
FR
538 for (vid = 1; (vid < VLAN_VID_MASK); vid++) {
539 if (vlan_group_get_device(vptr->vlgrp, vid)) {
540 mac_set_vlan_cam(regs, i, (u8 *) &vid);
541 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
542 if (++i >= VCAM_SIZE)
543 break;
501e4d24
SH
544 }
545 }
01faccbf 546 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
1da177e4
LT
547 }
548}
549
d4f73c8e
FR
550static void velocity_vlan_rx_register(struct net_device *dev,
551 struct vlan_group *grp)
552{
553 struct velocity_info *vptr = netdev_priv(dev);
554
555 vptr->vlgrp = grp;
556}
557
501e4d24
SH
558static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
559{
560 struct velocity_info *vptr = netdev_priv(dev);
561
c4067400 562 spin_lock_irq(&vptr->lock);
501e4d24 563 velocity_init_cam_filter(vptr);
c4067400 564 spin_unlock_irq(&vptr->lock);
501e4d24
SH
565}
566
567static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
568{
569 struct velocity_info *vptr = netdev_priv(dev);
570
c4067400 571 spin_lock_irq(&vptr->lock);
501e4d24
SH
572 vlan_group_set_device(vptr->vlgrp, vid, NULL);
573 velocity_init_cam_filter(vptr);
c4067400 574 spin_unlock_irq(&vptr->lock);
501e4d24
SH
575}
576
3c4dc711
FR
577static void velocity_init_rx_ring_indexes(struct velocity_info *vptr)
578{
579 vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0;
580}
501e4d24 581
1da177e4
LT
582/**
583 * velocity_rx_reset - handle a receive reset
584 * @vptr: velocity we are resetting
585 *
586 * Reset the ownership and status for the receive ring side.
587 * Hand all the receive queue to the NIC.
588 */
1da177e4
LT
589static void velocity_rx_reset(struct velocity_info *vptr)
590{
591
c4067400 592 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4
LT
593 int i;
594
3c4dc711 595 velocity_init_rx_ring_indexes(vptr);
1da177e4
LT
596
597 /*
598 * Init state, all RD entries belong to the NIC
599 */
600 for (i = 0; i < vptr->options.numrx; ++i)
0fe9f15e 601 vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT
602
603 writew(vptr->options.numrx, &regs->RBRDU);
0fe9f15e 604 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1da177e4
LT
605 writew(0, &regs->RDIdx);
606 writew(vptr->options.numrx - 1, &regs->RDCSize);
607}
608
609/**
2cf71d2e
DJ
610 * velocity_get_opt_media_mode - get media selection
611 * @vptr: velocity adapter
1da177e4 612 *
2cf71d2e
DJ
613 * Get the media mode stored in EEPROM or module options and load
614 * mii_status accordingly. The requested link state information
615 * is also returned.
1da177e4 616 */
2cf71d2e 617static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
1da177e4 618{
2cf71d2e 619 u32 status = 0;
1da177e4 620
2cf71d2e
DJ
621 switch (vptr->options.spd_dpx) {
622 case SPD_DPX_AUTO:
623 status = VELOCITY_AUTONEG_ENABLE;
1da177e4 624 break;
2cf71d2e
DJ
625 case SPD_DPX_100_FULL:
626 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
627 break;
628 case SPD_DPX_10_FULL:
629 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
630 break;
631 case SPD_DPX_100_HALF:
632 status = VELOCITY_SPEED_100;
633 break;
634 case SPD_DPX_10_HALF:
635 status = VELOCITY_SPEED_10;
636 break;
637 }
638 vptr->mii_status = status;
639 return status;
640}
1da177e4 641
2cf71d2e
DJ
642/**
643 * safe_disable_mii_autopoll - autopoll off
644 * @regs: velocity registers
645 *
646 * Turn off the autopoll and wait for it to disable on the chip
647 */
648static void safe_disable_mii_autopoll(struct mac_regs __iomem *regs)
649{
650 u16 ww;
1da177e4 651
2cf71d2e
DJ
652 /* turn off MAUTO */
653 writeb(0, &regs->MIICR);
654 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
655 udelay(1);
656 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
657 break;
658 }
659}
1da177e4 660
2cf71d2e
DJ
661/**
662 * enable_mii_autopoll - turn on autopolling
663 * @regs: velocity registers
664 *
665 * Enable the MII link status autopoll feature on the Velocity
666 * hardware. Wait for it to enable.
667 */
668static void enable_mii_autopoll(struct mac_regs __iomem *regs)
669{
670 int ii;
1da177e4 671
2cf71d2e
DJ
672 writeb(0, &(regs->MIICR));
673 writeb(MIIADR_SWMPL, &regs->MIIADR);
1da177e4 674
2cf71d2e
DJ
675 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
676 udelay(1);
677 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
678 break;
679 }
1da177e4 680
2cf71d2e 681 writeb(MIICR_MAUTO, &regs->MIICR);
1da177e4 682
2cf71d2e
DJ
683 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
684 udelay(1);
685 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
686 break;
687 }
1da177e4 688
2cf71d2e 689}
1da177e4 690
2cf71d2e
DJ
691/**
692 * velocity_mii_read - read MII data
693 * @regs: velocity registers
694 * @index: MII register index
695 * @data: buffer for received data
696 *
697 * Perform a single read of an MII 16bit register. Returns zero
698 * on success or -ETIMEDOUT if the PHY did not respond.
699 */
700static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
701{
702 u16 ww;
1da177e4 703
2cf71d2e
DJ
704 /*
705 * Disable MIICR_MAUTO, so that mii addr can be set normally
706 */
707 safe_disable_mii_autopoll(regs);
1da177e4 708
2cf71d2e 709 writeb(index, &regs->MIIADR);
1da177e4 710
2cf71d2e 711 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
1da177e4 712
2cf71d2e
DJ
713 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
714 if (!(readb(&regs->MIICR) & MIICR_RCMD))
715 break;
716 }
1da177e4 717
2cf71d2e 718 *data = readw(&regs->MIIDATA);
1da177e4 719
2cf71d2e
DJ
720 enable_mii_autopoll(regs);
721 if (ww == W_MAX_TIMEOUT)
722 return -ETIMEDOUT;
723 return 0;
1da177e4
LT
724}
725
2cf71d2e 726
1da177e4 727/**
2cf71d2e
DJ
728 * mii_check_media_mode - check media state
729 * @regs: velocity registers
1da177e4 730 *
2cf71d2e
DJ
731 * Check the current MII status and determine the link status
732 * accordingly
1da177e4 733 */
2cf71d2e 734static u32 mii_check_media_mode(struct mac_regs __iomem *regs)
1da177e4 735{
2cf71d2e
DJ
736 u32 status = 0;
737 u16 ANAR;
1da177e4 738
2cf71d2e
DJ
739 if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
740 status |= VELOCITY_LINK_FAIL;
1da177e4 741
2cf71d2e
DJ
742 if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
743 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
744 else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
745 status |= (VELOCITY_SPEED_1000);
746 else {
747 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
748 if (ANAR & ANAR_TXFD)
749 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
750 else if (ANAR & ANAR_TX)
751 status |= VELOCITY_SPEED_100;
752 else if (ANAR & ANAR_10FD)
753 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
754 else
755 status |= (VELOCITY_SPEED_10);
1da177e4
LT
756 }
757
2cf71d2e
DJ
758 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
759 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
760 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
761 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
762 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
763 status |= VELOCITY_AUTONEG_ENABLE;
764 }
1da177e4 765 }
1da177e4 766
2cf71d2e
DJ
767 return status;
768}
39a11bd9 769
1da177e4 770/**
2cf71d2e
DJ
771 * velocity_mii_write - write MII data
772 * @regs: velocity registers
773 * @index: MII register index
774 * @data: 16bit data for the MII register
1da177e4 775 *
2cf71d2e
DJ
776 * Perform a single write to an MII 16bit register. Returns zero
777 * on success or -ETIMEDOUT if the PHY did not respond.
1da177e4 778 */
2cf71d2e 779static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
1da177e4 780{
2cf71d2e 781 u16 ww;
1da177e4 782
2cf71d2e
DJ
783 /*
784 * Disable MIICR_MAUTO, so that mii addr can be set normally
e54f4893 785 */
2cf71d2e 786 safe_disable_mii_autopoll(regs);
1da177e4 787
2cf71d2e
DJ
788 /* MII reg offset */
789 writeb(mii_addr, &regs->MIIADR);
790 /* set MII data */
791 writew(data, &regs->MIIDATA);
792
793 /* turn on MIICR_WCMD */
794 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
795
796 /* W_MAX_TIMEOUT is the timeout period */
797 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
798 udelay(5);
799 if (!(readb(&regs->MIICR) & MIICR_WCMD))
800 break;
1da177e4 801 }
2cf71d2e 802 enable_mii_autopoll(regs);
6aa20a22 803
2cf71d2e
DJ
804 if (ww == W_MAX_TIMEOUT)
805 return -ETIMEDOUT;
806 return 0;
807}
6aa20a22 808
2cf71d2e
DJ
809/**
810 * set_mii_flow_control - flow control setup
811 * @vptr: velocity interface
812 *
813 * Set up the flow control on this interface according to
814 * the supplied user/eeprom options.
815 */
816static void set_mii_flow_control(struct velocity_info *vptr)
817{
818 /*Enable or Disable PAUSE in ANAR */
819 switch (vptr->options.flow_cntl) {
820 case FLOW_CNTL_TX:
821 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
822 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
823 break;
1da177e4 824
2cf71d2e
DJ
825 case FLOW_CNTL_RX:
826 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
827 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
828 break;
1da177e4 829
2cf71d2e
DJ
830 case FLOW_CNTL_TX_RX:
831 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
832 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
833 break;
1da177e4 834
2cf71d2e
DJ
835 case FLOW_CNTL_DISABLE:
836 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
837 MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
838 break;
839 default:
840 break;
841 }
842}
1da177e4 843
2cf71d2e
DJ
844/**
845 * mii_set_auto_on - autonegotiate on
846 * @vptr: velocity
847 *
848 * Enable autonegotation on this interface
849 */
850static void mii_set_auto_on(struct velocity_info *vptr)
851{
852 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
853 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
854 else
855 MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
856}
1da177e4 857
2cf71d2e
DJ
858static u32 check_connection_type(struct mac_regs __iomem *regs)
859{
860 u32 status = 0;
861 u8 PHYSR0;
862 u16 ANAR;
863 PHYSR0 = readb(&regs->PHYSR0);
1da177e4 864
2cf71d2e
DJ
865 /*
866 if (!(PHYSR0 & PHYSR0_LINKGD))
867 status|=VELOCITY_LINK_FAIL;
868 */
1da177e4 869
2cf71d2e
DJ
870 if (PHYSR0 & PHYSR0_FDPX)
871 status |= VELOCITY_DUPLEX_FULL;
1da177e4 872
2cf71d2e
DJ
873 if (PHYSR0 & PHYSR0_SPDG)
874 status |= VELOCITY_SPEED_1000;
875 else if (PHYSR0 & PHYSR0_SPD10)
876 status |= VELOCITY_SPEED_10;
877 else
878 status |= VELOCITY_SPEED_100;
1da177e4 879
2cf71d2e
DJ
880 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
881 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
882 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
883 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
884 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
885 status |= VELOCITY_AUTONEG_ENABLE;
886 }
1da177e4
LT
887 }
888
2cf71d2e
DJ
889 return status;
890}
1da177e4 891
1da177e4 892
1da177e4 893
2cf71d2e
DJ
894/**
895 * velocity_set_media_mode - set media mode
896 * @mii_status: old MII link state
897 *
898 * Check the media link state and configure the flow control
899 * PHY and also velocity hardware setup accordingly. In particular
900 * we need to set up CD polling and frame bursting.
901 */
902static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
903{
904 u32 curr_status;
905 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4 906
2cf71d2e
DJ
907 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
908 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
07b5f6a6 909
2cf71d2e
DJ
910 /* Set mii link status */
911 set_mii_flow_control(vptr);
1da177e4 912
6aa20a22 913 /*
2cf71d2e
DJ
914 Check if new status is consisent with current status
915 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE)
916 || (mii_status==curr_status)) {
917 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
918 vptr->mii_status=check_connection_type(vptr->mac_regs);
919 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
920 return 0;
921 }
1da177e4 922 */
6aa20a22 923
2cf71d2e
DJ
924 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
925 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
1da177e4
LT
926
927 /*
2cf71d2e 928 * If connection type is AUTO
1da177e4 929 */
2cf71d2e
DJ
930 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
931 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
932 /* clear force MAC mode bit */
933 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
934 /* set duplex mode of MAC according to duplex mode of MII */
935 MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs);
936 MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
937 MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs);
6aa20a22 938
2cf71d2e
DJ
939 /* enable AUTO-NEGO mode */
940 mii_set_auto_on(vptr);
941 } else {
942 u16 ANAR;
943 u8 CHIPGCR;
1da177e4 944
2cf71d2e
DJ
945 /*
946 * 1. if it's 3119, disable frame bursting in halfduplex mode
947 * and enable it in fullduplex mode
948 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
949 * 3. only enable CD heart beat counter in 10HD mode
950 */
1da177e4 951
2cf71d2e
DJ
952 /* set force MAC mode bit */
953 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
1da177e4 954
2cf71d2e
DJ
955 CHIPGCR = readb(&regs->CHIPGCR);
956 CHIPGCR &= ~CHIPGCR_FCGMII;
501e4d24 957
2cf71d2e
DJ
958 if (mii_status & VELOCITY_DUPLEX_FULL) {
959 CHIPGCR |= CHIPGCR_FCFDX;
960 writeb(CHIPGCR, &regs->CHIPGCR);
961 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
962 if (vptr->rev_id < REV_ID_VT3216_A0)
963 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
964 } else {
965 CHIPGCR &= ~CHIPGCR_FCFDX;
966 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
967 writeb(CHIPGCR, &regs->CHIPGCR);
968 if (vptr->rev_id < REV_ID_VT3216_A0)
969 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
970 }
1da177e4 971
2cf71d2e 972 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
1da177e4 973
2cf71d2e
DJ
974 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10))
975 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
976 else
977 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1da177e4 978
2cf71d2e
DJ
979 /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
980 velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
981 ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
982 if (mii_status & VELOCITY_SPEED_100) {
983 if (mii_status & VELOCITY_DUPLEX_FULL)
984 ANAR |= ANAR_TXFD;
985 else
986 ANAR |= ANAR_TX;
987 } else {
988 if (mii_status & VELOCITY_DUPLEX_FULL)
989 ANAR |= ANAR_10FD;
990 else
991 ANAR |= ANAR_10;
992 }
993 velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
994 /* enable AUTO-NEGO mode */
995 mii_set_auto_on(vptr);
996 /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
d3b238a0 997 }
2cf71d2e
DJ
998 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
999 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
1000 return VELOCITY_LINK_CHANGE;
1001}
8a22dddb 1002
2cf71d2e
DJ
1003/**
1004 * velocity_print_link_status - link status reporting
1005 * @vptr: velocity to report on
1006 *
1007 * Turn the link status of the velocity card into a kernel log
1008 * description of the new link state, detailing speed and duplex
1009 * status
1010 */
1011static void velocity_print_link_status(struct velocity_info *vptr)
1012{
6aa20a22 1013
2cf71d2e
DJ
1014 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1015 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1016 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1017 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
6aa20a22 1018
2cf71d2e
DJ
1019 if (vptr->mii_status & VELOCITY_SPEED_1000)
1020 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1021 else if (vptr->mii_status & VELOCITY_SPEED_100)
1022 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1023 else
1024 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1da177e4 1025
2cf71d2e
DJ
1026 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1027 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1028 else
1029 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1030 } else {
1031 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1032 switch (vptr->options.spd_dpx) {
1033 case SPD_DPX_100_HALF:
1034 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1035 break;
1036 case SPD_DPX_100_FULL:
1037 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1038 break;
1039 case SPD_DPX_10_HALF:
1040 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1041 break;
1042 case SPD_DPX_10_FULL:
1043 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1044 break;
1045 default:
1046 break;
1047 }
1da177e4 1048 }
1da177e4
LT
1049}
1050
1051/**
2cf71d2e
DJ
1052 * enable_flow_control_ability - flow control
1053 * @vptr: veloity to configure
1da177e4 1054 *
2cf71d2e
DJ
1055 * Set up flow control according to the flow control options
1056 * determined by the eeprom/configuration.
1da177e4 1057 */
2cf71d2e 1058static void enable_flow_control_ability(struct velocity_info *vptr)
1da177e4 1059{
1da177e4 1060
2cf71d2e 1061 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4 1062
2cf71d2e 1063 switch (vptr->options.flow_cntl) {
1da177e4 1064
2cf71d2e
DJ
1065 case FLOW_CNTL_DEFAULT:
1066 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
1067 writel(CR0_FDXRFCEN, &regs->CR0Set);
1068 else
1069 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1070
1071 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
1072 writel(CR0_FDXTFCEN, &regs->CR0Set);
1073 else
1074 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1075 break;
1076
1077 case FLOW_CNTL_TX:
1078 writel(CR0_FDXTFCEN, &regs->CR0Set);
1079 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1080 break;
1081
1082 case FLOW_CNTL_RX:
1083 writel(CR0_FDXRFCEN, &regs->CR0Set);
1084 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1085 break;
1086
1087 case FLOW_CNTL_TX_RX:
1088 writel(CR0_FDXTFCEN, &regs->CR0Set);
1089 writel(CR0_FDXRFCEN, &regs->CR0Set);
1090 break;
1091
1092 case FLOW_CNTL_DISABLE:
1093 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1094 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1095 break;
1096
1097 default:
1098 break;
1099 }
1da177e4 1100
1da177e4
LT
1101}
1102
1103/**
2cf71d2e
DJ
1104 * velocity_soft_reset - soft reset
1105 * @vptr: velocity to reset
1da177e4 1106 *
2cf71d2e
DJ
1107 * Kick off a soft reset of the velocity adapter and then poll
1108 * until the reset sequence has completed before returning.
1da177e4 1109 */
2cf71d2e 1110static int velocity_soft_reset(struct velocity_info *vptr)
1da177e4 1111{
2cf71d2e
DJ
1112 struct mac_regs __iomem *regs = vptr->mac_regs;
1113 int i = 0;
6aa20a22 1114
2cf71d2e 1115 writel(CR0_SFRST, &regs->CR0Set);
1da177e4 1116
2cf71d2e
DJ
1117 for (i = 0; i < W_MAX_TIMEOUT; i++) {
1118 udelay(5);
1119 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
1120 break;
1da177e4
LT
1121 }
1122
2cf71d2e
DJ
1123 if (i == W_MAX_TIMEOUT) {
1124 writel(CR0_FORSRST, &regs->CR0Set);
1125 /* FIXME: PCI POSTING */
1126 /* delay 2ms */
1127 mdelay(2);
1da177e4 1128 }
1da177e4
LT
1129 return 0;
1130}
1131
1132/**
2cf71d2e
DJ
1133 * velocity_set_multi - filter list change callback
1134 * @dev: network device
1da177e4 1135 *
2cf71d2e
DJ
1136 * Called by the network layer when the filter lists need to change
1137 * for a velocity adapter. Reload the CAMs with the new address
1138 * filter ruleset.
1da177e4 1139 */
2cf71d2e 1140static void velocity_set_multi(struct net_device *dev)
1da177e4 1141{
2cf71d2e 1142 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 1143 struct mac_regs __iomem *regs = vptr->mac_regs;
2cf71d2e
DJ
1144 u8 rx_mode;
1145 int i;
1146 struct dev_mc_list *mclist;
1da177e4 1147
2cf71d2e
DJ
1148 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1149 writel(0xffffffff, &regs->MARCAM[0]);
1150 writel(0xffffffff, &regs->MARCAM[4]);
1151 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
1152 } else if ((dev->mc_count > vptr->multicast_limit)
1153 || (dev->flags & IFF_ALLMULTI)) {
1154 writel(0xffffffff, &regs->MARCAM[0]);
1155 writel(0xffffffff, &regs->MARCAM[4]);
1156 rx_mode = (RCR_AM | RCR_AB);
1157 } else {
1158 int offset = MCAM_SIZE - vptr->multicast_limit;
1159 mac_get_cam_mask(regs, vptr->mCAMmask);
1da177e4 1160
2cf71d2e
DJ
1161 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
1162 mac_set_cam(regs, i + offset, mclist->dmi_addr);
1163 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
1da177e4 1164 }
1da177e4 1165
2cf71d2e
DJ
1166 mac_set_cam_mask(regs, vptr->mCAMmask);
1167 rx_mode = RCR_AM | RCR_AB | RCR_AP;
1da177e4 1168 }
2cf71d2e
DJ
1169 if (dev->mtu > 1500)
1170 rx_mode |= RCR_AL;
1da177e4 1171
2cf71d2e 1172 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
1da177e4 1173
9088d9a4
FR
1174}
1175
2cf71d2e
DJ
1176/*
1177 * MII access , media link mode setting functions
1da177e4
LT
1178 */
1179
1da177e4 1180/**
2cf71d2e
DJ
1181 * mii_init - set up MII
1182 * @vptr: velocity adapter
1183 * @mii_status: links tatus
1da177e4 1184 *
2cf71d2e 1185 * Set up the PHY for the current link state.
1da177e4 1186 */
2cf71d2e 1187static void mii_init(struct velocity_info *vptr, u32 mii_status)
1da177e4 1188{
2cf71d2e 1189 u16 BMCR;
1da177e4 1190
2cf71d2e
DJ
1191 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
1192 case PHYID_CICADA_CS8201:
1193 /*
1194 * Reset to hardware default
1195 */
1196 MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
1197 /*
1198 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1199 * off it in NWay-forced half mode for NWay-forced v.s.
1200 * legacy-forced issue.
1201 */
1202 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1203 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
1204 else
1205 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
1206 /*
1207 * Turn on Link/Activity LED enable bit for CIS8201
1208 */
1209 MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
1210 break;
1211 case PHYID_VT3216_32BIT:
1212 case PHYID_VT3216_64BIT:
1213 /*
1214 * Reset to hardware default
1215 */
1216 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
1217 /*
1218 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1219 * off it in NWay-forced half mode for NWay-forced v.s.
1220 * legacy-forced issue
1221 */
1222 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1223 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
1224 else
1225 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
1226 break;
1da177e4 1227
2cf71d2e
DJ
1228 case PHYID_MARVELL_1000:
1229 case PHYID_MARVELL_1000S:
1230 /*
1231 * Assert CRS on Transmit
1232 */
1233 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
1234 /*
1235 * Reset to hardware default
1236 */
1237 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
1238 break;
1239 default:
1240 ;
1241 }
1242 velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
1243 if (BMCR & BMCR_ISO) {
1244 BMCR &= ~BMCR_ISO;
1245 velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
1da177e4 1246 }
1da177e4
LT
1247}
1248
2cf71d2e 1249
1da177e4 1250/**
2cf71d2e
DJ
1251 * velocity_init_registers - initialise MAC registers
1252 * @vptr: velocity to init
1253 * @type: type of initialisation (hot or cold)
1da177e4 1254 *
2cf71d2e
DJ
1255 * Initialise the MAC on a reset or on first set up on the
1256 * hardware.
1da177e4 1257 */
2cf71d2e
DJ
1258static void velocity_init_registers(struct velocity_info *vptr,
1259 enum velocity_init_type type)
1da177e4 1260{
2cf71d2e
DJ
1261 struct mac_regs __iomem *regs = vptr->mac_regs;
1262 int i, mii_status;
1da177e4 1263
2cf71d2e 1264 mac_wol_reset(regs);
1da177e4 1265
2cf71d2e
DJ
1266 switch (type) {
1267 case VELOCITY_INIT_RESET:
1268 case VELOCITY_INIT_WOL:
1da177e4 1269
2cf71d2e 1270 netif_stop_queue(vptr->dev);
6aa20a22 1271
2cf71d2e
DJ
1272 /*
1273 * Reset RX to prevent RX pointer not on the 4X location
1274 */
1275 velocity_rx_reset(vptr);
1276 mac_rx_queue_run(regs);
1277 mac_rx_queue_wake(regs);
6aa20a22 1278
2cf71d2e
DJ
1279 mii_status = velocity_get_opt_media_mode(vptr);
1280 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1281 velocity_print_link_status(vptr);
1282 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
1283 netif_wake_queue(vptr->dev);
1da177e4 1284 }
1da177e4 1285
2cf71d2e 1286 enable_flow_control_ability(vptr);
1da177e4 1287
2cf71d2e
DJ
1288 mac_clear_isr(regs);
1289 writel(CR0_STOP, &regs->CR0Clr);
1290 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1291 &regs->CR0Set);
6aa20a22 1292
2cf71d2e 1293 break;
1da177e4 1294
2cf71d2e
DJ
1295 case VELOCITY_INIT_COLD:
1296 default:
1297 /*
1298 * Do reset
1299 */
1300 velocity_soft_reset(vptr);
1301 mdelay(5);
1da177e4 1302
2cf71d2e
DJ
1303 mac_eeprom_reload(regs);
1304 for (i = 0; i < 6; i++)
1305 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
1da177e4 1306
2cf71d2e
DJ
1307 /*
1308 * clear Pre_ACPI bit.
1309 */
1310 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
1311 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
1312 mac_set_dma_length(regs, vptr->options.DMA_length);
1da177e4 1313
2cf71d2e
DJ
1314 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
1315 /*
1316 * Back off algorithm use original IEEE standard
1317 */
1318 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
1da177e4
LT
1319
1320 /*
2cf71d2e 1321 * Init CAM filter
1da177e4 1322 */
2cf71d2e 1323 velocity_init_cam_filter(vptr);
1da177e4 1324
2cf71d2e
DJ
1325 /*
1326 * Set packet filter: Receive directed and broadcast address
1327 */
1328 velocity_set_multi(vptr->dev);
1da177e4 1329
2cf71d2e
DJ
1330 /*
1331 * Enable MII auto-polling
1332 */
1333 enable_mii_autopoll(regs);
1da177e4 1334
2cf71d2e 1335 vptr->int_mask = INT_MASK_DEF;
1da177e4 1336
2cf71d2e
DJ
1337 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1338 writew(vptr->options.numrx - 1, &regs->RDCSize);
1339 mac_rx_queue_run(regs);
1340 mac_rx_queue_wake(regs);
1da177e4 1341
2cf71d2e 1342 writew(vptr->options.numtx - 1, &regs->TDCSize);
1da177e4 1343
2cf71d2e
DJ
1344 for (i = 0; i < vptr->tx.numq; i++) {
1345 writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
1346 mac_tx_queue_run(regs, i);
1347 }
1da177e4 1348
2cf71d2e 1349 init_flow_control_register(vptr);
6aa20a22 1350
2cf71d2e
DJ
1351 writel(CR0_STOP, &regs->CR0Clr);
1352 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
1da177e4 1353
2cf71d2e
DJ
1354 mii_status = velocity_get_opt_media_mode(vptr);
1355 netif_stop_queue(vptr->dev);
1da177e4 1356
2cf71d2e 1357 mii_init(vptr, mii_status);
1da177e4 1358
2cf71d2e
DJ
1359 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1360 velocity_print_link_status(vptr);
1361 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
1362 netif_wake_queue(vptr->dev);
1da177e4 1363 }
6aa20a22 1364
2cf71d2e
DJ
1365 enable_flow_control_ability(vptr);
1366 mac_hw_mibs_init(regs);
1367 mac_write_int_mask(vptr->int_mask, regs);
1368 mac_clear_isr(regs);
1369
1da177e4 1370 }
1da177e4
LT
1371}
1372
2cf71d2e 1373static void velocity_give_many_rx_descs(struct velocity_info *vptr)
1da177e4 1374{
2cf71d2e
DJ
1375 struct mac_regs __iomem *regs = vptr->mac_regs;
1376 int avail, dirty, unusable;
1377
1378 /*
1379 * RD number must be equal to 4X per hardware spec
1380 * (programming guide rev 1.20, p.13)
1381 */
1382 if (vptr->rx.filled < 4)
1383 return;
1384
1385 wmb();
1386
1387 unusable = vptr->rx.filled & 0x0003;
1388 dirty = vptr->rx.dirty - unusable;
1389 for (avail = vptr->rx.filled & 0xfffc; avail; avail--) {
1390 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
1391 vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1da177e4 1392 }
2cf71d2e
DJ
1393
1394 writew(vptr->rx.filled & 0xfffc, &regs->RBRDU);
1395 vptr->rx.filled = unusable;
1da177e4
LT
1396}
1397
1398/**
2cf71d2e
DJ
1399 * velocity_init_dma_rings - set up DMA rings
1400 * @vptr: Velocity to set up
6aa20a22 1401 *
2cf71d2e
DJ
1402 * Allocate PCI mapped DMA rings for the receive and transmit layer
1403 * to use.
1da177e4 1404 */
2cf71d2e 1405static int velocity_init_dma_rings(struct velocity_info *vptr)
1da177e4 1406{
2cf71d2e
DJ
1407 struct velocity_opt *opt = &vptr->options;
1408 const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
1409 const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
1410 struct pci_dev *pdev = vptr->pdev;
1411 dma_addr_t pool_dma;
1412 void *pool;
1413 unsigned int i;
1da177e4
LT
1414
1415 /*
2cf71d2e
DJ
1416 * Allocate all RD/TD rings a single pool.
1417 *
1418 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1419 * alignment
1da177e4 1420 */
2cf71d2e
DJ
1421 pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq +
1422 rx_ring_size, &pool_dma);
1423 if (!pool) {
1424 dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
1425 vptr->dev->name);
1426 return -ENOMEM;
1da177e4
LT
1427 }
1428
2cf71d2e
DJ
1429 vptr->rx.ring = pool;
1430 vptr->rx.pool_dma = pool_dma;
1da177e4 1431
2cf71d2e
DJ
1432 pool += rx_ring_size;
1433 pool_dma += rx_ring_size;
d4f73c8e 1434
2cf71d2e
DJ
1435 for (i = 0; i < vptr->tx.numq; i++) {
1436 vptr->tx.rings[i] = pool;
1437 vptr->tx.pool_dma[i] = pool_dma;
1438 pool += tx_ring_size;
1439 pool_dma += tx_ring_size;
1440 }
1da177e4
LT
1441
1442 return 0;
1443}
1444
2cf71d2e
DJ
1445static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
1446{
1447 vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
1448}
1449
1da177e4
LT
1450/**
1451 * velocity_alloc_rx_buf - allocate aligned receive buffer
1452 * @vptr: velocity
1453 * @idx: ring index
1454 *
1455 * Allocate a new full sized buffer for the reception of a frame and
1456 * map it into PCI space for the hardware to use. The hardware
1457 * requires *64* byte alignment of the buffer which makes life
1458 * less fun than would be ideal.
1459 */
1da177e4
LT
1460static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1461{
0fe9f15e
FR
1462 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1463 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1da177e4 1464
0fe9f15e 1465 rd_info->skb = dev_alloc_skb(vptr->rx.buf_sz + 64);
1da177e4
LT
1466 if (rd_info->skb == NULL)
1467 return -ENOMEM;
1468
1469 /*
1470 * Do the gymnastics to get the buffer head for data at
1471 * 64byte alignment.
1472 */
689be439 1473 skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63);
0fe9f15e
FR
1474 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data,
1475 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
6aa20a22 1476
1da177e4
LT
1477 /*
1478 * Fill in the descriptor to match
0fe9f15e 1479 */
6aa20a22 1480
1da177e4 1481 *((u32 *) & (rd->rdesc0)) = 0;
0fe9f15e 1482 rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN;
1da177e4
LT
1483 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1484 rd->pa_high = 0;
1485 return 0;
1486}
1487
6aa20a22 1488
2cf71d2e 1489static int velocity_rx_refill(struct velocity_info *vptr)
1da177e4 1490{
2cf71d2e 1491 int dirty = vptr->rx.dirty, done = 0;
1da177e4 1492
2cf71d2e
DJ
1493 do {
1494 struct rx_desc *rd = vptr->rx.ring + dirty;
1da177e4 1495
2cf71d2e
DJ
1496 /* Fine for an all zero Rx desc at init time as well */
1497 if (rd->rdesc0.len & OWNED_BY_NIC)
1498 break;
1da177e4 1499
2cf71d2e
DJ
1500 if (!vptr->rx.info[dirty].skb) {
1501 if (velocity_alloc_rx_buf(vptr, dirty) < 0)
1da177e4 1502 break;
1da177e4 1503 }
2cf71d2e
DJ
1504 done++;
1505 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1506 } while (dirty != vptr->rx.curr);
1da177e4 1507
2cf71d2e
DJ
1508 if (done) {
1509 vptr->rx.dirty = dirty;
1510 vptr->rx.filled += done;
1da177e4 1511 }
2cf71d2e
DJ
1512
1513 return done;
1da177e4
LT
1514}
1515
1516/**
2cf71d2e
DJ
1517 * velocity_free_rd_ring - free receive ring
1518 * @vptr: velocity to clean up
1da177e4 1519 *
2cf71d2e
DJ
1520 * Free the receive buffers for each ring slot and any
1521 * attached socket buffers that need to go away.
1da177e4 1522 */
2cf71d2e 1523static void velocity_free_rd_ring(struct velocity_info *vptr)
1da177e4 1524{
2cf71d2e 1525 int i;
1da177e4 1526
2cf71d2e
DJ
1527 if (vptr->rx.info == NULL)
1528 return;
6aa20a22 1529
2cf71d2e
DJ
1530 for (i = 0; i < vptr->options.numrx; i++) {
1531 struct velocity_rd_info *rd_info = &(vptr->rx.info[i]);
1532 struct rx_desc *rd = vptr->rx.ring + i;
1da177e4 1533
2cf71d2e 1534 memset(rd, 0, sizeof(*rd));
1da177e4 1535
2cf71d2e
DJ
1536 if (!rd_info->skb)
1537 continue;
1538 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
1539 PCI_DMA_FROMDEVICE);
1540 rd_info->skb_dma = 0;
6aa20a22 1541
2cf71d2e
DJ
1542 dev_kfree_skb(rd_info->skb);
1543 rd_info->skb = NULL;
1da177e4
LT
1544 }
1545
2cf71d2e
DJ
1546 kfree(vptr->rx.info);
1547 vptr->rx.info = NULL;
1548}
1da177e4 1549
1da177e4 1550
1da177e4 1551
2cf71d2e
DJ
1552/**
1553 * velocity_init_rd_ring - set up receive ring
1554 * @vptr: velocity to configure
1555 *
1556 * Allocate and set up the receive buffers for each ring slot and
1557 * assign them to the network adapter.
1558 */
1559static int velocity_init_rd_ring(struct velocity_info *vptr)
1560{
1561 int ret = -ENOMEM;
1da177e4 1562
2cf71d2e
DJ
1563 vptr->rx.info = kcalloc(vptr->options.numrx,
1564 sizeof(struct velocity_rd_info), GFP_KERNEL);
1565 if (!vptr->rx.info)
1566 goto out;
6aa20a22 1567
2cf71d2e 1568 velocity_init_rx_ring_indexes(vptr);
1da177e4 1569
2cf71d2e
DJ
1570 if (velocity_rx_refill(vptr) != vptr->options.numrx) {
1571 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1572 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1573 velocity_free_rd_ring(vptr);
1574 goto out;
1575 }
1da177e4 1576
2cf71d2e
DJ
1577 ret = 0;
1578out:
1579 return ret;
1da177e4
LT
1580}
1581
1582/**
2cf71d2e
DJ
1583 * velocity_init_td_ring - set up transmit ring
1584 * @vptr: velocity
1da177e4 1585 *
2cf71d2e
DJ
1586 * Set up the transmit ring and chain the ring pointers together.
1587 * Returns zero on success or a negative posix errno code for
1588 * failure.
1da177e4 1589 */
2cf71d2e 1590static int velocity_init_td_ring(struct velocity_info *vptr)
1da177e4 1591{
2cf71d2e
DJ
1592 dma_addr_t curr;
1593 int j;
1da177e4 1594
2cf71d2e
DJ
1595 /* Init the TD ring entries */
1596 for (j = 0; j < vptr->tx.numq; j++) {
1597 curr = vptr->tx.pool_dma[j];
1da177e4 1598
2cf71d2e
DJ
1599 vptr->tx.infos[j] = kcalloc(vptr->options.numtx,
1600 sizeof(struct velocity_td_info),
1601 GFP_KERNEL);
1602 if (!vptr->tx.infos[j]) {
1603 while (--j >= 0)
1604 kfree(vptr->tx.infos[j]);
1605 return -ENOMEM;
1da177e4 1606 }
2cf71d2e
DJ
1607
1608 vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0;
1da177e4 1609 }
2cf71d2e
DJ
1610 return 0;
1611}
1612
1613/**
1614 * velocity_free_dma_rings - free PCI ring pointers
1615 * @vptr: Velocity to free from
1616 *
1617 * Clean up the PCI ring buffers allocated to this velocity.
1618 */
1619static void velocity_free_dma_rings(struct velocity_info *vptr)
1620{
1621 const int size = vptr->options.numrx * sizeof(struct rx_desc) +
1622 vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq;
1623
1624 pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma);
1da177e4
LT
1625}
1626
2cf71d2e 1627
3c4dc711
FR
1628static int velocity_init_rings(struct velocity_info *vptr, int mtu)
1629{
1630 int ret;
1631
1632 velocity_set_rxbufsize(vptr, mtu);
1633
1634 ret = velocity_init_dma_rings(vptr);
1635 if (ret < 0)
1636 goto out;
1637
1638 ret = velocity_init_rd_ring(vptr);
1639 if (ret < 0)
1640 goto err_free_dma_rings_0;
1641
1642 ret = velocity_init_td_ring(vptr);
1643 if (ret < 0)
1644 goto err_free_rd_ring_1;
1645out:
1646 return ret;
1647
1648err_free_rd_ring_1:
1649 velocity_free_rd_ring(vptr);
1650err_free_dma_rings_0:
1651 velocity_free_dma_rings(vptr);
1652 goto out;
1653}
1654
1da177e4 1655/**
2cf71d2e
DJ
1656 * velocity_free_tx_buf - free transmit buffer
1657 * @vptr: velocity
1658 * @tdinfo: buffer
1da177e4 1659 *
2cf71d2e
DJ
1660 * Release an transmit buffer. If the buffer was preallocated then
1661 * recycle it, if not then unmap the buffer.
1da177e4 1662 */
2cf71d2e 1663static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo)
1da177e4 1664{
2cf71d2e
DJ
1665 struct sk_buff *skb = tdinfo->skb;
1666 int i;
1667 int pktlen;
28133176 1668
2cf71d2e
DJ
1669 /*
1670 * Don't unmap the pre-allocated tx_bufs
1671 */
1672 if (tdinfo->skb_dma) {
1da177e4 1673
2cf71d2e
DJ
1674 pktlen = max_t(unsigned int, skb->len, ETH_ZLEN);
1675 for (i = 0; i < tdinfo->nskb_dma; i++) {
1676 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], pktlen, PCI_DMA_TODEVICE);
1677 tdinfo->skb_dma[i] = 0;
1678 }
1da177e4 1679 }
2cf71d2e
DJ
1680 dev_kfree_skb_irq(skb);
1681 tdinfo->skb = NULL;
1da177e4
LT
1682}
1683
6aa20a22 1684
2cf71d2e
DJ
1685/*
1686 * FIXME: could we merge this with velocity_free_tx_buf ?
1687 */
1688static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1689 int q, int n)
1da177e4 1690{
2cf71d2e
DJ
1691 struct velocity_td_info *td_info = &(vptr->tx.infos[q][n]);
1692 int i;
bd7b3f34 1693
2cf71d2e
DJ
1694 if (td_info == NULL)
1695 return;
3c4dc711 1696
2cf71d2e
DJ
1697 if (td_info->skb) {
1698 for (i = 0; i < td_info->nskb_dma; i++) {
1699 if (td_info->skb_dma[i]) {
1700 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1701 td_info->skb->len, PCI_DMA_TODEVICE);
1702 td_info->skb_dma[i] = 0;
1703 }
3c4dc711 1704 }
2cf71d2e
DJ
1705 dev_kfree_skb(td_info->skb);
1706 td_info->skb = NULL;
3c4dc711 1707 }
1da177e4
LT
1708}
1709
1710/**
2cf71d2e
DJ
1711 * velocity_free_td_ring - free td ring
1712 * @vptr: velocity
1da177e4 1713 *
2cf71d2e
DJ
1714 * Free up the transmit ring for this particular velocity adapter.
1715 * We free the ring contents but not the ring itself.
1716 */
1717static void velocity_free_td_ring(struct velocity_info *vptr)
1718{
1719 int i, j;
1da177e4 1720
2cf71d2e
DJ
1721 for (j = 0; j < vptr->tx.numq; j++) {
1722 if (vptr->tx.infos[j] == NULL)
1723 continue;
1724 for (i = 0; i < vptr->options.numtx; i++)
1725 velocity_free_td_ring_entry(vptr, j, i);
6aa20a22 1726
2cf71d2e
DJ
1727 kfree(vptr->tx.infos[j]);
1728 vptr->tx.infos[j] = NULL;
1729 }
1730}
6aa20a22 1731
1da177e4 1732
2cf71d2e
DJ
1733static void velocity_free_rings(struct velocity_info *vptr)
1734{
1735 velocity_free_td_ring(vptr);
1736 velocity_free_rd_ring(vptr);
1737 velocity_free_dma_rings(vptr);
1da177e4
LT
1738}
1739
1740/**
2cf71d2e
DJ
1741 * velocity_error - handle error from controller
1742 * @vptr: velocity
1743 * @status: card status
1744 *
1745 * Process an error report from the hardware and attempt to recover
1746 * the card itself. At the moment we cannot recover from some
1747 * theoretically impossible errors but this could be fixed using
1748 * the pci_device_failed logic to bounce the hardware
1da177e4 1749 *
1da177e4 1750 */
2cf71d2e 1751static void velocity_error(struct velocity_info *vptr, int status)
1da177e4 1752{
580a6902 1753
2cf71d2e
DJ
1754 if (status & ISR_TXSTLI) {
1755 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4 1756
2cf71d2e
DJ
1757 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1758 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1759 writew(TRDCSR_RUN, &regs->TDCSRClr);
1760 netif_stop_queue(vptr->dev);
1da177e4 1761
2cf71d2e
DJ
1762 /* FIXME: port over the pci_device_failed code and use it
1763 here */
1764 }
1da177e4 1765
2cf71d2e
DJ
1766 if (status & ISR_SRCI) {
1767 struct mac_regs __iomem *regs = vptr->mac_regs;
1768 int linked;
1da177e4 1769
2cf71d2e
DJ
1770 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1771 vptr->mii_status = check_connection_type(regs);
1da177e4 1772
2cf71d2e
DJ
1773 /*
1774 * If it is a 3119, disable frame bursting in
1775 * halfduplex mode and enable it in fullduplex
1776 * mode
1777 */
1778 if (vptr->rev_id < REV_ID_VT3216_A0) {
0527a1a8 1779 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2cf71d2e
DJ
1780 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1781 else
1782 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1783 }
1784 /*
1785 * Only enable CD heart beat counter in 10HD mode
1786 */
1787 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10))
1788 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1789 else
1790 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1791 }
1792 /*
1793 * Get link status from PHYSR0
1794 */
1795 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1da177e4 1796
2cf71d2e
DJ
1797 if (linked) {
1798 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
1799 netif_carrier_on(vptr->dev);
1800 } else {
1801 vptr->mii_status |= VELOCITY_LINK_FAIL;
1802 netif_carrier_off(vptr->dev);
1803 }
1da177e4 1804
2cf71d2e
DJ
1805 velocity_print_link_status(vptr);
1806 enable_flow_control_ability(vptr);
1da177e4 1807
2cf71d2e
DJ
1808 /*
1809 * Re-enable auto-polling because SRCI will disable
1810 * auto-polling
1811 */
1da177e4 1812
2cf71d2e 1813 enable_mii_autopoll(regs);
1da177e4 1814
2cf71d2e
DJ
1815 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1816 netif_stop_queue(vptr->dev);
1817 else
1818 netif_wake_queue(vptr->dev);
1da177e4 1819
2cf71d2e
DJ
1820 };
1821 if (status & ISR_MIBFI)
1822 velocity_update_hw_mibs(vptr);
1823 if (status & ISR_LSTEI)
1824 mac_rx_queue_wake(vptr->mac_regs);
1da177e4
LT
1825}
1826
1827/**
2cf71d2e
DJ
1828 * tx_srv - transmit interrupt service
1829 * @vptr; Velocity
1830 * @status:
1da177e4 1831 *
2cf71d2e
DJ
1832 * Scan the queues looking for transmitted packets that
1833 * we can complete and clean up. Update any statistics as
1834 * necessary/
1da177e4 1835 */
2cf71d2e 1836static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1da177e4 1837{
2cf71d2e
DJ
1838 struct tx_desc *td;
1839 int qnum;
1840 int full = 0;
1841 int idx;
1842 int works = 0;
1843 struct velocity_td_info *tdinfo;
1844 struct net_device_stats *stats = &vptr->dev->stats;
1da177e4 1845
2cf71d2e
DJ
1846 for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
1847 for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
1848 idx = (idx + 1) % vptr->options.numtx) {
1da177e4 1849
2cf71d2e
DJ
1850 /*
1851 * Get Tx Descriptor
1852 */
1853 td = &(vptr->tx.rings[qnum][idx]);
1854 tdinfo = &(vptr->tx.infos[qnum][idx]);
1da177e4 1855
2cf71d2e
DJ
1856 if (td->tdesc0.len & OWNED_BY_NIC)
1857 break;
1da177e4 1858
2cf71d2e
DJ
1859 if ((works++ > 15))
1860 break;
1861
1862 if (td->tdesc0.TSR & TSR0_TERR) {
1863 stats->tx_errors++;
1864 stats->tx_dropped++;
1865 if (td->tdesc0.TSR & TSR0_CDH)
1866 stats->tx_heartbeat_errors++;
1867 if (td->tdesc0.TSR & TSR0_CRS)
1868 stats->tx_carrier_errors++;
1869 if (td->tdesc0.TSR & TSR0_ABT)
1870 stats->tx_aborted_errors++;
1871 if (td->tdesc0.TSR & TSR0_OWC)
1872 stats->tx_window_errors++;
1873 } else {
1874 stats->tx_packets++;
1875 stats->tx_bytes += tdinfo->skb->len;
1876 }
1877 velocity_free_tx_buf(vptr, tdinfo);
1878 vptr->tx.used[qnum]--;
1879 }
1880 vptr->tx.tail[qnum] = idx;
1da177e4 1881
2cf71d2e
DJ
1882 if (AVAIL_TD(vptr, qnum) < 1)
1883 full = 1;
1884 }
1da177e4 1885 /*
2cf71d2e
DJ
1886 * Look to see if we should kick the transmit network
1887 * layer for more work.
1da177e4 1888 */
2cf71d2e
DJ
1889 if (netif_queue_stopped(vptr->dev) && (full == 0)
1890 && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1891 netif_wake_queue(vptr->dev);
1892 }
1893 return works;
1894}
1895
1896/**
1897 * velocity_rx_csum - checksum process
1898 * @rd: receive packet descriptor
1899 * @skb: network layer packet buffer
1900 *
1901 * Process the status bits for the received packet and determine
1902 * if the checksum was computed and verified by the hardware
1903 */
1904static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1905{
1906 skb->ip_summed = CHECKSUM_NONE;
6aa20a22 1907
2cf71d2e
DJ
1908 if (rd->rdesc1.CSM & CSM_IPKT) {
1909 if (rd->rdesc1.CSM & CSM_IPOK) {
1910 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1911 (rd->rdesc1.CSM & CSM_UDPKT)) {
1912 if (!(rd->rdesc1.CSM & CSM_TUPOK))
1913 return;
1914 }
1915 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4
LT
1916 }
1917 }
1da177e4
LT
1918}
1919
1da177e4 1920/**
2cf71d2e
DJ
1921 * velocity_rx_copy - in place Rx copy for small packets
1922 * @rx_skb: network layer packet buffer candidate
1923 * @pkt_size: received data size
1924 * @rd: receive packet descriptor
1da177e4
LT
1925 * @dev: network device
1926 *
2cf71d2e
DJ
1927 * Replace the current skb that is scheduled for Rx processing by a
1928 * shorter, immediatly allocated skb, if the received packet is small
1929 * enough. This function returns a negative value if the received
1930 * packet is too big or if memory is exhausted.
1da177e4 1931 */
2cf71d2e
DJ
1932static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1933 struct velocity_info *vptr)
1da177e4 1934{
2cf71d2e
DJ
1935 int ret = -1;
1936 if (pkt_size < rx_copybreak) {
1937 struct sk_buff *new_skb;
1da177e4 1938
89d71a66 1939 new_skb = netdev_alloc_skb_ip_align(vptr->dev, pkt_size);
2cf71d2e
DJ
1940 if (new_skb) {
1941 new_skb->ip_summed = rx_skb[0]->ip_summed;
2cf71d2e
DJ
1942 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
1943 *rx_skb = new_skb;
1944 ret = 0;
1da177e4
LT
1945 }
1946
1da177e4 1947 }
2cf71d2e 1948 return ret;
1da177e4
LT
1949}
1950
1951/**
2cf71d2e
DJ
1952 * velocity_iph_realign - IP header alignment
1953 * @vptr: velocity we are handling
1954 * @skb: network layer packet buffer
1955 * @pkt_size: received data size
1da177e4 1956 *
2cf71d2e
DJ
1957 * Align IP header on a 2 bytes boundary. This behavior can be
1958 * configured by the user.
1da177e4 1959 */
2cf71d2e
DJ
1960static inline void velocity_iph_realign(struct velocity_info *vptr,
1961 struct sk_buff *skb, int pkt_size)
1da177e4 1962{
2cf71d2e
DJ
1963 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
1964 memmove(skb->data + 2, skb->data, pkt_size);
1965 skb_reserve(skb, 2);
1966 }
1967}
6aa20a22 1968
1da177e4 1969
2cf71d2e
DJ
1970/**
1971 * velocity_receive_frame - received packet processor
1972 * @vptr: velocity we are handling
1973 * @idx: ring index
1974 *
1975 * A packet has arrived. We process the packet and if appropriate
1976 * pass the frame up the network stack
1977 */
1978static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1979{
1980 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
1981 struct net_device_stats *stats = &vptr->dev->stats;
1982 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1983 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1984 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
1985 struct sk_buff *skb;
1da177e4 1986
2cf71d2e
DJ
1987 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
1988 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
1989 stats->rx_length_errors++;
1990 return -EINVAL;
1991 }
1da177e4 1992
2cf71d2e
DJ
1993 if (rd->rdesc0.RSR & RSR_MAR)
1994 stats->multicast++;
1da177e4 1995
2cf71d2e 1996 skb = rd_info->skb;
1da177e4 1997
2cf71d2e
DJ
1998 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
1999 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
1da177e4 2000
2cf71d2e
DJ
2001 /*
2002 * Drop frame not meeting IEEE 802.3
2003 */
1da177e4 2004
2cf71d2e
DJ
2005 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
2006 if (rd->rdesc0.RSR & RSR_RL) {
2007 stats->rx_length_errors++;
2008 return -EINVAL;
2009 }
2010 }
6aa20a22 2011
2cf71d2e 2012 pci_action = pci_dma_sync_single_for_device;
1da177e4 2013
2cf71d2e 2014 velocity_rx_csum(rd, skb);
6aa20a22 2015
2cf71d2e
DJ
2016 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
2017 velocity_iph_realign(vptr, skb, pkt_len);
2018 pci_action = pci_unmap_single;
2019 rd_info->skb = NULL;
2020 }
6aa20a22 2021
2cf71d2e
DJ
2022 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
2023 PCI_DMA_FROMDEVICE);
1da177e4 2024
2cf71d2e
DJ
2025 skb_put(skb, pkt_len - 4);
2026 skb->protocol = eth_type_trans(skb, vptr->dev);
2027
2028 if (vptr->vlgrp && (rd->rdesc0.RSR & RSR_DETAG)) {
2029 vlan_hwaccel_rx(skb, vptr->vlgrp,
2030 swab16(le16_to_cpu(rd->rdesc1.PQTAG)));
2031 } else
2032 netif_rx(skb);
6aa20a22 2033
2cf71d2e 2034 stats->rx_bytes += pkt_len;
6aa20a22 2035
2cf71d2e 2036 return 0;
1da177e4
LT
2037}
2038
1da177e4
LT
2039
2040/**
2cf71d2e
DJ
2041 * velocity_rx_srv - service RX interrupt
2042 * @vptr: velocity
2043 * @status: adapter status (unused)
1da177e4 2044 *
2cf71d2e
DJ
2045 * Walk the receive ring of the velocity adapter and remove
2046 * any received packets from the receive queue. Hand the ring
2047 * slots back to the adapter for reuse.
1da177e4 2048 */
2cf71d2e 2049static int velocity_rx_srv(struct velocity_info *vptr, int status)
1da177e4 2050{
2cf71d2e
DJ
2051 struct net_device_stats *stats = &vptr->dev->stats;
2052 int rd_curr = vptr->rx.curr;
2053 int works = 0;
2054
2055 do {
2056 struct rx_desc *rd = vptr->rx.ring + rd_curr;
2057
2058 if (!vptr->rx.info[rd_curr].skb)
2059 break;
2060
2061 if (rd->rdesc0.len & OWNED_BY_NIC)
2062 break;
2063
2064 rmb();
1da177e4 2065
2cf71d2e
DJ
2066 /*
2067 * Don't drop CE or RL error frame although RXOK is off
2068 */
2069 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
2070 if (velocity_receive_frame(vptr, rd_curr) < 0)
2071 stats->rx_dropped++;
2072 } else {
2073 if (rd->rdesc0.RSR & RSR_CRC)
2074 stats->rx_crc_errors++;
2075 if (rd->rdesc0.RSR & RSR_FAE)
2076 stats->rx_frame_errors++;
1da177e4 2077
2cf71d2e
DJ
2078 stats->rx_dropped++;
2079 }
6aa20a22 2080
2cf71d2e 2081 rd->size |= RX_INTEN;
1da177e4 2082
2cf71d2e
DJ
2083 rd_curr++;
2084 if (rd_curr >= vptr->options.numrx)
2085 rd_curr = 0;
2086 } while (++works <= 15);
1da177e4 2087
2cf71d2e 2088 vptr->rx.curr = rd_curr;
1da177e4 2089
2cf71d2e
DJ
2090 if ((works > 0) && (velocity_rx_refill(vptr) > 0))
2091 velocity_give_many_rx_descs(vptr);
2092
2093 VAR_USED(stats);
2094 return works;
2095}
6aa20a22
JG
2096
2097
1da177e4 2098/**
2cf71d2e
DJ
2099 * velocity_intr - interrupt callback
2100 * @irq: interrupt number
2101 * @dev_instance: interrupting device
1da177e4 2102 *
2cf71d2e
DJ
2103 * Called whenever an interrupt is generated by the velocity
2104 * adapter IRQ line. We may not be the source of the interrupt
2105 * and need to identify initially if we are, and if not exit as
2106 * efficiently as possible.
1da177e4 2107 */
2cf71d2e 2108static irqreturn_t velocity_intr(int irq, void *dev_instance)
1da177e4 2109{
2cf71d2e
DJ
2110 struct net_device *dev = dev_instance;
2111 struct velocity_info *vptr = netdev_priv(dev);
2112 u32 isr_status;
2113 int max_count = 0;
1da177e4 2114
1da177e4 2115
2cf71d2e
DJ
2116 spin_lock(&vptr->lock);
2117 isr_status = mac_read_isr(vptr->mac_regs);
2118
2119 /* Not us ? */
2120 if (isr_status == 0) {
2121 spin_unlock(&vptr->lock);
2122 return IRQ_NONE;
1da177e4 2123 }
1da177e4 2124
2cf71d2e 2125 mac_disable_int(vptr->mac_regs);
6aa20a22 2126
2cf71d2e
DJ
2127 /*
2128 * Keep processing the ISR until we have completed
2129 * processing and the isr_status becomes zero
2130 */
1da177e4 2131
2cf71d2e
DJ
2132 while (isr_status != 0) {
2133 mac_write_isr(vptr->mac_regs, isr_status);
2134 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2135 velocity_error(vptr, isr_status);
2136 if (isr_status & (ISR_PRXI | ISR_PPRXI))
2137 max_count += velocity_rx_srv(vptr, isr_status);
2138 if (isr_status & (ISR_PTXI | ISR_PPTXI))
2139 max_count += velocity_tx_srv(vptr, isr_status);
2140 isr_status = mac_read_isr(vptr->mac_regs);
2141 if (max_count > vptr->options.int_works) {
2142 printk(KERN_WARNING "%s: excessive work at interrupt.\n",
2143 dev->name);
2144 max_count = 0;
2145 }
1da177e4 2146 }
2cf71d2e
DJ
2147 spin_unlock(&vptr->lock);
2148 mac_enable_int(vptr->mac_regs);
2149 return IRQ_HANDLED;
2150
1da177e4
LT
2151}
2152
2153/**
2cf71d2e
DJ
2154 * velocity_open - interface activation callback
2155 * @dev: network layer device to open
1da177e4 2156 *
2cf71d2e
DJ
2157 * Called when the network layer brings the interface up. Returns
2158 * a negative posix error code on failure, or zero on success.
2159 *
2160 * All the ring allocation and set up is done on open for this
2161 * adapter to minimise memory usage when inactive
1da177e4 2162 */
2cf71d2e 2163static int velocity_open(struct net_device *dev)
1da177e4 2164{
2cf71d2e
DJ
2165 struct velocity_info *vptr = netdev_priv(dev);
2166 int ret;
1da177e4 2167
2cf71d2e
DJ
2168 ret = velocity_init_rings(vptr, dev->mtu);
2169 if (ret < 0)
2170 goto out;
1da177e4 2171
2cf71d2e
DJ
2172 /* Ensure chip is running */
2173 pci_set_power_state(vptr->pdev, PCI_D0);
1da177e4 2174
2cf71d2e 2175 velocity_give_many_rx_descs(vptr);
1da177e4 2176
2cf71d2e
DJ
2177 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2178
1ede9b52 2179 ret = request_irq(vptr->pdev->irq, velocity_intr, IRQF_SHARED,
2cf71d2e
DJ
2180 dev->name, dev);
2181 if (ret < 0) {
2182 /* Power down the chip */
2183 pci_set_power_state(vptr->pdev, PCI_D3hot);
2184 velocity_free_rings(vptr);
2185 goto out;
1da177e4
LT
2186 }
2187
2cf71d2e
DJ
2188 mac_enable_int(vptr->mac_regs);
2189 netif_start_queue(dev);
2190 vptr->flags |= VELOCITY_FLAGS_OPENED;
2191out:
2192 return ret;
1da177e4
LT
2193}
2194
2195/**
2cf71d2e
DJ
2196 * velocity_shutdown - shut down the chip
2197 * @vptr: velocity to deactivate
1da177e4 2198 *
2cf71d2e
DJ
2199 * Shuts down the internal operations of the velocity and
2200 * disables interrupts, autopolling, transmit and receive
1da177e4 2201 */
2cf71d2e 2202static void velocity_shutdown(struct velocity_info *vptr)
1da177e4 2203{
2cf71d2e
DJ
2204 struct mac_regs __iomem *regs = vptr->mac_regs;
2205 mac_disable_int(regs);
2206 writel(CR0_STOP, &regs->CR0Set);
2207 writew(0xFFFF, &regs->TDCSRClr);
2208 writeb(0xFF, &regs->RDCSRClr);
1da177e4 2209 safe_disable_mii_autopoll(regs);
2cf71d2e
DJ
2210 mac_clear_isr(regs);
2211}
1da177e4 2212
2cf71d2e
DJ
2213/**
2214 * velocity_change_mtu - MTU change callback
2215 * @dev: network device
2216 * @new_mtu: desired MTU
2217 *
2218 * Handle requests from the networking layer for MTU change on
2219 * this interface. It gets called on a change by the network layer.
2220 * Return zero for success or negative posix error code.
2221 */
2222static int velocity_change_mtu(struct net_device *dev, int new_mtu)
2223{
2224 struct velocity_info *vptr = netdev_priv(dev);
2225 int ret = 0;
1da177e4 2226
2cf71d2e
DJ
2227 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
2228 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
2229 vptr->dev->name);
2230 ret = -EINVAL;
2231 goto out_0;
2232 }
1da177e4 2233
2cf71d2e
DJ
2234 if (!netif_running(dev)) {
2235 dev->mtu = new_mtu;
2236 goto out_0;
1da177e4
LT
2237 }
2238
2cf71d2e
DJ
2239 if (dev->mtu != new_mtu) {
2240 struct velocity_info *tmp_vptr;
2241 unsigned long flags;
2242 struct rx_info rx;
2243 struct tx_info tx;
1da177e4 2244
2cf71d2e
DJ
2245 tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL);
2246 if (!tmp_vptr) {
2247 ret = -ENOMEM;
2248 goto out_0;
2249 }
1da177e4 2250
2cf71d2e
DJ
2251 tmp_vptr->dev = dev;
2252 tmp_vptr->pdev = vptr->pdev;
2253 tmp_vptr->options = vptr->options;
2254 tmp_vptr->tx.numq = vptr->tx.numq;
6aa20a22 2255
2cf71d2e
DJ
2256 ret = velocity_init_rings(tmp_vptr, new_mtu);
2257 if (ret < 0)
2258 goto out_free_tmp_vptr_1;
1da177e4 2259
2cf71d2e 2260 spin_lock_irqsave(&vptr->lock, flags);
1da177e4 2261
2cf71d2e
DJ
2262 netif_stop_queue(dev);
2263 velocity_shutdown(vptr);
1da177e4 2264
2cf71d2e
DJ
2265 rx = vptr->rx;
2266 tx = vptr->tx;
1da177e4 2267
2cf71d2e
DJ
2268 vptr->rx = tmp_vptr->rx;
2269 vptr->tx = tmp_vptr->tx;
1da177e4 2270
2cf71d2e
DJ
2271 tmp_vptr->rx = rx;
2272 tmp_vptr->tx = tx;
1da177e4 2273
2cf71d2e 2274 dev->mtu = new_mtu;
6aa20a22 2275
2cf71d2e 2276 velocity_give_many_rx_descs(vptr);
1da177e4 2277
2cf71d2e 2278 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1da177e4 2279
2cf71d2e
DJ
2280 mac_enable_int(vptr->mac_regs);
2281 netif_start_queue(dev);
6aa20a22 2282
2cf71d2e 2283 spin_unlock_irqrestore(&vptr->lock, flags);
1da177e4 2284
2cf71d2e 2285 velocity_free_rings(tmp_vptr);
1da177e4 2286
2cf71d2e
DJ
2287out_free_tmp_vptr_1:
2288 kfree(tmp_vptr);
2289 }
2290out_0:
2291 return ret;
1da177e4 2292}
1da177e4
LT
2293
2294/**
2cf71d2e
DJ
2295 * velocity_mii_ioctl - MII ioctl handler
2296 * @dev: network device
2297 * @ifr: the ifreq block for the ioctl
2298 * @cmd: the command
1da177e4 2299 *
2cf71d2e
DJ
2300 * Process MII requests made via ioctl from the network layer. These
2301 * are used by tools like kudzu to interrogate the link state of the
2302 * hardware
1da177e4 2303 */
2cf71d2e 2304static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1da177e4 2305{
2cf71d2e
DJ
2306 struct velocity_info *vptr = netdev_priv(dev);
2307 struct mac_regs __iomem *regs = vptr->mac_regs;
2308 unsigned long flags;
2309 struct mii_ioctl_data *miidata = if_mii(ifr);
2310 int err;
1da177e4 2311
2cf71d2e
DJ
2312 switch (cmd) {
2313 case SIOCGMIIPHY:
2314 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
1da177e4 2315 break;
2cf71d2e 2316 case SIOCGMIIREG:
2cf71d2e
DJ
2317 if (velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
2318 return -ETIMEDOUT;
1da177e4 2319 break;
2cf71d2e 2320 case SIOCSMIIREG:
2cf71d2e
DJ
2321 spin_lock_irqsave(&vptr->lock, flags);
2322 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
2323 spin_unlock_irqrestore(&vptr->lock, flags);
2324 check_connection_type(vptr->mac_regs);
2325 if (err)
2326 return err;
1da177e4
LT
2327 break;
2328 default:
2cf71d2e 2329 return -EOPNOTSUPP;
1da177e4 2330 }
2cf71d2e 2331 return 0;
1da177e4
LT
2332}
2333
2cf71d2e 2334
1da177e4 2335/**
2cf71d2e
DJ
2336 * velocity_ioctl - ioctl entry point
2337 * @dev: network device
2338 * @rq: interface request ioctl
2339 * @cmd: command code
1da177e4 2340 *
2cf71d2e
DJ
2341 * Called when the user issues an ioctl request to the network
2342 * device in question. The velocity interface supports MII.
1da177e4 2343 */
2cf71d2e
DJ
2344static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2345{
2346 struct velocity_info *vptr = netdev_priv(dev);
2347 int ret;
6aa20a22 2348
2cf71d2e
DJ
2349 /* If we are asked for information and the device is power
2350 saving then we need to bring the device back up to talk to it */
1da177e4 2351
2cf71d2e
DJ
2352 if (!netif_running(dev))
2353 pci_set_power_state(vptr->pdev, PCI_D0);
1da177e4 2354
2cf71d2e
DJ
2355 switch (cmd) {
2356 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2357 case SIOCGMIIREG: /* Read MII PHY register. */
2358 case SIOCSMIIREG: /* Write to MII PHY register. */
2359 ret = velocity_mii_ioctl(dev, rq, cmd);
2360 break;
1da177e4 2361
2cf71d2e
DJ
2362 default:
2363 ret = -EOPNOTSUPP;
2364 }
2365 if (!netif_running(dev))
2366 pci_set_power_state(vptr->pdev, PCI_D3hot);
1da177e4 2367
c4067400 2368
2cf71d2e 2369 return ret;
1da177e4
LT
2370}
2371
2372/**
2cf71d2e
DJ
2373 * velocity_get_status - statistics callback
2374 * @dev: network device
1da177e4 2375 *
2cf71d2e
DJ
2376 * Callback from the network layer to allow driver statistics
2377 * to be resynchronized with hardware collected state. In the
2378 * case of the velocity we need to pull the MIB counters from
2379 * the hardware into the counters before letting the network
2380 * layer display them.
1da177e4 2381 */
2cf71d2e 2382static struct net_device_stats *velocity_get_stats(struct net_device *dev)
1da177e4 2383{
2cf71d2e 2384 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 2385
2cf71d2e
DJ
2386 /* If the hardware is down, don't touch MII */
2387 if (!netif_running(dev))
2388 return &dev->stats;
1da177e4 2389
2cf71d2e
DJ
2390 spin_lock_irq(&vptr->lock);
2391 velocity_update_hw_mibs(vptr);
2392 spin_unlock_irq(&vptr->lock);
1da177e4 2393
2cf71d2e
DJ
2394 dev->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2395 dev->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2396 dev->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
1da177e4 2397
2cf71d2e
DJ
2398// unsigned long rx_dropped; /* no space in linux buffers */
2399 dev->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2400 /* detailed rx_errors: */
2401// unsigned long rx_length_errors;
2402// unsigned long rx_over_errors; /* receiver ring buff overflow */
2403 dev->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2404// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2405// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2406// unsigned long rx_missed_errors; /* receiver missed packet */
2407
2408 /* detailed tx_errors */
2409// unsigned long tx_fifo_errors;
2410
2411 return &dev->stats;
1da177e4
LT
2412}
2413
2cf71d2e
DJ
2414/**
2415 * velocity_close - close adapter callback
2416 * @dev: network device
2417 *
2418 * Callback from the network layer when the velocity is being
2419 * deactivated by the network layer
2420 */
2421static int velocity_close(struct net_device *dev)
1da177e4 2422{
2cf71d2e 2423 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 2424
2cf71d2e
DJ
2425 netif_stop_queue(dev);
2426 velocity_shutdown(vptr);
1da177e4 2427
2cf71d2e
DJ
2428 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2429 velocity_get_ip(vptr);
2430 if (dev->irq != 0)
2431 free_irq(dev->irq, dev);
1da177e4 2432
2cf71d2e
DJ
2433 /* Power down the chip */
2434 pci_set_power_state(vptr->pdev, PCI_D3hot);
1da177e4 2435
2cf71d2e 2436 velocity_free_rings(vptr);
1da177e4 2437
2cf71d2e
DJ
2438 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2439 return 0;
1da177e4
LT
2440}
2441
2442/**
2cf71d2e
DJ
2443 * velocity_xmit - transmit packet callback
2444 * @skb: buffer to transmit
2445 * @dev: network device
1da177e4 2446 *
2cf71d2e
DJ
2447 * Called by the networ layer to request a packet is queued to
2448 * the velocity. Returns zero on success.
1da177e4 2449 */
61357325
SH
2450static netdev_tx_t velocity_xmit(struct sk_buff *skb,
2451 struct net_device *dev)
1da177e4 2452{
2cf71d2e
DJ
2453 struct velocity_info *vptr = netdev_priv(dev);
2454 int qnum = 0;
2455 struct tx_desc *td_ptr;
2456 struct velocity_td_info *tdinfo;
2457 unsigned long flags;
2458 int pktlen;
2459 __le16 len;
2460 int index;
1da177e4 2461
2cf71d2e
DJ
2462 if (skb_padto(skb, ETH_ZLEN))
2463 goto out;
2464 pktlen = max_t(unsigned int, skb->len, ETH_ZLEN);
1da177e4 2465
2cf71d2e 2466 len = cpu_to_le16(pktlen);
1da177e4 2467
2cf71d2e 2468 spin_lock_irqsave(&vptr->lock, flags);
1da177e4 2469
2cf71d2e
DJ
2470 index = vptr->tx.curr[qnum];
2471 td_ptr = &(vptr->tx.rings[qnum][index]);
2472 tdinfo = &(vptr->tx.infos[qnum][index]);
1da177e4 2473
2cf71d2e
DJ
2474 td_ptr->tdesc1.TCR = TCR0_TIC;
2475 td_ptr->td_buf[0].size &= ~TD_QUEUE;
1da177e4 2476
2cf71d2e
DJ
2477 /*
2478 * Map the linear network buffer into PCI space and
2479 * add it to the transmit ring.
2480 */
2481 tdinfo->skb = skb;
2482 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
2483 td_ptr->tdesc0.len = len;
2484 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2485 td_ptr->td_buf[0].pa_high = 0;
2486 td_ptr->td_buf[0].size = len;
2487 tdinfo->nskb_dma = 1;
2488
2489 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
2490
2491 if (vptr->vlgrp && vlan_tx_tag_present(skb)) {
2492 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2493 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2494 }
2495
2496 /*
2497 * Handle hardware checksum
2498 */
2499 if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM)
2500 && (skb->ip_summed == CHECKSUM_PARTIAL)) {
2501 const struct iphdr *ip = ip_hdr(skb);
2502 if (ip->protocol == IPPROTO_TCP)
2503 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2504 else if (ip->protocol == IPPROTO_UDP)
2505 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2506 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2507 }
2508 {
1da177e4 2509
2cf71d2e 2510 int prev = index - 1;
1da177e4 2511
2cf71d2e
DJ
2512 if (prev < 0)
2513 prev = vptr->options.numtx - 1;
2514 td_ptr->tdesc0.len |= OWNED_BY_NIC;
2515 vptr->tx.used[qnum]++;
2516 vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx;
1da177e4 2517
2cf71d2e
DJ
2518 if (AVAIL_TD(vptr, qnum) < 1)
2519 netif_stop_queue(dev);
1da177e4 2520
2cf71d2e
DJ
2521 td_ptr = &(vptr->tx.rings[qnum][prev]);
2522 td_ptr->td_buf[0].size |= TD_QUEUE;
2523 mac_tx_queue_wake(vptr->mac_regs, qnum);
2524 }
2525 dev->trans_start = jiffies;
2526 spin_unlock_irqrestore(&vptr->lock, flags);
2527out:
2528 return NETDEV_TX_OK;
1da177e4
LT
2529}
2530
2531
2cf71d2e
DJ
2532static const struct net_device_ops velocity_netdev_ops = {
2533 .ndo_open = velocity_open,
2534 .ndo_stop = velocity_close,
2535 .ndo_start_xmit = velocity_xmit,
2536 .ndo_get_stats = velocity_get_stats,
2537 .ndo_validate_addr = eth_validate_addr,
2538 .ndo_set_mac_address = eth_mac_addr,
2539 .ndo_set_multicast_list = velocity_set_multi,
2540 .ndo_change_mtu = velocity_change_mtu,
2541 .ndo_do_ioctl = velocity_ioctl,
2542 .ndo_vlan_rx_add_vid = velocity_vlan_rx_add_vid,
2543 .ndo_vlan_rx_kill_vid = velocity_vlan_rx_kill_vid,
2544 .ndo_vlan_rx_register = velocity_vlan_rx_register,
2545};
2546
1da177e4 2547/**
2cf71d2e
DJ
2548 * velocity_init_info - init private data
2549 * @pdev: PCI device
2550 * @vptr: Velocity info
2551 * @info: Board type
1da177e4 2552 *
2cf71d2e
DJ
2553 * Set up the initial velocity_info struct for the device that has been
2554 * discovered.
1da177e4 2555 */
2cf71d2e
DJ
2556static void __devinit velocity_init_info(struct pci_dev *pdev,
2557 struct velocity_info *vptr,
2558 const struct velocity_info_tbl *info)
1da177e4 2559{
2cf71d2e
DJ
2560 memset(vptr, 0, sizeof(struct velocity_info));
2561
2562 vptr->pdev = pdev;
2563 vptr->chip_id = info->chip_id;
2564 vptr->tx.numq = info->txqueue;
2565 vptr->multicast_limit = MCAM_SIZE;
2566 spin_lock_init(&vptr->lock);
6aa20a22 2567}
1da177e4
LT
2568
2569/**
2cf71d2e
DJ
2570 * velocity_get_pci_info - retrieve PCI info for device
2571 * @vptr: velocity device
2572 * @pdev: PCI device it matches
1da177e4 2573 *
2cf71d2e
DJ
2574 * Retrieve the PCI configuration space data that interests us from
2575 * the kernel PCI layer
1da177e4 2576 */
2cf71d2e 2577static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
1da177e4 2578{
2cf71d2e 2579 vptr->rev_id = pdev->revision;
1da177e4 2580
2cf71d2e 2581 pci_set_master(pdev);
1da177e4 2582
2cf71d2e
DJ
2583 vptr->ioaddr = pci_resource_start(pdev, 0);
2584 vptr->memaddr = pci_resource_start(pdev, 1);
1da177e4 2585
2cf71d2e
DJ
2586 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
2587 dev_err(&pdev->dev,
2588 "region #0 is not an I/O resource, aborting.\n");
2589 return -EINVAL;
2590 }
2591
2592 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
2593 dev_err(&pdev->dev,
2594 "region #1 is an I/O resource, aborting.\n");
2595 return -EINVAL;
2596 }
2597
2598 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
2599 dev_err(&pdev->dev, "region #1 is too small.\n");
2600 return -EINVAL;
2601 }
2602 vptr->pdev = pdev;
6aa20a22 2603
1da177e4
LT
2604 return 0;
2605}
2606
2cf71d2e
DJ
2607/**
2608 * velocity_print_info - per driver data
2609 * @vptr: velocity
2610 *
2611 * Print per driver data as the kernel driver finds Velocity
2612 * hardware
2613 */
2614static void __devinit velocity_print_info(struct velocity_info *vptr)
1da177e4 2615{
2cf71d2e 2616 struct net_device *dev = vptr->dev;
1da177e4 2617
2cf71d2e
DJ
2618 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
2619 printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
2620 dev->name,
2621 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
2622 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1da177e4
LT
2623}
2624
2625static u32 velocity_get_link(struct net_device *dev)
2626{
8ab6f3f7 2627 struct velocity_info *vptr = netdev_priv(dev);
c4067400 2628 struct mac_regs __iomem *regs = vptr->mac_regs;
59b693fb 2629 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT
2630}
2631
1da177e4 2632
2cf71d2e
DJ
2633/**
2634 * velocity_found1 - set up discovered velocity card
2635 * @pdev: PCI device
2636 * @ent: PCI device table entry that matched
2637 *
2638 * Configure a discovered adapter from scratch. Return a negative
2639 * errno error code on failure paths.
2640 */
2641static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4 2642{
2cf71d2e
DJ
2643 static int first = 1;
2644 struct net_device *dev;
2645 int i;
2646 const char *drv_string;
2647 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
2648 struct velocity_info *vptr;
2649 struct mac_regs __iomem *regs;
2650 int ret = -ENOMEM;
1da177e4 2651
2cf71d2e
DJ
2652 /* FIXME: this driver, like almost all other ethernet drivers,
2653 * can support more than MAX_UNITS.
2654 */
2655 if (velocity_nics >= MAX_UNITS) {
2656 dev_notice(&pdev->dev, "already found %d NICs.\n",
2657 velocity_nics);
2658 return -ENODEV;
2659 }
1da177e4 2660
2cf71d2e
DJ
2661 dev = alloc_etherdev(sizeof(struct velocity_info));
2662 if (!dev) {
2663 dev_err(&pdev->dev, "allocate net device failed.\n");
2664 goto out;
2665 }
1da177e4 2666
2cf71d2e 2667 /* Chain it all together */
1da177e4 2668
2cf71d2e
DJ
2669 SET_NETDEV_DEV(dev, &pdev->dev);
2670 vptr = netdev_priv(dev);
2671
2672
2673 if (first) {
2674 printk(KERN_INFO "%s Ver. %s\n",
2675 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
2676 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
2677 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
2678 first = 0;
2679 }
2680
2681 velocity_init_info(pdev, vptr, info);
2682
2683 vptr->dev = dev;
2684
2685 dev->irq = pdev->irq;
2686
2687 ret = pci_enable_device(pdev);
2688 if (ret < 0)
2689 goto err_free_dev;
2690
2691 ret = velocity_get_pci_info(vptr, pdev);
2692 if (ret < 0) {
2693 /* error message already printed */
2694 goto err_disable;
1da177e4 2695 }
2cf71d2e
DJ
2696
2697 ret = pci_request_regions(pdev, VELOCITY_NAME);
2698 if (ret < 0) {
2699 dev_err(&pdev->dev, "No PCI resources.\n");
2700 goto err_disable;
1da177e4 2701 }
2cf71d2e
DJ
2702
2703 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
2704 if (regs == NULL) {
2705 ret = -EIO;
2706 goto err_release_res;
1da177e4 2707 }
1da177e4 2708
2cf71d2e 2709 vptr->mac_regs = regs;
1da177e4 2710
2cf71d2e 2711 mac_wol_reset(regs);
1da177e4 2712
2cf71d2e 2713 dev->base_addr = vptr->ioaddr;
1da177e4 2714
2cf71d2e
DJ
2715 for (i = 0; i < 6; i++)
2716 dev->dev_addr[i] = readb(&regs->PAR[i]);
6aa20a22 2717
6aa20a22 2718
2cf71d2e 2719 drv_string = dev_driver_string(&pdev->dev);
1da177e4 2720
2cf71d2e 2721 velocity_get_options(&vptr->options, velocity_nics, drv_string);
1da177e4 2722
2cf71d2e
DJ
2723 /*
2724 * Mask out the options cannot be set to the chip
2725 */
6aa20a22 2726
2cf71d2e 2727 vptr->options.flags &= info->flags;
1da177e4 2728
2cf71d2e
DJ
2729 /*
2730 * Enable the chip specified capbilities
2731 */
1da177e4 2732
2cf71d2e 2733 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
1da177e4 2734
2cf71d2e
DJ
2735 vptr->wol_opts = vptr->options.wol_opts;
2736 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
1da177e4 2737
2cf71d2e 2738 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
1da177e4 2739
2cf71d2e
DJ
2740 dev->irq = pdev->irq;
2741 dev->netdev_ops = &velocity_netdev_ops;
2742 dev->ethtool_ops = &velocity_ethtool_ops;
6aa20a22 2743
2cf71d2e
DJ
2744 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
2745 NETIF_F_HW_VLAN_RX;
1da177e4 2746
2cf71d2e
DJ
2747 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM)
2748 dev->features |= NETIF_F_IP_CSUM;
1da177e4 2749
2cf71d2e
DJ
2750 ret = register_netdev(dev);
2751 if (ret < 0)
2752 goto err_iounmap;
2753
2754 if (!velocity_get_link(dev)) {
2755 netif_carrier_off(dev);
2756 vptr->mii_status |= VELOCITY_LINK_FAIL;
1da177e4
LT
2757 }
2758
2cf71d2e
DJ
2759 velocity_print_info(vptr);
2760 pci_set_drvdata(pdev, dev);
1da177e4 2761
2cf71d2e 2762 /* and leave the chip powered down */
1da177e4 2763
2cf71d2e 2764 pci_set_power_state(pdev, PCI_D3hot);
2cf71d2e
DJ
2765 velocity_nics++;
2766out:
2767 return ret;
2768
2769err_iounmap:
2770 iounmap(regs);
2771err_release_res:
2772 pci_release_regions(pdev);
2773err_disable:
2774 pci_disable_device(pdev);
2775err_free_dev:
2776 free_netdev(dev);
2777 goto out;
1da177e4
LT
2778}
2779
2cf71d2e
DJ
2780
2781#ifdef CONFIG_PM
1da177e4
LT
2782/**
2783 * wol_calc_crc - WOL CRC
2784 * @pattern: data pattern
2785 * @mask_pattern: mask
2786 *
2787 * Compute the wake on lan crc hashes for the packet header
2788 * we are interested in.
2789 */
c4067400 2790static u16 wol_calc_crc(int size, u8 *pattern, u8 *mask_pattern)
1da177e4
LT
2791{
2792 u16 crc = 0xFFFF;
2793 u8 mask;
2794 int i, j;
2795
2796 for (i = 0; i < size; i++) {
2797 mask = mask_pattern[i];
2798
2799 /* Skip this loop if the mask equals to zero */
2800 if (mask == 0x00)
2801 continue;
2802
2803 for (j = 0; j < 8; j++) {
2804 if ((mask & 0x01) == 0) {
2805 mask >>= 1;
2806 continue;
2807 }
2808 mask >>= 1;
2809 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
2810 }
2811 }
2812 /* Finally, invert the result once to get the correct data */
2813 crc = ~crc;
906d66df 2814 return bitrev32(crc) >> 16;
1da177e4
LT
2815}
2816
2817/**
2818 * velocity_set_wol - set up for wake on lan
2819 * @vptr: velocity to set WOL status on
2820 *
2821 * Set a card up for wake on lan either by unicast or by
2822 * ARP packet.
2823 *
2824 * FIXME: check static buffer is safe here
2825 */
1da177e4
LT
2826static int velocity_set_wol(struct velocity_info *vptr)
2827{
c4067400 2828 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4
LT
2829 static u8 buf[256];
2830 int i;
2831
2832 static u32 mask_pattern[2][4] = {
2833 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
2834 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
2835 };
2836
2837 writew(0xFFFF, &regs->WOLCRClr);
2838 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
2839 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
2840
2841 /*
2842 if (vptr->wol_opts & VELOCITY_WOL_PHY)
2843 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
2844 */
2845
c4067400 2846 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
1da177e4 2847 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
1da177e4
LT
2848
2849 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
2850 struct arp_packet *arp = (struct arp_packet *) buf;
2851 u16 crc;
2852 memset(buf, 0, sizeof(struct arp_packet) + 7);
2853
2854 for (i = 0; i < 4; i++)
2855 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
2856
2857 arp->type = htons(ETH_P_ARP);
2858 arp->ar_op = htons(1);
2859
2860 memcpy(arp->ar_tip, vptr->ip_addr, 4);
2861
2862 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
2863 (u8 *) & mask_pattern[0][0]);
2864
2865 writew(crc, &regs->PatternCRC[0]);
2866 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
2867 }
2868
2869 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
2870 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
2871
2872 writew(0x0FFF, &regs->WOLSRClr);
2873
2874 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
2875 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
2876 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
2877
2878 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2879 }
2880
2881 if (vptr->mii_status & VELOCITY_SPEED_1000)
2882 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
2883
2884 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2885
2886 {
2887 u8 GCR;
2888 GCR = readb(&regs->CHIPGCR);
2889 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
2890 writeb(GCR, &regs->CHIPGCR);
2891 }
2892
2893 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
2894 /* Turn on SWPTAG just before entering power mode */
2895 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
2896 /* Go to bed ..... */
2897 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
2898
2899 return 0;
2900}
2901
2cf71d2e
DJ
2902/**
2903 * velocity_save_context - save registers
2904 * @vptr: velocity
2905 * @context: buffer for stored context
2906 *
2907 * Retrieve the current configuration from the velocity hardware
2908 * and stash it in the context structure, for use by the context
2909 * restore functions. This allows us to save things we need across
2910 * power down states
2911 */
2912static void velocity_save_context(struct velocity_info *vptr, struct velocity_context *context)
2913{
2914 struct mac_regs __iomem *regs = vptr->mac_regs;
2915 u16 i;
2916 u8 __iomem *ptr = (u8 __iomem *)regs;
2917
2918 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
2919 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
2920
2921 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
2922 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
2923
2924 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
2925 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
2926
2927}
2928
1da177e4
LT
2929static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
2930{
2931 struct net_device *dev = pci_get_drvdata(pdev);
2932 struct velocity_info *vptr = netdev_priv(dev);
2933 unsigned long flags;
2934
c4067400 2935 if (!netif_running(vptr->dev))
1da177e4
LT
2936 return 0;
2937
2938 netif_device_detach(vptr->dev);
2939
2940 spin_lock_irqsave(&vptr->lock, flags);
2941 pci_save_state(pdev);
2942#ifdef ETHTOOL_GWOL
2943 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
2944 velocity_get_ip(vptr);
2945 velocity_save_context(vptr, &vptr->context);
2946 velocity_shutdown(vptr);
2947 velocity_set_wol(vptr);
4a51c0d0 2948 pci_enable_wake(pdev, PCI_D3hot, 1);
1da177e4
LT
2949 pci_set_power_state(pdev, PCI_D3hot);
2950 } else {
2951 velocity_save_context(vptr, &vptr->context);
2952 velocity_shutdown(vptr);
2953 pci_disable_device(pdev);
2954 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2955 }
2cf71d2e
DJ
2956#else
2957 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2958#endif
2959 spin_unlock_irqrestore(&vptr->lock, flags);
2960 return 0;
2961}
2962
2963/**
2964 * velocity_restore_context - restore registers
2965 * @vptr: velocity
2966 * @context: buffer for stored context
2967 *
2968 * Reload the register configuration from the velocity context
2969 * created by velocity_save_context.
2970 */
2971static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
2972{
2973 struct mac_regs __iomem *regs = vptr->mac_regs;
2974 int i;
2975 u8 __iomem *ptr = (u8 __iomem *)regs;
2976
2977 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4)
2978 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
2979
2980 /* Just skip cr0 */
2981 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
2982 /* Clear */
2983 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
2984 /* Set */
2985 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
2986 }
2987
2988 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4)
2989 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
2990
2991 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
2992 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
2993
2994 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++)
2995 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
1da177e4
LT
2996}
2997
2998static int velocity_resume(struct pci_dev *pdev)
2999{
3000 struct net_device *dev = pci_get_drvdata(pdev);
3001 struct velocity_info *vptr = netdev_priv(dev);
3002 unsigned long flags;
3003 int i;
3004
c4067400 3005 if (!netif_running(vptr->dev))
1da177e4
LT
3006 return 0;
3007
3008 pci_set_power_state(pdev, PCI_D0);
3009 pci_enable_wake(pdev, 0, 0);
3010 pci_restore_state(pdev);
3011
3012 mac_wol_reset(vptr->mac_regs);
3013
3014 spin_lock_irqsave(&vptr->lock, flags);
3015 velocity_restore_context(vptr, &vptr->context);
3016 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3017 mac_disable_int(vptr->mac_regs);
3018
3019 velocity_tx_srv(vptr, 0);
3020
0fe9f15e 3021 for (i = 0; i < vptr->tx.numq; i++) {
c4067400 3022 if (vptr->tx.used[i])
1da177e4 3023 mac_tx_queue_wake(vptr->mac_regs, i);
1da177e4
LT
3024 }
3025
3026 mac_enable_int(vptr->mac_regs);
3027 spin_unlock_irqrestore(&vptr->lock, flags);
3028 netif_device_attach(vptr->dev);
3029
3030 return 0;
3031}
2cf71d2e 3032#endif
1da177e4 3033
2cf71d2e
DJ
3034/*
3035 * Definition for our device driver. The PCI layer interface
3036 * uses this to handle all our card discover and plugging
3037 */
3038static struct pci_driver velocity_driver = {
3039 .name = VELOCITY_NAME,
3040 .id_table = velocity_id_table,
3041 .probe = velocity_found1,
3042 .remove = __devexit_p(velocity_remove1),
3043#ifdef CONFIG_PM
3044 .suspend = velocity_suspend,
3045 .resume = velocity_resume,
3046#endif
3047};
3048
3049
3050/**
3051 * velocity_ethtool_up - pre hook for ethtool
3052 * @dev: network device
3053 *
3054 * Called before an ethtool operation. We need to make sure the
3055 * chip is out of D3 state before we poke at it.
3056 */
3057static int velocity_ethtool_up(struct net_device *dev)
3058{
3059 struct velocity_info *vptr = netdev_priv(dev);
3060 if (!netif_running(dev))
3061 pci_set_power_state(vptr->pdev, PCI_D0);
3062 return 0;
3063}
3064
3065/**
3066 * velocity_ethtool_down - post hook for ethtool
3067 * @dev: network device
3068 *
3069 * Called after an ethtool operation. Restore the chip back to D3
3070 * state if it isn't running.
3071 */
3072static void velocity_ethtool_down(struct net_device *dev)
3073{
3074 struct velocity_info *vptr = netdev_priv(dev);
3075 if (!netif_running(dev))
3076 pci_set_power_state(vptr->pdev, PCI_D3hot);
3077}
3078
3079static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3080{
3081 struct velocity_info *vptr = netdev_priv(dev);
3082 struct mac_regs __iomem *regs = vptr->mac_regs;
3083 u32 status;
3084 status = check_connection_type(vptr->mac_regs);
3085
3086 cmd->supported = SUPPORTED_TP |
3087 SUPPORTED_Autoneg |
3088 SUPPORTED_10baseT_Half |
3089 SUPPORTED_10baseT_Full |
3090 SUPPORTED_100baseT_Half |
3091 SUPPORTED_100baseT_Full |
3092 SUPPORTED_1000baseT_Half |
3093 SUPPORTED_1000baseT_Full;
3094 if (status & VELOCITY_SPEED_1000)
3095 cmd->speed = SPEED_1000;
3096 else if (status & VELOCITY_SPEED_100)
3097 cmd->speed = SPEED_100;
3098 else
3099 cmd->speed = SPEED_10;
3100 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
3101 cmd->port = PORT_TP;
3102 cmd->transceiver = XCVR_INTERNAL;
3103 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
3104
3105 if (status & VELOCITY_DUPLEX_FULL)
3106 cmd->duplex = DUPLEX_FULL;
3107 else
3108 cmd->duplex = DUPLEX_HALF;
3109
3110 return 0;
3111}
3112
3113static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3114{
3115 struct velocity_info *vptr = netdev_priv(dev);
3116 u32 curr_status;
3117 u32 new_status = 0;
3118 int ret = 0;
3119
3120 curr_status = check_connection_type(vptr->mac_regs);
3121 curr_status &= (~VELOCITY_LINK_FAIL);
3122
3123 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3124 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3125 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3126 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3127
3128 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
3129 ret = -EINVAL;
3130 else
3131 velocity_set_media_mode(vptr, new_status);
3132
3133 return ret;
3134}
3135
3136static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3137{
3138 struct velocity_info *vptr = netdev_priv(dev);
3139 strcpy(info->driver, VELOCITY_NAME);
3140 strcpy(info->version, VELOCITY_VERSION);
3141 strcpy(info->bus_info, pci_name(vptr->pdev));
3142}
3143
3144static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3145{
3146 struct velocity_info *vptr = netdev_priv(dev);
3147 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3148 wol->wolopts |= WAKE_MAGIC;
3149 /*
3150 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3151 wol.wolopts|=WAKE_PHY;
3152 */
3153 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3154 wol->wolopts |= WAKE_UCAST;
3155 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3156 wol->wolopts |= WAKE_ARP;
3157 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3158}
3159
3160static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3161{
3162 struct velocity_info *vptr = netdev_priv(dev);
3163
3164 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3165 return -EFAULT;
3166 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3167
3168 /*
3169 if (wol.wolopts & WAKE_PHY) {
3170 vptr->wol_opts|=VELOCITY_WOL_PHY;
3171 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3172 }
3173 */
3174
3175 if (wol->wolopts & WAKE_MAGIC) {
3176 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3177 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3178 }
3179 if (wol->wolopts & WAKE_UCAST) {
3180 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3181 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3182 }
3183 if (wol->wolopts & WAKE_ARP) {
3184 vptr->wol_opts |= VELOCITY_WOL_ARP;
3185 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3186 }
3187 memcpy(vptr->wol_passwd, wol->sopass, 6);
3188 return 0;
3189}
3190
3191static u32 velocity_get_msglevel(struct net_device *dev)
3192{
3193 return msglevel;
3194}
3195
3196static void velocity_set_msglevel(struct net_device *dev, u32 value)
3197{
3198 msglevel = value;
3199}
3200
3201static const struct ethtool_ops velocity_ethtool_ops = {
3202 .get_settings = velocity_get_settings,
3203 .set_settings = velocity_set_settings,
3204 .get_drvinfo = velocity_get_drvinfo,
3205 .get_wol = velocity_ethtool_get_wol,
3206 .set_wol = velocity_ethtool_set_wol,
3207 .get_msglevel = velocity_get_msglevel,
3208 .set_msglevel = velocity_set_msglevel,
3209 .get_link = velocity_get_link,
3210 .begin = velocity_ethtool_up,
3211 .complete = velocity_ethtool_down
3212};
ce9f7fe3 3213
2cf71d2e
DJ
3214#ifdef CONFIG_PM
3215#ifdef CONFIG_INET
1da177e4
LT
3216static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3217{
3218 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
a337499f 3219 struct net_device *dev = ifa->ifa_dev->dev;
1da177e4 3220
516b4df1
BH
3221 if (dev_net(dev) == &init_net &&
3222 dev->netdev_ops == &velocity_netdev_ops)
3223 velocity_get_ip(netdev_priv(dev));
a337499f 3224
1da177e4
LT
3225 return NOTIFY_DONE;
3226}
2cf71d2e
DJ
3227#endif /* CONFIG_INET */
3228#endif /* CONFIG_PM */
ce9f7fe3 3229
2cf71d2e
DJ
3230#if defined(CONFIG_PM) && defined(CONFIG_INET)
3231static struct notifier_block velocity_inetaddr_notifier = {
3232 .notifier_call = velocity_netdev_event,
3233};
3234
3235static void velocity_register_notifier(void)
3236{
3237 register_inetaddr_notifier(&velocity_inetaddr_notifier);
3238}
3239
3240static void velocity_unregister_notifier(void)
3241{
3242 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
3243}
3244
3245#else
3246
3247#define velocity_register_notifier() do {} while (0)
3248#define velocity_unregister_notifier() do {} while (0)
3249
3250#endif /* defined(CONFIG_PM) && defined(CONFIG_INET) */
3251
3252/**
3253 * velocity_init_module - load time function
3254 *
3255 * Called when the velocity module is loaded. The PCI driver
3256 * is registered with the PCI layer, and in turn will call
3257 * the probe functions for each velocity adapter installed
3258 * in the system.
3259 */
3260static int __init velocity_init_module(void)
3261{
3262 int ret;
3263
3264 velocity_register_notifier();
3265 ret = pci_register_driver(&velocity_driver);
3266 if (ret < 0)
3267 velocity_unregister_notifier();
3268 return ret;
3269}
3270
3271/**
3272 * velocity_cleanup - module unload
3273 *
3274 * When the velocity hardware is unloaded this function is called.
3275 * It will clean up the notifiers and the unregister the PCI
3276 * driver interface for this hardware. This in turn cleans up
3277 * all discovered interfaces before returning from the function
3278 */
3279static void __exit velocity_cleanup_module(void)
3280{
3281 velocity_unregister_notifier();
3282 pci_unregister_driver(&velocity_driver);
3283}
3284
3285module_init(velocity_init_module);
3286module_exit(velocity_cleanup_module);