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via-velocity: move residual free rx descriptors count register update
[net-next-2.6.git] / drivers / net / via-velocity.c
CommitLineData
1da177e4
LT		 1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
1da177e4
LT		 11 * rx_copybreak/alignment
12 * Scatter gather
13 * More testing
14 *
15 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@redhat.com>
16 * Additional fixes and clean up: Francois Romieu
17 *
18 * This source has not been verified for use in safety critical systems.
19 *
20 * Please direct queries about the revamped driver to the linux-kernel
21 * list not VIA.
22 *
23 * Original code:
24 *
25 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
26 * All rights reserved.
27 *
28 * This software may be redistributed and/or modified under
29 * the terms of the GNU General Public License as published by the Free
30 * Software Foundation; either version 2 of the License, or
31 * any later version.
32 *
33 * This program is distributed in the hope that it will be useful, but
34 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
35 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
36 * for more details.
37 *
38 * Author: Chuang Liang-Shing, AJ Jiang
39 *
40 * Date: Jan 24, 2003
41 *
42 * MODULE_LICENSE("GPL");
43 *
44 */
45
46
47#include <linux/module.h>
48#include <linux/types.h>
1da177e4
LT		 49#include <linux/init.h>
50#include <linux/mm.h>
51#include <linux/errno.h>
52#include <linux/ioport.h>
53#include <linux/pci.h>
54#include <linux/kernel.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/skbuff.h>
58#include <linux/delay.h>
59#include <linux/timer.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
1da177e4
LT		 62#include <linux/string.h>
63#include <linux/wait.h>
64#include <asm/io.h>
65#include <linux/if.h>
1da177e4
LT		 66#include <asm/uaccess.h>
67#include <linux/proc_fs.h>
68#include <linux/inetdevice.h>
69#include <linux/reboot.h>
70#include <linux/ethtool.h>
71#include <linux/mii.h>
72#include <linux/in.h>
73#include <linux/if_arp.h>
501e4d24 74#include <linux/if_vlan.h>
1da177e4
LT		 75#include <linux/ip.h>
76#include <linux/tcp.h>
77#include <linux/udp.h>
78#include <linux/crc-ccitt.h>
79#include <linux/crc32.h>
80
81#include "via-velocity.h"
82
83
84static int velocity_nics = 0;
85static int msglevel = MSG_LEVEL_INFO;
86
01faccbf
SH		 87/**
88 * mac_get_cam_mask - Read a CAM mask
89 * @regs: register block for this velocity
90 * @mask: buffer to store mask
91 *
92 * Fetch the mask bits of the selected CAM and store them into the
93 * provided mask buffer.
94 */
95
96static void mac_get_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
97{
98 int i;
99
100 /* Select CAM mask */
101 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
102
103 writeb(0, &regs->CAMADDR);
104
105 /* read mask */
106 for (i = 0; i < 8; i++)
107 *mask++ = readb(&(regs->MARCAM[i]));
108
109 /* disable CAMEN */
110 writeb(0, &regs->CAMADDR);
111
112 /* Select mar */
113 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
114
115}
116
117
118/**
119 * mac_set_cam_mask - Set a CAM mask
120 * @regs: register block for this velocity
121 * @mask: CAM mask to load
122 *
123 * Store a new mask into a CAM
124 */
125
126static void mac_set_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
127{
128 int i;
129 /* Select CAM mask */
130 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
131
132 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
133
134 for (i = 0; i < 8; i++) {
135 writeb(*mask++, &(regs->MARCAM[i]));
136 }
137 /* disable CAMEN */
138 writeb(0, &regs->CAMADDR);
139
140 /* Select mar */
141 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
142}
143
144static void mac_set_vlan_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
145{
146 int i;
147 /* Select CAM mask */
148 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
149
150 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
151
152 for (i = 0; i < 8; i++) {
153 writeb(*mask++, &(regs->MARCAM[i]));
154 }
155 /* disable CAMEN */
156 writeb(0, &regs->CAMADDR);
157
158 /* Select mar */
159 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
160}
161
162/**
163 * mac_set_cam - set CAM data
164 * @regs: register block of this velocity
165 * @idx: Cam index
166 * @addr: 2 or 6 bytes of CAM data
167 *
168 * Load an address or vlan tag into a CAM
169 */
170
171static void mac_set_cam(struct mac_regs __iomem * regs, int idx, const u8 *addr)
172{
173 int i;
174
175 /* Select CAM mask */
176 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
177
178 idx &= (64 - 1);
179
180 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
181
182 for (i = 0; i < 6; i++) {
183 writeb(*addr++, &(regs->MARCAM[i]));
184 }
185 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
186
187 udelay(10);
188
189 writeb(0, &regs->CAMADDR);
190
191 /* Select mar */
192 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
193}
194
195static void mac_set_vlan_cam(struct mac_regs __iomem * regs, int idx,
196 const u8 *addr)
197{
198
199 /* Select CAM mask */
200 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
201
202 idx &= (64 - 1);
203
204 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
205 writew(*((u16 *) addr), &regs->MARCAM[0]);
206
207 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
208
209 udelay(10);
210
211 writeb(0, &regs->CAMADDR);
212
213 /* Select mar */
214 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
215}
216
217
218/**
219 * mac_wol_reset - reset WOL after exiting low power
220 * @regs: register block of this velocity
221 *
222 * Called after we drop out of wake on lan mode in order to
223 * reset the Wake on lan features. This function doesn't restore
224 * the rest of the logic from the result of sleep/wakeup
225 */
226
227static void mac_wol_reset(struct mac_regs __iomem * regs)
228{
229
230 /* Turn off SWPTAG right after leaving power mode */
231 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
232 /* clear sticky bits */
233 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
234
235 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
236 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
237 /* disable force PME-enable */
238 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
239 /* disable power-event config bit */
240 writew(0xFFFF, &regs->WOLCRClr);
241 /* clear power status */
242 writew(0xFFFF, &regs->WOLSRClr);
243}
1da177e4
LT		 244
245static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
7282d491 246static const struct ethtool_ops velocity_ethtool_ops;
1da177e4
LT		 247
248/*
249 Define module options
250*/
251
252MODULE_AUTHOR("VIA Networking Technologies, Inc.");
253MODULE_LICENSE("GPL");
254MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
255
256#define VELOCITY_PARAM(N,D) \
257 static int N[MAX_UNITS]=OPTION_DEFAULT;\
258 module_param_array(N, int, NULL, 0); \
259 MODULE_PARM_DESC(N, D);
260
261#define RX_DESC_MIN 64
262#define RX_DESC_MAX 255
263#define RX_DESC_DEF 64
264VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
265
266#define TX_DESC_MIN 16
267#define TX_DESC_MAX 256
268#define TX_DESC_DEF 64
269VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
270
1da177e4
LT		 271#define RX_THRESH_MIN 0
272#define RX_THRESH_MAX 3
273#define RX_THRESH_DEF 0
274/* rx_thresh[] is used for controlling the receive fifo threshold.
275 0: indicate the rxfifo threshold is 128 bytes.
276 1: indicate the rxfifo threshold is 512 bytes.
277 2: indicate the rxfifo threshold is 1024 bytes.
278 3: indicate the rxfifo threshold is store & forward.
279*/
280VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
281
282#define DMA_LENGTH_MIN 0
283#define DMA_LENGTH_MAX 7
284#define DMA_LENGTH_DEF 0
285
286/* DMA_length[] is used for controlling the DMA length
287 0: 8 DWORDs
288 1: 16 DWORDs
289 2: 32 DWORDs
290 3: 64 DWORDs
291 4: 128 DWORDs
292 5: 256 DWORDs
293 6: SF(flush till emply)
294 7: SF(flush till emply)
295*/
296VELOCITY_PARAM(DMA_length, "DMA length");
297
1da177e4
LT		 298#define IP_ALIG_DEF 0
299/* IP_byte_align[] is used for IP header DWORD byte aligned
300 0: indicate the IP header won't be DWORD byte aligned.(Default) .
301 1: indicate the IP header will be DWORD byte aligned.
302 In some enviroment, the IP header should be DWORD byte aligned,
303 or the packet will be droped when we receive it. (eg: IPVS)
304*/
305VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
306
307#define TX_CSUM_DEF 1
308/* txcsum_offload[] is used for setting the checksum offload ability of NIC.
309 (We only support RX checksum offload now)
310 0: disable csum_offload[checksum offload
311 1: enable checksum offload. (Default)
312*/
313VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
314
315#define FLOW_CNTL_DEF 1
316#define FLOW_CNTL_MIN 1
317#define FLOW_CNTL_MAX 5
318
319/* flow_control[] is used for setting the flow control ability of NIC.
320 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
321 2: enable TX flow control.
322 3: enable RX flow control.
323 4: enable RX/TX flow control.
324 5: disable
325*/
326VELOCITY_PARAM(flow_control, "Enable flow control ability");
327
328#define MED_LNK_DEF 0
329#define MED_LNK_MIN 0
330#define MED_LNK_MAX 4
331/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
332 0: indicate autonegotiation for both speed and duplex mode
333 1: indicate 100Mbps half duplex mode
334 2: indicate 100Mbps full duplex mode
335 3: indicate 10Mbps half duplex mode
336 4: indicate 10Mbps full duplex mode
337
338 Note:
339 if EEPROM have been set to the force mode, this option is ignored
340 by driver.
341*/
342VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
343
344#define VAL_PKT_LEN_DEF 0
345/* ValPktLen[] is used for setting the checksum offload ability of NIC.
346 0: Receive frame with invalid layer 2 length (Default)
347 1: Drop frame with invalid layer 2 length
348*/
349VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
350
351#define WOL_OPT_DEF 0
352#define WOL_OPT_MIN 0
353#define WOL_OPT_MAX 7
354/* wol_opts[] is used for controlling wake on lan behavior.
355 0: Wake up if recevied a magic packet. (Default)
356 1: Wake up if link status is on/off.
357 2: Wake up if recevied an arp packet.
358 4: Wake up if recevied any unicast packet.
359 Those value can be sumed up to support more than one option.
360*/
361VELOCITY_PARAM(wol_opts, "Wake On Lan options");
362
363#define INT_WORKS_DEF 20
364#define INT_WORKS_MIN 10
365#define INT_WORKS_MAX 64
366
367VELOCITY_PARAM(int_works, "Number of packets per interrupt services");
368
369static int rx_copybreak = 200;
370module_param(rx_copybreak, int, 0644);
371MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
372
cabb7667
JG		 373static void velocity_init_info(struct pci_dev *pdev, struct velocity_info *vptr,
374 const struct velocity_info_tbl *info);
1da177e4
LT		 375static int velocity_get_pci_info(struct velocity_info *, struct pci_dev *pdev);
376static void velocity_print_info(struct velocity_info *vptr);
377static int velocity_open(struct net_device *dev);
378static int velocity_change_mtu(struct net_device *dev, int mtu);
379static int velocity_xmit(struct sk_buff *skb, struct net_device *dev);
7d12e780 380static int velocity_intr(int irq, void *dev_instance);
1da177e4
LT		 381static void velocity_set_multi(struct net_device *dev);
382static struct net_device_stats *velocity_get_stats(struct net_device *dev);
383static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
384static int velocity_close(struct net_device *dev);
385static int velocity_receive_frame(struct velocity_info *, int idx);
386static int velocity_alloc_rx_buf(struct velocity_info *, int idx);
387static void velocity_free_rd_ring(struct velocity_info *vptr);
388static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *);
389static int velocity_soft_reset(struct velocity_info *vptr);
390static void mii_init(struct velocity_info *vptr, u32 mii_status);
8a22dddb 391static u32 velocity_get_link(struct net_device *dev);
1da177e4
LT		 392static u32 velocity_get_opt_media_mode(struct velocity_info *vptr);
393static void velocity_print_link_status(struct velocity_info *vptr);
394static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs);
395static void velocity_shutdown(struct velocity_info *vptr);
396static void enable_flow_control_ability(struct velocity_info *vptr);
397static void enable_mii_autopoll(struct mac_regs __iomem * regs);
398static int velocity_mii_read(struct mac_regs __iomem *, u8 byIdx, u16 * pdata);
399static int velocity_mii_write(struct mac_regs __iomem *, u8 byMiiAddr, u16 data);
400static u32 mii_check_media_mode(struct mac_regs __iomem * regs);
401static u32 check_connection_type(struct mac_regs __iomem * regs);
402static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status);
403
404#ifdef CONFIG_PM
405
406static int velocity_suspend(struct pci_dev *pdev, pm_message_t state);
407static int velocity_resume(struct pci_dev *pdev);
408
ce9f7fe3
RD		 409static DEFINE_SPINLOCK(velocity_dev_list_lock);
410static LIST_HEAD(velocity_dev_list);
411
412#endif
413
414#if defined(CONFIG_PM) && defined(CONFIG_INET)
415
1da177e4
LT		 416static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr);
417
418static struct notifier_block velocity_inetaddr_notifier = {
419 .notifier_call = velocity_netdev_event,
420};
421
1da177e4
LT		 422static void velocity_register_notifier(void)
423{
424 register_inetaddr_notifier(&velocity_inetaddr_notifier);
425}
426
427static void velocity_unregister_notifier(void)
428{
429 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
430}
431
ce9f7fe3 432#else
1da177e4
LT		 433
434#define velocity_register_notifier() do {} while (0)
435#define velocity_unregister_notifier() do {} while (0)
436
ce9f7fe3 437#endif
1da177e4
LT		 438
439/*
440 * Internal board variants. At the moment we have only one
441 */
442
4f14b92f 443static struct velocity_info_tbl chip_info_table[] = {
cabb7667
JG		 444 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
445 { }
1da177e4
LT		 446};
447
448/*
449 * Describe the PCI device identifiers that we support in this
450 * device driver. Used for hotplug autoloading.
451 */
452
e54f4893
JG		 453static const struct pci_device_id velocity_id_table[] __devinitdata = {
454 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
455 { }
1da177e4
LT		 456};
457
458MODULE_DEVICE_TABLE(pci, velocity_id_table);
459
460/**
461 * get_chip_name - identifier to name
462 * @id: chip identifier
463 *
464 * Given a chip identifier return a suitable description. Returns
465 * a pointer a static string valid while the driver is loaded.
466 */
467
01faccbf 468static const char __devinit *get_chip_name(enum chip_type chip_id)
1da177e4
LT		 469{
470 int i;
471 for (i = 0; chip_info_table[i].name != NULL; i++)
472 if (chip_info_table[i].chip_id == chip_id)
473 break;
474 return chip_info_table[i].name;
475}
476
477/**
478 * velocity_remove1 - device unplug
479 * @pdev: PCI device being removed
480 *
481 * Device unload callback. Called on an unplug or on module
482 * unload for each active device that is present. Disconnects
483 * the device from the network layer and frees all the resources
484 */
485
486static void __devexit velocity_remove1(struct pci_dev *pdev)
487{
488 struct net_device *dev = pci_get_drvdata(pdev);
8ab6f3f7 489 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 490
491#ifdef CONFIG_PM
492 unsigned long flags;
493
494 spin_lock_irqsave(&velocity_dev_list_lock, flags);
495 if (!list_empty(&velocity_dev_list))
496 list_del(&vptr->list);
497 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
498#endif
499 unregister_netdev(dev);
500 iounmap(vptr->mac_regs);
501 pci_release_regions(pdev);
502 pci_disable_device(pdev);
503 pci_set_drvdata(pdev, NULL);
504 free_netdev(dev);
505
506 velocity_nics--;
507}
508
509/**
510 * velocity_set_int_opt - parser for integer options
511 * @opt: pointer to option value
512 * @val: value the user requested (or -1 for default)
513 * @min: lowest value allowed
514 * @max: highest value allowed
515 * @def: default value
516 * @name: property name
517 * @dev: device name
518 *
519 * Set an integer property in the module options. This function does
520 * all the verification and checking as well as reporting so that
521 * we don't duplicate code for each option.
522 */
523
524static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, char *devname)
525{
526 if (val == -1)
527 *opt = def;
528 else if (val < min || val > max) {
529 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
530 devname, name, min, max);
531 *opt = def;
532 } else {
533 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
534 devname, name, val);
535 *opt = val;
536 }
537}
538
539/**
540 * velocity_set_bool_opt - parser for boolean options
541 * @opt: pointer to option value
542 * @val: value the user requested (or -1 for default)
543 * @def: default value (yes/no)
544 * @flag: numeric value to set for true.
545 * @name: property name
546 * @dev: device name
547 *
548 * Set a boolean property in the module options. This function does
549 * all the verification and checking as well as reporting so that
550 * we don't duplicate code for each option.
551 */
552
553static void __devinit velocity_set_bool_opt(u32 * opt, int val, int def, u32 flag, char *name, char *devname)
554{
555 (*opt) &= (~flag);
556 if (val == -1)
557 *opt |= (def ? flag : 0);
558 else if (val < 0 || val > 1) {
6aa20a22 559 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT		 560 devname, name);
561 *opt |= (def ? flag : 0);
562 } else {
6aa20a22 563 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT		 564 devname, name, val ? "TRUE" : "FALSE");
565 *opt |= (val ? flag : 0);
566 }
567}
568
569/**
570 * velocity_get_options - set options on device
571 * @opts: option structure for the device
572 * @index: index of option to use in module options array
573 * @devname: device name
574 *
575 * Turn the module and command options into a single structure
576 * for the current device
577 */
578
579static void __devinit velocity_get_options(struct velocity_opt *opts, int index, char *devname)
580{
581
582 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
583 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
584 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
585 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
501e4d24 586
1da177e4
LT		 587 velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname);
588 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
589 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
590 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
591 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
592 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
593 velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname);
594 opts->numrx = (opts->numrx & ~3);
595}
596
597/**
598 * velocity_init_cam_filter - initialise CAM
599 * @vptr: velocity to program
600 *
601 * Initialize the content addressable memory used for filters. Load
602 * appropriately according to the presence of VLAN
603 */
604
605static void velocity_init_cam_filter(struct velocity_info *vptr)
606{
607 struct mac_regs __iomem * regs = vptr->mac_regs;
608
609 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
610 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
611 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
612
613 /* Disable all CAMs */
614 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
615 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
01faccbf
SH		 616 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
617 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4 618
d4f73c8e 619 /* Enable VCAMs */
501e4d24 620 if (vptr->vlgrp) {
d4f73c8e
FR		 621 unsigned int vid, i = 0;
622
623 if (!vlan_group_get_device(vptr->vlgrp, 0))
624 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
501e4d24 625
d4f73c8e
FR		 626 for (vid = 1; (vid < VLAN_VID_MASK); vid++) {
627 if (vlan_group_get_device(vptr->vlgrp, vid)) {
628 mac_set_vlan_cam(regs, i, (u8 *) &vid);
629 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
630 if (++i >= VCAM_SIZE)
631 break;
501e4d24
SH		 632 }
633 }
01faccbf 634 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
1da177e4
LT		 635 }
636}
637
d4f73c8e
FR		 638static void velocity_vlan_rx_register(struct net_device *dev,
639 struct vlan_group *grp)
640{
641 struct velocity_info *vptr = netdev_priv(dev);
642
643 vptr->vlgrp = grp;
644}
645
501e4d24
SH		 646static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
647{
648 struct velocity_info *vptr = netdev_priv(dev);
649
650 spin_lock_irq(&vptr->lock);
651 velocity_init_cam_filter(vptr);
652 spin_unlock_irq(&vptr->lock);
653}
654
655static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
656{
657 struct velocity_info *vptr = netdev_priv(dev);
658
659 spin_lock_irq(&vptr->lock);
660 vlan_group_set_device(vptr->vlgrp, vid, NULL);
661 velocity_init_cam_filter(vptr);
662 spin_unlock_irq(&vptr->lock);
663}
664
665
1da177e4
LT		 666/**
667 * velocity_rx_reset - handle a receive reset
668 * @vptr: velocity we are resetting
669 *
670 * Reset the ownership and status for the receive ring side.
671 * Hand all the receive queue to the NIC.
672 */
673
674static void velocity_rx_reset(struct velocity_info *vptr)
675{
676
677 struct mac_regs __iomem * regs = vptr->mac_regs;
678 int i;
679
680 vptr->rd_dirty = vptr->rd_filled = vptr->rd_curr = 0;
681
682 /*
683 * Init state, all RD entries belong to the NIC
684 */
685 for (i = 0; i < vptr->options.numrx; ++i)
4a51c0d0 686 vptr->rd_ring[i].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 687
688 writew(vptr->options.numrx, &regs->RBRDU);
689 writel(vptr->rd_pool_dma, &regs->RDBaseLo);
690 writew(0, &regs->RDIdx);
691 writew(vptr->options.numrx - 1, &regs->RDCSize);
692}
693
694/**
695 * velocity_init_registers - initialise MAC registers
696 * @vptr: velocity to init
697 * @type: type of initialisation (hot or cold)
698 *
699 * Initialise the MAC on a reset or on first set up on the
700 * hardware.
701 */
702
6aa20a22 703static void velocity_init_registers(struct velocity_info *vptr,
1da177e4
LT		 704 enum velocity_init_type type)
705{
706 struct mac_regs __iomem * regs = vptr->mac_regs;
707 int i, mii_status;
708
709 mac_wol_reset(regs);
710
711 switch (type) {
712 case VELOCITY_INIT_RESET:
713 case VELOCITY_INIT_WOL:
714
715 netif_stop_queue(vptr->dev);
716
717 /*
718 * Reset RX to prevent RX pointer not on the 4X location
719 */
720 velocity_rx_reset(vptr);
721 mac_rx_queue_run(regs);
722 mac_rx_queue_wake(regs);
723
724 mii_status = velocity_get_opt_media_mode(vptr);
725 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
726 velocity_print_link_status(vptr);
727 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
728 netif_wake_queue(vptr->dev);
729 }
730
731 enable_flow_control_ability(vptr);
732
733 mac_clear_isr(regs);
734 writel(CR0_STOP, &regs->CR0Clr);
6aa20a22 735 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1da177e4
LT		 736 &regs->CR0Set);
737
738 break;
739
740 case VELOCITY_INIT_COLD:
741 default:
742 /*
743 * Do reset
744 */
745 velocity_soft_reset(vptr);
746 mdelay(5);
747
748 mac_eeprom_reload(regs);
749 for (i = 0; i < 6; i++) {
750 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
751 }
752 /*
753 * clear Pre_ACPI bit.
754 */
755 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
756 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
757 mac_set_dma_length(regs, vptr->options.DMA_length);
758
759 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
760 /*
761 * Back off algorithm use original IEEE standard
762 */
763 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
764
765 /*
766 * Init CAM filter
767 */
768 velocity_init_cam_filter(vptr);
769
770 /*
771 * Set packet filter: Receive directed and broadcast address
772 */
773 velocity_set_multi(vptr->dev);
774
775 /*
776 * Enable MII auto-polling
777 */
778 enable_mii_autopoll(regs);
779
780 vptr->int_mask = INT_MASK_DEF;
781
4a51c0d0 782 writel(vptr->rd_pool_dma, &regs->RDBaseLo);
1da177e4
LT		 783 writew(vptr->options.numrx - 1, &regs->RDCSize);
784 mac_rx_queue_run(regs);
785 mac_rx_queue_wake(regs);
786
787 writew(vptr->options.numtx - 1, &regs->TDCSize);
788
789 for (i = 0; i < vptr->num_txq; i++) {
4a51c0d0 790 writel(vptr->td_pool_dma[i], &regs->TDBaseLo[i]);
1da177e4
LT		 791 mac_tx_queue_run(regs, i);
792 }
793
794 init_flow_control_register(vptr);
795
796 writel(CR0_STOP, &regs->CR0Clr);
797 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
798
799 mii_status = velocity_get_opt_media_mode(vptr);
800 netif_stop_queue(vptr->dev);
801
802 mii_init(vptr, mii_status);
803
804 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
805 velocity_print_link_status(vptr);
806 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
807 netif_wake_queue(vptr->dev);
808 }
809
810 enable_flow_control_ability(vptr);
811 mac_hw_mibs_init(regs);
812 mac_write_int_mask(vptr->int_mask, regs);
813 mac_clear_isr(regs);
814
815 }
816}
817
818/**
819 * velocity_soft_reset - soft reset
820 * @vptr: velocity to reset
821 *
822 * Kick off a soft reset of the velocity adapter and then poll
823 * until the reset sequence has completed before returning.
824 */
825
826static int velocity_soft_reset(struct velocity_info *vptr)
827{
828 struct mac_regs __iomem * regs = vptr->mac_regs;
829 int i = 0;
830
831 writel(CR0_SFRST, &regs->CR0Set);
832
833 for (i = 0; i < W_MAX_TIMEOUT; i++) {
834 udelay(5);
835 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
836 break;
837 }
838
839 if (i == W_MAX_TIMEOUT) {
840 writel(CR0_FORSRST, &regs->CR0Set);
841 /* FIXME: PCI POSTING */
842 /* delay 2ms */
843 mdelay(2);
844 }
845 return 0;
846}
847
848/**
849 * velocity_found1 - set up discovered velocity card
850 * @pdev: PCI device
851 * @ent: PCI device table entry that matched
852 *
853 * Configure a discovered adapter from scratch. Return a negative
854 * errno error code on failure paths.
855 */
856
857static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
858{
859 static int first = 1;
860 struct net_device *dev;
861 int i;
cabb7667 862 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
1da177e4
LT		 863 struct velocity_info *vptr;
864 struct mac_regs __iomem * regs;
865 int ret = -ENOMEM;
866
e54f4893
JG		 867 /* FIXME: this driver, like almost all other ethernet drivers,
868 * can support more than MAX_UNITS.
869 */
1da177e4 870 if (velocity_nics >= MAX_UNITS) {
6aa20a22 871 dev_notice(&pdev->dev, "already found %d NICs.\n",
e54f4893 872 velocity_nics);
1da177e4
LT		 873 return -ENODEV;
874 }
875
876 dev = alloc_etherdev(sizeof(struct velocity_info));
e54f4893 877 if (!dev) {
9b91cf9d 878 dev_err(&pdev->dev, "allocate net device failed.\n");
1da177e4
LT		 879 goto out;
880 }
6aa20a22 881
1da177e4 882 /* Chain it all together */
6aa20a22 883
1da177e4 884 SET_NETDEV_DEV(dev, &pdev->dev);
8ab6f3f7 885 vptr = netdev_priv(dev);
1da177e4
LT		 886
887
888 if (first) {
6aa20a22 889 printk(KERN_INFO "%s Ver. %s\n",
1da177e4
LT		 890 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
891 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
892 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
893 first = 0;
894 }
895
896 velocity_init_info(pdev, vptr, info);
897
898 vptr->dev = dev;
899
900 dev->irq = pdev->irq;
901
902 ret = pci_enable_device(pdev);
6aa20a22 903 if (ret < 0)
1da177e4
LT		 904 goto err_free_dev;
905
906 ret = velocity_get_pci_info(vptr, pdev);
907 if (ret < 0) {
e54f4893 908 /* error message already printed */
1da177e4
LT		 909 goto err_disable;
910 }
911
912 ret = pci_request_regions(pdev, VELOCITY_NAME);
913 if (ret < 0) {
9b91cf9d 914 dev_err(&pdev->dev, "No PCI resources.\n");
1da177e4
LT		 915 goto err_disable;
916 }
917
cabb7667 918 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
1da177e4
LT		 919 if (regs == NULL) {
920 ret = -EIO;
921 goto err_release_res;
922 }
923
924 vptr->mac_regs = regs;
925
926 mac_wol_reset(regs);
927
928 dev->base_addr = vptr->ioaddr;
929
930 for (i = 0; i < 6; i++)
931 dev->dev_addr[i] = readb(&regs->PAR[i]);
932
933
934 velocity_get_options(&vptr->options, velocity_nics, dev->name);
935
6aa20a22 936 /*
1da177e4
LT		 937 * Mask out the options cannot be set to the chip
938 */
6aa20a22 939
1da177e4
LT		 940 vptr->options.flags &= info->flags;
941
942 /*
943 * Enable the chip specified capbilities
944 */
6aa20a22 945
1da177e4
LT		 946 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
947
948 vptr->wol_opts = vptr->options.wol_opts;
949 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
950
951 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
952
953 dev->irq = pdev->irq;
954 dev->open = velocity_open;
955 dev->hard_start_xmit = velocity_xmit;
956 dev->stop = velocity_close;
957 dev->get_stats = velocity_get_stats;
958 dev->set_multicast_list = velocity_set_multi;
959 dev->do_ioctl = velocity_ioctl;
960 dev->ethtool_ops = &velocity_ethtool_ops;
961 dev->change_mtu = velocity_change_mtu;
501e4d24
SH		 962
963 dev->vlan_rx_add_vid = velocity_vlan_rx_add_vid;
964 dev->vlan_rx_kill_vid = velocity_vlan_rx_kill_vid;
d4f73c8e 965 dev->vlan_rx_register = velocity_vlan_rx_register;
501e4d24 966
1da177e4
LT		 967#ifdef VELOCITY_ZERO_COPY_SUPPORT
968 dev->features |= NETIF_F_SG;
969#endif
d4f73c8e
FR		 970 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
971 NETIF_F_HW_VLAN_RX;
1da177e4 972
501e4d24 973 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM)
9f3f46b5 974 dev->features |= NETIF_F_IP_CSUM;
1da177e4
LT		 975
976 ret = register_netdev(dev);
977 if (ret < 0)
978 goto err_iounmap;
979
8a22dddb
FR		 980 if (velocity_get_link(dev))
981 netif_carrier_off(dev);
982
1da177e4
LT		 983 velocity_print_info(vptr);
984 pci_set_drvdata(pdev, dev);
6aa20a22 985
1da177e4 986 /* and leave the chip powered down */
6aa20a22 987
1da177e4
LT		 988 pci_set_power_state(pdev, PCI_D3hot);
989#ifdef CONFIG_PM
990 {
991 unsigned long flags;
992
993 spin_lock_irqsave(&velocity_dev_list_lock, flags);
994 list_add(&vptr->list, &velocity_dev_list);
995 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
996 }
997#endif
998 velocity_nics++;
999out:
1000 return ret;
1001
1002err_iounmap:
1003 iounmap(regs);
1004err_release_res:
1005 pci_release_regions(pdev);
1006err_disable:
1007 pci_disable_device(pdev);
1008err_free_dev:
1009 free_netdev(dev);
1010 goto out;
1011}
1012
1013/**
1014 * velocity_print_info - per driver data
1015 * @vptr: velocity
1016 *
1017 * Print per driver data as the kernel driver finds Velocity
1018 * hardware
1019 */
1020
1021static void __devinit velocity_print_info(struct velocity_info *vptr)
1022{
1023 struct net_device *dev = vptr->dev;
1024
1025 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
6aa20a22
JG		 1026 printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
1027 dev->name,
1028 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1da177e4
LT		 1029 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1030}
1031
1032/**
1033 * velocity_init_info - init private data
1034 * @pdev: PCI device
1035 * @vptr: Velocity info
1036 * @info: Board type
1037 *
1038 * Set up the initial velocity_info struct for the device that has been
1039 * discovered.
1040 */
1041
cabb7667
JG		 1042static void __devinit velocity_init_info(struct pci_dev *pdev,
1043 struct velocity_info *vptr,
1044 const struct velocity_info_tbl *info)
1da177e4
LT		 1045{
1046 memset(vptr, 0, sizeof(struct velocity_info));
1047
1048 vptr->pdev = pdev;
1049 vptr->chip_id = info->chip_id;
1da177e4
LT		 1050 vptr->num_txq = info->txqueue;
1051 vptr->multicast_limit = MCAM_SIZE;
1052 spin_lock_init(&vptr->lock);
1053 INIT_LIST_HEAD(&vptr->list);
1054}
1055
1056/**
1057 * velocity_get_pci_info - retrieve PCI info for device
1058 * @vptr: velocity device
1059 * @pdev: PCI device it matches
1060 *
1061 * Retrieve the PCI configuration space data that interests us from
1062 * the kernel PCI layer
1063 */
1064
1065static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
1066{
44c10138 1067 vptr->rev_id = pdev->revision;
6aa20a22 1068
1da177e4
LT		 1069 pci_set_master(pdev);
1070
1071 vptr->ioaddr = pci_resource_start(pdev, 0);
1072 vptr->memaddr = pci_resource_start(pdev, 1);
6aa20a22 1073
e54f4893 1074 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
9b91cf9d 1075 dev_err(&pdev->dev,
e54f4893 1076 "region #0 is not an I/O resource, aborting.\n");
1da177e4
LT		 1077 return -EINVAL;
1078 }
1079
e54f4893 1080 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
9b91cf9d 1081 dev_err(&pdev->dev,
e54f4893 1082 "region #1 is an I/O resource, aborting.\n");
1da177e4
LT		 1083 return -EINVAL;
1084 }
1085
cabb7667 1086 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
9b91cf9d 1087 dev_err(&pdev->dev, "region #1 is too small.\n");
1da177e4
LT		 1088 return -EINVAL;
1089 }
1090 vptr->pdev = pdev;
1091
1092 return 0;
1093}
1094
1095/**
1096 * velocity_init_rings - set up DMA rings
1097 * @vptr: Velocity to set up
1098 *
1099 * Allocate PCI mapped DMA rings for the receive and transmit layer
1100 * to use.
1101 */
1102
1103static int velocity_init_rings(struct velocity_info *vptr)
1104{
8ac53afc
FR		 1105 struct velocity_opt *opt = &vptr->options;
1106 const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
1107 const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
1108 struct pci_dev *pdev = vptr->pdev;
1da177e4 1109 dma_addr_t pool_dma;
8ac53afc
FR		 1110 void *pool;
1111 unsigned int i;
1da177e4
LT		 1112
1113 /*
8ac53afc
FR		 1114 * Allocate all RD/TD rings a single pool.
1115 *
1da177e4
LT		 1116 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1117 * alignment
1118 */
8ac53afc
FR		 1119 pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->num_txq +
1120 rx_ring_size, &pool_dma);
1121 if (!pool) {
1122 dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
1123 vptr->dev->name);
1da177e4
LT		 1124 return -ENOMEM;
1125 }
1126
8ac53afc 1127 vptr->rd_ring = pool;
1da177e4
LT		 1128 vptr->rd_pool_dma = pool_dma;
1129
8ac53afc
FR		 1130 pool += rx_ring_size;
1131 pool_dma += rx_ring_size;
1da177e4 1132
8ac53afc
FR		 1133 for (i = 0; i < vptr->num_txq; i++) {
1134 vptr->td_rings[i] = pool;
1da177e4 1135 vptr->td_pool_dma[i] = pool_dma;
8ac53afc
FR		 1136 pool += tx_ring_size;
1137 pool_dma += tx_ring_size;
1da177e4 1138 }
8ac53afc 1139
1da177e4
LT		 1140 return 0;
1141}
1142
1143/**
1144 * velocity_free_rings - free PCI ring pointers
1145 * @vptr: Velocity to free from
1146 *
1147 * Clean up the PCI ring buffers allocated to this velocity.
1148 */
1149
1150static void velocity_free_rings(struct velocity_info *vptr)
1151{
580a6902
FR		 1152 const int size = vptr->options.numrx * sizeof(struct rx_desc) +
1153 vptr->options.numtx * sizeof(struct tx_desc) * vptr->num_txq;
1da177e4
LT		 1154
1155 pci_free_consistent(vptr->pdev, size, vptr->rd_ring, vptr->rd_pool_dma);
1da177e4
LT		 1156}
1157
28133176 1158static void velocity_give_many_rx_descs(struct velocity_info *vptr)
1da177e4
LT		 1159{
1160 struct mac_regs __iomem *regs = vptr->mac_regs;
1161 int avail, dirty, unusable;
1162
1163 /*
1164 * RD number must be equal to 4X per hardware spec
1165 * (programming guide rev 1.20, p.13)
1166 */
1167 if (vptr->rd_filled < 4)
1168 return;
1169
1170 wmb();
1171
1172 unusable = vptr->rd_filled & 0x0003;
1173 dirty = vptr->rd_dirty - unusable;
1174 for (avail = vptr->rd_filled & 0xfffc; avail; avail--) {
1175 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
4a51c0d0 1176 vptr->rd_ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 1177 }
1178
1179 writew(vptr->rd_filled & 0xfffc, &regs->RBRDU);
1180 vptr->rd_filled = unusable;
1181}
1182
1183static int velocity_rx_refill(struct velocity_info *vptr)
1184{
28133176 1185 int dirty = vptr->rd_dirty, done = 0;
1da177e4
LT		 1186
1187 do {
1188 struct rx_desc *rd = vptr->rd_ring + dirty;
1189
1190 /* Fine for an all zero Rx desc at init time as well */
4a51c0d0 1191 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1192 break;
1193
1194 if (!vptr->rd_info[dirty].skb) {
28133176 1195 if (velocity_alloc_rx_buf(vptr, dirty) < 0)
1da177e4
LT		 1196 break;
1197 }
1198 done++;
6aa20a22 1199 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1da177e4
LT		 1200 } while (dirty != vptr->rd_curr);
1201
1202 if (done) {
1203 vptr->rd_dirty = dirty;
1204 vptr->rd_filled += done;
1da177e4
LT		 1205 }
1206
28133176 1207 return done;
1da177e4
LT		 1208}
1209
1210/**
1211 * velocity_init_rd_ring - set up receive ring
1212 * @vptr: velocity to configure
1213 *
1214 * Allocate and set up the receive buffers for each ring slot and
1215 * assign them to the network adapter.
1216 */
1217
1218static int velocity_init_rd_ring(struct velocity_info *vptr)
1219{
48f6b053 1220 int mtu = vptr->dev->mtu;
28133176 1221 int ret = -ENOMEM;
48f6b053
SH		 1222
1223 vptr->rx_buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
1da177e4 1224
ae94607d
MK		 1225 vptr->rd_info = kcalloc(vptr->options.numrx,
1226 sizeof(struct velocity_rd_info), GFP_KERNEL);
1227 if (!vptr->rd_info)
28133176 1228 goto out;
1da177e4
LT		 1229
1230 vptr->rd_filled = vptr->rd_dirty = vptr->rd_curr = 0;
1231
28133176 1232 if (velocity_rx_refill(vptr) != vptr->options.numrx) {
1da177e4
LT		 1233 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1234 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1235 velocity_free_rd_ring(vptr);
28133176 1236 goto out;
1da177e4 1237 }
ae94607d 1238
28133176
FR		 1239 ret = 0;
1240out:
1da177e4
LT		 1241 return ret;
1242}
1243
1244/**
1245 * velocity_free_rd_ring - free receive ring
1246 * @vptr: velocity to clean up
1247 *
1248 * Free the receive buffers for each ring slot and any
1249 * attached socket buffers that need to go away.
1250 */
1251
1252static void velocity_free_rd_ring(struct velocity_info *vptr)
1253{
1254 int i;
1255
1256 if (vptr->rd_info == NULL)
1257 return;
1258
1259 for (i = 0; i < vptr->options.numrx; i++) {
1260 struct velocity_rd_info *rd_info = &(vptr->rd_info[i]);
b3c3e7d7
FR		 1261 struct rx_desc *rd = vptr->rd_ring + i;
1262
1263 memset(rd, 0, sizeof(*rd));
1da177e4
LT		 1264
1265 if (!rd_info->skb)
1266 continue;
1267 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
1268 PCI_DMA_FROMDEVICE);
1269 rd_info->skb_dma = (dma_addr_t) NULL;
1270
1271 dev_kfree_skb(rd_info->skb);
1272 rd_info->skb = NULL;
1273 }
1274
1275 kfree(vptr->rd_info);
1276 vptr->rd_info = NULL;
1277}
1278
1279/**
1280 * velocity_init_td_ring - set up transmit ring
1281 * @vptr: velocity
1282 *
1283 * Set up the transmit ring and chain the ring pointers together.
1284 * Returns zero on success or a negative posix errno code for
1285 * failure.
1286 */
6aa20a22 1287
1da177e4
LT		 1288static int velocity_init_td_ring(struct velocity_info *vptr)
1289{
1da177e4 1290 dma_addr_t curr;
580a6902 1291 unsigned int j;
1da177e4
LT		 1292
1293 /* Init the TD ring entries */
1294 for (j = 0; j < vptr->num_txq; j++) {
1295 curr = vptr->td_pool_dma[j];
1296
ae94607d
MK		 1297 vptr->td_infos[j] = kcalloc(vptr->options.numtx,
1298 sizeof(struct velocity_td_info),
1299 GFP_KERNEL);
1300 if (!vptr->td_infos[j]) {
1da177e4
LT		 1301 while(--j >= 0)
1302 kfree(vptr->td_infos[j]);
1303 return -ENOMEM;
1304 }
1da177e4 1305
1da177e4
LT		 1306 vptr->td_tail[j] = vptr->td_curr[j] = vptr->td_used[j] = 0;
1307 }
1308 return 0;
1309}
1310
1311/*
1312 * FIXME: could we merge this with velocity_free_tx_buf ?
1313 */
1314
1315static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1316 int q, int n)
1317{
1318 struct velocity_td_info * td_info = &(vptr->td_infos[q][n]);
1319 int i;
6aa20a22 1320
1da177e4
LT		 1321 if (td_info == NULL)
1322 return;
6aa20a22 1323
1da177e4
LT		 1324 if (td_info->skb) {
1325 for (i = 0; i < td_info->nskb_dma; i++)
1326 {
1327 if (td_info->skb_dma[i]) {
6aa20a22 1328 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1da177e4
LT		 1329 td_info->skb->len, PCI_DMA_TODEVICE);
1330 td_info->skb_dma[i] = (dma_addr_t) NULL;
1331 }
1332 }
1333 dev_kfree_skb(td_info->skb);
1334 td_info->skb = NULL;
1335 }
1336}
1337
1338/**
1339 * velocity_free_td_ring - free td ring
1340 * @vptr: velocity
1341 *
1342 * Free up the transmit ring for this particular velocity adapter.
1343 * We free the ring contents but not the ring itself.
1344 */
6aa20a22 1345
1da177e4
LT		 1346static void velocity_free_td_ring(struct velocity_info *vptr)
1347{
1348 int i, j;
1349
1350 for (j = 0; j < vptr->num_txq; j++) {
1351 if (vptr->td_infos[j] == NULL)
1352 continue;
1353 for (i = 0; i < vptr->options.numtx; i++) {
1354 velocity_free_td_ring_entry(vptr, j, i);
1355
1356 }
b4558ea9
JJ		 1357 kfree(vptr->td_infos[j]);
1358 vptr->td_infos[j] = NULL;
1da177e4
LT		 1359 }
1360}
1361
1362/**
1363 * velocity_rx_srv - service RX interrupt
1364 * @vptr: velocity
1365 * @status: adapter status (unused)
1366 *
1367 * Walk the receive ring of the velocity adapter and remove
1368 * any received packets from the receive queue. Hand the ring
1369 * slots back to the adapter for reuse.
1370 */
6aa20a22 1371
1da177e4
LT		 1372static int velocity_rx_srv(struct velocity_info *vptr, int status)
1373{
1374 struct net_device_stats *stats = &vptr->stats;
1375 int rd_curr = vptr->rd_curr;
1376 int works = 0;
1377
1378 do {
1379 struct rx_desc *rd = vptr->rd_ring + rd_curr;
1380
1381 if (!vptr->rd_info[rd_curr].skb)
1382 break;
1383
4a51c0d0 1384 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1385 break;
1386
1387 rmb();
1388
1389 /*
1390 * Don't drop CE or RL error frame although RXOK is off
1391 */
4a51c0d0 1392 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
1da177e4
LT		 1393 if (velocity_receive_frame(vptr, rd_curr) < 0)
1394 stats->rx_dropped++;
1395 } else {
1396 if (rd->rdesc0.RSR & RSR_CRC)
1397 stats->rx_crc_errors++;
1398 if (rd->rdesc0.RSR & RSR_FAE)
1399 stats->rx_frame_errors++;
1400
1401 stats->rx_dropped++;
1402 }
1403
4a51c0d0 1404 rd->size |= RX_INTEN;
1da177e4
LT		 1405
1406 vptr->dev->last_rx = jiffies;
1407
1408 rd_curr++;
1409 if (rd_curr >= vptr->options.numrx)
1410 rd_curr = 0;
1411 } while (++works <= 15);
1412
1413 vptr->rd_curr = rd_curr;
1414
28133176
FR		 1415 if ((works > 0) && (velocity_rx_refill(vptr) > 0))
1416 velocity_give_many_rx_descs(vptr);
1da177e4
LT		 1417
1418 VAR_USED(stats);
1419 return works;
1420}
1421
1422/**
1423 * velocity_rx_csum - checksum process
1424 * @rd: receive packet descriptor
1425 * @skb: network layer packet buffer
1426 *
1427 * Process the status bits for the received packet and determine
1428 * if the checksum was computed and verified by the hardware
1429 */
6aa20a22 1430
1da177e4
LT		 1431static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1432{
1433 skb->ip_summed = CHECKSUM_NONE;
1434
1435 if (rd->rdesc1.CSM & CSM_IPKT) {
1436 if (rd->rdesc1.CSM & CSM_IPOK) {
6aa20a22 1437 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1da177e4
LT		 1438 (rd->rdesc1.CSM & CSM_UDPKT)) {
1439 if (!(rd->rdesc1.CSM & CSM_TUPOK)) {
1440 return;
1441 }
1442 }
1443 skb->ip_summed = CHECKSUM_UNNECESSARY;
1444 }
1445 }
1446}
1447
1448/**
1449 * velocity_rx_copy - in place Rx copy for small packets
1450 * @rx_skb: network layer packet buffer candidate
1451 * @pkt_size: received data size
1452 * @rd: receive packet descriptor
1453 * @dev: network device
1454 *
1455 * Replace the current skb that is scheduled for Rx processing by a
1456 * shorter, immediatly allocated skb, if the received packet is small
1457 * enough. This function returns a negative value if the received
1458 * packet is too big or if memory is exhausted.
1459 */
c73d2589
SH		 1460static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1461 struct velocity_info *vptr)
1da177e4
LT		 1462{
1463 int ret = -1;
1da177e4
LT		 1464 if (pkt_size < rx_copybreak) {
1465 struct sk_buff *new_skb;
1466
c73d2589 1467 new_skb = netdev_alloc_skb(vptr->dev, pkt_size + 2);
1da177e4 1468 if (new_skb) {
1da177e4 1469 new_skb->ip_summed = rx_skb[0]->ip_summed;
c73d2589
SH		 1470 skb_reserve(new_skb, 2);
1471 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
1da177e4
LT		 1472 *rx_skb = new_skb;
1473 ret = 0;
1474 }
6aa20a22 1475
1da177e4
LT		 1476 }
1477 return ret;
1478}
1479
1480/**
1481 * velocity_iph_realign - IP header alignment
1482 * @vptr: velocity we are handling
1483 * @skb: network layer packet buffer
1484 * @pkt_size: received data size
1485 *
1486 * Align IP header on a 2 bytes boundary. This behavior can be
1487 * configured by the user.
1488 */
1489static inline void velocity_iph_realign(struct velocity_info *vptr,
1490 struct sk_buff *skb, int pkt_size)
1491{
1da177e4 1492 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
c03571a3 1493 memmove(skb->data + 2, skb->data, pkt_size);
1da177e4
LT		 1494 skb_reserve(skb, 2);
1495 }
1496}
1497
1498/**
1499 * velocity_receive_frame - received packet processor
1500 * @vptr: velocity we are handling
1501 * @idx: ring index
6aa20a22 1502 *
1da177e4
LT		 1503 * A packet has arrived. We process the packet and if appropriate
1504 * pass the frame up the network stack
1505 */
6aa20a22 1506
1da177e4
LT		 1507static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1508{
1509 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
1510 struct net_device_stats *stats = &vptr->stats;
1511 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
1512 struct rx_desc *rd = &(vptr->rd_ring[idx]);
4a51c0d0 1513 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
1da177e4
LT		 1514 struct sk_buff *skb;
1515
1516 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
1517 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
1518 stats->rx_length_errors++;
1519 return -EINVAL;
1520 }
1521
1522 if (rd->rdesc0.RSR & RSR_MAR)
1523 vptr->stats.multicast++;
1524
1525 skb = rd_info->skb;
1da177e4
LT		 1526
1527 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
1528 vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
1529
1530 /*
1531 * Drop frame not meeting IEEE 802.3
1532 */
6aa20a22 1533
1da177e4
LT		 1534 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
1535 if (rd->rdesc0.RSR & RSR_RL) {
1536 stats->rx_length_errors++;
1537 return -EINVAL;
1538 }
1539 }
1540
1541 pci_action = pci_dma_sync_single_for_device;
1542
1543 velocity_rx_csum(rd, skb);
1544
1545 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
1546 velocity_iph_realign(vptr, skb, pkt_len);
1547 pci_action = pci_unmap_single;
1548 rd_info->skb = NULL;
1549 }
1550
1551 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
1552 PCI_DMA_FROMDEVICE);
1553
1554 skb_put(skb, pkt_len - 4);
4c13eb66 1555 skb->protocol = eth_type_trans(skb, vptr->dev);
1da177e4 1556
d4f73c8e
FR		 1557 if (vptr->vlgrp && (rd->rdesc0.RSR & RSR_DETAG)) {
1558 vlan_hwaccel_rx(skb, vptr->vlgrp,
1559 swab16(le16_to_cpu(rd->rdesc1.PQTAG)));
1560 } else
1561 netif_rx(skb);
1562
1da177e4 1563 stats->rx_bytes += pkt_len;
1da177e4
LT		 1564
1565 return 0;
1566}
1567
1568/**
1569 * velocity_alloc_rx_buf - allocate aligned receive buffer
1570 * @vptr: velocity
1571 * @idx: ring index
1572 *
1573 * Allocate a new full sized buffer for the reception of a frame and
1574 * map it into PCI space for the hardware to use. The hardware
1575 * requires *64* byte alignment of the buffer which makes life
1576 * less fun than would be ideal.
1577 */
6aa20a22 1578
1da177e4
LT		 1579static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1580{
1581 struct rx_desc *rd = &(vptr->rd_ring[idx]);
1582 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
1583
c73d2589 1584 rd_info->skb = netdev_alloc_skb(vptr->dev, vptr->rx_buf_sz + 64);
1da177e4
LT		 1585 if (rd_info->skb == NULL)
1586 return -ENOMEM;
1587
1588 /*
1589 * Do the gymnastics to get the buffer head for data at
1590 * 64byte alignment.
1591 */
689be439 1592 skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63);
689be439 1593 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data, vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
6aa20a22 1594
1da177e4
LT		 1595 /*
1596 * Fill in the descriptor to match
6aa20a22
JG		 1597 */
1598
1da177e4 1599 *((u32 *) & (rd->rdesc0)) = 0;
4a51c0d0 1600 rd->size = cpu_to_le16(vptr->rx_buf_sz) | RX_INTEN;
1da177e4
LT		 1601 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1602 rd->pa_high = 0;
1603 return 0;
1604}
1605
1606/**
1607 * tx_srv - transmit interrupt service
1608 * @vptr; Velocity
1609 * @status:
1610 *
1611 * Scan the queues looking for transmitted packets that
1612 * we can complete and clean up. Update any statistics as
3a4fa0a2 1613 * necessary/
1da177e4 1614 */
6aa20a22 1615
1da177e4
LT		 1616static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1617{
1618 struct tx_desc *td;
1619 int qnum;
1620 int full = 0;
1621 int idx;
1622 int works = 0;
1623 struct velocity_td_info *tdinfo;
1624 struct net_device_stats *stats = &vptr->stats;
1625
1626 for (qnum = 0; qnum < vptr->num_txq; qnum++) {
6aa20a22 1627 for (idx = vptr->td_tail[qnum]; vptr->td_used[qnum] > 0;
1da177e4
LT		 1628 idx = (idx + 1) % vptr->options.numtx) {
1629
1630 /*
1631 * Get Tx Descriptor
1632 */
1633 td = &(vptr->td_rings[qnum][idx]);
1634 tdinfo = &(vptr->td_infos[qnum][idx]);
1635
4a51c0d0 1636 if (td->tdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1637 break;
1638
1639 if ((works++ > 15))
1640 break;
1641
1642 if (td->tdesc0.TSR & TSR0_TERR) {
1643 stats->tx_errors++;
1644 stats->tx_dropped++;
1645 if (td->tdesc0.TSR & TSR0_CDH)
1646 stats->tx_heartbeat_errors++;
1647 if (td->tdesc0.TSR & TSR0_CRS)
1648 stats->tx_carrier_errors++;
1649 if (td->tdesc0.TSR & TSR0_ABT)
1650 stats->tx_aborted_errors++;
1651 if (td->tdesc0.TSR & TSR0_OWC)
1652 stats->tx_window_errors++;
1653 } else {
1654 stats->tx_packets++;
1655 stats->tx_bytes += tdinfo->skb->len;
1656 }
1657 velocity_free_tx_buf(vptr, tdinfo);
1658 vptr->td_used[qnum]--;
1659 }
1660 vptr->td_tail[qnum] = idx;
1661
1662 if (AVAIL_TD(vptr, qnum) < 1) {
1663 full = 1;
1664 }
1665 }
1666 /*
1667 * Look to see if we should kick the transmit network
1668 * layer for more work.
1669 */
1670 if (netif_queue_stopped(vptr->dev) && (full == 0)
1671 && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1672 netif_wake_queue(vptr->dev);
1673 }
1674 return works;
1675}
1676
1677/**
1678 * velocity_print_link_status - link status reporting
1679 * @vptr: velocity to report on
1680 *
1681 * Turn the link status of the velocity card into a kernel log
1682 * description of the new link state, detailing speed and duplex
1683 * status
1684 */
1685
1686static void velocity_print_link_status(struct velocity_info *vptr)
1687{
1688
1689 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1690 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1691 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
b4fea61a 1692 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
1da177e4
LT		 1693
1694 if (vptr->mii_status & VELOCITY_SPEED_1000)
1695 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1696 else if (vptr->mii_status & VELOCITY_SPEED_100)
1697 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1698 else
1699 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1700
1701 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1702 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1703 else
1704 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1705 } else {
1706 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1707 switch (vptr->options.spd_dpx) {
1708 case SPD_DPX_100_HALF:
1709 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1710 break;
1711 case SPD_DPX_100_FULL:
1712 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1713 break;
1714 case SPD_DPX_10_HALF:
1715 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1716 break;
1717 case SPD_DPX_10_FULL:
1718 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1719 break;
1720 default:
1721 break;
1722 }
1723 }
1724}
1725
1726/**
1727 * velocity_error - handle error from controller
1728 * @vptr: velocity
1729 * @status: card status
1730 *
1731 * Process an error report from the hardware and attempt to recover
6aa20a22 1732 * the card itself. At the moment we cannot recover from some
1da177e4
LT		 1733 * theoretically impossible errors but this could be fixed using
1734 * the pci_device_failed logic to bounce the hardware
1735 *
1736 */
6aa20a22 1737
1da177e4
LT		 1738static void velocity_error(struct velocity_info *vptr, int status)
1739{
1740
1741 if (status & ISR_TXSTLI) {
1742 struct mac_regs __iomem * regs = vptr->mac_regs;
1743
0e6ff158 1744 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1da177e4
LT		 1745 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1746 writew(TRDCSR_RUN, &regs->TDCSRClr);
1747 netif_stop_queue(vptr->dev);
6aa20a22 1748
1da177e4
LT		 1749 /* FIXME: port over the pci_device_failed code and use it
1750 here */
1751 }
1752
1753 if (status & ISR_SRCI) {
1754 struct mac_regs __iomem * regs = vptr->mac_regs;
1755 int linked;
1756
1757 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1758 vptr->mii_status = check_connection_type(regs);
1759
1760 /*
6aa20a22 1761 * If it is a 3119, disable frame bursting in
1da177e4
LT		 1762 * halfduplex mode and enable it in fullduplex
1763 * mode
1764 */
1765 if (vptr->rev_id < REV_ID_VT3216_A0) {
1766 if (vptr->mii_status | VELOCITY_DUPLEX_FULL)
1767 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1768 else
1769 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1770 }
1771 /*
1772 * Only enable CD heart beat counter in 10HD mode
1773 */
1774 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) {
1775 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1776 } else {
1777 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1778 }
1779 }
1780 /*
1781 * Get link status from PHYSR0
1782 */
1783 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1784
1785 if (linked) {
1786 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
8a22dddb 1787 netif_carrier_on(vptr->dev);
1da177e4
LT		 1788 } else {
1789 vptr->mii_status |= VELOCITY_LINK_FAIL;
8a22dddb 1790 netif_carrier_off(vptr->dev);
1da177e4
LT		 1791 }
1792
1793 velocity_print_link_status(vptr);
1794 enable_flow_control_ability(vptr);
1795
1796 /*
6aa20a22 1797 * Re-enable auto-polling because SRCI will disable
1da177e4
LT		 1798 * auto-polling
1799 */
6aa20a22 1800
1da177e4
LT		 1801 enable_mii_autopoll(regs);
1802
1803 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1804 netif_stop_queue(vptr->dev);
1805 else
1806 netif_wake_queue(vptr->dev);
1807
1808 };
1809 if (status & ISR_MIBFI)
1810 velocity_update_hw_mibs(vptr);
1811 if (status & ISR_LSTEI)
1812 mac_rx_queue_wake(vptr->mac_regs);
1813}
1814
1815/**
1816 * velocity_free_tx_buf - free transmit buffer
1817 * @vptr: velocity
1818 * @tdinfo: buffer
1819 *
1820 * Release an transmit buffer. If the buffer was preallocated then
1821 * recycle it, if not then unmap the buffer.
1822 */
6aa20a22 1823
1da177e4
LT		 1824static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo)
1825{
1826 struct sk_buff *skb = tdinfo->skb;
1827 int i;
1828
1829 /*
1830 * Don't unmap the pre-allocated tx_bufs
1831 */
580a6902 1832 if (tdinfo->skb_dma) {
1da177e4
LT		 1833
1834 for (i = 0; i < tdinfo->nskb_dma; i++) {
1835#ifdef VELOCITY_ZERO_COPY_SUPPORT
4a51c0d0 1836 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], le16_to_cpu(td->tdesc1.len), PCI_DMA_TODEVICE);
1da177e4
LT		 1837#else
1838 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], skb->len, PCI_DMA_TODEVICE);
1839#endif
1840 tdinfo->skb_dma[i] = 0;
1841 }
1842 }
1843 dev_kfree_skb_irq(skb);
1844 tdinfo->skb = NULL;
1845}
1846
1847/**
1848 * velocity_open - interface activation callback
1849 * @dev: network layer device to open
1850 *
1851 * Called when the network layer brings the interface up. Returns
1852 * a negative posix error code on failure, or zero on success.
1853 *
1854 * All the ring allocation and set up is done on open for this
1855 * adapter to minimise memory usage when inactive
1856 */
6aa20a22 1857
1da177e4
LT		 1858static int velocity_open(struct net_device *dev)
1859{
8ab6f3f7 1860 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1861 int ret;
1862
1da177e4
LT		 1863 ret = velocity_init_rings(vptr);
1864 if (ret < 0)
1865 goto out;
1866
1867 ret = velocity_init_rd_ring(vptr);
1868 if (ret < 0)
1869 goto err_free_desc_rings;
1870
1871 ret = velocity_init_td_ring(vptr);
1872 if (ret < 0)
1873 goto err_free_rd_ring;
6aa20a22
JG		 1874
1875 /* Ensure chip is running */
1da177e4 1876 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 1877
28133176
FR		 1878 velocity_give_many_rx_descs(vptr);
1879
1da177e4
LT		 1880 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1881
1fb9df5d 1882 ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED,
1da177e4
LT		 1883 dev->name, dev);
1884 if (ret < 0) {
1885 /* Power down the chip */
1886 pci_set_power_state(vptr->pdev, PCI_D3hot);
1887 goto err_free_td_ring;
1888 }
1889
1890 mac_enable_int(vptr->mac_regs);
1891 netif_start_queue(dev);
1892 vptr->flags |= VELOCITY_FLAGS_OPENED;
1893out:
1894 return ret;
1895
1896err_free_td_ring:
1897 velocity_free_td_ring(vptr);
1898err_free_rd_ring:
1899 velocity_free_rd_ring(vptr);
1900err_free_desc_rings:
1901 velocity_free_rings(vptr);
1902 goto out;
1903}
1904
6aa20a22 1905/**
1da177e4
LT		 1906 * velocity_change_mtu - MTU change callback
1907 * @dev: network device
1908 * @new_mtu: desired MTU
1909 *
1910 * Handle requests from the networking layer for MTU change on
1911 * this interface. It gets called on a change by the network layer.
1912 * Return zero for success or negative posix error code.
1913 */
6aa20a22 1914
1da177e4
LT		 1915static int velocity_change_mtu(struct net_device *dev, int new_mtu)
1916{
8ab6f3f7 1917 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1918 unsigned long flags;
1919 int oldmtu = dev->mtu;
1920 int ret = 0;
1921
1922 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
6aa20a22 1923 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
1da177e4
LT		 1924 vptr->dev->name);
1925 return -EINVAL;
1926 }
1927
bd7b3f34
SH		 1928 if (!netif_running(dev)) {
1929 dev->mtu = new_mtu;
1930 return 0;
1931 }
1932
1da177e4
LT		 1933 if (new_mtu != oldmtu) {
1934 spin_lock_irqsave(&vptr->lock, flags);
1935
1936 netif_stop_queue(dev);
1937 velocity_shutdown(vptr);
1938
1939 velocity_free_td_ring(vptr);
1940 velocity_free_rd_ring(vptr);
1941
1942 dev->mtu = new_mtu;
1da177e4
LT		 1943
1944 ret = velocity_init_rd_ring(vptr);
1945 if (ret < 0)
1946 goto out_unlock;
1947
1948 ret = velocity_init_td_ring(vptr);
1949 if (ret < 0)
1950 goto out_unlock;
1951
1952 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1953
1954 mac_enable_int(vptr->mac_regs);
1955 netif_start_queue(dev);
1956out_unlock:
1957 spin_unlock_irqrestore(&vptr->lock, flags);
1958 }
1959
1960 return ret;
1961}
1962
1963/**
1964 * velocity_shutdown - shut down the chip
1965 * @vptr: velocity to deactivate
1966 *
1967 * Shuts down the internal operations of the velocity and
1968 * disables interrupts, autopolling, transmit and receive
1969 */
6aa20a22 1970
1da177e4
LT		 1971static void velocity_shutdown(struct velocity_info *vptr)
1972{
1973 struct mac_regs __iomem * regs = vptr->mac_regs;
1974 mac_disable_int(regs);
1975 writel(CR0_STOP, &regs->CR0Set);
1976 writew(0xFFFF, &regs->TDCSRClr);
1977 writeb(0xFF, &regs->RDCSRClr);
1978 safe_disable_mii_autopoll(regs);
1979 mac_clear_isr(regs);
1980}
1981
1982/**
1983 * velocity_close - close adapter callback
1984 * @dev: network device
1985 *
1986 * Callback from the network layer when the velocity is being
1987 * deactivated by the network layer
1988 */
1989
1990static int velocity_close(struct net_device *dev)
1991{
8ab6f3f7 1992 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1993
1994 netif_stop_queue(dev);
1995 velocity_shutdown(vptr);
1996
1997 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
1998 velocity_get_ip(vptr);
1999 if (dev->irq != 0)
2000 free_irq(dev->irq, dev);
6aa20a22 2001
1da177e4
LT		 2002 /* Power down the chip */
2003 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22 2004
1da177e4
LT		 2005 /* Free the resources */
2006 velocity_free_td_ring(vptr);
2007 velocity_free_rd_ring(vptr);
2008 velocity_free_rings(vptr);
2009
2010 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2011 return 0;
2012}
2013
2014/**
2015 * velocity_xmit - transmit packet callback
2016 * @skb: buffer to transmit
2017 * @dev: network device
2018 *
2019 * Called by the networ layer to request a packet is queued to
2020 * the velocity. Returns zero on success.
2021 */
6aa20a22 2022
1da177e4
LT		 2023static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
2024{
8ab6f3f7 2025 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2026 int qnum = 0;
2027 struct tx_desc *td_ptr;
2028 struct velocity_td_info *tdinfo;
2029 unsigned long flags;
1da177e4 2030 int pktlen = skb->len;
580a6902
FR		 2031 __le16 len;
2032 int index;
2033
2034
2035
2036 if (skb->len < ETH_ZLEN) {
2037 if (skb_padto(skb, ETH_ZLEN))
2038 goto out;
2039 pktlen = ETH_ZLEN;
2040 }
2041
2042 len = cpu_to_le16(pktlen);
1da177e4 2043
364c6bad
HX		 2044#ifdef VELOCITY_ZERO_COPY_SUPPORT
2045 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
2046 kfree_skb(skb);
2047 return 0;
2048 }
2049#endif
2050
1da177e4
LT		 2051 spin_lock_irqsave(&vptr->lock, flags);
2052
2053 index = vptr->td_curr[qnum];
2054 td_ptr = &(vptr->td_rings[qnum][index]);
2055 tdinfo = &(vptr->td_infos[qnum][index]);
2056
1da177e4 2057 td_ptr->tdesc1.TCR = TCR0_TIC;
4a51c0d0 2058 td_ptr->td_buf[0].size &= ~TD_QUEUE;
1da177e4 2059
1da177e4
LT		 2060#ifdef VELOCITY_ZERO_COPY_SUPPORT
2061 if (skb_shinfo(skb)->nr_frags > 0) {
2062 int nfrags = skb_shinfo(skb)->nr_frags;
2063 tdinfo->skb = skb;
2064 if (nfrags > 6) {
d626f62b 2065 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4 2066 tdinfo->skb_dma[0] = tdinfo->buf_dma;
4a51c0d0 2067 td_ptr->tdesc0.len = len;
1da177e4
LT		 2068 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2069 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2070 td_ptr->td_buf[0].size = len; /* queue is 0 anyway */
1da177e4 2071 tdinfo->nskb_dma = 1;
1da177e4
LT		 2072 } else {
2073 int i = 0;
2074 tdinfo->nskb_dma = 0;
4a51c0d0
AV		 2075 tdinfo->skb_dma[i] = pci_map_single(vptr->pdev, skb->data,
2076 skb_headlen(skb), PCI_DMA_TODEVICE);
1da177e4 2077
4a51c0d0 2078 td_ptr->tdesc0.len = len;
1da177e4
LT		 2079
2080 /* FIXME: support 48bit DMA later */
2081 td_ptr->td_buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma);
2082 td_ptr->td_buf[i].pa_high = 0;
4a51c0d0 2083 td_ptr->td_buf[i].size = cpu_to_le16(skb_headlen(skb));
1da177e4
LT		 2084
2085 for (i = 0; i < nfrags; i++) {
2086 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
4a51c0d0 2087 void *addr = (void *)page_address(frag->page) + frag->page_offset;
1da177e4
LT		 2088
2089 tdinfo->skb_dma[i + 1] = pci_map_single(vptr->pdev, addr, frag->size, PCI_DMA_TODEVICE);
2090
2091 td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
2092 td_ptr->td_buf[i + 1].pa_high = 0;
4a51c0d0 2093 td_ptr->td_buf[i + 1].size = cpu_to_le16(frag->size);
1da177e4
LT		 2094 }
2095 tdinfo->nskb_dma = i - 1;
1da177e4
LT		 2096 }
2097
2098 } else
2099#endif
2100 {
2101 /*
2102 * Map the linear network buffer into PCI space and
2103 * add it to the transmit ring.
2104 */
2105 tdinfo->skb = skb;
2106 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
4a51c0d0 2107 td_ptr->tdesc0.len = len;
1da177e4
LT		 2108 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2109 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2110 td_ptr->td_buf[0].size = len;
1da177e4 2111 tdinfo->nskb_dma = 1;
1da177e4 2112 }
4a51c0d0 2113 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
1da177e4 2114
501e4d24 2115 if (vptr->vlgrp && vlan_tx_tag_present(skb)) {
4a51c0d0 2116 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1da177e4
LT		 2117 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2118 }
2119
2120 /*
2121 * Handle hardware checksum
2122 */
2123 if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM)
84fa7933 2124 && (skb->ip_summed == CHECKSUM_PARTIAL)) {
eddc9ec5 2125 const struct iphdr *ip = ip_hdr(skb);
1da177e4
LT		 2126 if (ip->protocol == IPPROTO_TCP)
2127 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2128 else if (ip->protocol == IPPROTO_UDP)
2129 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2130 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2131 }
2132 {
2133
2134 int prev = index - 1;
2135
2136 if (prev < 0)
2137 prev = vptr->options.numtx - 1;
4a51c0d0 2138 td_ptr->tdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 2139 vptr->td_used[qnum]++;
2140 vptr->td_curr[qnum] = (index + 1) % vptr->options.numtx;
2141
2142 if (AVAIL_TD(vptr, qnum) < 1)
2143 netif_stop_queue(dev);
2144
2145 td_ptr = &(vptr->td_rings[qnum][prev]);
4a51c0d0 2146 td_ptr->td_buf[0].size |= TD_QUEUE;
1da177e4
LT		 2147 mac_tx_queue_wake(vptr->mac_regs, qnum);
2148 }
2149 dev->trans_start = jiffies;
2150 spin_unlock_irqrestore(&vptr->lock, flags);
580a6902
FR		 2151out:
2152 return NETDEV_TX_OK;
1da177e4
LT		 2153}
2154
2155/**
2156 * velocity_intr - interrupt callback
2157 * @irq: interrupt number
2158 * @dev_instance: interrupting device
1da177e4
LT		 2159 *
2160 * Called whenever an interrupt is generated by the velocity
2161 * adapter IRQ line. We may not be the source of the interrupt
2162 * and need to identify initially if we are, and if not exit as
2163 * efficiently as possible.
2164 */
6aa20a22 2165
7d12e780 2166static int velocity_intr(int irq, void *dev_instance)
1da177e4
LT		 2167{
2168 struct net_device *dev = dev_instance;
8ab6f3f7 2169 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2170 u32 isr_status;
2171 int max_count = 0;
2172
2173
2174 spin_lock(&vptr->lock);
2175 isr_status = mac_read_isr(vptr->mac_regs);
2176
2177 /* Not us ? */
2178 if (isr_status == 0) {
2179 spin_unlock(&vptr->lock);
2180 return IRQ_NONE;
2181 }
2182
2183 mac_disable_int(vptr->mac_regs);
2184
2185 /*
2186 * Keep processing the ISR until we have completed
2187 * processing and the isr_status becomes zero
2188 */
6aa20a22 2189
1da177e4
LT		 2190 while (isr_status != 0) {
2191 mac_write_isr(vptr->mac_regs, isr_status);
2192 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2193 velocity_error(vptr, isr_status);
2194 if (isr_status & (ISR_PRXI | ISR_PPRXI))
2195 max_count += velocity_rx_srv(vptr, isr_status);
2196 if (isr_status & (ISR_PTXI | ISR_PPTXI))
2197 max_count += velocity_tx_srv(vptr, isr_status);
2198 isr_status = mac_read_isr(vptr->mac_regs);
2199 if (max_count > vptr->options.int_works)
2200 {
6aa20a22 2201 printk(KERN_WARNING "%s: excessive work at interrupt.\n",
1da177e4
LT		 2202 dev->name);
2203 max_count = 0;
2204 }
2205 }
2206 spin_unlock(&vptr->lock);
2207 mac_enable_int(vptr->mac_regs);
2208 return IRQ_HANDLED;
2209
2210}
2211
2212
2213/**
2214 * velocity_set_multi - filter list change callback
2215 * @dev: network device
2216 *
2217 * Called by the network layer when the filter lists need to change
2218 * for a velocity adapter. Reload the CAMs with the new address
2219 * filter ruleset.
2220 */
6aa20a22 2221
1da177e4
LT		 2222static void velocity_set_multi(struct net_device *dev)
2223{
8ab6f3f7 2224 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2225 struct mac_regs __iomem * regs = vptr->mac_regs;
2226 u8 rx_mode;
2227 int i;
2228 struct dev_mc_list *mclist;
2229
2230 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1da177e4
LT		 2231 writel(0xffffffff, &regs->MARCAM[0]);
2232 writel(0xffffffff, &regs->MARCAM[4]);
2233 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
2234 } else if ((dev->mc_count > vptr->multicast_limit)
2235 || (dev->flags & IFF_ALLMULTI)) {
2236 writel(0xffffffff, &regs->MARCAM[0]);
2237 writel(0xffffffff, &regs->MARCAM[4]);
2238 rx_mode = (RCR_AM | RCR_AB);
2239 } else {
2240 int offset = MCAM_SIZE - vptr->multicast_limit;
01faccbf 2241 mac_get_cam_mask(regs, vptr->mCAMmask);
1da177e4
LT		 2242
2243 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
01faccbf 2244 mac_set_cam(regs, i + offset, mclist->dmi_addr);
1da177e4
LT		 2245 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
2246 }
2247
01faccbf 2248 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4
LT		 2249 rx_mode = (RCR_AM | RCR_AB);
2250 }
2251 if (dev->mtu > 1500)
2252 rx_mode |= RCR_AL;
2253
2254 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
2255
2256}
2257
2258/**
2259 * velocity_get_status - statistics callback
2260 * @dev: network device
2261 *
2262 * Callback from the network layer to allow driver statistics
2263 * to be resynchronized with hardware collected state. In the
2264 * case of the velocity we need to pull the MIB counters from
2265 * the hardware into the counters before letting the network
2266 * layer display them.
2267 */
6aa20a22 2268
1da177e4
LT		 2269static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2270{
8ab6f3f7 2271 struct velocity_info *vptr = netdev_priv(dev);
6aa20a22 2272
1da177e4
LT		 2273 /* If the hardware is down, don't touch MII */
2274 if(!netif_running(dev))
2275 return &vptr->stats;
2276
2277 spin_lock_irq(&vptr->lock);
2278 velocity_update_hw_mibs(vptr);
2279 spin_unlock_irq(&vptr->lock);
2280
2281 vptr->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2282 vptr->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2283 vptr->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2284
2285// unsigned long rx_dropped; /* no space in linux buffers */
2286 vptr->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2287 /* detailed rx_errors: */
2288// unsigned long rx_length_errors;
2289// unsigned long rx_over_errors; /* receiver ring buff overflow */
2290 vptr->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2291// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2292// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2293// unsigned long rx_missed_errors; /* receiver missed packet */
2294
2295 /* detailed tx_errors */
2296// unsigned long tx_fifo_errors;
2297
2298 return &vptr->stats;
2299}
2300
2301
2302/**
2303 * velocity_ioctl - ioctl entry point
2304 * @dev: network device
2305 * @rq: interface request ioctl
2306 * @cmd: command code
2307 *
2308 * Called when the user issues an ioctl request to the network
2309 * device in question. The velocity interface supports MII.
2310 */
6aa20a22 2311
1da177e4
LT		 2312static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2313{
8ab6f3f7 2314 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2315 int ret;
2316
2317 /* If we are asked for information and the device is power
2318 saving then we need to bring the device back up to talk to it */
6aa20a22 2319
1da177e4
LT		 2320 if (!netif_running(dev))
2321 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 2322
1da177e4
LT		 2323 switch (cmd) {
2324 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2325 case SIOCGMIIREG: /* Read MII PHY register. */
2326 case SIOCSMIIREG: /* Write to MII PHY register. */
2327 ret = velocity_mii_ioctl(dev, rq, cmd);
2328 break;
2329
2330 default:
2331 ret = -EOPNOTSUPP;
2332 }
2333 if (!netif_running(dev))
2334 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22
JG		 2335
2336
1da177e4
LT		 2337 return ret;
2338}
2339
2340/*
2341 * Definition for our device driver. The PCI layer interface
2342 * uses this to handle all our card discover and plugging
2343 */
6aa20a22 2344
1da177e4
LT		 2345static struct pci_driver velocity_driver = {
2346 .name = VELOCITY_NAME,
2347 .id_table = velocity_id_table,
2348 .probe = velocity_found1,
2349 .remove = __devexit_p(velocity_remove1),
2350#ifdef CONFIG_PM
2351 .suspend = velocity_suspend,
2352 .resume = velocity_resume,
2353#endif
2354};
2355
2356/**
2357 * velocity_init_module - load time function
2358 *
2359 * Called when the velocity module is loaded. The PCI driver
2360 * is registered with the PCI layer, and in turn will call
2361 * the probe functions for each velocity adapter installed
2362 * in the system.
2363 */
6aa20a22 2364
1da177e4
LT		 2365static int __init velocity_init_module(void)
2366{
2367 int ret;
2368
2369 velocity_register_notifier();
29917620 2370 ret = pci_register_driver(&velocity_driver);
1da177e4
LT		 2371 if (ret < 0)
2372 velocity_unregister_notifier();
2373 return ret;
2374}
2375
2376/**
2377 * velocity_cleanup - module unload
2378 *
2379 * When the velocity hardware is unloaded this function is called.
6aa20a22 2380 * It will clean up the notifiers and the unregister the PCI
1da177e4
LT		 2381 * driver interface for this hardware. This in turn cleans up
2382 * all discovered interfaces before returning from the function
2383 */
6aa20a22 2384
1da177e4
LT		 2385static void __exit velocity_cleanup_module(void)
2386{
2387 velocity_unregister_notifier();
2388 pci_unregister_driver(&velocity_driver);
2389}
2390
2391module_init(velocity_init_module);
2392module_exit(velocity_cleanup_module);
2393
2394
2395/*
2396 * MII access , media link mode setting functions
2397 */
6aa20a22
JG		 2398
2399
1da177e4
LT		 2400/**
2401 * mii_init - set up MII
2402 * @vptr: velocity adapter
2403 * @mii_status: links tatus
2404 *
2405 * Set up the PHY for the current link state.
2406 */
6aa20a22 2407
1da177e4
LT		 2408static void mii_init(struct velocity_info *vptr, u32 mii_status)
2409{
2410 u16 BMCR;
2411
2412 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
2413 case PHYID_CICADA_CS8201:
2414 /*
2415 * Reset to hardware default
2416 */
2417 MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2418 /*
2419 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2420 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2421 * legacy-forced issue.
2422 */
2423 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2424 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2425 else
2426 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2427 /*
2428 * Turn on Link/Activity LED enable bit for CIS8201
2429 */
2430 MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
2431 break;
2432 case PHYID_VT3216_32BIT:
2433 case PHYID_VT3216_64BIT:
2434 /*
2435 * Reset to hardware default
2436 */
2437 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2438 /*
2439 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2440 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2441 * legacy-forced issue
2442 */
2443 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2444 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2445 else
2446 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2447 break;
2448
2449 case PHYID_MARVELL_1000:
2450 case PHYID_MARVELL_1000S:
2451 /*
6aa20a22 2452 * Assert CRS on Transmit
1da177e4
LT		 2453 */
2454 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
2455 /*
6aa20a22 2456 * Reset to hardware default
1da177e4
LT		 2457 */
2458 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2459 break;
2460 default:
2461 ;
2462 }
2463 velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
2464 if (BMCR & BMCR_ISO) {
2465 BMCR &= ~BMCR_ISO;
2466 velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
2467 }
2468}
2469
2470/**
2471 * safe_disable_mii_autopoll - autopoll off
2472 * @regs: velocity registers
2473 *
2474 * Turn off the autopoll and wait for it to disable on the chip
2475 */
6aa20a22 2476
1da177e4
LT		 2477static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs)
2478{
2479 u16 ww;
2480
2481 /* turn off MAUTO */
2482 writeb(0, &regs->MIICR);
2483 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2484 udelay(1);
2485 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2486 break;
2487 }
2488}
2489
2490/**
2491 * enable_mii_autopoll - turn on autopolling
2492 * @regs: velocity registers
2493 *
2494 * Enable the MII link status autopoll feature on the Velocity
2495 * hardware. Wait for it to enable.
2496 */
2497
2498static void enable_mii_autopoll(struct mac_regs __iomem * regs)
2499{
2500 int ii;
2501
2502 writeb(0, &(regs->MIICR));
2503 writeb(MIIADR_SWMPL, &regs->MIIADR);
2504
2505 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2506 udelay(1);
2507 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2508 break;
2509 }
2510
2511 writeb(MIICR_MAUTO, &regs->MIICR);
2512
2513 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2514 udelay(1);
2515 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2516 break;
2517 }
2518
2519}
2520
2521/**
2522 * velocity_mii_read - read MII data
2523 * @regs: velocity registers
2524 * @index: MII register index
2525 * @data: buffer for received data
2526 *
2527 * Perform a single read of an MII 16bit register. Returns zero
2528 * on success or -ETIMEDOUT if the PHY did not respond.
2529 */
6aa20a22 2530
1da177e4
LT		 2531static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
2532{
2533 u16 ww;
2534
2535 /*
2536 * Disable MIICR_MAUTO, so that mii addr can be set normally
2537 */
2538 safe_disable_mii_autopoll(regs);
2539
2540 writeb(index, &regs->MIIADR);
2541
2542 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
2543
2544 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2545 if (!(readb(&regs->MIICR) & MIICR_RCMD))
2546 break;
2547 }
2548
2549 *data = readw(&regs->MIIDATA);
2550
2551 enable_mii_autopoll(regs);
2552 if (ww == W_MAX_TIMEOUT)
2553 return -ETIMEDOUT;
2554 return 0;
2555}
2556
2557/**
2558 * velocity_mii_write - write MII data
2559 * @regs: velocity registers
2560 * @index: MII register index
2561 * @data: 16bit data for the MII register
2562 *
2563 * Perform a single write to an MII 16bit register. Returns zero
2564 * on success or -ETIMEDOUT if the PHY did not respond.
2565 */
6aa20a22 2566
1da177e4
LT		 2567static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
2568{
2569 u16 ww;
2570
2571 /*
2572 * Disable MIICR_MAUTO, so that mii addr can be set normally
2573 */
2574 safe_disable_mii_autopoll(regs);
2575
2576 /* MII reg offset */
2577 writeb(mii_addr, &regs->MIIADR);
2578 /* set MII data */
2579 writew(data, &regs->MIIDATA);
2580
2581 /* turn on MIICR_WCMD */
2582 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
2583
2584 /* W_MAX_TIMEOUT is the timeout period */
2585 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2586 udelay(5);
2587 if (!(readb(&regs->MIICR) & MIICR_WCMD))
2588 break;
2589 }
2590 enable_mii_autopoll(regs);
2591
2592 if (ww == W_MAX_TIMEOUT)
2593 return -ETIMEDOUT;
2594 return 0;
2595}
2596
2597/**
2598 * velocity_get_opt_media_mode - get media selection
2599 * @vptr: velocity adapter
2600 *
2601 * Get the media mode stored in EEPROM or module options and load
2602 * mii_status accordingly. The requested link state information
2603 * is also returned.
2604 */
6aa20a22 2605
1da177e4
LT		 2606static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
2607{
2608 u32 status = 0;
2609
2610 switch (vptr->options.spd_dpx) {
2611 case SPD_DPX_AUTO:
2612 status = VELOCITY_AUTONEG_ENABLE;
2613 break;
2614 case SPD_DPX_100_FULL:
2615 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
2616 break;
2617 case SPD_DPX_10_FULL:
2618 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
2619 break;
2620 case SPD_DPX_100_HALF:
2621 status = VELOCITY_SPEED_100;
2622 break;
2623 case SPD_DPX_10_HALF:
2624 status = VELOCITY_SPEED_10;
2625 break;
2626 }
2627 vptr->mii_status = status;
2628 return status;
2629}
2630
2631/**
2632 * mii_set_auto_on - autonegotiate on
2633 * @vptr: velocity
2634 *
2635 * Enable autonegotation on this interface
2636 */
6aa20a22 2637
1da177e4
LT		 2638static void mii_set_auto_on(struct velocity_info *vptr)
2639{
2640 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
2641 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
2642 else
2643 MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2644}
2645
2646
2647/*
2648static void mii_set_auto_off(struct velocity_info * vptr)
2649{
2650 MII_REG_BITS_OFF(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2651}
2652*/
2653
2654/**
2655 * set_mii_flow_control - flow control setup
2656 * @vptr: velocity interface
2657 *
2658 * Set up the flow control on this interface according to
2659 * the supplied user/eeprom options.
2660 */
6aa20a22 2661
1da177e4
LT		 2662static void set_mii_flow_control(struct velocity_info *vptr)
2663{
2664 /*Enable or Disable PAUSE in ANAR */
2665 switch (vptr->options.flow_cntl) {
2666 case FLOW_CNTL_TX:
2667 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2668 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2669 break;
2670
2671 case FLOW_CNTL_RX:
2672 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2673 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2674 break;
2675
2676 case FLOW_CNTL_TX_RX:
2677 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2678 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2679 break;
2680
2681 case FLOW_CNTL_DISABLE:
2682 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2683 MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2684 break;
2685 default:
2686 break;
2687 }
2688}
2689
2690/**
2691 * velocity_set_media_mode - set media mode
2692 * @mii_status: old MII link state
2693 *
2694 * Check the media link state and configure the flow control
2695 * PHY and also velocity hardware setup accordingly. In particular
2696 * we need to set up CD polling and frame bursting.
2697 */
6aa20a22 2698
1da177e4
LT		 2699static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
2700{
2701 u32 curr_status;
2702 struct mac_regs __iomem * regs = vptr->mac_regs;
2703
2704 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
2705 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
2706
2707 /* Set mii link status */
2708 set_mii_flow_control(vptr);
2709
2710 /*
2711 Check if new status is consisent with current status
2712 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE)
2713 || (mii_status==curr_status)) {
2714 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
2715 vptr->mii_status=check_connection_type(vptr->mac_regs);
2716 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
2717 return 0;
2718 }
2719 */
2720
2721 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) {
2722 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
2723 }
2724
2725 /*
2726 * If connection type is AUTO
2727 */
2728 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
2729 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
2730 /* clear force MAC mode bit */
2731 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
2732 /* set duplex mode of MAC according to duplex mode of MII */
2733 MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs);
2734 MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2735 MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs);
2736
2737 /* enable AUTO-NEGO mode */
2738 mii_set_auto_on(vptr);
2739 } else {
2740 u16 ANAR;
2741 u8 CHIPGCR;
2742
2743 /*
2744 * 1. if it's 3119, disable frame bursting in halfduplex mode
2745 * and enable it in fullduplex mode
2746 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
2747 * 3. only enable CD heart beat counter in 10HD mode
2748 */
2749
2750 /* set force MAC mode bit */
2751 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2752
2753 CHIPGCR = readb(&regs->CHIPGCR);
2754 CHIPGCR &= ~CHIPGCR_FCGMII;
2755
2756 if (mii_status & VELOCITY_DUPLEX_FULL) {
2757 CHIPGCR |= CHIPGCR_FCFDX;
2758 writeb(CHIPGCR, &regs->CHIPGCR);
2759 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
2760 if (vptr->rev_id < REV_ID_VT3216_A0)
2761 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
2762 } else {
2763 CHIPGCR &= ~CHIPGCR_FCFDX;
2764 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
2765 writeb(CHIPGCR, &regs->CHIPGCR);
2766 if (vptr->rev_id < REV_ID_VT3216_A0)
2767 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
2768 }
2769
2770 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2771
2772 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) {
2773 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
2774 } else {
2775 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
2776 }
2777 /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
2778 velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
2779 ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
2780 if (mii_status & VELOCITY_SPEED_100) {
2781 if (mii_status & VELOCITY_DUPLEX_FULL)
2782 ANAR |= ANAR_TXFD;
2783 else
2784 ANAR |= ANAR_TX;
2785 } else {
2786 if (mii_status & VELOCITY_DUPLEX_FULL)
2787 ANAR |= ANAR_10FD;
2788 else
2789 ANAR |= ANAR_10;
2790 }
2791 velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
2792 /* enable AUTO-NEGO mode */
2793 mii_set_auto_on(vptr);
2794 /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
2795 }
2796 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
2797 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
2798 return VELOCITY_LINK_CHANGE;
2799}
2800
2801/**
2802 * mii_check_media_mode - check media state
2803 * @regs: velocity registers
2804 *
2805 * Check the current MII status and determine the link status
2806 * accordingly
2807 */
6aa20a22 2808
1da177e4
LT		 2809static u32 mii_check_media_mode(struct mac_regs __iomem * regs)
2810{
2811 u32 status = 0;
2812 u16 ANAR;
2813
2814 if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
2815 status |= VELOCITY_LINK_FAIL;
2816
2817 if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
2818 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
2819 else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
2820 status |= (VELOCITY_SPEED_1000);
2821 else {
2822 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2823 if (ANAR & ANAR_TXFD)
2824 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
2825 else if (ANAR & ANAR_TX)
2826 status |= VELOCITY_SPEED_100;
2827 else if (ANAR & ANAR_10FD)
2828 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
2829 else
2830 status |= (VELOCITY_SPEED_10);
2831 }
2832
2833 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2834 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2835 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2836 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2837 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2838 status |= VELOCITY_AUTONEG_ENABLE;
2839 }
2840 }
2841
2842 return status;
2843}
2844
2845static u32 check_connection_type(struct mac_regs __iomem * regs)
2846{
2847 u32 status = 0;
2848 u8 PHYSR0;
2849 u16 ANAR;
2850 PHYSR0 = readb(&regs->PHYSR0);
2851
2852 /*
2853 if (!(PHYSR0 & PHYSR0_LINKGD))
2854 status|=VELOCITY_LINK_FAIL;
2855 */
2856
2857 if (PHYSR0 & PHYSR0_FDPX)
2858 status |= VELOCITY_DUPLEX_FULL;
2859
2860 if (PHYSR0 & PHYSR0_SPDG)
2861 status |= VELOCITY_SPEED_1000;
59b693fb 2862 else if (PHYSR0 & PHYSR0_SPD10)
1da177e4
LT		 2863 status |= VELOCITY_SPEED_10;
2864 else
2865 status |= VELOCITY_SPEED_100;
2866
2867 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2868 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2869 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2870 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2871 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2872 status |= VELOCITY_AUTONEG_ENABLE;
2873 }
2874 }
2875
2876 return status;
2877}
2878
2879/**
2880 * enable_flow_control_ability - flow control
2881 * @vptr: veloity to configure
2882 *
2883 * Set up flow control according to the flow control options
2884 * determined by the eeprom/configuration.
2885 */
2886
2887static void enable_flow_control_ability(struct velocity_info *vptr)
2888{
2889
2890 struct mac_regs __iomem * regs = vptr->mac_regs;
2891
2892 switch (vptr->options.flow_cntl) {
2893
2894 case FLOW_CNTL_DEFAULT:
2895 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
2896 writel(CR0_FDXRFCEN, &regs->CR0Set);
2897 else
2898 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2899
2900 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
2901 writel(CR0_FDXTFCEN, &regs->CR0Set);
2902 else
2903 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2904 break;
2905
2906 case FLOW_CNTL_TX:
2907 writel(CR0_FDXTFCEN, &regs->CR0Set);
2908 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2909 break;
2910
2911 case FLOW_CNTL_RX:
2912 writel(CR0_FDXRFCEN, &regs->CR0Set);
2913 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2914 break;
2915
2916 case FLOW_CNTL_TX_RX:
2917 writel(CR0_FDXTFCEN, &regs->CR0Set);
2918 writel(CR0_FDXRFCEN, &regs->CR0Set);
2919 break;
2920
2921 case FLOW_CNTL_DISABLE:
2922 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2923 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2924 break;
2925
2926 default:
2927 break;
2928 }
2929
2930}
2931
2932
2933/**
2934 * velocity_ethtool_up - pre hook for ethtool
2935 * @dev: network device
2936 *
2937 * Called before an ethtool operation. We need to make sure the
2938 * chip is out of D3 state before we poke at it.
2939 */
6aa20a22 2940
1da177e4
LT		 2941static int velocity_ethtool_up(struct net_device *dev)
2942{
8ab6f3f7 2943 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2944 if (!netif_running(dev))
2945 pci_set_power_state(vptr->pdev, PCI_D0);
2946 return 0;
6aa20a22 2947}
1da177e4
LT		 2948
2949/**
2950 * velocity_ethtool_down - post hook for ethtool
2951 * @dev: network device
2952 *
2953 * Called after an ethtool operation. Restore the chip back to D3
2954 * state if it isn't running.
2955 */
6aa20a22 2956
1da177e4
LT		 2957static void velocity_ethtool_down(struct net_device *dev)
2958{
8ab6f3f7 2959 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2960 if (!netif_running(dev))
2961 pci_set_power_state(vptr->pdev, PCI_D3hot);
2962}
2963
2964static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2965{
8ab6f3f7 2966 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2967 struct mac_regs __iomem * regs = vptr->mac_regs;
2968 u32 status;
2969 status = check_connection_type(vptr->mac_regs);
2970
59b693fb
JC		 2971 cmd->supported = SUPPORTED_TP |
2972 SUPPORTED_Autoneg |
2973 SUPPORTED_10baseT_Half |
2974 SUPPORTED_10baseT_Full |
2975 SUPPORTED_100baseT_Half |
2976 SUPPORTED_100baseT_Full |
2977 SUPPORTED_1000baseT_Half |
2978 SUPPORTED_1000baseT_Full;
2979 if (status & VELOCITY_SPEED_1000)
2980 cmd->speed = SPEED_1000;
2981 else if (status & VELOCITY_SPEED_100)
1da177e4
LT		 2982 cmd->speed = SPEED_100;
2983 else
2984 cmd->speed = SPEED_10;
2985 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2986 cmd->port = PORT_TP;
2987 cmd->transceiver = XCVR_INTERNAL;
2988 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
2989
2990 if (status & VELOCITY_DUPLEX_FULL)
2991 cmd->duplex = DUPLEX_FULL;
2992 else
2993 cmd->duplex = DUPLEX_HALF;
6aa20a22 2994
1da177e4
LT		 2995 return 0;
2996}
2997
2998static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2999{
8ab6f3f7 3000 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3001 u32 curr_status;
3002 u32 new_status = 0;
3003 int ret = 0;
6aa20a22 3004
1da177e4
LT		 3005 curr_status = check_connection_type(vptr->mac_regs);
3006 curr_status &= (~VELOCITY_LINK_FAIL);
3007
3008 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3009 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3010 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3011 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3012
3013 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
3014 ret = -EINVAL;
3015 else
3016 velocity_set_media_mode(vptr, new_status);
3017
3018 return ret;
3019}
3020
3021static u32 velocity_get_link(struct net_device *dev)
3022{
8ab6f3f7 3023 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 3024 struct mac_regs __iomem * regs = vptr->mac_regs;
59b693fb 3025 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT		 3026}
3027
3028static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3029{
8ab6f3f7 3030 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3031 strcpy(info->driver, VELOCITY_NAME);
3032 strcpy(info->version, VELOCITY_VERSION);
3033 strcpy(info->bus_info, pci_name(vptr->pdev));
3034}
3035
3036static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3037{
8ab6f3f7 3038 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3039 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3040 wol->wolopts |= WAKE_MAGIC;
3041 /*
3042 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3043 wol.wolopts|=WAKE_PHY;
3044 */
3045 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3046 wol->wolopts |= WAKE_UCAST;
3047 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3048 wol->wolopts |= WAKE_ARP;
3049 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3050}
3051
3052static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3053{
8ab6f3f7 3054 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3055
3056 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3057 return -EFAULT;
3058 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3059
3060 /*
3061 if (wol.wolopts & WAKE_PHY) {
3062 vptr->wol_opts|=VELOCITY_WOL_PHY;
3063 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3064 }
3065 */
3066
3067 if (wol->wolopts & WAKE_MAGIC) {
3068 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3069 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3070 }
3071 if (wol->wolopts & WAKE_UCAST) {
3072 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3073 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3074 }
3075 if (wol->wolopts & WAKE_ARP) {
3076 vptr->wol_opts |= VELOCITY_WOL_ARP;
3077 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3078 }
3079 memcpy(vptr->wol_passwd, wol->sopass, 6);
3080 return 0;
3081}
3082
3083static u32 velocity_get_msglevel(struct net_device *dev)
3084{
3085 return msglevel;
3086}
3087
3088static void velocity_set_msglevel(struct net_device *dev, u32 value)
3089{
3090 msglevel = value;
3091}
3092
7282d491 3093static const struct ethtool_ops velocity_ethtool_ops = {
1da177e4
LT		 3094 .get_settings = velocity_get_settings,
3095 .set_settings = velocity_set_settings,
3096 .get_drvinfo = velocity_get_drvinfo,
3097 .get_wol = velocity_ethtool_get_wol,
3098 .set_wol = velocity_ethtool_set_wol,
3099 .get_msglevel = velocity_get_msglevel,
3100 .set_msglevel = velocity_set_msglevel,
3101 .get_link = velocity_get_link,
3102 .begin = velocity_ethtool_up,
3103 .complete = velocity_ethtool_down
3104};
3105
3106/**
3107 * velocity_mii_ioctl - MII ioctl handler
3108 * @dev: network device
3109 * @ifr: the ifreq block for the ioctl
3110 * @cmd: the command
3111 *
3112 * Process MII requests made via ioctl from the network layer. These
3113 * are used by tools like kudzu to interrogate the link state of the
3114 * hardware
3115 */
6aa20a22 3116
1da177e4
LT		 3117static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
3118{
8ab6f3f7 3119 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3120 struct mac_regs __iomem * regs = vptr->mac_regs;
3121 unsigned long flags;
3122 struct mii_ioctl_data *miidata = if_mii(ifr);
3123 int err;
6aa20a22 3124
1da177e4
LT		 3125 switch (cmd) {
3126 case SIOCGMIIPHY:
3127 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
3128 break;
3129 case SIOCGMIIREG:
3130 if (!capable(CAP_NET_ADMIN))
3131 return -EPERM;
3132 if(velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
3133 return -ETIMEDOUT;
3134 break;
3135 case SIOCSMIIREG:
3136 if (!capable(CAP_NET_ADMIN))
3137 return -EPERM;
3138 spin_lock_irqsave(&vptr->lock, flags);
3139 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
3140 spin_unlock_irqrestore(&vptr->lock, flags);
3141 check_connection_type(vptr->mac_regs);
3142 if(err)
3143 return err;
3144 break;
3145 default:
3146 return -EOPNOTSUPP;
3147 }
3148 return 0;
3149}
3150
3151#ifdef CONFIG_PM
3152
3153/**
3154 * velocity_save_context - save registers
6aa20a22 3155 * @vptr: velocity
1da177e4
LT		 3156 * @context: buffer for stored context
3157 *
3158 * Retrieve the current configuration from the velocity hardware
3159 * and stash it in the context structure, for use by the context
3160 * restore functions. This allows us to save things we need across
3161 * power down states
3162 */
6aa20a22 3163
1da177e4
LT		 3164static void velocity_save_context(struct velocity_info *vptr, struct velocity_context * context)
3165{
3166 struct mac_regs __iomem * regs = vptr->mac_regs;
3167 u16 i;
3168 u8 __iomem *ptr = (u8 __iomem *)regs;
3169
3170 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
3171 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3172
3173 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3174 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3175
3176 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3177 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3178
3179}
3180
3181/**
3182 * velocity_restore_context - restore registers
6aa20a22 3183 * @vptr: velocity
1da177e4
LT		 3184 * @context: buffer for stored context
3185 *
6aa20a22 3186 * Reload the register configuration from the velocity context
1da177e4
LT		 3187 * created by velocity_save_context.
3188 */
6aa20a22 3189
1da177e4
LT		 3190static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3191{
3192 struct mac_regs __iomem * regs = vptr->mac_regs;
3193 int i;
3194 u8 __iomem *ptr = (u8 __iomem *)regs;
3195
3196 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) {
3197 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3198 }
3199
3200 /* Just skip cr0 */
3201 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3202 /* Clear */
3203 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3204 /* Set */
3205 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3206 }
3207
3208 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) {
3209 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3210 }
3211
3212 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) {
3213 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3214 }
3215
3216 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) {
3217 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3218 }
3219
3220}
3221
3222/**
3223 * wol_calc_crc - WOL CRC
3224 * @pattern: data pattern
3225 * @mask_pattern: mask
3226 *
3227 * Compute the wake on lan crc hashes for the packet header
3228 * we are interested in.
3229 */
3230
3231static u16 wol_calc_crc(int size, u8 * pattern, u8 *mask_pattern)
3232{
3233 u16 crc = 0xFFFF;
3234 u8 mask;
3235 int i, j;
3236
3237 for (i = 0; i < size; i++) {
3238 mask = mask_pattern[i];
3239
3240 /* Skip this loop if the mask equals to zero */
3241 if (mask == 0x00)
3242 continue;
3243
3244 for (j = 0; j < 8; j++) {
3245 if ((mask & 0x01) == 0) {
3246 mask >>= 1;
3247 continue;
3248 }
3249 mask >>= 1;
3250 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
3251 }
3252 }
3253 /* Finally, invert the result once to get the correct data */
3254 crc = ~crc;
906d66df 3255 return bitrev32(crc) >> 16;
1da177e4
LT		 3256}
3257
3258/**
3259 * velocity_set_wol - set up for wake on lan
3260 * @vptr: velocity to set WOL status on
3261 *
3262 * Set a card up for wake on lan either by unicast or by
3263 * ARP packet.
3264 *
3265 * FIXME: check static buffer is safe here
3266 */
3267
3268static int velocity_set_wol(struct velocity_info *vptr)
3269{
3270 struct mac_regs __iomem * regs = vptr->mac_regs;
3271 static u8 buf[256];
3272 int i;
3273
3274 static u32 mask_pattern[2][4] = {
3275 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
3276 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
3277 };
3278
3279 writew(0xFFFF, &regs->WOLCRClr);
3280 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
3281 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
3282
3283 /*
3284 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3285 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
3286 */
3287
3288 if (vptr->wol_opts & VELOCITY_WOL_UCAST) {
3289 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
3290 }
3291
3292 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
3293 struct arp_packet *arp = (struct arp_packet *) buf;
3294 u16 crc;
3295 memset(buf, 0, sizeof(struct arp_packet) + 7);
3296
3297 for (i = 0; i < 4; i++)
3298 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
3299
3300 arp->type = htons(ETH_P_ARP);
3301 arp->ar_op = htons(1);
3302
3303 memcpy(arp->ar_tip, vptr->ip_addr, 4);
3304
3305 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
3306 (u8 *) & mask_pattern[0][0]);
3307
3308 writew(crc, &regs->PatternCRC[0]);
3309 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
3310 }
3311
3312 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
3313 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
3314
3315 writew(0x0FFF, &regs->WOLSRClr);
3316
3317 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
3318 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3319 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
3320
3321 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
3322 }
3323
3324 if (vptr->mii_status & VELOCITY_SPEED_1000)
3325 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
3326
3327 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
3328
3329 {
3330 u8 GCR;
3331 GCR = readb(&regs->CHIPGCR);
3332 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
3333 writeb(GCR, &regs->CHIPGCR);
3334 }
3335
3336 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
3337 /* Turn on SWPTAG just before entering power mode */
3338 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
3339 /* Go to bed ..... */
3340 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
3341
3342 return 0;
3343}
3344
3345static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3346{
3347 struct net_device *dev = pci_get_drvdata(pdev);
3348 struct velocity_info *vptr = netdev_priv(dev);
3349 unsigned long flags;
3350
3351 if(!netif_running(vptr->dev))
3352 return 0;
3353
3354 netif_device_detach(vptr->dev);
3355
3356 spin_lock_irqsave(&vptr->lock, flags);
3357 pci_save_state(pdev);
3358#ifdef ETHTOOL_GWOL
3359 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3360 velocity_get_ip(vptr);
3361 velocity_save_context(vptr, &vptr->context);
3362 velocity_shutdown(vptr);
3363 velocity_set_wol(vptr);
4a51c0d0 3364 pci_enable_wake(pdev, PCI_D3hot, 1);
1da177e4
LT		 3365 pci_set_power_state(pdev, PCI_D3hot);
3366 } else {
3367 velocity_save_context(vptr, &vptr->context);
3368 velocity_shutdown(vptr);
3369 pci_disable_device(pdev);
3370 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3371 }
3372#else
3373 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3374#endif
3375 spin_unlock_irqrestore(&vptr->lock, flags);
3376 return 0;
3377}
3378
3379static int velocity_resume(struct pci_dev *pdev)
3380{
3381 struct net_device *dev = pci_get_drvdata(pdev);
3382 struct velocity_info *vptr = netdev_priv(dev);
3383 unsigned long flags;
3384 int i;
3385
3386 if(!netif_running(vptr->dev))
3387 return 0;
3388
3389 pci_set_power_state(pdev, PCI_D0);
3390 pci_enable_wake(pdev, 0, 0);
3391 pci_restore_state(pdev);
3392
3393 mac_wol_reset(vptr->mac_regs);
3394
3395 spin_lock_irqsave(&vptr->lock, flags);
3396 velocity_restore_context(vptr, &vptr->context);
3397 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3398 mac_disable_int(vptr->mac_regs);
3399
3400 velocity_tx_srv(vptr, 0);
3401
3402 for (i = 0; i < vptr->num_txq; i++) {
3403 if (vptr->td_used[i]) {
3404 mac_tx_queue_wake(vptr->mac_regs, i);
3405 }
3406 }
3407
3408 mac_enable_int(vptr->mac_regs);
3409 spin_unlock_irqrestore(&vptr->lock, flags);
3410 netif_device_attach(vptr->dev);
3411
3412 return 0;
3413}
3414
ce9f7fe3
RD		 3415#ifdef CONFIG_INET
3416
1da177e4
LT		 3417static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3418{
3419 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
a337499f
DL		 3420 struct net_device *dev = ifa->ifa_dev->dev;
3421 struct velocity_info *vptr;
3422 unsigned long flags;
1da177e4 3423
c346dca1 3424 if (dev_net(dev) != &init_net)
6133fb1a
DL		 3425 return NOTIFY_DONE;
3426
a337499f
DL		 3427 spin_lock_irqsave(&velocity_dev_list_lock, flags);
3428 list_for_each_entry(vptr, &velocity_dev_list, list) {
3429 if (vptr->dev == dev) {
3430 velocity_get_ip(vptr);
3431 break;
1da177e4 3432 }
1da177e4 3433 }
a337499f
DL		 3434 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
3435
1da177e4
LT		 3436 return NOTIFY_DONE;
3437}
ce9f7fe3
RD		 3438
3439#endif
1da177e4 3440#endif
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