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1da177e4
LT
1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
1da177e4
LT
11 * rx_copybreak/alignment
12 * Scatter gather
13 * More testing
14 *
15 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@redhat.com>
16 * Additional fixes and clean up: Francois Romieu
17 *
18 * This source has not been verified for use in safety critical systems.
19 *
20 * Please direct queries about the revamped driver to the linux-kernel
21 * list not VIA.
22 *
23 * Original code:
24 *
25 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
26 * All rights reserved.
27 *
28 * This software may be redistributed and/or modified under
29 * the terms of the GNU General Public License as published by the Free
30 * Software Foundation; either version 2 of the License, or
31 * any later version.
32 *
33 * This program is distributed in the hope that it will be useful, but
34 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
35 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
36 * for more details.
37 *
38 * Author: Chuang Liang-Shing, AJ Jiang
39 *
40 * Date: Jan 24, 2003
41 *
42 * MODULE_LICENSE("GPL");
43 *
44 */
45
46
47#include <linux/module.h>
48#include <linux/types.h>
1da177e4
LT
49#include <linux/init.h>
50#include <linux/mm.h>
51#include <linux/errno.h>
52#include <linux/ioport.h>
53#include <linux/pci.h>
54#include <linux/kernel.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/skbuff.h>
58#include <linux/delay.h>
59#include <linux/timer.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
1da177e4
LT
62#include <linux/string.h>
63#include <linux/wait.h>
64#include <asm/io.h>
65#include <linux/if.h>
1da177e4
LT
66#include <asm/uaccess.h>
67#include <linux/proc_fs.h>
68#include <linux/inetdevice.h>
69#include <linux/reboot.h>
70#include <linux/ethtool.h>
71#include <linux/mii.h>
72#include <linux/in.h>
73#include <linux/if_arp.h>
501e4d24 74#include <linux/if_vlan.h>
1da177e4
LT
75#include <linux/ip.h>
76#include <linux/tcp.h>
77#include <linux/udp.h>
78#include <linux/crc-ccitt.h>
79#include <linux/crc32.h>
80
81#include "via-velocity.h"
82
83
84static int velocity_nics = 0;
85static int msglevel = MSG_LEVEL_INFO;
86
01faccbf
SH
87/**
88 * mac_get_cam_mask - Read a CAM mask
89 * @regs: register block for this velocity
90 * @mask: buffer to store mask
91 *
92 * Fetch the mask bits of the selected CAM and store them into the
93 * provided mask buffer.
94 */
95
96static void mac_get_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
97{
98 int i;
99
100 /* Select CAM mask */
101 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
102
103 writeb(0, &regs->CAMADDR);
104
105 /* read mask */
106 for (i = 0; i < 8; i++)
107 *mask++ = readb(&(regs->MARCAM[i]));
108
109 /* disable CAMEN */
110 writeb(0, &regs->CAMADDR);
111
112 /* Select mar */
113 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
114
115}
116
117
118/**
119 * mac_set_cam_mask - Set a CAM mask
120 * @regs: register block for this velocity
121 * @mask: CAM mask to load
122 *
123 * Store a new mask into a CAM
124 */
125
126static void mac_set_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
127{
128 int i;
129 /* Select CAM mask */
130 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
131
132 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
133
134 for (i = 0; i < 8; i++) {
135 writeb(*mask++, &(regs->MARCAM[i]));
136 }
137 /* disable CAMEN */
138 writeb(0, &regs->CAMADDR);
139
140 /* Select mar */
141 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
142}
143
144static void mac_set_vlan_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
145{
146 int i;
147 /* Select CAM mask */
148 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
149
150 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
151
152 for (i = 0; i < 8; i++) {
153 writeb(*mask++, &(regs->MARCAM[i]));
154 }
155 /* disable CAMEN */
156 writeb(0, &regs->CAMADDR);
157
158 /* Select mar */
159 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
160}
161
162/**
163 * mac_set_cam - set CAM data
164 * @regs: register block of this velocity
165 * @idx: Cam index
166 * @addr: 2 or 6 bytes of CAM data
167 *
168 * Load an address or vlan tag into a CAM
169 */
170
171static void mac_set_cam(struct mac_regs __iomem * regs, int idx, const u8 *addr)
172{
173 int i;
174
175 /* Select CAM mask */
176 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
177
178 idx &= (64 - 1);
179
180 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
181
182 for (i = 0; i < 6; i++) {
183 writeb(*addr++, &(regs->MARCAM[i]));
184 }
185 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
186
187 udelay(10);
188
189 writeb(0, &regs->CAMADDR);
190
191 /* Select mar */
192 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
193}
194
195static void mac_set_vlan_cam(struct mac_regs __iomem * regs, int idx,
196 const u8 *addr)
197{
198
199 /* Select CAM mask */
200 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
201
202 idx &= (64 - 1);
203
204 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
205 writew(*((u16 *) addr), &regs->MARCAM[0]);
206
207 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
208
209 udelay(10);
210
211 writeb(0, &regs->CAMADDR);
212
213 /* Select mar */
214 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
215}
216
217
218/**
219 * mac_wol_reset - reset WOL after exiting low power
220 * @regs: register block of this velocity
221 *
222 * Called after we drop out of wake on lan mode in order to
223 * reset the Wake on lan features. This function doesn't restore
224 * the rest of the logic from the result of sleep/wakeup
225 */
226
227static void mac_wol_reset(struct mac_regs __iomem * regs)
228{
229
230 /* Turn off SWPTAG right after leaving power mode */
231 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
232 /* clear sticky bits */
233 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
234
235 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
236 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
237 /* disable force PME-enable */
238 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
239 /* disable power-event config bit */
240 writew(0xFFFF, &regs->WOLCRClr);
241 /* clear power status */
242 writew(0xFFFF, &regs->WOLSRClr);
243}
1da177e4
LT
244
245static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
7282d491 246static const struct ethtool_ops velocity_ethtool_ops;
1da177e4
LT
247
248/*
249 Define module options
250*/
251
252MODULE_AUTHOR("VIA Networking Technologies, Inc.");
253MODULE_LICENSE("GPL");
254MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
255
256#define VELOCITY_PARAM(N,D) \
257 static int N[MAX_UNITS]=OPTION_DEFAULT;\
258 module_param_array(N, int, NULL, 0); \
259 MODULE_PARM_DESC(N, D);
260
261#define RX_DESC_MIN 64
262#define RX_DESC_MAX 255
263#define RX_DESC_DEF 64
264VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
265
266#define TX_DESC_MIN 16
267#define TX_DESC_MAX 256
268#define TX_DESC_DEF 64
269VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
270
1da177e4
LT
271#define RX_THRESH_MIN 0
272#define RX_THRESH_MAX 3
273#define RX_THRESH_DEF 0
274/* rx_thresh[] is used for controlling the receive fifo threshold.
275 0: indicate the rxfifo threshold is 128 bytes.
276 1: indicate the rxfifo threshold is 512 bytes.
277 2: indicate the rxfifo threshold is 1024 bytes.
278 3: indicate the rxfifo threshold is store & forward.
279*/
280VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
281
282#define DMA_LENGTH_MIN 0
283#define DMA_LENGTH_MAX 7
284#define DMA_LENGTH_DEF 0
285
286/* DMA_length[] is used for controlling the DMA length
287 0: 8 DWORDs
288 1: 16 DWORDs
289 2: 32 DWORDs
290 3: 64 DWORDs
291 4: 128 DWORDs
292 5: 256 DWORDs
293 6: SF(flush till emply)
294 7: SF(flush till emply)
295*/
296VELOCITY_PARAM(DMA_length, "DMA length");
297
1da177e4
LT
298#define IP_ALIG_DEF 0
299/* IP_byte_align[] is used for IP header DWORD byte aligned
300 0: indicate the IP header won't be DWORD byte aligned.(Default) .
301 1: indicate the IP header will be DWORD byte aligned.
302 In some enviroment, the IP header should be DWORD byte aligned,
303 or the packet will be droped when we receive it. (eg: IPVS)
304*/
305VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
306
307#define TX_CSUM_DEF 1
308/* txcsum_offload[] is used for setting the checksum offload ability of NIC.
309 (We only support RX checksum offload now)
310 0: disable csum_offload[checksum offload
311 1: enable checksum offload. (Default)
312*/
313VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
314
315#define FLOW_CNTL_DEF 1
316#define FLOW_CNTL_MIN 1
317#define FLOW_CNTL_MAX 5
318
319/* flow_control[] is used for setting the flow control ability of NIC.
320 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
321 2: enable TX flow control.
322 3: enable RX flow control.
323 4: enable RX/TX flow control.
324 5: disable
325*/
326VELOCITY_PARAM(flow_control, "Enable flow control ability");
327
328#define MED_LNK_DEF 0
329#define MED_LNK_MIN 0
330#define MED_LNK_MAX 4
331/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
332 0: indicate autonegotiation for both speed and duplex mode
333 1: indicate 100Mbps half duplex mode
334 2: indicate 100Mbps full duplex mode
335 3: indicate 10Mbps half duplex mode
336 4: indicate 10Mbps full duplex mode
337
338 Note:
339 if EEPROM have been set to the force mode, this option is ignored
340 by driver.
341*/
342VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
343
344#define VAL_PKT_LEN_DEF 0
345/* ValPktLen[] is used for setting the checksum offload ability of NIC.
346 0: Receive frame with invalid layer 2 length (Default)
347 1: Drop frame with invalid layer 2 length
348*/
349VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
350
351#define WOL_OPT_DEF 0
352#define WOL_OPT_MIN 0
353#define WOL_OPT_MAX 7
354/* wol_opts[] is used for controlling wake on lan behavior.
355 0: Wake up if recevied a magic packet. (Default)
356 1: Wake up if link status is on/off.
357 2: Wake up if recevied an arp packet.
358 4: Wake up if recevied any unicast packet.
359 Those value can be sumed up to support more than one option.
360*/
361VELOCITY_PARAM(wol_opts, "Wake On Lan options");
362
363#define INT_WORKS_DEF 20
364#define INT_WORKS_MIN 10
365#define INT_WORKS_MAX 64
366
367VELOCITY_PARAM(int_works, "Number of packets per interrupt services");
368
369static int rx_copybreak = 200;
370module_param(rx_copybreak, int, 0644);
371MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
372
cabb7667
JG
373static void velocity_init_info(struct pci_dev *pdev, struct velocity_info *vptr,
374 const struct velocity_info_tbl *info);
1da177e4
LT
375static int velocity_get_pci_info(struct velocity_info *, struct pci_dev *pdev);
376static void velocity_print_info(struct velocity_info *vptr);
377static int velocity_open(struct net_device *dev);
378static int velocity_change_mtu(struct net_device *dev, int mtu);
379static int velocity_xmit(struct sk_buff *skb, struct net_device *dev);
7d12e780 380static int velocity_intr(int irq, void *dev_instance);
1da177e4
LT
381static void velocity_set_multi(struct net_device *dev);
382static struct net_device_stats *velocity_get_stats(struct net_device *dev);
383static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
384static int velocity_close(struct net_device *dev);
385static int velocity_receive_frame(struct velocity_info *, int idx);
386static int velocity_alloc_rx_buf(struct velocity_info *, int idx);
387static void velocity_free_rd_ring(struct velocity_info *vptr);
388static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *);
389static int velocity_soft_reset(struct velocity_info *vptr);
390static void mii_init(struct velocity_info *vptr, u32 mii_status);
8a22dddb 391static u32 velocity_get_link(struct net_device *dev);
1da177e4
LT
392static u32 velocity_get_opt_media_mode(struct velocity_info *vptr);
393static void velocity_print_link_status(struct velocity_info *vptr);
394static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs);
395static void velocity_shutdown(struct velocity_info *vptr);
396static void enable_flow_control_ability(struct velocity_info *vptr);
397static void enable_mii_autopoll(struct mac_regs __iomem * regs);
398static int velocity_mii_read(struct mac_regs __iomem *, u8 byIdx, u16 * pdata);
399static int velocity_mii_write(struct mac_regs __iomem *, u8 byMiiAddr, u16 data);
400static u32 mii_check_media_mode(struct mac_regs __iomem * regs);
401static u32 check_connection_type(struct mac_regs __iomem * regs);
402static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status);
403
404#ifdef CONFIG_PM
405
406static int velocity_suspend(struct pci_dev *pdev, pm_message_t state);
407static int velocity_resume(struct pci_dev *pdev);
408
ce9f7fe3
RD
409static DEFINE_SPINLOCK(velocity_dev_list_lock);
410static LIST_HEAD(velocity_dev_list);
411
412#endif
413
414#if defined(CONFIG_PM) && defined(CONFIG_INET)
415
1da177e4
LT
416static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr);
417
418static struct notifier_block velocity_inetaddr_notifier = {
419 .notifier_call = velocity_netdev_event,
420};
421
1da177e4
LT
422static void velocity_register_notifier(void)
423{
424 register_inetaddr_notifier(&velocity_inetaddr_notifier);
425}
426
427static void velocity_unregister_notifier(void)
428{
429 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
430}
431
ce9f7fe3 432#else
1da177e4
LT
433
434#define velocity_register_notifier() do {} while (0)
435#define velocity_unregister_notifier() do {} while (0)
436
ce9f7fe3 437#endif
1da177e4
LT
438
439/*
440 * Internal board variants. At the moment we have only one
441 */
442
4f14b92f 443static struct velocity_info_tbl chip_info_table[] = {
cabb7667
JG
444 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
445 { }
1da177e4
LT
446};
447
448/*
449 * Describe the PCI device identifiers that we support in this
450 * device driver. Used for hotplug autoloading.
451 */
452
e54f4893
JG
453static const struct pci_device_id velocity_id_table[] __devinitdata = {
454 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
455 { }
1da177e4
LT
456};
457
458MODULE_DEVICE_TABLE(pci, velocity_id_table);
459
460/**
461 * get_chip_name - identifier to name
462 * @id: chip identifier
463 *
464 * Given a chip identifier return a suitable description. Returns
465 * a pointer a static string valid while the driver is loaded.
466 */
467
01faccbf 468static const char __devinit *get_chip_name(enum chip_type chip_id)
1da177e4
LT
469{
470 int i;
471 for (i = 0; chip_info_table[i].name != NULL; i++)
472 if (chip_info_table[i].chip_id == chip_id)
473 break;
474 return chip_info_table[i].name;
475}
476
477/**
478 * velocity_remove1 - device unplug
479 * @pdev: PCI device being removed
480 *
481 * Device unload callback. Called on an unplug or on module
482 * unload for each active device that is present. Disconnects
483 * the device from the network layer and frees all the resources
484 */
485
486static void __devexit velocity_remove1(struct pci_dev *pdev)
487{
488 struct net_device *dev = pci_get_drvdata(pdev);
8ab6f3f7 489 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
490
491#ifdef CONFIG_PM
492 unsigned long flags;
493
494 spin_lock_irqsave(&velocity_dev_list_lock, flags);
495 if (!list_empty(&velocity_dev_list))
496 list_del(&vptr->list);
497 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
498#endif
499 unregister_netdev(dev);
500 iounmap(vptr->mac_regs);
501 pci_release_regions(pdev);
502 pci_disable_device(pdev);
503 pci_set_drvdata(pdev, NULL);
504 free_netdev(dev);
505
506 velocity_nics--;
507}
508
509/**
510 * velocity_set_int_opt - parser for integer options
511 * @opt: pointer to option value
512 * @val: value the user requested (or -1 for default)
513 * @min: lowest value allowed
514 * @max: highest value allowed
515 * @def: default value
516 * @name: property name
517 * @dev: device name
518 *
519 * Set an integer property in the module options. This function does
520 * all the verification and checking as well as reporting so that
521 * we don't duplicate code for each option.
522 */
523
524static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, char *devname)
525{
526 if (val == -1)
527 *opt = def;
528 else if (val < min || val > max) {
529 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
530 devname, name, min, max);
531 *opt = def;
532 } else {
533 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
534 devname, name, val);
535 *opt = val;
536 }
537}
538
539/**
540 * velocity_set_bool_opt - parser for boolean options
541 * @opt: pointer to option value
542 * @val: value the user requested (or -1 for default)
543 * @def: default value (yes/no)
544 * @flag: numeric value to set for true.
545 * @name: property name
546 * @dev: device name
547 *
548 * Set a boolean property in the module options. This function does
549 * all the verification and checking as well as reporting so that
550 * we don't duplicate code for each option.
551 */
552
553static void __devinit velocity_set_bool_opt(u32 * opt, int val, int def, u32 flag, char *name, char *devname)
554{
555 (*opt) &= (~flag);
556 if (val == -1)
557 *opt |= (def ? flag : 0);
558 else if (val < 0 || val > 1) {
6aa20a22 559 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT
560 devname, name);
561 *opt |= (def ? flag : 0);
562 } else {
6aa20a22 563 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT
564 devname, name, val ? "TRUE" : "FALSE");
565 *opt |= (val ? flag : 0);
566 }
567}
568
569/**
570 * velocity_get_options - set options on device
571 * @opts: option structure for the device
572 * @index: index of option to use in module options array
573 * @devname: device name
574 *
575 * Turn the module and command options into a single structure
576 * for the current device
577 */
578
579static void __devinit velocity_get_options(struct velocity_opt *opts, int index, char *devname)
580{
581
582 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
583 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
584 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
585 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
501e4d24 586
1da177e4
LT
587 velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname);
588 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
589 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
590 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
591 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
592 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
593 velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname);
594 opts->numrx = (opts->numrx & ~3);
595}
596
597/**
598 * velocity_init_cam_filter - initialise CAM
599 * @vptr: velocity to program
600 *
601 * Initialize the content addressable memory used for filters. Load
602 * appropriately according to the presence of VLAN
603 */
604
605static void velocity_init_cam_filter(struct velocity_info *vptr)
606{
607 struct mac_regs __iomem * regs = vptr->mac_regs;
608
609 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
610 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
611 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
612
613 /* Disable all CAMs */
614 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
615 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
01faccbf
SH
616 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
617 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4 618
d4f73c8e 619 /* Enable VCAMs */
501e4d24 620 if (vptr->vlgrp) {
d4f73c8e
FR
621 unsigned int vid, i = 0;
622
623 if (!vlan_group_get_device(vptr->vlgrp, 0))
624 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
501e4d24 625
d4f73c8e
FR
626 for (vid = 1; (vid < VLAN_VID_MASK); vid++) {
627 if (vlan_group_get_device(vptr->vlgrp, vid)) {
628 mac_set_vlan_cam(regs, i, (u8 *) &vid);
629 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
630 if (++i >= VCAM_SIZE)
631 break;
501e4d24
SH
632 }
633 }
01faccbf 634 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
1da177e4
LT
635 }
636}
637
d4f73c8e
FR
638static void velocity_vlan_rx_register(struct net_device *dev,
639 struct vlan_group *grp)
640{
641 struct velocity_info *vptr = netdev_priv(dev);
642
643 vptr->vlgrp = grp;
644}
645
501e4d24
SH
646static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
647{
648 struct velocity_info *vptr = netdev_priv(dev);
649
650 spin_lock_irq(&vptr->lock);
651 velocity_init_cam_filter(vptr);
652 spin_unlock_irq(&vptr->lock);
653}
654
655static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
656{
657 struct velocity_info *vptr = netdev_priv(dev);
658
659 spin_lock_irq(&vptr->lock);
660 vlan_group_set_device(vptr->vlgrp, vid, NULL);
661 velocity_init_cam_filter(vptr);
662 spin_unlock_irq(&vptr->lock);
663}
664
665
1da177e4
LT
666/**
667 * velocity_rx_reset - handle a receive reset
668 * @vptr: velocity we are resetting
669 *
670 * Reset the ownership and status for the receive ring side.
671 * Hand all the receive queue to the NIC.
672 */
673
674static void velocity_rx_reset(struct velocity_info *vptr)
675{
676
677 struct mac_regs __iomem * regs = vptr->mac_regs;
678 int i;
679
680 vptr->rd_dirty = vptr->rd_filled = vptr->rd_curr = 0;
681
682 /*
683 * Init state, all RD entries belong to the NIC
684 */
685 for (i = 0; i < vptr->options.numrx; ++i)
4a51c0d0 686 vptr->rd_ring[i].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT
687
688 writew(vptr->options.numrx, &regs->RBRDU);
689 writel(vptr->rd_pool_dma, &regs->RDBaseLo);
690 writew(0, &regs->RDIdx);
691 writew(vptr->options.numrx - 1, &regs->RDCSize);
692}
693
694/**
695 * velocity_init_registers - initialise MAC registers
696 * @vptr: velocity to init
697 * @type: type of initialisation (hot or cold)
698 *
699 * Initialise the MAC on a reset or on first set up on the
700 * hardware.
701 */
702
6aa20a22 703static void velocity_init_registers(struct velocity_info *vptr,
1da177e4
LT
704 enum velocity_init_type type)
705{
706 struct mac_regs __iomem * regs = vptr->mac_regs;
707 int i, mii_status;
708
709 mac_wol_reset(regs);
710
711 switch (type) {
712 case VELOCITY_INIT_RESET:
713 case VELOCITY_INIT_WOL:
714
715 netif_stop_queue(vptr->dev);
716
717 /*
718 * Reset RX to prevent RX pointer not on the 4X location
719 */
720 velocity_rx_reset(vptr);
721 mac_rx_queue_run(regs);
722 mac_rx_queue_wake(regs);
723
724 mii_status = velocity_get_opt_media_mode(vptr);
725 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
726 velocity_print_link_status(vptr);
727 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
728 netif_wake_queue(vptr->dev);
729 }
730
731 enable_flow_control_ability(vptr);
732
733 mac_clear_isr(regs);
734 writel(CR0_STOP, &regs->CR0Clr);
6aa20a22 735 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1da177e4
LT
736 &regs->CR0Set);
737
738 break;
739
740 case VELOCITY_INIT_COLD:
741 default:
742 /*
743 * Do reset
744 */
745 velocity_soft_reset(vptr);
746 mdelay(5);
747
748 mac_eeprom_reload(regs);
749 for (i = 0; i < 6; i++) {
750 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
751 }
752 /*
753 * clear Pre_ACPI bit.
754 */
755 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
756 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
757 mac_set_dma_length(regs, vptr->options.DMA_length);
758
759 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
760 /*
761 * Back off algorithm use original IEEE standard
762 */
763 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
764
765 /*
766 * Init CAM filter
767 */
768 velocity_init_cam_filter(vptr);
769
770 /*
771 * Set packet filter: Receive directed and broadcast address
772 */
773 velocity_set_multi(vptr->dev);
774
775 /*
776 * Enable MII auto-polling
777 */
778 enable_mii_autopoll(regs);
779
780 vptr->int_mask = INT_MASK_DEF;
781
4a51c0d0 782 writel(vptr->rd_pool_dma, &regs->RDBaseLo);
1da177e4
LT
783 writew(vptr->options.numrx - 1, &regs->RDCSize);
784 mac_rx_queue_run(regs);
785 mac_rx_queue_wake(regs);
786
787 writew(vptr->options.numtx - 1, &regs->TDCSize);
788
789 for (i = 0; i < vptr->num_txq; i++) {
4a51c0d0 790 writel(vptr->td_pool_dma[i], &regs->TDBaseLo[i]);
1da177e4
LT
791 mac_tx_queue_run(regs, i);
792 }
793
794 init_flow_control_register(vptr);
795
796 writel(CR0_STOP, &regs->CR0Clr);
797 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
798
799 mii_status = velocity_get_opt_media_mode(vptr);
800 netif_stop_queue(vptr->dev);
801
802 mii_init(vptr, mii_status);
803
804 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
805 velocity_print_link_status(vptr);
806 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
807 netif_wake_queue(vptr->dev);
808 }
809
810 enable_flow_control_ability(vptr);
811 mac_hw_mibs_init(regs);
812 mac_write_int_mask(vptr->int_mask, regs);
813 mac_clear_isr(regs);
814
815 }
816}
817
818/**
819 * velocity_soft_reset - soft reset
820 * @vptr: velocity to reset
821 *
822 * Kick off a soft reset of the velocity adapter and then poll
823 * until the reset sequence has completed before returning.
824 */
825
826static int velocity_soft_reset(struct velocity_info *vptr)
827{
828 struct mac_regs __iomem * regs = vptr->mac_regs;
829 int i = 0;
830
831 writel(CR0_SFRST, &regs->CR0Set);
832
833 for (i = 0; i < W_MAX_TIMEOUT; i++) {
834 udelay(5);
835 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
836 break;
837 }
838
839 if (i == W_MAX_TIMEOUT) {
840 writel(CR0_FORSRST, &regs->CR0Set);
841 /* FIXME: PCI POSTING */
842 /* delay 2ms */
843 mdelay(2);
844 }
845 return 0;
846}
847
848/**
849 * velocity_found1 - set up discovered velocity card
850 * @pdev: PCI device
851 * @ent: PCI device table entry that matched
852 *
853 * Configure a discovered adapter from scratch. Return a negative
854 * errno error code on failure paths.
855 */
856
857static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
858{
859 static int first = 1;
860 struct net_device *dev;
861 int i;
cabb7667 862 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
1da177e4
LT
863 struct velocity_info *vptr;
864 struct mac_regs __iomem * regs;
865 int ret = -ENOMEM;
866
e54f4893
JG
867 /* FIXME: this driver, like almost all other ethernet drivers,
868 * can support more than MAX_UNITS.
869 */
1da177e4 870 if (velocity_nics >= MAX_UNITS) {
6aa20a22 871 dev_notice(&pdev->dev, "already found %d NICs.\n",
e54f4893 872 velocity_nics);
1da177e4
LT
873 return -ENODEV;
874 }
875
876 dev = alloc_etherdev(sizeof(struct velocity_info));
e54f4893 877 if (!dev) {
9b91cf9d 878 dev_err(&pdev->dev, "allocate net device failed.\n");
1da177e4
LT
879 goto out;
880 }
6aa20a22 881
1da177e4 882 /* Chain it all together */
6aa20a22 883
1da177e4 884 SET_NETDEV_DEV(dev, &pdev->dev);
8ab6f3f7 885 vptr = netdev_priv(dev);
1da177e4
LT
886
887
888 if (first) {
6aa20a22 889 printk(KERN_INFO "%s Ver. %s\n",
1da177e4
LT
890 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
891 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
892 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
893 first = 0;
894 }
895
896 velocity_init_info(pdev, vptr, info);
897
898 vptr->dev = dev;
899
900 dev->irq = pdev->irq;
901
902 ret = pci_enable_device(pdev);
6aa20a22 903 if (ret < 0)
1da177e4
LT
904 goto err_free_dev;
905
906 ret = velocity_get_pci_info(vptr, pdev);
907 if (ret < 0) {
e54f4893 908 /* error message already printed */
1da177e4
LT
909 goto err_disable;
910 }
911
912 ret = pci_request_regions(pdev, VELOCITY_NAME);
913 if (ret < 0) {
9b91cf9d 914 dev_err(&pdev->dev, "No PCI resources.\n");
1da177e4
LT
915 goto err_disable;
916 }
917
cabb7667 918 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
1da177e4
LT
919 if (regs == NULL) {
920 ret = -EIO;
921 goto err_release_res;
922 }
923
924 vptr->mac_regs = regs;
925
926 mac_wol_reset(regs);
927
928 dev->base_addr = vptr->ioaddr;
929
930 for (i = 0; i < 6; i++)
931 dev->dev_addr[i] = readb(&regs->PAR[i]);
932
933
934 velocity_get_options(&vptr->options, velocity_nics, dev->name);
935
6aa20a22 936 /*
1da177e4
LT
937 * Mask out the options cannot be set to the chip
938 */
6aa20a22 939
1da177e4
LT
940 vptr->options.flags &= info->flags;
941
942 /*
943 * Enable the chip specified capbilities
944 */
6aa20a22 945
1da177e4
LT
946 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
947
948 vptr->wol_opts = vptr->options.wol_opts;
949 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
950
951 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
952
953 dev->irq = pdev->irq;
954 dev->open = velocity_open;
955 dev->hard_start_xmit = velocity_xmit;
956 dev->stop = velocity_close;
957 dev->get_stats = velocity_get_stats;
958 dev->set_multicast_list = velocity_set_multi;
959 dev->do_ioctl = velocity_ioctl;
960 dev->ethtool_ops = &velocity_ethtool_ops;
961 dev->change_mtu = velocity_change_mtu;
501e4d24
SH
962
963 dev->vlan_rx_add_vid = velocity_vlan_rx_add_vid;
964 dev->vlan_rx_kill_vid = velocity_vlan_rx_kill_vid;
d4f73c8e 965 dev->vlan_rx_register = velocity_vlan_rx_register;
501e4d24 966
1da177e4
LT
967#ifdef VELOCITY_ZERO_COPY_SUPPORT
968 dev->features |= NETIF_F_SG;
969#endif
d4f73c8e
FR
970 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
971 NETIF_F_HW_VLAN_RX;
1da177e4 972
501e4d24 973 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM)
9f3f46b5 974 dev->features |= NETIF_F_IP_CSUM;
1da177e4
LT
975
976 ret = register_netdev(dev);
977 if (ret < 0)
978 goto err_iounmap;
979
8a22dddb
FR
980 if (velocity_get_link(dev))
981 netif_carrier_off(dev);
982
1da177e4
LT
983 velocity_print_info(vptr);
984 pci_set_drvdata(pdev, dev);
6aa20a22 985
1da177e4 986 /* and leave the chip powered down */
6aa20a22 987
1da177e4
LT
988 pci_set_power_state(pdev, PCI_D3hot);
989#ifdef CONFIG_PM
990 {
991 unsigned long flags;
992
993 spin_lock_irqsave(&velocity_dev_list_lock, flags);
994 list_add(&vptr->list, &velocity_dev_list);
995 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
996 }
997#endif
998 velocity_nics++;
999out:
1000 return ret;
1001
1002err_iounmap:
1003 iounmap(regs);
1004err_release_res:
1005 pci_release_regions(pdev);
1006err_disable:
1007 pci_disable_device(pdev);
1008err_free_dev:
1009 free_netdev(dev);
1010 goto out;
1011}
1012
1013/**
1014 * velocity_print_info - per driver data
1015 * @vptr: velocity
1016 *
1017 * Print per driver data as the kernel driver finds Velocity
1018 * hardware
1019 */
1020
1021static void __devinit velocity_print_info(struct velocity_info *vptr)
1022{
1023 struct net_device *dev = vptr->dev;
1024
1025 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
6aa20a22
JG
1026 printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
1027 dev->name,
1028 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1da177e4
LT
1029 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1030}
1031
1032/**
1033 * velocity_init_info - init private data
1034 * @pdev: PCI device
1035 * @vptr: Velocity info
1036 * @info: Board type
1037 *
1038 * Set up the initial velocity_info struct for the device that has been
1039 * discovered.
1040 */
1041
cabb7667
JG
1042static void __devinit velocity_init_info(struct pci_dev *pdev,
1043 struct velocity_info *vptr,
1044 const struct velocity_info_tbl *info)
1da177e4
LT
1045{
1046 memset(vptr, 0, sizeof(struct velocity_info));
1047
1048 vptr->pdev = pdev;
1049 vptr->chip_id = info->chip_id;
1da177e4
LT
1050 vptr->num_txq = info->txqueue;
1051 vptr->multicast_limit = MCAM_SIZE;
1052 spin_lock_init(&vptr->lock);
1053 INIT_LIST_HEAD(&vptr->list);
1054}
1055
1056/**
1057 * velocity_get_pci_info - retrieve PCI info for device
1058 * @vptr: velocity device
1059 * @pdev: PCI device it matches
1060 *
1061 * Retrieve the PCI configuration space data that interests us from
1062 * the kernel PCI layer
1063 */
1064
1065static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
1066{
44c10138 1067 vptr->rev_id = pdev->revision;
6aa20a22 1068
1da177e4
LT
1069 pci_set_master(pdev);
1070
1071 vptr->ioaddr = pci_resource_start(pdev, 0);
1072 vptr->memaddr = pci_resource_start(pdev, 1);
6aa20a22 1073
e54f4893 1074 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
9b91cf9d 1075 dev_err(&pdev->dev,
e54f4893 1076 "region #0 is not an I/O resource, aborting.\n");
1da177e4
LT
1077 return -EINVAL;
1078 }
1079
e54f4893 1080 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
9b91cf9d 1081 dev_err(&pdev->dev,
e54f4893 1082 "region #1 is an I/O resource, aborting.\n");
1da177e4
LT
1083 return -EINVAL;
1084 }
1085
cabb7667 1086 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
9b91cf9d 1087 dev_err(&pdev->dev, "region #1 is too small.\n");
1da177e4
LT
1088 return -EINVAL;
1089 }
1090 vptr->pdev = pdev;
1091
1092 return 0;
1093}
1094
1095/**
1096 * velocity_init_rings - set up DMA rings
1097 * @vptr: Velocity to set up
1098 *
1099 * Allocate PCI mapped DMA rings for the receive and transmit layer
1100 * to use.
1101 */
1102
1103static int velocity_init_rings(struct velocity_info *vptr)
1104{
8ac53afc
FR
1105 struct velocity_opt *opt = &vptr->options;
1106 const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
1107 const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
1108 struct pci_dev *pdev = vptr->pdev;
1da177e4 1109 dma_addr_t pool_dma;
8ac53afc
FR
1110 void *pool;
1111 unsigned int i;
1da177e4
LT
1112
1113 /*
8ac53afc
FR
1114 * Allocate all RD/TD rings a single pool.
1115 *
1da177e4
LT
1116 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1117 * alignment
1118 */
8ac53afc
FR
1119 pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->num_txq +
1120 rx_ring_size, &pool_dma);
1121 if (!pool) {
1122 dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
1123 vptr->dev->name);
1da177e4
LT
1124 return -ENOMEM;
1125 }
1126
8ac53afc 1127 vptr->rd_ring = pool;
1da177e4
LT
1128 vptr->rd_pool_dma = pool_dma;
1129
8ac53afc
FR
1130 pool += rx_ring_size;
1131 pool_dma += rx_ring_size;
1da177e4 1132
8ac53afc
FR
1133 for (i = 0; i < vptr->num_txq; i++) {
1134 vptr->td_rings[i] = pool;
1da177e4 1135 vptr->td_pool_dma[i] = pool_dma;
8ac53afc
FR
1136 pool += tx_ring_size;
1137 pool_dma += tx_ring_size;
1da177e4 1138 }
8ac53afc 1139
1da177e4
LT
1140 return 0;
1141}
1142
1143/**
1144 * velocity_free_rings - free PCI ring pointers
1145 * @vptr: Velocity to free from
1146 *
1147 * Clean up the PCI ring buffers allocated to this velocity.
1148 */
1149
1150static void velocity_free_rings(struct velocity_info *vptr)
1151{
580a6902
FR
1152 const int size = vptr->options.numrx * sizeof(struct rx_desc) +
1153 vptr->options.numtx * sizeof(struct tx_desc) * vptr->num_txq;
1da177e4
LT
1154
1155 pci_free_consistent(vptr->pdev, size, vptr->rd_ring, vptr->rd_pool_dma);
1da177e4
LT
1156}
1157
28133176 1158static void velocity_give_many_rx_descs(struct velocity_info *vptr)
1da177e4
LT
1159{
1160 struct mac_regs __iomem *regs = vptr->mac_regs;
1161 int avail, dirty, unusable;
1162
1163 /*
1164 * RD number must be equal to 4X per hardware spec
1165 * (programming guide rev 1.20, p.13)
1166 */
1167 if (vptr->rd_filled < 4)
1168 return;
1169
1170 wmb();
1171
1172 unusable = vptr->rd_filled & 0x0003;
1173 dirty = vptr->rd_dirty - unusable;
1174 for (avail = vptr->rd_filled & 0xfffc; avail; avail--) {
1175 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
4a51c0d0 1176 vptr->rd_ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT
1177 }
1178
1179 writew(vptr->rd_filled & 0xfffc, &regs->RBRDU);
1180 vptr->rd_filled = unusable;
1181}
1182
1183static int velocity_rx_refill(struct velocity_info *vptr)
1184{
28133176 1185 int dirty = vptr->rd_dirty, done = 0;
1da177e4
LT
1186
1187 do {
1188 struct rx_desc *rd = vptr->rd_ring + dirty;
1189
1190 /* Fine for an all zero Rx desc at init time as well */
4a51c0d0 1191 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT
1192 break;
1193
1194 if (!vptr->rd_info[dirty].skb) {
28133176 1195 if (velocity_alloc_rx_buf(vptr, dirty) < 0)
1da177e4
LT
1196 break;
1197 }
1198 done++;
6aa20a22 1199 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1da177e4
LT
1200 } while (dirty != vptr->rd_curr);
1201
1202 if (done) {
1203 vptr->rd_dirty = dirty;
1204 vptr->rd_filled += done;
1da177e4
LT
1205 }
1206
28133176 1207 return done;
1da177e4
LT
1208}
1209
9088d9a4
FR
1210static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
1211{
1212 vptr->rx_buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
1213}
1214
1da177e4
LT
1215/**
1216 * velocity_init_rd_ring - set up receive ring
1217 * @vptr: velocity to configure
1218 *
1219 * Allocate and set up the receive buffers for each ring slot and
1220 * assign them to the network adapter.
1221 */
1222
1223static int velocity_init_rd_ring(struct velocity_info *vptr)
1224{
28133176 1225 int ret = -ENOMEM;
48f6b053 1226
ae94607d
MK
1227 vptr->rd_info = kcalloc(vptr->options.numrx,
1228 sizeof(struct velocity_rd_info), GFP_KERNEL);
1229 if (!vptr->rd_info)
28133176 1230 goto out;
1da177e4
LT
1231
1232 vptr->rd_filled = vptr->rd_dirty = vptr->rd_curr = 0;
1233
28133176 1234 if (velocity_rx_refill(vptr) != vptr->options.numrx) {
1da177e4
LT
1235 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1236 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1237 velocity_free_rd_ring(vptr);
28133176 1238 goto out;
1da177e4 1239 }
ae94607d 1240
28133176
FR
1241 ret = 0;
1242out:
1da177e4
LT
1243 return ret;
1244}
1245
1246/**
1247 * velocity_free_rd_ring - free receive ring
1248 * @vptr: velocity to clean up
1249 *
1250 * Free the receive buffers for each ring slot and any
1251 * attached socket buffers that need to go away.
1252 */
1253
1254static void velocity_free_rd_ring(struct velocity_info *vptr)
1255{
1256 int i;
1257
1258 if (vptr->rd_info == NULL)
1259 return;
1260
1261 for (i = 0; i < vptr->options.numrx; i++) {
1262 struct velocity_rd_info *rd_info = &(vptr->rd_info[i]);
b3c3e7d7
FR
1263 struct rx_desc *rd = vptr->rd_ring + i;
1264
1265 memset(rd, 0, sizeof(*rd));
1da177e4
LT
1266
1267 if (!rd_info->skb)
1268 continue;
1269 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
1270 PCI_DMA_FROMDEVICE);
1271 rd_info->skb_dma = (dma_addr_t) NULL;
1272
1273 dev_kfree_skb(rd_info->skb);
1274 rd_info->skb = NULL;
1275 }
1276
1277 kfree(vptr->rd_info);
1278 vptr->rd_info = NULL;
1279}
1280
1281/**
1282 * velocity_init_td_ring - set up transmit ring
1283 * @vptr: velocity
1284 *
1285 * Set up the transmit ring and chain the ring pointers together.
1286 * Returns zero on success or a negative posix errno code for
1287 * failure.
1288 */
6aa20a22 1289
1da177e4
LT
1290static int velocity_init_td_ring(struct velocity_info *vptr)
1291{
1da177e4 1292 dma_addr_t curr;
580a6902 1293 unsigned int j;
1da177e4
LT
1294
1295 /* Init the TD ring entries */
1296 for (j = 0; j < vptr->num_txq; j++) {
1297 curr = vptr->td_pool_dma[j];
1298
ae94607d
MK
1299 vptr->td_infos[j] = kcalloc(vptr->options.numtx,
1300 sizeof(struct velocity_td_info),
1301 GFP_KERNEL);
1302 if (!vptr->td_infos[j]) {
1da177e4
LT
1303 while(--j >= 0)
1304 kfree(vptr->td_infos[j]);
1305 return -ENOMEM;
1306 }
1da177e4 1307
1da177e4
LT
1308 vptr->td_tail[j] = vptr->td_curr[j] = vptr->td_used[j] = 0;
1309 }
1310 return 0;
1311}
1312
1313/*
1314 * FIXME: could we merge this with velocity_free_tx_buf ?
1315 */
1316
1317static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1318 int q, int n)
1319{
1320 struct velocity_td_info * td_info = &(vptr->td_infos[q][n]);
1321 int i;
6aa20a22 1322
1da177e4
LT
1323 if (td_info == NULL)
1324 return;
6aa20a22 1325
1da177e4
LT
1326 if (td_info->skb) {
1327 for (i = 0; i < td_info->nskb_dma; i++)
1328 {
1329 if (td_info->skb_dma[i]) {
6aa20a22 1330 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1da177e4
LT
1331 td_info->skb->len, PCI_DMA_TODEVICE);
1332 td_info->skb_dma[i] = (dma_addr_t) NULL;
1333 }
1334 }
1335 dev_kfree_skb(td_info->skb);
1336 td_info->skb = NULL;
1337 }
1338}
1339
1340/**
1341 * velocity_free_td_ring - free td ring
1342 * @vptr: velocity
1343 *
1344 * Free up the transmit ring for this particular velocity adapter.
1345 * We free the ring contents but not the ring itself.
1346 */
6aa20a22 1347
1da177e4
LT
1348static void velocity_free_td_ring(struct velocity_info *vptr)
1349{
1350 int i, j;
1351
1352 for (j = 0; j < vptr->num_txq; j++) {
1353 if (vptr->td_infos[j] == NULL)
1354 continue;
1355 for (i = 0; i < vptr->options.numtx; i++) {
1356 velocity_free_td_ring_entry(vptr, j, i);
1357
1358 }
b4558ea9
JJ
1359 kfree(vptr->td_infos[j]);
1360 vptr->td_infos[j] = NULL;
1da177e4
LT
1361 }
1362}
1363
1364/**
1365 * velocity_rx_srv - service RX interrupt
1366 * @vptr: velocity
1367 * @status: adapter status (unused)
1368 *
1369 * Walk the receive ring of the velocity adapter and remove
1370 * any received packets from the receive queue. Hand the ring
1371 * slots back to the adapter for reuse.
1372 */
6aa20a22 1373
1da177e4
LT
1374static int velocity_rx_srv(struct velocity_info *vptr, int status)
1375{
1376 struct net_device_stats *stats = &vptr->stats;
1377 int rd_curr = vptr->rd_curr;
1378 int works = 0;
1379
1380 do {
1381 struct rx_desc *rd = vptr->rd_ring + rd_curr;
1382
1383 if (!vptr->rd_info[rd_curr].skb)
1384 break;
1385
4a51c0d0 1386 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT
1387 break;
1388
1389 rmb();
1390
1391 /*
1392 * Don't drop CE or RL error frame although RXOK is off
1393 */
4a51c0d0 1394 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
1da177e4
LT
1395 if (velocity_receive_frame(vptr, rd_curr) < 0)
1396 stats->rx_dropped++;
1397 } else {
1398 if (rd->rdesc0.RSR & RSR_CRC)
1399 stats->rx_crc_errors++;
1400 if (rd->rdesc0.RSR & RSR_FAE)
1401 stats->rx_frame_errors++;
1402
1403 stats->rx_dropped++;
1404 }
1405
4a51c0d0 1406 rd->size |= RX_INTEN;
1da177e4
LT
1407
1408 vptr->dev->last_rx = jiffies;
1409
1410 rd_curr++;
1411 if (rd_curr >= vptr->options.numrx)
1412 rd_curr = 0;
1413 } while (++works <= 15);
1414
1415 vptr->rd_curr = rd_curr;
1416
28133176
FR
1417 if ((works > 0) && (velocity_rx_refill(vptr) > 0))
1418 velocity_give_many_rx_descs(vptr);
1da177e4
LT
1419
1420 VAR_USED(stats);
1421 return works;
1422}
1423
1424/**
1425 * velocity_rx_csum - checksum process
1426 * @rd: receive packet descriptor
1427 * @skb: network layer packet buffer
1428 *
1429 * Process the status bits for the received packet and determine
1430 * if the checksum was computed and verified by the hardware
1431 */
6aa20a22 1432
1da177e4
LT
1433static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1434{
1435 skb->ip_summed = CHECKSUM_NONE;
1436
1437 if (rd->rdesc1.CSM & CSM_IPKT) {
1438 if (rd->rdesc1.CSM & CSM_IPOK) {
6aa20a22 1439 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1da177e4
LT
1440 (rd->rdesc1.CSM & CSM_UDPKT)) {
1441 if (!(rd->rdesc1.CSM & CSM_TUPOK)) {
1442 return;
1443 }
1444 }
1445 skb->ip_summed = CHECKSUM_UNNECESSARY;
1446 }
1447 }
1448}
1449
1450/**
1451 * velocity_rx_copy - in place Rx copy for small packets
1452 * @rx_skb: network layer packet buffer candidate
1453 * @pkt_size: received data size
1454 * @rd: receive packet descriptor
1455 * @dev: network device
1456 *
1457 * Replace the current skb that is scheduled for Rx processing by a
1458 * shorter, immediatly allocated skb, if the received packet is small
1459 * enough. This function returns a negative value if the received
1460 * packet is too big or if memory is exhausted.
1461 */
c73d2589
SH
1462static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1463 struct velocity_info *vptr)
1da177e4
LT
1464{
1465 int ret = -1;
1da177e4
LT
1466 if (pkt_size < rx_copybreak) {
1467 struct sk_buff *new_skb;
1468
c73d2589 1469 new_skb = netdev_alloc_skb(vptr->dev, pkt_size + 2);
1da177e4 1470 if (new_skb) {
1da177e4 1471 new_skb->ip_summed = rx_skb[0]->ip_summed;
c73d2589
SH
1472 skb_reserve(new_skb, 2);
1473 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
1da177e4
LT
1474 *rx_skb = new_skb;
1475 ret = 0;
1476 }
6aa20a22 1477
1da177e4
LT
1478 }
1479 return ret;
1480}
1481
1482/**
1483 * velocity_iph_realign - IP header alignment
1484 * @vptr: velocity we are handling
1485 * @skb: network layer packet buffer
1486 * @pkt_size: received data size
1487 *
1488 * Align IP header on a 2 bytes boundary. This behavior can be
1489 * configured by the user.
1490 */
1491static inline void velocity_iph_realign(struct velocity_info *vptr,
1492 struct sk_buff *skb, int pkt_size)
1493{
1da177e4 1494 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
c03571a3 1495 memmove(skb->data + 2, skb->data, pkt_size);
1da177e4
LT
1496 skb_reserve(skb, 2);
1497 }
1498}
1499
1500/**
1501 * velocity_receive_frame - received packet processor
1502 * @vptr: velocity we are handling
1503 * @idx: ring index
6aa20a22 1504 *
1da177e4
LT
1505 * A packet has arrived. We process the packet and if appropriate
1506 * pass the frame up the network stack
1507 */
6aa20a22 1508
1da177e4
LT
1509static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1510{
1511 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
1512 struct net_device_stats *stats = &vptr->stats;
1513 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
1514 struct rx_desc *rd = &(vptr->rd_ring[idx]);
4a51c0d0 1515 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
1da177e4
LT
1516 struct sk_buff *skb;
1517
1518 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
1519 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
1520 stats->rx_length_errors++;
1521 return -EINVAL;
1522 }
1523
1524 if (rd->rdesc0.RSR & RSR_MAR)
1525 vptr->stats.multicast++;
1526
1527 skb = rd_info->skb;
1da177e4
LT
1528
1529 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
1530 vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
1531
1532 /*
1533 * Drop frame not meeting IEEE 802.3
1534 */
6aa20a22 1535
1da177e4
LT
1536 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
1537 if (rd->rdesc0.RSR & RSR_RL) {
1538 stats->rx_length_errors++;
1539 return -EINVAL;
1540 }
1541 }
1542
1543 pci_action = pci_dma_sync_single_for_device;
1544
1545 velocity_rx_csum(rd, skb);
1546
1547 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
1548 velocity_iph_realign(vptr, skb, pkt_len);
1549 pci_action = pci_unmap_single;
1550 rd_info->skb = NULL;
1551 }
1552
1553 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
1554 PCI_DMA_FROMDEVICE);
1555
1556 skb_put(skb, pkt_len - 4);
4c13eb66 1557 skb->protocol = eth_type_trans(skb, vptr->dev);
1da177e4 1558
d4f73c8e
FR
1559 if (vptr->vlgrp && (rd->rdesc0.RSR & RSR_DETAG)) {
1560 vlan_hwaccel_rx(skb, vptr->vlgrp,
1561 swab16(le16_to_cpu(rd->rdesc1.PQTAG)));
1562 } else
1563 netif_rx(skb);
1564
1da177e4 1565 stats->rx_bytes += pkt_len;
1da177e4
LT
1566
1567 return 0;
1568}
1569
1570/**
1571 * velocity_alloc_rx_buf - allocate aligned receive buffer
1572 * @vptr: velocity
1573 * @idx: ring index
1574 *
1575 * Allocate a new full sized buffer for the reception of a frame and
1576 * map it into PCI space for the hardware to use. The hardware
1577 * requires *64* byte alignment of the buffer which makes life
1578 * less fun than would be ideal.
1579 */
6aa20a22 1580
1da177e4
LT
1581static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1582{
1583 struct rx_desc *rd = &(vptr->rd_ring[idx]);
1584 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
1585
c73d2589 1586 rd_info->skb = netdev_alloc_skb(vptr->dev, vptr->rx_buf_sz + 64);
1da177e4
LT
1587 if (rd_info->skb == NULL)
1588 return -ENOMEM;
1589
1590 /*
1591 * Do the gymnastics to get the buffer head for data at
1592 * 64byte alignment.
1593 */
689be439 1594 skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63);
689be439 1595 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data, vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
6aa20a22 1596
1da177e4
LT
1597 /*
1598 * Fill in the descriptor to match
6aa20a22
JG
1599 */
1600
1da177e4 1601 *((u32 *) & (rd->rdesc0)) = 0;
4a51c0d0 1602 rd->size = cpu_to_le16(vptr->rx_buf_sz) | RX_INTEN;
1da177e4
LT
1603 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1604 rd->pa_high = 0;
1605 return 0;
1606}
1607
1608/**
1609 * tx_srv - transmit interrupt service
1610 * @vptr; Velocity
1611 * @status:
1612 *
1613 * Scan the queues looking for transmitted packets that
1614 * we can complete and clean up. Update any statistics as
3a4fa0a2 1615 * necessary/
1da177e4 1616 */
6aa20a22 1617
1da177e4
LT
1618static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1619{
1620 struct tx_desc *td;
1621 int qnum;
1622 int full = 0;
1623 int idx;
1624 int works = 0;
1625 struct velocity_td_info *tdinfo;
1626 struct net_device_stats *stats = &vptr->stats;
1627
1628 for (qnum = 0; qnum < vptr->num_txq; qnum++) {
6aa20a22 1629 for (idx = vptr->td_tail[qnum]; vptr->td_used[qnum] > 0;
1da177e4
LT
1630 idx = (idx + 1) % vptr->options.numtx) {
1631
1632 /*
1633 * Get Tx Descriptor
1634 */
1635 td = &(vptr->td_rings[qnum][idx]);
1636 tdinfo = &(vptr->td_infos[qnum][idx]);
1637
4a51c0d0 1638 if (td->tdesc0.len & OWNED_BY_NIC)
1da177e4
LT
1639 break;
1640
1641 if ((works++ > 15))
1642 break;
1643
1644 if (td->tdesc0.TSR & TSR0_TERR) {
1645 stats->tx_errors++;
1646 stats->tx_dropped++;
1647 if (td->tdesc0.TSR & TSR0_CDH)
1648 stats->tx_heartbeat_errors++;
1649 if (td->tdesc0.TSR & TSR0_CRS)
1650 stats->tx_carrier_errors++;
1651 if (td->tdesc0.TSR & TSR0_ABT)
1652 stats->tx_aborted_errors++;
1653 if (td->tdesc0.TSR & TSR0_OWC)
1654 stats->tx_window_errors++;
1655 } else {
1656 stats->tx_packets++;
1657 stats->tx_bytes += tdinfo->skb->len;
1658 }
1659 velocity_free_tx_buf(vptr, tdinfo);
1660 vptr->td_used[qnum]--;
1661 }
1662 vptr->td_tail[qnum] = idx;
1663
1664 if (AVAIL_TD(vptr, qnum) < 1) {
1665 full = 1;
1666 }
1667 }
1668 /*
1669 * Look to see if we should kick the transmit network
1670 * layer for more work.
1671 */
1672 if (netif_queue_stopped(vptr->dev) && (full == 0)
1673 && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1674 netif_wake_queue(vptr->dev);
1675 }
1676 return works;
1677}
1678
1679/**
1680 * velocity_print_link_status - link status reporting
1681 * @vptr: velocity to report on
1682 *
1683 * Turn the link status of the velocity card into a kernel log
1684 * description of the new link state, detailing speed and duplex
1685 * status
1686 */
1687
1688static void velocity_print_link_status(struct velocity_info *vptr)
1689{
1690
1691 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1692 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1693 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
b4fea61a 1694 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
1da177e4
LT
1695
1696 if (vptr->mii_status & VELOCITY_SPEED_1000)
1697 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1698 else if (vptr->mii_status & VELOCITY_SPEED_100)
1699 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1700 else
1701 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1702
1703 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1704 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1705 else
1706 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1707 } else {
1708 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1709 switch (vptr->options.spd_dpx) {
1710 case SPD_DPX_100_HALF:
1711 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1712 break;
1713 case SPD_DPX_100_FULL:
1714 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1715 break;
1716 case SPD_DPX_10_HALF:
1717 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1718 break;
1719 case SPD_DPX_10_FULL:
1720 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1721 break;
1722 default:
1723 break;
1724 }
1725 }
1726}
1727
1728/**
1729 * velocity_error - handle error from controller
1730 * @vptr: velocity
1731 * @status: card status
1732 *
1733 * Process an error report from the hardware and attempt to recover
6aa20a22 1734 * the card itself. At the moment we cannot recover from some
1da177e4
LT
1735 * theoretically impossible errors but this could be fixed using
1736 * the pci_device_failed logic to bounce the hardware
1737 *
1738 */
6aa20a22 1739
1da177e4
LT
1740static void velocity_error(struct velocity_info *vptr, int status)
1741{
1742
1743 if (status & ISR_TXSTLI) {
1744 struct mac_regs __iomem * regs = vptr->mac_regs;
1745
0e6ff158 1746 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1da177e4
LT
1747 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1748 writew(TRDCSR_RUN, &regs->TDCSRClr);
1749 netif_stop_queue(vptr->dev);
6aa20a22 1750
1da177e4
LT
1751 /* FIXME: port over the pci_device_failed code and use it
1752 here */
1753 }
1754
1755 if (status & ISR_SRCI) {
1756 struct mac_regs __iomem * regs = vptr->mac_regs;
1757 int linked;
1758
1759 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1760 vptr->mii_status = check_connection_type(regs);
1761
1762 /*
6aa20a22 1763 * If it is a 3119, disable frame bursting in
1da177e4
LT
1764 * halfduplex mode and enable it in fullduplex
1765 * mode
1766 */
1767 if (vptr->rev_id < REV_ID_VT3216_A0) {
1768 if (vptr->mii_status | VELOCITY_DUPLEX_FULL)
1769 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1770 else
1771 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1772 }
1773 /*
1774 * Only enable CD heart beat counter in 10HD mode
1775 */
1776 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) {
1777 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1778 } else {
1779 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1780 }
1781 }
1782 /*
1783 * Get link status from PHYSR0
1784 */
1785 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1786
1787 if (linked) {
1788 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
8a22dddb 1789 netif_carrier_on(vptr->dev);
1da177e4
LT
1790 } else {
1791 vptr->mii_status |= VELOCITY_LINK_FAIL;
8a22dddb 1792 netif_carrier_off(vptr->dev);
1da177e4
LT
1793 }
1794
1795 velocity_print_link_status(vptr);
1796 enable_flow_control_ability(vptr);
1797
1798 /*
6aa20a22 1799 * Re-enable auto-polling because SRCI will disable
1da177e4
LT
1800 * auto-polling
1801 */
6aa20a22 1802
1da177e4
LT
1803 enable_mii_autopoll(regs);
1804
1805 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1806 netif_stop_queue(vptr->dev);
1807 else
1808 netif_wake_queue(vptr->dev);
1809
1810 };
1811 if (status & ISR_MIBFI)
1812 velocity_update_hw_mibs(vptr);
1813 if (status & ISR_LSTEI)
1814 mac_rx_queue_wake(vptr->mac_regs);
1815}
1816
1817/**
1818 * velocity_free_tx_buf - free transmit buffer
1819 * @vptr: velocity
1820 * @tdinfo: buffer
1821 *
1822 * Release an transmit buffer. If the buffer was preallocated then
1823 * recycle it, if not then unmap the buffer.
1824 */
6aa20a22 1825
1da177e4
LT
1826static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo)
1827{
1828 struct sk_buff *skb = tdinfo->skb;
1829 int i;
1830
1831 /*
1832 * Don't unmap the pre-allocated tx_bufs
1833 */
580a6902 1834 if (tdinfo->skb_dma) {
1da177e4
LT
1835
1836 for (i = 0; i < tdinfo->nskb_dma; i++) {
1837#ifdef VELOCITY_ZERO_COPY_SUPPORT
4a51c0d0 1838 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], le16_to_cpu(td->tdesc1.len), PCI_DMA_TODEVICE);
1da177e4
LT
1839#else
1840 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], skb->len, PCI_DMA_TODEVICE);
1841#endif
1842 tdinfo->skb_dma[i] = 0;
1843 }
1844 }
1845 dev_kfree_skb_irq(skb);
1846 tdinfo->skb = NULL;
1847}
1848
1849/**
1850 * velocity_open - interface activation callback
1851 * @dev: network layer device to open
1852 *
1853 * Called when the network layer brings the interface up. Returns
1854 * a negative posix error code on failure, or zero on success.
1855 *
1856 * All the ring allocation and set up is done on open for this
1857 * adapter to minimise memory usage when inactive
1858 */
6aa20a22 1859
1da177e4
LT
1860static int velocity_open(struct net_device *dev)
1861{
8ab6f3f7 1862 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
1863 int ret;
1864
9088d9a4
FR
1865 velocity_set_rxbufsize(vptr, dev->mtu);
1866
1da177e4
LT
1867 ret = velocity_init_rings(vptr);
1868 if (ret < 0)
1869 goto out;
1870
1871 ret = velocity_init_rd_ring(vptr);
1872 if (ret < 0)
1873 goto err_free_desc_rings;
1874
1875 ret = velocity_init_td_ring(vptr);
1876 if (ret < 0)
1877 goto err_free_rd_ring;
6aa20a22
JG
1878
1879 /* Ensure chip is running */
1da177e4 1880 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 1881
28133176
FR
1882 velocity_give_many_rx_descs(vptr);
1883
1da177e4
LT
1884 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1885
1fb9df5d 1886 ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED,
1da177e4
LT
1887 dev->name, dev);
1888 if (ret < 0) {
1889 /* Power down the chip */
1890 pci_set_power_state(vptr->pdev, PCI_D3hot);
1891 goto err_free_td_ring;
1892 }
1893
1894 mac_enable_int(vptr->mac_regs);
1895 netif_start_queue(dev);
1896 vptr->flags |= VELOCITY_FLAGS_OPENED;
1897out:
1898 return ret;
1899
1900err_free_td_ring:
1901 velocity_free_td_ring(vptr);
1902err_free_rd_ring:
1903 velocity_free_rd_ring(vptr);
1904err_free_desc_rings:
1905 velocity_free_rings(vptr);
1906 goto out;
1907}
1908
6aa20a22 1909/**
1da177e4
LT
1910 * velocity_change_mtu - MTU change callback
1911 * @dev: network device
1912 * @new_mtu: desired MTU
1913 *
1914 * Handle requests from the networking layer for MTU change on
1915 * this interface. It gets called on a change by the network layer.
1916 * Return zero for success or negative posix error code.
1917 */
6aa20a22 1918
1da177e4
LT
1919static int velocity_change_mtu(struct net_device *dev, int new_mtu)
1920{
8ab6f3f7 1921 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
1922 unsigned long flags;
1923 int oldmtu = dev->mtu;
1924 int ret = 0;
1925
1926 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
6aa20a22 1927 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
1da177e4
LT
1928 vptr->dev->name);
1929 return -EINVAL;
1930 }
1931
bd7b3f34
SH
1932 if (!netif_running(dev)) {
1933 dev->mtu = new_mtu;
1934 return 0;
1935 }
1936
1da177e4
LT
1937 if (new_mtu != oldmtu) {
1938 spin_lock_irqsave(&vptr->lock, flags);
1939
1940 netif_stop_queue(dev);
1941 velocity_shutdown(vptr);
1942
1943 velocity_free_td_ring(vptr);
1944 velocity_free_rd_ring(vptr);
1945
1946 dev->mtu = new_mtu;
1da177e4 1947
9088d9a4
FR
1948 velocity_set_rxbufsize(vptr, new_mtu);
1949
1da177e4
LT
1950 ret = velocity_init_rd_ring(vptr);
1951 if (ret < 0)
1952 goto out_unlock;
1953
1954 ret = velocity_init_td_ring(vptr);
1955 if (ret < 0)
1956 goto out_unlock;
1957
1958 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1959
1960 mac_enable_int(vptr->mac_regs);
1961 netif_start_queue(dev);
1962out_unlock:
1963 spin_unlock_irqrestore(&vptr->lock, flags);
1964 }
1965
1966 return ret;
1967}
1968
1969/**
1970 * velocity_shutdown - shut down the chip
1971 * @vptr: velocity to deactivate
1972 *
1973 * Shuts down the internal operations of the velocity and
1974 * disables interrupts, autopolling, transmit and receive
1975 */
6aa20a22 1976
1da177e4
LT
1977static void velocity_shutdown(struct velocity_info *vptr)
1978{
1979 struct mac_regs __iomem * regs = vptr->mac_regs;
1980 mac_disable_int(regs);
1981 writel(CR0_STOP, &regs->CR0Set);
1982 writew(0xFFFF, &regs->TDCSRClr);
1983 writeb(0xFF, &regs->RDCSRClr);
1984 safe_disable_mii_autopoll(regs);
1985 mac_clear_isr(regs);
1986}
1987
1988/**
1989 * velocity_close - close adapter callback
1990 * @dev: network device
1991 *
1992 * Callback from the network layer when the velocity is being
1993 * deactivated by the network layer
1994 */
1995
1996static int velocity_close(struct net_device *dev)
1997{
8ab6f3f7 1998 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
1999
2000 netif_stop_queue(dev);
2001 velocity_shutdown(vptr);
2002
2003 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2004 velocity_get_ip(vptr);
2005 if (dev->irq != 0)
2006 free_irq(dev->irq, dev);
6aa20a22 2007
1da177e4
LT
2008 /* Power down the chip */
2009 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22 2010
1da177e4
LT
2011 /* Free the resources */
2012 velocity_free_td_ring(vptr);
2013 velocity_free_rd_ring(vptr);
2014 velocity_free_rings(vptr);
2015
2016 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2017 return 0;
2018}
2019
2020/**
2021 * velocity_xmit - transmit packet callback
2022 * @skb: buffer to transmit
2023 * @dev: network device
2024 *
2025 * Called by the networ layer to request a packet is queued to
2026 * the velocity. Returns zero on success.
2027 */
6aa20a22 2028
1da177e4
LT
2029static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
2030{
8ab6f3f7 2031 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2032 int qnum = 0;
2033 struct tx_desc *td_ptr;
2034 struct velocity_td_info *tdinfo;
2035 unsigned long flags;
1da177e4 2036 int pktlen = skb->len;
580a6902
FR
2037 __le16 len;
2038 int index;
2039
2040
2041
2042 if (skb->len < ETH_ZLEN) {
2043 if (skb_padto(skb, ETH_ZLEN))
2044 goto out;
2045 pktlen = ETH_ZLEN;
2046 }
2047
2048 len = cpu_to_le16(pktlen);
1da177e4 2049
364c6bad
HX
2050#ifdef VELOCITY_ZERO_COPY_SUPPORT
2051 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
2052 kfree_skb(skb);
2053 return 0;
2054 }
2055#endif
2056
1da177e4
LT
2057 spin_lock_irqsave(&vptr->lock, flags);
2058
2059 index = vptr->td_curr[qnum];
2060 td_ptr = &(vptr->td_rings[qnum][index]);
2061 tdinfo = &(vptr->td_infos[qnum][index]);
2062
1da177e4 2063 td_ptr->tdesc1.TCR = TCR0_TIC;
4a51c0d0 2064 td_ptr->td_buf[0].size &= ~TD_QUEUE;
1da177e4 2065
1da177e4
LT
2066#ifdef VELOCITY_ZERO_COPY_SUPPORT
2067 if (skb_shinfo(skb)->nr_frags > 0) {
2068 int nfrags = skb_shinfo(skb)->nr_frags;
2069 tdinfo->skb = skb;
2070 if (nfrags > 6) {
d626f62b 2071 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4 2072 tdinfo->skb_dma[0] = tdinfo->buf_dma;
4a51c0d0 2073 td_ptr->tdesc0.len = len;
1da177e4
LT
2074 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2075 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2076 td_ptr->td_buf[0].size = len; /* queue is 0 anyway */
1da177e4 2077 tdinfo->nskb_dma = 1;
1da177e4
LT
2078 } else {
2079 int i = 0;
2080 tdinfo->nskb_dma = 0;
4a51c0d0
AV
2081 tdinfo->skb_dma[i] = pci_map_single(vptr->pdev, skb->data,
2082 skb_headlen(skb), PCI_DMA_TODEVICE);
1da177e4 2083
4a51c0d0 2084 td_ptr->tdesc0.len = len;
1da177e4
LT
2085
2086 /* FIXME: support 48bit DMA later */
2087 td_ptr->td_buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma);
2088 td_ptr->td_buf[i].pa_high = 0;
4a51c0d0 2089 td_ptr->td_buf[i].size = cpu_to_le16(skb_headlen(skb));
1da177e4
LT
2090
2091 for (i = 0; i < nfrags; i++) {
2092 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
4a51c0d0 2093 void *addr = (void *)page_address(frag->page) + frag->page_offset;
1da177e4
LT
2094
2095 tdinfo->skb_dma[i + 1] = pci_map_single(vptr->pdev, addr, frag->size, PCI_DMA_TODEVICE);
2096
2097 td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
2098 td_ptr->td_buf[i + 1].pa_high = 0;
4a51c0d0 2099 td_ptr->td_buf[i + 1].size = cpu_to_le16(frag->size);
1da177e4
LT
2100 }
2101 tdinfo->nskb_dma = i - 1;
1da177e4
LT
2102 }
2103
2104 } else
2105#endif
2106 {
2107 /*
2108 * Map the linear network buffer into PCI space and
2109 * add it to the transmit ring.
2110 */
2111 tdinfo->skb = skb;
2112 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
4a51c0d0 2113 td_ptr->tdesc0.len = len;
1da177e4
LT
2114 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2115 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2116 td_ptr->td_buf[0].size = len;
1da177e4 2117 tdinfo->nskb_dma = 1;
1da177e4 2118 }
4a51c0d0 2119 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
1da177e4 2120
501e4d24 2121 if (vptr->vlgrp && vlan_tx_tag_present(skb)) {
4a51c0d0 2122 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1da177e4
LT
2123 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2124 }
2125
2126 /*
2127 * Handle hardware checksum
2128 */
2129 if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM)
84fa7933 2130 && (skb->ip_summed == CHECKSUM_PARTIAL)) {
eddc9ec5 2131 const struct iphdr *ip = ip_hdr(skb);
1da177e4
LT
2132 if (ip->protocol == IPPROTO_TCP)
2133 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2134 else if (ip->protocol == IPPROTO_UDP)
2135 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2136 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2137 }
2138 {
2139
2140 int prev = index - 1;
2141
2142 if (prev < 0)
2143 prev = vptr->options.numtx - 1;
4a51c0d0 2144 td_ptr->tdesc0.len |= OWNED_BY_NIC;
1da177e4
LT
2145 vptr->td_used[qnum]++;
2146 vptr->td_curr[qnum] = (index + 1) % vptr->options.numtx;
2147
2148 if (AVAIL_TD(vptr, qnum) < 1)
2149 netif_stop_queue(dev);
2150
2151 td_ptr = &(vptr->td_rings[qnum][prev]);
4a51c0d0 2152 td_ptr->td_buf[0].size |= TD_QUEUE;
1da177e4
LT
2153 mac_tx_queue_wake(vptr->mac_regs, qnum);
2154 }
2155 dev->trans_start = jiffies;
2156 spin_unlock_irqrestore(&vptr->lock, flags);
580a6902
FR
2157out:
2158 return NETDEV_TX_OK;
1da177e4
LT
2159}
2160
2161/**
2162 * velocity_intr - interrupt callback
2163 * @irq: interrupt number
2164 * @dev_instance: interrupting device
1da177e4
LT
2165 *
2166 * Called whenever an interrupt is generated by the velocity
2167 * adapter IRQ line. We may not be the source of the interrupt
2168 * and need to identify initially if we are, and if not exit as
2169 * efficiently as possible.
2170 */
6aa20a22 2171
7d12e780 2172static int velocity_intr(int irq, void *dev_instance)
1da177e4
LT
2173{
2174 struct net_device *dev = dev_instance;
8ab6f3f7 2175 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2176 u32 isr_status;
2177 int max_count = 0;
2178
2179
2180 spin_lock(&vptr->lock);
2181 isr_status = mac_read_isr(vptr->mac_regs);
2182
2183 /* Not us ? */
2184 if (isr_status == 0) {
2185 spin_unlock(&vptr->lock);
2186 return IRQ_NONE;
2187 }
2188
2189 mac_disable_int(vptr->mac_regs);
2190
2191 /*
2192 * Keep processing the ISR until we have completed
2193 * processing and the isr_status becomes zero
2194 */
6aa20a22 2195
1da177e4
LT
2196 while (isr_status != 0) {
2197 mac_write_isr(vptr->mac_regs, isr_status);
2198 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2199 velocity_error(vptr, isr_status);
2200 if (isr_status & (ISR_PRXI | ISR_PPRXI))
2201 max_count += velocity_rx_srv(vptr, isr_status);
2202 if (isr_status & (ISR_PTXI | ISR_PPTXI))
2203 max_count += velocity_tx_srv(vptr, isr_status);
2204 isr_status = mac_read_isr(vptr->mac_regs);
2205 if (max_count > vptr->options.int_works)
2206 {
6aa20a22 2207 printk(KERN_WARNING "%s: excessive work at interrupt.\n",
1da177e4
LT
2208 dev->name);
2209 max_count = 0;
2210 }
2211 }
2212 spin_unlock(&vptr->lock);
2213 mac_enable_int(vptr->mac_regs);
2214 return IRQ_HANDLED;
2215
2216}
2217
2218
2219/**
2220 * velocity_set_multi - filter list change callback
2221 * @dev: network device
2222 *
2223 * Called by the network layer when the filter lists need to change
2224 * for a velocity adapter. Reload the CAMs with the new address
2225 * filter ruleset.
2226 */
6aa20a22 2227
1da177e4
LT
2228static void velocity_set_multi(struct net_device *dev)
2229{
8ab6f3f7 2230 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2231 struct mac_regs __iomem * regs = vptr->mac_regs;
2232 u8 rx_mode;
2233 int i;
2234 struct dev_mc_list *mclist;
2235
2236 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1da177e4
LT
2237 writel(0xffffffff, &regs->MARCAM[0]);
2238 writel(0xffffffff, &regs->MARCAM[4]);
2239 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
2240 } else if ((dev->mc_count > vptr->multicast_limit)
2241 || (dev->flags & IFF_ALLMULTI)) {
2242 writel(0xffffffff, &regs->MARCAM[0]);
2243 writel(0xffffffff, &regs->MARCAM[4]);
2244 rx_mode = (RCR_AM | RCR_AB);
2245 } else {
2246 int offset = MCAM_SIZE - vptr->multicast_limit;
01faccbf 2247 mac_get_cam_mask(regs, vptr->mCAMmask);
1da177e4
LT
2248
2249 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
01faccbf 2250 mac_set_cam(regs, i + offset, mclist->dmi_addr);
1da177e4
LT
2251 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
2252 }
2253
01faccbf 2254 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4
LT
2255 rx_mode = (RCR_AM | RCR_AB);
2256 }
2257 if (dev->mtu > 1500)
2258 rx_mode |= RCR_AL;
2259
2260 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
2261
2262}
2263
2264/**
2265 * velocity_get_status - statistics callback
2266 * @dev: network device
2267 *
2268 * Callback from the network layer to allow driver statistics
2269 * to be resynchronized with hardware collected state. In the
2270 * case of the velocity we need to pull the MIB counters from
2271 * the hardware into the counters before letting the network
2272 * layer display them.
2273 */
6aa20a22 2274
1da177e4
LT
2275static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2276{
8ab6f3f7 2277 struct velocity_info *vptr = netdev_priv(dev);
6aa20a22 2278
1da177e4
LT
2279 /* If the hardware is down, don't touch MII */
2280 if(!netif_running(dev))
2281 return &vptr->stats;
2282
2283 spin_lock_irq(&vptr->lock);
2284 velocity_update_hw_mibs(vptr);
2285 spin_unlock_irq(&vptr->lock);
2286
2287 vptr->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2288 vptr->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2289 vptr->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2290
2291// unsigned long rx_dropped; /* no space in linux buffers */
2292 vptr->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2293 /* detailed rx_errors: */
2294// unsigned long rx_length_errors;
2295// unsigned long rx_over_errors; /* receiver ring buff overflow */
2296 vptr->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2297// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2298// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2299// unsigned long rx_missed_errors; /* receiver missed packet */
2300
2301 /* detailed tx_errors */
2302// unsigned long tx_fifo_errors;
2303
2304 return &vptr->stats;
2305}
2306
2307
2308/**
2309 * velocity_ioctl - ioctl entry point
2310 * @dev: network device
2311 * @rq: interface request ioctl
2312 * @cmd: command code
2313 *
2314 * Called when the user issues an ioctl request to the network
2315 * device in question. The velocity interface supports MII.
2316 */
6aa20a22 2317
1da177e4
LT
2318static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2319{
8ab6f3f7 2320 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2321 int ret;
2322
2323 /* If we are asked for information and the device is power
2324 saving then we need to bring the device back up to talk to it */
6aa20a22 2325
1da177e4
LT
2326 if (!netif_running(dev))
2327 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 2328
1da177e4
LT
2329 switch (cmd) {
2330 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2331 case SIOCGMIIREG: /* Read MII PHY register. */
2332 case SIOCSMIIREG: /* Write to MII PHY register. */
2333 ret = velocity_mii_ioctl(dev, rq, cmd);
2334 break;
2335
2336 default:
2337 ret = -EOPNOTSUPP;
2338 }
2339 if (!netif_running(dev))
2340 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22
JG
2341
2342
1da177e4
LT
2343 return ret;
2344}
2345
2346/*
2347 * Definition for our device driver. The PCI layer interface
2348 * uses this to handle all our card discover and plugging
2349 */
6aa20a22 2350
1da177e4
LT
2351static struct pci_driver velocity_driver = {
2352 .name = VELOCITY_NAME,
2353 .id_table = velocity_id_table,
2354 .probe = velocity_found1,
2355 .remove = __devexit_p(velocity_remove1),
2356#ifdef CONFIG_PM
2357 .suspend = velocity_suspend,
2358 .resume = velocity_resume,
2359#endif
2360};
2361
2362/**
2363 * velocity_init_module - load time function
2364 *
2365 * Called when the velocity module is loaded. The PCI driver
2366 * is registered with the PCI layer, and in turn will call
2367 * the probe functions for each velocity adapter installed
2368 * in the system.
2369 */
6aa20a22 2370
1da177e4
LT
2371static int __init velocity_init_module(void)
2372{
2373 int ret;
2374
2375 velocity_register_notifier();
29917620 2376 ret = pci_register_driver(&velocity_driver);
1da177e4
LT
2377 if (ret < 0)
2378 velocity_unregister_notifier();
2379 return ret;
2380}
2381
2382/**
2383 * velocity_cleanup - module unload
2384 *
2385 * When the velocity hardware is unloaded this function is called.
6aa20a22 2386 * It will clean up the notifiers and the unregister the PCI
1da177e4
LT
2387 * driver interface for this hardware. This in turn cleans up
2388 * all discovered interfaces before returning from the function
2389 */
6aa20a22 2390
1da177e4
LT
2391static void __exit velocity_cleanup_module(void)
2392{
2393 velocity_unregister_notifier();
2394 pci_unregister_driver(&velocity_driver);
2395}
2396
2397module_init(velocity_init_module);
2398module_exit(velocity_cleanup_module);
2399
2400
2401/*
2402 * MII access , media link mode setting functions
2403 */
6aa20a22
JG
2404
2405
1da177e4
LT
2406/**
2407 * mii_init - set up MII
2408 * @vptr: velocity adapter
2409 * @mii_status: links tatus
2410 *
2411 * Set up the PHY for the current link state.
2412 */
6aa20a22 2413
1da177e4
LT
2414static void mii_init(struct velocity_info *vptr, u32 mii_status)
2415{
2416 u16 BMCR;
2417
2418 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
2419 case PHYID_CICADA_CS8201:
2420 /*
2421 * Reset to hardware default
2422 */
2423 MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2424 /*
2425 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2426 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT
2427 * legacy-forced issue.
2428 */
2429 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2430 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2431 else
2432 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2433 /*
2434 * Turn on Link/Activity LED enable bit for CIS8201
2435 */
2436 MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
2437 break;
2438 case PHYID_VT3216_32BIT:
2439 case PHYID_VT3216_64BIT:
2440 /*
2441 * Reset to hardware default
2442 */
2443 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2444 /*
2445 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2446 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT
2447 * legacy-forced issue
2448 */
2449 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2450 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2451 else
2452 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2453 break;
2454
2455 case PHYID_MARVELL_1000:
2456 case PHYID_MARVELL_1000S:
2457 /*
6aa20a22 2458 * Assert CRS on Transmit
1da177e4
LT
2459 */
2460 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
2461 /*
6aa20a22 2462 * Reset to hardware default
1da177e4
LT
2463 */
2464 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2465 break;
2466 default:
2467 ;
2468 }
2469 velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
2470 if (BMCR & BMCR_ISO) {
2471 BMCR &= ~BMCR_ISO;
2472 velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
2473 }
2474}
2475
2476/**
2477 * safe_disable_mii_autopoll - autopoll off
2478 * @regs: velocity registers
2479 *
2480 * Turn off the autopoll and wait for it to disable on the chip
2481 */
6aa20a22 2482
1da177e4
LT
2483static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs)
2484{
2485 u16 ww;
2486
2487 /* turn off MAUTO */
2488 writeb(0, &regs->MIICR);
2489 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2490 udelay(1);
2491 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2492 break;
2493 }
2494}
2495
2496/**
2497 * enable_mii_autopoll - turn on autopolling
2498 * @regs: velocity registers
2499 *
2500 * Enable the MII link status autopoll feature on the Velocity
2501 * hardware. Wait for it to enable.
2502 */
2503
2504static void enable_mii_autopoll(struct mac_regs __iomem * regs)
2505{
2506 int ii;
2507
2508 writeb(0, &(regs->MIICR));
2509 writeb(MIIADR_SWMPL, &regs->MIIADR);
2510
2511 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2512 udelay(1);
2513 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2514 break;
2515 }
2516
2517 writeb(MIICR_MAUTO, &regs->MIICR);
2518
2519 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2520 udelay(1);
2521 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2522 break;
2523 }
2524
2525}
2526
2527/**
2528 * velocity_mii_read - read MII data
2529 * @regs: velocity registers
2530 * @index: MII register index
2531 * @data: buffer for received data
2532 *
2533 * Perform a single read of an MII 16bit register. Returns zero
2534 * on success or -ETIMEDOUT if the PHY did not respond.
2535 */
6aa20a22 2536
1da177e4
LT
2537static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
2538{
2539 u16 ww;
2540
2541 /*
2542 * Disable MIICR_MAUTO, so that mii addr can be set normally
2543 */
2544 safe_disable_mii_autopoll(regs);
2545
2546 writeb(index, &regs->MIIADR);
2547
2548 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
2549
2550 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2551 if (!(readb(&regs->MIICR) & MIICR_RCMD))
2552 break;
2553 }
2554
2555 *data = readw(&regs->MIIDATA);
2556
2557 enable_mii_autopoll(regs);
2558 if (ww == W_MAX_TIMEOUT)
2559 return -ETIMEDOUT;
2560 return 0;
2561}
2562
2563/**
2564 * velocity_mii_write - write MII data
2565 * @regs: velocity registers
2566 * @index: MII register index
2567 * @data: 16bit data for the MII register
2568 *
2569 * Perform a single write to an MII 16bit register. Returns zero
2570 * on success or -ETIMEDOUT if the PHY did not respond.
2571 */
6aa20a22 2572
1da177e4
LT
2573static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
2574{
2575 u16 ww;
2576
2577 /*
2578 * Disable MIICR_MAUTO, so that mii addr can be set normally
2579 */
2580 safe_disable_mii_autopoll(regs);
2581
2582 /* MII reg offset */
2583 writeb(mii_addr, &regs->MIIADR);
2584 /* set MII data */
2585 writew(data, &regs->MIIDATA);
2586
2587 /* turn on MIICR_WCMD */
2588 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
2589
2590 /* W_MAX_TIMEOUT is the timeout period */
2591 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2592 udelay(5);
2593 if (!(readb(&regs->MIICR) & MIICR_WCMD))
2594 break;
2595 }
2596 enable_mii_autopoll(regs);
2597
2598 if (ww == W_MAX_TIMEOUT)
2599 return -ETIMEDOUT;
2600 return 0;
2601}
2602
2603/**
2604 * velocity_get_opt_media_mode - get media selection
2605 * @vptr: velocity adapter
2606 *
2607 * Get the media mode stored in EEPROM or module options and load
2608 * mii_status accordingly. The requested link state information
2609 * is also returned.
2610 */
6aa20a22 2611
1da177e4
LT
2612static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
2613{
2614 u32 status = 0;
2615
2616 switch (vptr->options.spd_dpx) {
2617 case SPD_DPX_AUTO:
2618 status = VELOCITY_AUTONEG_ENABLE;
2619 break;
2620 case SPD_DPX_100_FULL:
2621 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
2622 break;
2623 case SPD_DPX_10_FULL:
2624 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
2625 break;
2626 case SPD_DPX_100_HALF:
2627 status = VELOCITY_SPEED_100;
2628 break;
2629 case SPD_DPX_10_HALF:
2630 status = VELOCITY_SPEED_10;
2631 break;
2632 }
2633 vptr->mii_status = status;
2634 return status;
2635}
2636
2637/**
2638 * mii_set_auto_on - autonegotiate on
2639 * @vptr: velocity
2640 *
2641 * Enable autonegotation on this interface
2642 */
6aa20a22 2643
1da177e4
LT
2644static void mii_set_auto_on(struct velocity_info *vptr)
2645{
2646 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
2647 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
2648 else
2649 MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2650}
2651
2652
2653/*
2654static void mii_set_auto_off(struct velocity_info * vptr)
2655{
2656 MII_REG_BITS_OFF(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2657}
2658*/
2659
2660/**
2661 * set_mii_flow_control - flow control setup
2662 * @vptr: velocity interface
2663 *
2664 * Set up the flow control on this interface according to
2665 * the supplied user/eeprom options.
2666 */
6aa20a22 2667
1da177e4
LT
2668static void set_mii_flow_control(struct velocity_info *vptr)
2669{
2670 /*Enable or Disable PAUSE in ANAR */
2671 switch (vptr->options.flow_cntl) {
2672 case FLOW_CNTL_TX:
2673 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2674 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2675 break;
2676
2677 case FLOW_CNTL_RX:
2678 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2679 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2680 break;
2681
2682 case FLOW_CNTL_TX_RX:
2683 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2684 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2685 break;
2686
2687 case FLOW_CNTL_DISABLE:
2688 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2689 MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2690 break;
2691 default:
2692 break;
2693 }
2694}
2695
2696/**
2697 * velocity_set_media_mode - set media mode
2698 * @mii_status: old MII link state
2699 *
2700 * Check the media link state and configure the flow control
2701 * PHY and also velocity hardware setup accordingly. In particular
2702 * we need to set up CD polling and frame bursting.
2703 */
6aa20a22 2704
1da177e4
LT
2705static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
2706{
2707 u32 curr_status;
2708 struct mac_regs __iomem * regs = vptr->mac_regs;
2709
2710 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
2711 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
2712
2713 /* Set mii link status */
2714 set_mii_flow_control(vptr);
2715
2716 /*
2717 Check if new status is consisent with current status
2718 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE)
2719 || (mii_status==curr_status)) {
2720 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
2721 vptr->mii_status=check_connection_type(vptr->mac_regs);
2722 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
2723 return 0;
2724 }
2725 */
2726
2727 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) {
2728 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
2729 }
2730
2731 /*
2732 * If connection type is AUTO
2733 */
2734 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
2735 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
2736 /* clear force MAC mode bit */
2737 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
2738 /* set duplex mode of MAC according to duplex mode of MII */
2739 MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs);
2740 MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2741 MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs);
2742
2743 /* enable AUTO-NEGO mode */
2744 mii_set_auto_on(vptr);
2745 } else {
2746 u16 ANAR;
2747 u8 CHIPGCR;
2748
2749 /*
2750 * 1. if it's 3119, disable frame bursting in halfduplex mode
2751 * and enable it in fullduplex mode
2752 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
2753 * 3. only enable CD heart beat counter in 10HD mode
2754 */
2755
2756 /* set force MAC mode bit */
2757 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2758
2759 CHIPGCR = readb(&regs->CHIPGCR);
2760 CHIPGCR &= ~CHIPGCR_FCGMII;
2761
2762 if (mii_status & VELOCITY_DUPLEX_FULL) {
2763 CHIPGCR |= CHIPGCR_FCFDX;
2764 writeb(CHIPGCR, &regs->CHIPGCR);
2765 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
2766 if (vptr->rev_id < REV_ID_VT3216_A0)
2767 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
2768 } else {
2769 CHIPGCR &= ~CHIPGCR_FCFDX;
2770 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
2771 writeb(CHIPGCR, &regs->CHIPGCR);
2772 if (vptr->rev_id < REV_ID_VT3216_A0)
2773 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
2774 }
2775
2776 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2777
2778 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) {
2779 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
2780 } else {
2781 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
2782 }
2783 /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
2784 velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
2785 ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
2786 if (mii_status & VELOCITY_SPEED_100) {
2787 if (mii_status & VELOCITY_DUPLEX_FULL)
2788 ANAR |= ANAR_TXFD;
2789 else
2790 ANAR |= ANAR_TX;
2791 } else {
2792 if (mii_status & VELOCITY_DUPLEX_FULL)
2793 ANAR |= ANAR_10FD;
2794 else
2795 ANAR |= ANAR_10;
2796 }
2797 velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
2798 /* enable AUTO-NEGO mode */
2799 mii_set_auto_on(vptr);
2800 /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
2801 }
2802 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
2803 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
2804 return VELOCITY_LINK_CHANGE;
2805}
2806
2807/**
2808 * mii_check_media_mode - check media state
2809 * @regs: velocity registers
2810 *
2811 * Check the current MII status and determine the link status
2812 * accordingly
2813 */
6aa20a22 2814
1da177e4
LT
2815static u32 mii_check_media_mode(struct mac_regs __iomem * regs)
2816{
2817 u32 status = 0;
2818 u16 ANAR;
2819
2820 if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
2821 status |= VELOCITY_LINK_FAIL;
2822
2823 if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
2824 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
2825 else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
2826 status |= (VELOCITY_SPEED_1000);
2827 else {
2828 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2829 if (ANAR & ANAR_TXFD)
2830 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
2831 else if (ANAR & ANAR_TX)
2832 status |= VELOCITY_SPEED_100;
2833 else if (ANAR & ANAR_10FD)
2834 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
2835 else
2836 status |= (VELOCITY_SPEED_10);
2837 }
2838
2839 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2840 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2841 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2842 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2843 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2844 status |= VELOCITY_AUTONEG_ENABLE;
2845 }
2846 }
2847
2848 return status;
2849}
2850
2851static u32 check_connection_type(struct mac_regs __iomem * regs)
2852{
2853 u32 status = 0;
2854 u8 PHYSR0;
2855 u16 ANAR;
2856 PHYSR0 = readb(&regs->PHYSR0);
2857
2858 /*
2859 if (!(PHYSR0 & PHYSR0_LINKGD))
2860 status|=VELOCITY_LINK_FAIL;
2861 */
2862
2863 if (PHYSR0 & PHYSR0_FDPX)
2864 status |= VELOCITY_DUPLEX_FULL;
2865
2866 if (PHYSR0 & PHYSR0_SPDG)
2867 status |= VELOCITY_SPEED_1000;
59b693fb 2868 else if (PHYSR0 & PHYSR0_SPD10)
1da177e4
LT
2869 status |= VELOCITY_SPEED_10;
2870 else
2871 status |= VELOCITY_SPEED_100;
2872
2873 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2874 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2875 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2876 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2877 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2878 status |= VELOCITY_AUTONEG_ENABLE;
2879 }
2880 }
2881
2882 return status;
2883}
2884
2885/**
2886 * enable_flow_control_ability - flow control
2887 * @vptr: veloity to configure
2888 *
2889 * Set up flow control according to the flow control options
2890 * determined by the eeprom/configuration.
2891 */
2892
2893static void enable_flow_control_ability(struct velocity_info *vptr)
2894{
2895
2896 struct mac_regs __iomem * regs = vptr->mac_regs;
2897
2898 switch (vptr->options.flow_cntl) {
2899
2900 case FLOW_CNTL_DEFAULT:
2901 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
2902 writel(CR0_FDXRFCEN, &regs->CR0Set);
2903 else
2904 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2905
2906 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
2907 writel(CR0_FDXTFCEN, &regs->CR0Set);
2908 else
2909 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2910 break;
2911
2912 case FLOW_CNTL_TX:
2913 writel(CR0_FDXTFCEN, &regs->CR0Set);
2914 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2915 break;
2916
2917 case FLOW_CNTL_RX:
2918 writel(CR0_FDXRFCEN, &regs->CR0Set);
2919 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2920 break;
2921
2922 case FLOW_CNTL_TX_RX:
2923 writel(CR0_FDXTFCEN, &regs->CR0Set);
2924 writel(CR0_FDXRFCEN, &regs->CR0Set);
2925 break;
2926
2927 case FLOW_CNTL_DISABLE:
2928 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2929 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2930 break;
2931
2932 default:
2933 break;
2934 }
2935
2936}
2937
2938
2939/**
2940 * velocity_ethtool_up - pre hook for ethtool
2941 * @dev: network device
2942 *
2943 * Called before an ethtool operation. We need to make sure the
2944 * chip is out of D3 state before we poke at it.
2945 */
6aa20a22 2946
1da177e4
LT
2947static int velocity_ethtool_up(struct net_device *dev)
2948{
8ab6f3f7 2949 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2950 if (!netif_running(dev))
2951 pci_set_power_state(vptr->pdev, PCI_D0);
2952 return 0;
6aa20a22 2953}
1da177e4
LT
2954
2955/**
2956 * velocity_ethtool_down - post hook for ethtool
2957 * @dev: network device
2958 *
2959 * Called after an ethtool operation. Restore the chip back to D3
2960 * state if it isn't running.
2961 */
6aa20a22 2962
1da177e4
LT
2963static void velocity_ethtool_down(struct net_device *dev)
2964{
8ab6f3f7 2965 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2966 if (!netif_running(dev))
2967 pci_set_power_state(vptr->pdev, PCI_D3hot);
2968}
2969
2970static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2971{
8ab6f3f7 2972 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
2973 struct mac_regs __iomem * regs = vptr->mac_regs;
2974 u32 status;
2975 status = check_connection_type(vptr->mac_regs);
2976
59b693fb
JC
2977 cmd->supported = SUPPORTED_TP |
2978 SUPPORTED_Autoneg |
2979 SUPPORTED_10baseT_Half |
2980 SUPPORTED_10baseT_Full |
2981 SUPPORTED_100baseT_Half |
2982 SUPPORTED_100baseT_Full |
2983 SUPPORTED_1000baseT_Half |
2984 SUPPORTED_1000baseT_Full;
2985 if (status & VELOCITY_SPEED_1000)
2986 cmd->speed = SPEED_1000;
2987 else if (status & VELOCITY_SPEED_100)
1da177e4
LT
2988 cmd->speed = SPEED_100;
2989 else
2990 cmd->speed = SPEED_10;
2991 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2992 cmd->port = PORT_TP;
2993 cmd->transceiver = XCVR_INTERNAL;
2994 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
2995
2996 if (status & VELOCITY_DUPLEX_FULL)
2997 cmd->duplex = DUPLEX_FULL;
2998 else
2999 cmd->duplex = DUPLEX_HALF;
6aa20a22 3000
1da177e4
LT
3001 return 0;
3002}
3003
3004static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3005{
8ab6f3f7 3006 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
3007 u32 curr_status;
3008 u32 new_status = 0;
3009 int ret = 0;
6aa20a22 3010
1da177e4
LT
3011 curr_status = check_connection_type(vptr->mac_regs);
3012 curr_status &= (~VELOCITY_LINK_FAIL);
3013
3014 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3015 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3016 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3017 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3018
3019 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
3020 ret = -EINVAL;
3021 else
3022 velocity_set_media_mode(vptr, new_status);
3023
3024 return ret;
3025}
3026
3027static u32 velocity_get_link(struct net_device *dev)
3028{
8ab6f3f7 3029 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 3030 struct mac_regs __iomem * regs = vptr->mac_regs;
59b693fb 3031 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT
3032}
3033
3034static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3035{
8ab6f3f7 3036 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
3037 strcpy(info->driver, VELOCITY_NAME);
3038 strcpy(info->version, VELOCITY_VERSION);
3039 strcpy(info->bus_info, pci_name(vptr->pdev));
3040}
3041
3042static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3043{
8ab6f3f7 3044 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
3045 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3046 wol->wolopts |= WAKE_MAGIC;
3047 /*
3048 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3049 wol.wolopts|=WAKE_PHY;
3050 */
3051 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3052 wol->wolopts |= WAKE_UCAST;
3053 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3054 wol->wolopts |= WAKE_ARP;
3055 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3056}
3057
3058static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3059{
8ab6f3f7 3060 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
3061
3062 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3063 return -EFAULT;
3064 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3065
3066 /*
3067 if (wol.wolopts & WAKE_PHY) {
3068 vptr->wol_opts|=VELOCITY_WOL_PHY;
3069 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3070 }
3071 */
3072
3073 if (wol->wolopts & WAKE_MAGIC) {
3074 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3075 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3076 }
3077 if (wol->wolopts & WAKE_UCAST) {
3078 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3079 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3080 }
3081 if (wol->wolopts & WAKE_ARP) {
3082 vptr->wol_opts |= VELOCITY_WOL_ARP;
3083 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3084 }
3085 memcpy(vptr->wol_passwd, wol->sopass, 6);
3086 return 0;
3087}
3088
3089static u32 velocity_get_msglevel(struct net_device *dev)
3090{
3091 return msglevel;
3092}
3093
3094static void velocity_set_msglevel(struct net_device *dev, u32 value)
3095{
3096 msglevel = value;
3097}
3098
7282d491 3099static const struct ethtool_ops velocity_ethtool_ops = {
1da177e4
LT
3100 .get_settings = velocity_get_settings,
3101 .set_settings = velocity_set_settings,
3102 .get_drvinfo = velocity_get_drvinfo,
3103 .get_wol = velocity_ethtool_get_wol,
3104 .set_wol = velocity_ethtool_set_wol,
3105 .get_msglevel = velocity_get_msglevel,
3106 .set_msglevel = velocity_set_msglevel,
3107 .get_link = velocity_get_link,
3108 .begin = velocity_ethtool_up,
3109 .complete = velocity_ethtool_down
3110};
3111
3112/**
3113 * velocity_mii_ioctl - MII ioctl handler
3114 * @dev: network device
3115 * @ifr: the ifreq block for the ioctl
3116 * @cmd: the command
3117 *
3118 * Process MII requests made via ioctl from the network layer. These
3119 * are used by tools like kudzu to interrogate the link state of the
3120 * hardware
3121 */
6aa20a22 3122
1da177e4
LT
3123static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
3124{
8ab6f3f7 3125 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT
3126 struct mac_regs __iomem * regs = vptr->mac_regs;
3127 unsigned long flags;
3128 struct mii_ioctl_data *miidata = if_mii(ifr);
3129 int err;
6aa20a22 3130
1da177e4
LT
3131 switch (cmd) {
3132 case SIOCGMIIPHY:
3133 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
3134 break;
3135 case SIOCGMIIREG:
3136 if (!capable(CAP_NET_ADMIN))
3137 return -EPERM;
3138 if(velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
3139 return -ETIMEDOUT;
3140 break;
3141 case SIOCSMIIREG:
3142 if (!capable(CAP_NET_ADMIN))
3143 return -EPERM;
3144 spin_lock_irqsave(&vptr->lock, flags);
3145 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
3146 spin_unlock_irqrestore(&vptr->lock, flags);
3147 check_connection_type(vptr->mac_regs);
3148 if(err)
3149 return err;
3150 break;
3151 default:
3152 return -EOPNOTSUPP;
3153 }
3154 return 0;
3155}
3156
3157#ifdef CONFIG_PM
3158
3159/**
3160 * velocity_save_context - save registers
6aa20a22 3161 * @vptr: velocity
1da177e4
LT
3162 * @context: buffer for stored context
3163 *
3164 * Retrieve the current configuration from the velocity hardware
3165 * and stash it in the context structure, for use by the context
3166 * restore functions. This allows us to save things we need across
3167 * power down states
3168 */
6aa20a22 3169
1da177e4
LT
3170static void velocity_save_context(struct velocity_info *vptr, struct velocity_context * context)
3171{
3172 struct mac_regs __iomem * regs = vptr->mac_regs;
3173 u16 i;
3174 u8 __iomem *ptr = (u8 __iomem *)regs;
3175
3176 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
3177 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3178
3179 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3180 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3181
3182 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3183 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3184
3185}
3186
3187/**
3188 * velocity_restore_context - restore registers
6aa20a22 3189 * @vptr: velocity
1da177e4
LT
3190 * @context: buffer for stored context
3191 *
6aa20a22 3192 * Reload the register configuration from the velocity context
1da177e4
LT
3193 * created by velocity_save_context.
3194 */
6aa20a22 3195
1da177e4
LT
3196static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3197{
3198 struct mac_regs __iomem * regs = vptr->mac_regs;
3199 int i;
3200 u8 __iomem *ptr = (u8 __iomem *)regs;
3201
3202 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) {
3203 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3204 }
3205
3206 /* Just skip cr0 */
3207 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3208 /* Clear */
3209 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3210 /* Set */
3211 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3212 }
3213
3214 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) {
3215 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3216 }
3217
3218 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) {
3219 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3220 }
3221
3222 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) {
3223 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3224 }
3225
3226}
3227
3228/**
3229 * wol_calc_crc - WOL CRC
3230 * @pattern: data pattern
3231 * @mask_pattern: mask
3232 *
3233 * Compute the wake on lan crc hashes for the packet header
3234 * we are interested in.
3235 */
3236
3237static u16 wol_calc_crc(int size, u8 * pattern, u8 *mask_pattern)
3238{
3239 u16 crc = 0xFFFF;
3240 u8 mask;
3241 int i, j;
3242
3243 for (i = 0; i < size; i++) {
3244 mask = mask_pattern[i];
3245
3246 /* Skip this loop if the mask equals to zero */
3247 if (mask == 0x00)
3248 continue;
3249
3250 for (j = 0; j < 8; j++) {
3251 if ((mask & 0x01) == 0) {
3252 mask >>= 1;
3253 continue;
3254 }
3255 mask >>= 1;
3256 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
3257 }
3258 }
3259 /* Finally, invert the result once to get the correct data */
3260 crc = ~crc;
906d66df 3261 return bitrev32(crc) >> 16;
1da177e4
LT
3262}
3263
3264/**
3265 * velocity_set_wol - set up for wake on lan
3266 * @vptr: velocity to set WOL status on
3267 *
3268 * Set a card up for wake on lan either by unicast or by
3269 * ARP packet.
3270 *
3271 * FIXME: check static buffer is safe here
3272 */
3273
3274static int velocity_set_wol(struct velocity_info *vptr)
3275{
3276 struct mac_regs __iomem * regs = vptr->mac_regs;
3277 static u8 buf[256];
3278 int i;
3279
3280 static u32 mask_pattern[2][4] = {
3281 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
3282 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
3283 };
3284
3285 writew(0xFFFF, &regs->WOLCRClr);
3286 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
3287 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
3288
3289 /*
3290 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3291 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
3292 */
3293
3294 if (vptr->wol_opts & VELOCITY_WOL_UCAST) {
3295 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
3296 }
3297
3298 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
3299 struct arp_packet *arp = (struct arp_packet *) buf;
3300 u16 crc;
3301 memset(buf, 0, sizeof(struct arp_packet) + 7);
3302
3303 for (i = 0; i < 4; i++)
3304 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
3305
3306 arp->type = htons(ETH_P_ARP);
3307 arp->ar_op = htons(1);
3308
3309 memcpy(arp->ar_tip, vptr->ip_addr, 4);
3310
3311 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
3312 (u8 *) & mask_pattern[0][0]);
3313
3314 writew(crc, &regs->PatternCRC[0]);
3315 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
3316 }
3317
3318 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
3319 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
3320
3321 writew(0x0FFF, &regs->WOLSRClr);
3322
3323 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
3324 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3325 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
3326
3327 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
3328 }
3329
3330 if (vptr->mii_status & VELOCITY_SPEED_1000)
3331 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
3332
3333 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
3334
3335 {
3336 u8 GCR;
3337 GCR = readb(&regs->CHIPGCR);
3338 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
3339 writeb(GCR, &regs->CHIPGCR);
3340 }
3341
3342 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
3343 /* Turn on SWPTAG just before entering power mode */
3344 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
3345 /* Go to bed ..... */
3346 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
3347
3348 return 0;
3349}
3350
3351static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3352{
3353 struct net_device *dev = pci_get_drvdata(pdev);
3354 struct velocity_info *vptr = netdev_priv(dev);
3355 unsigned long flags;
3356
3357 if(!netif_running(vptr->dev))
3358 return 0;
3359
3360 netif_device_detach(vptr->dev);
3361
3362 spin_lock_irqsave(&vptr->lock, flags);
3363 pci_save_state(pdev);
3364#ifdef ETHTOOL_GWOL
3365 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3366 velocity_get_ip(vptr);
3367 velocity_save_context(vptr, &vptr->context);
3368 velocity_shutdown(vptr);
3369 velocity_set_wol(vptr);
4a51c0d0 3370 pci_enable_wake(pdev, PCI_D3hot, 1);
1da177e4
LT
3371 pci_set_power_state(pdev, PCI_D3hot);
3372 } else {
3373 velocity_save_context(vptr, &vptr->context);
3374 velocity_shutdown(vptr);
3375 pci_disable_device(pdev);
3376 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3377 }
3378#else
3379 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3380#endif
3381 spin_unlock_irqrestore(&vptr->lock, flags);
3382 return 0;
3383}
3384
3385static int velocity_resume(struct pci_dev *pdev)
3386{
3387 struct net_device *dev = pci_get_drvdata(pdev);
3388 struct velocity_info *vptr = netdev_priv(dev);
3389 unsigned long flags;
3390 int i;
3391
3392 if(!netif_running(vptr->dev))
3393 return 0;
3394
3395 pci_set_power_state(pdev, PCI_D0);
3396 pci_enable_wake(pdev, 0, 0);
3397 pci_restore_state(pdev);
3398
3399 mac_wol_reset(vptr->mac_regs);
3400
3401 spin_lock_irqsave(&vptr->lock, flags);
3402 velocity_restore_context(vptr, &vptr->context);
3403 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3404 mac_disable_int(vptr->mac_regs);
3405
3406 velocity_tx_srv(vptr, 0);
3407
3408 for (i = 0; i < vptr->num_txq; i++) {
3409 if (vptr->td_used[i]) {
3410 mac_tx_queue_wake(vptr->mac_regs, i);
3411 }
3412 }
3413
3414 mac_enable_int(vptr->mac_regs);
3415 spin_unlock_irqrestore(&vptr->lock, flags);
3416 netif_device_attach(vptr->dev);
3417
3418 return 0;
3419}
3420
ce9f7fe3
RD
3421#ifdef CONFIG_INET
3422
1da177e4
LT
3423static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3424{
3425 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
a337499f
DL
3426 struct net_device *dev = ifa->ifa_dev->dev;
3427 struct velocity_info *vptr;
3428 unsigned long flags;
1da177e4 3429
c346dca1 3430 if (dev_net(dev) != &init_net)
6133fb1a
DL
3431 return NOTIFY_DONE;
3432
a337499f
DL
3433 spin_lock_irqsave(&velocity_dev_list_lock, flags);
3434 list_for_each_entry(vptr, &velocity_dev_list, list) {
3435 if (vptr->dev == dev) {
3436 velocity_get_ip(vptr);
3437 break;
1da177e4 3438 }
1da177e4 3439 }
a337499f
DL
3440 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
3441
1da177e4
LT
3442 return NOTIFY_DONE;
3443}
ce9f7fe3
RD
3444
3445#endif
1da177e4 3446#endif