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atm nicstar: Removal of debug code containing deprecated calls to cli()/sti()
[net-next-2.6.git] / drivers / net / via-velocity.c
CommitLineData
1da177e4
LT		 1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
1da177e4
LT		 11 * rx_copybreak/alignment
12 * Scatter gather
13 * More testing
14 *
15 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@redhat.com>
16 * Additional fixes and clean up: Francois Romieu
17 *
18 * This source has not been verified for use in safety critical systems.
19 *
20 * Please direct queries about the revamped driver to the linux-kernel
21 * list not VIA.
22 *
23 * Original code:
24 *
25 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
26 * All rights reserved.
27 *
28 * This software may be redistributed and/or modified under
29 * the terms of the GNU General Public License as published by the Free
30 * Software Foundation; either version 2 of the License, or
31 * any later version.
32 *
33 * This program is distributed in the hope that it will be useful, but
34 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
35 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
36 * for more details.
37 *
38 * Author: Chuang Liang-Shing, AJ Jiang
39 *
40 * Date: Jan 24, 2003
41 *
42 * MODULE_LICENSE("GPL");
43 *
44 */
45
46
47#include <linux/module.h>
48#include <linux/types.h>
1da177e4
LT		 49#include <linux/init.h>
50#include <linux/mm.h>
51#include <linux/errno.h>
52#include <linux/ioport.h>
53#include <linux/pci.h>
54#include <linux/kernel.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/skbuff.h>
58#include <linux/delay.h>
59#include <linux/timer.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
1da177e4
LT		 62#include <linux/string.h>
63#include <linux/wait.h>
64#include <asm/io.h>
65#include <linux/if.h>
1da177e4
LT		 66#include <asm/uaccess.h>
67#include <linux/proc_fs.h>
68#include <linux/inetdevice.h>
69#include <linux/reboot.h>
70#include <linux/ethtool.h>
71#include <linux/mii.h>
72#include <linux/in.h>
73#include <linux/if_arp.h>
501e4d24 74#include <linux/if_vlan.h>
1da177e4
LT		 75#include <linux/ip.h>
76#include <linux/tcp.h>
77#include <linux/udp.h>
78#include <linux/crc-ccitt.h>
79#include <linux/crc32.h>
80
81#include "via-velocity.h"
82
83
84static int velocity_nics = 0;
85static int msglevel = MSG_LEVEL_INFO;
86
01faccbf
SH		 87/**
88 * mac_get_cam_mask - Read a CAM mask
89 * @regs: register block for this velocity
90 * @mask: buffer to store mask
91 *
92 * Fetch the mask bits of the selected CAM and store them into the
93 * provided mask buffer.
94 */
95
96static void mac_get_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
97{
98 int i;
99
100 /* Select CAM mask */
101 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
102
103 writeb(0, &regs->CAMADDR);
104
105 /* read mask */
106 for (i = 0; i < 8; i++)
107 *mask++ = readb(&(regs->MARCAM[i]));
108
109 /* disable CAMEN */
110 writeb(0, &regs->CAMADDR);
111
112 /* Select mar */
113 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
114
115}
116
117
118/**
119 * mac_set_cam_mask - Set a CAM mask
120 * @regs: register block for this velocity
121 * @mask: CAM mask to load
122 *
123 * Store a new mask into a CAM
124 */
125
126static void mac_set_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
127{
128 int i;
129 /* Select CAM mask */
130 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
131
132 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
133
134 for (i = 0; i < 8; i++) {
135 writeb(*mask++, &(regs->MARCAM[i]));
136 }
137 /* disable CAMEN */
138 writeb(0, &regs->CAMADDR);
139
140 /* Select mar */
141 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
142}
143
144static void mac_set_vlan_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
145{
146 int i;
147 /* Select CAM mask */
148 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
149
150 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
151
152 for (i = 0; i < 8; i++) {
153 writeb(*mask++, &(regs->MARCAM[i]));
154 }
155 /* disable CAMEN */
156 writeb(0, &regs->CAMADDR);
157
158 /* Select mar */
159 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
160}
161
162/**
163 * mac_set_cam - set CAM data
164 * @regs: register block of this velocity
165 * @idx: Cam index
166 * @addr: 2 or 6 bytes of CAM data
167 *
168 * Load an address or vlan tag into a CAM
169 */
170
171static void mac_set_cam(struct mac_regs __iomem * regs, int idx, const u8 *addr)
172{
173 int i;
174
175 /* Select CAM mask */
176 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
177
178 idx &= (64 - 1);
179
180 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
181
182 for (i = 0; i < 6; i++) {
183 writeb(*addr++, &(regs->MARCAM[i]));
184 }
185 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
186
187 udelay(10);
188
189 writeb(0, &regs->CAMADDR);
190
191 /* Select mar */
192 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
193}
194
195static void mac_set_vlan_cam(struct mac_regs __iomem * regs, int idx,
196 const u8 *addr)
197{
198
199 /* Select CAM mask */
200 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
201
202 idx &= (64 - 1);
203
204 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
205 writew(*((u16 *) addr), &regs->MARCAM[0]);
206
207 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
208
209 udelay(10);
210
211 writeb(0, &regs->CAMADDR);
212
213 /* Select mar */
214 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
215}
216
217
218/**
219 * mac_wol_reset - reset WOL after exiting low power
220 * @regs: register block of this velocity
221 *
222 * Called after we drop out of wake on lan mode in order to
223 * reset the Wake on lan features. This function doesn't restore
224 * the rest of the logic from the result of sleep/wakeup
225 */
226
227static void mac_wol_reset(struct mac_regs __iomem * regs)
228{
229
230 /* Turn off SWPTAG right after leaving power mode */
231 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
232 /* clear sticky bits */
233 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
234
235 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
236 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
237 /* disable force PME-enable */
238 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
239 /* disable power-event config bit */
240 writew(0xFFFF, &regs->WOLCRClr);
241 /* clear power status */
242 writew(0xFFFF, &regs->WOLSRClr);
243}
1da177e4
LT		 244
245static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
7282d491 246static const struct ethtool_ops velocity_ethtool_ops;
1da177e4
LT		 247
248/*
249 Define module options
250*/
251
252MODULE_AUTHOR("VIA Networking Technologies, Inc.");
253MODULE_LICENSE("GPL");
254MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
255
256#define VELOCITY_PARAM(N,D) \
257 static int N[MAX_UNITS]=OPTION_DEFAULT;\
258 module_param_array(N, int, NULL, 0); \
259 MODULE_PARM_DESC(N, D);
260
261#define RX_DESC_MIN 64
262#define RX_DESC_MAX 255
263#define RX_DESC_DEF 64
264VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
265
266#define TX_DESC_MIN 16
267#define TX_DESC_MAX 256
268#define TX_DESC_DEF 64
269VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
270
1da177e4
LT		 271#define RX_THRESH_MIN 0
272#define RX_THRESH_MAX 3
273#define RX_THRESH_DEF 0
274/* rx_thresh[] is used for controlling the receive fifo threshold.
275 0: indicate the rxfifo threshold is 128 bytes.
276 1: indicate the rxfifo threshold is 512 bytes.
277 2: indicate the rxfifo threshold is 1024 bytes.
278 3: indicate the rxfifo threshold is store & forward.
279*/
280VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
281
282#define DMA_LENGTH_MIN 0
283#define DMA_LENGTH_MAX 7
284#define DMA_LENGTH_DEF 0
285
286/* DMA_length[] is used for controlling the DMA length
287 0: 8 DWORDs
288 1: 16 DWORDs
289 2: 32 DWORDs
290 3: 64 DWORDs
291 4: 128 DWORDs
292 5: 256 DWORDs
293 6: SF(flush till emply)
294 7: SF(flush till emply)
295*/
296VELOCITY_PARAM(DMA_length, "DMA length");
297
1da177e4
LT		 298#define IP_ALIG_DEF 0
299/* IP_byte_align[] is used for IP header DWORD byte aligned
300 0: indicate the IP header won't be DWORD byte aligned.(Default) .
301 1: indicate the IP header will be DWORD byte aligned.
302 In some enviroment, the IP header should be DWORD byte aligned,
303 or the packet will be droped when we receive it. (eg: IPVS)
304*/
305VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
306
307#define TX_CSUM_DEF 1
308/* txcsum_offload[] is used for setting the checksum offload ability of NIC.
309 (We only support RX checksum offload now)
310 0: disable csum_offload[checksum offload
311 1: enable checksum offload. (Default)
312*/
313VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
314
315#define FLOW_CNTL_DEF 1
316#define FLOW_CNTL_MIN 1
317#define FLOW_CNTL_MAX 5
318
319/* flow_control[] is used for setting the flow control ability of NIC.
320 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
321 2: enable TX flow control.
322 3: enable RX flow control.
323 4: enable RX/TX flow control.
324 5: disable
325*/
326VELOCITY_PARAM(flow_control, "Enable flow control ability");
327
328#define MED_LNK_DEF 0
329#define MED_LNK_MIN 0
330#define MED_LNK_MAX 4
331/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
332 0: indicate autonegotiation for both speed and duplex mode
333 1: indicate 100Mbps half duplex mode
334 2: indicate 100Mbps full duplex mode
335 3: indicate 10Mbps half duplex mode
336 4: indicate 10Mbps full duplex mode
337
338 Note:
339 if EEPROM have been set to the force mode, this option is ignored
340 by driver.
341*/
342VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
343
344#define VAL_PKT_LEN_DEF 0
345/* ValPktLen[] is used for setting the checksum offload ability of NIC.
346 0: Receive frame with invalid layer 2 length (Default)
347 1: Drop frame with invalid layer 2 length
348*/
349VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
350
351#define WOL_OPT_DEF 0
352#define WOL_OPT_MIN 0
353#define WOL_OPT_MAX 7
354/* wol_opts[] is used for controlling wake on lan behavior.
355 0: Wake up if recevied a magic packet. (Default)
356 1: Wake up if link status is on/off.
357 2: Wake up if recevied an arp packet.
358 4: Wake up if recevied any unicast packet.
359 Those value can be sumed up to support more than one option.
360*/
361VELOCITY_PARAM(wol_opts, "Wake On Lan options");
362
363#define INT_WORKS_DEF 20
364#define INT_WORKS_MIN 10
365#define INT_WORKS_MAX 64
366
367VELOCITY_PARAM(int_works, "Number of packets per interrupt services");
368
369static int rx_copybreak = 200;
370module_param(rx_copybreak, int, 0644);
371MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
372
cabb7667
JG		 373static void velocity_init_info(struct pci_dev *pdev, struct velocity_info *vptr,
374 const struct velocity_info_tbl *info);
1da177e4
LT		 375static int velocity_get_pci_info(struct velocity_info *, struct pci_dev *pdev);
376static void velocity_print_info(struct velocity_info *vptr);
377static int velocity_open(struct net_device *dev);
378static int velocity_change_mtu(struct net_device *dev, int mtu);
379static int velocity_xmit(struct sk_buff *skb, struct net_device *dev);
7d12e780 380static int velocity_intr(int irq, void *dev_instance);
1da177e4
LT		 381static void velocity_set_multi(struct net_device *dev);
382static struct net_device_stats *velocity_get_stats(struct net_device *dev);
383static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
384static int velocity_close(struct net_device *dev);
385static int velocity_receive_frame(struct velocity_info *, int idx);
386static int velocity_alloc_rx_buf(struct velocity_info *, int idx);
387static void velocity_free_rd_ring(struct velocity_info *vptr);
388static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *);
389static int velocity_soft_reset(struct velocity_info *vptr);
390static void mii_init(struct velocity_info *vptr, u32 mii_status);
8a22dddb 391static u32 velocity_get_link(struct net_device *dev);
1da177e4
LT		 392static u32 velocity_get_opt_media_mode(struct velocity_info *vptr);
393static void velocity_print_link_status(struct velocity_info *vptr);
394static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs);
395static void velocity_shutdown(struct velocity_info *vptr);
396static void enable_flow_control_ability(struct velocity_info *vptr);
397static void enable_mii_autopoll(struct mac_regs __iomem * regs);
398static int velocity_mii_read(struct mac_regs __iomem *, u8 byIdx, u16 * pdata);
399static int velocity_mii_write(struct mac_regs __iomem *, u8 byMiiAddr, u16 data);
400static u32 mii_check_media_mode(struct mac_regs __iomem * regs);
401static u32 check_connection_type(struct mac_regs __iomem * regs);
402static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status);
403
404#ifdef CONFIG_PM
405
406static int velocity_suspend(struct pci_dev *pdev, pm_message_t state);
407static int velocity_resume(struct pci_dev *pdev);
408
ce9f7fe3
RD		 409static DEFINE_SPINLOCK(velocity_dev_list_lock);
410static LIST_HEAD(velocity_dev_list);
411
412#endif
413
414#if defined(CONFIG_PM) && defined(CONFIG_INET)
415
1da177e4
LT		 416static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr);
417
418static struct notifier_block velocity_inetaddr_notifier = {
419 .notifier_call = velocity_netdev_event,
420};
421
1da177e4
LT		 422static void velocity_register_notifier(void)
423{
424 register_inetaddr_notifier(&velocity_inetaddr_notifier);
425}
426
427static void velocity_unregister_notifier(void)
428{
429 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
430}
431
ce9f7fe3 432#else
1da177e4
LT		 433
434#define velocity_register_notifier() do {} while (0)
435#define velocity_unregister_notifier() do {} while (0)
436
ce9f7fe3 437#endif
1da177e4
LT		 438
439/*
440 * Internal board variants. At the moment we have only one
441 */
442
4f14b92f 443static struct velocity_info_tbl chip_info_table[] = {
cabb7667
JG		 444 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
445 { }
1da177e4
LT		 446};
447
448/*
449 * Describe the PCI device identifiers that we support in this
450 * device driver. Used for hotplug autoloading.
451 */
452
e54f4893
JG		 453static const struct pci_device_id velocity_id_table[] __devinitdata = {
454 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
455 { }
1da177e4
LT		 456};
457
458MODULE_DEVICE_TABLE(pci, velocity_id_table);
459
460/**
461 * get_chip_name - identifier to name
462 * @id: chip identifier
463 *
464 * Given a chip identifier return a suitable description. Returns
465 * a pointer a static string valid while the driver is loaded.
466 */
467
01faccbf 468static const char __devinit *get_chip_name(enum chip_type chip_id)
1da177e4
LT		 469{
470 int i;
471 for (i = 0; chip_info_table[i].name != NULL; i++)
472 if (chip_info_table[i].chip_id == chip_id)
473 break;
474 return chip_info_table[i].name;
475}
476
477/**
478 * velocity_remove1 - device unplug
479 * @pdev: PCI device being removed
480 *
481 * Device unload callback. Called on an unplug or on module
482 * unload for each active device that is present. Disconnects
483 * the device from the network layer and frees all the resources
484 */
485
486static void __devexit velocity_remove1(struct pci_dev *pdev)
487{
488 struct net_device *dev = pci_get_drvdata(pdev);
8ab6f3f7 489 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 490
491#ifdef CONFIG_PM
492 unsigned long flags;
493
494 spin_lock_irqsave(&velocity_dev_list_lock, flags);
495 if (!list_empty(&velocity_dev_list))
496 list_del(&vptr->list);
497 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
498#endif
499 unregister_netdev(dev);
500 iounmap(vptr->mac_regs);
501 pci_release_regions(pdev);
502 pci_disable_device(pdev);
503 pci_set_drvdata(pdev, NULL);
504 free_netdev(dev);
505
506 velocity_nics--;
507}
508
509/**
510 * velocity_set_int_opt - parser for integer options
511 * @opt: pointer to option value
512 * @val: value the user requested (or -1 for default)
513 * @min: lowest value allowed
514 * @max: highest value allowed
515 * @def: default value
516 * @name: property name
517 * @dev: device name
518 *
519 * Set an integer property in the module options. This function does
520 * all the verification and checking as well as reporting so that
521 * we don't duplicate code for each option.
522 */
523
524static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, char *devname)
525{
526 if (val == -1)
527 *opt = def;
528 else if (val < min || val > max) {
529 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
530 devname, name, min, max);
531 *opt = def;
532 } else {
533 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
534 devname, name, val);
535 *opt = val;
536 }
537}
538
539/**
540 * velocity_set_bool_opt - parser for boolean options
541 * @opt: pointer to option value
542 * @val: value the user requested (or -1 for default)
543 * @def: default value (yes/no)
544 * @flag: numeric value to set for true.
545 * @name: property name
546 * @dev: device name
547 *
548 * Set a boolean property in the module options. This function does
549 * all the verification and checking as well as reporting so that
550 * we don't duplicate code for each option.
551 */
552
553static void __devinit velocity_set_bool_opt(u32 * opt, int val, int def, u32 flag, char *name, char *devname)
554{
555 (*opt) &= (~flag);
556 if (val == -1)
557 *opt |= (def ? flag : 0);
558 else if (val < 0 || val > 1) {
6aa20a22 559 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT		 560 devname, name);
561 *opt |= (def ? flag : 0);
562 } else {
6aa20a22 563 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT		 564 devname, name, val ? "TRUE" : "FALSE");
565 *opt |= (val ? flag : 0);
566 }
567}
568
569/**
570 * velocity_get_options - set options on device
571 * @opts: option structure for the device
572 * @index: index of option to use in module options array
573 * @devname: device name
574 *
575 * Turn the module and command options into a single structure
576 * for the current device
577 */
578
579static void __devinit velocity_get_options(struct velocity_opt *opts, int index, char *devname)
580{
581
582 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
583 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
584 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
585 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
501e4d24 586
1da177e4
LT		 587 velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname);
588 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
589 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
590 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
591 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
592 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
593 velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname);
594 opts->numrx = (opts->numrx & ~3);
595}
596
597/**
598 * velocity_init_cam_filter - initialise CAM
599 * @vptr: velocity to program
600 *
601 * Initialize the content addressable memory used for filters. Load
602 * appropriately according to the presence of VLAN
603 */
604
605static void velocity_init_cam_filter(struct velocity_info *vptr)
606{
607 struct mac_regs __iomem * regs = vptr->mac_regs;
501e4d24 608 unsigned short vid;
1da177e4
LT		 609
610 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
611 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
612 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
613
614 /* Disable all CAMs */
615 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
616 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
01faccbf
SH		 617 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
618 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4
LT		 619
620 /* Enable first VCAM */
501e4d24
SH		 621 if (vptr->vlgrp) {
622 for (vid = 0; vid < VLAN_VID_MASK; vid++) {
623 if (vlan_group_get_device(vptr->vlgrp, vid)) {
624 /* If Tagging option is enabled and
625 VLAN ID is not zero, then
626 turn on MCFG_RTGOPT also */
627 if (vid != 0)
628 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
629
01faccbf 630 mac_set_vlan_cam(regs, 0, (u8 *) &vid);
501e4d24
SH		 631 }
632 }
1da177e4 633 vptr->vCAMmask[0] |= 1;
01faccbf 634 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
1da177e4
LT		 635 } else {
636 u16 temp = 0;
01faccbf 637 mac_set_vlan_cam(regs, 0, (u8 *) &temp);
1da177e4 638 temp = 1;
01faccbf 639 mac_set_vlan_cam_mask(regs, (u8 *) &temp);
1da177e4
LT		 640 }
641}
642
501e4d24
SH		 643static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
644{
645 struct velocity_info *vptr = netdev_priv(dev);
646
647 spin_lock_irq(&vptr->lock);
648 velocity_init_cam_filter(vptr);
649 spin_unlock_irq(&vptr->lock);
650}
651
652static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
653{
654 struct velocity_info *vptr = netdev_priv(dev);
655
656 spin_lock_irq(&vptr->lock);
657 vlan_group_set_device(vptr->vlgrp, vid, NULL);
658 velocity_init_cam_filter(vptr);
659 spin_unlock_irq(&vptr->lock);
660}
661
662
1da177e4
LT		 663/**
664 * velocity_rx_reset - handle a receive reset
665 * @vptr: velocity we are resetting
666 *
667 * Reset the ownership and status for the receive ring side.
668 * Hand all the receive queue to the NIC.
669 */
670
671static void velocity_rx_reset(struct velocity_info *vptr)
672{
673
674 struct mac_regs __iomem * regs = vptr->mac_regs;
675 int i;
676
677 vptr->rd_dirty = vptr->rd_filled = vptr->rd_curr = 0;
678
679 /*
680 * Init state, all RD entries belong to the NIC
681 */
682 for (i = 0; i < vptr->options.numrx; ++i)
4a51c0d0 683 vptr->rd_ring[i].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 684
685 writew(vptr->options.numrx, &regs->RBRDU);
686 writel(vptr->rd_pool_dma, &regs->RDBaseLo);
687 writew(0, &regs->RDIdx);
688 writew(vptr->options.numrx - 1, &regs->RDCSize);
689}
690
691/**
692 * velocity_init_registers - initialise MAC registers
693 * @vptr: velocity to init
694 * @type: type of initialisation (hot or cold)
695 *
696 * Initialise the MAC on a reset or on first set up on the
697 * hardware.
698 */
699
6aa20a22 700static void velocity_init_registers(struct velocity_info *vptr,
1da177e4
LT		 701 enum velocity_init_type type)
702{
703 struct mac_regs __iomem * regs = vptr->mac_regs;
704 int i, mii_status;
705
706 mac_wol_reset(regs);
707
708 switch (type) {
709 case VELOCITY_INIT_RESET:
710 case VELOCITY_INIT_WOL:
711
712 netif_stop_queue(vptr->dev);
713
714 /*
715 * Reset RX to prevent RX pointer not on the 4X location
716 */
717 velocity_rx_reset(vptr);
718 mac_rx_queue_run(regs);
719 mac_rx_queue_wake(regs);
720
721 mii_status = velocity_get_opt_media_mode(vptr);
722 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
723 velocity_print_link_status(vptr);
724 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
725 netif_wake_queue(vptr->dev);
726 }
727
728 enable_flow_control_ability(vptr);
729
730 mac_clear_isr(regs);
731 writel(CR0_STOP, &regs->CR0Clr);
6aa20a22 732 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1da177e4
LT		 733 &regs->CR0Set);
734
735 break;
736
737 case VELOCITY_INIT_COLD:
738 default:
739 /*
740 * Do reset
741 */
742 velocity_soft_reset(vptr);
743 mdelay(5);
744
745 mac_eeprom_reload(regs);
746 for (i = 0; i < 6; i++) {
747 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
748 }
749 /*
750 * clear Pre_ACPI bit.
751 */
752 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
753 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
754 mac_set_dma_length(regs, vptr->options.DMA_length);
755
756 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
757 /*
758 * Back off algorithm use original IEEE standard
759 */
760 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
761
762 /*
763 * Init CAM filter
764 */
765 velocity_init_cam_filter(vptr);
766
767 /*
768 * Set packet filter: Receive directed and broadcast address
769 */
770 velocity_set_multi(vptr->dev);
771
772 /*
773 * Enable MII auto-polling
774 */
775 enable_mii_autopoll(regs);
776
777 vptr->int_mask = INT_MASK_DEF;
778
4a51c0d0 779 writel(vptr->rd_pool_dma, &regs->RDBaseLo);
1da177e4
LT		 780 writew(vptr->options.numrx - 1, &regs->RDCSize);
781 mac_rx_queue_run(regs);
782 mac_rx_queue_wake(regs);
783
784 writew(vptr->options.numtx - 1, &regs->TDCSize);
785
786 for (i = 0; i < vptr->num_txq; i++) {
4a51c0d0 787 writel(vptr->td_pool_dma[i], &regs->TDBaseLo[i]);
1da177e4
LT		 788 mac_tx_queue_run(regs, i);
789 }
790
791 init_flow_control_register(vptr);
792
793 writel(CR0_STOP, &regs->CR0Clr);
794 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
795
796 mii_status = velocity_get_opt_media_mode(vptr);
797 netif_stop_queue(vptr->dev);
798
799 mii_init(vptr, mii_status);
800
801 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
802 velocity_print_link_status(vptr);
803 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
804 netif_wake_queue(vptr->dev);
805 }
806
807 enable_flow_control_ability(vptr);
808 mac_hw_mibs_init(regs);
809 mac_write_int_mask(vptr->int_mask, regs);
810 mac_clear_isr(regs);
811
812 }
813}
814
815/**
816 * velocity_soft_reset - soft reset
817 * @vptr: velocity to reset
818 *
819 * Kick off a soft reset of the velocity adapter and then poll
820 * until the reset sequence has completed before returning.
821 */
822
823static int velocity_soft_reset(struct velocity_info *vptr)
824{
825 struct mac_regs __iomem * regs = vptr->mac_regs;
826 int i = 0;
827
828 writel(CR0_SFRST, &regs->CR0Set);
829
830 for (i = 0; i < W_MAX_TIMEOUT; i++) {
831 udelay(5);
832 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
833 break;
834 }
835
836 if (i == W_MAX_TIMEOUT) {
837 writel(CR0_FORSRST, &regs->CR0Set);
838 /* FIXME: PCI POSTING */
839 /* delay 2ms */
840 mdelay(2);
841 }
842 return 0;
843}
844
845/**
846 * velocity_found1 - set up discovered velocity card
847 * @pdev: PCI device
848 * @ent: PCI device table entry that matched
849 *
850 * Configure a discovered adapter from scratch. Return a negative
851 * errno error code on failure paths.
852 */
853
854static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
855{
856 static int first = 1;
857 struct net_device *dev;
858 int i;
cabb7667 859 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
1da177e4
LT		 860 struct velocity_info *vptr;
861 struct mac_regs __iomem * regs;
862 int ret = -ENOMEM;
863
e54f4893
JG		 864 /* FIXME: this driver, like almost all other ethernet drivers,
865 * can support more than MAX_UNITS.
866 */
1da177e4 867 if (velocity_nics >= MAX_UNITS) {
6aa20a22 868 dev_notice(&pdev->dev, "already found %d NICs.\n",
e54f4893 869 velocity_nics);
1da177e4
LT		 870 return -ENODEV;
871 }
872
873 dev = alloc_etherdev(sizeof(struct velocity_info));
e54f4893 874 if (!dev) {
9b91cf9d 875 dev_err(&pdev->dev, "allocate net device failed.\n");
1da177e4
LT		 876 goto out;
877 }
6aa20a22 878
1da177e4 879 /* Chain it all together */
6aa20a22 880
1da177e4 881 SET_NETDEV_DEV(dev, &pdev->dev);
8ab6f3f7 882 vptr = netdev_priv(dev);
1da177e4
LT		 883
884
885 if (first) {
6aa20a22 886 printk(KERN_INFO "%s Ver. %s\n",
1da177e4
LT		 887 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
888 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
889 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
890 first = 0;
891 }
892
893 velocity_init_info(pdev, vptr, info);
894
895 vptr->dev = dev;
896
897 dev->irq = pdev->irq;
898
899 ret = pci_enable_device(pdev);
6aa20a22 900 if (ret < 0)
1da177e4
LT		 901 goto err_free_dev;
902
903 ret = velocity_get_pci_info(vptr, pdev);
904 if (ret < 0) {
e54f4893 905 /* error message already printed */
1da177e4
LT		 906 goto err_disable;
907 }
908
909 ret = pci_request_regions(pdev, VELOCITY_NAME);
910 if (ret < 0) {
9b91cf9d 911 dev_err(&pdev->dev, "No PCI resources.\n");
1da177e4
LT		 912 goto err_disable;
913 }
914
cabb7667 915 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
1da177e4
LT		 916 if (regs == NULL) {
917 ret = -EIO;
918 goto err_release_res;
919 }
920
921 vptr->mac_regs = regs;
922
923 mac_wol_reset(regs);
924
925 dev->base_addr = vptr->ioaddr;
926
927 for (i = 0; i < 6; i++)
928 dev->dev_addr[i] = readb(&regs->PAR[i]);
929
930
931 velocity_get_options(&vptr->options, velocity_nics, dev->name);
932
6aa20a22 933 /*
1da177e4
LT		 934 * Mask out the options cannot be set to the chip
935 */
6aa20a22 936
1da177e4
LT		 937 vptr->options.flags &= info->flags;
938
939 /*
940 * Enable the chip specified capbilities
941 */
6aa20a22 942
1da177e4
LT		 943 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
944
945 vptr->wol_opts = vptr->options.wol_opts;
946 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
947
948 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
949
950 dev->irq = pdev->irq;
951 dev->open = velocity_open;
952 dev->hard_start_xmit = velocity_xmit;
953 dev->stop = velocity_close;
954 dev->get_stats = velocity_get_stats;
955 dev->set_multicast_list = velocity_set_multi;
956 dev->do_ioctl = velocity_ioctl;
957 dev->ethtool_ops = &velocity_ethtool_ops;
958 dev->change_mtu = velocity_change_mtu;
501e4d24
SH		 959
960 dev->vlan_rx_add_vid = velocity_vlan_rx_add_vid;
961 dev->vlan_rx_kill_vid = velocity_vlan_rx_kill_vid;
962
1da177e4
LT		 963#ifdef VELOCITY_ZERO_COPY_SUPPORT
964 dev->features |= NETIF_F_SG;
965#endif
501e4d24 966 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER;
1da177e4 967
501e4d24 968 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM)
9f3f46b5 969 dev->features |= NETIF_F_IP_CSUM;
1da177e4
LT		 970
971 ret = register_netdev(dev);
972 if (ret < 0)
973 goto err_iounmap;
974
8a22dddb
FR		 975 if (velocity_get_link(dev))
976 netif_carrier_off(dev);
977
1da177e4
LT		 978 velocity_print_info(vptr);
979 pci_set_drvdata(pdev, dev);
6aa20a22 980
1da177e4 981 /* and leave the chip powered down */
6aa20a22 982
1da177e4
LT		 983 pci_set_power_state(pdev, PCI_D3hot);
984#ifdef CONFIG_PM
985 {
986 unsigned long flags;
987
988 spin_lock_irqsave(&velocity_dev_list_lock, flags);
989 list_add(&vptr->list, &velocity_dev_list);
990 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
991 }
992#endif
993 velocity_nics++;
994out:
995 return ret;
996
997err_iounmap:
998 iounmap(regs);
999err_release_res:
1000 pci_release_regions(pdev);
1001err_disable:
1002 pci_disable_device(pdev);
1003err_free_dev:
1004 free_netdev(dev);
1005 goto out;
1006}
1007
1008/**
1009 * velocity_print_info - per driver data
1010 * @vptr: velocity
1011 *
1012 * Print per driver data as the kernel driver finds Velocity
1013 * hardware
1014 */
1015
1016static void __devinit velocity_print_info(struct velocity_info *vptr)
1017{
1018 struct net_device *dev = vptr->dev;
1019
1020 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
6aa20a22
JG		 1021 printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
1022 dev->name,
1023 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1da177e4
LT		 1024 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1025}
1026
1027/**
1028 * velocity_init_info - init private data
1029 * @pdev: PCI device
1030 * @vptr: Velocity info
1031 * @info: Board type
1032 *
1033 * Set up the initial velocity_info struct for the device that has been
1034 * discovered.
1035 */
1036
cabb7667
JG		 1037static void __devinit velocity_init_info(struct pci_dev *pdev,
1038 struct velocity_info *vptr,
1039 const struct velocity_info_tbl *info)
1da177e4
LT		 1040{
1041 memset(vptr, 0, sizeof(struct velocity_info));
1042
1043 vptr->pdev = pdev;
1044 vptr->chip_id = info->chip_id;
1da177e4
LT		 1045 vptr->num_txq = info->txqueue;
1046 vptr->multicast_limit = MCAM_SIZE;
1047 spin_lock_init(&vptr->lock);
1048 INIT_LIST_HEAD(&vptr->list);
1049}
1050
1051/**
1052 * velocity_get_pci_info - retrieve PCI info for device
1053 * @vptr: velocity device
1054 * @pdev: PCI device it matches
1055 *
1056 * Retrieve the PCI configuration space data that interests us from
1057 * the kernel PCI layer
1058 */
1059
1060static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
1061{
44c10138 1062 vptr->rev_id = pdev->revision;
6aa20a22 1063
1da177e4
LT		 1064 pci_set_master(pdev);
1065
1066 vptr->ioaddr = pci_resource_start(pdev, 0);
1067 vptr->memaddr = pci_resource_start(pdev, 1);
6aa20a22 1068
e54f4893 1069 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
9b91cf9d 1070 dev_err(&pdev->dev,
e54f4893 1071 "region #0 is not an I/O resource, aborting.\n");
1da177e4
LT		 1072 return -EINVAL;
1073 }
1074
e54f4893 1075 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
9b91cf9d 1076 dev_err(&pdev->dev,
e54f4893 1077 "region #1 is an I/O resource, aborting.\n");
1da177e4
LT		 1078 return -EINVAL;
1079 }
1080
cabb7667 1081 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
9b91cf9d 1082 dev_err(&pdev->dev, "region #1 is too small.\n");
1da177e4
LT		 1083 return -EINVAL;
1084 }
1085 vptr->pdev = pdev;
1086
1087 return 0;
1088}
1089
1090/**
1091 * velocity_init_rings - set up DMA rings
1092 * @vptr: Velocity to set up
1093 *
1094 * Allocate PCI mapped DMA rings for the receive and transmit layer
1095 * to use.
1096 */
1097
1098static int velocity_init_rings(struct velocity_info *vptr)
1099{
1100 int i;
1101 unsigned int psize;
1102 unsigned int tsize;
1103 dma_addr_t pool_dma;
1104 u8 *pool;
1105
1106 /*
6aa20a22 1107 * Allocate all RD/TD rings a single pool
1da177e4 1108 */
6aa20a22
JG		 1109
1110 psize = vptr->options.numrx * sizeof(struct rx_desc) +
1da177e4
LT		 1111 vptr->options.numtx * sizeof(struct tx_desc) * vptr->num_txq;
1112
1113 /*
1114 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1115 * alignment
1116 */
1117 pool = pci_alloc_consistent(vptr->pdev, psize, &pool_dma);
1118
1119 if (pool == NULL) {
6aa20a22 1120 printk(KERN_ERR "%s : DMA memory allocation failed.\n",
1da177e4
LT		 1121 vptr->dev->name);
1122 return -ENOMEM;
1123 }
1124
1125 memset(pool, 0, psize);
1126
1127 vptr->rd_ring = (struct rx_desc *) pool;
1128
1129 vptr->rd_pool_dma = pool_dma;
1130
1131 tsize = vptr->options.numtx * PKT_BUF_SZ * vptr->num_txq;
6aa20a22 1132 vptr->tx_bufs = pci_alloc_consistent(vptr->pdev, tsize,
1da177e4
LT		 1133 &vptr->tx_bufs_dma);
1134
1135 if (vptr->tx_bufs == NULL) {
6aa20a22 1136 printk(KERN_ERR "%s: DMA memory allocation failed.\n",
1da177e4
LT		 1137 vptr->dev->name);
1138 pci_free_consistent(vptr->pdev, psize, pool, pool_dma);
1139 return -ENOMEM;
1140 }
1141
1142 memset(vptr->tx_bufs, 0, vptr->options.numtx * PKT_BUF_SZ * vptr->num_txq);
1143
1144 i = vptr->options.numrx * sizeof(struct rx_desc);
1145 pool += i;
1146 pool_dma += i;
1147 for (i = 0; i < vptr->num_txq; i++) {
1148 int offset = vptr->options.numtx * sizeof(struct tx_desc);
1149
1150 vptr->td_pool_dma[i] = pool_dma;
1151 vptr->td_rings[i] = (struct tx_desc *) pool;
1152 pool += offset;
1153 pool_dma += offset;
1154 }
1155 return 0;
1156}
1157
1158/**
1159 * velocity_free_rings - free PCI ring pointers
1160 * @vptr: Velocity to free from
1161 *
1162 * Clean up the PCI ring buffers allocated to this velocity.
1163 */
1164
1165static void velocity_free_rings(struct velocity_info *vptr)
1166{
1167 int size;
1168
6aa20a22 1169 size = vptr->options.numrx * sizeof(struct rx_desc) +
1da177e4
LT		 1170 vptr->options.numtx * sizeof(struct tx_desc) * vptr->num_txq;
1171
1172 pci_free_consistent(vptr->pdev, size, vptr->rd_ring, vptr->rd_pool_dma);
1173
1174 size = vptr->options.numtx * PKT_BUF_SZ * vptr->num_txq;
1175
1176 pci_free_consistent(vptr->pdev, size, vptr->tx_bufs, vptr->tx_bufs_dma);
1177}
1178
1179static inline void velocity_give_many_rx_descs(struct velocity_info *vptr)
1180{
1181 struct mac_regs __iomem *regs = vptr->mac_regs;
1182 int avail, dirty, unusable;
1183
1184 /*
1185 * RD number must be equal to 4X per hardware spec
1186 * (programming guide rev 1.20, p.13)
1187 */
1188 if (vptr->rd_filled < 4)
1189 return;
1190
1191 wmb();
1192
1193 unusable = vptr->rd_filled & 0x0003;
1194 dirty = vptr->rd_dirty - unusable;
1195 for (avail = vptr->rd_filled & 0xfffc; avail; avail--) {
1196 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
4a51c0d0 1197 vptr->rd_ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 1198 }
1199
1200 writew(vptr->rd_filled & 0xfffc, &regs->RBRDU);
1201 vptr->rd_filled = unusable;
1202}
1203
1204static int velocity_rx_refill(struct velocity_info *vptr)
1205{
1206 int dirty = vptr->rd_dirty, done = 0, ret = 0;
1207
1208 do {
1209 struct rx_desc *rd = vptr->rd_ring + dirty;
1210
1211 /* Fine for an all zero Rx desc at init time as well */
4a51c0d0 1212 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1213 break;
1214
1215 if (!vptr->rd_info[dirty].skb) {
1216 ret = velocity_alloc_rx_buf(vptr, dirty);
1217 if (ret < 0)
1218 break;
1219 }
1220 done++;
6aa20a22 1221 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1da177e4
LT		 1222 } while (dirty != vptr->rd_curr);
1223
1224 if (done) {
1225 vptr->rd_dirty = dirty;
1226 vptr->rd_filled += done;
1227 velocity_give_many_rx_descs(vptr);
1228 }
1229
1230 return ret;
1231}
1232
1233/**
1234 * velocity_init_rd_ring - set up receive ring
1235 * @vptr: velocity to configure
1236 *
1237 * Allocate and set up the receive buffers for each ring slot and
1238 * assign them to the network adapter.
1239 */
1240
1241static int velocity_init_rd_ring(struct velocity_info *vptr)
1242{
ae94607d 1243 int ret;
48f6b053
SH		 1244 int mtu = vptr->dev->mtu;
1245
1246 vptr->rx_buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
1da177e4 1247
ae94607d
MK		 1248 vptr->rd_info = kcalloc(vptr->options.numrx,
1249 sizeof(struct velocity_rd_info), GFP_KERNEL);
1250 if (!vptr->rd_info)
1251 return -ENOMEM;
1da177e4
LT		 1252
1253 vptr->rd_filled = vptr->rd_dirty = vptr->rd_curr = 0;
1254
1255 ret = velocity_rx_refill(vptr);
1256 if (ret < 0) {
1257 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1258 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1259 velocity_free_rd_ring(vptr);
1260 }
ae94607d 1261
1da177e4
LT		 1262 return ret;
1263}
1264
1265/**
1266 * velocity_free_rd_ring - free receive ring
1267 * @vptr: velocity to clean up
1268 *
1269 * Free the receive buffers for each ring slot and any
1270 * attached socket buffers that need to go away.
1271 */
1272
1273static void velocity_free_rd_ring(struct velocity_info *vptr)
1274{
1275 int i;
1276
1277 if (vptr->rd_info == NULL)
1278 return;
1279
1280 for (i = 0; i < vptr->options.numrx; i++) {
1281 struct velocity_rd_info *rd_info = &(vptr->rd_info[i]);
b3c3e7d7
FR		 1282 struct rx_desc *rd = vptr->rd_ring + i;
1283
1284 memset(rd, 0, sizeof(*rd));
1da177e4
LT		 1285
1286 if (!rd_info->skb)
1287 continue;
1288 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
1289 PCI_DMA_FROMDEVICE);
1290 rd_info->skb_dma = (dma_addr_t) NULL;
1291
1292 dev_kfree_skb(rd_info->skb);
1293 rd_info->skb = NULL;
1294 }
1295
1296 kfree(vptr->rd_info);
1297 vptr->rd_info = NULL;
1298}
1299
1300/**
1301 * velocity_init_td_ring - set up transmit ring
1302 * @vptr: velocity
1303 *
1304 * Set up the transmit ring and chain the ring pointers together.
1305 * Returns zero on success or a negative posix errno code for
1306 * failure.
1307 */
6aa20a22 1308
1da177e4
LT		 1309static int velocity_init_td_ring(struct velocity_info *vptr)
1310{
1311 int i, j;
1312 dma_addr_t curr;
1313 struct tx_desc *td;
1314 struct velocity_td_info *td_info;
1da177e4
LT		 1315
1316 /* Init the TD ring entries */
1317 for (j = 0; j < vptr->num_txq; j++) {
1318 curr = vptr->td_pool_dma[j];
1319
ae94607d
MK		 1320 vptr->td_infos[j] = kcalloc(vptr->options.numtx,
1321 sizeof(struct velocity_td_info),
1322 GFP_KERNEL);
1323 if (!vptr->td_infos[j]) {
1da177e4
LT		 1324 while(--j >= 0)
1325 kfree(vptr->td_infos[j]);
1326 return -ENOMEM;
1327 }
1da177e4
LT		 1328
1329 for (i = 0; i < vptr->options.numtx; i++, curr += sizeof(struct tx_desc)) {
1330 td = &(vptr->td_rings[j][i]);
1331 td_info = &(vptr->td_infos[j][i]);
1332 td_info->buf = vptr->tx_bufs +
1333 (j * vptr->options.numtx + i) * PKT_BUF_SZ;
1334 td_info->buf_dma = vptr->tx_bufs_dma +
1335 (j * vptr->options.numtx + i) * PKT_BUF_SZ;
1336 }
1337 vptr->td_tail[j] = vptr->td_curr[j] = vptr->td_used[j] = 0;
1338 }
1339 return 0;
1340}
1341
1342/*
1343 * FIXME: could we merge this with velocity_free_tx_buf ?
1344 */
1345
1346static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1347 int q, int n)
1348{
1349 struct velocity_td_info * td_info = &(vptr->td_infos[q][n]);
1350 int i;
6aa20a22 1351
1da177e4
LT		 1352 if (td_info == NULL)
1353 return;
6aa20a22 1354
1da177e4
LT		 1355 if (td_info->skb) {
1356 for (i = 0; i < td_info->nskb_dma; i++)
1357 {
1358 if (td_info->skb_dma[i]) {
6aa20a22 1359 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1da177e4
LT		 1360 td_info->skb->len, PCI_DMA_TODEVICE);
1361 td_info->skb_dma[i] = (dma_addr_t) NULL;
1362 }
1363 }
1364 dev_kfree_skb(td_info->skb);
1365 td_info->skb = NULL;
1366 }
1367}
1368
1369/**
1370 * velocity_free_td_ring - free td ring
1371 * @vptr: velocity
1372 *
1373 * Free up the transmit ring for this particular velocity adapter.
1374 * We free the ring contents but not the ring itself.
1375 */
6aa20a22 1376
1da177e4
LT		 1377static void velocity_free_td_ring(struct velocity_info *vptr)
1378{
1379 int i, j;
1380
1381 for (j = 0; j < vptr->num_txq; j++) {
1382 if (vptr->td_infos[j] == NULL)
1383 continue;
1384 for (i = 0; i < vptr->options.numtx; i++) {
1385 velocity_free_td_ring_entry(vptr, j, i);
1386
1387 }
b4558ea9
JJ		 1388 kfree(vptr->td_infos[j]);
1389 vptr->td_infos[j] = NULL;
1da177e4
LT		 1390 }
1391}
1392
1393/**
1394 * velocity_rx_srv - service RX interrupt
1395 * @vptr: velocity
1396 * @status: adapter status (unused)
1397 *
1398 * Walk the receive ring of the velocity adapter and remove
1399 * any received packets from the receive queue. Hand the ring
1400 * slots back to the adapter for reuse.
1401 */
6aa20a22 1402
1da177e4
LT		 1403static int velocity_rx_srv(struct velocity_info *vptr, int status)
1404{
1405 struct net_device_stats *stats = &vptr->stats;
1406 int rd_curr = vptr->rd_curr;
1407 int works = 0;
1408
1409 do {
1410 struct rx_desc *rd = vptr->rd_ring + rd_curr;
1411
1412 if (!vptr->rd_info[rd_curr].skb)
1413 break;
1414
4a51c0d0 1415 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1416 break;
1417
1418 rmb();
1419
1420 /*
1421 * Don't drop CE or RL error frame although RXOK is off
1422 */
4a51c0d0 1423 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
1da177e4
LT		 1424 if (velocity_receive_frame(vptr, rd_curr) < 0)
1425 stats->rx_dropped++;
1426 } else {
1427 if (rd->rdesc0.RSR & RSR_CRC)
1428 stats->rx_crc_errors++;
1429 if (rd->rdesc0.RSR & RSR_FAE)
1430 stats->rx_frame_errors++;
1431
1432 stats->rx_dropped++;
1433 }
1434
4a51c0d0 1435 rd->size |= RX_INTEN;
1da177e4
LT		 1436
1437 vptr->dev->last_rx = jiffies;
1438
1439 rd_curr++;
1440 if (rd_curr >= vptr->options.numrx)
1441 rd_curr = 0;
1442 } while (++works <= 15);
1443
1444 vptr->rd_curr = rd_curr;
1445
1446 if (works > 0 && velocity_rx_refill(vptr) < 0) {
1447 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1448 "%s: rx buf allocation failure\n", vptr->dev->name);
1449 }
1450
1451 VAR_USED(stats);
1452 return works;
1453}
1454
1455/**
1456 * velocity_rx_csum - checksum process
1457 * @rd: receive packet descriptor
1458 * @skb: network layer packet buffer
1459 *
1460 * Process the status bits for the received packet and determine
1461 * if the checksum was computed and verified by the hardware
1462 */
6aa20a22 1463
1da177e4
LT		 1464static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1465{
1466 skb->ip_summed = CHECKSUM_NONE;
1467
1468 if (rd->rdesc1.CSM & CSM_IPKT) {
1469 if (rd->rdesc1.CSM & CSM_IPOK) {
6aa20a22 1470 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1da177e4
LT		 1471 (rd->rdesc1.CSM & CSM_UDPKT)) {
1472 if (!(rd->rdesc1.CSM & CSM_TUPOK)) {
1473 return;
1474 }
1475 }
1476 skb->ip_summed = CHECKSUM_UNNECESSARY;
1477 }
1478 }
1479}
1480
1481/**
1482 * velocity_rx_copy - in place Rx copy for small packets
1483 * @rx_skb: network layer packet buffer candidate
1484 * @pkt_size: received data size
1485 * @rd: receive packet descriptor
1486 * @dev: network device
1487 *
1488 * Replace the current skb that is scheduled for Rx processing by a
1489 * shorter, immediatly allocated skb, if the received packet is small
1490 * enough. This function returns a negative value if the received
1491 * packet is too big or if memory is exhausted.
1492 */
1493static inline int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1494 struct velocity_info *vptr)
1495{
1496 int ret = -1;
1497
1498 if (pkt_size < rx_copybreak) {
1499 struct sk_buff *new_skb;
1500
1501 new_skb = dev_alloc_skb(pkt_size + 2);
1502 if (new_skb) {
1503 new_skb->dev = vptr->dev;
1504 new_skb->ip_summed = rx_skb[0]->ip_summed;
1505
1506 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN)
1507 skb_reserve(new_skb, 2);
1508
d626f62b
ACM		 1509 skb_copy_from_linear_data(rx_skb[0], new_skb->data,
1510 pkt_size);
1da177e4
LT		 1511 *rx_skb = new_skb;
1512 ret = 0;
1513 }
6aa20a22 1514
1da177e4
LT		 1515 }
1516 return ret;
1517}
1518
1519/**
1520 * velocity_iph_realign - IP header alignment
1521 * @vptr: velocity we are handling
1522 * @skb: network layer packet buffer
1523 * @pkt_size: received data size
1524 *
1525 * Align IP header on a 2 bytes boundary. This behavior can be
1526 * configured by the user.
1527 */
1528static inline void velocity_iph_realign(struct velocity_info *vptr,
1529 struct sk_buff *skb, int pkt_size)
1530{
1531 /* FIXME - memmove ? */
1532 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
1533 int i;
1534
1535 for (i = pkt_size; i >= 0; i--)
1536 *(skb->data + i + 2) = *(skb->data + i);
1537 skb_reserve(skb, 2);
1538 }
1539}
1540
1541/**
1542 * velocity_receive_frame - received packet processor
1543 * @vptr: velocity we are handling
1544 * @idx: ring index
6aa20a22 1545 *
1da177e4
LT		 1546 * A packet has arrived. We process the packet and if appropriate
1547 * pass the frame up the network stack
1548 */
6aa20a22 1549
1da177e4
LT		 1550static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1551{
1552 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
1553 struct net_device_stats *stats = &vptr->stats;
1554 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
1555 struct rx_desc *rd = &(vptr->rd_ring[idx]);
4a51c0d0 1556 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
1da177e4
LT		 1557 struct sk_buff *skb;
1558
1559 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
1560 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
1561 stats->rx_length_errors++;
1562 return -EINVAL;
1563 }
1564
1565 if (rd->rdesc0.RSR & RSR_MAR)
1566 vptr->stats.multicast++;
1567
1568 skb = rd_info->skb;
1da177e4
LT		 1569
1570 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
1571 vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
1572
1573 /*
1574 * Drop frame not meeting IEEE 802.3
1575 */
6aa20a22 1576
1da177e4
LT		 1577 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
1578 if (rd->rdesc0.RSR & RSR_RL) {
1579 stats->rx_length_errors++;
1580 return -EINVAL;
1581 }
1582 }
1583
1584 pci_action = pci_dma_sync_single_for_device;
1585
1586 velocity_rx_csum(rd, skb);
1587
1588 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
1589 velocity_iph_realign(vptr, skb, pkt_len);
1590 pci_action = pci_unmap_single;
1591 rd_info->skb = NULL;
1592 }
1593
1594 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx_buf_sz,
1595 PCI_DMA_FROMDEVICE);
1596
1597 skb_put(skb, pkt_len - 4);
4c13eb66 1598 skb->protocol = eth_type_trans(skb, vptr->dev);
1da177e4
LT		 1599
1600 stats->rx_bytes += pkt_len;
1601 netif_rx(skb);
1602
1603 return 0;
1604}
1605
1606/**
1607 * velocity_alloc_rx_buf - allocate aligned receive buffer
1608 * @vptr: velocity
1609 * @idx: ring index
1610 *
1611 * Allocate a new full sized buffer for the reception of a frame and
1612 * map it into PCI space for the hardware to use. The hardware
1613 * requires *64* byte alignment of the buffer which makes life
1614 * less fun than would be ideal.
1615 */
6aa20a22 1616
1da177e4
LT		 1617static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1618{
1619 struct rx_desc *rd = &(vptr->rd_ring[idx]);
1620 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]);
1621
1622 rd_info->skb = dev_alloc_skb(vptr->rx_buf_sz + 64);
1623 if (rd_info->skb == NULL)
1624 return -ENOMEM;
1625
1626 /*
1627 * Do the gymnastics to get the buffer head for data at
1628 * 64byte alignment.
1629 */
689be439 1630 skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63);
1da177e4 1631 rd_info->skb->dev = vptr->dev;
689be439 1632 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data, vptr->rx_buf_sz, PCI_DMA_FROMDEVICE);
6aa20a22 1633
1da177e4
LT		 1634 /*
1635 * Fill in the descriptor to match
6aa20a22
JG		 1636 */
1637
1da177e4 1638 *((u32 *) & (rd->rdesc0)) = 0;
4a51c0d0 1639 rd->size = cpu_to_le16(vptr->rx_buf_sz) | RX_INTEN;
1da177e4
LT		 1640 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1641 rd->pa_high = 0;
1642 return 0;
1643}
1644
1645/**
1646 * tx_srv - transmit interrupt service
1647 * @vptr; Velocity
1648 * @status:
1649 *
1650 * Scan the queues looking for transmitted packets that
1651 * we can complete and clean up. Update any statistics as
3a4fa0a2 1652 * necessary/
1da177e4 1653 */
6aa20a22 1654
1da177e4
LT		 1655static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1656{
1657 struct tx_desc *td;
1658 int qnum;
1659 int full = 0;
1660 int idx;
1661 int works = 0;
1662 struct velocity_td_info *tdinfo;
1663 struct net_device_stats *stats = &vptr->stats;
1664
1665 for (qnum = 0; qnum < vptr->num_txq; qnum++) {
6aa20a22 1666 for (idx = vptr->td_tail[qnum]; vptr->td_used[qnum] > 0;
1da177e4
LT		 1667 idx = (idx + 1) % vptr->options.numtx) {
1668
1669 /*
1670 * Get Tx Descriptor
1671 */
1672 td = &(vptr->td_rings[qnum][idx]);
1673 tdinfo = &(vptr->td_infos[qnum][idx]);
1674
4a51c0d0 1675 if (td->tdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1676 break;
1677
1678 if ((works++ > 15))
1679 break;
1680
1681 if (td->tdesc0.TSR & TSR0_TERR) {
1682 stats->tx_errors++;
1683 stats->tx_dropped++;
1684 if (td->tdesc0.TSR & TSR0_CDH)
1685 stats->tx_heartbeat_errors++;
1686 if (td->tdesc0.TSR & TSR0_CRS)
1687 stats->tx_carrier_errors++;
1688 if (td->tdesc0.TSR & TSR0_ABT)
1689 stats->tx_aborted_errors++;
1690 if (td->tdesc0.TSR & TSR0_OWC)
1691 stats->tx_window_errors++;
1692 } else {
1693 stats->tx_packets++;
1694 stats->tx_bytes += tdinfo->skb->len;
1695 }
1696 velocity_free_tx_buf(vptr, tdinfo);
1697 vptr->td_used[qnum]--;
1698 }
1699 vptr->td_tail[qnum] = idx;
1700
1701 if (AVAIL_TD(vptr, qnum) < 1) {
1702 full = 1;
1703 }
1704 }
1705 /*
1706 * Look to see if we should kick the transmit network
1707 * layer for more work.
1708 */
1709 if (netif_queue_stopped(vptr->dev) && (full == 0)
1710 && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1711 netif_wake_queue(vptr->dev);
1712 }
1713 return works;
1714}
1715
1716/**
1717 * velocity_print_link_status - link status reporting
1718 * @vptr: velocity to report on
1719 *
1720 * Turn the link status of the velocity card into a kernel log
1721 * description of the new link state, detailing speed and duplex
1722 * status
1723 */
1724
1725static void velocity_print_link_status(struct velocity_info *vptr)
1726{
1727
1728 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1729 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1730 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
b4fea61a 1731 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
1da177e4
LT		 1732
1733 if (vptr->mii_status & VELOCITY_SPEED_1000)
1734 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1735 else if (vptr->mii_status & VELOCITY_SPEED_100)
1736 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1737 else
1738 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1739
1740 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1741 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1742 else
1743 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1744 } else {
1745 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1746 switch (vptr->options.spd_dpx) {
1747 case SPD_DPX_100_HALF:
1748 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1749 break;
1750 case SPD_DPX_100_FULL:
1751 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1752 break;
1753 case SPD_DPX_10_HALF:
1754 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1755 break;
1756 case SPD_DPX_10_FULL:
1757 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1758 break;
1759 default:
1760 break;
1761 }
1762 }
1763}
1764
1765/**
1766 * velocity_error - handle error from controller
1767 * @vptr: velocity
1768 * @status: card status
1769 *
1770 * Process an error report from the hardware and attempt to recover
6aa20a22 1771 * the card itself. At the moment we cannot recover from some
1da177e4
LT		 1772 * theoretically impossible errors but this could be fixed using
1773 * the pci_device_failed logic to bounce the hardware
1774 *
1775 */
6aa20a22 1776
1da177e4
LT		 1777static void velocity_error(struct velocity_info *vptr, int status)
1778{
1779
1780 if (status & ISR_TXSTLI) {
1781 struct mac_regs __iomem * regs = vptr->mac_regs;
1782
0e6ff158 1783 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1da177e4
LT		 1784 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1785 writew(TRDCSR_RUN, &regs->TDCSRClr);
1786 netif_stop_queue(vptr->dev);
6aa20a22 1787
1da177e4
LT		 1788 /* FIXME: port over the pci_device_failed code and use it
1789 here */
1790 }
1791
1792 if (status & ISR_SRCI) {
1793 struct mac_regs __iomem * regs = vptr->mac_regs;
1794 int linked;
1795
1796 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1797 vptr->mii_status = check_connection_type(regs);
1798
1799 /*
6aa20a22 1800 * If it is a 3119, disable frame bursting in
1da177e4
LT		 1801 * halfduplex mode and enable it in fullduplex
1802 * mode
1803 */
1804 if (vptr->rev_id < REV_ID_VT3216_A0) {
1805 if (vptr->mii_status | VELOCITY_DUPLEX_FULL)
1806 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1807 else
1808 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1809 }
1810 /*
1811 * Only enable CD heart beat counter in 10HD mode
1812 */
1813 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) {
1814 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1815 } else {
1816 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1817 }
1818 }
1819 /*
1820 * Get link status from PHYSR0
1821 */
1822 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1823
1824 if (linked) {
1825 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
8a22dddb 1826 netif_carrier_on(vptr->dev);
1da177e4
LT		 1827 } else {
1828 vptr->mii_status |= VELOCITY_LINK_FAIL;
8a22dddb 1829 netif_carrier_off(vptr->dev);
1da177e4
LT		 1830 }
1831
1832 velocity_print_link_status(vptr);
1833 enable_flow_control_ability(vptr);
1834
1835 /*
6aa20a22 1836 * Re-enable auto-polling because SRCI will disable
1da177e4
LT		 1837 * auto-polling
1838 */
6aa20a22 1839
1da177e4
LT		 1840 enable_mii_autopoll(regs);
1841
1842 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1843 netif_stop_queue(vptr->dev);
1844 else
1845 netif_wake_queue(vptr->dev);
1846
1847 };
1848 if (status & ISR_MIBFI)
1849 velocity_update_hw_mibs(vptr);
1850 if (status & ISR_LSTEI)
1851 mac_rx_queue_wake(vptr->mac_regs);
1852}
1853
1854/**
1855 * velocity_free_tx_buf - free transmit buffer
1856 * @vptr: velocity
1857 * @tdinfo: buffer
1858 *
1859 * Release an transmit buffer. If the buffer was preallocated then
1860 * recycle it, if not then unmap the buffer.
1861 */
6aa20a22 1862
1da177e4
LT		 1863static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo)
1864{
1865 struct sk_buff *skb = tdinfo->skb;
1866 int i;
1867
1868 /*
1869 * Don't unmap the pre-allocated tx_bufs
1870 */
1871 if (tdinfo->skb_dma && (tdinfo->skb_dma[0] != tdinfo->buf_dma)) {
1872
1873 for (i = 0; i < tdinfo->nskb_dma; i++) {
1874#ifdef VELOCITY_ZERO_COPY_SUPPORT
4a51c0d0 1875 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], le16_to_cpu(td->tdesc1.len), PCI_DMA_TODEVICE);
1da177e4
LT		 1876#else
1877 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], skb->len, PCI_DMA_TODEVICE);
1878#endif
1879 tdinfo->skb_dma[i] = 0;
1880 }
1881 }
1882 dev_kfree_skb_irq(skb);
1883 tdinfo->skb = NULL;
1884}
1885
1886/**
1887 * velocity_open - interface activation callback
1888 * @dev: network layer device to open
1889 *
1890 * Called when the network layer brings the interface up. Returns
1891 * a negative posix error code on failure, or zero on success.
1892 *
1893 * All the ring allocation and set up is done on open for this
1894 * adapter to minimise memory usage when inactive
1895 */
6aa20a22 1896
1da177e4
LT		 1897static int velocity_open(struct net_device *dev)
1898{
8ab6f3f7 1899 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1900 int ret;
1901
1da177e4
LT		 1902 ret = velocity_init_rings(vptr);
1903 if (ret < 0)
1904 goto out;
1905
1906 ret = velocity_init_rd_ring(vptr);
1907 if (ret < 0)
1908 goto err_free_desc_rings;
1909
1910 ret = velocity_init_td_ring(vptr);
1911 if (ret < 0)
1912 goto err_free_rd_ring;
6aa20a22
JG		 1913
1914 /* Ensure chip is running */
1da177e4 1915 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 1916
1da177e4
LT		 1917 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1918
1fb9df5d 1919 ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED,
1da177e4
LT		 1920 dev->name, dev);
1921 if (ret < 0) {
1922 /* Power down the chip */
1923 pci_set_power_state(vptr->pdev, PCI_D3hot);
1924 goto err_free_td_ring;
1925 }
1926
1927 mac_enable_int(vptr->mac_regs);
1928 netif_start_queue(dev);
1929 vptr->flags |= VELOCITY_FLAGS_OPENED;
1930out:
1931 return ret;
1932
1933err_free_td_ring:
1934 velocity_free_td_ring(vptr);
1935err_free_rd_ring:
1936 velocity_free_rd_ring(vptr);
1937err_free_desc_rings:
1938 velocity_free_rings(vptr);
1939 goto out;
1940}
1941
6aa20a22 1942/**
1da177e4
LT		 1943 * velocity_change_mtu - MTU change callback
1944 * @dev: network device
1945 * @new_mtu: desired MTU
1946 *
1947 * Handle requests from the networking layer for MTU change on
1948 * this interface. It gets called on a change by the network layer.
1949 * Return zero for success or negative posix error code.
1950 */
6aa20a22 1951
1da177e4
LT		 1952static int velocity_change_mtu(struct net_device *dev, int new_mtu)
1953{
8ab6f3f7 1954 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1955 unsigned long flags;
1956 int oldmtu = dev->mtu;
1957 int ret = 0;
1958
1959 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
6aa20a22 1960 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
1da177e4
LT		 1961 vptr->dev->name);
1962 return -EINVAL;
1963 }
1964
bd7b3f34
SH		 1965 if (!netif_running(dev)) {
1966 dev->mtu = new_mtu;
1967 return 0;
1968 }
1969
1da177e4
LT		 1970 if (new_mtu != oldmtu) {
1971 spin_lock_irqsave(&vptr->lock, flags);
1972
1973 netif_stop_queue(dev);
1974 velocity_shutdown(vptr);
1975
1976 velocity_free_td_ring(vptr);
1977 velocity_free_rd_ring(vptr);
1978
1979 dev->mtu = new_mtu;
1da177e4
LT		 1980
1981 ret = velocity_init_rd_ring(vptr);
1982 if (ret < 0)
1983 goto out_unlock;
1984
1985 ret = velocity_init_td_ring(vptr);
1986 if (ret < 0)
1987 goto out_unlock;
1988
1989 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1990
1991 mac_enable_int(vptr->mac_regs);
1992 netif_start_queue(dev);
1993out_unlock:
1994 spin_unlock_irqrestore(&vptr->lock, flags);
1995 }
1996
1997 return ret;
1998}
1999
2000/**
2001 * velocity_shutdown - shut down the chip
2002 * @vptr: velocity to deactivate
2003 *
2004 * Shuts down the internal operations of the velocity and
2005 * disables interrupts, autopolling, transmit and receive
2006 */
6aa20a22 2007
1da177e4
LT		 2008static void velocity_shutdown(struct velocity_info *vptr)
2009{
2010 struct mac_regs __iomem * regs = vptr->mac_regs;
2011 mac_disable_int(regs);
2012 writel(CR0_STOP, &regs->CR0Set);
2013 writew(0xFFFF, &regs->TDCSRClr);
2014 writeb(0xFF, &regs->RDCSRClr);
2015 safe_disable_mii_autopoll(regs);
2016 mac_clear_isr(regs);
2017}
2018
2019/**
2020 * velocity_close - close adapter callback
2021 * @dev: network device
2022 *
2023 * Callback from the network layer when the velocity is being
2024 * deactivated by the network layer
2025 */
2026
2027static int velocity_close(struct net_device *dev)
2028{
8ab6f3f7 2029 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2030
2031 netif_stop_queue(dev);
2032 velocity_shutdown(vptr);
2033
2034 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2035 velocity_get_ip(vptr);
2036 if (dev->irq != 0)
2037 free_irq(dev->irq, dev);
6aa20a22 2038
1da177e4
LT		 2039 /* Power down the chip */
2040 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22 2041
1da177e4
LT		 2042 /* Free the resources */
2043 velocity_free_td_ring(vptr);
2044 velocity_free_rd_ring(vptr);
2045 velocity_free_rings(vptr);
2046
2047 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2048 return 0;
2049}
2050
2051/**
2052 * velocity_xmit - transmit packet callback
2053 * @skb: buffer to transmit
2054 * @dev: network device
2055 *
2056 * Called by the networ layer to request a packet is queued to
2057 * the velocity. Returns zero on success.
2058 */
6aa20a22 2059
1da177e4
LT		 2060static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
2061{
8ab6f3f7 2062 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2063 int qnum = 0;
2064 struct tx_desc *td_ptr;
2065 struct velocity_td_info *tdinfo;
2066 unsigned long flags;
2067 int index;
1da177e4 2068 int pktlen = skb->len;
4a51c0d0 2069 __le16 len = cpu_to_le16(pktlen);
1da177e4 2070
364c6bad
HX		 2071#ifdef VELOCITY_ZERO_COPY_SUPPORT
2072 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
2073 kfree_skb(skb);
2074 return 0;
2075 }
2076#endif
2077
1da177e4
LT		 2078 spin_lock_irqsave(&vptr->lock, flags);
2079
2080 index = vptr->td_curr[qnum];
2081 td_ptr = &(vptr->td_rings[qnum][index]);
2082 tdinfo = &(vptr->td_infos[qnum][index]);
2083
1da177e4 2084 td_ptr->tdesc1.TCR = TCR0_TIC;
4a51c0d0 2085 td_ptr->td_buf[0].size &= ~TD_QUEUE;
1da177e4
LT		 2086
2087 /*
6aa20a22 2088 * Pad short frames.
1da177e4
LT		 2089 */
2090 if (pktlen < ETH_ZLEN) {
2091 /* Cannot occur until ZC support */
1da177e4 2092 pktlen = ETH_ZLEN;
4a51c0d0 2093 len = cpu_to_le16(ETH_ZLEN);
d626f62b 2094 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4
LT		 2095 memset(tdinfo->buf + skb->len, 0, ETH_ZLEN - skb->len);
2096 tdinfo->skb = skb;
2097 tdinfo->skb_dma[0] = tdinfo->buf_dma;
4a51c0d0 2098 td_ptr->tdesc0.len = len;
1da177e4
LT		 2099 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2100 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2101 td_ptr->td_buf[0].size = len; /* queue is 0 anyway */
1da177e4 2102 tdinfo->nskb_dma = 1;
1da177e4
LT		 2103 } else
2104#ifdef VELOCITY_ZERO_COPY_SUPPORT
2105 if (skb_shinfo(skb)->nr_frags > 0) {
2106 int nfrags = skb_shinfo(skb)->nr_frags;
2107 tdinfo->skb = skb;
2108 if (nfrags > 6) {
d626f62b 2109 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4 2110 tdinfo->skb_dma[0] = tdinfo->buf_dma;
4a51c0d0 2111 td_ptr->tdesc0.len = len;
1da177e4
LT		 2112 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2113 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2114 td_ptr->td_buf[0].size = len; /* queue is 0 anyway */
1da177e4 2115 tdinfo->nskb_dma = 1;
1da177e4
LT		 2116 } else {
2117 int i = 0;
2118 tdinfo->nskb_dma = 0;
4a51c0d0
AV		 2119 tdinfo->skb_dma[i] = pci_map_single(vptr->pdev, skb->data,
2120 skb_headlen(skb), PCI_DMA_TODEVICE);
1da177e4 2121
4a51c0d0 2122 td_ptr->tdesc0.len = len;
1da177e4
LT		 2123
2124 /* FIXME: support 48bit DMA later */
2125 td_ptr->td_buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma);
2126 td_ptr->td_buf[i].pa_high = 0;
4a51c0d0 2127 td_ptr->td_buf[i].size = cpu_to_le16(skb_headlen(skb));
1da177e4
LT		 2128
2129 for (i = 0; i < nfrags; i++) {
2130 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
4a51c0d0 2131 void *addr = (void *)page_address(frag->page) + frag->page_offset;
1da177e4
LT		 2132
2133 tdinfo->skb_dma[i + 1] = pci_map_single(vptr->pdev, addr, frag->size, PCI_DMA_TODEVICE);
2134
2135 td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
2136 td_ptr->td_buf[i + 1].pa_high = 0;
4a51c0d0 2137 td_ptr->td_buf[i + 1].size = cpu_to_le16(frag->size);
1da177e4
LT		 2138 }
2139 tdinfo->nskb_dma = i - 1;
1da177e4
LT		 2140 }
2141
2142 } else
2143#endif
2144 {
2145 /*
2146 * Map the linear network buffer into PCI space and
2147 * add it to the transmit ring.
2148 */
2149 tdinfo->skb = skb;
2150 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
4a51c0d0 2151 td_ptr->tdesc0.len = len;
1da177e4
LT		 2152 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2153 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2154 td_ptr->td_buf[0].size = len;
1da177e4 2155 tdinfo->nskb_dma = 1;
1da177e4 2156 }
4a51c0d0 2157 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
1da177e4 2158
501e4d24 2159 if (vptr->vlgrp && vlan_tx_tag_present(skb)) {
4a51c0d0 2160 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1da177e4
LT		 2161 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2162 }
2163
2164 /*
2165 * Handle hardware checksum
2166 */
2167 if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM)
84fa7933 2168 && (skb->ip_summed == CHECKSUM_PARTIAL)) {
eddc9ec5 2169 const struct iphdr *ip = ip_hdr(skb);
1da177e4
LT		 2170 if (ip->protocol == IPPROTO_TCP)
2171 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2172 else if (ip->protocol == IPPROTO_UDP)
2173 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2174 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2175 }
2176 {
2177
2178 int prev = index - 1;
2179
2180 if (prev < 0)
2181 prev = vptr->options.numtx - 1;
4a51c0d0 2182 td_ptr->tdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 2183 vptr->td_used[qnum]++;
2184 vptr->td_curr[qnum] = (index + 1) % vptr->options.numtx;
2185
2186 if (AVAIL_TD(vptr, qnum) < 1)
2187 netif_stop_queue(dev);
2188
2189 td_ptr = &(vptr->td_rings[qnum][prev]);
4a51c0d0 2190 td_ptr->td_buf[0].size |= TD_QUEUE;
1da177e4
LT		 2191 mac_tx_queue_wake(vptr->mac_regs, qnum);
2192 }
2193 dev->trans_start = jiffies;
2194 spin_unlock_irqrestore(&vptr->lock, flags);
2195 return 0;
2196}
2197
2198/**
2199 * velocity_intr - interrupt callback
2200 * @irq: interrupt number
2201 * @dev_instance: interrupting device
1da177e4
LT		 2202 *
2203 * Called whenever an interrupt is generated by the velocity
2204 * adapter IRQ line. We may not be the source of the interrupt
2205 * and need to identify initially if we are, and if not exit as
2206 * efficiently as possible.
2207 */
6aa20a22 2208
7d12e780 2209static int velocity_intr(int irq, void *dev_instance)
1da177e4
LT		 2210{
2211 struct net_device *dev = dev_instance;
8ab6f3f7 2212 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2213 u32 isr_status;
2214 int max_count = 0;
2215
2216
2217 spin_lock(&vptr->lock);
2218 isr_status = mac_read_isr(vptr->mac_regs);
2219
2220 /* Not us ? */
2221 if (isr_status == 0) {
2222 spin_unlock(&vptr->lock);
2223 return IRQ_NONE;
2224 }
2225
2226 mac_disable_int(vptr->mac_regs);
2227
2228 /*
2229 * Keep processing the ISR until we have completed
2230 * processing and the isr_status becomes zero
2231 */
6aa20a22 2232
1da177e4
LT		 2233 while (isr_status != 0) {
2234 mac_write_isr(vptr->mac_regs, isr_status);
2235 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2236 velocity_error(vptr, isr_status);
2237 if (isr_status & (ISR_PRXI | ISR_PPRXI))
2238 max_count += velocity_rx_srv(vptr, isr_status);
2239 if (isr_status & (ISR_PTXI | ISR_PPTXI))
2240 max_count += velocity_tx_srv(vptr, isr_status);
2241 isr_status = mac_read_isr(vptr->mac_regs);
2242 if (max_count > vptr->options.int_works)
2243 {
6aa20a22 2244 printk(KERN_WARNING "%s: excessive work at interrupt.\n",
1da177e4
LT		 2245 dev->name);
2246 max_count = 0;
2247 }
2248 }
2249 spin_unlock(&vptr->lock);
2250 mac_enable_int(vptr->mac_regs);
2251 return IRQ_HANDLED;
2252
2253}
2254
2255
2256/**
2257 * velocity_set_multi - filter list change callback
2258 * @dev: network device
2259 *
2260 * Called by the network layer when the filter lists need to change
2261 * for a velocity adapter. Reload the CAMs with the new address
2262 * filter ruleset.
2263 */
6aa20a22 2264
1da177e4
LT		 2265static void velocity_set_multi(struct net_device *dev)
2266{
8ab6f3f7 2267 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2268 struct mac_regs __iomem * regs = vptr->mac_regs;
2269 u8 rx_mode;
2270 int i;
2271 struct dev_mc_list *mclist;
2272
2273 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1da177e4
LT		 2274 writel(0xffffffff, &regs->MARCAM[0]);
2275 writel(0xffffffff, &regs->MARCAM[4]);
2276 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
2277 } else if ((dev->mc_count > vptr->multicast_limit)
2278 || (dev->flags & IFF_ALLMULTI)) {
2279 writel(0xffffffff, &regs->MARCAM[0]);
2280 writel(0xffffffff, &regs->MARCAM[4]);
2281 rx_mode = (RCR_AM | RCR_AB);
2282 } else {
2283 int offset = MCAM_SIZE - vptr->multicast_limit;
01faccbf 2284 mac_get_cam_mask(regs, vptr->mCAMmask);
1da177e4
LT		 2285
2286 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
01faccbf 2287 mac_set_cam(regs, i + offset, mclist->dmi_addr);
1da177e4
LT		 2288 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
2289 }
2290
01faccbf 2291 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4
LT		 2292 rx_mode = (RCR_AM | RCR_AB);
2293 }
2294 if (dev->mtu > 1500)
2295 rx_mode |= RCR_AL;
2296
2297 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
2298
2299}
2300
2301/**
2302 * velocity_get_status - statistics callback
2303 * @dev: network device
2304 *
2305 * Callback from the network layer to allow driver statistics
2306 * to be resynchronized with hardware collected state. In the
2307 * case of the velocity we need to pull the MIB counters from
2308 * the hardware into the counters before letting the network
2309 * layer display them.
2310 */
6aa20a22 2311
1da177e4
LT		 2312static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2313{
8ab6f3f7 2314 struct velocity_info *vptr = netdev_priv(dev);
6aa20a22 2315
1da177e4
LT		 2316 /* If the hardware is down, don't touch MII */
2317 if(!netif_running(dev))
2318 return &vptr->stats;
2319
2320 spin_lock_irq(&vptr->lock);
2321 velocity_update_hw_mibs(vptr);
2322 spin_unlock_irq(&vptr->lock);
2323
2324 vptr->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2325 vptr->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2326 vptr->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2327
2328// unsigned long rx_dropped; /* no space in linux buffers */
2329 vptr->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2330 /* detailed rx_errors: */
2331// unsigned long rx_length_errors;
2332// unsigned long rx_over_errors; /* receiver ring buff overflow */
2333 vptr->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2334// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2335// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2336// unsigned long rx_missed_errors; /* receiver missed packet */
2337
2338 /* detailed tx_errors */
2339// unsigned long tx_fifo_errors;
2340
2341 return &vptr->stats;
2342}
2343
2344
2345/**
2346 * velocity_ioctl - ioctl entry point
2347 * @dev: network device
2348 * @rq: interface request ioctl
2349 * @cmd: command code
2350 *
2351 * Called when the user issues an ioctl request to the network
2352 * device in question. The velocity interface supports MII.
2353 */
6aa20a22 2354
1da177e4
LT		 2355static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2356{
8ab6f3f7 2357 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2358 int ret;
2359
2360 /* If we are asked for information and the device is power
2361 saving then we need to bring the device back up to talk to it */
6aa20a22 2362
1da177e4
LT		 2363 if (!netif_running(dev))
2364 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 2365
1da177e4
LT		 2366 switch (cmd) {
2367 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2368 case SIOCGMIIREG: /* Read MII PHY register. */
2369 case SIOCSMIIREG: /* Write to MII PHY register. */
2370 ret = velocity_mii_ioctl(dev, rq, cmd);
2371 break;
2372
2373 default:
2374 ret = -EOPNOTSUPP;
2375 }
2376 if (!netif_running(dev))
2377 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22
JG		 2378
2379
1da177e4
LT		 2380 return ret;
2381}
2382
2383/*
2384 * Definition for our device driver. The PCI layer interface
2385 * uses this to handle all our card discover and plugging
2386 */
6aa20a22 2387
1da177e4
LT		 2388static struct pci_driver velocity_driver = {
2389 .name = VELOCITY_NAME,
2390 .id_table = velocity_id_table,
2391 .probe = velocity_found1,
2392 .remove = __devexit_p(velocity_remove1),
2393#ifdef CONFIG_PM
2394 .suspend = velocity_suspend,
2395 .resume = velocity_resume,
2396#endif
2397};
2398
2399/**
2400 * velocity_init_module - load time function
2401 *
2402 * Called when the velocity module is loaded. The PCI driver
2403 * is registered with the PCI layer, and in turn will call
2404 * the probe functions for each velocity adapter installed
2405 * in the system.
2406 */
6aa20a22 2407
1da177e4
LT		 2408static int __init velocity_init_module(void)
2409{
2410 int ret;
2411
2412 velocity_register_notifier();
29917620 2413 ret = pci_register_driver(&velocity_driver);
1da177e4
LT		 2414 if (ret < 0)
2415 velocity_unregister_notifier();
2416 return ret;
2417}
2418
2419/**
2420 * velocity_cleanup - module unload
2421 *
2422 * When the velocity hardware is unloaded this function is called.
6aa20a22 2423 * It will clean up the notifiers and the unregister the PCI
1da177e4
LT		 2424 * driver interface for this hardware. This in turn cleans up
2425 * all discovered interfaces before returning from the function
2426 */
6aa20a22 2427
1da177e4
LT		 2428static void __exit velocity_cleanup_module(void)
2429{
2430 velocity_unregister_notifier();
2431 pci_unregister_driver(&velocity_driver);
2432}
2433
2434module_init(velocity_init_module);
2435module_exit(velocity_cleanup_module);
2436
2437
2438/*
2439 * MII access , media link mode setting functions
2440 */
6aa20a22
JG		 2441
2442
1da177e4
LT		 2443/**
2444 * mii_init - set up MII
2445 * @vptr: velocity adapter
2446 * @mii_status: links tatus
2447 *
2448 * Set up the PHY for the current link state.
2449 */
6aa20a22 2450
1da177e4
LT		 2451static void mii_init(struct velocity_info *vptr, u32 mii_status)
2452{
2453 u16 BMCR;
2454
2455 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
2456 case PHYID_CICADA_CS8201:
2457 /*
2458 * Reset to hardware default
2459 */
2460 MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2461 /*
2462 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2463 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2464 * legacy-forced issue.
2465 */
2466 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2467 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2468 else
2469 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2470 /*
2471 * Turn on Link/Activity LED enable bit for CIS8201
2472 */
2473 MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
2474 break;
2475 case PHYID_VT3216_32BIT:
2476 case PHYID_VT3216_64BIT:
2477 /*
2478 * Reset to hardware default
2479 */
2480 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2481 /*
2482 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2483 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2484 * legacy-forced issue
2485 */
2486 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2487 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2488 else
2489 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2490 break;
2491
2492 case PHYID_MARVELL_1000:
2493 case PHYID_MARVELL_1000S:
2494 /*
6aa20a22 2495 * Assert CRS on Transmit
1da177e4
LT		 2496 */
2497 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
2498 /*
6aa20a22 2499 * Reset to hardware default
1da177e4
LT		 2500 */
2501 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2502 break;
2503 default:
2504 ;
2505 }
2506 velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
2507 if (BMCR & BMCR_ISO) {
2508 BMCR &= ~BMCR_ISO;
2509 velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
2510 }
2511}
2512
2513/**
2514 * safe_disable_mii_autopoll - autopoll off
2515 * @regs: velocity registers
2516 *
2517 * Turn off the autopoll and wait for it to disable on the chip
2518 */
6aa20a22 2519
1da177e4
LT		 2520static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs)
2521{
2522 u16 ww;
2523
2524 /* turn off MAUTO */
2525 writeb(0, &regs->MIICR);
2526 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2527 udelay(1);
2528 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2529 break;
2530 }
2531}
2532
2533/**
2534 * enable_mii_autopoll - turn on autopolling
2535 * @regs: velocity registers
2536 *
2537 * Enable the MII link status autopoll feature on the Velocity
2538 * hardware. Wait for it to enable.
2539 */
2540
2541static void enable_mii_autopoll(struct mac_regs __iomem * regs)
2542{
2543 int ii;
2544
2545 writeb(0, &(regs->MIICR));
2546 writeb(MIIADR_SWMPL, &regs->MIIADR);
2547
2548 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2549 udelay(1);
2550 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2551 break;
2552 }
2553
2554 writeb(MIICR_MAUTO, &regs->MIICR);
2555
2556 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2557 udelay(1);
2558 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2559 break;
2560 }
2561
2562}
2563
2564/**
2565 * velocity_mii_read - read MII data
2566 * @regs: velocity registers
2567 * @index: MII register index
2568 * @data: buffer for received data
2569 *
2570 * Perform a single read of an MII 16bit register. Returns zero
2571 * on success or -ETIMEDOUT if the PHY did not respond.
2572 */
6aa20a22 2573
1da177e4
LT		 2574static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
2575{
2576 u16 ww;
2577
2578 /*
2579 * Disable MIICR_MAUTO, so that mii addr can be set normally
2580 */
2581 safe_disable_mii_autopoll(regs);
2582
2583 writeb(index, &regs->MIIADR);
2584
2585 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
2586
2587 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2588 if (!(readb(&regs->MIICR) & MIICR_RCMD))
2589 break;
2590 }
2591
2592 *data = readw(&regs->MIIDATA);
2593
2594 enable_mii_autopoll(regs);
2595 if (ww == W_MAX_TIMEOUT)
2596 return -ETIMEDOUT;
2597 return 0;
2598}
2599
2600/**
2601 * velocity_mii_write - write MII data
2602 * @regs: velocity registers
2603 * @index: MII register index
2604 * @data: 16bit data for the MII register
2605 *
2606 * Perform a single write to an MII 16bit register. Returns zero
2607 * on success or -ETIMEDOUT if the PHY did not respond.
2608 */
6aa20a22 2609
1da177e4
LT		 2610static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
2611{
2612 u16 ww;
2613
2614 /*
2615 * Disable MIICR_MAUTO, so that mii addr can be set normally
2616 */
2617 safe_disable_mii_autopoll(regs);
2618
2619 /* MII reg offset */
2620 writeb(mii_addr, &regs->MIIADR);
2621 /* set MII data */
2622 writew(data, &regs->MIIDATA);
2623
2624 /* turn on MIICR_WCMD */
2625 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
2626
2627 /* W_MAX_TIMEOUT is the timeout period */
2628 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2629 udelay(5);
2630 if (!(readb(&regs->MIICR) & MIICR_WCMD))
2631 break;
2632 }
2633 enable_mii_autopoll(regs);
2634
2635 if (ww == W_MAX_TIMEOUT)
2636 return -ETIMEDOUT;
2637 return 0;
2638}
2639
2640/**
2641 * velocity_get_opt_media_mode - get media selection
2642 * @vptr: velocity adapter
2643 *
2644 * Get the media mode stored in EEPROM or module options and load
2645 * mii_status accordingly. The requested link state information
2646 * is also returned.
2647 */
6aa20a22 2648
1da177e4
LT		 2649static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
2650{
2651 u32 status = 0;
2652
2653 switch (vptr->options.spd_dpx) {
2654 case SPD_DPX_AUTO:
2655 status = VELOCITY_AUTONEG_ENABLE;
2656 break;
2657 case SPD_DPX_100_FULL:
2658 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
2659 break;
2660 case SPD_DPX_10_FULL:
2661 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
2662 break;
2663 case SPD_DPX_100_HALF:
2664 status = VELOCITY_SPEED_100;
2665 break;
2666 case SPD_DPX_10_HALF:
2667 status = VELOCITY_SPEED_10;
2668 break;
2669 }
2670 vptr->mii_status = status;
2671 return status;
2672}
2673
2674/**
2675 * mii_set_auto_on - autonegotiate on
2676 * @vptr: velocity
2677 *
2678 * Enable autonegotation on this interface
2679 */
6aa20a22 2680
1da177e4
LT		 2681static void mii_set_auto_on(struct velocity_info *vptr)
2682{
2683 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
2684 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
2685 else
2686 MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2687}
2688
2689
2690/*
2691static void mii_set_auto_off(struct velocity_info * vptr)
2692{
2693 MII_REG_BITS_OFF(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2694}
2695*/
2696
2697/**
2698 * set_mii_flow_control - flow control setup
2699 * @vptr: velocity interface
2700 *
2701 * Set up the flow control on this interface according to
2702 * the supplied user/eeprom options.
2703 */
6aa20a22 2704
1da177e4
LT		 2705static void set_mii_flow_control(struct velocity_info *vptr)
2706{
2707 /*Enable or Disable PAUSE in ANAR */
2708 switch (vptr->options.flow_cntl) {
2709 case FLOW_CNTL_TX:
2710 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2711 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2712 break;
2713
2714 case FLOW_CNTL_RX:
2715 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2716 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2717 break;
2718
2719 case FLOW_CNTL_TX_RX:
2720 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2721 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2722 break;
2723
2724 case FLOW_CNTL_DISABLE:
2725 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2726 MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2727 break;
2728 default:
2729 break;
2730 }
2731}
2732
2733/**
2734 * velocity_set_media_mode - set media mode
2735 * @mii_status: old MII link state
2736 *
2737 * Check the media link state and configure the flow control
2738 * PHY and also velocity hardware setup accordingly. In particular
2739 * we need to set up CD polling and frame bursting.
2740 */
6aa20a22 2741
1da177e4
LT		 2742static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
2743{
2744 u32 curr_status;
2745 struct mac_regs __iomem * regs = vptr->mac_regs;
2746
2747 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
2748 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
2749
2750 /* Set mii link status */
2751 set_mii_flow_control(vptr);
2752
2753 /*
2754 Check if new status is consisent with current status
2755 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE)
2756 || (mii_status==curr_status)) {
2757 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
2758 vptr->mii_status=check_connection_type(vptr->mac_regs);
2759 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
2760 return 0;
2761 }
2762 */
2763
2764 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) {
2765 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
2766 }
2767
2768 /*
2769 * If connection type is AUTO
2770 */
2771 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
2772 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
2773 /* clear force MAC mode bit */
2774 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
2775 /* set duplex mode of MAC according to duplex mode of MII */
2776 MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs);
2777 MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2778 MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs);
2779
2780 /* enable AUTO-NEGO mode */
2781 mii_set_auto_on(vptr);
2782 } else {
2783 u16 ANAR;
2784 u8 CHIPGCR;
2785
2786 /*
2787 * 1. if it's 3119, disable frame bursting in halfduplex mode
2788 * and enable it in fullduplex mode
2789 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
2790 * 3. only enable CD heart beat counter in 10HD mode
2791 */
2792
2793 /* set force MAC mode bit */
2794 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2795
2796 CHIPGCR = readb(&regs->CHIPGCR);
2797 CHIPGCR &= ~CHIPGCR_FCGMII;
2798
2799 if (mii_status & VELOCITY_DUPLEX_FULL) {
2800 CHIPGCR |= CHIPGCR_FCFDX;
2801 writeb(CHIPGCR, &regs->CHIPGCR);
2802 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
2803 if (vptr->rev_id < REV_ID_VT3216_A0)
2804 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
2805 } else {
2806 CHIPGCR &= ~CHIPGCR_FCFDX;
2807 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
2808 writeb(CHIPGCR, &regs->CHIPGCR);
2809 if (vptr->rev_id < REV_ID_VT3216_A0)
2810 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
2811 }
2812
2813 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2814
2815 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) {
2816 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
2817 } else {
2818 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
2819 }
2820 /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
2821 velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
2822 ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
2823 if (mii_status & VELOCITY_SPEED_100) {
2824 if (mii_status & VELOCITY_DUPLEX_FULL)
2825 ANAR |= ANAR_TXFD;
2826 else
2827 ANAR |= ANAR_TX;
2828 } else {
2829 if (mii_status & VELOCITY_DUPLEX_FULL)
2830 ANAR |= ANAR_10FD;
2831 else
2832 ANAR |= ANAR_10;
2833 }
2834 velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
2835 /* enable AUTO-NEGO mode */
2836 mii_set_auto_on(vptr);
2837 /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
2838 }
2839 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
2840 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
2841 return VELOCITY_LINK_CHANGE;
2842}
2843
2844/**
2845 * mii_check_media_mode - check media state
2846 * @regs: velocity registers
2847 *
2848 * Check the current MII status and determine the link status
2849 * accordingly
2850 */
6aa20a22 2851
1da177e4
LT		 2852static u32 mii_check_media_mode(struct mac_regs __iomem * regs)
2853{
2854 u32 status = 0;
2855 u16 ANAR;
2856
2857 if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
2858 status |= VELOCITY_LINK_FAIL;
2859
2860 if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
2861 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
2862 else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
2863 status |= (VELOCITY_SPEED_1000);
2864 else {
2865 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2866 if (ANAR & ANAR_TXFD)
2867 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
2868 else if (ANAR & ANAR_TX)
2869 status |= VELOCITY_SPEED_100;
2870 else if (ANAR & ANAR_10FD)
2871 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
2872 else
2873 status |= (VELOCITY_SPEED_10);
2874 }
2875
2876 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2877 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2878 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2879 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2880 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2881 status |= VELOCITY_AUTONEG_ENABLE;
2882 }
2883 }
2884
2885 return status;
2886}
2887
2888static u32 check_connection_type(struct mac_regs __iomem * regs)
2889{
2890 u32 status = 0;
2891 u8 PHYSR0;
2892 u16 ANAR;
2893 PHYSR0 = readb(&regs->PHYSR0);
2894
2895 /*
2896 if (!(PHYSR0 & PHYSR0_LINKGD))
2897 status|=VELOCITY_LINK_FAIL;
2898 */
2899
2900 if (PHYSR0 & PHYSR0_FDPX)
2901 status |= VELOCITY_DUPLEX_FULL;
2902
2903 if (PHYSR0 & PHYSR0_SPDG)
2904 status |= VELOCITY_SPEED_1000;
59b693fb 2905 else if (PHYSR0 & PHYSR0_SPD10)
1da177e4
LT		 2906 status |= VELOCITY_SPEED_10;
2907 else
2908 status |= VELOCITY_SPEED_100;
2909
2910 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2911 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2912 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2913 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2914 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2915 status |= VELOCITY_AUTONEG_ENABLE;
2916 }
2917 }
2918
2919 return status;
2920}
2921
2922/**
2923 * enable_flow_control_ability - flow control
2924 * @vptr: veloity to configure
2925 *
2926 * Set up flow control according to the flow control options
2927 * determined by the eeprom/configuration.
2928 */
2929
2930static void enable_flow_control_ability(struct velocity_info *vptr)
2931{
2932
2933 struct mac_regs __iomem * regs = vptr->mac_regs;
2934
2935 switch (vptr->options.flow_cntl) {
2936
2937 case FLOW_CNTL_DEFAULT:
2938 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
2939 writel(CR0_FDXRFCEN, &regs->CR0Set);
2940 else
2941 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2942
2943 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
2944 writel(CR0_FDXTFCEN, &regs->CR0Set);
2945 else
2946 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2947 break;
2948
2949 case FLOW_CNTL_TX:
2950 writel(CR0_FDXTFCEN, &regs->CR0Set);
2951 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2952 break;
2953
2954 case FLOW_CNTL_RX:
2955 writel(CR0_FDXRFCEN, &regs->CR0Set);
2956 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2957 break;
2958
2959 case FLOW_CNTL_TX_RX:
2960 writel(CR0_FDXTFCEN, &regs->CR0Set);
2961 writel(CR0_FDXRFCEN, &regs->CR0Set);
2962 break;
2963
2964 case FLOW_CNTL_DISABLE:
2965 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2966 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2967 break;
2968
2969 default:
2970 break;
2971 }
2972
2973}
2974
2975
2976/**
2977 * velocity_ethtool_up - pre hook for ethtool
2978 * @dev: network device
2979 *
2980 * Called before an ethtool operation. We need to make sure the
2981 * chip is out of D3 state before we poke at it.
2982 */
6aa20a22 2983
1da177e4
LT		 2984static int velocity_ethtool_up(struct net_device *dev)
2985{
8ab6f3f7 2986 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2987 if (!netif_running(dev))
2988 pci_set_power_state(vptr->pdev, PCI_D0);
2989 return 0;
6aa20a22 2990}
1da177e4
LT		 2991
2992/**
2993 * velocity_ethtool_down - post hook for ethtool
2994 * @dev: network device
2995 *
2996 * Called after an ethtool operation. Restore the chip back to D3
2997 * state if it isn't running.
2998 */
6aa20a22 2999
1da177e4
LT		 3000static void velocity_ethtool_down(struct net_device *dev)
3001{
8ab6f3f7 3002 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3003 if (!netif_running(dev))
3004 pci_set_power_state(vptr->pdev, PCI_D3hot);
3005}
3006
3007static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3008{
8ab6f3f7 3009 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3010 struct mac_regs __iomem * regs = vptr->mac_regs;
3011 u32 status;
3012 status = check_connection_type(vptr->mac_regs);
3013
59b693fb
JC		 3014 cmd->supported = SUPPORTED_TP |
3015 SUPPORTED_Autoneg |
3016 SUPPORTED_10baseT_Half |
3017 SUPPORTED_10baseT_Full |
3018 SUPPORTED_100baseT_Half |
3019 SUPPORTED_100baseT_Full |
3020 SUPPORTED_1000baseT_Half |
3021 SUPPORTED_1000baseT_Full;
3022 if (status & VELOCITY_SPEED_1000)
3023 cmd->speed = SPEED_1000;
3024 else if (status & VELOCITY_SPEED_100)
1da177e4
LT		 3025 cmd->speed = SPEED_100;
3026 else
3027 cmd->speed = SPEED_10;
3028 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
3029 cmd->port = PORT_TP;
3030 cmd->transceiver = XCVR_INTERNAL;
3031 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
3032
3033 if (status & VELOCITY_DUPLEX_FULL)
3034 cmd->duplex = DUPLEX_FULL;
3035 else
3036 cmd->duplex = DUPLEX_HALF;
6aa20a22 3037
1da177e4
LT		 3038 return 0;
3039}
3040
3041static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3042{
8ab6f3f7 3043 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3044 u32 curr_status;
3045 u32 new_status = 0;
3046 int ret = 0;
6aa20a22 3047
1da177e4
LT		 3048 curr_status = check_connection_type(vptr->mac_regs);
3049 curr_status &= (~VELOCITY_LINK_FAIL);
3050
3051 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3052 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3053 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3054 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3055
3056 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
3057 ret = -EINVAL;
3058 else
3059 velocity_set_media_mode(vptr, new_status);
3060
3061 return ret;
3062}
3063
3064static u32 velocity_get_link(struct net_device *dev)
3065{
8ab6f3f7 3066 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 3067 struct mac_regs __iomem * regs = vptr->mac_regs;
59b693fb 3068 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT		 3069}
3070
3071static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3072{
8ab6f3f7 3073 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3074 strcpy(info->driver, VELOCITY_NAME);
3075 strcpy(info->version, VELOCITY_VERSION);
3076 strcpy(info->bus_info, pci_name(vptr->pdev));
3077}
3078
3079static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3080{
8ab6f3f7 3081 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3082 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3083 wol->wolopts |= WAKE_MAGIC;
3084 /*
3085 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3086 wol.wolopts|=WAKE_PHY;
3087 */
3088 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3089 wol->wolopts |= WAKE_UCAST;
3090 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3091 wol->wolopts |= WAKE_ARP;
3092 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3093}
3094
3095static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3096{
8ab6f3f7 3097 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3098
3099 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3100 return -EFAULT;
3101 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3102
3103 /*
3104 if (wol.wolopts & WAKE_PHY) {
3105 vptr->wol_opts|=VELOCITY_WOL_PHY;
3106 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3107 }
3108 */
3109
3110 if (wol->wolopts & WAKE_MAGIC) {
3111 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3112 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3113 }
3114 if (wol->wolopts & WAKE_UCAST) {
3115 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3116 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3117 }
3118 if (wol->wolopts & WAKE_ARP) {
3119 vptr->wol_opts |= VELOCITY_WOL_ARP;
3120 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3121 }
3122 memcpy(vptr->wol_passwd, wol->sopass, 6);
3123 return 0;
3124}
3125
3126static u32 velocity_get_msglevel(struct net_device *dev)
3127{
3128 return msglevel;
3129}
3130
3131static void velocity_set_msglevel(struct net_device *dev, u32 value)
3132{
3133 msglevel = value;
3134}
3135
7282d491 3136static const struct ethtool_ops velocity_ethtool_ops = {
1da177e4
LT		 3137 .get_settings = velocity_get_settings,
3138 .set_settings = velocity_set_settings,
3139 .get_drvinfo = velocity_get_drvinfo,
3140 .get_wol = velocity_ethtool_get_wol,
3141 .set_wol = velocity_ethtool_set_wol,
3142 .get_msglevel = velocity_get_msglevel,
3143 .set_msglevel = velocity_set_msglevel,
3144 .get_link = velocity_get_link,
3145 .begin = velocity_ethtool_up,
3146 .complete = velocity_ethtool_down
3147};
3148
3149/**
3150 * velocity_mii_ioctl - MII ioctl handler
3151 * @dev: network device
3152 * @ifr: the ifreq block for the ioctl
3153 * @cmd: the command
3154 *
3155 * Process MII requests made via ioctl from the network layer. These
3156 * are used by tools like kudzu to interrogate the link state of the
3157 * hardware
3158 */
6aa20a22 3159
1da177e4
LT		 3160static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
3161{
8ab6f3f7 3162 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3163 struct mac_regs __iomem * regs = vptr->mac_regs;
3164 unsigned long flags;
3165 struct mii_ioctl_data *miidata = if_mii(ifr);
3166 int err;
6aa20a22 3167
1da177e4
LT		 3168 switch (cmd) {
3169 case SIOCGMIIPHY:
3170 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
3171 break;
3172 case SIOCGMIIREG:
3173 if (!capable(CAP_NET_ADMIN))
3174 return -EPERM;
3175 if(velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
3176 return -ETIMEDOUT;
3177 break;
3178 case SIOCSMIIREG:
3179 if (!capable(CAP_NET_ADMIN))
3180 return -EPERM;
3181 spin_lock_irqsave(&vptr->lock, flags);
3182 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
3183 spin_unlock_irqrestore(&vptr->lock, flags);
3184 check_connection_type(vptr->mac_regs);
3185 if(err)
3186 return err;
3187 break;
3188 default:
3189 return -EOPNOTSUPP;
3190 }
3191 return 0;
3192}
3193
3194#ifdef CONFIG_PM
3195
3196/**
3197 * velocity_save_context - save registers
6aa20a22 3198 * @vptr: velocity
1da177e4
LT		 3199 * @context: buffer for stored context
3200 *
3201 * Retrieve the current configuration from the velocity hardware
3202 * and stash it in the context structure, for use by the context
3203 * restore functions. This allows us to save things we need across
3204 * power down states
3205 */
6aa20a22 3206
1da177e4
LT		 3207static void velocity_save_context(struct velocity_info *vptr, struct velocity_context * context)
3208{
3209 struct mac_regs __iomem * regs = vptr->mac_regs;
3210 u16 i;
3211 u8 __iomem *ptr = (u8 __iomem *)regs;
3212
3213 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
3214 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3215
3216 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3217 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3218
3219 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3220 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3221
3222}
3223
3224/**
3225 * velocity_restore_context - restore registers
6aa20a22 3226 * @vptr: velocity
1da177e4
LT		 3227 * @context: buffer for stored context
3228 *
6aa20a22 3229 * Reload the register configuration from the velocity context
1da177e4
LT		 3230 * created by velocity_save_context.
3231 */
6aa20a22 3232
1da177e4
LT		 3233static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3234{
3235 struct mac_regs __iomem * regs = vptr->mac_regs;
3236 int i;
3237 u8 __iomem *ptr = (u8 __iomem *)regs;
3238
3239 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) {
3240 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3241 }
3242
3243 /* Just skip cr0 */
3244 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3245 /* Clear */
3246 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3247 /* Set */
3248 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3249 }
3250
3251 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) {
3252 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3253 }
3254
3255 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) {
3256 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3257 }
3258
3259 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) {
3260 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3261 }
3262
3263}
3264
3265/**
3266 * wol_calc_crc - WOL CRC
3267 * @pattern: data pattern
3268 * @mask_pattern: mask
3269 *
3270 * Compute the wake on lan crc hashes for the packet header
3271 * we are interested in.
3272 */
3273
3274static u16 wol_calc_crc(int size, u8 * pattern, u8 *mask_pattern)
3275{
3276 u16 crc = 0xFFFF;
3277 u8 mask;
3278 int i, j;
3279
3280 for (i = 0; i < size; i++) {
3281 mask = mask_pattern[i];
3282
3283 /* Skip this loop if the mask equals to zero */
3284 if (mask == 0x00)
3285 continue;
3286
3287 for (j = 0; j < 8; j++) {
3288 if ((mask & 0x01) == 0) {
3289 mask >>= 1;
3290 continue;
3291 }
3292 mask >>= 1;
3293 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
3294 }
3295 }
3296 /* Finally, invert the result once to get the correct data */
3297 crc = ~crc;
906d66df 3298 return bitrev32(crc) >> 16;
1da177e4
LT		 3299}
3300
3301/**
3302 * velocity_set_wol - set up for wake on lan
3303 * @vptr: velocity to set WOL status on
3304 *
3305 * Set a card up for wake on lan either by unicast or by
3306 * ARP packet.
3307 *
3308 * FIXME: check static buffer is safe here
3309 */
3310
3311static int velocity_set_wol(struct velocity_info *vptr)
3312{
3313 struct mac_regs __iomem * regs = vptr->mac_regs;
3314 static u8 buf[256];
3315 int i;
3316
3317 static u32 mask_pattern[2][4] = {
3318 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
3319 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
3320 };
3321
3322 writew(0xFFFF, &regs->WOLCRClr);
3323 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
3324 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
3325
3326 /*
3327 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3328 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
3329 */
3330
3331 if (vptr->wol_opts & VELOCITY_WOL_UCAST) {
3332 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
3333 }
3334
3335 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
3336 struct arp_packet *arp = (struct arp_packet *) buf;
3337 u16 crc;
3338 memset(buf, 0, sizeof(struct arp_packet) + 7);
3339
3340 for (i = 0; i < 4; i++)
3341 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
3342
3343 arp->type = htons(ETH_P_ARP);
3344 arp->ar_op = htons(1);
3345
3346 memcpy(arp->ar_tip, vptr->ip_addr, 4);
3347
3348 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
3349 (u8 *) & mask_pattern[0][0]);
3350
3351 writew(crc, &regs->PatternCRC[0]);
3352 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
3353 }
3354
3355 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
3356 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
3357
3358 writew(0x0FFF, &regs->WOLSRClr);
3359
3360 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
3361 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3362 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
3363
3364 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
3365 }
3366
3367 if (vptr->mii_status & VELOCITY_SPEED_1000)
3368 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
3369
3370 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
3371
3372 {
3373 u8 GCR;
3374 GCR = readb(&regs->CHIPGCR);
3375 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
3376 writeb(GCR, &regs->CHIPGCR);
3377 }
3378
3379 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
3380 /* Turn on SWPTAG just before entering power mode */
3381 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
3382 /* Go to bed ..... */
3383 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
3384
3385 return 0;
3386}
3387
3388static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3389{
3390 struct net_device *dev = pci_get_drvdata(pdev);
3391 struct velocity_info *vptr = netdev_priv(dev);
3392 unsigned long flags;
3393
3394 if(!netif_running(vptr->dev))
3395 return 0;
3396
3397 netif_device_detach(vptr->dev);
3398
3399 spin_lock_irqsave(&vptr->lock, flags);
3400 pci_save_state(pdev);
3401#ifdef ETHTOOL_GWOL
3402 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3403 velocity_get_ip(vptr);
3404 velocity_save_context(vptr, &vptr->context);
3405 velocity_shutdown(vptr);
3406 velocity_set_wol(vptr);
4a51c0d0 3407 pci_enable_wake(pdev, PCI_D3hot, 1);
1da177e4
LT		 3408 pci_set_power_state(pdev, PCI_D3hot);
3409 } else {
3410 velocity_save_context(vptr, &vptr->context);
3411 velocity_shutdown(vptr);
3412 pci_disable_device(pdev);
3413 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3414 }
3415#else
3416 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3417#endif
3418 spin_unlock_irqrestore(&vptr->lock, flags);
3419 return 0;
3420}
3421
3422static int velocity_resume(struct pci_dev *pdev)
3423{
3424 struct net_device *dev = pci_get_drvdata(pdev);
3425 struct velocity_info *vptr = netdev_priv(dev);
3426 unsigned long flags;
3427 int i;
3428
3429 if(!netif_running(vptr->dev))
3430 return 0;
3431
3432 pci_set_power_state(pdev, PCI_D0);
3433 pci_enable_wake(pdev, 0, 0);
3434 pci_restore_state(pdev);
3435
3436 mac_wol_reset(vptr->mac_regs);
3437
3438 spin_lock_irqsave(&vptr->lock, flags);
3439 velocity_restore_context(vptr, &vptr->context);
3440 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3441 mac_disable_int(vptr->mac_regs);
3442
3443 velocity_tx_srv(vptr, 0);
3444
3445 for (i = 0; i < vptr->num_txq; i++) {
3446 if (vptr->td_used[i]) {
3447 mac_tx_queue_wake(vptr->mac_regs, i);
3448 }
3449 }
3450
3451 mac_enable_int(vptr->mac_regs);
3452 spin_unlock_irqrestore(&vptr->lock, flags);
3453 netif_device_attach(vptr->dev);
3454
3455 return 0;
3456}
3457
ce9f7fe3
RD		 3458#ifdef CONFIG_INET
3459
1da177e4
LT		 3460static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3461{
3462 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
a337499f
DL		 3463 struct net_device *dev = ifa->ifa_dev->dev;
3464 struct velocity_info *vptr;
3465 unsigned long flags;
1da177e4 3466
c346dca1 3467 if (dev_net(dev) != &init_net)
6133fb1a
DL		 3468 return NOTIFY_DONE;
3469
a337499f
DL		 3470 spin_lock_irqsave(&velocity_dev_list_lock, flags);
3471 list_for_each_entry(vptr, &velocity_dev_list, list) {
3472 if (vptr->dev == dev) {
3473 velocity_get_ip(vptr);
3474 break;
1da177e4 3475 }
1da177e4 3476 }
a337499f
DL		 3477 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
3478
1da177e4
LT		 3479 return NOTIFY_DONE;
3480}
ce9f7fe3
RD		 3481
3482#endif
1da177e4 3483#endif
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