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1 | /*************************************************************************** |
2 | * | |
3 | * Copyright (C) 2007-2010 SMSC | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
18 | * | |
19 | *****************************************************************************/ | |
20 | ||
21 | #include <linux/module.h> | |
22 | #include <linux/kmod.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/netdevice.h> | |
25 | #include <linux/etherdevice.h> | |
26 | #include <linux/ethtool.h> | |
27 | #include <linux/mii.h> | |
28 | #include <linux/usb.h> | |
29 | #include <linux/crc32.h> | |
30 | #include <linux/usb/usbnet.h> | |
31 | #include "smsc75xx.h" | |
32 | ||
33 | #define SMSC_CHIPNAME "smsc75xx" | |
34 | #define SMSC_DRIVER_VERSION "1.0.0" | |
35 | #define HS_USB_PKT_SIZE (512) | |
36 | #define FS_USB_PKT_SIZE (64) | |
37 | #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) | |
38 | #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) | |
39 | #define DEFAULT_BULK_IN_DELAY (0x00002000) | |
40 | #define MAX_SINGLE_PACKET_SIZE (9000) | |
41 | #define LAN75XX_EEPROM_MAGIC (0x7500) | |
42 | #define EEPROM_MAC_OFFSET (0x01) | |
43 | #define DEFAULT_TX_CSUM_ENABLE (true) | |
44 | #define DEFAULT_RX_CSUM_ENABLE (true) | |
45 | #define DEFAULT_TSO_ENABLE (true) | |
46 | #define SMSC75XX_INTERNAL_PHY_ID (1) | |
47 | #define SMSC75XX_TX_OVERHEAD (8) | |
48 | #define MAX_RX_FIFO_SIZE (20 * 1024) | |
49 | #define MAX_TX_FIFO_SIZE (12 * 1024) | |
50 | #define USB_VENDOR_ID_SMSC (0x0424) | |
51 | #define USB_PRODUCT_ID_LAN7500 (0x7500) | |
52 | #define USB_PRODUCT_ID_LAN7505 (0x7505) | |
53 | ||
54 | #define check_warn(ret, fmt, args...) \ | |
55 | ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); }) | |
56 | ||
57 | #define check_warn_return(ret, fmt, args...) \ | |
58 | ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } }) | |
59 | ||
60 | #define check_warn_goto_done(ret, fmt, args...) \ | |
61 | ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } }) | |
62 | ||
63 | struct smsc75xx_priv { | |
64 | struct usbnet *dev; | |
65 | u32 rfe_ctl; | |
66 | u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN]; | |
67 | bool use_rx_csum; | |
68 | struct mutex dataport_mutex; | |
69 | spinlock_t rfe_ctl_lock; | |
70 | struct work_struct set_multicast; | |
71 | }; | |
72 | ||
73 | struct usb_context { | |
74 | struct usb_ctrlrequest req; | |
75 | struct usbnet *dev; | |
76 | }; | |
77 | ||
78 | static int turbo_mode = true; | |
79 | module_param(turbo_mode, bool, 0644); | |
80 | MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); | |
81 | ||
82 | static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index, | |
83 | u32 *data) | |
84 | { | |
85 | u32 *buf = kmalloc(4, GFP_KERNEL); | |
86 | int ret; | |
87 | ||
88 | BUG_ON(!dev); | |
89 | ||
90 | if (!buf) | |
91 | return -ENOMEM; | |
92 | ||
93 | ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), | |
94 | USB_VENDOR_REQUEST_READ_REGISTER, | |
95 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
96 | 00, index, buf, 4, USB_CTRL_GET_TIMEOUT); | |
97 | ||
98 | if (unlikely(ret < 0)) | |
99 | netdev_warn(dev->net, | |
100 | "Failed to read register index 0x%08x", index); | |
101 | ||
102 | le32_to_cpus(buf); | |
103 | *data = *buf; | |
104 | kfree(buf); | |
105 | ||
106 | return ret; | |
107 | } | |
108 | ||
109 | static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index, | |
110 | u32 data) | |
111 | { | |
112 | u32 *buf = kmalloc(4, GFP_KERNEL); | |
113 | int ret; | |
114 | ||
115 | BUG_ON(!dev); | |
116 | ||
117 | if (!buf) | |
118 | return -ENOMEM; | |
119 | ||
120 | *buf = data; | |
121 | cpu_to_le32s(buf); | |
122 | ||
123 | ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), | |
124 | USB_VENDOR_REQUEST_WRITE_REGISTER, | |
125 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
126 | 00, index, buf, 4, USB_CTRL_SET_TIMEOUT); | |
127 | ||
128 | if (unlikely(ret < 0)) | |
129 | netdev_warn(dev->net, | |
130 | "Failed to write register index 0x%08x", index); | |
131 | ||
132 | kfree(buf); | |
133 | ||
134 | return ret; | |
135 | } | |
136 | ||
137 | /* Loop until the read is completed with timeout | |
138 | * called with phy_mutex held */ | |
139 | static int smsc75xx_phy_wait_not_busy(struct usbnet *dev) | |
140 | { | |
141 | unsigned long start_time = jiffies; | |
142 | u32 val; | |
143 | int ret; | |
144 | ||
145 | do { | |
146 | ret = smsc75xx_read_reg(dev, MII_ACCESS, &val); | |
147 | check_warn_return(ret, "Error reading MII_ACCESS"); | |
148 | ||
149 | if (!(val & MII_ACCESS_BUSY)) | |
150 | return 0; | |
151 | } while (!time_after(jiffies, start_time + HZ)); | |
152 | ||
153 | return -EIO; | |
154 | } | |
155 | ||
156 | static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx) | |
157 | { | |
158 | struct usbnet *dev = netdev_priv(netdev); | |
159 | u32 val, addr; | |
160 | int ret; | |
161 | ||
162 | mutex_lock(&dev->phy_mutex); | |
163 | ||
164 | /* confirm MII not busy */ | |
165 | ret = smsc75xx_phy_wait_not_busy(dev); | |
166 | check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_read"); | |
167 | ||
168 | /* set the address, index & direction (read from PHY) */ | |
169 | phy_id &= dev->mii.phy_id_mask; | |
170 | idx &= dev->mii.reg_num_mask; | |
171 | addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) | |
172 | | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) | |
173 | | MII_ACCESS_READ; | |
174 | ret = smsc75xx_write_reg(dev, MII_ACCESS, addr); | |
175 | check_warn_goto_done(ret, "Error writing MII_ACCESS"); | |
176 | ||
177 | ret = smsc75xx_phy_wait_not_busy(dev); | |
178 | check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx); | |
179 | ||
180 | ret = smsc75xx_read_reg(dev, MII_DATA, &val); | |
181 | check_warn_goto_done(ret, "Error reading MII_DATA"); | |
182 | ||
183 | ret = (u16)(val & 0xFFFF); | |
184 | ||
185 | done: | |
186 | mutex_unlock(&dev->phy_mutex); | |
187 | return ret; | |
188 | } | |
189 | ||
190 | static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx, | |
191 | int regval) | |
192 | { | |
193 | struct usbnet *dev = netdev_priv(netdev); | |
194 | u32 val, addr; | |
195 | int ret; | |
196 | ||
197 | mutex_lock(&dev->phy_mutex); | |
198 | ||
199 | /* confirm MII not busy */ | |
200 | ret = smsc75xx_phy_wait_not_busy(dev); | |
201 | check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_write"); | |
202 | ||
203 | val = regval; | |
204 | ret = smsc75xx_write_reg(dev, MII_DATA, val); | |
205 | check_warn_goto_done(ret, "Error writing MII_DATA"); | |
206 | ||
207 | /* set the address, index & direction (write to PHY) */ | |
208 | phy_id &= dev->mii.phy_id_mask; | |
209 | idx &= dev->mii.reg_num_mask; | |
210 | addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) | |
211 | | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) | |
212 | | MII_ACCESS_WRITE; | |
213 | ret = smsc75xx_write_reg(dev, MII_ACCESS, addr); | |
214 | check_warn_goto_done(ret, "Error writing MII_ACCESS"); | |
215 | ||
216 | ret = smsc75xx_phy_wait_not_busy(dev); | |
217 | check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx); | |
218 | ||
219 | done: | |
220 | mutex_unlock(&dev->phy_mutex); | |
221 | } | |
222 | ||
223 | static int smsc75xx_wait_eeprom(struct usbnet *dev) | |
224 | { | |
225 | unsigned long start_time = jiffies; | |
226 | u32 val; | |
227 | int ret; | |
228 | ||
229 | do { | |
230 | ret = smsc75xx_read_reg(dev, E2P_CMD, &val); | |
231 | check_warn_return(ret, "Error reading E2P_CMD"); | |
232 | ||
233 | if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT)) | |
234 | break; | |
235 | udelay(40); | |
236 | } while (!time_after(jiffies, start_time + HZ)); | |
237 | ||
238 | if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) { | |
239 | netdev_warn(dev->net, "EEPROM read operation timeout"); | |
240 | return -EIO; | |
241 | } | |
242 | ||
243 | return 0; | |
244 | } | |
245 | ||
246 | static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev) | |
247 | { | |
248 | unsigned long start_time = jiffies; | |
249 | u32 val; | |
250 | int ret; | |
251 | ||
252 | do { | |
253 | ret = smsc75xx_read_reg(dev, E2P_CMD, &val); | |
254 | check_warn_return(ret, "Error reading E2P_CMD"); | |
255 | ||
256 | if (!(val & E2P_CMD_BUSY)) | |
257 | return 0; | |
258 | ||
259 | udelay(40); | |
260 | } while (!time_after(jiffies, start_time + HZ)); | |
261 | ||
262 | netdev_warn(dev->net, "EEPROM is busy"); | |
263 | return -EIO; | |
264 | } | |
265 | ||
266 | static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
267 | u8 *data) | |
268 | { | |
269 | u32 val; | |
270 | int i, ret; | |
271 | ||
272 | BUG_ON(!dev); | |
273 | BUG_ON(!data); | |
274 | ||
275 | ret = smsc75xx_eeprom_confirm_not_busy(dev); | |
276 | if (ret) | |
277 | return ret; | |
278 | ||
279 | for (i = 0; i < length; i++) { | |
280 | val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR); | |
281 | ret = smsc75xx_write_reg(dev, E2P_CMD, val); | |
282 | check_warn_return(ret, "Error writing E2P_CMD"); | |
283 | ||
284 | ret = smsc75xx_wait_eeprom(dev); | |
285 | if (ret < 0) | |
286 | return ret; | |
287 | ||
288 | ret = smsc75xx_read_reg(dev, E2P_DATA, &val); | |
289 | check_warn_return(ret, "Error reading E2P_DATA"); | |
290 | ||
291 | data[i] = val & 0xFF; | |
292 | offset++; | |
293 | } | |
294 | ||
295 | return 0; | |
296 | } | |
297 | ||
298 | static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
299 | u8 *data) | |
300 | { | |
301 | u32 val; | |
302 | int i, ret; | |
303 | ||
304 | BUG_ON(!dev); | |
305 | BUG_ON(!data); | |
306 | ||
307 | ret = smsc75xx_eeprom_confirm_not_busy(dev); | |
308 | if (ret) | |
309 | return ret; | |
310 | ||
311 | /* Issue write/erase enable command */ | |
312 | val = E2P_CMD_BUSY | E2P_CMD_EWEN; | |
313 | ret = smsc75xx_write_reg(dev, E2P_CMD, val); | |
314 | check_warn_return(ret, "Error writing E2P_CMD"); | |
315 | ||
316 | ret = smsc75xx_wait_eeprom(dev); | |
317 | if (ret < 0) | |
318 | return ret; | |
319 | ||
320 | for (i = 0; i < length; i++) { | |
321 | ||
322 | /* Fill data register */ | |
323 | val = data[i]; | |
324 | ret = smsc75xx_write_reg(dev, E2P_DATA, val); | |
325 | check_warn_return(ret, "Error writing E2P_DATA"); | |
326 | ||
327 | /* Send "write" command */ | |
328 | val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR); | |
329 | ret = smsc75xx_write_reg(dev, E2P_CMD, val); | |
330 | check_warn_return(ret, "Error writing E2P_CMD"); | |
331 | ||
332 | ret = smsc75xx_wait_eeprom(dev); | |
333 | if (ret < 0) | |
334 | return ret; | |
335 | ||
336 | offset++; | |
337 | } | |
338 | ||
339 | return 0; | |
340 | } | |
341 | ||
342 | static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev) | |
343 | { | |
344 | int i, ret; | |
345 | ||
346 | for (i = 0; i < 100; i++) { | |
347 | u32 dp_sel; | |
348 | ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); | |
349 | check_warn_return(ret, "Error reading DP_SEL"); | |
350 | ||
351 | if (dp_sel & DP_SEL_DPRDY) | |
352 | return 0; | |
353 | ||
354 | udelay(40); | |
355 | } | |
356 | ||
357 | netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out"); | |
358 | ||
359 | return -EIO; | |
360 | } | |
361 | ||
362 | static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr, | |
363 | u32 length, u32 *buf) | |
364 | { | |
365 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
366 | u32 dp_sel; | |
367 | int i, ret; | |
368 | ||
369 | mutex_lock(&pdata->dataport_mutex); | |
370 | ||
371 | ret = smsc75xx_dataport_wait_not_busy(dev); | |
372 | check_warn_goto_done(ret, "smsc75xx_dataport_write busy on entry"); | |
373 | ||
374 | ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); | |
375 | check_warn_goto_done(ret, "Error reading DP_SEL"); | |
376 | ||
377 | dp_sel &= ~DP_SEL_RSEL; | |
378 | dp_sel |= ram_select; | |
379 | ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel); | |
380 | check_warn_goto_done(ret, "Error writing DP_SEL"); | |
381 | ||
382 | for (i = 0; i < length; i++) { | |
383 | ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i); | |
384 | check_warn_goto_done(ret, "Error writing DP_ADDR"); | |
385 | ||
386 | ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]); | |
387 | check_warn_goto_done(ret, "Error writing DP_DATA"); | |
388 | ||
389 | ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE); | |
390 | check_warn_goto_done(ret, "Error writing DP_CMD"); | |
391 | ||
392 | ret = smsc75xx_dataport_wait_not_busy(dev); | |
393 | check_warn_goto_done(ret, "smsc75xx_dataport_write timeout"); | |
394 | } | |
395 | ||
396 | done: | |
397 | mutex_unlock(&pdata->dataport_mutex); | |
398 | return ret; | |
399 | } | |
400 | ||
401 | /* returns hash bit number for given MAC address */ | |
402 | static u32 smsc75xx_hash(char addr[ETH_ALEN]) | |
403 | { | |
404 | return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff; | |
405 | } | |
406 | ||
407 | static void smsc75xx_deferred_multicast_write(struct work_struct *param) | |
408 | { | |
409 | struct smsc75xx_priv *pdata = | |
410 | container_of(param, struct smsc75xx_priv, set_multicast); | |
411 | struct usbnet *dev = pdata->dev; | |
412 | int ret; | |
413 | ||
414 | netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x", | |
415 | pdata->rfe_ctl); | |
416 | ||
417 | smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN, | |
418 | DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table); | |
419 | ||
420 | ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); | |
421 | check_warn(ret, "Error writing RFE_CRL"); | |
422 | } | |
423 | ||
424 | static void smsc75xx_set_multicast(struct net_device *netdev) | |
425 | { | |
426 | struct usbnet *dev = netdev_priv(netdev); | |
427 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
428 | unsigned long flags; | |
429 | int i; | |
430 | ||
431 | spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); | |
432 | ||
433 | pdata->rfe_ctl &= | |
434 | ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF); | |
435 | pdata->rfe_ctl |= RFE_CTL_AB; | |
436 | ||
437 | for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++) | |
438 | pdata->multicast_hash_table[i] = 0; | |
439 | ||
440 | if (dev->net->flags & IFF_PROMISC) { | |
441 | netif_dbg(dev, drv, dev->net, "promiscuous mode enabled"); | |
442 | pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU; | |
443 | } else if (dev->net->flags & IFF_ALLMULTI) { | |
444 | netif_dbg(dev, drv, dev->net, "receive all multicast enabled"); | |
445 | pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF; | |
446 | } else if (!netdev_mc_empty(dev->net)) { | |
22bedad3 | 447 | struct netdev_hw_addr *ha; |
d0cad871 SG |
448 | |
449 | netif_dbg(dev, drv, dev->net, "receive multicast hash filter"); | |
450 | ||
451 | pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF; | |
452 | ||
22bedad3 JP |
453 | netdev_for_each_mc_addr(ha, netdev) { |
454 | u32 bitnum = smsc75xx_hash(ha->addr); | |
d0cad871 SG |
455 | pdata->multicast_hash_table[bitnum / 32] |= |
456 | (1 << (bitnum % 32)); | |
457 | } | |
458 | } else { | |
459 | netif_dbg(dev, drv, dev->net, "receive own packets only"); | |
460 | pdata->rfe_ctl |= RFE_CTL_DPF; | |
461 | } | |
462 | ||
463 | spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); | |
464 | ||
465 | /* defer register writes to a sleepable context */ | |
466 | schedule_work(&pdata->set_multicast); | |
467 | } | |
468 | ||
469 | static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex, | |
470 | u16 lcladv, u16 rmtadv) | |
471 | { | |
472 | u32 flow = 0, fct_flow = 0; | |
473 | int ret; | |
474 | ||
475 | if (duplex == DUPLEX_FULL) { | |
476 | u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); | |
477 | ||
478 | if (cap & FLOW_CTRL_TX) { | |
479 | flow = (FLOW_TX_FCEN | 0xFFFF); | |
480 | /* set fct_flow thresholds to 20% and 80% */ | |
481 | fct_flow = (8 << 8) | 32; | |
482 | } | |
483 | ||
484 | if (cap & FLOW_CTRL_RX) | |
485 | flow |= FLOW_RX_FCEN; | |
486 | ||
487 | netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s", | |
488 | (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), | |
489 | (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); | |
490 | } else { | |
491 | netif_dbg(dev, link, dev->net, "half duplex"); | |
492 | } | |
493 | ||
494 | ret = smsc75xx_write_reg(dev, FLOW, flow); | |
495 | check_warn_return(ret, "Error writing FLOW"); | |
496 | ||
497 | ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow); | |
498 | check_warn_return(ret, "Error writing FCT_FLOW"); | |
499 | ||
500 | return 0; | |
501 | } | |
502 | ||
503 | static int smsc75xx_link_reset(struct usbnet *dev) | |
504 | { | |
505 | struct mii_if_info *mii = &dev->mii; | |
506 | struct ethtool_cmd ecmd; | |
507 | u16 lcladv, rmtadv; | |
508 | int ret; | |
509 | ||
510 | /* clear interrupt status */ | |
511 | ret = smsc75xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); | |
512 | check_warn_return(ret, "Error reading PHY_INT_SRC"); | |
513 | ||
514 | ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); | |
515 | check_warn_return(ret, "Error writing INT_STS"); | |
516 | ||
517 | mii_check_media(mii, 1, 1); | |
518 | mii_ethtool_gset(&dev->mii, &ecmd); | |
519 | lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); | |
520 | rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA); | |
521 | ||
522 | netif_dbg(dev, link, dev->net, "speed: %d duplex: %d lcladv: %04x" | |
523 | " rmtadv: %04x", ecmd.speed, ecmd.duplex, lcladv, rmtadv); | |
524 | ||
525 | return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); | |
526 | } | |
527 | ||
528 | static void smsc75xx_status(struct usbnet *dev, struct urb *urb) | |
529 | { | |
530 | u32 intdata; | |
531 | ||
532 | if (urb->actual_length != 4) { | |
533 | netdev_warn(dev->net, | |
534 | "unexpected urb length %d", urb->actual_length); | |
535 | return; | |
536 | } | |
537 | ||
538 | memcpy(&intdata, urb->transfer_buffer, 4); | |
539 | le32_to_cpus(&intdata); | |
540 | ||
541 | netif_dbg(dev, link, dev->net, "intdata: 0x%08X", intdata); | |
542 | ||
543 | if (intdata & INT_ENP_PHY_INT) | |
544 | usbnet_defer_kevent(dev, EVENT_LINK_RESET); | |
545 | else | |
546 | netdev_warn(dev->net, | |
547 | "unexpected interrupt, intdata=0x%08X", intdata); | |
548 | } | |
549 | ||
550 | /* Enable or disable Rx checksum offload engine */ | |
551 | static int smsc75xx_set_rx_csum_offload(struct usbnet *dev) | |
552 | { | |
553 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
554 | unsigned long flags; | |
555 | int ret; | |
556 | ||
557 | spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); | |
558 | ||
559 | if (pdata->use_rx_csum) | |
560 | pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM; | |
561 | else | |
562 | pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM); | |
563 | ||
564 | spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); | |
565 | ||
566 | ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); | |
567 | check_warn_return(ret, "Error writing RFE_CTL"); | |
568 | ||
569 | return 0; | |
570 | } | |
571 | ||
572 | static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net) | |
573 | { | |
574 | return MAX_EEPROM_SIZE; | |
575 | } | |
576 | ||
577 | static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev, | |
578 | struct ethtool_eeprom *ee, u8 *data) | |
579 | { | |
580 | struct usbnet *dev = netdev_priv(netdev); | |
581 | ||
582 | ee->magic = LAN75XX_EEPROM_MAGIC; | |
583 | ||
584 | return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data); | |
585 | } | |
586 | ||
587 | static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev, | |
588 | struct ethtool_eeprom *ee, u8 *data) | |
589 | { | |
590 | struct usbnet *dev = netdev_priv(netdev); | |
591 | ||
592 | if (ee->magic != LAN75XX_EEPROM_MAGIC) { | |
593 | netdev_warn(dev->net, | |
594 | "EEPROM: magic value mismatch: 0x%x", ee->magic); | |
595 | return -EINVAL; | |
596 | } | |
597 | ||
598 | return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data); | |
599 | } | |
600 | ||
601 | static u32 smsc75xx_ethtool_get_rx_csum(struct net_device *netdev) | |
602 | { | |
603 | struct usbnet *dev = netdev_priv(netdev); | |
604 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
605 | ||
606 | return pdata->use_rx_csum; | |
607 | } | |
608 | ||
609 | static int smsc75xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val) | |
610 | { | |
611 | struct usbnet *dev = netdev_priv(netdev); | |
612 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
613 | ||
614 | pdata->use_rx_csum = !!val; | |
615 | ||
616 | return smsc75xx_set_rx_csum_offload(dev); | |
617 | } | |
618 | ||
619 | static int smsc75xx_ethtool_set_tso(struct net_device *netdev, u32 data) | |
620 | { | |
621 | if (data) | |
622 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; | |
623 | else | |
624 | netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); | |
625 | ||
626 | return 0; | |
627 | } | |
628 | ||
629 | static const struct ethtool_ops smsc75xx_ethtool_ops = { | |
630 | .get_link = usbnet_get_link, | |
631 | .nway_reset = usbnet_nway_reset, | |
632 | .get_drvinfo = usbnet_get_drvinfo, | |
633 | .get_msglevel = usbnet_get_msglevel, | |
634 | .set_msglevel = usbnet_set_msglevel, | |
635 | .get_settings = usbnet_get_settings, | |
636 | .set_settings = usbnet_set_settings, | |
637 | .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len, | |
638 | .get_eeprom = smsc75xx_ethtool_get_eeprom, | |
639 | .set_eeprom = smsc75xx_ethtool_set_eeprom, | |
640 | .get_tx_csum = ethtool_op_get_tx_csum, | |
641 | .set_tx_csum = ethtool_op_set_tx_hw_csum, | |
642 | .get_rx_csum = smsc75xx_ethtool_get_rx_csum, | |
643 | .set_rx_csum = smsc75xx_ethtool_set_rx_csum, | |
644 | .get_tso = ethtool_op_get_tso, | |
645 | .set_tso = smsc75xx_ethtool_set_tso, | |
646 | }; | |
647 | ||
648 | static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
649 | { | |
650 | struct usbnet *dev = netdev_priv(netdev); | |
651 | ||
652 | if (!netif_running(netdev)) | |
653 | return -EINVAL; | |
654 | ||
655 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | |
656 | } | |
657 | ||
658 | static void smsc75xx_init_mac_address(struct usbnet *dev) | |
659 | { | |
660 | /* try reading mac address from EEPROM */ | |
661 | if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, | |
662 | dev->net->dev_addr) == 0) { | |
663 | if (is_valid_ether_addr(dev->net->dev_addr)) { | |
664 | /* eeprom values are valid so use them */ | |
665 | netif_dbg(dev, ifup, dev->net, | |
666 | "MAC address read from EEPROM"); | |
667 | return; | |
668 | } | |
669 | } | |
670 | ||
671 | /* no eeprom, or eeprom values are invalid. generate random MAC */ | |
672 | random_ether_addr(dev->net->dev_addr); | |
673 | netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr"); | |
674 | } | |
675 | ||
676 | static int smsc75xx_set_mac_address(struct usbnet *dev) | |
677 | { | |
678 | u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | | |
679 | dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; | |
680 | u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; | |
681 | ||
682 | int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi); | |
683 | check_warn_return(ret, "Failed to write RX_ADDRH: %d", ret); | |
684 | ||
685 | ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo); | |
686 | check_warn_return(ret, "Failed to write RX_ADDRL: %d", ret); | |
687 | ||
688 | addr_hi |= ADDR_FILTX_FB_VALID; | |
689 | ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi); | |
690 | check_warn_return(ret, "Failed to write ADDR_FILTX: %d", ret); | |
691 | ||
692 | ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo); | |
693 | check_warn_return(ret, "Failed to write ADDR_FILTX+4: %d", ret); | |
694 | ||
695 | return 0; | |
696 | } | |
697 | ||
698 | static int smsc75xx_phy_initialize(struct usbnet *dev) | |
699 | { | |
700 | int bmcr, timeout = 0; | |
701 | ||
702 | /* Initialize MII structure */ | |
703 | dev->mii.dev = dev->net; | |
704 | dev->mii.mdio_read = smsc75xx_mdio_read; | |
705 | dev->mii.mdio_write = smsc75xx_mdio_write; | |
706 | dev->mii.phy_id_mask = 0x1f; | |
707 | dev->mii.reg_num_mask = 0x1f; | |
708 | dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID; | |
709 | ||
710 | /* reset phy and wait for reset to complete */ | |
711 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); | |
712 | ||
713 | do { | |
714 | msleep(10); | |
715 | bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); | |
716 | check_warn_return(bmcr, "Error reading MII_BMCR"); | |
717 | timeout++; | |
718 | } while ((bmcr & MII_BMCR) && (timeout < 100)); | |
719 | ||
720 | if (timeout >= 100) { | |
721 | netdev_warn(dev->net, "timeout on PHY Reset"); | |
722 | return -EIO; | |
723 | } | |
724 | ||
725 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
726 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | | |
727 | ADVERTISE_PAUSE_ASYM); | |
728 | ||
729 | /* read to clear */ | |
730 | smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); | |
731 | check_warn_return(bmcr, "Error reading PHY_INT_SRC"); | |
732 | ||
733 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, | |
734 | PHY_INT_MASK_DEFAULT); | |
735 | mii_nway_restart(&dev->mii); | |
736 | ||
737 | netif_dbg(dev, ifup, dev->net, "phy initialised successfully"); | |
738 | return 0; | |
739 | } | |
740 | ||
741 | static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size) | |
742 | { | |
743 | int ret = 0; | |
744 | u32 buf; | |
745 | bool rxenabled; | |
746 | ||
747 | ret = smsc75xx_read_reg(dev, MAC_RX, &buf); | |
748 | check_warn_return(ret, "Failed to read MAC_RX: %d", ret); | |
749 | ||
750 | rxenabled = ((buf & MAC_RX_RXEN) != 0); | |
751 | ||
752 | if (rxenabled) { | |
753 | buf &= ~MAC_RX_RXEN; | |
754 | ret = smsc75xx_write_reg(dev, MAC_RX, buf); | |
755 | check_warn_return(ret, "Failed to write MAC_RX: %d", ret); | |
756 | } | |
757 | ||
758 | /* add 4 to size for FCS */ | |
759 | buf &= ~MAC_RX_MAX_SIZE; | |
760 | buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE); | |
761 | ||
762 | ret = smsc75xx_write_reg(dev, MAC_RX, buf); | |
763 | check_warn_return(ret, "Failed to write MAC_RX: %d", ret); | |
764 | ||
765 | if (rxenabled) { | |
766 | buf |= MAC_RX_RXEN; | |
767 | ret = smsc75xx_write_reg(dev, MAC_RX, buf); | |
768 | check_warn_return(ret, "Failed to write MAC_RX: %d", ret); | |
769 | } | |
770 | ||
771 | return 0; | |
772 | } | |
773 | ||
774 | static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu) | |
775 | { | |
776 | struct usbnet *dev = netdev_priv(netdev); | |
777 | ||
778 | int ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu); | |
779 | check_warn_return(ret, "Failed to set mac rx frame length"); | |
780 | ||
781 | return usbnet_change_mtu(netdev, new_mtu); | |
782 | } | |
783 | ||
784 | static int smsc75xx_reset(struct usbnet *dev) | |
785 | { | |
786 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
787 | u32 buf; | |
788 | int ret = 0, timeout; | |
789 | ||
790 | netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset"); | |
791 | ||
792 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
793 | check_warn_return(ret, "Failed to read HW_CFG: %d", ret); | |
794 | ||
795 | buf |= HW_CFG_LRST; | |
796 | ||
797 | ret = smsc75xx_write_reg(dev, HW_CFG, buf); | |
798 | check_warn_return(ret, "Failed to write HW_CFG: %d", ret); | |
799 | ||
800 | timeout = 0; | |
801 | do { | |
802 | msleep(10); | |
803 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
804 | check_warn_return(ret, "Failed to read HW_CFG: %d", ret); | |
805 | timeout++; | |
806 | } while ((buf & HW_CFG_LRST) && (timeout < 100)); | |
807 | ||
808 | if (timeout >= 100) { | |
809 | netdev_warn(dev->net, "timeout on completion of Lite Reset"); | |
810 | return -EIO; | |
811 | } | |
812 | ||
813 | netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY"); | |
814 | ||
815 | ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); | |
816 | check_warn_return(ret, "Failed to read PMT_CTL: %d", ret); | |
817 | ||
818 | buf |= PMT_CTL_PHY_RST; | |
819 | ||
820 | ret = smsc75xx_write_reg(dev, PMT_CTL, buf); | |
821 | check_warn_return(ret, "Failed to write PMT_CTL: %d", ret); | |
822 | ||
823 | timeout = 0; | |
824 | do { | |
825 | msleep(10); | |
826 | ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); | |
827 | check_warn_return(ret, "Failed to read PMT_CTL: %d", ret); | |
828 | timeout++; | |
829 | } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100)); | |
830 | ||
831 | if (timeout >= 100) { | |
832 | netdev_warn(dev->net, "timeout waiting for PHY Reset"); | |
833 | return -EIO; | |
834 | } | |
835 | ||
836 | netif_dbg(dev, ifup, dev->net, "PHY reset complete"); | |
837 | ||
838 | smsc75xx_init_mac_address(dev); | |
839 | ||
840 | ret = smsc75xx_set_mac_address(dev); | |
841 | check_warn_return(ret, "Failed to set mac address"); | |
842 | ||
843 | netif_dbg(dev, ifup, dev->net, "MAC Address: %pM", dev->net->dev_addr); | |
844 | ||
845 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
846 | check_warn_return(ret, "Failed to read HW_CFG: %d", ret); | |
847 | ||
848 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x", buf); | |
849 | ||
850 | buf |= HW_CFG_BIR; | |
851 | ||
852 | ret = smsc75xx_write_reg(dev, HW_CFG, buf); | |
853 | check_warn_return(ret, "Failed to write HW_CFG: %d", ret); | |
854 | ||
855 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
856 | check_warn_return(ret, "Failed to read HW_CFG: %d", ret); | |
857 | ||
858 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after " | |
859 | "writing HW_CFG_BIR: 0x%08x", buf); | |
860 | ||
861 | if (!turbo_mode) { | |
862 | buf = 0; | |
863 | dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; | |
864 | } else if (dev->udev->speed == USB_SPEED_HIGH) { | |
865 | buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; | |
866 | dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; | |
867 | } else { | |
868 | buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; | |
869 | dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; | |
870 | } | |
871 | ||
872 | netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld", | |
873 | (ulong)dev->rx_urb_size); | |
874 | ||
875 | ret = smsc75xx_write_reg(dev, BURST_CAP, buf); | |
876 | check_warn_return(ret, "Failed to write BURST_CAP: %d", ret); | |
877 | ||
878 | ret = smsc75xx_read_reg(dev, BURST_CAP, &buf); | |
879 | check_warn_return(ret, "Failed to read BURST_CAP: %d", ret); | |
880 | ||
881 | netif_dbg(dev, ifup, dev->net, | |
882 | "Read Value from BURST_CAP after writing: 0x%08x", buf); | |
883 | ||
884 | ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); | |
885 | check_warn_return(ret, "Failed to write BULK_IN_DLY: %d", ret); | |
886 | ||
887 | ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf); | |
888 | check_warn_return(ret, "Failed to read BULK_IN_DLY: %d", ret); | |
889 | ||
890 | netif_dbg(dev, ifup, dev->net, | |
891 | "Read Value from BULK_IN_DLY after writing: 0x%08x", buf); | |
892 | ||
893 | if (turbo_mode) { | |
894 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
895 | check_warn_return(ret, "Failed to read HW_CFG: %d", ret); | |
896 | ||
897 | netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf); | |
898 | ||
899 | buf |= (HW_CFG_MEF | HW_CFG_BCE); | |
900 | ||
901 | ret = smsc75xx_write_reg(dev, HW_CFG, buf); | |
902 | check_warn_return(ret, "Failed to write HW_CFG: %d", ret); | |
903 | ||
904 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
905 | check_warn_return(ret, "Failed to read HW_CFG: %d", ret); | |
906 | ||
907 | netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf); | |
908 | } | |
909 | ||
910 | /* set FIFO sizes */ | |
911 | buf = (MAX_RX_FIFO_SIZE - 512) / 512; | |
912 | ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf); | |
913 | check_warn_return(ret, "Failed to write FCT_RX_FIFO_END: %d", ret); | |
914 | ||
915 | netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x", buf); | |
916 | ||
917 | buf = (MAX_TX_FIFO_SIZE - 512) / 512; | |
918 | ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf); | |
919 | check_warn_return(ret, "Failed to write FCT_TX_FIFO_END: %d", ret); | |
920 | ||
921 | netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x", buf); | |
922 | ||
923 | ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); | |
924 | check_warn_return(ret, "Failed to write INT_STS: %d", ret); | |
925 | ||
926 | ret = smsc75xx_read_reg(dev, ID_REV, &buf); | |
927 | check_warn_return(ret, "Failed to read ID_REV: %d", ret); | |
928 | ||
929 | netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x", buf); | |
930 | ||
931 | /* Configure GPIO pins as LED outputs */ | |
932 | ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf); | |
933 | check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret); | |
934 | ||
935 | buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL); | |
936 | buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL; | |
937 | ||
938 | ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf); | |
939 | check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret); | |
940 | ||
941 | ret = smsc75xx_write_reg(dev, FLOW, 0); | |
942 | check_warn_return(ret, "Failed to write FLOW: %d", ret); | |
943 | ||
944 | ret = smsc75xx_write_reg(dev, FCT_FLOW, 0); | |
945 | check_warn_return(ret, "Failed to write FCT_FLOW: %d", ret); | |
946 | ||
947 | /* Don't need rfe_ctl_lock during initialisation */ | |
948 | ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); | |
949 | check_warn_return(ret, "Failed to read RFE_CTL: %d", ret); | |
950 | ||
951 | pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF; | |
952 | ||
953 | ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); | |
954 | check_warn_return(ret, "Failed to write RFE_CTL: %d", ret); | |
955 | ||
956 | ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); | |
957 | check_warn_return(ret, "Failed to read RFE_CTL: %d", ret); | |
958 | ||
959 | netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x", pdata->rfe_ctl); | |
960 | ||
961 | /* Enable or disable checksum offload engines */ | |
962 | ethtool_op_set_tx_hw_csum(dev->net, DEFAULT_TX_CSUM_ENABLE); | |
963 | ret = smsc75xx_set_rx_csum_offload(dev); | |
964 | check_warn_return(ret, "Failed to set rx csum offload: %d", ret); | |
965 | ||
966 | smsc75xx_ethtool_set_tso(dev->net, DEFAULT_TSO_ENABLE); | |
967 | ||
968 | smsc75xx_set_multicast(dev->net); | |
969 | ||
970 | ret = smsc75xx_phy_initialize(dev); | |
971 | check_warn_return(ret, "Failed to initialize PHY: %d", ret); | |
972 | ||
973 | ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf); | |
974 | check_warn_return(ret, "Failed to read INT_EP_CTL: %d", ret); | |
975 | ||
976 | /* enable PHY interrupts */ | |
977 | buf |= INT_ENP_PHY_INT; | |
978 | ||
979 | ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf); | |
980 | check_warn_return(ret, "Failed to write INT_EP_CTL: %d", ret); | |
981 | ||
982 | ret = smsc75xx_read_reg(dev, MAC_TX, &buf); | |
983 | check_warn_return(ret, "Failed to read MAC_TX: %d", ret); | |
984 | ||
985 | buf |= MAC_TX_TXEN; | |
986 | ||
987 | ret = smsc75xx_write_reg(dev, MAC_TX, buf); | |
988 | check_warn_return(ret, "Failed to write MAC_TX: %d", ret); | |
989 | ||
990 | netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x", buf); | |
991 | ||
992 | ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf); | |
993 | check_warn_return(ret, "Failed to read FCT_TX_CTL: %d", ret); | |
994 | ||
995 | buf |= FCT_TX_CTL_EN; | |
996 | ||
997 | ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf); | |
998 | check_warn_return(ret, "Failed to write FCT_TX_CTL: %d", ret); | |
999 | ||
1000 | netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x", buf); | |
1001 | ||
1002 | ret = smsc75xx_set_rx_max_frame_length(dev, 1514); | |
1003 | check_warn_return(ret, "Failed to set max rx frame length"); | |
1004 | ||
1005 | ret = smsc75xx_read_reg(dev, MAC_RX, &buf); | |
1006 | check_warn_return(ret, "Failed to read MAC_RX: %d", ret); | |
1007 | ||
1008 | buf |= MAC_RX_RXEN; | |
1009 | ||
1010 | ret = smsc75xx_write_reg(dev, MAC_RX, buf); | |
1011 | check_warn_return(ret, "Failed to write MAC_RX: %d", ret); | |
1012 | ||
1013 | netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x", buf); | |
1014 | ||
1015 | ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf); | |
1016 | check_warn_return(ret, "Failed to read FCT_RX_CTL: %d", ret); | |
1017 | ||
1018 | buf |= FCT_RX_CTL_EN; | |
1019 | ||
1020 | ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf); | |
1021 | check_warn_return(ret, "Failed to write FCT_RX_CTL: %d", ret); | |
1022 | ||
1023 | netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x", buf); | |
1024 | ||
1025 | netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0"); | |
1026 | return 0; | |
1027 | } | |
1028 | ||
1029 | static const struct net_device_ops smsc75xx_netdev_ops = { | |
1030 | .ndo_open = usbnet_open, | |
1031 | .ndo_stop = usbnet_stop, | |
1032 | .ndo_start_xmit = usbnet_start_xmit, | |
1033 | .ndo_tx_timeout = usbnet_tx_timeout, | |
1034 | .ndo_change_mtu = smsc75xx_change_mtu, | |
1035 | .ndo_set_mac_address = eth_mac_addr, | |
1036 | .ndo_validate_addr = eth_validate_addr, | |
1037 | .ndo_do_ioctl = smsc75xx_ioctl, | |
1038 | .ndo_set_multicast_list = smsc75xx_set_multicast, | |
1039 | }; | |
1040 | ||
1041 | static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf) | |
1042 | { | |
1043 | struct smsc75xx_priv *pdata = NULL; | |
1044 | int ret; | |
1045 | ||
1046 | printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); | |
1047 | ||
1048 | ret = usbnet_get_endpoints(dev, intf); | |
1049 | check_warn_return(ret, "usbnet_get_endpoints failed: %d", ret); | |
1050 | ||
1051 | dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv), | |
1052 | GFP_KERNEL); | |
1053 | ||
1054 | pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
1055 | if (!pdata) { | |
1056 | netdev_warn(dev->net, "Unable to allocate smsc75xx_priv"); | |
1057 | return -ENOMEM; | |
1058 | } | |
1059 | ||
1060 | pdata->dev = dev; | |
1061 | ||
1062 | spin_lock_init(&pdata->rfe_ctl_lock); | |
1063 | mutex_init(&pdata->dataport_mutex); | |
1064 | ||
1065 | INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write); | |
1066 | ||
1067 | pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE; | |
1068 | ||
1069 | /* We have to advertise SG otherwise TSO cannot be enabled */ | |
1070 | dev->net->features |= NETIF_F_SG; | |
1071 | ||
1072 | /* Init all registers */ | |
1073 | ret = smsc75xx_reset(dev); | |
1074 | ||
1075 | dev->net->netdev_ops = &smsc75xx_netdev_ops; | |
1076 | dev->net->ethtool_ops = &smsc75xx_ethtool_ops; | |
1077 | dev->net->flags |= IFF_MULTICAST; | |
1078 | dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD; | |
1079 | return 0; | |
1080 | } | |
1081 | ||
1082 | static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf) | |
1083 | { | |
1084 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
1085 | if (pdata) { | |
1086 | netif_dbg(dev, ifdown, dev->net, "free pdata"); | |
1087 | kfree(pdata); | |
1088 | pdata = NULL; | |
1089 | dev->data[0] = 0; | |
1090 | } | |
1091 | } | |
1092 | ||
1093 | static void smsc75xx_rx_csum_offload(struct sk_buff *skb, u32 rx_cmd_a, | |
1094 | u32 rx_cmd_b) | |
1095 | { | |
1096 | if (unlikely(rx_cmd_a & RX_CMD_A_LCSM)) { | |
1097 | skb->ip_summed = CHECKSUM_NONE; | |
1098 | } else { | |
1099 | skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT)); | |
1100 | skb->ip_summed = CHECKSUM_COMPLETE; | |
1101 | } | |
1102 | } | |
1103 | ||
1104 | static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | |
1105 | { | |
1106 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
1107 | ||
1108 | while (skb->len > 0) { | |
1109 | u32 rx_cmd_a, rx_cmd_b, align_count, size; | |
1110 | struct sk_buff *ax_skb; | |
1111 | unsigned char *packet; | |
1112 | ||
1113 | memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a)); | |
1114 | le32_to_cpus(&rx_cmd_a); | |
1115 | skb_pull(skb, 4); | |
1116 | ||
1117 | memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b)); | |
1118 | le32_to_cpus(&rx_cmd_b); | |
1119 | skb_pull(skb, 4 + NET_IP_ALIGN); | |
1120 | ||
1121 | packet = skb->data; | |
1122 | ||
1123 | /* get the packet length */ | |
1124 | size = (rx_cmd_a & RX_CMD_A_LEN) - NET_IP_ALIGN; | |
1125 | align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; | |
1126 | ||
1127 | if (unlikely(rx_cmd_a & RX_CMD_A_RED)) { | |
1128 | netif_dbg(dev, rx_err, dev->net, | |
1129 | "Error rx_cmd_a=0x%08x", rx_cmd_a); | |
1130 | dev->net->stats.rx_errors++; | |
1131 | dev->net->stats.rx_dropped++; | |
1132 | ||
1133 | if (rx_cmd_a & RX_CMD_A_FCS) | |
1134 | dev->net->stats.rx_crc_errors++; | |
1135 | else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT)) | |
1136 | dev->net->stats.rx_frame_errors++; | |
1137 | } else { | |
1138 | /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ | |
1139 | if (unlikely(size > (ETH_FRAME_LEN + 12))) { | |
1140 | netif_dbg(dev, rx_err, dev->net, | |
1141 | "size err rx_cmd_a=0x%08x", rx_cmd_a); | |
1142 | return 0; | |
1143 | } | |
1144 | ||
1145 | /* last frame in this batch */ | |
1146 | if (skb->len == size) { | |
1147 | if (pdata->use_rx_csum) | |
1148 | smsc75xx_rx_csum_offload(skb, rx_cmd_a, | |
1149 | rx_cmd_b); | |
1150 | else | |
1151 | skb->ip_summed = CHECKSUM_NONE; | |
1152 | ||
1153 | skb_trim(skb, skb->len - 4); /* remove fcs */ | |
1154 | skb->truesize = size + sizeof(struct sk_buff); | |
1155 | ||
1156 | return 1; | |
1157 | } | |
1158 | ||
1159 | ax_skb = skb_clone(skb, GFP_ATOMIC); | |
1160 | if (unlikely(!ax_skb)) { | |
1161 | netdev_warn(dev->net, "Error allocating skb"); | |
1162 | return 0; | |
1163 | } | |
1164 | ||
1165 | ax_skb->len = size; | |
1166 | ax_skb->data = packet; | |
1167 | skb_set_tail_pointer(ax_skb, size); | |
1168 | ||
1169 | if (pdata->use_rx_csum) | |
1170 | smsc75xx_rx_csum_offload(ax_skb, rx_cmd_a, | |
1171 | rx_cmd_b); | |
1172 | else | |
1173 | ax_skb->ip_summed = CHECKSUM_NONE; | |
1174 | ||
1175 | skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ | |
1176 | ax_skb->truesize = size + sizeof(struct sk_buff); | |
1177 | ||
1178 | usbnet_skb_return(dev, ax_skb); | |
1179 | } | |
1180 | ||
1181 | skb_pull(skb, size); | |
1182 | ||
1183 | /* padding bytes before the next frame starts */ | |
1184 | if (skb->len) | |
1185 | skb_pull(skb, align_count); | |
1186 | } | |
1187 | ||
1188 | if (unlikely(skb->len < 0)) { | |
1189 | netdev_warn(dev->net, "invalid rx length<0 %d", skb->len); | |
1190 | return 0; | |
1191 | } | |
1192 | ||
1193 | return 1; | |
1194 | } | |
1195 | ||
1196 | static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev, | |
1197 | struct sk_buff *skb, gfp_t flags) | |
1198 | { | |
1199 | u32 tx_cmd_a, tx_cmd_b; | |
1200 | ||
1201 | skb_linearize(skb); | |
1202 | ||
1203 | if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) { | |
1204 | struct sk_buff *skb2 = | |
1205 | skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags); | |
1206 | dev_kfree_skb_any(skb); | |
1207 | skb = skb2; | |
1208 | if (!skb) | |
1209 | return NULL; | |
1210 | } | |
1211 | ||
1212 | tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS; | |
1213 | ||
1214 | if (skb->ip_summed == CHECKSUM_PARTIAL) | |
1215 | tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE; | |
1216 | ||
1217 | if (skb_is_gso(skb)) { | |
1218 | u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN); | |
1219 | tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS; | |
1220 | ||
1221 | tx_cmd_a |= TX_CMD_A_LSO; | |
1222 | } else { | |
1223 | tx_cmd_b = 0; | |
1224 | } | |
1225 | ||
1226 | skb_push(skb, 4); | |
1227 | cpu_to_le32s(&tx_cmd_b); | |
1228 | memcpy(skb->data, &tx_cmd_b, 4); | |
1229 | ||
1230 | skb_push(skb, 4); | |
1231 | cpu_to_le32s(&tx_cmd_a); | |
1232 | memcpy(skb->data, &tx_cmd_a, 4); | |
1233 | ||
1234 | return skb; | |
1235 | } | |
1236 | ||
1237 | static const struct driver_info smsc75xx_info = { | |
1238 | .description = "smsc75xx USB 2.0 Gigabit Ethernet", | |
1239 | .bind = smsc75xx_bind, | |
1240 | .unbind = smsc75xx_unbind, | |
1241 | .link_reset = smsc75xx_link_reset, | |
1242 | .reset = smsc75xx_reset, | |
1243 | .rx_fixup = smsc75xx_rx_fixup, | |
1244 | .tx_fixup = smsc75xx_tx_fixup, | |
1245 | .status = smsc75xx_status, | |
1246 | .flags = FLAG_ETHER | FLAG_SEND_ZLP, | |
1247 | }; | |
1248 | ||
1249 | static const struct usb_device_id products[] = { | |
1250 | { | |
1251 | /* SMSC7500 USB Gigabit Ethernet Device */ | |
1252 | USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500), | |
1253 | .driver_info = (unsigned long) &smsc75xx_info, | |
1254 | }, | |
1255 | { | |
1256 | /* SMSC7500 USB Gigabit Ethernet Device */ | |
1257 | USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505), | |
1258 | .driver_info = (unsigned long) &smsc75xx_info, | |
1259 | }, | |
1260 | { }, /* END */ | |
1261 | }; | |
1262 | MODULE_DEVICE_TABLE(usb, products); | |
1263 | ||
1264 | static struct usb_driver smsc75xx_driver = { | |
1265 | .name = SMSC_CHIPNAME, | |
1266 | .id_table = products, | |
1267 | .probe = usbnet_probe, | |
1268 | .suspend = usbnet_suspend, | |
1269 | .resume = usbnet_resume, | |
1270 | .disconnect = usbnet_disconnect, | |
1271 | }; | |
1272 | ||
1273 | static int __init smsc75xx_init(void) | |
1274 | { | |
1275 | return usb_register(&smsc75xx_driver); | |
1276 | } | |
1277 | module_init(smsc75xx_init); | |
1278 | ||
1279 | static void __exit smsc75xx_exit(void) | |
1280 | { | |
1281 | usb_deregister(&smsc75xx_driver); | |
1282 | } | |
1283 | module_exit(smsc75xx_exit); | |
1284 | ||
1285 | MODULE_AUTHOR("Nancy Lin"); | |
1286 | MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>"); | |
1287 | MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices"); | |
1288 | MODULE_LICENSE("GPL"); |