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[net-next-2.6.git] / drivers / net / spider_net.h
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aaec0fab
JO		 1/*
2 * Network device driver for Cell Processor-Based Blade
3 *
4 * (C) Copyright IBM Corp. 2005
5 *
6 * Authors : Utz Bacher <utz.bacher@de.ibm.com>
7 * Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2, or (at your option)
12 * any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#ifndef _SPIDER_NET_H
25#define _SPIDER_NET_H
26
27#include "sungem_phy.h"
28
29extern int spider_net_stop(struct net_device *netdev);
30extern int spider_net_open(struct net_device *netdev);
31
32extern struct ethtool_ops spider_net_ethtool_ops;
33
34extern char spider_net_driver_name[];
35
11f1a52b
AB		 36#define SPIDER_NET_MAX_FRAME 2312
37#define SPIDER_NET_MAX_MTU 2294
aaec0fab
JO		 38#define SPIDER_NET_MIN_MTU 64
39
40#define SPIDER_NET_RXBUF_ALIGN 128
41
11f1a52b 42#define SPIDER_NET_RX_DESCRIPTORS_DEFAULT 256
aaec0fab 43#define SPIDER_NET_RX_DESCRIPTORS_MIN 16
11f1a52b 44#define SPIDER_NET_RX_DESCRIPTORS_MAX 512
aaec0fab 45
11f1a52b 46#define SPIDER_NET_TX_DESCRIPTORS_DEFAULT 256
aaec0fab 47#define SPIDER_NET_TX_DESCRIPTORS_MIN 16
11f1a52b
AB		 48#define SPIDER_NET_TX_DESCRIPTORS_MAX 512
49
50#define SPIDER_NET_TX_TIMER 20
aaec0fab
JO		 51
52#define SPIDER_NET_RX_CSUM_DEFAULT 1
53
11f1a52b
AB		 54#define SPIDER_NET_WATCHDOG_TIMEOUT 50*HZ
55#define SPIDER_NET_NAPI_WEIGHT 64
aaec0fab 56
11f1a52b
AB		 57#define SPIDER_NET_FIRMWARE_SEQS 6
58#define SPIDER_NET_FIRMWARE_SEQWORDS 1024
59#define SPIDER_NET_FIRMWARE_LEN (SPIDER_NET_FIRMWARE_SEQS * \
60 SPIDER_NET_FIRMWARE_SEQWORDS * \
61 sizeof(u32))
aaec0fab
JO		 62#define SPIDER_NET_FIRMWARE_NAME "spider_fw.bin"
63
64/** spider_net SMMIO registers */
65#define SPIDER_NET_GHIINT0STS 0x00000000
66#define SPIDER_NET_GHIINT1STS 0x00000004
67#define SPIDER_NET_GHIINT2STS 0x00000008
68#define SPIDER_NET_GHIINT0MSK 0x00000010
69#define SPIDER_NET_GHIINT1MSK 0x00000014
70#define SPIDER_NET_GHIINT2MSK 0x00000018
71
72#define SPIDER_NET_GRESUMINTNUM 0x00000020
73#define SPIDER_NET_GREINTNUM 0x00000024
74
75#define SPIDER_NET_GFFRMNUM 0x00000028
76#define SPIDER_NET_GFAFRMNUM 0x0000002c
77#define SPIDER_NET_GFBFRMNUM 0x00000030
78#define SPIDER_NET_GFCFRMNUM 0x00000034
79#define SPIDER_NET_GFDFRMNUM 0x00000038
80
81/* clear them (don't use it) */
82#define SPIDER_NET_GFREECNNUM 0x0000003c
83#define SPIDER_NET_GONETIMENUM 0x00000040
84
85#define SPIDER_NET_GTOUTFRMNUM 0x00000044
86
87#define SPIDER_NET_GTXMDSET 0x00000050
88#define SPIDER_NET_GPCCTRL 0x00000054
89#define SPIDER_NET_GRXMDSET 0x00000058
90#define SPIDER_NET_GIPSECINIT 0x0000005c
91#define SPIDER_NET_GFTRESTRT 0x00000060
92#define SPIDER_NET_GRXDMAEN 0x00000064
93#define SPIDER_NET_GMRWOLCTRL 0x00000068
94#define SPIDER_NET_GPCWOPCMD 0x0000006c
95#define SPIDER_NET_GPCROPCMD 0x00000070
96#define SPIDER_NET_GTTFRMCNT 0x00000078
97#define SPIDER_NET_GTESTMD 0x0000007c
98
99#define SPIDER_NET_GSINIT 0x00000080
100#define SPIDER_NET_GSnPRGADR 0x00000084
101#define SPIDER_NET_GSnPRGDAT 0x00000088
102
103#define SPIDER_NET_GMACOPEMD 0x00000100
104#define SPIDER_NET_GMACLENLMT 0x00000108
105#define SPIDER_NET_GMACINTEN 0x00000118
106#define SPIDER_NET_GMACPHYCTRL 0x00000120
107
108#define SPIDER_NET_GMACAPAUSE 0x00000154
109#define SPIDER_NET_GMACTXPAUSE 0x00000164
110
111#define SPIDER_NET_GMACMODE 0x000001b0
112#define SPIDER_NET_GMACBSTLMT 0x000001b4
113
114#define SPIDER_NET_GMACUNIMACU 0x000001c0
115#define SPIDER_NET_GMACUNIMACL 0x000001c8
116
117#define SPIDER_NET_GMRMHFILnR 0x00000400
118#define SPIDER_NET_MULTICAST_HASHES 256
119
120#define SPIDER_NET_GMRUAFILnR 0x00000500
121#define SPIDER_NET_GMRUA0FIL15R 0x00000578
122
123/* RX DMA controller registers, all 0x00000a.. are for DMA controller A,
124 * 0x00000b.. for DMA controller B, etc. */
125#define SPIDER_NET_GDADCHA 0x00000a00
126#define SPIDER_NET_GDADMACCNTR 0x00000a04
127#define SPIDER_NET_GDACTDPA 0x00000a08
128#define SPIDER_NET_GDACTDCNT 0x00000a0c
129#define SPIDER_NET_GDACDBADDR 0x00000a20
130#define SPIDER_NET_GDACDBSIZE 0x00000a24
131#define SPIDER_NET_GDACNEXTDA 0x00000a28
132#define SPIDER_NET_GDACCOMST 0x00000a2c
133#define SPIDER_NET_GDAWBCOMST 0x00000a30
134#define SPIDER_NET_GDAWBRSIZE 0x00000a34
135#define SPIDER_NET_GDAWBVSIZE 0x00000a38
136#define SPIDER_NET_GDAWBTRST 0x00000a3c
137#define SPIDER_NET_GDAWBTRERR 0x00000a40
138
139/* TX DMA controller registers */
140#define SPIDER_NET_GDTDCHA 0x00000e00
141#define SPIDER_NET_GDTDMACCNTR 0x00000e04
142#define SPIDER_NET_GDTCDPA 0x00000e08
143#define SPIDER_NET_GDTDMASEL 0x00000e14
144
145#define SPIDER_NET_ECMODE 0x00000f00
146/* clock and reset control register */
147#define SPIDER_NET_CKRCTRL 0x00000ff0
148
149/** SCONFIG registers */
150#define SPIDER_NET_SCONFIG_IOACTE 0x00002810
151
11f1a52b
AB		 152/** interrupt mask registers */
153#define SPIDER_NET_INT0_MASK_VALUE 0x3f7fe2c7
154#define SPIDER_NET_INT1_MASK_VALUE 0xffff7ff7
aaec0fab 155/* no MAC aborts -> auto retransmission */
11f1a52b 156#define SPIDER_NET_INT2_MASK_VALUE 0xffef7ff1
aaec0fab 157
aaec0fab
JO		 158/* we rely on flagged descriptor interrupts */
159#define SPIDER_NET_FRAMENUM_VALUE 0x00000000
160/* set this first, then the FRAMENUM_VALUE */
161#define SPIDER_NET_GFXFRAMES_VALUE 0x00000000
162
163#define SPIDER_NET_STOP_SEQ_VALUE 0x00000000
164#define SPIDER_NET_RUN_SEQ_VALUE 0x0000007e
165
166#define SPIDER_NET_PHY_CTRL_VALUE 0x00040040
167/* #define SPIDER_NET_PHY_CTRL_VALUE 0x01070080*/
168#define SPIDER_NET_RXMODE_VALUE 0x00000011
169/* auto retransmission in case of MAC aborts */
170#define SPIDER_NET_TXMODE_VALUE 0x00010000
171#define SPIDER_NET_RESTART_VALUE 0x00000000
172#define SPIDER_NET_WOL_VALUE 0x00001111
173#if 0
174#define SPIDER_NET_WOL_VALUE 0x00000000
175#endif
11f1a52b 176#define SPIDER_NET_IPSECINIT_VALUE 0x6f716f71
aaec0fab
JO		 177
178/* pause frames: automatic, no upper retransmission count */
179/* outside loopback mode: ETOMOD signal dont matter, not connected */
180#define SPIDER_NET_OPMODE_VALUE 0x00000063
181/*#define SPIDER_NET_OPMODE_VALUE 0x001b0062*/
182#define SPIDER_NET_LENLMT_VALUE 0x00000908
183
184#define SPIDER_NET_MACAPAUSE_VALUE 0x00000800 /* about 1 ms */
185#define SPIDER_NET_TXPAUSE_VALUE 0x00000000
186
187#define SPIDER_NET_MACMODE_VALUE 0x00000001
188#define SPIDER_NET_BURSTLMT_VALUE 0x00000200 /* about 16 us */
189
190/* 1(0) enable r/tx dma
191 * 0000000 fixed to 0
192 *
193 * 000000 fixed to 0
194 * 0(1) en/disable descr writeback on force end
195 * 0(1) force end
196 *
197 * 000000 fixed to 0
198 * 00 burst alignment: 128 bytes
199 *
200 * 00000 fixed to 0
201 * 0 descr writeback size 32 bytes
202 * 0(1) descr chain end interrupt enable
203 * 0(1) descr status writeback enable */
204
205/* to set RX_DMA_EN */
206#define SPIDER_NET_DMA_RX_VALUE 0x80000000
207#define SPIDER_NET_DMA_RX_FEND_VALUE 0x00030003
208/* to set TX_DMA_EN */
209#define SPIDER_NET_DMA_TX_VALUE 0x80000000
210#define SPIDER_NET_DMA_TX_FEND_VALUE 0x00030003
211
212/* SPIDER_NET_UA_DESCR_VALUE is OR'ed with the unicast address */
213#define SPIDER_NET_UA_DESCR_VALUE 0x00080000
214#define SPIDER_NET_PROMISC_VALUE 0x00080000
215#define SPIDER_NET_NONPROMISC_VALUE 0x00000000
216
217#define SPIDER_NET_DMASEL_VALUE 0x00000001
218
219#define SPIDER_NET_ECMODE_VALUE 0x00000000
220
221#define SPIDER_NET_CKRCTRL_RUN_VALUE 0x1fff010f
222#define SPIDER_NET_CKRCTRL_STOP_VALUE 0x0000010f
223
224#define SPIDER_NET_SBIMSTATE_VALUE 0x00000000
225#define SPIDER_NET_SBTMSTATE_VALUE 0x00000000
226
227/* SPIDER_NET_GHIINT0STS bits, in reverse order so that they can be used
228 * with 1 << SPIDER_NET_... */
229enum spider_net_int0_status {
230 SPIDER_NET_GPHYINT = 0,
231 SPIDER_NET_GMAC2INT,
232 SPIDER_NET_GMAC1INT,
233 SPIDER_NET_GIPSINT,
234 SPIDER_NET_GFIFOINT,
235 SPIDER_NET_GDMACINT,
236 SPIDER_NET_GSYSINT,
237 SPIDER_NET_GPWOPCMPINT,
238 SPIDER_NET_GPROPCMPINT,
239 SPIDER_NET_GPWFFINT,
240 SPIDER_NET_GRMDADRINT,
241 SPIDER_NET_GRMARPINT,
242 SPIDER_NET_GRMMPINT,
243 SPIDER_NET_GDTDEN0INT,
244 SPIDER_NET_GDDDEN0INT,
245 SPIDER_NET_GDCDEN0INT,
246 SPIDER_NET_GDBDEN0INT,
247 SPIDER_NET_GDADEN0INT,
248 SPIDER_NET_GDTFDCINT,
249 SPIDER_NET_GDDFDCINT,
250 SPIDER_NET_GDCFDCINT,
251 SPIDER_NET_GDBFDCINT,
252 SPIDER_NET_GDAFDCINT,
253 SPIDER_NET_GTTEDINT,
254 SPIDER_NET_GDTDCEINT,
255 SPIDER_NET_GRFDNMINT,
256 SPIDER_NET_GRFCNMINT,
257 SPIDER_NET_GRFBNMINT,
258 SPIDER_NET_GRFANMINT,
259 SPIDER_NET_GRFNMINT,
260 SPIDER_NET_G1TMCNTINT,
261 SPIDER_NET_GFREECNTINT
262};
263/* GHIINT1STS bits */
264enum spider_net_int1_status {
265 SPIDER_NET_GTMFLLINT = 0,
266 SPIDER_NET_GRMFLLINT,
267 SPIDER_NET_GTMSHTINT,
268 SPIDER_NET_GDTINVDINT,
269 SPIDER_NET_GRFDFLLINT,
270 SPIDER_NET_GDDDCEINT,
271 SPIDER_NET_GDDINVDINT,
272 SPIDER_NET_GRFCFLLINT,
273 SPIDER_NET_GDCDCEINT,
274 SPIDER_NET_GDCINVDINT,
275 SPIDER_NET_GRFBFLLINT,
276 SPIDER_NET_GDBDCEINT,
277 SPIDER_NET_GDBINVDINT,
278 SPIDER_NET_GRFAFLLINT,
279 SPIDER_NET_GDADCEINT,
280 SPIDER_NET_GDAINVDINT,
281 SPIDER_NET_GDTRSERINT,
282 SPIDER_NET_GDDRSERINT,
283 SPIDER_NET_GDCRSERINT,
284 SPIDER_NET_GDBRSERINT,
285 SPIDER_NET_GDARSERINT,
286 SPIDER_NET_GDSERINT,
287 SPIDER_NET_GDTPTERINT,
288 SPIDER_NET_GDDPTERINT,
289 SPIDER_NET_GDCPTERINT,
290 SPIDER_NET_GDBPTERINT,
291 SPIDER_NET_GDAPTERINT
292};
293/* GHIINT2STS bits */
294enum spider_net_int2_status {
295 SPIDER_NET_GPROPERINT = 0,
296 SPIDER_NET_GMCTCRSNGINT,
297 SPIDER_NET_GMCTLCOLINT,
298 SPIDER_NET_GMCTTMOTINT,
299 SPIDER_NET_GMCRCAERINT,
300 SPIDER_NET_GMCRCALERINT,
301 SPIDER_NET_GMCRALNERINT,
302 SPIDER_NET_GMCROVRINT,
303 SPIDER_NET_GMCRRNTINT,
304 SPIDER_NET_GMCRRXERINT,
305 SPIDER_NET_GTITCSERINT,
306 SPIDER_NET_GTIFMTERINT,
307 SPIDER_NET_GTIPKTRVKINT,
308 SPIDER_NET_GTISPINGINT,
309 SPIDER_NET_GTISADNGINT,
310 SPIDER_NET_GTISPDNGINT,
311 SPIDER_NET_GRIFMTERINT,
312 SPIDER_NET_GRIPKTRVKINT,
313 SPIDER_NET_GRISPINGINT,
314 SPIDER_NET_GRISADNGINT,
315 SPIDER_NET_GRISPDNGINT
316};
317
318#define SPIDER_NET_TXINT ( (1 << SPIDER_NET_GTTEDINT) | \
319 (1 << SPIDER_NET_GDTDCEINT) | \
320 (1 << SPIDER_NET_GDTFDCINT) )
321
322/* we rely on flagged descriptor interrupts*/
323#define SPIDER_NET_RXINT ( (1 << SPIDER_NET_GDAFDCINT) | \
324 (1 << SPIDER_NET_GRMFLLINT) )
325
11f1a52b
AB		 326#define SPIDER_NET_ERRINT ( 0xffffffff & \
327 (~SPIDER_NET_TXINT) & \
328 (~SPIDER_NET_RXINT) )
329
aaec0fab
JO		 330#define SPIDER_NET_GPREXEC 0x80000000
331#define SPIDER_NET_GPRDAT_MASK 0x0000ffff
332
333/* descriptor bits
334 *
335 * 1010 descriptor ready
336 * 0 descr in middle of chain
337 * 000 fixed to 0
338 *
339 * 0 no interrupt on completion
340 * 000 fixed to 0
341 * 1 no ipsec processing
342 * 1 last descriptor for this frame
343 * 00 no checksum
344 * 10 tcp checksum
345 * 11 udp checksum
346 *
347 * 00 fixed to 0
348 * 0 fixed to 0
349 * 0 no interrupt on response errors
350 * 0 no interrupt on invalid descr
351 * 0 no interrupt on dma process termination
352 * 0 no interrupt on descr chain end
353 * 0 no interrupt on descr complete
354 *
355 * 000 fixed to 0
356 * 0 response error interrupt status
357 * 0 invalid descr status
358 * 0 dma termination status
359 * 0 descr chain end status
360 * 0 descr complete status */
361#define SPIDER_NET_DMAC_CMDSTAT_NOCS 0xa00c0000
362#define SPIDER_NET_DMAC_CMDSTAT_TCPCS 0xa00e0000
363#define SPIDER_NET_DMAC_CMDSTAT_UDPCS 0xa00f0000
364#define SPIDER_NET_DESCR_IND_PROC_SHIFT 28
365#define SPIDER_NET_DESCR_IND_PROC_MASKO 0x0fffffff
366
367/* descr ready, descr is in middle of chain, get interrupt on completion */
368#define SPIDER_NET_DMAC_RX_CARDOWNED 0xa0800000
369
aaec0fab
JO		 370enum spider_net_descr_status {
371 SPIDER_NET_DESCR_COMPLETE = 0x00, /* used in rx and tx */
372 SPIDER_NET_DESCR_RESPONSE_ERROR = 0x01, /* used in rx and tx */
373 SPIDER_NET_DESCR_PROTECTION_ERROR = 0x02, /* used in rx and tx */
374 SPIDER_NET_DESCR_FRAME_END = 0x04, /* used in rx */
375 SPIDER_NET_DESCR_FORCE_END = 0x05, /* used in rx and tx */
376 SPIDER_NET_DESCR_CARDOWNED = 0x0a, /* used in rx and tx */
377 SPIDER_NET_DESCR_NOT_IN_USE /* any other value */
378};
379
380struct spider_net_descr {
381 /* as defined by the hardware */
8e0a613b 382 u32 buf_addr;
aaec0fab 383 u32 buf_size;
8e0a613b 384 u32 next_descr_addr;
aaec0fab
JO		 385 u32 dmac_cmd_status;
386 u32 result_size;
387 u32 valid_size; /* all zeroes for tx */
388 u32 data_status;
389 u32 data_error; /* all zeroes for tx */
390
391 /* used in the driver */
392 struct sk_buff *skb;
11f1a52b 393 u32 bus_addr;
aaec0fab
JO		 394 struct spider_net_descr *next;
395 struct spider_net_descr *prev;
396} __attribute__((aligned(32)));
397
398struct spider_net_descr_chain {
399 /* we walk from tail to head */
400 struct spider_net_descr *head;
401 struct spider_net_descr *tail;
402};
403
404/* descriptor data_status bits */
11f1a52b
AB		 405#define SPIDER_NET_RX_IPCHK 29
406#define SPIDER_NET_RX_TCPCHK 28
aaec0fab 407#define SPIDER_NET_VLAN_PACKET 21
11f1a52b
AB		 408#define SPIDER_NET_DATA_STATUS_CKSUM_MASK ( (1 << SPIDER_NET_RX_IPCHK) | \
409 (1 << SPIDER_NET_RX_TCPCHK) )
aaec0fab
JO		 410
411/* descriptor data_error bits */
11f1a52b
AB		 412#define SPIDER_NET_RX_IPCHKERR 27
413#define SPIDER_NET_RX_RXTCPCHKERR 28
414
415#define SPIDER_NET_DATA_ERR_CKSUM_MASK (1 << SPIDER_NET_RX_IPCHKERR)
aaec0fab 416
11f1a52b
AB		 417/* the cases we don't pass the packet to the stack.
418 * 701b8000 would be correct, but every packets gets that flag */
419#define SPIDER_NET_DESTROY_RX_FLAGS 0x700b8000
aaec0fab
JO		 420
421#define SPIDER_NET_DESCR_SIZE 32
422
423/* this will be bigger some time */
424struct spider_net_options {
425 int rx_csum; /* for rx: if 0 ip_summed=NONE,
426 if 1 and hw has verified, ip_summed=UNNECESSARY */
427};
428
429#define SPIDER_NET_DEFAULT_MSG ( NETIF_MSG_DRV | \
430 NETIF_MSG_PROBE | \
431 NETIF_MSG_LINK | \
432 NETIF_MSG_TIMER | \
433 NETIF_MSG_IFDOWN | \
434 NETIF_MSG_IFUP | \
435 NETIF_MSG_RX_ERR | \
436 NETIF_MSG_TX_ERR | \
437 NETIF_MSG_TX_QUEUED | \
438 NETIF_MSG_INTR | \
439 NETIF_MSG_TX_DONE | \
440 NETIF_MSG_RX_STATUS | \
441 NETIF_MSG_PKTDATA | \
442 NETIF_MSG_HW | \
443 NETIF_MSG_WOL )
444
445struct spider_net_card {
446 struct net_device *netdev;
447 struct pci_dev *pdev;
448 struct mii_phy phy;
449
450 void __iomem *regs;
451
452 struct spider_net_descr_chain tx_chain;
453 struct spider_net_descr_chain rx_chain;
11f1a52b
AB		 454 atomic_t rx_chain_refill;
455 atomic_t tx_chain_release;
aaec0fab
JO		 456
457 struct net_device_stats netdev_stats;
458
459 struct spider_net_options options;
460
461 spinlock_t intmask_lock;
11f1a52b
AB		 462 struct tasklet_struct rxram_full_tl;
463 struct timer_list tx_timer;
aaec0fab
JO		 464
465 struct work_struct tx_timeout_task;
466 atomic_t tx_timeout_task_counter;
467 wait_queue_head_t waitq;
468
469 /* for ethtool */
470 int msg_enable;
471
472 struct spider_net_descr descr[0];
473};
474
475#define pr_err(fmt,arg...) \
476 printk(KERN_ERR fmt ,##arg)
477
478#endif
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