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1/*
2 * smc911x.c
3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
4 *
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
d5498bef 7 * and the smsc911x.c reference driver by SMSC
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8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * Arguments:
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
26 *
27 * History:
28 * 04/16/05 Dustin McIntire Initial version
29 */
30static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
32
33/* Debugging options */
34#define ENABLE_SMC_DEBUG_RX 0
35#define ENABLE_SMC_DEBUG_TX 0
36#define ENABLE_SMC_DEBUG_DMA 0
37#define ENABLE_SMC_DEBUG_PKTS 0
38#define ENABLE_SMC_DEBUG_MISC 0
39#define ENABLE_SMC_DEBUG_FUNC 0
40
41#define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42#define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43#define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44#define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45#define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46#define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
47
48#ifndef SMC_DEBUG
49#define SMC_DEBUG ( SMC_DEBUG_RX | \
50 SMC_DEBUG_TX | \
51 SMC_DEBUG_DMA | \
52 SMC_DEBUG_PKTS | \
53 SMC_DEBUG_MISC | \
54 SMC_DEBUG_FUNC \
55 )
56#endif
57
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58#include <linux/init.h>
59#include <linux/module.h>
60#include <linux/kernel.h>
61#include <linux/sched.h>
62#include <linux/slab.h>
63#include <linux/delay.h>
64#include <linux/interrupt.h>
65#include <linux/errno.h>
66#include <linux/ioport.h>
67#include <linux/crc32.h>
68#include <linux/device.h>
69#include <linux/platform_device.h>
70#include <linux/spinlock.h>
71#include <linux/ethtool.h>
72#include <linux/mii.h>
73#include <linux/workqueue.h>
74
75#include <linux/netdevice.h>
76#include <linux/etherdevice.h>
77#include <linux/skbuff.h>
78
79#include <asm/io.h>
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80
81#include "smc911x.h"
82
83/*
84 * Transmit timeout, default 5 seconds.
85 */
86static int watchdog = 5000;
87module_param(watchdog, int, 0400);
88MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
89
90static int tx_fifo_kb=8;
91module_param(tx_fifo_kb, int, 0400);
92MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
93
94MODULE_LICENSE("GPL");
72abb461 95MODULE_ALIAS("platform:smc911x");
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96
97/*
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
101 */
102#define CARDNAME "smc911x"
103
104/*
105 * Use power-down feature of the chip
106 */
107#define POWER_DOWN 1
108
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109#if SMC_DEBUG > 0
110#define DBG(n, args...) \
111 do { \
112 if (SMC_DEBUG & (n)) \
113 printk(args); \
114 } while (0)
115
116#define PRINTK(args...) printk(args)
117#else
118#define DBG(n, args...) do { } while (0)
119#define PRINTK(args...) printk(KERN_DEBUG args)
120#endif
121
122#if SMC_DEBUG_PKTS > 0
123static void PRINT_PKT(u_char *buf, int length)
124{
125 int i;
126 int remainder;
127 int lines;
128
129 lines = length / 16;
130 remainder = length % 16;
131
132 for (i = 0; i < lines ; i ++) {
133 int cur;
134 for (cur = 0; cur < 8; cur++) {
135 u_char a, b;
136 a = *buf++;
137 b = *buf++;
138 printk("%02x%02x ", a, b);
139 }
140 printk("\n");
141 }
142 for (i = 0; i < remainder/2 ; i++) {
143 u_char a, b;
144 a = *buf++;
145 b = *buf++;
146 printk("%02x%02x ", a, b);
147 }
148 printk("\n");
149}
150#else
151#define PRINT_PKT(x...) do { } while (0)
152#endif
153
154
155/* this enables an interrupt in the interrupt mask register */
699559f8 156#define SMC_ENABLE_INT(lp, x) do { \
0a0c72c9 157 unsigned int __mask; \
699559f8 158 __mask = SMC_GET_INT_EN((lp)); \
0a0c72c9 159 __mask |= (x); \
699559f8 160 SMC_SET_INT_EN((lp), __mask); \
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161} while (0)
162
163/* this disables an interrupt from the interrupt mask register */
699559f8 164#define SMC_DISABLE_INT(lp, x) do { \
0a0c72c9 165 unsigned int __mask; \
699559f8 166 __mask = SMC_GET_INT_EN((lp)); \
0a0c72c9 167 __mask &= ~(x); \
699559f8 168 SMC_SET_INT_EN((lp), __mask); \
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169} while (0)
170
171/*
172 * this does a soft reset on the device
173 */
174static void smc911x_reset(struct net_device *dev)
175{
0a0c72c9 176 struct smc911x_local *lp = netdev_priv(dev);
319edafe 177 unsigned int reg, timeout=0, resets=1, irq_cfg;
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178 unsigned long flags;
179
b39d66a8 180 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
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181
182 /* Take out of PM setting first */
699559f8 183 if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
0a0c72c9 184 /* Write to the bytetest will take out of powerdown */
699559f8 185 SMC_SET_BYTE_TEST(lp, 0);
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186 timeout=10;
187 do {
188 udelay(10);
699559f8 189 reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
db2961c5 190 } while (--timeout && !reg);
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191 if (timeout == 0) {
192 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
193 return;
194 }
195 }
196
197 /* Disable all interrupts */
198 spin_lock_irqsave(&lp->lock, flags);
699559f8 199 SMC_SET_INT_EN(lp, 0);
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200 spin_unlock_irqrestore(&lp->lock, flags);
201
202 while (resets--) {
699559f8 203 SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
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204 timeout=10;
205 do {
206 udelay(10);
699559f8 207 reg = SMC_GET_HW_CFG(lp);
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208 /* If chip indicates reset timeout then try again */
209 if (reg & HW_CFG_SRST_TO_) {
210 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
211 resets++;
212 break;
213 }
db2961c5 214 } while (--timeout && (reg & HW_CFG_SRST_));
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215 }
216 if (timeout == 0) {
217 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
218 return;
219 }
220
221 /* make sure EEPROM has finished loading before setting GPIO_CFG */
222 timeout=1000;
699559f8 223 while ( timeout-- && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_)) {
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224 udelay(10);
225 }
226 if (timeout == 0){
227 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
228 return;
229 }
230
231 /* Initialize interrupts */
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MD
232 SMC_SET_INT_EN(lp, 0);
233 SMC_ACK_INT(lp, -1);
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234
235 /* Reset the FIFO level and flow control settings */
699559f8 236 SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
0a0c72c9 237//TODO: Figure out what appropriate pause time is
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238 SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
239 SMC_SET_AFC_CFG(lp, lp->afc_cfg);
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240
241
242 /* Set to LED outputs */
699559f8 243 SMC_SET_GPIO_CFG(lp, 0x70070000);
0a0c72c9 244
d5498bef 245 /*
0a0c72c9 246 * Deassert IRQ for 1*10us for edge type interrupts
d5498bef 247 * and drive IRQ pin push-pull
0a0c72c9 248 */
319edafe
CM
249 irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
250#ifdef SMC_DYNAMIC_BUS_CONFIG
251 if (lp->cfg.irq_polarity)
252 irq_cfg |= INT_CFG_IRQ_POL_;
253#endif
254 SMC_SET_IRQ_CFG(lp, irq_cfg);
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255
256 /* clear anything saved */
257 if (lp->pending_tx_skb != NULL) {
258 dev_kfree_skb (lp->pending_tx_skb);
259 lp->pending_tx_skb = NULL;
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260 dev->stats.tx_errors++;
261 dev->stats.tx_aborted_errors++;
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262 }
263}
264
265/*
266 * Enable Interrupts, Receive, and Transmit
267 */
268static void smc911x_enable(struct net_device *dev)
269{
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270 struct smc911x_local *lp = netdev_priv(dev);
271 unsigned mask, cfg, cr;
272 unsigned long flags;
273
b39d66a8 274 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9 275
b891a902
CM
276 spin_lock_irqsave(&lp->lock, flags);
277
699559f8 278 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
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279
280 /* Enable TX */
699559f8 281 cfg = SMC_GET_HW_CFG(lp);
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282 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
283 cfg |= HW_CFG_SF_;
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284 SMC_SET_HW_CFG(lp, cfg);
285 SMC_SET_FIFO_TDA(lp, 0xFF);
0a0c72c9 286 /* Update TX stats on every 64 packets received or every 1 sec */
699559f8
MD
287 SMC_SET_FIFO_TSL(lp, 64);
288 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
0a0c72c9 289
699559f8 290 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 291 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
699559f8
MD
292 SMC_SET_MAC_CR(lp, cr);
293 SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
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294
295 /* Add 2 byte padding to start of packets */
699559f8 296 SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
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297
298 /* Turn on receiver and enable RX */
299 if (cr & MAC_CR_RXEN_)
300 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
301
699559f8 302 SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
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303
304 /* Interrupt on every received packet */
699559f8
MD
305 SMC_SET_FIFO_RSA(lp, 0x01);
306 SMC_SET_FIFO_RSL(lp, 0x00);
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307
308 /* now, enable interrupts */
d5498bef
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309 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
310 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
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311 INT_EN_PHY_INT_EN_;
312 if (IS_REV_A(lp->revision))
313 mask|=INT_EN_RDFL_EN_;
314 else {
315 mask|=INT_EN_RDFO_EN_;
316 }
699559f8 317 SMC_ENABLE_INT(lp, mask);
b891a902
CM
318
319 spin_unlock_irqrestore(&lp->lock, flags);
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320}
321
322/*
323 * this puts the device in an inactive state
324 */
325static void smc911x_shutdown(struct net_device *dev)
326{
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327 struct smc911x_local *lp = netdev_priv(dev);
328 unsigned cr;
329 unsigned long flags;
330
b39d66a8 331 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __func__);
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332
333 /* Disable IRQ's */
699559f8 334 SMC_SET_INT_EN(lp, 0);
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335
336 /* Turn of Rx and TX */
337 spin_lock_irqsave(&lp->lock, flags);
699559f8 338 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 339 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
699559f8
MD
340 SMC_SET_MAC_CR(lp, cr);
341 SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
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342 spin_unlock_irqrestore(&lp->lock, flags);
343}
344
345static inline void smc911x_drop_pkt(struct net_device *dev)
d5498bef 346{
699559f8 347 struct smc911x_local *lp = netdev_priv(dev);
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348 unsigned int fifo_count, timeout, reg;
349
b39d66a8 350 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __func__);
699559f8 351 fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
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352 if (fifo_count <= 4) {
353 /* Manually dump the packet data */
354 while (fifo_count--)
699559f8 355 SMC_GET_RX_FIFO(lp);
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356 } else {
357 /* Fast forward through the bad packet */
699559f8 358 SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
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359 timeout=50;
360 do {
361 udelay(10);
699559f8 362 reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
db2961c5 363 } while (--timeout && reg);
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364 if (timeout == 0) {
365 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
366 }
367 }
368}
369
370/*
371 * This is the procedure to handle the receipt of a packet.
372 * It should be called after checking for packet presence in
d5498bef 373 * the RX status FIFO. It must be called with the spin lock
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374 * already held.
375 */
376static inline void smc911x_rcv(struct net_device *dev)
377{
699559f8 378 struct smc911x_local *lp = netdev_priv(dev);
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379 unsigned int pkt_len, status;
380 struct sk_buff *skb;
381 unsigned char *data;
382
d5498bef 383 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
b39d66a8 384 dev->name, __func__);
699559f8 385 status = SMC_GET_RX_STS_FIFO(lp);
d5498bef 386 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
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387 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
388 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
d5498bef 389 if (status & RX_STS_ES_) {
0a0c72c9 390 /* Deal with a bad packet */
09f75cd7 391 dev->stats.rx_errors++;
d5498bef 392 if (status & RX_STS_CRC_ERR_)
09f75cd7 393 dev->stats.rx_crc_errors++;
0a0c72c9
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394 else {
395 if (status & RX_STS_LEN_ERR_)
09f75cd7 396 dev->stats.rx_length_errors++;
d5498bef 397 if (status & RX_STS_MCAST_)
09f75cd7 398 dev->stats.multicast++;
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DM
399 }
400 /* Remove the bad packet data from the RX FIFO */
401 smc911x_drop_pkt(dev);
402 } else {
403 /* Receive a valid packet */
404 /* Alloc a buffer with extra room for DMA alignment */
405 skb=dev_alloc_skb(pkt_len+32);
406 if (unlikely(skb == NULL)) {
407 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
408 dev->name);
09f75cd7 409 dev->stats.rx_dropped++;
0a0c72c9
DM
410 smc911x_drop_pkt(dev);
411 return;
412 }
d5498bef 413 /* Align IP header to 32 bits
0a0c72c9 414 * Note that the device is configured to add a 2
d5498bef 415 * byte padding to the packet start, so we really
0a0c72c9
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416 * want to write to the orignal data pointer */
417 data = skb->data;
418 skb_reserve(skb, 2);
419 skb_put(skb,pkt_len-4);
420#ifdef SMC_USE_DMA
421 {
422 unsigned int fifo;
423 /* Lower the FIFO threshold if possible */
699559f8 424 fifo = SMC_GET_FIFO_INT(lp);
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DM
425 if (fifo & 0xFF) fifo--;
426 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
427 dev->name, fifo & 0xff);
699559f8 428 SMC_SET_FIFO_INT(lp, fifo);
0a0c72c9 429 /* Setup RX DMA */
699559f8 430 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
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DM
431 lp->rxdma_active = 1;
432 lp->current_rx_skb = skb;
699559f8 433 SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
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434 /* Packet processing deferred to DMA RX interrupt */
435 }
436#else
699559f8
MD
437 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
438 SMC_PULL_DATA(lp, data, pkt_len+2+3);
0a0c72c9 439
b4cf2058 440 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
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441 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
442 dev->last_rx = jiffies;
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443 skb->protocol = eth_type_trans(skb, dev);
444 netif_rx(skb);
09f75cd7
JG
445 dev->stats.rx_packets++;
446 dev->stats.rx_bytes += pkt_len-4;
0a0c72c9
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447#endif
448 }
449}
450
451/*
452 * This is called to actually send a packet to the chip.
453 */
454static void smc911x_hardware_send_pkt(struct net_device *dev)
455{
456 struct smc911x_local *lp = netdev_priv(dev);
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457 struct sk_buff *skb;
458 unsigned int cmdA, cmdB, len;
459 unsigned char *buf;
0a0c72c9 460
b39d66a8 461 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __func__);
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DM
462 BUG_ON(lp->pending_tx_skb == NULL);
463
464 skb = lp->pending_tx_skb;
465 lp->pending_tx_skb = NULL;
466
d5498bef
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467 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
468 /* cmdB {31:16] pkt tag [10:0] length */
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469#ifdef SMC_USE_DMA
470 /* 16 byte buffer alignment mode */
471 buf = (char*)((u32)(skb->data) & ~0xF);
d5498bef 472 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
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473 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
474 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
475 skb->len;
476#else
477 buf = (char*)((u32)skb->data & ~0x3);
d5498bef 478 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
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479 cmdA = (((u32)skb->data & 0x3) << 16) |
480 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
481 skb->len;
482#endif
d5498bef 483 /* tag is packet length so we can use this in stats update later */
0a0c72c9 484 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
d5498bef 485
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486 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
487 dev->name, len, len, buf, cmdA, cmdB);
699559f8
MD
488 SMC_SET_TX_FIFO(lp, cmdA);
489 SMC_SET_TX_FIFO(lp, cmdB);
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490
491 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
492 PRINT_PKT(buf, len <= 64 ? len : 64);
493
494 /* Send pkt via PIO or DMA */
495#ifdef SMC_USE_DMA
496 lp->current_tx_skb = skb;
699559f8 497 SMC_PUSH_DATA(lp, buf, len);
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498 /* DMA complete IRQ will free buffer and set jiffies */
499#else
699559f8 500 SMC_PUSH_DATA(lp, buf, len);
0a0c72c9 501 dev->trans_start = jiffies;
70d9d158 502 dev_kfree_skb_irq(skb);
0a0c72c9 503#endif
0a0c72c9
DM
504 if (!lp->tx_throttle) {
505 netif_wake_queue(dev);
506 }
699559f8 507 SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
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DM
508}
509
510/*
511 * Since I am not sure if I will have enough room in the chip's ram
512 * to store the packet, I call this routine which either sends it
513 * now, or set the card to generates an interrupt when ready
514 * for the packet.
515 */
516static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
517{
518 struct smc911x_local *lp = netdev_priv(dev);
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519 unsigned int free;
520 unsigned long flags;
521
d5498bef 522 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
b39d66a8 523 dev->name, __func__);
0a0c72c9 524
b891a902
CM
525 spin_lock_irqsave(&lp->lock, flags);
526
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DM
527 BUG_ON(lp->pending_tx_skb != NULL);
528
699559f8 529 free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
0a0c72c9
DM
530 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
531
532 /* Turn off the flow when running out of space in FIFO */
533 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
d5498bef 534 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
0a0c72c9 535 dev->name, free);
0a0c72c9 536 /* Reenable when at least 1 packet of size MTU present */
699559f8 537 SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
0a0c72c9
DM
538 lp->tx_throttle = 1;
539 netif_stop_queue(dev);
0a0c72c9
DM
540 }
541
d5498bef 542 /* Drop packets when we run out of space in TX FIFO
0a0c72c9 543 * Account for overhead required for:
d5498bef
JG
544 *
545 * Tx command words 8 bytes
0a0c72c9
DM
546 * Start offset 15 bytes
547 * End padding 15 bytes
d5498bef 548 */
0a0c72c9 549 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
d5498bef 550 printk("%s: No Tx free space %d < %d\n",
0a0c72c9
DM
551 dev->name, free, skb->len);
552 lp->pending_tx_skb = NULL;
09f75cd7
JG
553 dev->stats.tx_errors++;
554 dev->stats.tx_dropped++;
b891a902 555 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9
DM
556 dev_kfree_skb(skb);
557 return 0;
558 }
d5498bef 559
0a0c72c9
DM
560#ifdef SMC_USE_DMA
561 {
562 /* If the DMA is already running then defer this packet Tx until
d5498bef 563 * the DMA IRQ starts it
0a0c72c9 564 */
0a0c72c9
DM
565 if (lp->txdma_active) {
566 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
567 lp->pending_tx_skb = skb;
568 netif_stop_queue(dev);
569 spin_unlock_irqrestore(&lp->lock, flags);
570 return 0;
571 } else {
572 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
573 lp->txdma_active = 1;
574 }
0a0c72c9
DM
575 }
576#endif
577 lp->pending_tx_skb = skb;
578 smc911x_hardware_send_pkt(dev);
b891a902 579 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9
DM
580
581 return 0;
582}
583
584/*
585 * This handles a TX status interrupt, which is only called when:
586 * - a TX error occurred, or
587 * - TX of a packet completed.
588 */
589static void smc911x_tx(struct net_device *dev)
590{
0a0c72c9
DM
591 struct smc911x_local *lp = netdev_priv(dev);
592 unsigned int tx_status;
593
d5498bef 594 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
b39d66a8 595 dev->name, __func__);
0a0c72c9
DM
596
597 /* Collect the TX status */
699559f8 598 while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
d5498bef
JG
599 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
600 dev->name,
699559f8
MD
601 (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
602 tx_status = SMC_GET_TX_STS_FIFO(lp);
09f75cd7
JG
603 dev->stats.tx_packets++;
604 dev->stats.tx_bytes+=tx_status>>16;
d5498bef
JG
605 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
606 dev->name, (tx_status & 0xffff0000) >> 16,
0a0c72c9 607 tx_status & 0x0000ffff);
d5498bef 608 /* count Tx errors, but ignore lost carrier errors when in
0a0c72c9 609 * full-duplex mode */
d5498bef 610 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
0a0c72c9 611 !(tx_status & 0x00000306))) {
09f75cd7 612 dev->stats.tx_errors++;
0a0c72c9
DM
613 }
614 if (tx_status & TX_STS_MANY_COLL_) {
09f75cd7
JG
615 dev->stats.collisions+=16;
616 dev->stats.tx_aborted_errors++;
0a0c72c9 617 } else {
09f75cd7 618 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
0a0c72c9
DM
619 }
620 /* carrier error only has meaning for half-duplex communication */
d5498bef 621 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
0a0c72c9 622 !lp->ctl_rfduplx) {
09f75cd7 623 dev->stats.tx_carrier_errors++;
d5498bef 624 }
0a0c72c9 625 if (tx_status & TX_STS_LATE_COLL_) {
09f75cd7
JG
626 dev->stats.collisions++;
627 dev->stats.tx_aborted_errors++;
0a0c72c9
DM
628 }
629 }
630}
631
632
633/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
634/*
635 * Reads a register from the MII Management serial interface
636 */
637
638static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
639{
699559f8 640 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
641 unsigned int phydata;
642
699559f8 643 SMC_GET_MII(lp, phyreg, phyaddr, phydata);
0a0c72c9
DM
644
645 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
b39d66a8 646 __func__, phyaddr, phyreg, phydata);
0a0c72c9
DM
647 return phydata;
648}
649
650
651/*
652 * Writes a register to the MII Management serial interface
653 */
654static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
655 int phydata)
656{
699559f8 657 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
658
659 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
b39d66a8 660 __func__, phyaddr, phyreg, phydata);
0a0c72c9 661
699559f8 662 SMC_SET_MII(lp, phyreg, phyaddr, phydata);
0a0c72c9
DM
663}
664
665/*
666 * Finds and reports the PHY address (115 and 117 have external
667 * PHY interface 118 has internal only
668 */
669static void smc911x_phy_detect(struct net_device *dev)
670{
0a0c72c9
DM
671 struct smc911x_local *lp = netdev_priv(dev);
672 int phyaddr;
673 unsigned int cfg, id1, id2;
674
b39d66a8 675 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
676
677 lp->phy_type = 0;
678
679 /*
680 * Scan all 32 PHY addresses if necessary, starting at
681 * PHY#1 to PHY#31, and then PHY#0 last.
682 */
683 switch(lp->version) {
c6dcb827
GL
684 case CHIP_9115:
685 case CHIP_9117:
686 case CHIP_9215:
687 case CHIP_9217:
699559f8 688 cfg = SMC_GET_HW_CFG(lp);
0a0c72c9
DM
689 if (cfg & HW_CFG_EXT_PHY_DET_) {
690 cfg &= ~HW_CFG_PHY_CLK_SEL_;
691 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
699559f8 692 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
693 udelay(10); /* Wait for clocks to stop */
694
695 cfg |= HW_CFG_EXT_PHY_EN_;
699559f8 696 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
697 udelay(10); /* Wait for clocks to stop */
698
699 cfg &= ~HW_CFG_PHY_CLK_SEL_;
700 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
699559f8 701 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
702 udelay(10); /* Wait for clocks to stop */
703
704 cfg |= HW_CFG_SMI_SEL_;
699559f8 705 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
706
707 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
708
709 /* Read the PHY identifiers */
699559f8
MD
710 SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
711 SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
0a0c72c9
DM
712
713 /* Make sure it is a valid identifier */
d5498bef
JG
714 if (id1 != 0x0000 && id1 != 0xffff &&
715 id1 != 0x8000 && id2 != 0x0000 &&
0a0c72c9
DM
716 id2 != 0xffff && id2 != 0x8000) {
717 /* Save the PHY's address */
718 lp->mii.phy_id = phyaddr & 31;
719 lp->phy_type = id1 << 16 | id2;
720 break;
721 }
722 }
f3073ac7
GL
723 if (phyaddr < 32)
724 /* Found an external PHY */
725 break;
0a0c72c9
DM
726 }
727 default:
728 /* Internal media only */
699559f8
MD
729 SMC_GET_PHY_ID1(lp, 1, id1);
730 SMC_GET_PHY_ID2(lp, 1, id2);
0a0c72c9
DM
731 /* Save the PHY's address */
732 lp->mii.phy_id = 1;
733 lp->phy_type = id1 << 16 | id2;
734 }
735
736 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
737 dev->name, id1, id2, lp->mii.phy_id);
738}
739
740/*
741 * Sets the PHY to a configuration as determined by the user.
742 * Called with spin_lock held.
743 */
744static int smc911x_phy_fixed(struct net_device *dev)
745{
746 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
747 int phyaddr = lp->mii.phy_id;
748 int bmcr;
749
b39d66a8 750 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
751
752 /* Enter Link Disable state */
699559f8 753 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9 754 bmcr |= BMCR_PDOWN;
699559f8 755 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9
DM
756
757 /*
758 * Set our fixed capabilities
759 * Disable auto-negotiation
760 */
761 bmcr &= ~BMCR_ANENABLE;
762 if (lp->ctl_rfduplx)
763 bmcr |= BMCR_FULLDPLX;
764
765 if (lp->ctl_rspeed == 100)
766 bmcr |= BMCR_SPEED100;
767
768 /* Write our capabilities to the phy control register */
699559f8 769 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9
DM
770
771 /* Re-Configure the Receive/Phy Control register */
772 bmcr &= ~BMCR_PDOWN;
699559f8 773 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9
DM
774
775 return 1;
776}
777
778/*
779 * smc911x_phy_reset - reset the phy
780 * @dev: net device
781 * @phy: phy address
782 *
783 * Issue a software reset for the specified PHY and
784 * wait up to 100ms for the reset to complete. We should
785 * not access the PHY for 50ms after issuing the reset.
786 *
787 * The time to wait appears to be dependent on the PHY.
788 *
789 */
790static int smc911x_phy_reset(struct net_device *dev, int phy)
791{
792 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
793 int timeout;
794 unsigned long flags;
795 unsigned int reg;
796
b39d66a8 797 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
0a0c72c9
DM
798
799 spin_lock_irqsave(&lp->lock, flags);
699559f8 800 reg = SMC_GET_PMT_CTRL(lp);
0a0c72c9
DM
801 reg &= ~0xfffff030;
802 reg |= PMT_CTRL_PHY_RST_;
699559f8 803 SMC_SET_PMT_CTRL(lp, reg);
0a0c72c9
DM
804 spin_unlock_irqrestore(&lp->lock, flags);
805 for (timeout = 2; timeout; timeout--) {
806 msleep(50);
807 spin_lock_irqsave(&lp->lock, flags);
699559f8 808 reg = SMC_GET_PMT_CTRL(lp);
0a0c72c9
DM
809 spin_unlock_irqrestore(&lp->lock, flags);
810 if (!(reg & PMT_CTRL_PHY_RST_)) {
d5498bef 811 /* extra delay required because the phy may
0a0c72c9 812 * not be completed with its reset
d5498bef 813 * when PHY_BCR_RESET_ is cleared. 256us
0a0c72c9
DM
814 * should suffice, but use 500us to be safe
815 */
816 udelay(500);
817 break;
818 }
819 }
820
821 return reg & PMT_CTRL_PHY_RST_;
822}
823
824/*
825 * smc911x_phy_powerdown - powerdown phy
826 * @dev: net device
827 * @phy: phy address
828 *
829 * Power down the specified PHY
830 */
831static void smc911x_phy_powerdown(struct net_device *dev, int phy)
832{
699559f8 833 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
834 unsigned int bmcr;
835
836 /* Enter Link Disable state */
699559f8 837 SMC_GET_PHY_BMCR(lp, phy, bmcr);
0a0c72c9 838 bmcr |= BMCR_PDOWN;
699559f8 839 SMC_SET_PHY_BMCR(lp, phy, bmcr);
0a0c72c9
DM
840}
841
842/*
843 * smc911x_phy_check_media - check the media status and adjust BMCR
844 * @dev: net device
845 * @init: set true for initialisation
846 *
847 * Select duplex mode depending on negotiation state. This
848 * also updates our carrier state.
849 */
850static void smc911x_phy_check_media(struct net_device *dev, int init)
851{
852 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
853 int phyaddr = lp->mii.phy_id;
854 unsigned int bmcr, cr;
855
b39d66a8 856 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
857
858 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
859 /* duplex state has changed */
699559f8
MD
860 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
861 SMC_GET_MAC_CR(lp, cr);
0a0c72c9
DM
862 if (lp->mii.full_duplex) {
863 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
864 bmcr |= BMCR_FULLDPLX;
865 cr |= MAC_CR_RCVOWN_;
866 } else {
867 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
868 bmcr &= ~BMCR_FULLDPLX;
869 cr &= ~MAC_CR_RCVOWN_;
870 }
699559f8
MD
871 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
872 SMC_SET_MAC_CR(lp, cr);
0a0c72c9
DM
873 }
874}
875
876/*
877 * Configures the specified PHY through the MII management interface
878 * using Autonegotiation.
879 * Calls smc911x_phy_fixed() if the user has requested a certain config.
880 * If RPC ANEG bit is set, the media selection is dependent purely on
881 * the selection by the MII (either in the MII BMCR reg or the result
882 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
883 * is controlled by the RPC SPEED and RPC DPLX bits.
884 */
ef8142a5 885static void smc911x_phy_configure(struct work_struct *work)
0a0c72c9 886{
ef8142a5
AM
887 struct smc911x_local *lp = container_of(work, struct smc911x_local,
888 phy_configure);
889 struct net_device *dev = lp->netdev;
0a0c72c9
DM
890 int phyaddr = lp->mii.phy_id;
891 int my_phy_caps; /* My PHY capabilities */
892 int my_ad_caps; /* My Advertised capabilities */
893 int status;
894 unsigned long flags;
895
b39d66a8 896 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
0a0c72c9
DM
897
898 /*
899 * We should not be called if phy_type is zero.
900 */
901 if (lp->phy_type == 0)
4bb073c0 902 return;
0a0c72c9
DM
903
904 if (smc911x_phy_reset(dev, phyaddr)) {
905 printk("%s: PHY reset timed out\n", dev->name);
4bb073c0 906 return;
0a0c72c9
DM
907 }
908 spin_lock_irqsave(&lp->lock, flags);
909
910 /*
911 * Enable PHY Interrupts (for register 18)
912 * Interrupts listed here are enabled
913 */
699559f8 914 SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
0a0c72c9
DM
915 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
916 PHY_INT_MASK_LINK_DOWN_);
917
918 /* If the user requested no auto neg, then go set his request */
919 if (lp->mii.force_media) {
920 smc911x_phy_fixed(dev);
921 goto smc911x_phy_configure_exit;
922 }
923
924 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
699559f8 925 SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
0a0c72c9
DM
926 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
927 printk(KERN_INFO "Auto negotiation NOT supported\n");
928 smc911x_phy_fixed(dev);
929 goto smc911x_phy_configure_exit;
930 }
931
932 /* CSMA capable w/ both pauses */
933 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
934
935 if (my_phy_caps & BMSR_100BASE4)
936 my_ad_caps |= ADVERTISE_100BASE4;
937 if (my_phy_caps & BMSR_100FULL)
938 my_ad_caps |= ADVERTISE_100FULL;
939 if (my_phy_caps & BMSR_100HALF)
940 my_ad_caps |= ADVERTISE_100HALF;
941 if (my_phy_caps & BMSR_10FULL)
942 my_ad_caps |= ADVERTISE_10FULL;
943 if (my_phy_caps & BMSR_10HALF)
944 my_ad_caps |= ADVERTISE_10HALF;
945
946 /* Disable capabilities not selected by our user */
947 if (lp->ctl_rspeed != 100)
948 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
949
950 if (!lp->ctl_rfduplx)
951 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
952
953 /* Update our Auto-Neg Advertisement Register */
699559f8 954 SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
0a0c72c9
DM
955 lp->mii.advertising = my_ad_caps;
956
957 /*
958 * Read the register back. Without this, it appears that when
959 * auto-negotiation is restarted, sometimes it isn't ready and
960 * the link does not come up.
961 */
962 udelay(10);
699559f8 963 SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
0a0c72c9
DM
964
965 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
966 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
967
968 /* Restart auto-negotiation process in order to advertise my caps */
699559f8 969 SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
0a0c72c9
DM
970
971 smc911x_phy_check_media(dev, 1);
972
973smc911x_phy_configure_exit:
974 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9
DM
975}
976
977/*
978 * smc911x_phy_interrupt
979 *
980 * Purpose: Handle interrupts relating to PHY register 18. This is
981 * called from the "hard" interrupt handler under our private spinlock.
982 */
983static void smc911x_phy_interrupt(struct net_device *dev)
984{
985 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
986 int phyaddr = lp->mii.phy_id;
987 int status;
988
b39d66a8 989 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
990
991 if (lp->phy_type == 0)
992 return;
993
994 smc911x_phy_check_media(dev, 0);
995 /* read to clear status bits */
699559f8 996 SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
d5498bef 997 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
0a0c72c9 998 dev->name, status & 0xffff);
d5498bef 999 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
699559f8 1000 dev->name, SMC_GET_AFC_CFG(lp));
0a0c72c9
DM
1001}
1002
1003/*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1004
1005/*
1006 * This is the main routine of the driver, to handle the device when
1007 * it needs some attention.
1008 */
7d12e780 1009static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
0a0c72c9
DM
1010{
1011 struct net_device *dev = dev_id;
0a0c72c9
DM
1012 struct smc911x_local *lp = netdev_priv(dev);
1013 unsigned int status, mask, timeout;
1014 unsigned int rx_overrun=0, cr, pkts;
1015 unsigned long flags;
1016
b39d66a8 1017 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1018
1019 spin_lock_irqsave(&lp->lock, flags);
1020
1021 /* Spurious interrupt check */
699559f8 1022 if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
0a0c72c9 1023 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
a4d09272 1024 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9
DM
1025 return IRQ_NONE;
1026 }
1027
699559f8
MD
1028 mask = SMC_GET_INT_EN(lp);
1029 SMC_SET_INT_EN(lp, 0);
0a0c72c9
DM
1030
1031 /* set a timeout value, so I don't stay here forever */
1032 timeout = 8;
1033
1034
1035 do {
699559f8 1036 status = SMC_GET_INT(lp);
0a0c72c9
DM
1037
1038 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1039 dev->name, status, mask, status & ~mask);
1040
1041 status &= mask;
1042 if (!status)
1043 break;
1044
1045 /* Handle SW interrupt condition */
1046 if (status & INT_STS_SW_INT_) {
699559f8 1047 SMC_ACK_INT(lp, INT_STS_SW_INT_);
0a0c72c9
DM
1048 mask &= ~INT_EN_SW_INT_EN_;
1049 }
1050 /* Handle various error conditions */
1051 if (status & INT_STS_RXE_) {
699559f8 1052 SMC_ACK_INT(lp, INT_STS_RXE_);
09f75cd7 1053 dev->stats.rx_errors++;
d5498bef 1054 }
0a0c72c9 1055 if (status & INT_STS_RXDFH_INT_) {
699559f8
MD
1056 SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
1057 dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
0a0c72c9
DM
1058 }
1059 /* Undocumented interrupt-what is the right thing to do here? */
1060 if (status & INT_STS_RXDF_INT_) {
699559f8 1061 SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
0a0c72c9
DM
1062 }
1063
1064 /* Rx Data FIFO exceeds set level */
1065 if (status & INT_STS_RDFL_) {
1066 if (IS_REV_A(lp->revision)) {
1067 rx_overrun=1;
699559f8 1068 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 1069 cr &= ~MAC_CR_RXEN_;
699559f8 1070 SMC_SET_MAC_CR(lp, cr);
0a0c72c9 1071 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
09f75cd7
JG
1072 dev->stats.rx_errors++;
1073 dev->stats.rx_fifo_errors++;
0a0c72c9 1074 }
699559f8 1075 SMC_ACK_INT(lp, INT_STS_RDFL_);
0a0c72c9
DM
1076 }
1077 if (status & INT_STS_RDFO_) {
1078 if (!IS_REV_A(lp->revision)) {
699559f8 1079 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 1080 cr &= ~MAC_CR_RXEN_;
699559f8 1081 SMC_SET_MAC_CR(lp, cr);
0a0c72c9
DM
1082 rx_overrun=1;
1083 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
09f75cd7
JG
1084 dev->stats.rx_errors++;
1085 dev->stats.rx_fifo_errors++;
0a0c72c9 1086 }
699559f8 1087 SMC_ACK_INT(lp, INT_STS_RDFO_);
0a0c72c9
DM
1088 }
1089 /* Handle receive condition */
1090 if ((status & INT_STS_RSFL_) || rx_overrun) {
1091 unsigned int fifo;
1092 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
699559f8 1093 fifo = SMC_GET_RX_FIFO_INF(lp);
d5498bef
JG
1094 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1095 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
0a0c72c9
DM
1096 dev->name, pkts, fifo & 0xFFFF );
1097 if (pkts != 0) {
1098#ifdef SMC_USE_DMA
1099 unsigned int fifo;
1100 if (lp->rxdma_active){
d5498bef 1101 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
0a0c72c9
DM
1102 "%s: RX DMA active\n", dev->name);
1103 /* The DMA is already running so up the IRQ threshold */
699559f8 1104 fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
0a0c72c9 1105 fifo |= pkts & 0xFF;
d5498bef 1106 DBG(SMC_DEBUG_RX,
0a0c72c9
DM
1107 "%s: Setting RX stat FIFO threshold to %d\n",
1108 dev->name, fifo & 0xff);
699559f8 1109 SMC_SET_FIFO_INT(lp, fifo);
0a0c72c9
DM
1110 } else
1111#endif
1112 smc911x_rcv(dev);
1113 }
699559f8 1114 SMC_ACK_INT(lp, INT_STS_RSFL_);
0a0c72c9
DM
1115 }
1116 /* Handle transmit FIFO available */
1117 if (status & INT_STS_TDFA_) {
1118 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
699559f8 1119 SMC_SET_FIFO_TDA(lp, 0xFF);
0a0c72c9
DM
1120 lp->tx_throttle = 0;
1121#ifdef SMC_USE_DMA
1122 if (!lp->txdma_active)
1123#endif
1124 netif_wake_queue(dev);
699559f8 1125 SMC_ACK_INT(lp, INT_STS_TDFA_);
0a0c72c9
DM
1126 }
1127 /* Handle transmit done condition */
1128#if 1
1129 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
d5498bef
JG
1130 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1131 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
699559f8 1132 dev->name, (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
0a0c72c9 1133 smc911x_tx(dev);
699559f8
MD
1134 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1135 SMC_ACK_INT(lp, INT_STS_TSFL_);
1136 SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
0a0c72c9
DM
1137 }
1138#else
1139 if (status & INT_STS_TSFL_) {
1140 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
1141 smc911x_tx(dev);
699559f8 1142 SMC_ACK_INT(lp, INT_STS_TSFL_);
0a0c72c9
DM
1143 }
1144
1145 if (status & INT_STS_GPT_INT_) {
d5498bef
JG
1146 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1147 dev->name,
699559f8
MD
1148 SMC_GET_IRQ_CFG(lp),
1149 SMC_GET_FIFO_INT(lp),
1150 SMC_GET_RX_CFG(lp));
0a0c72c9
DM
1151 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1152 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
d5498bef 1153 dev->name,
699559f8
MD
1154 (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
1155 SMC_GET_RX_FIFO_INF(lp) & 0xffff,
1156 SMC_GET_RX_STS_FIFO_PEEK(lp));
1157 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1158 SMC_ACK_INT(lp, INT_STS_GPT_INT_);
0a0c72c9
DM
1159 }
1160#endif
1161
3a4fa0a2 1162 /* Handle PHY interrupt condition */
0a0c72c9
DM
1163 if (status & INT_STS_PHY_INT_) {
1164 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1165 smc911x_phy_interrupt(dev);
699559f8 1166 SMC_ACK_INT(lp, INT_STS_PHY_INT_);
0a0c72c9
DM
1167 }
1168 } while (--timeout);
1169
1170 /* restore mask state */
699559f8 1171 SMC_SET_INT_EN(lp, mask);
0a0c72c9 1172
d5498bef 1173 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
0a0c72c9
DM
1174 dev->name, 8-timeout);
1175
1176 spin_unlock_irqrestore(&lp->lock, flags);
1177
0a0c72c9
DM
1178 return IRQ_HANDLED;
1179}
1180
1181#ifdef SMC_USE_DMA
1182static void
7d12e780 1183smc911x_tx_dma_irq(int dma, void *data)
0a0c72c9
DM
1184{
1185 struct net_device *dev = (struct net_device *)data;
1186 struct smc911x_local *lp = netdev_priv(dev);
1187 struct sk_buff *skb = lp->current_tx_skb;
1188 unsigned long flags;
1189
b39d66a8 1190 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1191
1192 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1193 /* Clear the DMA interrupt sources */
1194 SMC_DMA_ACK_IRQ(dev, dma);
1195 BUG_ON(skb == NULL);
1196 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1197 dev->trans_start = jiffies;
1198 dev_kfree_skb_irq(skb);
1199 lp->current_tx_skb = NULL;
1200 if (lp->pending_tx_skb != NULL)
1201 smc911x_hardware_send_pkt(dev);
1202 else {
d5498bef 1203 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
0a0c72c9
DM
1204 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1205 spin_lock_irqsave(&lp->lock, flags);
1206 lp->txdma_active = 0;
1207 if (!lp->tx_throttle) {
1208 netif_wake_queue(dev);
1209 }
1210 spin_unlock_irqrestore(&lp->lock, flags);
1211 }
1212
d5498bef 1213 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
0a0c72c9
DM
1214 "%s: TX DMA irq completed\n", dev->name);
1215}
1216static void
7d12e780 1217smc911x_rx_dma_irq(int dma, void *data)
0a0c72c9
DM
1218{
1219 struct net_device *dev = (struct net_device *)data;
1220 unsigned long ioaddr = dev->base_addr;
1221 struct smc911x_local *lp = netdev_priv(dev);
1222 struct sk_buff *skb = lp->current_rx_skb;
1223 unsigned long flags;
1224 unsigned int pkts;
1225
b39d66a8 1226 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1227 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1228 /* Clear the DMA interrupt sources */
1229 SMC_DMA_ACK_IRQ(dev, dma);
1230 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1231 BUG_ON(skb == NULL);
1232 lp->current_rx_skb = NULL;
1233 PRINT_PKT(skb->data, skb->len);
1234 dev->last_rx = jiffies;
0a0c72c9 1235 skb->protocol = eth_type_trans(skb, dev);
09f75cd7
JG
1236 dev->stats.rx_packets++;
1237 dev->stats.rx_bytes += skb->len;
d30f53ae 1238 netif_rx(skb);
0a0c72c9
DM
1239
1240 spin_lock_irqsave(&lp->lock, flags);
d766a4ed 1241 pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
0a0c72c9
DM
1242 if (pkts != 0) {
1243 smc911x_rcv(dev);
1244 }else {
1245 lp->rxdma_active = 0;
1246 }
1247 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef
JG
1248 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1249 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
0a0c72c9
DM
1250 dev->name, pkts);
1251}
1252#endif /* SMC_USE_DMA */
1253
1254#ifdef CONFIG_NET_POLL_CONTROLLER
1255/*
1256 * Polling receive - used by netconsole and other diagnostic tools
1257 * to allow network i/o with interrupts disabled.
1258 */
1259static void smc911x_poll_controller(struct net_device *dev)
1260{
1261 disable_irq(dev->irq);
9b6d2efe 1262 smc911x_interrupt(dev->irq, dev);
0a0c72c9
DM
1263 enable_irq(dev->irq);
1264}
1265#endif
1266
1267/* Our watchdog timed out. Called by the networking layer */
1268static void smc911x_timeout(struct net_device *dev)
1269{
1270 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1271 int status, mask;
1272 unsigned long flags;
1273
b39d66a8 1274 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1275
1276 spin_lock_irqsave(&lp->lock, flags);
699559f8
MD
1277 status = SMC_GET_INT(lp);
1278 mask = SMC_GET_INT_EN(lp);
0a0c72c9
DM
1279 spin_unlock_irqrestore(&lp->lock, flags);
1280 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
1281 dev->name, status, mask);
1282
1283 /* Dump the current TX FIFO contents and restart */
699559f8
MD
1284 mask = SMC_GET_TX_CFG(lp);
1285 SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
0a0c72c9
DM
1286 /*
1287 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1288 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1289 * which calls schedule(). Hence we use a work queue.
1290 */
4bb073c0
DM
1291 if (lp->phy_type != 0)
1292 schedule_work(&lp->phy_configure);
0a0c72c9
DM
1293
1294 /* We can accept TX packets again */
1295 dev->trans_start = jiffies;
1296 netif_wake_queue(dev);
1297}
1298
1299/*
1300 * This routine will, depending on the values passed to it,
1301 * either make it accept multicast packets, go into
1302 * promiscuous mode (for TCPDUMP and cousins) or accept
1303 * a select set of multicast packets
1304 */
1305static void smc911x_set_multicast_list(struct net_device *dev)
1306{
1307 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1308 unsigned int multicast_table[2];
1309 unsigned int mcr, update_multicast = 0;
1310 unsigned long flags;
0a0c72c9 1311
b39d66a8 1312 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1313
1314 spin_lock_irqsave(&lp->lock, flags);
699559f8 1315 SMC_GET_MAC_CR(lp, mcr);
0a0c72c9
DM
1316 spin_unlock_irqrestore(&lp->lock, flags);
1317
1318 if (dev->flags & IFF_PROMISC) {
1319
1320 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1321 mcr |= MAC_CR_PRMS_;
1322 }
1323 /*
1324 * Here, I am setting this to accept all multicast packets.
1325 * I don't need to zero the multicast table, because the flag is
1326 * checked before the table is
1327 */
1328 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1329 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1330 mcr |= MAC_CR_MCPAS_;
1331 }
1332
1333 /*
1334 * This sets the internal hardware table to filter out unwanted
1335 * multicast packets before they take up memory.
1336 *
1337 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1338 * address are the offset into the table. If that bit is 1, then the
1339 * multicast packet is accepted. Otherwise, it's dropped silently.
1340 *
1341 * To use the 6 bits as an offset into the table, the high 1 bit is
1342 * the number of the 32 bit register, while the low 5 bits are the bit
1343 * within that register.
1344 */
1345 else if (dev->mc_count) {
1346 int i;
1347 struct dev_mc_list *cur_addr;
1348
1349 /* Set the Hash perfec mode */
1350 mcr |= MAC_CR_HPFILT_;
1351
1352 /* start with a table of all zeros: reject all */
1353 memset(multicast_table, 0, sizeof(multicast_table));
1354
1355 cur_addr = dev->mc_list;
1356 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
7b31f7ff 1357 u32 position;
0a0c72c9
DM
1358
1359 /* do we have a pointer here? */
1360 if (!cur_addr)
1361 break;
1362 /* make sure this is a multicast address -
1363 shouldn't this be a given if we have it here ? */
1364 if (!(*cur_addr->dmi_addr & 1))
1365 continue;
1366
7b31f7ff
PK
1367 /* upper 6 bits are used as hash index */
1368 position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26;
0a0c72c9 1369
7b31f7ff 1370 multicast_table[position>>5] |= 1 << (position&0x1f);
0a0c72c9
DM
1371 }
1372
1373 /* be sure I get rid of flags I might have set */
1374 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1375
1376 /* now, the table can be loaded into the chipset */
1377 update_multicast = 1;
1378 } else {
d5498bef 1379 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
0a0c72c9
DM
1380 dev->name);
1381 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1382
1383 /*
1384 * since I'm disabling all multicast entirely, I need to
1385 * clear the multicast list
1386 */
1387 memset(multicast_table, 0, sizeof(multicast_table));
1388 update_multicast = 1;
1389 }
1390
1391 spin_lock_irqsave(&lp->lock, flags);
699559f8 1392 SMC_SET_MAC_CR(lp, mcr);
0a0c72c9 1393 if (update_multicast) {
d5498bef
JG
1394 DBG(SMC_DEBUG_MISC,
1395 "%s: update mcast hash table 0x%08x 0x%08x\n",
0a0c72c9 1396 dev->name, multicast_table[0], multicast_table[1]);
699559f8
MD
1397 SMC_SET_HASHL(lp, multicast_table[0]);
1398 SMC_SET_HASHH(lp, multicast_table[1]);
0a0c72c9
DM
1399 }
1400 spin_unlock_irqrestore(&lp->lock, flags);
1401}
1402
1403
1404/*
1405 * Open and Initialize the board
1406 *
1407 * Set up everything, reset the card, etc..
1408 */
1409static int
1410smc911x_open(struct net_device *dev)
1411{
ef8142a5
AM
1412 struct smc911x_local *lp = netdev_priv(dev);
1413
b39d66a8 1414 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1415
1416 /*
1417 * Check that the address is valid. If its not, refuse
1418 * to bring the device up. The user must specify an
1419 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1420 */
1421 if (!is_valid_ether_addr(dev->dev_addr)) {
b39d66a8 1422 PRINTK("%s: no valid ethernet hw addr\n", __func__);
0a0c72c9
DM
1423 return -EINVAL;
1424 }
1425
1426 /* reset the hardware */
1427 smc911x_reset(dev);
1428
1429 /* Configure the PHY, initialize the link state */
ef8142a5 1430 smc911x_phy_configure(&lp->phy_configure);
0a0c72c9
DM
1431
1432 /* Turn on Tx + Rx */
1433 smc911x_enable(dev);
1434
1435 netif_start_queue(dev);
1436
1437 return 0;
1438}
1439
1440/*
1441 * smc911x_close
1442 *
1443 * this makes the board clean up everything that it can
1444 * and not talk to the outside world. Caused by
1445 * an 'ifconfig ethX down'
1446 */
1447static int smc911x_close(struct net_device *dev)
1448{
1449 struct smc911x_local *lp = netdev_priv(dev);
1450
b39d66a8 1451 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1452
1453 netif_stop_queue(dev);
1454 netif_carrier_off(dev);
1455
1456 /* clear everything */
1457 smc911x_shutdown(dev);
1458
1459 if (lp->phy_type != 0) {
1460 /* We need to ensure that no calls to
1461 * smc911x_phy_configure are pending.
0a0c72c9 1462 */
4bb073c0 1463 cancel_work_sync(&lp->phy_configure);
0a0c72c9
DM
1464 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1465 }
1466
1467 if (lp->pending_tx_skb) {
1468 dev_kfree_skb(lp->pending_tx_skb);
1469 lp->pending_tx_skb = NULL;
1470 }
1471
1472 return 0;
1473}
1474
0a0c72c9
DM
1475/*
1476 * Ethtool support
1477 */
1478static int
1479smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1480{
1481 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1482 int ret, status;
1483 unsigned long flags;
1484
b39d66a8 1485 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1486 cmd->maxtxpkt = 1;
1487 cmd->maxrxpkt = 1;
1488
1489 if (lp->phy_type != 0) {
1490 spin_lock_irqsave(&lp->lock, flags);
1491 ret = mii_ethtool_gset(&lp->mii, cmd);
1492 spin_unlock_irqrestore(&lp->lock, flags);
1493 } else {
1494 cmd->supported = SUPPORTED_10baseT_Half |
1495 SUPPORTED_10baseT_Full |
1496 SUPPORTED_TP | SUPPORTED_AUI;
1497
1498 if (lp->ctl_rspeed == 10)
1499 cmd->speed = SPEED_10;
1500 else if (lp->ctl_rspeed == 100)
1501 cmd->speed = SPEED_100;
1502
1503 cmd->autoneg = AUTONEG_DISABLE;
1504 if (lp->mii.phy_id==1)
1505 cmd->transceiver = XCVR_INTERNAL;
1506 else
1507 cmd->transceiver = XCVR_EXTERNAL;
1508 cmd->port = 0;
699559f8 1509 SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
d5498bef
JG
1510 cmd->duplex =
1511 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
0a0c72c9
DM
1512 DUPLEX_FULL : DUPLEX_HALF;
1513 ret = 0;
1514 }
1515
1516 return ret;
1517}
1518
1519static int
1520smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1521{
1522 struct smc911x_local *lp = netdev_priv(dev);
1523 int ret;
1524 unsigned long flags;
1525
1526 if (lp->phy_type != 0) {
1527 spin_lock_irqsave(&lp->lock, flags);
1528 ret = mii_ethtool_sset(&lp->mii, cmd);
1529 spin_unlock_irqrestore(&lp->lock, flags);
1530 } else {
1531 if (cmd->autoneg != AUTONEG_DISABLE ||
1532 cmd->speed != SPEED_10 ||
1533 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1534 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1535 return -EINVAL;
1536
1537 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1538
1539 ret = 0;
1540 }
1541
1542 return ret;
1543}
1544
1545static void
1546smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1547{
1548 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1549 strncpy(info->version, version, sizeof(info->version));
43cb76d9 1550 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
0a0c72c9
DM
1551}
1552
1553static int smc911x_ethtool_nwayreset(struct net_device *dev)
1554{
1555 struct smc911x_local *lp = netdev_priv(dev);
1556 int ret = -EINVAL;
1557 unsigned long flags;
1558
1559 if (lp->phy_type != 0) {
1560 spin_lock_irqsave(&lp->lock, flags);
1561 ret = mii_nway_restart(&lp->mii);
1562 spin_unlock_irqrestore(&lp->lock, flags);
1563 }
1564
1565 return ret;
1566}
1567
1568static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1569{
1570 struct smc911x_local *lp = netdev_priv(dev);
1571 return lp->msg_enable;
1572}
1573
1574static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1575{
1576 struct smc911x_local *lp = netdev_priv(dev);
1577 lp->msg_enable = level;
1578}
1579
1580static int smc911x_ethtool_getregslen(struct net_device *dev)
1581{
1582 /* System regs + MAC regs + PHY regs */
d5498bef
JG
1583 return (((E2P_CMD - ID_REV)/4 + 1) +
1584 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
0a0c72c9
DM
1585}
1586
d5498bef 1587static void smc911x_ethtool_getregs(struct net_device *dev,
0a0c72c9
DM
1588 struct ethtool_regs* regs, void *buf)
1589{
0a0c72c9
DM
1590 struct smc911x_local *lp = netdev_priv(dev);
1591 unsigned long flags;
1592 u32 reg,i,j=0;
1593 u32 *data = (u32*)buf;
1594
1595 regs->version = lp->version;
1596 for(i=ID_REV;i<=E2P_CMD;i+=4) {
699559f8 1597 data[j++] = SMC_inl(lp, i);
0a0c72c9
DM
1598 }
1599 for(i=MAC_CR;i<=WUCSR;i++) {
1600 spin_lock_irqsave(&lp->lock, flags);
699559f8 1601 SMC_GET_MAC_CSR(lp, i, reg);
0a0c72c9 1602 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef 1603 data[j++] = reg;
0a0c72c9
DM
1604 }
1605 for(i=0;i<=31;i++) {
1606 spin_lock_irqsave(&lp->lock, flags);
699559f8 1607 SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
0a0c72c9 1608 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef 1609 data[j++] = reg & 0xFFFF;
0a0c72c9
DM
1610 }
1611}
1612
1613static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1614{
699559f8 1615 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1616 unsigned int timeout;
1617 int e2p_cmd;
1618
699559f8 1619 e2p_cmd = SMC_GET_E2P_CMD(lp);
0a0c72c9
DM
1620 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1621 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
d5498bef 1622 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
b39d66a8 1623 dev->name, __func__);
0a0c72c9 1624 return -EFAULT;
d5498bef 1625 }
0a0c72c9 1626 mdelay(1);
699559f8 1627 e2p_cmd = SMC_GET_E2P_CMD(lp);
0a0c72c9
DM
1628 }
1629 if (timeout == 0) {
d5498bef 1630 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
b39d66a8 1631 dev->name, __func__);
0a0c72c9
DM
1632 return -ETIMEDOUT;
1633 }
1634 return 0;
1635}
1636
d5498bef 1637static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
0a0c72c9
DM
1638 int cmd, int addr)
1639{
699559f8 1640 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1641 int ret;
1642
d5498bef 1643 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1644 return ret;
699559f8 1645 SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
d5498bef 1646 ((cmd) & (0x7<<28)) |
0a0c72c9
DM
1647 ((addr) & 0xFF));
1648 return 0;
1649}
1650
d5498bef 1651static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
0a0c72c9
DM
1652 u8 *data)
1653{
699559f8 1654 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1655 int ret;
1656
d5498bef 1657 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1658 return ret;
699559f8 1659 *data = SMC_GET_E2P_DATA(lp);
0a0c72c9
DM
1660 return 0;
1661}
1662
d5498bef 1663static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
0a0c72c9
DM
1664 u8 data)
1665{
699559f8 1666 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1667 int ret;
1668
d5498bef 1669 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1670 return ret;
699559f8 1671 SMC_SET_E2P_DATA(lp, data);
0a0c72c9
DM
1672 return 0;
1673}
1674
d5498bef 1675static int smc911x_ethtool_geteeprom(struct net_device *dev,
0a0c72c9
DM
1676 struct ethtool_eeprom *eeprom, u8 *data)
1677{
1678 u8 eebuf[SMC911X_EEPROM_LEN];
1679 int i, ret;
1680
1681 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1682 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1683 return ret;
1684 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1685 return ret;
1686 }
1687 memcpy(data, eebuf+eeprom->offset, eeprom->len);
d5498bef 1688 return 0;
0a0c72c9
DM
1689}
1690
d5498bef 1691static int smc911x_ethtool_seteeprom(struct net_device *dev,
0a0c72c9
DM
1692 struct ethtool_eeprom *eeprom, u8 *data)
1693{
1694 int i, ret;
1695
1696 /* Enable erase */
1697 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1698 return ret;
1699 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1700 /* erase byte */
1701 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1702 return ret;
1703 /* write byte */
1704 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1705 return ret;
1706 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1707 return ret;
1708 }
1709 return 0;
1710}
1711
1712static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1713{
1714 return SMC911X_EEPROM_LEN;
1715}
1716
7282d491 1717static const struct ethtool_ops smc911x_ethtool_ops = {
0a0c72c9
DM
1718 .get_settings = smc911x_ethtool_getsettings,
1719 .set_settings = smc911x_ethtool_setsettings,
1720 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1721 .get_msglevel = smc911x_ethtool_getmsglevel,
1722 .set_msglevel = smc911x_ethtool_setmsglevel,
1723 .nway_reset = smc911x_ethtool_nwayreset,
1724 .get_link = ethtool_op_get_link,
1725 .get_regs_len = smc911x_ethtool_getregslen,
1726 .get_regs = smc911x_ethtool_getregs,
1727 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1728 .get_eeprom = smc911x_ethtool_geteeprom,
1729 .set_eeprom = smc911x_ethtool_seteeprom,
1730};
1731
1732/*
1733 * smc911x_findirq
1734 *
1735 * This routine has a simple purpose -- make the SMC chip generate an
1736 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1737 */
699559f8 1738static int __init smc911x_findirq(struct net_device *dev)
0a0c72c9 1739{
699559f8 1740 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1741 int timeout = 20;
1742 unsigned long cookie;
1743
b39d66a8 1744 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
0a0c72c9
DM
1745
1746 cookie = probe_irq_on();
1747
1748 /*
1749 * Force a SW interrupt
1750 */
1751
699559f8 1752 SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
0a0c72c9
DM
1753
1754 /*
1755 * Wait until positive that the interrupt has been generated
1756 */
1757 do {
1758 int int_status;
1759 udelay(10);
699559f8 1760 int_status = SMC_GET_INT_EN(lp);
0a0c72c9
DM
1761 if (int_status & INT_EN_SW_INT_EN_)
1762 break; /* got the interrupt */
1763 } while (--timeout);
1764
1765 /*
1766 * there is really nothing that I can do here if timeout fails,
1767 * as autoirq_report will return a 0 anyway, which is what I
1768 * want in this case. Plus, the clean up is needed in both
1769 * cases.
1770 */
1771
1772 /* and disable all interrupts again */
699559f8 1773 SMC_SET_INT_EN(lp, 0);
0a0c72c9
DM
1774
1775 /* and return what I found */
1776 return probe_irq_off(cookie);
1777}
1778
1779/*
1780 * Function: smc911x_probe(unsigned long ioaddr)
1781 *
1782 * Purpose:
1783 * Tests to see if a given ioaddr points to an SMC911x chip.
1784 * Returns a 0 on success
1785 *
1786 * Algorithm:
1787 * (1) see if the endian word is OK
1788 * (1) see if I recognize the chip ID in the appropriate register
1789 *
1790 * Here I do typical initialization tasks.
1791 *
1792 * o Initialize the structure if needed
1793 * o print out my vanity message if not done so already
1794 * o print out what type of hardware is detected
1795 * o print out the ethernet address
1796 * o find the IRQ
1797 * o set up my private data
1798 * o configure the dev structure with my subroutines
1799 * o actually GRAB the irq.
1800 * o GRAB the region
1801 */
699559f8 1802static int __init smc911x_probe(struct net_device *dev)
0a0c72c9
DM
1803{
1804 struct smc911x_local *lp = netdev_priv(dev);
1805 int i, retval;
1806 unsigned int val, chip_id, revision;
1807 const char *version_string;
12c03f59 1808 unsigned long irq_flags;
0a0c72c9 1809
b39d66a8 1810 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1811
1812 /* First, see if the endian word is recognized */
699559f8 1813 val = SMC_GET_BYTE_TEST(lp);
0a0c72c9
DM
1814 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1815 if (val != 0x87654321) {
1816 printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
1817 retval = -ENODEV;
1818 goto err_out;
1819 }
1820
1821 /*
1822 * check if the revision register is something that I
1823 * recognize. These might need to be added to later,
1824 * as future revisions could be added.
1825 */
699559f8 1826 chip_id = SMC_GET_PN(lp);
0a0c72c9
DM
1827 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1828 for(i=0;chip_ids[i].id != 0; i++) {
1829 if (chip_ids[i].id == chip_id) break;
1830 }
1831 if (!chip_ids[i].id) {
1832 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1833 retval = -ENODEV;
1834 goto err_out;
1835 }
1836 version_string = chip_ids[i].name;
1837
699559f8 1838 revision = SMC_GET_REV(lp);
0a0c72c9
DM
1839 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1840
1841 /* At this point I'll assume that the chip is an SMC911x. */
1842 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1843
1844 /* Validate the TX FIFO size requested */
1845 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1846 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1847 retval = -EINVAL;
1848 goto err_out;
1849 }
d5498bef 1850
0a0c72c9 1851 /* fill in some of the fields */
0a0c72c9
DM
1852 lp->version = chip_ids[i].id;
1853 lp->revision = revision;
1854 lp->tx_fifo_kb = tx_fifo_kb;
1855 /* Reverse calculate the RX FIFO size from the TX */
1856 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1857 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1858
1859 /* Set the automatic flow control values */
1860 switch(lp->tx_fifo_kb) {
d5498bef 1861 /*
0a0c72c9
DM
1862 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1863 * AFC_LO is AFC_HI/2
1864 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1865 */
1866 case 2:/* 13440 Rx Data Fifo Size */
1867 lp->afc_cfg=0x008C46AF;break;
1868 case 3:/* 12480 Rx Data Fifo Size */
1869 lp->afc_cfg=0x0082419F;break;
1870 case 4:/* 11520 Rx Data Fifo Size */
1871 lp->afc_cfg=0x00783C9F;break;
1872 case 5:/* 10560 Rx Data Fifo Size */
1873 lp->afc_cfg=0x006E374F;break;
1874 case 6:/* 9600 Rx Data Fifo Size */
1875 lp->afc_cfg=0x0064328F;break;
1876 case 7:/* 8640 Rx Data Fifo Size */
1877 lp->afc_cfg=0x005A2D7F;break;
1878 case 8:/* 7680 Rx Data Fifo Size */
1879 lp->afc_cfg=0x0050287F;break;
1880 case 9:/* 6720 Rx Data Fifo Size */
1881 lp->afc_cfg=0x0046236F;break;
1882 case 10:/* 5760 Rx Data Fifo Size */
1883 lp->afc_cfg=0x003C1E6F;break;
1884 case 11:/* 4800 Rx Data Fifo Size */
1885 lp->afc_cfg=0x0032195F;break;
d5498bef 1886 /*
0a0c72c9
DM
1887 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1888 * AFC_LO is AFC_HI/2
1889 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1890 */
1891 case 12:/* 3840 Rx Data Fifo Size */
1892 lp->afc_cfg=0x0024124F;break;
1893 case 13:/* 2880 Rx Data Fifo Size */
1894 lp->afc_cfg=0x0015073F;break;
1895 case 14:/* 1920 Rx Data Fifo Size */
1896 lp->afc_cfg=0x0006032F;break;
1897 default:
d5498bef 1898 PRINTK("%s: ERROR -- no AFC_CFG setting found",
0a0c72c9
DM
1899 dev->name);
1900 break;
1901 }
1902
d5498bef
JG
1903 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
1904 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
0a0c72c9
DM
1905 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1906
1907 spin_lock_init(&lp->lock);
1908
1909 /* Get the MAC address */
699559f8 1910 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
0a0c72c9
DM
1911
1912 /* now, reset the chip, and put it into a known state */
1913 smc911x_reset(dev);
1914
1915 /*
1916 * If dev->irq is 0, then the device has to be banged on to see
1917 * what the IRQ is.
1918 *
1919 * Specifying an IRQ is done with the assumption that the user knows
1920 * what (s)he is doing. No checking is done!!!!
1921 */
1922 if (dev->irq < 1) {
1923 int trials;
1924
1925 trials = 3;
1926 while (trials--) {
699559f8 1927 dev->irq = smc911x_findirq(dev);
0a0c72c9
DM
1928 if (dev->irq)
1929 break;
1930 /* kick the card and try again */
1931 smc911x_reset(dev);
1932 }
1933 }
1934 if (dev->irq == 0) {
1935 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1936 dev->name);
1937 retval = -ENODEV;
1938 goto err_out;
1939 }
1940 dev->irq = irq_canonicalize(dev->irq);
1941
1942 /* Fill in the fields of the device structure with ethernet values. */
1943 ether_setup(dev);
1944
1945 dev->open = smc911x_open;
1946 dev->stop = smc911x_close;
1947 dev->hard_start_xmit = smc911x_hard_start_xmit;
1948 dev->tx_timeout = smc911x_timeout;
1949 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
0a0c72c9
DM
1950 dev->set_multicast_list = smc911x_set_multicast_list;
1951 dev->ethtool_ops = &smc911x_ethtool_ops;
1952#ifdef CONFIG_NET_POLL_CONTROLLER
1953 dev->poll_controller = smc911x_poll_controller;
1954#endif
1955
ef8142a5 1956 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
0a0c72c9
DM
1957 lp->mii.phy_id_mask = 0x1f;
1958 lp->mii.reg_num_mask = 0x1f;
1959 lp->mii.force_media = 0;
1960 lp->mii.full_duplex = 0;
1961 lp->mii.dev = dev;
1962 lp->mii.mdio_read = smc911x_phy_read;
1963 lp->mii.mdio_write = smc911x_phy_write;
1964
1965 /*
1966 * Locate the phy, if any.
1967 */
1968 smc911x_phy_detect(dev);
1969
1970 /* Set default parameters */
1971 lp->msg_enable = NETIF_MSG_LINK;
1972 lp->ctl_rfduplx = 1;
1973 lp->ctl_rspeed = 100;
1974
12c03f59
MD
1975#ifdef SMC_DYNAMIC_BUS_CONFIG
1976 irq_flags = lp->cfg.irq_flags;
1977#else
1978 irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
1979#endif
1980
0a0c72c9 1981 /* Grab the IRQ */
f2773a29 1982 retval = request_irq(dev->irq, &smc911x_interrupt,
12c03f59 1983 irq_flags, dev->name, dev);
0a0c72c9
DM
1984 if (retval)
1985 goto err_out;
1986
0a0c72c9
DM
1987#ifdef SMC_USE_DMA
1988 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
1989 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
1990 lp->rxdma_active = 0;
1991 lp->txdma_active = 0;
1992 dev->dma = lp->rxdma;
1993#endif
1994
1995 retval = register_netdev(dev);
1996 if (retval == 0) {
1997 /* now, print out the card info, in a short format.. */
1998 printk("%s: %s (rev %d) at %#lx IRQ %d",
1999 dev->name, version_string, lp->revision,
2000 dev->base_addr, dev->irq);
2001
2002#ifdef SMC_USE_DMA
2003 if (lp->rxdma != -1)
2004 printk(" RXDMA %d ", lp->rxdma);
2005
2006 if (lp->txdma != -1)
2007 printk("TXDMA %d", lp->txdma);
2008#endif
2009 printk("\n");
2010 if (!is_valid_ether_addr(dev->dev_addr)) {
2011 printk("%s: Invalid ethernet MAC address. Please "
2012 "set using ifconfig\n", dev->name);
2013 } else {
2014 /* Print the Ethernet address */
2015 printk("%s: Ethernet addr: ", dev->name);
2016 for (i = 0; i < 5; i++)
2017 printk("%2.2x:", dev->dev_addr[i]);
2018 printk("%2.2x\n", dev->dev_addr[5]);
2019 }
2020
2021 if (lp->phy_type == 0) {
2022 PRINTK("%s: No PHY found\n", dev->name);
2023 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2024 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2025 } else {
2026 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2027 }
2028 }
d5498bef 2029
0a0c72c9
DM
2030err_out:
2031#ifdef SMC_USE_DMA
2032 if (retval) {
2033 if (lp->rxdma != -1) {
2034 SMC_DMA_FREE(dev, lp->rxdma);
2035 }
2036 if (lp->txdma != -1) {
2037 SMC_DMA_FREE(dev, lp->txdma);
2038 }
2039 }
2040#endif
2041 return retval;
2042}
2043
2044/*
2045 * smc911x_init(void)
2046 *
2047 * Output:
2048 * 0 --> there is a device
2049 * anything else, error
2050 */
2051static int smc911x_drv_probe(struct platform_device *pdev)
2052{
319edafe 2053 struct smc911x_platdata *pd = pdev->dev.platform_data;
0a0c72c9
DM
2054 struct net_device *ndev;
2055 struct resource *res;
ef8142a5 2056 struct smc911x_local *lp;
0a0c72c9
DM
2057 unsigned int *addr;
2058 int ret;
2059
b39d66a8 2060 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
0a0c72c9
DM
2061 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2062 if (!res) {
2063 ret = -ENODEV;
2064 goto out;
2065 }
2066
2067 /*
2068 * Request the regions.
2069 */
2070 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2071 ret = -EBUSY;
2072 goto out;
2073 }
2074
2075 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2076 if (!ndev) {
2077 printk("%s: could not allocate device.\n", CARDNAME);
2078 ret = -ENOMEM;
2079 goto release_1;
2080 }
0a0c72c9
DM
2081 SET_NETDEV_DEV(ndev, &pdev->dev);
2082
2083 ndev->dma = (unsigned char)-1;
2084 ndev->irq = platform_get_irq(pdev, 0);
ef8142a5
AM
2085 lp = netdev_priv(ndev);
2086 lp->netdev = ndev;
12c03f59
MD
2087#ifdef SMC_DYNAMIC_BUS_CONFIG
2088 if (!pd) {
2089 ret = -EINVAL;
2090 goto release_both;
2091 }
2092 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2093#endif
0a0c72c9
DM
2094
2095 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2096 if (!addr) {
2097 ret = -ENOMEM;
2098 goto release_both;
2099 }
2100
2101 platform_set_drvdata(pdev, ndev);
699559f8
MD
2102 lp->base = addr;
2103 ndev->base_addr = res->start;
2104 ret = smc911x_probe(ndev);
0a0c72c9
DM
2105 if (ret != 0) {
2106 platform_set_drvdata(pdev, NULL);
2107 iounmap(addr);
2108release_both:
2109 free_netdev(ndev);
2110release_1:
2111 release_mem_region(res->start, SMC911X_IO_EXTENT);
2112out:
2113 printk("%s: not found (%d).\n", CARDNAME, ret);
2114 }
2115#ifdef SMC_USE_DMA
2116 else {
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2117 lp->physaddr = res->start;
2118 lp->dev = &pdev->dev;
2119 }
2120#endif
2121
2122 return ret;
2123}
2124
2125static int smc911x_drv_remove(struct platform_device *pdev)
2126{
2127 struct net_device *ndev = platform_get_drvdata(pdev);
699559f8 2128 struct smc911x_local *lp = netdev_priv(ndev);
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2129 struct resource *res;
2130
b39d66a8 2131 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
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2132 platform_set_drvdata(pdev, NULL);
2133
2134 unregister_netdev(ndev);
2135
2136 free_irq(ndev->irq, ndev);
2137
2138#ifdef SMC_USE_DMA
2139 {
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2140 if (lp->rxdma != -1) {
2141 SMC_DMA_FREE(dev, lp->rxdma);
2142 }
2143 if (lp->txdma != -1) {
2144 SMC_DMA_FREE(dev, lp->txdma);
2145 }
2146 }
2147#endif
699559f8 2148 iounmap(lp->base);
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DM
2149 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2150 release_mem_region(res->start, SMC911X_IO_EXTENT);
2151
2152 free_netdev(ndev);
2153 return 0;
2154}
2155
2156static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2157{
2158 struct net_device *ndev = platform_get_drvdata(dev);
699559f8 2159 struct smc911x_local *lp = netdev_priv(ndev);
0a0c72c9 2160
b39d66a8 2161 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
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DM
2162 if (ndev) {
2163 if (netif_running(ndev)) {
2164 netif_device_detach(ndev);
2165 smc911x_shutdown(ndev);
2166#if POWER_DOWN
2167 /* Set D2 - Energy detect only setting */
699559f8 2168 SMC_SET_PMT_CTRL(lp, 2<<12);
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2169#endif
2170 }
2171 }
2172 return 0;
2173}
2174
2175static int smc911x_drv_resume(struct platform_device *dev)
2176{
2177 struct net_device *ndev = platform_get_drvdata(dev);
2178
b39d66a8 2179 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
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2180 if (ndev) {
2181 struct smc911x_local *lp = netdev_priv(ndev);
2182
2183 if (netif_running(ndev)) {
2184 smc911x_reset(ndev);
2185 smc911x_enable(ndev);
2186 if (lp->phy_type != 0)
ef8142a5 2187 smc911x_phy_configure(&lp->phy_configure);
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2188 netif_device_attach(ndev);
2189 }
2190 }
2191 return 0;
2192}
2193
2194static struct platform_driver smc911x_driver = {
2195 .probe = smc911x_drv_probe,
2196 .remove = smc911x_drv_remove,
2197 .suspend = smc911x_drv_suspend,
2198 .resume = smc911x_drv_resume,
2199 .driver = {
2200 .name = CARDNAME,
72abb461 2201 .owner = THIS_MODULE,
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2202 },
2203};
d5498bef 2204
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2205static int __init smc911x_init(void)
2206{
2207 return platform_driver_register(&smc911x_driver);
2208}
2209
2210static void __exit smc911x_cleanup(void)
2211{
2212 platform_driver_unregister(&smc911x_driver);
2213}
2214
2215module_init(smc911x_init);
2216module_exit(smc911x_cleanup);