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drivers/net: const-ify ethtool_ops declarations
[net-next-2.6.git] / drivers / net / smc911x.c
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0a0c72c9
DM		 1/*
2 * smc911x.c
3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
4 *
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
d5498bef 7 * and the smsc911x.c reference driver by SMSC
0a0c72c9
DM		 8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * Arguments:
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
26 *
27 * History:
28 * 04/16/05 Dustin McIntire Initial version
29 */
30static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
32
33/* Debugging options */
34#define ENABLE_SMC_DEBUG_RX 0
35#define ENABLE_SMC_DEBUG_TX 0
36#define ENABLE_SMC_DEBUG_DMA 0
37#define ENABLE_SMC_DEBUG_PKTS 0
38#define ENABLE_SMC_DEBUG_MISC 0
39#define ENABLE_SMC_DEBUG_FUNC 0
40
41#define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42#define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43#define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44#define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45#define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46#define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
47
48#ifndef SMC_DEBUG
49#define SMC_DEBUG ( SMC_DEBUG_RX | \
50 SMC_DEBUG_TX | \
51 SMC_DEBUG_DMA | \
52 SMC_DEBUG_PKTS | \
53 SMC_DEBUG_MISC | \
54 SMC_DEBUG_FUNC \
55 )
56#endif
57
0a0c72c9
DM		 58#include <linux/init.h>
59#include <linux/module.h>
60#include <linux/kernel.h>
61#include <linux/sched.h>
62#include <linux/slab.h>
63#include <linux/delay.h>
64#include <linux/interrupt.h>
65#include <linux/errno.h>
66#include <linux/ioport.h>
67#include <linux/crc32.h>
68#include <linux/device.h>
69#include <linux/platform_device.h>
70#include <linux/spinlock.h>
71#include <linux/ethtool.h>
72#include <linux/mii.h>
73#include <linux/workqueue.h>
74
75#include <linux/netdevice.h>
76#include <linux/etherdevice.h>
77#include <linux/skbuff.h>
78
79#include <asm/io.h>
80#include <asm/irq.h>
81
82#include "smc911x.h"
83
84/*
85 * Transmit timeout, default 5 seconds.
86 */
87static int watchdog = 5000;
88module_param(watchdog, int, 0400);
89MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
90
91static int tx_fifo_kb=8;
92module_param(tx_fifo_kb, int, 0400);
93MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
94
95MODULE_LICENSE("GPL");
96
97/*
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
101 */
102#define CARDNAME "smc911x"
103
104/*
105 * Use power-down feature of the chip
106 */
107#define POWER_DOWN 1
108
109
110/* store this information for the driver.. */
111struct smc911x_local {
112 /*
113 * If I have to wait until the DMA is finished and ready to reload a
d5498bef 114 * packet, I will store the skbuff here. Then, the DMA will send it
0a0c72c9
DM		 115 * out and free it.
116 */
117 struct sk_buff *pending_tx_skb;
118
119 /*
120 * these are things that the kernel wants me to keep, so users
121 * can find out semi-useless statistics of how well the card is
122 * performing
123 */
124 struct net_device_stats stats;
125
126 /* version/revision of the SMC911x chip */
127 u16 version;
128 u16 revision;
129
130 /* FIFO sizes */
131 int tx_fifo_kb;
132 int tx_fifo_size;
133 int rx_fifo_size;
134 int afc_cfg;
135
136 /* Contains the current active receive/phy mode */
137 int ctl_rfduplx;
138 int ctl_rspeed;
139
140 u32 msg_enable;
141 u32 phy_type;
142 struct mii_if_info mii;
143
144 /* work queue */
145 struct work_struct phy_configure;
146 int work_pending;
147
148 int tx_throttle;
149 spinlock_t lock;
150
151#ifdef SMC_USE_DMA
152 /* DMA needs the physical address of the chip */
153 u_long physaddr;
154 int rxdma;
155 int txdma;
156 int rxdma_active;
157 int txdma_active;
158 struct sk_buff *current_rx_skb;
159 struct sk_buff *current_tx_skb;
160 struct device *dev;
161#endif
162};
163
164#if SMC_DEBUG > 0
165#define DBG(n, args...) \
166 do { \
167 if (SMC_DEBUG & (n)) \
168 printk(args); \
169 } while (0)
170
171#define PRINTK(args...) printk(args)
172#else
173#define DBG(n, args...) do { } while (0)
174#define PRINTK(args...) printk(KERN_DEBUG args)
175#endif
176
177#if SMC_DEBUG_PKTS > 0
178static void PRINT_PKT(u_char *buf, int length)
179{
180 int i;
181 int remainder;
182 int lines;
183
184 lines = length / 16;
185 remainder = length % 16;
186
187 for (i = 0; i < lines ; i ++) {
188 int cur;
189 for (cur = 0; cur < 8; cur++) {
190 u_char a, b;
191 a = *buf++;
192 b = *buf++;
193 printk("%02x%02x ", a, b);
194 }
195 printk("\n");
196 }
197 for (i = 0; i < remainder/2 ; i++) {
198 u_char a, b;
199 a = *buf++;
200 b = *buf++;
201 printk("%02x%02x ", a, b);
202 }
203 printk("\n");
204}
205#else
206#define PRINT_PKT(x...) do { } while (0)
207#endif
208
209
210/* this enables an interrupt in the interrupt mask register */
211#define SMC_ENABLE_INT(x) do { \
212 unsigned int __mask; \
213 unsigned long __flags; \
214 spin_lock_irqsave(&lp->lock, __flags); \
215 __mask = SMC_GET_INT_EN(); \
216 __mask |= (x); \
217 SMC_SET_INT_EN(__mask); \
218 spin_unlock_irqrestore(&lp->lock, __flags); \
219} while (0)
220
221/* this disables an interrupt from the interrupt mask register */
222#define SMC_DISABLE_INT(x) do { \
223 unsigned int __mask; \
224 unsigned long __flags; \
225 spin_lock_irqsave(&lp->lock, __flags); \
226 __mask = SMC_GET_INT_EN(); \
227 __mask &= ~(x); \
228 SMC_SET_INT_EN(__mask); \
229 spin_unlock_irqrestore(&lp->lock, __flags); \
230} while (0)
231
232/*
233 * this does a soft reset on the device
234 */
235static void smc911x_reset(struct net_device *dev)
236{
237 unsigned long ioaddr = dev->base_addr;
238 struct smc911x_local *lp = netdev_priv(dev);
239 unsigned int reg, timeout=0, resets=1;
240 unsigned long flags;
241
242 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
243
244 /* Take out of PM setting first */
245 if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
246 /* Write to the bytetest will take out of powerdown */
d5498bef 247 SMC_SET_BYTE_TEST(0);
0a0c72c9
DM		 248 timeout=10;
249 do {
250 udelay(10);
251 reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
252 } while ( timeout-- && !reg);
253 if (timeout == 0) {
254 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
255 return;
256 }
257 }
258
259 /* Disable all interrupts */
260 spin_lock_irqsave(&lp->lock, flags);
261 SMC_SET_INT_EN(0);
262 spin_unlock_irqrestore(&lp->lock, flags);
263
264 while (resets--) {
265 SMC_SET_HW_CFG(HW_CFG_SRST_);
266 timeout=10;
267 do {
268 udelay(10);
269 reg = SMC_GET_HW_CFG();
270 /* If chip indicates reset timeout then try again */
271 if (reg & HW_CFG_SRST_TO_) {
272 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
273 resets++;
274 break;
275 }
276 } while ( timeout-- && (reg & HW_CFG_SRST_));
277 }
278 if (timeout == 0) {
279 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
280 return;
281 }
282
283 /* make sure EEPROM has finished loading before setting GPIO_CFG */
284 timeout=1000;
285 while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
286 udelay(10);
287 }
288 if (timeout == 0){
289 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
290 return;
291 }
292
293 /* Initialize interrupts */
294 SMC_SET_INT_EN(0);
295 SMC_ACK_INT(-1);
296
297 /* Reset the FIFO level and flow control settings */
298 SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
299//TODO: Figure out what appropriate pause time is
300 SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
301 SMC_SET_AFC_CFG(lp->afc_cfg);
302
303
304 /* Set to LED outputs */
305 SMC_SET_GPIO_CFG(0x70070000);
306
d5498bef 307 /*
0a0c72c9 308 * Deassert IRQ for 1*10us for edge type interrupts
d5498bef 309 * and drive IRQ pin push-pull
0a0c72c9
DM		 310 */
311 SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
312
313 /* clear anything saved */
314 if (lp->pending_tx_skb != NULL) {
315 dev_kfree_skb (lp->pending_tx_skb);
316 lp->pending_tx_skb = NULL;
317 lp->stats.tx_errors++;
318 lp->stats.tx_aborted_errors++;
319 }
320}
321
322/*
323 * Enable Interrupts, Receive, and Transmit
324 */
325static void smc911x_enable(struct net_device *dev)
326{
327 unsigned long ioaddr = dev->base_addr;
328 struct smc911x_local *lp = netdev_priv(dev);
329 unsigned mask, cfg, cr;
330 unsigned long flags;
331
332 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
333
334 SMC_SET_MAC_ADDR(dev->dev_addr);
335
336 /* Enable TX */
337 cfg = SMC_GET_HW_CFG();
338 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
339 cfg |= HW_CFG_SF_;
340 SMC_SET_HW_CFG(cfg);
341 SMC_SET_FIFO_TDA(0xFF);
342 /* Update TX stats on every 64 packets received or every 1 sec */
343 SMC_SET_FIFO_TSL(64);
344 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
345
346 spin_lock_irqsave(&lp->lock, flags);
347 SMC_GET_MAC_CR(cr);
348 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
349 SMC_SET_MAC_CR(cr);
350 SMC_SET_TX_CFG(TX_CFG_TX_ON_);
351 spin_unlock_irqrestore(&lp->lock, flags);
352
353 /* Add 2 byte padding to start of packets */
354 SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
355
356 /* Turn on receiver and enable RX */
357 if (cr & MAC_CR_RXEN_)
358 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
359
360 spin_lock_irqsave(&lp->lock, flags);
361 SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
362 spin_unlock_irqrestore(&lp->lock, flags);
363
364 /* Interrupt on every received packet */
365 SMC_SET_FIFO_RSA(0x01);
366 SMC_SET_FIFO_RSL(0x00);
367
368 /* now, enable interrupts */
d5498bef
JG		 369 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
370 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
0a0c72c9
DM		 371 INT_EN_PHY_INT_EN_;
372 if (IS_REV_A(lp->revision))
373 mask|=INT_EN_RDFL_EN_;
374 else {
375 mask|=INT_EN_RDFO_EN_;
376 }
377 SMC_ENABLE_INT(mask);
378}
379
380/*
381 * this puts the device in an inactive state
382 */
383static void smc911x_shutdown(struct net_device *dev)
384{
385 unsigned long ioaddr = dev->base_addr;
386 struct smc911x_local *lp = netdev_priv(dev);
387 unsigned cr;
388 unsigned long flags;
389
390 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
391
392 /* Disable IRQ's */
393 SMC_SET_INT_EN(0);
394
395 /* Turn of Rx and TX */
396 spin_lock_irqsave(&lp->lock, flags);
397 SMC_GET_MAC_CR(cr);
398 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
399 SMC_SET_MAC_CR(cr);
400 SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
401 spin_unlock_irqrestore(&lp->lock, flags);
402}
403
404static inline void smc911x_drop_pkt(struct net_device *dev)
d5498bef 405{
0a0c72c9
DM		 406 unsigned long ioaddr = dev->base_addr;
407 unsigned int fifo_count, timeout, reg;
408
409 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
d5498bef 410 fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
0a0c72c9
DM		 411 if (fifo_count <= 4) {
412 /* Manually dump the packet data */
413 while (fifo_count--)
414 SMC_GET_RX_FIFO();
415 } else {
416 /* Fast forward through the bad packet */
417 SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
418 timeout=50;
419 do {
420 udelay(10);
421 reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
422 } while ( timeout-- && reg);
423 if (timeout == 0) {
424 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
425 }
426 }
427}
428
429/*
430 * This is the procedure to handle the receipt of a packet.
431 * It should be called after checking for packet presence in
d5498bef 432 * the RX status FIFO. It must be called with the spin lock
0a0c72c9
DM		 433 * already held.
434 */
435static inline void smc911x_rcv(struct net_device *dev)
436{
437 struct smc911x_local *lp = netdev_priv(dev);
438 unsigned long ioaddr = dev->base_addr;
439 unsigned int pkt_len, status;
440 struct sk_buff *skb;
441 unsigned char *data;
442
d5498bef 443 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
0a0c72c9
DM		 444 dev->name, __FUNCTION__);
445 status = SMC_GET_RX_STS_FIFO();
d5498bef 446 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
0a0c72c9
DM		 447 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
448 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
d5498bef 449 if (status & RX_STS_ES_) {
0a0c72c9
DM		 450 /* Deal with a bad packet */
451 lp->stats.rx_errors++;
d5498bef 452 if (status & RX_STS_CRC_ERR_)
0a0c72c9
DM		 453 lp->stats.rx_crc_errors++;
454 else {
455 if (status & RX_STS_LEN_ERR_)
456 lp->stats.rx_length_errors++;
d5498bef 457 if (status & RX_STS_MCAST_)
0a0c72c9
DM		 458 lp->stats.multicast++;
459 }
460 /* Remove the bad packet data from the RX FIFO */
461 smc911x_drop_pkt(dev);
462 } else {
463 /* Receive a valid packet */
464 /* Alloc a buffer with extra room for DMA alignment */
465 skb=dev_alloc_skb(pkt_len+32);
466 if (unlikely(skb == NULL)) {
467 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
468 dev->name);
469 lp->stats.rx_dropped++;
470 smc911x_drop_pkt(dev);
471 return;
472 }
d5498bef 473 /* Align IP header to 32 bits
0a0c72c9 474 * Note that the device is configured to add a 2
d5498bef 475 * byte padding to the packet start, so we really
0a0c72c9
DM		 476 * want to write to the orignal data pointer */
477 data = skb->data;
478 skb_reserve(skb, 2);
479 skb_put(skb,pkt_len-4);
480#ifdef SMC_USE_DMA
481 {
482 unsigned int fifo;
483 /* Lower the FIFO threshold if possible */
484 fifo = SMC_GET_FIFO_INT();
485 if (fifo & 0xFF) fifo--;
486 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
487 dev->name, fifo & 0xff);
488 SMC_SET_FIFO_INT(fifo);
489 /* Setup RX DMA */
490 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
491 lp->rxdma_active = 1;
492 lp->current_rx_skb = skb;
493 SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
494 /* Packet processing deferred to DMA RX interrupt */
495 }
496#else
497 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
498 SMC_PULL_DATA(data, pkt_len+2+3);
499
500 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name,);
501 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
502 dev->last_rx = jiffies;
503 skb->dev = dev;
504 skb->protocol = eth_type_trans(skb, dev);
505 netif_rx(skb);
506 lp->stats.rx_packets++;
507 lp->stats.rx_bytes += pkt_len-4;
508#endif
509 }
510}
511
512/*
513 * This is called to actually send a packet to the chip.
514 */
515static void smc911x_hardware_send_pkt(struct net_device *dev)
516{
517 struct smc911x_local *lp = netdev_priv(dev);
518 unsigned long ioaddr = dev->base_addr;
519 struct sk_buff *skb;
520 unsigned int cmdA, cmdB, len;
521 unsigned char *buf;
522 unsigned long flags;
523
524 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
525 BUG_ON(lp->pending_tx_skb == NULL);
526
527 skb = lp->pending_tx_skb;
528 lp->pending_tx_skb = NULL;
529
d5498bef
JG		 530 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
531 /* cmdB {31:16] pkt tag [10:0] length */
0a0c72c9
DM		 532#ifdef SMC_USE_DMA
533 /* 16 byte buffer alignment mode */
534 buf = (char*)((u32)(skb->data) & ~0xF);
d5498bef 535 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
0a0c72c9
DM		 536 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
537 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
538 skb->len;
539#else
540 buf = (char*)((u32)skb->data & ~0x3);
d5498bef 541 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
0a0c72c9
DM		 542 cmdA = (((u32)skb->data & 0x3) << 16) |
543 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
544 skb->len;
545#endif
d5498bef 546 /* tag is packet length so we can use this in stats update later */
0a0c72c9 547 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
d5498bef 548
0a0c72c9
DM		 549 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
550 dev->name, len, len, buf, cmdA, cmdB);
551 SMC_SET_TX_FIFO(cmdA);
552 SMC_SET_TX_FIFO(cmdB);
553
554 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
555 PRINT_PKT(buf, len <= 64 ? len : 64);
556
557 /* Send pkt via PIO or DMA */
558#ifdef SMC_USE_DMA
559 lp->current_tx_skb = skb;
560 SMC_PUSH_DATA(buf, len);
561 /* DMA complete IRQ will free buffer and set jiffies */
562#else
563 SMC_PUSH_DATA(buf, len);
564 dev->trans_start = jiffies;
565 dev_kfree_skb(skb);
566#endif
567 spin_lock_irqsave(&lp->lock, flags);
568 if (!lp->tx_throttle) {
569 netif_wake_queue(dev);
570 }
571 spin_unlock_irqrestore(&lp->lock, flags);
572 SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
573}
574
575/*
576 * Since I am not sure if I will have enough room in the chip's ram
577 * to store the packet, I call this routine which either sends it
578 * now, or set the card to generates an interrupt when ready
579 * for the packet.
580 */
581static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
582{
583 struct smc911x_local *lp = netdev_priv(dev);
584 unsigned long ioaddr = dev->base_addr;
585 unsigned int free;
586 unsigned long flags;
587
d5498bef 588 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
0a0c72c9
DM		 589 dev->name, __FUNCTION__);
590
591 BUG_ON(lp->pending_tx_skb != NULL);
592
593 free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
594 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
595
596 /* Turn off the flow when running out of space in FIFO */
597 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
d5498bef 598 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
0a0c72c9
DM		 599 dev->name, free);
600 spin_lock_irqsave(&lp->lock, flags);
601 /* Reenable when at least 1 packet of size MTU present */
602 SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
603 lp->tx_throttle = 1;
604 netif_stop_queue(dev);
605 spin_unlock_irqrestore(&lp->lock, flags);
606 }
607
d5498bef 608 /* Drop packets when we run out of space in TX FIFO
0a0c72c9 609 * Account for overhead required for:
d5498bef
JG		 610 *
611 * Tx command words 8 bytes
0a0c72c9
DM		 612 * Start offset 15 bytes
613 * End padding 15 bytes
d5498bef 614 */
0a0c72c9 615 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
d5498bef 616 printk("%s: No Tx free space %d < %d\n",
0a0c72c9
DM		 617 dev->name, free, skb->len);
618 lp->pending_tx_skb = NULL;
619 lp->stats.tx_errors++;
620 lp->stats.tx_dropped++;
621 dev_kfree_skb(skb);
622 return 0;
623 }
d5498bef 624
0a0c72c9
DM		 625#ifdef SMC_USE_DMA
626 {
627 /* If the DMA is already running then defer this packet Tx until
d5498bef 628 * the DMA IRQ starts it
0a0c72c9
DM		 629 */
630 spin_lock_irqsave(&lp->lock, flags);
631 if (lp->txdma_active) {
632 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
633 lp->pending_tx_skb = skb;
634 netif_stop_queue(dev);
635 spin_unlock_irqrestore(&lp->lock, flags);
636 return 0;
637 } else {
638 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
639 lp->txdma_active = 1;
640 }
641 spin_unlock_irqrestore(&lp->lock, flags);
642 }
643#endif
644 lp->pending_tx_skb = skb;
645 smc911x_hardware_send_pkt(dev);
646
647 return 0;
648}
649
650/*
651 * This handles a TX status interrupt, which is only called when:
652 * - a TX error occurred, or
653 * - TX of a packet completed.
654 */
655static void smc911x_tx(struct net_device *dev)
656{
657 unsigned long ioaddr = dev->base_addr;
658 struct smc911x_local *lp = netdev_priv(dev);
659 unsigned int tx_status;
660
d5498bef 661 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
0a0c72c9
DM		 662 dev->name, __FUNCTION__);
663
664 /* Collect the TX status */
665 while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
d5498bef
JG		 666 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
667 dev->name,
0a0c72c9
DM		 668 (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
669 tx_status = SMC_GET_TX_STS_FIFO();
670 lp->stats.tx_packets++;
671 lp->stats.tx_bytes+=tx_status>>16;
d5498bef
JG		 672 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
673 dev->name, (tx_status & 0xffff0000) >> 16,
0a0c72c9 674 tx_status & 0x0000ffff);
d5498bef 675 /* count Tx errors, but ignore lost carrier errors when in
0a0c72c9 676 * full-duplex mode */
d5498bef 677 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
0a0c72c9
DM		 678 !(tx_status & 0x00000306))) {
679 lp->stats.tx_errors++;
680 }
681 if (tx_status & TX_STS_MANY_COLL_) {
682 lp->stats.collisions+=16;
683 lp->stats.tx_aborted_errors++;
684 } else {
685 lp->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
686 }
687 /* carrier error only has meaning for half-duplex communication */
d5498bef 688 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
0a0c72c9
DM		 689 !lp->ctl_rfduplx) {
690 lp->stats.tx_carrier_errors++;
d5498bef 691 }
0a0c72c9
DM		 692 if (tx_status & TX_STS_LATE_COLL_) {
693 lp->stats.collisions++;
694 lp->stats.tx_aborted_errors++;
695 }
696 }
697}
698
699
700/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
701/*
702 * Reads a register from the MII Management serial interface
703 */
704
705static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
706{
707 unsigned long ioaddr = dev->base_addr;
708 unsigned int phydata;
709
710 SMC_GET_MII(phyreg, phyaddr, phydata);
711
712 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
713 __FUNCTION__, phyaddr, phyreg, phydata);
714 return phydata;
715}
716
717
718/*
719 * Writes a register to the MII Management serial interface
720 */
721static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
722 int phydata)
723{
724 unsigned long ioaddr = dev->base_addr;
725
726 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
727 __FUNCTION__, phyaddr, phyreg, phydata);
728
729 SMC_SET_MII(phyreg, phyaddr, phydata);
730}
731
732/*
733 * Finds and reports the PHY address (115 and 117 have external
734 * PHY interface 118 has internal only
735 */
736static void smc911x_phy_detect(struct net_device *dev)
737{
738 unsigned long ioaddr = dev->base_addr;
739 struct smc911x_local *lp = netdev_priv(dev);
740 int phyaddr;
741 unsigned int cfg, id1, id2;
742
743 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
744
745 lp->phy_type = 0;
746
747 /*
748 * Scan all 32 PHY addresses if necessary, starting at
749 * PHY#1 to PHY#31, and then PHY#0 last.
750 */
751 switch(lp->version) {
752 case 0x115:
753 case 0x117:
d5498bef 754 cfg = SMC_GET_HW_CFG();
0a0c72c9
DM		 755 if (cfg & HW_CFG_EXT_PHY_DET_) {
756 cfg &= ~HW_CFG_PHY_CLK_SEL_;
757 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
758 SMC_SET_HW_CFG(cfg);
759 udelay(10); /* Wait for clocks to stop */
760
761 cfg |= HW_CFG_EXT_PHY_EN_;
762 SMC_SET_HW_CFG(cfg);
763 udelay(10); /* Wait for clocks to stop */
764
765 cfg &= ~HW_CFG_PHY_CLK_SEL_;
766 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
767 SMC_SET_HW_CFG(cfg);
768 udelay(10); /* Wait for clocks to stop */
769
770 cfg |= HW_CFG_SMI_SEL_;
771 SMC_SET_HW_CFG(cfg);
772
773 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
774
775 /* Read the PHY identifiers */
776 SMC_GET_PHY_ID1(phyaddr & 31, id1);
777 SMC_GET_PHY_ID2(phyaddr & 31, id2);
778
779 /* Make sure it is a valid identifier */
d5498bef
JG		 780 if (id1 != 0x0000 && id1 != 0xffff &&
781 id1 != 0x8000 && id2 != 0x0000 &&
0a0c72c9
DM		 782 id2 != 0xffff && id2 != 0x8000) {
783 /* Save the PHY's address */
784 lp->mii.phy_id = phyaddr & 31;
785 lp->phy_type = id1 << 16 | id2;
786 break;
787 }
788 }
789 }
790 default:
791 /* Internal media only */
792 SMC_GET_PHY_ID1(1, id1);
793 SMC_GET_PHY_ID2(1, id2);
794 /* Save the PHY's address */
795 lp->mii.phy_id = 1;
796 lp->phy_type = id1 << 16 | id2;
797 }
798
799 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
800 dev->name, id1, id2, lp->mii.phy_id);
801}
802
803/*
804 * Sets the PHY to a configuration as determined by the user.
805 * Called with spin_lock held.
806 */
807static int smc911x_phy_fixed(struct net_device *dev)
808{
809 struct smc911x_local *lp = netdev_priv(dev);
810 unsigned long ioaddr = dev->base_addr;
811 int phyaddr = lp->mii.phy_id;
812 int bmcr;
813
814 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
815
816 /* Enter Link Disable state */
817 SMC_GET_PHY_BMCR(phyaddr, bmcr);
818 bmcr |= BMCR_PDOWN;
819 SMC_SET_PHY_BMCR(phyaddr, bmcr);
820
821 /*
822 * Set our fixed capabilities
823 * Disable auto-negotiation
824 */
825 bmcr &= ~BMCR_ANENABLE;
826 if (lp->ctl_rfduplx)
827 bmcr |= BMCR_FULLDPLX;
828
829 if (lp->ctl_rspeed == 100)
830 bmcr |= BMCR_SPEED100;
831
832 /* Write our capabilities to the phy control register */
833 SMC_SET_PHY_BMCR(phyaddr, bmcr);
834
835 /* Re-Configure the Receive/Phy Control register */
836 bmcr &= ~BMCR_PDOWN;
837 SMC_SET_PHY_BMCR(phyaddr, bmcr);
838
839 return 1;
840}
841
842/*
843 * smc911x_phy_reset - reset the phy
844 * @dev: net device
845 * @phy: phy address
846 *
847 * Issue a software reset for the specified PHY and
848 * wait up to 100ms for the reset to complete. We should
849 * not access the PHY for 50ms after issuing the reset.
850 *
851 * The time to wait appears to be dependent on the PHY.
852 *
853 */
854static int smc911x_phy_reset(struct net_device *dev, int phy)
855{
856 struct smc911x_local *lp = netdev_priv(dev);
857 unsigned long ioaddr = dev->base_addr;
858 int timeout;
859 unsigned long flags;
860 unsigned int reg;
861
862 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
863
864 spin_lock_irqsave(&lp->lock, flags);
865 reg = SMC_GET_PMT_CTRL();
866 reg &= ~0xfffff030;
867 reg |= PMT_CTRL_PHY_RST_;
868 SMC_SET_PMT_CTRL(reg);
869 spin_unlock_irqrestore(&lp->lock, flags);
870 for (timeout = 2; timeout; timeout--) {
871 msleep(50);
872 spin_lock_irqsave(&lp->lock, flags);
873 reg = SMC_GET_PMT_CTRL();
874 spin_unlock_irqrestore(&lp->lock, flags);
875 if (!(reg & PMT_CTRL_PHY_RST_)) {
d5498bef 876 /* extra delay required because the phy may
0a0c72c9 877 * not be completed with its reset
d5498bef 878 * when PHY_BCR_RESET_ is cleared. 256us
0a0c72c9
DM		 879 * should suffice, but use 500us to be safe
880 */
881 udelay(500);
882 break;
883 }
884 }
885
886 return reg & PMT_CTRL_PHY_RST_;
887}
888
889/*
890 * smc911x_phy_powerdown - powerdown phy
891 * @dev: net device
892 * @phy: phy address
893 *
894 * Power down the specified PHY
895 */
896static void smc911x_phy_powerdown(struct net_device *dev, int phy)
897{
898 unsigned long ioaddr = dev->base_addr;
899 unsigned int bmcr;
900
901 /* Enter Link Disable state */
902 SMC_GET_PHY_BMCR(phy, bmcr);
903 bmcr |= BMCR_PDOWN;
904 SMC_SET_PHY_BMCR(phy, bmcr);
905}
906
907/*
908 * smc911x_phy_check_media - check the media status and adjust BMCR
909 * @dev: net device
910 * @init: set true for initialisation
911 *
912 * Select duplex mode depending on negotiation state. This
913 * also updates our carrier state.
914 */
915static void smc911x_phy_check_media(struct net_device *dev, int init)
916{
917 struct smc911x_local *lp = netdev_priv(dev);
918 unsigned long ioaddr = dev->base_addr;
919 int phyaddr = lp->mii.phy_id;
920 unsigned int bmcr, cr;
921
922 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
923
924 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
925 /* duplex state has changed */
926 SMC_GET_PHY_BMCR(phyaddr, bmcr);
927 SMC_GET_MAC_CR(cr);
928 if (lp->mii.full_duplex) {
929 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
930 bmcr |= BMCR_FULLDPLX;
931 cr |= MAC_CR_RCVOWN_;
932 } else {
933 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
934 bmcr &= ~BMCR_FULLDPLX;
935 cr &= ~MAC_CR_RCVOWN_;
936 }
937 SMC_SET_PHY_BMCR(phyaddr, bmcr);
938 SMC_SET_MAC_CR(cr);
939 }
940}
941
942/*
943 * Configures the specified PHY through the MII management interface
944 * using Autonegotiation.
945 * Calls smc911x_phy_fixed() if the user has requested a certain config.
946 * If RPC ANEG bit is set, the media selection is dependent purely on
947 * the selection by the MII (either in the MII BMCR reg or the result
948 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
949 * is controlled by the RPC SPEED and RPC DPLX bits.
950 */
951static void smc911x_phy_configure(void *data)
952{
953 struct net_device *dev = data;
954 struct smc911x_local *lp = netdev_priv(dev);
955 unsigned long ioaddr = dev->base_addr;
956 int phyaddr = lp->mii.phy_id;
957 int my_phy_caps; /* My PHY capabilities */
958 int my_ad_caps; /* My Advertised capabilities */
959 int status;
960 unsigned long flags;
961
962 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
963
964 /*
965 * We should not be called if phy_type is zero.
966 */
967 if (lp->phy_type == 0)
968 goto smc911x_phy_configure_exit;
969
970 if (smc911x_phy_reset(dev, phyaddr)) {
971 printk("%s: PHY reset timed out\n", dev->name);
972 goto smc911x_phy_configure_exit;
973 }
974 spin_lock_irqsave(&lp->lock, flags);
975
976 /*
977 * Enable PHY Interrupts (for register 18)
978 * Interrupts listed here are enabled
979 */
980 SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
981 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
982 PHY_INT_MASK_LINK_DOWN_);
983
984 /* If the user requested no auto neg, then go set his request */
985 if (lp->mii.force_media) {
986 smc911x_phy_fixed(dev);
987 goto smc911x_phy_configure_exit;
988 }
989
990 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
991 SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
992 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
993 printk(KERN_INFO "Auto negotiation NOT supported\n");
994 smc911x_phy_fixed(dev);
995 goto smc911x_phy_configure_exit;
996 }
997
998 /* CSMA capable w/ both pauses */
999 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1000
1001 if (my_phy_caps & BMSR_100BASE4)
1002 my_ad_caps |= ADVERTISE_100BASE4;
1003 if (my_phy_caps & BMSR_100FULL)
1004 my_ad_caps |= ADVERTISE_100FULL;
1005 if (my_phy_caps & BMSR_100HALF)
1006 my_ad_caps |= ADVERTISE_100HALF;
1007 if (my_phy_caps & BMSR_10FULL)
1008 my_ad_caps |= ADVERTISE_10FULL;
1009 if (my_phy_caps & BMSR_10HALF)
1010 my_ad_caps |= ADVERTISE_10HALF;
1011
1012 /* Disable capabilities not selected by our user */
1013 if (lp->ctl_rspeed != 100)
1014 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1015
1016 if (!lp->ctl_rfduplx)
1017 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1018
1019 /* Update our Auto-Neg Advertisement Register */
1020 SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
1021 lp->mii.advertising = my_ad_caps;
1022
1023 /*
1024 * Read the register back. Without this, it appears that when
1025 * auto-negotiation is restarted, sometimes it isn't ready and
1026 * the link does not come up.
1027 */
1028 udelay(10);
1029 SMC_GET_PHY_MII_ADV(phyaddr, status);
1030
1031 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
1032 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
1033
1034 /* Restart auto-negotiation process in order to advertise my caps */
1035 SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
1036
1037 smc911x_phy_check_media(dev, 1);
1038
1039smc911x_phy_configure_exit:
1040 spin_unlock_irqrestore(&lp->lock, flags);
1041 lp->work_pending = 0;
1042}
1043
1044/*
1045 * smc911x_phy_interrupt
1046 *
1047 * Purpose: Handle interrupts relating to PHY register 18. This is
1048 * called from the "hard" interrupt handler under our private spinlock.
1049 */
1050static void smc911x_phy_interrupt(struct net_device *dev)
1051{
1052 struct smc911x_local *lp = netdev_priv(dev);
1053 unsigned long ioaddr = dev->base_addr;
1054 int phyaddr = lp->mii.phy_id;
1055 int status;
1056
1057 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1058
1059 if (lp->phy_type == 0)
1060 return;
1061
1062 smc911x_phy_check_media(dev, 0);
1063 /* read to clear status bits */
1064 SMC_GET_PHY_INT_SRC(phyaddr,status);
d5498bef 1065 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
0a0c72c9 1066 dev->name, status & 0xffff);
d5498bef 1067 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
0a0c72c9
DM		 1068 dev->name, SMC_GET_AFC_CFG());
1069}
1070
1071/*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1072
1073/*
1074 * This is the main routine of the driver, to handle the device when
1075 * it needs some attention.
1076 */
1077static irqreturn_t smc911x_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1078{
1079 struct net_device *dev = dev_id;
1080 unsigned long ioaddr = dev->base_addr;
1081 struct smc911x_local *lp = netdev_priv(dev);
1082 unsigned int status, mask, timeout;
1083 unsigned int rx_overrun=0, cr, pkts;
1084 unsigned long flags;
1085
1086 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1087
1088 spin_lock_irqsave(&lp->lock, flags);
1089
1090 /* Spurious interrupt check */
1091 if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1092 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
a4d09272 1093 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9
DM		 1094 return IRQ_NONE;
1095 }
1096
1097 mask = SMC_GET_INT_EN();
1098 SMC_SET_INT_EN(0);
1099
1100 /* set a timeout value, so I don't stay here forever */
1101 timeout = 8;
1102
1103
1104 do {
1105 status = SMC_GET_INT();
1106
1107 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1108 dev->name, status, mask, status & ~mask);
1109
1110 status &= mask;
1111 if (!status)
1112 break;
1113
1114 /* Handle SW interrupt condition */
1115 if (status & INT_STS_SW_INT_) {
1116 SMC_ACK_INT(INT_STS_SW_INT_);
1117 mask &= ~INT_EN_SW_INT_EN_;
1118 }
1119 /* Handle various error conditions */
1120 if (status & INT_STS_RXE_) {
1121 SMC_ACK_INT(INT_STS_RXE_);
1122 lp->stats.rx_errors++;
d5498bef 1123 }
0a0c72c9
DM		 1124 if (status & INT_STS_RXDFH_INT_) {
1125 SMC_ACK_INT(INT_STS_RXDFH_INT_);
1126 lp->stats.rx_dropped+=SMC_GET_RX_DROP();
1127 }
1128 /* Undocumented interrupt-what is the right thing to do here? */
1129 if (status & INT_STS_RXDF_INT_) {
1130 SMC_ACK_INT(INT_STS_RXDF_INT_);
1131 }
1132
1133 /* Rx Data FIFO exceeds set level */
1134 if (status & INT_STS_RDFL_) {
1135 if (IS_REV_A(lp->revision)) {
1136 rx_overrun=1;
1137 SMC_GET_MAC_CR(cr);
1138 cr &= ~MAC_CR_RXEN_;
1139 SMC_SET_MAC_CR(cr);
1140 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1141 lp->stats.rx_errors++;
1142 lp->stats.rx_fifo_errors++;
1143 }
1144 SMC_ACK_INT(INT_STS_RDFL_);
1145 }
1146 if (status & INT_STS_RDFO_) {
1147 if (!IS_REV_A(lp->revision)) {
1148 SMC_GET_MAC_CR(cr);
1149 cr &= ~MAC_CR_RXEN_;
1150 SMC_SET_MAC_CR(cr);
1151 rx_overrun=1;
1152 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1153 lp->stats.rx_errors++;
1154 lp->stats.rx_fifo_errors++;
1155 }
1156 SMC_ACK_INT(INT_STS_RDFO_);
1157 }
1158 /* Handle receive condition */
1159 if ((status & INT_STS_RSFL_) || rx_overrun) {
1160 unsigned int fifo;
1161 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
d5498bef
JG		 1162 fifo = SMC_GET_RX_FIFO_INF();
1163 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1164 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
0a0c72c9
DM		 1165 dev->name, pkts, fifo & 0xFFFF );
1166 if (pkts != 0) {
1167#ifdef SMC_USE_DMA
1168 unsigned int fifo;
1169 if (lp->rxdma_active){
d5498bef 1170 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
0a0c72c9
DM		 1171 "%s: RX DMA active\n", dev->name);
1172 /* The DMA is already running so up the IRQ threshold */
1173 fifo = SMC_GET_FIFO_INT() & ~0xFF;
1174 fifo |= pkts & 0xFF;
d5498bef 1175 DBG(SMC_DEBUG_RX,
0a0c72c9
DM		 1176 "%s: Setting RX stat FIFO threshold to %d\n",
1177 dev->name, fifo & 0xff);
1178 SMC_SET_FIFO_INT(fifo);
1179 } else
1180#endif
1181 smc911x_rcv(dev);
1182 }
1183 SMC_ACK_INT(INT_STS_RSFL_);
1184 }
1185 /* Handle transmit FIFO available */
1186 if (status & INT_STS_TDFA_) {
1187 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
1188 SMC_SET_FIFO_TDA(0xFF);
1189 lp->tx_throttle = 0;
1190#ifdef SMC_USE_DMA
1191 if (!lp->txdma_active)
1192#endif
1193 netif_wake_queue(dev);
1194 SMC_ACK_INT(INT_STS_TDFA_);
1195 }
1196 /* Handle transmit done condition */
1197#if 1
1198 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
d5498bef
JG		 1199 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1200 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
0a0c72c9
DM		 1201 dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
1202 smc911x_tx(dev);
1203 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1204 SMC_ACK_INT(INT_STS_TSFL_);
1205 SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
1206 }
1207#else
1208 if (status & INT_STS_TSFL_) {
1209 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
1210 smc911x_tx(dev);
1211 SMC_ACK_INT(INT_STS_TSFL_);
1212 }
1213
1214 if (status & INT_STS_GPT_INT_) {
d5498bef
JG		 1215 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1216 dev->name,
1217 SMC_GET_IRQ_CFG(),
1218 SMC_GET_FIFO_INT(),
0a0c72c9
DM		 1219 SMC_GET_RX_CFG());
1220 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1221 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
d5498bef
JG		 1222 dev->name,
1223 (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
1224 SMC_GET_RX_FIFO_INF() & 0xffff,
0a0c72c9
DM		 1225 SMC_GET_RX_STS_FIFO_PEEK());
1226 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1227 SMC_ACK_INT(INT_STS_GPT_INT_);
1228 }
1229#endif
1230
1231 /* Handle PHY interupt condition */
1232 if (status & INT_STS_PHY_INT_) {
1233 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1234 smc911x_phy_interrupt(dev);
1235 SMC_ACK_INT(INT_STS_PHY_INT_);
1236 }
1237 } while (--timeout);
1238
1239 /* restore mask state */
1240 SMC_SET_INT_EN(mask);
1241
d5498bef 1242 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
0a0c72c9
DM		 1243 dev->name, 8-timeout);
1244
1245 spin_unlock_irqrestore(&lp->lock, flags);
1246
1247 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1248
1249 return IRQ_HANDLED;
1250}
1251
1252#ifdef SMC_USE_DMA
1253static void
1254smc911x_tx_dma_irq(int dma, void *data, struct pt_regs *regs)
1255{
1256 struct net_device *dev = (struct net_device *)data;
1257 struct smc911x_local *lp = netdev_priv(dev);
1258 struct sk_buff *skb = lp->current_tx_skb;
1259 unsigned long flags;
1260
1261 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1262
1263 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1264 /* Clear the DMA interrupt sources */
1265 SMC_DMA_ACK_IRQ(dev, dma);
1266 BUG_ON(skb == NULL);
1267 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1268 dev->trans_start = jiffies;
1269 dev_kfree_skb_irq(skb);
1270 lp->current_tx_skb = NULL;
1271 if (lp->pending_tx_skb != NULL)
1272 smc911x_hardware_send_pkt(dev);
1273 else {
d5498bef 1274 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
0a0c72c9
DM		 1275 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1276 spin_lock_irqsave(&lp->lock, flags);
1277 lp->txdma_active = 0;
1278 if (!lp->tx_throttle) {
1279 netif_wake_queue(dev);
1280 }
1281 spin_unlock_irqrestore(&lp->lock, flags);
1282 }
1283
d5498bef 1284 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
0a0c72c9
DM		 1285 "%s: TX DMA irq completed\n", dev->name);
1286}
1287static void
1288smc911x_rx_dma_irq(int dma, void *data, struct pt_regs *regs)
1289{
1290 struct net_device *dev = (struct net_device *)data;
1291 unsigned long ioaddr = dev->base_addr;
1292 struct smc911x_local *lp = netdev_priv(dev);
1293 struct sk_buff *skb = lp->current_rx_skb;
1294 unsigned long flags;
1295 unsigned int pkts;
1296
1297 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1298 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1299 /* Clear the DMA interrupt sources */
1300 SMC_DMA_ACK_IRQ(dev, dma);
1301 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1302 BUG_ON(skb == NULL);
1303 lp->current_rx_skb = NULL;
1304 PRINT_PKT(skb->data, skb->len);
1305 dev->last_rx = jiffies;
1306 skb->dev = dev;
1307 skb->protocol = eth_type_trans(skb, dev);
1308 netif_rx(skb);
1309 lp->stats.rx_packets++;
1310 lp->stats.rx_bytes += skb->len;
1311
1312 spin_lock_irqsave(&lp->lock, flags);
d5498bef 1313 pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
0a0c72c9
DM		 1314 if (pkts != 0) {
1315 smc911x_rcv(dev);
1316 }else {
1317 lp->rxdma_active = 0;
1318 }
1319 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef
JG		 1320 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1321 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
0a0c72c9
DM		 1322 dev->name, pkts);
1323}
1324#endif /* SMC_USE_DMA */
1325
1326#ifdef CONFIG_NET_POLL_CONTROLLER
1327/*
1328 * Polling receive - used by netconsole and other diagnostic tools
1329 * to allow network i/o with interrupts disabled.
1330 */
1331static void smc911x_poll_controller(struct net_device *dev)
1332{
1333 disable_irq(dev->irq);
1334 smc911x_interrupt(dev->irq, dev, NULL);
1335 enable_irq(dev->irq);
1336}
1337#endif
1338
1339/* Our watchdog timed out. Called by the networking layer */
1340static void smc911x_timeout(struct net_device *dev)
1341{
1342 struct smc911x_local *lp = netdev_priv(dev);
1343 unsigned long ioaddr = dev->base_addr;
1344 int status, mask;
1345 unsigned long flags;
1346
1347 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1348
1349 spin_lock_irqsave(&lp->lock, flags);
1350 status = SMC_GET_INT();
1351 mask = SMC_GET_INT_EN();
1352 spin_unlock_irqrestore(&lp->lock, flags);
1353 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
1354 dev->name, status, mask);
1355
1356 /* Dump the current TX FIFO contents and restart */
d5498bef
JG		 1357 mask = SMC_GET_TX_CFG();
1358 SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
0a0c72c9
DM		 1359 /*
1360 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1361 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1362 * which calls schedule(). Hence we use a work queue.
1363 */
1364 if (lp->phy_type != 0) {
1365 if (schedule_work(&lp->phy_configure)) {
1366 lp->work_pending = 1;
1367 }
1368 }
1369
1370 /* We can accept TX packets again */
1371 dev->trans_start = jiffies;
1372 netif_wake_queue(dev);
1373}
1374
1375/*
1376 * This routine will, depending on the values passed to it,
1377 * either make it accept multicast packets, go into
1378 * promiscuous mode (for TCPDUMP and cousins) or accept
1379 * a select set of multicast packets
1380 */
1381static void smc911x_set_multicast_list(struct net_device *dev)
1382{
1383 struct smc911x_local *lp = netdev_priv(dev);
1384 unsigned long ioaddr = dev->base_addr;
1385 unsigned int multicast_table[2];
1386 unsigned int mcr, update_multicast = 0;
1387 unsigned long flags;
1388 /* table for flipping the order of 5 bits */
d5498bef 1389 static const unsigned char invert5[] =
0a0c72c9
DM		 1390 {0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C,
1391 0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E,
1392 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D,
1393 0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F};
1394
1395
1396 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1397
1398 spin_lock_irqsave(&lp->lock, flags);
1399 SMC_GET_MAC_CR(mcr);
1400 spin_unlock_irqrestore(&lp->lock, flags);
1401
1402 if (dev->flags & IFF_PROMISC) {
1403
1404 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1405 mcr |= MAC_CR_PRMS_;
1406 }
1407 /*
1408 * Here, I am setting this to accept all multicast packets.
1409 * I don't need to zero the multicast table, because the flag is
1410 * checked before the table is
1411 */
1412 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1413 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1414 mcr |= MAC_CR_MCPAS_;
1415 }
1416
1417 /*
1418 * This sets the internal hardware table to filter out unwanted
1419 * multicast packets before they take up memory.
1420 *
1421 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1422 * address are the offset into the table. If that bit is 1, then the
1423 * multicast packet is accepted. Otherwise, it's dropped silently.
1424 *
1425 * To use the 6 bits as an offset into the table, the high 1 bit is
1426 * the number of the 32 bit register, while the low 5 bits are the bit
1427 * within that register.
1428 */
1429 else if (dev->mc_count) {
1430 int i;
1431 struct dev_mc_list *cur_addr;
1432
1433 /* Set the Hash perfec mode */
1434 mcr |= MAC_CR_HPFILT_;
1435
1436 /* start with a table of all zeros: reject all */
1437 memset(multicast_table, 0, sizeof(multicast_table));
1438
1439 cur_addr = dev->mc_list;
1440 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1441 int position;
1442
1443 /* do we have a pointer here? */
1444 if (!cur_addr)
1445 break;
1446 /* make sure this is a multicast address -
1447 shouldn't this be a given if we have it here ? */
1448 if (!(*cur_addr->dmi_addr & 1))
1449 continue;
1450
1451 /* only use the low order bits */
1452 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1453
1454 /* do some messy swapping to put the bit in the right spot */
1455 multicast_table[invert5[position&0x1F]&0x1] |=
1456 (1<<invert5[(position>>1)&0x1F]);
1457 }
1458
1459 /* be sure I get rid of flags I might have set */
1460 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1461
1462 /* now, the table can be loaded into the chipset */
1463 update_multicast = 1;
1464 } else {
d5498bef 1465 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
0a0c72c9
DM		 1466 dev->name);
1467 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1468
1469 /*
1470 * since I'm disabling all multicast entirely, I need to
1471 * clear the multicast list
1472 */
1473 memset(multicast_table, 0, sizeof(multicast_table));
1474 update_multicast = 1;
1475 }
1476
1477 spin_lock_irqsave(&lp->lock, flags);
1478 SMC_SET_MAC_CR(mcr);
1479 if (update_multicast) {
d5498bef
JG		 1480 DBG(SMC_DEBUG_MISC,
1481 "%s: update mcast hash table 0x%08x 0x%08x\n",
0a0c72c9
DM		 1482 dev->name, multicast_table[0], multicast_table[1]);
1483 SMC_SET_HASHL(multicast_table[0]);
1484 SMC_SET_HASHH(multicast_table[1]);
1485 }
1486 spin_unlock_irqrestore(&lp->lock, flags);
1487}
1488
1489
1490/*
1491 * Open and Initialize the board
1492 *
1493 * Set up everything, reset the card, etc..
1494 */
1495static int
1496smc911x_open(struct net_device *dev)
1497{
1498 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1499
1500 /*
1501 * Check that the address is valid. If its not, refuse
1502 * to bring the device up. The user must specify an
1503 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1504 */
1505 if (!is_valid_ether_addr(dev->dev_addr)) {
1506 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1507 return -EINVAL;
1508 }
1509
1510 /* reset the hardware */
1511 smc911x_reset(dev);
1512
1513 /* Configure the PHY, initialize the link state */
1514 smc911x_phy_configure(dev);
1515
1516 /* Turn on Tx + Rx */
1517 smc911x_enable(dev);
1518
1519 netif_start_queue(dev);
1520
1521 return 0;
1522}
1523
1524/*
1525 * smc911x_close
1526 *
1527 * this makes the board clean up everything that it can
1528 * and not talk to the outside world. Caused by
1529 * an 'ifconfig ethX down'
1530 */
1531static int smc911x_close(struct net_device *dev)
1532{
1533 struct smc911x_local *lp = netdev_priv(dev);
1534
1535 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1536
1537 netif_stop_queue(dev);
1538 netif_carrier_off(dev);
1539
1540 /* clear everything */
1541 smc911x_shutdown(dev);
1542
1543 if (lp->phy_type != 0) {
1544 /* We need to ensure that no calls to
1545 * smc911x_phy_configure are pending.
1546
1547 * flush_scheduled_work() cannot be called because we
1548 * are running with the netlink semaphore held (from
1549 * devinet_ioctl()) and the pending work queue
1550 * contains linkwatch_event() (scheduled by
1551 * netif_carrier_off() above). linkwatch_event() also
1552 * wants the netlink semaphore.
1553 */
1554 while (lp->work_pending)
1555 schedule();
1556 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1557 }
1558
1559 if (lp->pending_tx_skb) {
1560 dev_kfree_skb(lp->pending_tx_skb);
1561 lp->pending_tx_skb = NULL;
1562 }
1563
1564 return 0;
1565}
1566
1567/*
1568 * Get the current statistics.
1569 * This may be called with the card open or closed.
1570 */
1571static struct net_device_stats *smc911x_query_statistics(struct net_device *dev)
1572{
1573 struct smc911x_local *lp = netdev_priv(dev);
1574 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1575
1576
1577 return &lp->stats;
1578}
1579
1580/*
1581 * Ethtool support
1582 */
1583static int
1584smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1585{
1586 struct smc911x_local *lp = netdev_priv(dev);
1587 unsigned long ioaddr = dev->base_addr;
1588 int ret, status;
1589 unsigned long flags;
1590
1591 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1592 cmd->maxtxpkt = 1;
1593 cmd->maxrxpkt = 1;
1594
1595 if (lp->phy_type != 0) {
1596 spin_lock_irqsave(&lp->lock, flags);
1597 ret = mii_ethtool_gset(&lp->mii, cmd);
1598 spin_unlock_irqrestore(&lp->lock, flags);
1599 } else {
1600 cmd->supported = SUPPORTED_10baseT_Half |
1601 SUPPORTED_10baseT_Full |
1602 SUPPORTED_TP | SUPPORTED_AUI;
1603
1604 if (lp->ctl_rspeed == 10)
1605 cmd->speed = SPEED_10;
1606 else if (lp->ctl_rspeed == 100)
1607 cmd->speed = SPEED_100;
1608
1609 cmd->autoneg = AUTONEG_DISABLE;
1610 if (lp->mii.phy_id==1)
1611 cmd->transceiver = XCVR_INTERNAL;
1612 else
1613 cmd->transceiver = XCVR_EXTERNAL;
1614 cmd->port = 0;
1615 SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
d5498bef
JG		 1616 cmd->duplex =
1617 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
0a0c72c9
DM		 1618 DUPLEX_FULL : DUPLEX_HALF;
1619 ret = 0;
1620 }
1621
1622 return ret;
1623}
1624
1625static int
1626smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1627{
1628 struct smc911x_local *lp = netdev_priv(dev);
1629 int ret;
1630 unsigned long flags;
1631
1632 if (lp->phy_type != 0) {
1633 spin_lock_irqsave(&lp->lock, flags);
1634 ret = mii_ethtool_sset(&lp->mii, cmd);
1635 spin_unlock_irqrestore(&lp->lock, flags);
1636 } else {
1637 if (cmd->autoneg != AUTONEG_DISABLE ||
1638 cmd->speed != SPEED_10 ||
1639 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1640 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1641 return -EINVAL;
1642
1643 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1644
1645 ret = 0;
1646 }
1647
1648 return ret;
1649}
1650
1651static void
1652smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1653{
1654 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1655 strncpy(info->version, version, sizeof(info->version));
1656 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1657}
1658
1659static int smc911x_ethtool_nwayreset(struct net_device *dev)
1660{
1661 struct smc911x_local *lp = netdev_priv(dev);
1662 int ret = -EINVAL;
1663 unsigned long flags;
1664
1665 if (lp->phy_type != 0) {
1666 spin_lock_irqsave(&lp->lock, flags);
1667 ret = mii_nway_restart(&lp->mii);
1668 spin_unlock_irqrestore(&lp->lock, flags);
1669 }
1670
1671 return ret;
1672}
1673
1674static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1675{
1676 struct smc911x_local *lp = netdev_priv(dev);
1677 return lp->msg_enable;
1678}
1679
1680static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1681{
1682 struct smc911x_local *lp = netdev_priv(dev);
1683 lp->msg_enable = level;
1684}
1685
1686static int smc911x_ethtool_getregslen(struct net_device *dev)
1687{
1688 /* System regs + MAC regs + PHY regs */
d5498bef
JG		 1689 return (((E2P_CMD - ID_REV)/4 + 1) +
1690 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
0a0c72c9
DM		 1691}
1692
d5498bef 1693static void smc911x_ethtool_getregs(struct net_device *dev,
0a0c72c9
DM		 1694 struct ethtool_regs* regs, void *buf)
1695{
1696 unsigned long ioaddr = dev->base_addr;
1697 struct smc911x_local *lp = netdev_priv(dev);
1698 unsigned long flags;
1699 u32 reg,i,j=0;
1700 u32 *data = (u32*)buf;
1701
1702 regs->version = lp->version;
1703 for(i=ID_REV;i<=E2P_CMD;i+=4) {
d5498bef 1704 data[j++] = SMC_inl(ioaddr,i);
0a0c72c9
DM		 1705 }
1706 for(i=MAC_CR;i<=WUCSR;i++) {
1707 spin_lock_irqsave(&lp->lock, flags);
1708 SMC_GET_MAC_CSR(i, reg);
1709 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef 1710 data[j++] = reg;
0a0c72c9
DM		 1711 }
1712 for(i=0;i<=31;i++) {
1713 spin_lock_irqsave(&lp->lock, flags);
1714 SMC_GET_MII(i, lp->mii.phy_id, reg);
1715 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef 1716 data[j++] = reg & 0xFFFF;
0a0c72c9
DM		 1717 }
1718}
1719
1720static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1721{
1722 unsigned long ioaddr = dev->base_addr;
1723 unsigned int timeout;
1724 int e2p_cmd;
1725
1726 e2p_cmd = SMC_GET_E2P_CMD();
1727 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1728 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
d5498bef 1729 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
0a0c72c9
DM		 1730 dev->name, __FUNCTION__);
1731 return -EFAULT;
d5498bef 1732 }
0a0c72c9
DM		 1733 mdelay(1);
1734 e2p_cmd = SMC_GET_E2P_CMD();
1735 }
1736 if (timeout == 0) {
d5498bef 1737 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
0a0c72c9
DM		 1738 dev->name, __FUNCTION__);
1739 return -ETIMEDOUT;
1740 }
1741 return 0;
1742}
1743
d5498bef 1744static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
0a0c72c9
DM		 1745 int cmd, int addr)
1746{
1747 unsigned long ioaddr = dev->base_addr;
1748 int ret;
1749
d5498bef 1750 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1751 return ret;
d5498bef
JG		 1752 SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
1753 ((cmd) & (0x7<<28)) |
0a0c72c9
DM		 1754 ((addr) & 0xFF));
1755 return 0;
1756}
1757
d5498bef 1758static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
0a0c72c9
DM		 1759 u8 *data)
1760{
1761 unsigned long ioaddr = dev->base_addr;
1762 int ret;
1763
d5498bef 1764 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9
DM		 1765 return ret;
1766 *data = SMC_GET_E2P_DATA();
1767 return 0;
1768}
1769
d5498bef 1770static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
0a0c72c9
DM		 1771 u8 data)
1772{
1773 unsigned long ioaddr = dev->base_addr;
1774 int ret;
1775
d5498bef 1776 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9
DM		 1777 return ret;
1778 SMC_SET_E2P_DATA(data);
1779 return 0;
1780}
1781
d5498bef 1782static int smc911x_ethtool_geteeprom(struct net_device *dev,
0a0c72c9
DM		 1783 struct ethtool_eeprom *eeprom, u8 *data)
1784{
1785 u8 eebuf[SMC911X_EEPROM_LEN];
1786 int i, ret;
1787
1788 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1789 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1790 return ret;
1791 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1792 return ret;
1793 }
1794 memcpy(data, eebuf+eeprom->offset, eeprom->len);
d5498bef 1795 return 0;
0a0c72c9
DM		 1796}
1797
d5498bef 1798static int smc911x_ethtool_seteeprom(struct net_device *dev,
0a0c72c9
DM		 1799 struct ethtool_eeprom *eeprom, u8 *data)
1800{
1801 int i, ret;
1802
1803 /* Enable erase */
1804 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1805 return ret;
1806 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1807 /* erase byte */
1808 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1809 return ret;
1810 /* write byte */
1811 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1812 return ret;
1813 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1814 return ret;
1815 }
1816 return 0;
1817}
1818
1819static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1820{
1821 return SMC911X_EEPROM_LEN;
1822}
1823
7282d491 1824static const struct ethtool_ops smc911x_ethtool_ops = {
0a0c72c9
DM		 1825 .get_settings = smc911x_ethtool_getsettings,
1826 .set_settings = smc911x_ethtool_setsettings,
1827 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1828 .get_msglevel = smc911x_ethtool_getmsglevel,
1829 .set_msglevel = smc911x_ethtool_setmsglevel,
1830 .nway_reset = smc911x_ethtool_nwayreset,
1831 .get_link = ethtool_op_get_link,
1832 .get_regs_len = smc911x_ethtool_getregslen,
1833 .get_regs = smc911x_ethtool_getregs,
1834 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1835 .get_eeprom = smc911x_ethtool_geteeprom,
1836 .set_eeprom = smc911x_ethtool_seteeprom,
1837};
1838
1839/*
1840 * smc911x_findirq
1841 *
1842 * This routine has a simple purpose -- make the SMC chip generate an
1843 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1844 */
1845static int __init smc911x_findirq(unsigned long ioaddr)
1846{
1847 int timeout = 20;
1848 unsigned long cookie;
1849
1850 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
1851
1852 cookie = probe_irq_on();
1853
1854 /*
1855 * Force a SW interrupt
1856 */
1857
1858 SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
1859
1860 /*
1861 * Wait until positive that the interrupt has been generated
1862 */
1863 do {
1864 int int_status;
1865 udelay(10);
1866 int_status = SMC_GET_INT_EN();
1867 if (int_status & INT_EN_SW_INT_EN_)
1868 break; /* got the interrupt */
1869 } while (--timeout);
1870
1871 /*
1872 * there is really nothing that I can do here if timeout fails,
1873 * as autoirq_report will return a 0 anyway, which is what I
1874 * want in this case. Plus, the clean up is needed in both
1875 * cases.
1876 */
1877
1878 /* and disable all interrupts again */
1879 SMC_SET_INT_EN(0);
1880
1881 /* and return what I found */
1882 return probe_irq_off(cookie);
1883}
1884
1885/*
1886 * Function: smc911x_probe(unsigned long ioaddr)
1887 *
1888 * Purpose:
1889 * Tests to see if a given ioaddr points to an SMC911x chip.
1890 * Returns a 0 on success
1891 *
1892 * Algorithm:
1893 * (1) see if the endian word is OK
1894 * (1) see if I recognize the chip ID in the appropriate register
1895 *
1896 * Here I do typical initialization tasks.
1897 *
1898 * o Initialize the structure if needed
1899 * o print out my vanity message if not done so already
1900 * o print out what type of hardware is detected
1901 * o print out the ethernet address
1902 * o find the IRQ
1903 * o set up my private data
1904 * o configure the dev structure with my subroutines
1905 * o actually GRAB the irq.
1906 * o GRAB the region
1907 */
1908static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
1909{
1910 struct smc911x_local *lp = netdev_priv(dev);
1911 int i, retval;
1912 unsigned int val, chip_id, revision;
1913 const char *version_string;
1914
1915 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1916
1917 /* First, see if the endian word is recognized */
1918 val = SMC_GET_BYTE_TEST();
1919 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1920 if (val != 0x87654321) {
1921 printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
1922 retval = -ENODEV;
1923 goto err_out;
1924 }
1925
1926 /*
1927 * check if the revision register is something that I
1928 * recognize. These might need to be added to later,
1929 * as future revisions could be added.
1930 */
1931 chip_id = SMC_GET_PN();
1932 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1933 for(i=0;chip_ids[i].id != 0; i++) {
1934 if (chip_ids[i].id == chip_id) break;
1935 }
1936 if (!chip_ids[i].id) {
1937 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1938 retval = -ENODEV;
1939 goto err_out;
1940 }
1941 version_string = chip_ids[i].name;
1942
1943 revision = SMC_GET_REV();
1944 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1945
1946 /* At this point I'll assume that the chip is an SMC911x. */
1947 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1948
1949 /* Validate the TX FIFO size requested */
1950 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1951 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1952 retval = -EINVAL;
1953 goto err_out;
1954 }
d5498bef 1955
0a0c72c9
DM		 1956 /* fill in some of the fields */
1957 dev->base_addr = ioaddr;
1958 lp->version = chip_ids[i].id;
1959 lp->revision = revision;
1960 lp->tx_fifo_kb = tx_fifo_kb;
1961 /* Reverse calculate the RX FIFO size from the TX */
1962 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1963 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1964
1965 /* Set the automatic flow control values */
1966 switch(lp->tx_fifo_kb) {
d5498bef 1967 /*
0a0c72c9
DM		 1968 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1969 * AFC_LO is AFC_HI/2
1970 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1971 */
1972 case 2:/* 13440 Rx Data Fifo Size */
1973 lp->afc_cfg=0x008C46AF;break;
1974 case 3:/* 12480 Rx Data Fifo Size */
1975 lp->afc_cfg=0x0082419F;break;
1976 case 4:/* 11520 Rx Data Fifo Size */
1977 lp->afc_cfg=0x00783C9F;break;
1978 case 5:/* 10560 Rx Data Fifo Size */
1979 lp->afc_cfg=0x006E374F;break;
1980 case 6:/* 9600 Rx Data Fifo Size */
1981 lp->afc_cfg=0x0064328F;break;
1982 case 7:/* 8640 Rx Data Fifo Size */
1983 lp->afc_cfg=0x005A2D7F;break;
1984 case 8:/* 7680 Rx Data Fifo Size */
1985 lp->afc_cfg=0x0050287F;break;
1986 case 9:/* 6720 Rx Data Fifo Size */
1987 lp->afc_cfg=0x0046236F;break;
1988 case 10:/* 5760 Rx Data Fifo Size */
1989 lp->afc_cfg=0x003C1E6F;break;
1990 case 11:/* 4800 Rx Data Fifo Size */
1991 lp->afc_cfg=0x0032195F;break;
d5498bef 1992 /*
0a0c72c9
DM		 1993 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1994 * AFC_LO is AFC_HI/2
1995 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1996 */
1997 case 12:/* 3840 Rx Data Fifo Size */
1998 lp->afc_cfg=0x0024124F;break;
1999 case 13:/* 2880 Rx Data Fifo Size */
2000 lp->afc_cfg=0x0015073F;break;
2001 case 14:/* 1920 Rx Data Fifo Size */
2002 lp->afc_cfg=0x0006032F;break;
2003 default:
d5498bef 2004 PRINTK("%s: ERROR -- no AFC_CFG setting found",
0a0c72c9
DM		 2005 dev->name);
2006 break;
2007 }
2008
d5498bef
JG		 2009 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
2010 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
0a0c72c9
DM		 2011 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
2012
2013 spin_lock_init(&lp->lock);
2014
2015 /* Get the MAC address */
2016 SMC_GET_MAC_ADDR(dev->dev_addr);
2017
2018 /* now, reset the chip, and put it into a known state */
2019 smc911x_reset(dev);
2020
2021 /*
2022 * If dev->irq is 0, then the device has to be banged on to see
2023 * what the IRQ is.
2024 *
2025 * Specifying an IRQ is done with the assumption that the user knows
2026 * what (s)he is doing. No checking is done!!!!
2027 */
2028 if (dev->irq < 1) {
2029 int trials;
2030
2031 trials = 3;
2032 while (trials--) {
2033 dev->irq = smc911x_findirq(ioaddr);
2034 if (dev->irq)
2035 break;
2036 /* kick the card and try again */
2037 smc911x_reset(dev);
2038 }
2039 }
2040 if (dev->irq == 0) {
2041 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
2042 dev->name);
2043 retval = -ENODEV;
2044 goto err_out;
2045 }
2046 dev->irq = irq_canonicalize(dev->irq);
2047
2048 /* Fill in the fields of the device structure with ethernet values. */
2049 ether_setup(dev);
2050
2051 dev->open = smc911x_open;
2052 dev->stop = smc911x_close;
2053 dev->hard_start_xmit = smc911x_hard_start_xmit;
2054 dev->tx_timeout = smc911x_timeout;
2055 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
2056 dev->get_stats = smc911x_query_statistics;
2057 dev->set_multicast_list = smc911x_set_multicast_list;
2058 dev->ethtool_ops = &smc911x_ethtool_ops;
2059#ifdef CONFIG_NET_POLL_CONTROLLER
2060 dev->poll_controller = smc911x_poll_controller;
2061#endif
2062
2063 INIT_WORK(&lp->phy_configure, smc911x_phy_configure, dev);
2064 lp->mii.phy_id_mask = 0x1f;
2065 lp->mii.reg_num_mask = 0x1f;
2066 lp->mii.force_media = 0;
2067 lp->mii.full_duplex = 0;
2068 lp->mii.dev = dev;
2069 lp->mii.mdio_read = smc911x_phy_read;
2070 lp->mii.mdio_write = smc911x_phy_write;
2071
2072 /*
2073 * Locate the phy, if any.
2074 */
2075 smc911x_phy_detect(dev);
2076
2077 /* Set default parameters */
2078 lp->msg_enable = NETIF_MSG_LINK;
2079 lp->ctl_rfduplx = 1;
2080 lp->ctl_rspeed = 100;
2081
2082 /* Grab the IRQ */
1fb9df5d 2083 retval = request_irq(dev->irq, &smc911x_interrupt, IRQF_SHARED, dev->name, dev);
0a0c72c9
DM		 2084 if (retval)
2085 goto err_out;
2086
2087 set_irq_type(dev->irq, IRQT_FALLING);
2088
2089#ifdef SMC_USE_DMA
2090 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
2091 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
2092 lp->rxdma_active = 0;
2093 lp->txdma_active = 0;
2094 dev->dma = lp->rxdma;
2095#endif
2096
2097 retval = register_netdev(dev);
2098 if (retval == 0) {
2099 /* now, print out the card info, in a short format.. */
2100 printk("%s: %s (rev %d) at %#lx IRQ %d",
2101 dev->name, version_string, lp->revision,
2102 dev->base_addr, dev->irq);
2103
2104#ifdef SMC_USE_DMA
2105 if (lp->rxdma != -1)
2106 printk(" RXDMA %d ", lp->rxdma);
2107
2108 if (lp->txdma != -1)
2109 printk("TXDMA %d", lp->txdma);
2110#endif
2111 printk("\n");
2112 if (!is_valid_ether_addr(dev->dev_addr)) {
2113 printk("%s: Invalid ethernet MAC address. Please "
2114 "set using ifconfig\n", dev->name);
2115 } else {
2116 /* Print the Ethernet address */
2117 printk("%s: Ethernet addr: ", dev->name);
2118 for (i = 0; i < 5; i++)
2119 printk("%2.2x:", dev->dev_addr[i]);
2120 printk("%2.2x\n", dev->dev_addr[5]);
2121 }
2122
2123 if (lp->phy_type == 0) {
2124 PRINTK("%s: No PHY found\n", dev->name);
2125 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2126 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2127 } else {
2128 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2129 }
2130 }
d5498bef 2131
0a0c72c9
DM		 2132err_out:
2133#ifdef SMC_USE_DMA
2134 if (retval) {
2135 if (lp->rxdma != -1) {
2136 SMC_DMA_FREE(dev, lp->rxdma);
2137 }
2138 if (lp->txdma != -1) {
2139 SMC_DMA_FREE(dev, lp->txdma);
2140 }
2141 }
2142#endif
2143 return retval;
2144}
2145
2146/*
2147 * smc911x_init(void)
2148 *
2149 * Output:
2150 * 0 --> there is a device
2151 * anything else, error
2152 */
2153static int smc911x_drv_probe(struct platform_device *pdev)
2154{
2155 struct net_device *ndev;
2156 struct resource *res;
2157 unsigned int *addr;
2158 int ret;
2159
2160 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2161 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2162 if (!res) {
2163 ret = -ENODEV;
2164 goto out;
2165 }
2166
2167 /*
2168 * Request the regions.
2169 */
2170 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2171 ret = -EBUSY;
2172 goto out;
2173 }
2174
2175 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2176 if (!ndev) {
2177 printk("%s: could not allocate device.\n", CARDNAME);
2178 ret = -ENOMEM;
2179 goto release_1;
2180 }
2181 SET_MODULE_OWNER(ndev);
2182 SET_NETDEV_DEV(ndev, &pdev->dev);
2183
2184 ndev->dma = (unsigned char)-1;
2185 ndev->irq = platform_get_irq(pdev, 0);
2186
2187 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2188 if (!addr) {
2189 ret = -ENOMEM;
2190 goto release_both;
2191 }
2192
2193 platform_set_drvdata(pdev, ndev);
2194 ret = smc911x_probe(ndev, (unsigned long)addr);
2195 if (ret != 0) {
2196 platform_set_drvdata(pdev, NULL);
2197 iounmap(addr);
2198release_both:
2199 free_netdev(ndev);
2200release_1:
2201 release_mem_region(res->start, SMC911X_IO_EXTENT);
2202out:
2203 printk("%s: not found (%d).\n", CARDNAME, ret);
2204 }
2205#ifdef SMC_USE_DMA
2206 else {
2207 struct smc911x_local *lp = netdev_priv(ndev);
2208 lp->physaddr = res->start;
2209 lp->dev = &pdev->dev;
2210 }
2211#endif
2212
2213 return ret;
2214}
2215
2216static int smc911x_drv_remove(struct platform_device *pdev)
2217{
2218 struct net_device *ndev = platform_get_drvdata(pdev);
2219 struct resource *res;
2220
2221 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2222 platform_set_drvdata(pdev, NULL);
2223
2224 unregister_netdev(ndev);
2225
2226 free_irq(ndev->irq, ndev);
2227
2228#ifdef SMC_USE_DMA
2229 {
2230 struct smc911x_local *lp = netdev_priv(ndev);
2231 if (lp->rxdma != -1) {
2232 SMC_DMA_FREE(dev, lp->rxdma);
2233 }
2234 if (lp->txdma != -1) {
2235 SMC_DMA_FREE(dev, lp->txdma);
2236 }
2237 }
2238#endif
2239 iounmap((void *)ndev->base_addr);
2240 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2241 release_mem_region(res->start, SMC911X_IO_EXTENT);
2242
2243 free_netdev(ndev);
2244 return 0;
2245}
2246
2247static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2248{
2249 struct net_device *ndev = platform_get_drvdata(dev);
2250 unsigned long ioaddr = ndev->base_addr;
2251
2252 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2253 if (ndev) {
2254 if (netif_running(ndev)) {
2255 netif_device_detach(ndev);
2256 smc911x_shutdown(ndev);
2257#if POWER_DOWN
2258 /* Set D2 - Energy detect only setting */
2259 SMC_SET_PMT_CTRL(2<<12);
2260#endif
2261 }
2262 }
2263 return 0;
2264}
2265
2266static int smc911x_drv_resume(struct platform_device *dev)
2267{
2268 struct net_device *ndev = platform_get_drvdata(dev);
2269
2270 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2271 if (ndev) {
2272 struct smc911x_local *lp = netdev_priv(ndev);
2273
2274 if (netif_running(ndev)) {
2275 smc911x_reset(ndev);
2276 smc911x_enable(ndev);
2277 if (lp->phy_type != 0)
2278 smc911x_phy_configure(ndev);
2279 netif_device_attach(ndev);
2280 }
2281 }
2282 return 0;
2283}
2284
2285static struct platform_driver smc911x_driver = {
2286 .probe = smc911x_drv_probe,
2287 .remove = smc911x_drv_remove,
2288 .suspend = smc911x_drv_suspend,
2289 .resume = smc911x_drv_resume,
2290 .driver = {
2291 .name = CARDNAME,
2292 },
2293};
d5498bef 2294
0a0c72c9
DM		 2295static int __init smc911x_init(void)
2296{
2297 return platform_driver_register(&smc911x_driver);
2298}
2299
2300static void __exit smc911x_cleanup(void)
2301{
2302 platform_driver_unregister(&smc911x_driver);
2303}
2304
2305module_init(smc911x_init);
2306module_exit(smc911x_cleanup);
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