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1/*
2 * smc911x.c
3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
4 *
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
d5498bef 7 * and the smsc911x.c reference driver by SMSC
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8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * Arguments:
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
26 *
27 * History:
28 * 04/16/05 Dustin McIntire Initial version
29 */
30static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
32
33/* Debugging options */
34#define ENABLE_SMC_DEBUG_RX 0
35#define ENABLE_SMC_DEBUG_TX 0
36#define ENABLE_SMC_DEBUG_DMA 0
37#define ENABLE_SMC_DEBUG_PKTS 0
38#define ENABLE_SMC_DEBUG_MISC 0
39#define ENABLE_SMC_DEBUG_FUNC 0
40
41#define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42#define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43#define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44#define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45#define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46#define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
47
48#ifndef SMC_DEBUG
49#define SMC_DEBUG ( SMC_DEBUG_RX | \
50 SMC_DEBUG_TX | \
51 SMC_DEBUG_DMA | \
52 SMC_DEBUG_PKTS | \
53 SMC_DEBUG_MISC | \
54 SMC_DEBUG_FUNC \
55 )
56#endif
57
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58#include <linux/init.h>
59#include <linux/module.h>
60#include <linux/kernel.h>
61#include <linux/sched.h>
62#include <linux/slab.h>
63#include <linux/delay.h>
64#include <linux/interrupt.h>
65#include <linux/errno.h>
66#include <linux/ioport.h>
67#include <linux/crc32.h>
68#include <linux/device.h>
69#include <linux/platform_device.h>
70#include <linux/spinlock.h>
71#include <linux/ethtool.h>
72#include <linux/mii.h>
73#include <linux/workqueue.h>
74
75#include <linux/netdevice.h>
76#include <linux/etherdevice.h>
77#include <linux/skbuff.h>
78
79#include <asm/io.h>
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80
81#include "smc911x.h"
82
83/*
84 * Transmit timeout, default 5 seconds.
85 */
86static int watchdog = 5000;
87module_param(watchdog, int, 0400);
88MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
89
90static int tx_fifo_kb=8;
91module_param(tx_fifo_kb, int, 0400);
92MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
93
94MODULE_LICENSE("GPL");
72abb461 95MODULE_ALIAS("platform:smc911x");
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96
97/*
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
101 */
102#define CARDNAME "smc911x"
103
104/*
105 * Use power-down feature of the chip
106 */
107#define POWER_DOWN 1
108
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109#if SMC_DEBUG > 0
110#define DBG(n, args...) \
111 do { \
112 if (SMC_DEBUG & (n)) \
113 printk(args); \
114 } while (0)
115
116#define PRINTK(args...) printk(args)
117#else
118#define DBG(n, args...) do { } while (0)
119#define PRINTK(args...) printk(KERN_DEBUG args)
120#endif
121
122#if SMC_DEBUG_PKTS > 0
123static void PRINT_PKT(u_char *buf, int length)
124{
125 int i;
126 int remainder;
127 int lines;
128
129 lines = length / 16;
130 remainder = length % 16;
131
132 for (i = 0; i < lines ; i ++) {
133 int cur;
134 for (cur = 0; cur < 8; cur++) {
135 u_char a, b;
136 a = *buf++;
137 b = *buf++;
138 printk("%02x%02x ", a, b);
139 }
140 printk("\n");
141 }
142 for (i = 0; i < remainder/2 ; i++) {
143 u_char a, b;
144 a = *buf++;
145 b = *buf++;
146 printk("%02x%02x ", a, b);
147 }
148 printk("\n");
149}
150#else
151#define PRINT_PKT(x...) do { } while (0)
152#endif
153
154
155/* this enables an interrupt in the interrupt mask register */
699559f8 156#define SMC_ENABLE_INT(lp, x) do { \
0a0c72c9 157 unsigned int __mask; \
699559f8 158 __mask = SMC_GET_INT_EN((lp)); \
0a0c72c9 159 __mask |= (x); \
699559f8 160 SMC_SET_INT_EN((lp), __mask); \
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161} while (0)
162
163/* this disables an interrupt from the interrupt mask register */
699559f8 164#define SMC_DISABLE_INT(lp, x) do { \
0a0c72c9 165 unsigned int __mask; \
699559f8 166 __mask = SMC_GET_INT_EN((lp)); \
0a0c72c9 167 __mask &= ~(x); \
699559f8 168 SMC_SET_INT_EN((lp), __mask); \
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169} while (0)
170
171/*
172 * this does a soft reset on the device
173 */
174static void smc911x_reset(struct net_device *dev)
175{
0a0c72c9 176 struct smc911x_local *lp = netdev_priv(dev);
319edafe 177 unsigned int reg, timeout=0, resets=1, irq_cfg;
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178 unsigned long flags;
179
b39d66a8 180 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
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181
182 /* Take out of PM setting first */
699559f8 183 if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
0a0c72c9 184 /* Write to the bytetest will take out of powerdown */
699559f8 185 SMC_SET_BYTE_TEST(lp, 0);
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186 timeout=10;
187 do {
188 udelay(10);
699559f8 189 reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
db2961c5 190 } while (--timeout && !reg);
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191 if (timeout == 0) {
192 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
193 return;
194 }
195 }
196
197 /* Disable all interrupts */
198 spin_lock_irqsave(&lp->lock, flags);
699559f8 199 SMC_SET_INT_EN(lp, 0);
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200 spin_unlock_irqrestore(&lp->lock, flags);
201
202 while (resets--) {
699559f8 203 SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
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204 timeout=10;
205 do {
206 udelay(10);
699559f8 207 reg = SMC_GET_HW_CFG(lp);
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208 /* If chip indicates reset timeout then try again */
209 if (reg & HW_CFG_SRST_TO_) {
210 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
211 resets++;
212 break;
213 }
db2961c5 214 } while (--timeout && (reg & HW_CFG_SRST_));
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215 }
216 if (timeout == 0) {
217 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
218 return;
219 }
220
221 /* make sure EEPROM has finished loading before setting GPIO_CFG */
222 timeout=1000;
46578a69 223 while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
0a0c72c9 224 udelay(10);
46578a69 225
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226 if (timeout == 0){
227 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
228 return;
229 }
230
231 /* Initialize interrupts */
699559f8
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232 SMC_SET_INT_EN(lp, 0);
233 SMC_ACK_INT(lp, -1);
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234
235 /* Reset the FIFO level and flow control settings */
699559f8 236 SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
0a0c72c9 237//TODO: Figure out what appropriate pause time is
699559f8
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238 SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
239 SMC_SET_AFC_CFG(lp, lp->afc_cfg);
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240
241
242 /* Set to LED outputs */
699559f8 243 SMC_SET_GPIO_CFG(lp, 0x70070000);
0a0c72c9 244
d5498bef 245 /*
0a0c72c9 246 * Deassert IRQ for 1*10us for edge type interrupts
d5498bef 247 * and drive IRQ pin push-pull
0a0c72c9 248 */
319edafe
CM
249 irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
250#ifdef SMC_DYNAMIC_BUS_CONFIG
251 if (lp->cfg.irq_polarity)
252 irq_cfg |= INT_CFG_IRQ_POL_;
253#endif
254 SMC_SET_IRQ_CFG(lp, irq_cfg);
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255
256 /* clear anything saved */
257 if (lp->pending_tx_skb != NULL) {
258 dev_kfree_skb (lp->pending_tx_skb);
259 lp->pending_tx_skb = NULL;
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260 dev->stats.tx_errors++;
261 dev->stats.tx_aborted_errors++;
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262 }
263}
264
265/*
266 * Enable Interrupts, Receive, and Transmit
267 */
268static void smc911x_enable(struct net_device *dev)
269{
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270 struct smc911x_local *lp = netdev_priv(dev);
271 unsigned mask, cfg, cr;
272 unsigned long flags;
273
b39d66a8 274 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9 275
b891a902
CM
276 spin_lock_irqsave(&lp->lock, flags);
277
699559f8 278 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
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279
280 /* Enable TX */
699559f8 281 cfg = SMC_GET_HW_CFG(lp);
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282 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
283 cfg |= HW_CFG_SF_;
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MD
284 SMC_SET_HW_CFG(lp, cfg);
285 SMC_SET_FIFO_TDA(lp, 0xFF);
0a0c72c9 286 /* Update TX stats on every 64 packets received or every 1 sec */
699559f8
MD
287 SMC_SET_FIFO_TSL(lp, 64);
288 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
0a0c72c9 289
699559f8 290 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 291 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
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MD
292 SMC_SET_MAC_CR(lp, cr);
293 SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
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294
295 /* Add 2 byte padding to start of packets */
699559f8 296 SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
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297
298 /* Turn on receiver and enable RX */
299 if (cr & MAC_CR_RXEN_)
300 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
301
699559f8 302 SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
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303
304 /* Interrupt on every received packet */
699559f8
MD
305 SMC_SET_FIFO_RSA(lp, 0x01);
306 SMC_SET_FIFO_RSL(lp, 0x00);
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307
308 /* now, enable interrupts */
d5498bef
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309 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
310 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
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311 INT_EN_PHY_INT_EN_;
312 if (IS_REV_A(lp->revision))
313 mask|=INT_EN_RDFL_EN_;
314 else {
315 mask|=INT_EN_RDFO_EN_;
316 }
699559f8 317 SMC_ENABLE_INT(lp, mask);
b891a902
CM
318
319 spin_unlock_irqrestore(&lp->lock, flags);
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320}
321
322/*
323 * this puts the device in an inactive state
324 */
325static void smc911x_shutdown(struct net_device *dev)
326{
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327 struct smc911x_local *lp = netdev_priv(dev);
328 unsigned cr;
329 unsigned long flags;
330
b39d66a8 331 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __func__);
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332
333 /* Disable IRQ's */
699559f8 334 SMC_SET_INT_EN(lp, 0);
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335
336 /* Turn of Rx and TX */
337 spin_lock_irqsave(&lp->lock, flags);
699559f8 338 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 339 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
699559f8
MD
340 SMC_SET_MAC_CR(lp, cr);
341 SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
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342 spin_unlock_irqrestore(&lp->lock, flags);
343}
344
345static inline void smc911x_drop_pkt(struct net_device *dev)
d5498bef 346{
699559f8 347 struct smc911x_local *lp = netdev_priv(dev);
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348 unsigned int fifo_count, timeout, reg;
349
b39d66a8 350 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __func__);
699559f8 351 fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
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352 if (fifo_count <= 4) {
353 /* Manually dump the packet data */
354 while (fifo_count--)
699559f8 355 SMC_GET_RX_FIFO(lp);
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DM
356 } else {
357 /* Fast forward through the bad packet */
699559f8 358 SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
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DM
359 timeout=50;
360 do {
361 udelay(10);
699559f8 362 reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
db2961c5 363 } while (--timeout && reg);
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364 if (timeout == 0) {
365 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
366 }
367 }
368}
369
370/*
371 * This is the procedure to handle the receipt of a packet.
372 * It should be called after checking for packet presence in
d5498bef 373 * the RX status FIFO. It must be called with the spin lock
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374 * already held.
375 */
376static inline void smc911x_rcv(struct net_device *dev)
377{
699559f8 378 struct smc911x_local *lp = netdev_priv(dev);
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379 unsigned int pkt_len, status;
380 struct sk_buff *skb;
381 unsigned char *data;
382
d5498bef 383 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
b39d66a8 384 dev->name, __func__);
699559f8 385 status = SMC_GET_RX_STS_FIFO(lp);
84d57bd6 386 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x\n",
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DM
387 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
388 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
d5498bef 389 if (status & RX_STS_ES_) {
0a0c72c9 390 /* Deal with a bad packet */
09f75cd7 391 dev->stats.rx_errors++;
d5498bef 392 if (status & RX_STS_CRC_ERR_)
09f75cd7 393 dev->stats.rx_crc_errors++;
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DM
394 else {
395 if (status & RX_STS_LEN_ERR_)
09f75cd7 396 dev->stats.rx_length_errors++;
d5498bef 397 if (status & RX_STS_MCAST_)
09f75cd7 398 dev->stats.multicast++;
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DM
399 }
400 /* Remove the bad packet data from the RX FIFO */
401 smc911x_drop_pkt(dev);
402 } else {
403 /* Receive a valid packet */
404 /* Alloc a buffer with extra room for DMA alignment */
405 skb=dev_alloc_skb(pkt_len+32);
406 if (unlikely(skb == NULL)) {
407 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
408 dev->name);
09f75cd7 409 dev->stats.rx_dropped++;
0a0c72c9
DM
410 smc911x_drop_pkt(dev);
411 return;
412 }
d5498bef 413 /* Align IP header to 32 bits
0a0c72c9 414 * Note that the device is configured to add a 2
d5498bef 415 * byte padding to the packet start, so we really
0a0c72c9
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416 * want to write to the orignal data pointer */
417 data = skb->data;
418 skb_reserve(skb, 2);
419 skb_put(skb,pkt_len-4);
420#ifdef SMC_USE_DMA
421 {
422 unsigned int fifo;
423 /* Lower the FIFO threshold if possible */
699559f8 424 fifo = SMC_GET_FIFO_INT(lp);
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DM
425 if (fifo & 0xFF) fifo--;
426 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
427 dev->name, fifo & 0xff);
699559f8 428 SMC_SET_FIFO_INT(lp, fifo);
0a0c72c9 429 /* Setup RX DMA */
699559f8 430 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
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DM
431 lp->rxdma_active = 1;
432 lp->current_rx_skb = skb;
699559f8 433 SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
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434 /* Packet processing deferred to DMA RX interrupt */
435 }
436#else
699559f8
MD
437 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
438 SMC_PULL_DATA(lp, data, pkt_len+2+3);
0a0c72c9 439
b4cf2058 440 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
0a0c72c9 441 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
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442 skb->protocol = eth_type_trans(skb, dev);
443 netif_rx(skb);
09f75cd7
JG
444 dev->stats.rx_packets++;
445 dev->stats.rx_bytes += pkt_len-4;
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446#endif
447 }
448}
449
450/*
451 * This is called to actually send a packet to the chip.
452 */
453static void smc911x_hardware_send_pkt(struct net_device *dev)
454{
455 struct smc911x_local *lp = netdev_priv(dev);
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456 struct sk_buff *skb;
457 unsigned int cmdA, cmdB, len;
458 unsigned char *buf;
0a0c72c9 459
b39d66a8 460 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __func__);
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DM
461 BUG_ON(lp->pending_tx_skb == NULL);
462
463 skb = lp->pending_tx_skb;
464 lp->pending_tx_skb = NULL;
465
d5498bef
JG
466 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
467 /* cmdB {31:16] pkt tag [10:0] length */
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468#ifdef SMC_USE_DMA
469 /* 16 byte buffer alignment mode */
470 buf = (char*)((u32)(skb->data) & ~0xF);
d5498bef 471 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
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472 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
473 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
474 skb->len;
475#else
476 buf = (char*)((u32)skb->data & ~0x3);
d5498bef 477 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
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478 cmdA = (((u32)skb->data & 0x3) << 16) |
479 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
480 skb->len;
481#endif
d5498bef 482 /* tag is packet length so we can use this in stats update later */
0a0c72c9 483 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
d5498bef 484
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485 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
486 dev->name, len, len, buf, cmdA, cmdB);
699559f8
MD
487 SMC_SET_TX_FIFO(lp, cmdA);
488 SMC_SET_TX_FIFO(lp, cmdB);
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489
490 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
491 PRINT_PKT(buf, len <= 64 ? len : 64);
492
493 /* Send pkt via PIO or DMA */
494#ifdef SMC_USE_DMA
495 lp->current_tx_skb = skb;
699559f8 496 SMC_PUSH_DATA(lp, buf, len);
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DM
497 /* DMA complete IRQ will free buffer and set jiffies */
498#else
699559f8 499 SMC_PUSH_DATA(lp, buf, len);
0a0c72c9 500 dev->trans_start = jiffies;
70d9d158 501 dev_kfree_skb_irq(skb);
0a0c72c9 502#endif
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DM
503 if (!lp->tx_throttle) {
504 netif_wake_queue(dev);
505 }
699559f8 506 SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
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DM
507}
508
509/*
510 * Since I am not sure if I will have enough room in the chip's ram
511 * to store the packet, I call this routine which either sends it
512 * now, or set the card to generates an interrupt when ready
513 * for the packet.
514 */
515static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
516{
517 struct smc911x_local *lp = netdev_priv(dev);
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DM
518 unsigned int free;
519 unsigned long flags;
520
d5498bef 521 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
b39d66a8 522 dev->name, __func__);
0a0c72c9 523
b891a902
CM
524 spin_lock_irqsave(&lp->lock, flags);
525
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DM
526 BUG_ON(lp->pending_tx_skb != NULL);
527
699559f8 528 free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
0a0c72c9
DM
529 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
530
531 /* Turn off the flow when running out of space in FIFO */
532 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
d5498bef 533 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
0a0c72c9 534 dev->name, free);
0a0c72c9 535 /* Reenable when at least 1 packet of size MTU present */
699559f8 536 SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
0a0c72c9
DM
537 lp->tx_throttle = 1;
538 netif_stop_queue(dev);
0a0c72c9
DM
539 }
540
d5498bef 541 /* Drop packets when we run out of space in TX FIFO
0a0c72c9 542 * Account for overhead required for:
d5498bef
JG
543 *
544 * Tx command words 8 bytes
0a0c72c9
DM
545 * Start offset 15 bytes
546 * End padding 15 bytes
d5498bef 547 */
0a0c72c9 548 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
d5498bef 549 printk("%s: No Tx free space %d < %d\n",
0a0c72c9
DM
550 dev->name, free, skb->len);
551 lp->pending_tx_skb = NULL;
09f75cd7
JG
552 dev->stats.tx_errors++;
553 dev->stats.tx_dropped++;
b891a902 554 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9 555 dev_kfree_skb(skb);
6ed10654 556 return NETDEV_TX_OK;
0a0c72c9 557 }
d5498bef 558
0a0c72c9
DM
559#ifdef SMC_USE_DMA
560 {
561 /* If the DMA is already running then defer this packet Tx until
d5498bef 562 * the DMA IRQ starts it
0a0c72c9 563 */
0a0c72c9
DM
564 if (lp->txdma_active) {
565 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
566 lp->pending_tx_skb = skb;
567 netif_stop_queue(dev);
568 spin_unlock_irqrestore(&lp->lock, flags);
6ed10654 569 return NETDEV_TX_OK;
0a0c72c9
DM
570 } else {
571 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
572 lp->txdma_active = 1;
573 }
0a0c72c9
DM
574 }
575#endif
576 lp->pending_tx_skb = skb;
577 smc911x_hardware_send_pkt(dev);
b891a902 578 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9 579
6ed10654 580 return NETDEV_TX_OK;
0a0c72c9
DM
581}
582
583/*
584 * This handles a TX status interrupt, which is only called when:
585 * - a TX error occurred, or
586 * - TX of a packet completed.
587 */
588static void smc911x_tx(struct net_device *dev)
589{
0a0c72c9
DM
590 struct smc911x_local *lp = netdev_priv(dev);
591 unsigned int tx_status;
592
d5498bef 593 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
b39d66a8 594 dev->name, __func__);
0a0c72c9
DM
595
596 /* Collect the TX status */
699559f8 597 while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
d5498bef
JG
598 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
599 dev->name,
699559f8
MD
600 (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
601 tx_status = SMC_GET_TX_STS_FIFO(lp);
09f75cd7
JG
602 dev->stats.tx_packets++;
603 dev->stats.tx_bytes+=tx_status>>16;
d5498bef
JG
604 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
605 dev->name, (tx_status & 0xffff0000) >> 16,
0a0c72c9 606 tx_status & 0x0000ffff);
d5498bef 607 /* count Tx errors, but ignore lost carrier errors when in
0a0c72c9 608 * full-duplex mode */
d5498bef 609 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
0a0c72c9 610 !(tx_status & 0x00000306))) {
09f75cd7 611 dev->stats.tx_errors++;
0a0c72c9
DM
612 }
613 if (tx_status & TX_STS_MANY_COLL_) {
09f75cd7
JG
614 dev->stats.collisions+=16;
615 dev->stats.tx_aborted_errors++;
0a0c72c9 616 } else {
09f75cd7 617 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
0a0c72c9
DM
618 }
619 /* carrier error only has meaning for half-duplex communication */
d5498bef 620 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
0a0c72c9 621 !lp->ctl_rfduplx) {
09f75cd7 622 dev->stats.tx_carrier_errors++;
d5498bef 623 }
0a0c72c9 624 if (tx_status & TX_STS_LATE_COLL_) {
09f75cd7
JG
625 dev->stats.collisions++;
626 dev->stats.tx_aborted_errors++;
0a0c72c9
DM
627 }
628 }
629}
630
631
632/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
633/*
634 * Reads a register from the MII Management serial interface
635 */
636
637static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
638{
699559f8 639 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
640 unsigned int phydata;
641
699559f8 642 SMC_GET_MII(lp, phyreg, phyaddr, phydata);
0a0c72c9
DM
643
644 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
b39d66a8 645 __func__, phyaddr, phyreg, phydata);
0a0c72c9
DM
646 return phydata;
647}
648
649
650/*
651 * Writes a register to the MII Management serial interface
652 */
653static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
654 int phydata)
655{
699559f8 656 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
657
658 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
b39d66a8 659 __func__, phyaddr, phyreg, phydata);
0a0c72c9 660
699559f8 661 SMC_SET_MII(lp, phyreg, phyaddr, phydata);
0a0c72c9
DM
662}
663
664/*
665 * Finds and reports the PHY address (115 and 117 have external
666 * PHY interface 118 has internal only
667 */
668static void smc911x_phy_detect(struct net_device *dev)
669{
0a0c72c9
DM
670 struct smc911x_local *lp = netdev_priv(dev);
671 int phyaddr;
672 unsigned int cfg, id1, id2;
673
b39d66a8 674 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
675
676 lp->phy_type = 0;
677
678 /*
679 * Scan all 32 PHY addresses if necessary, starting at
680 * PHY#1 to PHY#31, and then PHY#0 last.
681 */
682 switch(lp->version) {
c6dcb827
GL
683 case CHIP_9115:
684 case CHIP_9117:
685 case CHIP_9215:
686 case CHIP_9217:
699559f8 687 cfg = SMC_GET_HW_CFG(lp);
0a0c72c9
DM
688 if (cfg & HW_CFG_EXT_PHY_DET_) {
689 cfg &= ~HW_CFG_PHY_CLK_SEL_;
690 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
699559f8 691 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
692 udelay(10); /* Wait for clocks to stop */
693
694 cfg |= HW_CFG_EXT_PHY_EN_;
699559f8 695 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
696 udelay(10); /* Wait for clocks to stop */
697
698 cfg &= ~HW_CFG_PHY_CLK_SEL_;
699 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
699559f8 700 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
701 udelay(10); /* Wait for clocks to stop */
702
703 cfg |= HW_CFG_SMI_SEL_;
699559f8 704 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
705
706 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
707
708 /* Read the PHY identifiers */
699559f8
MD
709 SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
710 SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
0a0c72c9
DM
711
712 /* Make sure it is a valid identifier */
d5498bef
JG
713 if (id1 != 0x0000 && id1 != 0xffff &&
714 id1 != 0x8000 && id2 != 0x0000 &&
0a0c72c9
DM
715 id2 != 0xffff && id2 != 0x8000) {
716 /* Save the PHY's address */
717 lp->mii.phy_id = phyaddr & 31;
718 lp->phy_type = id1 << 16 | id2;
719 break;
720 }
721 }
f3073ac7
GL
722 if (phyaddr < 32)
723 /* Found an external PHY */
724 break;
0a0c72c9
DM
725 }
726 default:
727 /* Internal media only */
699559f8
MD
728 SMC_GET_PHY_ID1(lp, 1, id1);
729 SMC_GET_PHY_ID2(lp, 1, id2);
0a0c72c9
DM
730 /* Save the PHY's address */
731 lp->mii.phy_id = 1;
732 lp->phy_type = id1 << 16 | id2;
733 }
734
735 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
736 dev->name, id1, id2, lp->mii.phy_id);
737}
738
739/*
740 * Sets the PHY to a configuration as determined by the user.
741 * Called with spin_lock held.
742 */
743static int smc911x_phy_fixed(struct net_device *dev)
744{
745 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
746 int phyaddr = lp->mii.phy_id;
747 int bmcr;
748
b39d66a8 749 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
750
751 /* Enter Link Disable state */
699559f8 752 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9 753 bmcr |= BMCR_PDOWN;
699559f8 754 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9
DM
755
756 /*
757 * Set our fixed capabilities
758 * Disable auto-negotiation
759 */
760 bmcr &= ~BMCR_ANENABLE;
761 if (lp->ctl_rfduplx)
762 bmcr |= BMCR_FULLDPLX;
763
764 if (lp->ctl_rspeed == 100)
765 bmcr |= BMCR_SPEED100;
766
767 /* Write our capabilities to the phy control register */
699559f8 768 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9
DM
769
770 /* Re-Configure the Receive/Phy Control register */
771 bmcr &= ~BMCR_PDOWN;
699559f8 772 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9
DM
773
774 return 1;
775}
776
777/*
778 * smc911x_phy_reset - reset the phy
779 * @dev: net device
780 * @phy: phy address
781 *
782 * Issue a software reset for the specified PHY and
783 * wait up to 100ms for the reset to complete. We should
784 * not access the PHY for 50ms after issuing the reset.
785 *
786 * The time to wait appears to be dependent on the PHY.
787 *
788 */
789static int smc911x_phy_reset(struct net_device *dev, int phy)
790{
791 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
792 int timeout;
793 unsigned long flags;
794 unsigned int reg;
795
b39d66a8 796 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
0a0c72c9
DM
797
798 spin_lock_irqsave(&lp->lock, flags);
699559f8 799 reg = SMC_GET_PMT_CTRL(lp);
0a0c72c9
DM
800 reg &= ~0xfffff030;
801 reg |= PMT_CTRL_PHY_RST_;
699559f8 802 SMC_SET_PMT_CTRL(lp, reg);
0a0c72c9
DM
803 spin_unlock_irqrestore(&lp->lock, flags);
804 for (timeout = 2; timeout; timeout--) {
805 msleep(50);
806 spin_lock_irqsave(&lp->lock, flags);
699559f8 807 reg = SMC_GET_PMT_CTRL(lp);
0a0c72c9
DM
808 spin_unlock_irqrestore(&lp->lock, flags);
809 if (!(reg & PMT_CTRL_PHY_RST_)) {
d5498bef 810 /* extra delay required because the phy may
0a0c72c9 811 * not be completed with its reset
d5498bef 812 * when PHY_BCR_RESET_ is cleared. 256us
0a0c72c9
DM
813 * should suffice, but use 500us to be safe
814 */
815 udelay(500);
816 break;
817 }
818 }
819
820 return reg & PMT_CTRL_PHY_RST_;
821}
822
823/*
824 * smc911x_phy_powerdown - powerdown phy
825 * @dev: net device
826 * @phy: phy address
827 *
828 * Power down the specified PHY
829 */
830static void smc911x_phy_powerdown(struct net_device *dev, int phy)
831{
699559f8 832 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
833 unsigned int bmcr;
834
835 /* Enter Link Disable state */
699559f8 836 SMC_GET_PHY_BMCR(lp, phy, bmcr);
0a0c72c9 837 bmcr |= BMCR_PDOWN;
699559f8 838 SMC_SET_PHY_BMCR(lp, phy, bmcr);
0a0c72c9
DM
839}
840
841/*
842 * smc911x_phy_check_media - check the media status and adjust BMCR
843 * @dev: net device
844 * @init: set true for initialisation
845 *
846 * Select duplex mode depending on negotiation state. This
847 * also updates our carrier state.
848 */
849static void smc911x_phy_check_media(struct net_device *dev, int init)
850{
851 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
852 int phyaddr = lp->mii.phy_id;
853 unsigned int bmcr, cr;
854
b39d66a8 855 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
856
857 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
858 /* duplex state has changed */
699559f8
MD
859 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
860 SMC_GET_MAC_CR(lp, cr);
0a0c72c9
DM
861 if (lp->mii.full_duplex) {
862 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
863 bmcr |= BMCR_FULLDPLX;
864 cr |= MAC_CR_RCVOWN_;
865 } else {
866 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
867 bmcr &= ~BMCR_FULLDPLX;
868 cr &= ~MAC_CR_RCVOWN_;
869 }
699559f8
MD
870 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
871 SMC_SET_MAC_CR(lp, cr);
0a0c72c9
DM
872 }
873}
874
875/*
876 * Configures the specified PHY through the MII management interface
877 * using Autonegotiation.
878 * Calls smc911x_phy_fixed() if the user has requested a certain config.
879 * If RPC ANEG bit is set, the media selection is dependent purely on
880 * the selection by the MII (either in the MII BMCR reg or the result
881 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
882 * is controlled by the RPC SPEED and RPC DPLX bits.
883 */
ef8142a5 884static void smc911x_phy_configure(struct work_struct *work)
0a0c72c9 885{
ef8142a5
AM
886 struct smc911x_local *lp = container_of(work, struct smc911x_local,
887 phy_configure);
888 struct net_device *dev = lp->netdev;
0a0c72c9
DM
889 int phyaddr = lp->mii.phy_id;
890 int my_phy_caps; /* My PHY capabilities */
891 int my_ad_caps; /* My Advertised capabilities */
892 int status;
893 unsigned long flags;
894
b39d66a8 895 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
0a0c72c9
DM
896
897 /*
898 * We should not be called if phy_type is zero.
899 */
900 if (lp->phy_type == 0)
4bb073c0 901 return;
0a0c72c9
DM
902
903 if (smc911x_phy_reset(dev, phyaddr)) {
904 printk("%s: PHY reset timed out\n", dev->name);
4bb073c0 905 return;
0a0c72c9
DM
906 }
907 spin_lock_irqsave(&lp->lock, flags);
908
909 /*
910 * Enable PHY Interrupts (for register 18)
911 * Interrupts listed here are enabled
912 */
699559f8 913 SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
0a0c72c9
DM
914 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
915 PHY_INT_MASK_LINK_DOWN_);
916
917 /* If the user requested no auto neg, then go set his request */
918 if (lp->mii.force_media) {
919 smc911x_phy_fixed(dev);
920 goto smc911x_phy_configure_exit;
921 }
922
923 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
699559f8 924 SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
0a0c72c9
DM
925 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
926 printk(KERN_INFO "Auto negotiation NOT supported\n");
927 smc911x_phy_fixed(dev);
928 goto smc911x_phy_configure_exit;
929 }
930
931 /* CSMA capable w/ both pauses */
932 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
933
934 if (my_phy_caps & BMSR_100BASE4)
935 my_ad_caps |= ADVERTISE_100BASE4;
936 if (my_phy_caps & BMSR_100FULL)
937 my_ad_caps |= ADVERTISE_100FULL;
938 if (my_phy_caps & BMSR_100HALF)
939 my_ad_caps |= ADVERTISE_100HALF;
940 if (my_phy_caps & BMSR_10FULL)
941 my_ad_caps |= ADVERTISE_10FULL;
942 if (my_phy_caps & BMSR_10HALF)
943 my_ad_caps |= ADVERTISE_10HALF;
944
945 /* Disable capabilities not selected by our user */
946 if (lp->ctl_rspeed != 100)
947 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
948
949 if (!lp->ctl_rfduplx)
950 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
951
952 /* Update our Auto-Neg Advertisement Register */
699559f8 953 SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
0a0c72c9
DM
954 lp->mii.advertising = my_ad_caps;
955
956 /*
957 * Read the register back. Without this, it appears that when
958 * auto-negotiation is restarted, sometimes it isn't ready and
959 * the link does not come up.
960 */
961 udelay(10);
699559f8 962 SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
0a0c72c9
DM
963
964 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
965 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
966
967 /* Restart auto-negotiation process in order to advertise my caps */
699559f8 968 SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
0a0c72c9
DM
969
970 smc911x_phy_check_media(dev, 1);
971
972smc911x_phy_configure_exit:
973 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9
DM
974}
975
976/*
977 * smc911x_phy_interrupt
978 *
979 * Purpose: Handle interrupts relating to PHY register 18. This is
980 * called from the "hard" interrupt handler under our private spinlock.
981 */
982static void smc911x_phy_interrupt(struct net_device *dev)
983{
984 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
985 int phyaddr = lp->mii.phy_id;
986 int status;
987
b39d66a8 988 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
989
990 if (lp->phy_type == 0)
991 return;
992
993 smc911x_phy_check_media(dev, 0);
994 /* read to clear status bits */
699559f8 995 SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
d5498bef 996 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
0a0c72c9 997 dev->name, status & 0xffff);
d5498bef 998 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
699559f8 999 dev->name, SMC_GET_AFC_CFG(lp));
0a0c72c9
DM
1000}
1001
1002/*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1003
1004/*
1005 * This is the main routine of the driver, to handle the device when
1006 * it needs some attention.
1007 */
7d12e780 1008static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
0a0c72c9
DM
1009{
1010 struct net_device *dev = dev_id;
0a0c72c9
DM
1011 struct smc911x_local *lp = netdev_priv(dev);
1012 unsigned int status, mask, timeout;
1013 unsigned int rx_overrun=0, cr, pkts;
1014 unsigned long flags;
1015
b39d66a8 1016 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1017
1018 spin_lock_irqsave(&lp->lock, flags);
1019
1020 /* Spurious interrupt check */
699559f8 1021 if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
0a0c72c9 1022 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
a4d09272 1023 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9
DM
1024 return IRQ_NONE;
1025 }
1026
699559f8
MD
1027 mask = SMC_GET_INT_EN(lp);
1028 SMC_SET_INT_EN(lp, 0);
0a0c72c9
DM
1029
1030 /* set a timeout value, so I don't stay here forever */
1031 timeout = 8;
1032
1033
1034 do {
699559f8 1035 status = SMC_GET_INT(lp);
0a0c72c9
DM
1036
1037 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1038 dev->name, status, mask, status & ~mask);
1039
1040 status &= mask;
1041 if (!status)
1042 break;
1043
1044 /* Handle SW interrupt condition */
1045 if (status & INT_STS_SW_INT_) {
699559f8 1046 SMC_ACK_INT(lp, INT_STS_SW_INT_);
0a0c72c9
DM
1047 mask &= ~INT_EN_SW_INT_EN_;
1048 }
1049 /* Handle various error conditions */
1050 if (status & INT_STS_RXE_) {
699559f8 1051 SMC_ACK_INT(lp, INT_STS_RXE_);
09f75cd7 1052 dev->stats.rx_errors++;
d5498bef 1053 }
0a0c72c9 1054 if (status & INT_STS_RXDFH_INT_) {
699559f8
MD
1055 SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
1056 dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
0a0c72c9
DM
1057 }
1058 /* Undocumented interrupt-what is the right thing to do here? */
1059 if (status & INT_STS_RXDF_INT_) {
699559f8 1060 SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
0a0c72c9
DM
1061 }
1062
1063 /* Rx Data FIFO exceeds set level */
1064 if (status & INT_STS_RDFL_) {
1065 if (IS_REV_A(lp->revision)) {
1066 rx_overrun=1;
699559f8 1067 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 1068 cr &= ~MAC_CR_RXEN_;
699559f8 1069 SMC_SET_MAC_CR(lp, cr);
0a0c72c9 1070 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
09f75cd7
JG
1071 dev->stats.rx_errors++;
1072 dev->stats.rx_fifo_errors++;
0a0c72c9 1073 }
699559f8 1074 SMC_ACK_INT(lp, INT_STS_RDFL_);
0a0c72c9
DM
1075 }
1076 if (status & INT_STS_RDFO_) {
1077 if (!IS_REV_A(lp->revision)) {
699559f8 1078 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 1079 cr &= ~MAC_CR_RXEN_;
699559f8 1080 SMC_SET_MAC_CR(lp, cr);
0a0c72c9
DM
1081 rx_overrun=1;
1082 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
09f75cd7
JG
1083 dev->stats.rx_errors++;
1084 dev->stats.rx_fifo_errors++;
0a0c72c9 1085 }
699559f8 1086 SMC_ACK_INT(lp, INT_STS_RDFO_);
0a0c72c9
DM
1087 }
1088 /* Handle receive condition */
1089 if ((status & INT_STS_RSFL_) || rx_overrun) {
1090 unsigned int fifo;
1091 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
699559f8 1092 fifo = SMC_GET_RX_FIFO_INF(lp);
d5498bef
JG
1093 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1094 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
0a0c72c9
DM
1095 dev->name, pkts, fifo & 0xFFFF );
1096 if (pkts != 0) {
1097#ifdef SMC_USE_DMA
1098 unsigned int fifo;
1099 if (lp->rxdma_active){
d5498bef 1100 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
0a0c72c9
DM
1101 "%s: RX DMA active\n", dev->name);
1102 /* The DMA is already running so up the IRQ threshold */
699559f8 1103 fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
0a0c72c9 1104 fifo |= pkts & 0xFF;
d5498bef 1105 DBG(SMC_DEBUG_RX,
0a0c72c9
DM
1106 "%s: Setting RX stat FIFO threshold to %d\n",
1107 dev->name, fifo & 0xff);
699559f8 1108 SMC_SET_FIFO_INT(lp, fifo);
0a0c72c9
DM
1109 } else
1110#endif
1111 smc911x_rcv(dev);
1112 }
699559f8 1113 SMC_ACK_INT(lp, INT_STS_RSFL_);
0a0c72c9
DM
1114 }
1115 /* Handle transmit FIFO available */
1116 if (status & INT_STS_TDFA_) {
1117 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
699559f8 1118 SMC_SET_FIFO_TDA(lp, 0xFF);
0a0c72c9
DM
1119 lp->tx_throttle = 0;
1120#ifdef SMC_USE_DMA
1121 if (!lp->txdma_active)
1122#endif
1123 netif_wake_queue(dev);
699559f8 1124 SMC_ACK_INT(lp, INT_STS_TDFA_);
0a0c72c9
DM
1125 }
1126 /* Handle transmit done condition */
1127#if 1
1128 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
d5498bef
JG
1129 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1130 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
699559f8 1131 dev->name, (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
0a0c72c9 1132 smc911x_tx(dev);
699559f8
MD
1133 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1134 SMC_ACK_INT(lp, INT_STS_TSFL_);
1135 SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
0a0c72c9
DM
1136 }
1137#else
1138 if (status & INT_STS_TSFL_) {
84d57bd6 1139 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq\n", dev->name, );
0a0c72c9 1140 smc911x_tx(dev);
699559f8 1141 SMC_ACK_INT(lp, INT_STS_TSFL_);
0a0c72c9
DM
1142 }
1143
1144 if (status & INT_STS_GPT_INT_) {
d5498bef
JG
1145 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1146 dev->name,
699559f8
MD
1147 SMC_GET_IRQ_CFG(lp),
1148 SMC_GET_FIFO_INT(lp),
1149 SMC_GET_RX_CFG(lp));
0a0c72c9
DM
1150 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1151 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
d5498bef 1152 dev->name,
699559f8
MD
1153 (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
1154 SMC_GET_RX_FIFO_INF(lp) & 0xffff,
1155 SMC_GET_RX_STS_FIFO_PEEK(lp));
1156 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1157 SMC_ACK_INT(lp, INT_STS_GPT_INT_);
0a0c72c9
DM
1158 }
1159#endif
1160
3a4fa0a2 1161 /* Handle PHY interrupt condition */
0a0c72c9
DM
1162 if (status & INT_STS_PHY_INT_) {
1163 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1164 smc911x_phy_interrupt(dev);
699559f8 1165 SMC_ACK_INT(lp, INT_STS_PHY_INT_);
0a0c72c9
DM
1166 }
1167 } while (--timeout);
1168
1169 /* restore mask state */
699559f8 1170 SMC_SET_INT_EN(lp, mask);
0a0c72c9 1171
d5498bef 1172 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
0a0c72c9
DM
1173 dev->name, 8-timeout);
1174
1175 spin_unlock_irqrestore(&lp->lock, flags);
1176
0a0c72c9
DM
1177 return IRQ_HANDLED;
1178}
1179
1180#ifdef SMC_USE_DMA
1181static void
7d12e780 1182smc911x_tx_dma_irq(int dma, void *data)
0a0c72c9
DM
1183{
1184 struct net_device *dev = (struct net_device *)data;
1185 struct smc911x_local *lp = netdev_priv(dev);
1186 struct sk_buff *skb = lp->current_tx_skb;
1187 unsigned long flags;
1188
b39d66a8 1189 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1190
1191 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1192 /* Clear the DMA interrupt sources */
1193 SMC_DMA_ACK_IRQ(dev, dma);
1194 BUG_ON(skb == NULL);
1195 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1196 dev->trans_start = jiffies;
1197 dev_kfree_skb_irq(skb);
1198 lp->current_tx_skb = NULL;
1199 if (lp->pending_tx_skb != NULL)
1200 smc911x_hardware_send_pkt(dev);
1201 else {
d5498bef 1202 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
0a0c72c9
DM
1203 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1204 spin_lock_irqsave(&lp->lock, flags);
1205 lp->txdma_active = 0;
1206 if (!lp->tx_throttle) {
1207 netif_wake_queue(dev);
1208 }
1209 spin_unlock_irqrestore(&lp->lock, flags);
1210 }
1211
d5498bef 1212 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
0a0c72c9
DM
1213 "%s: TX DMA irq completed\n", dev->name);
1214}
1215static void
7d12e780 1216smc911x_rx_dma_irq(int dma, void *data)
0a0c72c9
DM
1217{
1218 struct net_device *dev = (struct net_device *)data;
1219 unsigned long ioaddr = dev->base_addr;
1220 struct smc911x_local *lp = netdev_priv(dev);
1221 struct sk_buff *skb = lp->current_rx_skb;
1222 unsigned long flags;
1223 unsigned int pkts;
1224
b39d66a8 1225 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1226 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1227 /* Clear the DMA interrupt sources */
1228 SMC_DMA_ACK_IRQ(dev, dma);
1229 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1230 BUG_ON(skb == NULL);
1231 lp->current_rx_skb = NULL;
1232 PRINT_PKT(skb->data, skb->len);
0a0c72c9 1233 skb->protocol = eth_type_trans(skb, dev);
09f75cd7
JG
1234 dev->stats.rx_packets++;
1235 dev->stats.rx_bytes += skb->len;
d30f53ae 1236 netif_rx(skb);
0a0c72c9
DM
1237
1238 spin_lock_irqsave(&lp->lock, flags);
d766a4ed 1239 pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
0a0c72c9
DM
1240 if (pkts != 0) {
1241 smc911x_rcv(dev);
1242 }else {
1243 lp->rxdma_active = 0;
1244 }
1245 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef
JG
1246 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1247 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
0a0c72c9
DM
1248 dev->name, pkts);
1249}
1250#endif /* SMC_USE_DMA */
1251
1252#ifdef CONFIG_NET_POLL_CONTROLLER
1253/*
1254 * Polling receive - used by netconsole and other diagnostic tools
1255 * to allow network i/o with interrupts disabled.
1256 */
1257static void smc911x_poll_controller(struct net_device *dev)
1258{
1259 disable_irq(dev->irq);
9b6d2efe 1260 smc911x_interrupt(dev->irq, dev);
0a0c72c9
DM
1261 enable_irq(dev->irq);
1262}
1263#endif
1264
1265/* Our watchdog timed out. Called by the networking layer */
1266static void smc911x_timeout(struct net_device *dev)
1267{
1268 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1269 int status, mask;
1270 unsigned long flags;
1271
b39d66a8 1272 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1273
1274 spin_lock_irqsave(&lp->lock, flags);
699559f8
MD
1275 status = SMC_GET_INT(lp);
1276 mask = SMC_GET_INT_EN(lp);
0a0c72c9 1277 spin_unlock_irqrestore(&lp->lock, flags);
84d57bd6 1278 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x\n",
0a0c72c9
DM
1279 dev->name, status, mask);
1280
1281 /* Dump the current TX FIFO contents and restart */
699559f8
MD
1282 mask = SMC_GET_TX_CFG(lp);
1283 SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
0a0c72c9
DM
1284 /*
1285 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1286 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1287 * which calls schedule(). Hence we use a work queue.
1288 */
4bb073c0
DM
1289 if (lp->phy_type != 0)
1290 schedule_work(&lp->phy_configure);
0a0c72c9
DM
1291
1292 /* We can accept TX packets again */
1293 dev->trans_start = jiffies;
1294 netif_wake_queue(dev);
1295}
1296
1297/*
1298 * This routine will, depending on the values passed to it,
1299 * either make it accept multicast packets, go into
1300 * promiscuous mode (for TCPDUMP and cousins) or accept
1301 * a select set of multicast packets
1302 */
1303static void smc911x_set_multicast_list(struct net_device *dev)
1304{
1305 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1306 unsigned int multicast_table[2];
1307 unsigned int mcr, update_multicast = 0;
1308 unsigned long flags;
0a0c72c9 1309
b39d66a8 1310 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1311
1312 spin_lock_irqsave(&lp->lock, flags);
699559f8 1313 SMC_GET_MAC_CR(lp, mcr);
0a0c72c9
DM
1314 spin_unlock_irqrestore(&lp->lock, flags);
1315
1316 if (dev->flags & IFF_PROMISC) {
1317
1318 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1319 mcr |= MAC_CR_PRMS_;
1320 }
1321 /*
1322 * Here, I am setting this to accept all multicast packets.
1323 * I don't need to zero the multicast table, because the flag is
1324 * checked before the table is
1325 */
4cd24eaf 1326 else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
0a0c72c9
DM
1327 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1328 mcr |= MAC_CR_MCPAS_;
1329 }
1330
1331 /*
1332 * This sets the internal hardware table to filter out unwanted
1333 * multicast packets before they take up memory.
1334 *
1335 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1336 * address are the offset into the table. If that bit is 1, then the
1337 * multicast packet is accepted. Otherwise, it's dropped silently.
1338 *
1339 * To use the 6 bits as an offset into the table, the high 1 bit is
1340 * the number of the 32 bit register, while the low 5 bits are the bit
1341 * within that register.
1342 */
4cd24eaf 1343 else if (!netdev_mc_empty(dev)) {
22bedad3 1344 struct netdev_hw_addr *ha;
0a0c72c9
DM
1345
1346 /* Set the Hash perfec mode */
1347 mcr |= MAC_CR_HPFILT_;
1348
1349 /* start with a table of all zeros: reject all */
1350 memset(multicast_table, 0, sizeof(multicast_table));
1351
22bedad3 1352 netdev_for_each_mc_addr(ha, dev) {
7b31f7ff 1353 u32 position;
0a0c72c9 1354
0a0c72c9
DM
1355 /* make sure this is a multicast address -
1356 shouldn't this be a given if we have it here ? */
22bedad3
JP
1357 if (!(*ha->addr & 1))
1358 continue;
0a0c72c9 1359
7b31f7ff 1360 /* upper 6 bits are used as hash index */
22bedad3 1361 position = ether_crc(ETH_ALEN, ha->addr)>>26;
0a0c72c9 1362
7b31f7ff 1363 multicast_table[position>>5] |= 1 << (position&0x1f);
0a0c72c9
DM
1364 }
1365
1366 /* be sure I get rid of flags I might have set */
1367 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1368
1369 /* now, the table can be loaded into the chipset */
1370 update_multicast = 1;
1371 } else {
d5498bef 1372 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
0a0c72c9
DM
1373 dev->name);
1374 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1375
1376 /*
1377 * since I'm disabling all multicast entirely, I need to
1378 * clear the multicast list
1379 */
1380 memset(multicast_table, 0, sizeof(multicast_table));
1381 update_multicast = 1;
1382 }
1383
1384 spin_lock_irqsave(&lp->lock, flags);
699559f8 1385 SMC_SET_MAC_CR(lp, mcr);
0a0c72c9 1386 if (update_multicast) {
d5498bef
JG
1387 DBG(SMC_DEBUG_MISC,
1388 "%s: update mcast hash table 0x%08x 0x%08x\n",
0a0c72c9 1389 dev->name, multicast_table[0], multicast_table[1]);
699559f8
MD
1390 SMC_SET_HASHL(lp, multicast_table[0]);
1391 SMC_SET_HASHH(lp, multicast_table[1]);
0a0c72c9
DM
1392 }
1393 spin_unlock_irqrestore(&lp->lock, flags);
1394}
1395
1396
1397/*
1398 * Open and Initialize the board
1399 *
1400 * Set up everything, reset the card, etc..
1401 */
1402static int
1403smc911x_open(struct net_device *dev)
1404{
ef8142a5
AM
1405 struct smc911x_local *lp = netdev_priv(dev);
1406
b39d66a8 1407 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1408
1409 /*
1410 * Check that the address is valid. If its not, refuse
1411 * to bring the device up. The user must specify an
1412 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1413 */
1414 if (!is_valid_ether_addr(dev->dev_addr)) {
b39d66a8 1415 PRINTK("%s: no valid ethernet hw addr\n", __func__);
0a0c72c9
DM
1416 return -EINVAL;
1417 }
1418
1419 /* reset the hardware */
1420 smc911x_reset(dev);
1421
1422 /* Configure the PHY, initialize the link state */
ef8142a5 1423 smc911x_phy_configure(&lp->phy_configure);
0a0c72c9
DM
1424
1425 /* Turn on Tx + Rx */
1426 smc911x_enable(dev);
1427
1428 netif_start_queue(dev);
1429
1430 return 0;
1431}
1432
1433/*
1434 * smc911x_close
1435 *
1436 * this makes the board clean up everything that it can
1437 * and not talk to the outside world. Caused by
1438 * an 'ifconfig ethX down'
1439 */
1440static int smc911x_close(struct net_device *dev)
1441{
1442 struct smc911x_local *lp = netdev_priv(dev);
1443
b39d66a8 1444 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1445
1446 netif_stop_queue(dev);
1447 netif_carrier_off(dev);
1448
1449 /* clear everything */
1450 smc911x_shutdown(dev);
1451
1452 if (lp->phy_type != 0) {
1453 /* We need to ensure that no calls to
1454 * smc911x_phy_configure are pending.
0a0c72c9 1455 */
4bb073c0 1456 cancel_work_sync(&lp->phy_configure);
0a0c72c9
DM
1457 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1458 }
1459
1460 if (lp->pending_tx_skb) {
1461 dev_kfree_skb(lp->pending_tx_skb);
1462 lp->pending_tx_skb = NULL;
1463 }
1464
1465 return 0;
1466}
1467
0a0c72c9
DM
1468/*
1469 * Ethtool support
1470 */
1471static int
1472smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1473{
1474 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1475 int ret, status;
1476 unsigned long flags;
1477
b39d66a8 1478 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1479 cmd->maxtxpkt = 1;
1480 cmd->maxrxpkt = 1;
1481
1482 if (lp->phy_type != 0) {
1483 spin_lock_irqsave(&lp->lock, flags);
1484 ret = mii_ethtool_gset(&lp->mii, cmd);
1485 spin_unlock_irqrestore(&lp->lock, flags);
1486 } else {
1487 cmd->supported = SUPPORTED_10baseT_Half |
1488 SUPPORTED_10baseT_Full |
1489 SUPPORTED_TP | SUPPORTED_AUI;
1490
1491 if (lp->ctl_rspeed == 10)
1492 cmd->speed = SPEED_10;
1493 else if (lp->ctl_rspeed == 100)
1494 cmd->speed = SPEED_100;
1495
1496 cmd->autoneg = AUTONEG_DISABLE;
1497 if (lp->mii.phy_id==1)
1498 cmd->transceiver = XCVR_INTERNAL;
1499 else
1500 cmd->transceiver = XCVR_EXTERNAL;
1501 cmd->port = 0;
699559f8 1502 SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
d5498bef
JG
1503 cmd->duplex =
1504 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
0a0c72c9
DM
1505 DUPLEX_FULL : DUPLEX_HALF;
1506 ret = 0;
1507 }
1508
1509 return ret;
1510}
1511
1512static int
1513smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1514{
1515 struct smc911x_local *lp = netdev_priv(dev);
1516 int ret;
1517 unsigned long flags;
1518
1519 if (lp->phy_type != 0) {
1520 spin_lock_irqsave(&lp->lock, flags);
1521 ret = mii_ethtool_sset(&lp->mii, cmd);
1522 spin_unlock_irqrestore(&lp->lock, flags);
1523 } else {
1524 if (cmd->autoneg != AUTONEG_DISABLE ||
1525 cmd->speed != SPEED_10 ||
1526 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1527 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1528 return -EINVAL;
1529
1530 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1531
1532 ret = 0;
1533 }
1534
1535 return ret;
1536}
1537
1538static void
1539smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1540{
1541 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1542 strncpy(info->version, version, sizeof(info->version));
c2313557 1543 strncpy(info->bus_info, dev_name(dev->dev.parent), sizeof(info->bus_info));
0a0c72c9
DM
1544}
1545
1546static int smc911x_ethtool_nwayreset(struct net_device *dev)
1547{
1548 struct smc911x_local *lp = netdev_priv(dev);
1549 int ret = -EINVAL;
1550 unsigned long flags;
1551
1552 if (lp->phy_type != 0) {
1553 spin_lock_irqsave(&lp->lock, flags);
1554 ret = mii_nway_restart(&lp->mii);
1555 spin_unlock_irqrestore(&lp->lock, flags);
1556 }
1557
1558 return ret;
1559}
1560
1561static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1562{
1563 struct smc911x_local *lp = netdev_priv(dev);
1564 return lp->msg_enable;
1565}
1566
1567static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1568{
1569 struct smc911x_local *lp = netdev_priv(dev);
1570 lp->msg_enable = level;
1571}
1572
1573static int smc911x_ethtool_getregslen(struct net_device *dev)
1574{
1575 /* System regs + MAC regs + PHY regs */
d5498bef
JG
1576 return (((E2P_CMD - ID_REV)/4 + 1) +
1577 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
0a0c72c9
DM
1578}
1579
d5498bef 1580static void smc911x_ethtool_getregs(struct net_device *dev,
0a0c72c9
DM
1581 struct ethtool_regs* regs, void *buf)
1582{
0a0c72c9
DM
1583 struct smc911x_local *lp = netdev_priv(dev);
1584 unsigned long flags;
1585 u32 reg,i,j=0;
1586 u32 *data = (u32*)buf;
1587
1588 regs->version = lp->version;
1589 for(i=ID_REV;i<=E2P_CMD;i+=4) {
699559f8 1590 data[j++] = SMC_inl(lp, i);
0a0c72c9
DM
1591 }
1592 for(i=MAC_CR;i<=WUCSR;i++) {
1593 spin_lock_irqsave(&lp->lock, flags);
699559f8 1594 SMC_GET_MAC_CSR(lp, i, reg);
0a0c72c9 1595 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef 1596 data[j++] = reg;
0a0c72c9
DM
1597 }
1598 for(i=0;i<=31;i++) {
1599 spin_lock_irqsave(&lp->lock, flags);
699559f8 1600 SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
0a0c72c9 1601 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef 1602 data[j++] = reg & 0xFFFF;
0a0c72c9
DM
1603 }
1604}
1605
1606static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1607{
699559f8 1608 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1609 unsigned int timeout;
1610 int e2p_cmd;
1611
699559f8 1612 e2p_cmd = SMC_GET_E2P_CMD(lp);
0a0c72c9
DM
1613 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1614 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
d5498bef 1615 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
b39d66a8 1616 dev->name, __func__);
0a0c72c9 1617 return -EFAULT;
d5498bef 1618 }
0a0c72c9 1619 mdelay(1);
699559f8 1620 e2p_cmd = SMC_GET_E2P_CMD(lp);
0a0c72c9
DM
1621 }
1622 if (timeout == 0) {
d5498bef 1623 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
b39d66a8 1624 dev->name, __func__);
0a0c72c9
DM
1625 return -ETIMEDOUT;
1626 }
1627 return 0;
1628}
1629
d5498bef 1630static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
0a0c72c9
DM
1631 int cmd, int addr)
1632{
699559f8 1633 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1634 int ret;
1635
d5498bef 1636 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1637 return ret;
699559f8 1638 SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
d5498bef 1639 ((cmd) & (0x7<<28)) |
0a0c72c9
DM
1640 ((addr) & 0xFF));
1641 return 0;
1642}
1643
d5498bef 1644static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
0a0c72c9
DM
1645 u8 *data)
1646{
699559f8 1647 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1648 int ret;
1649
d5498bef 1650 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1651 return ret;
699559f8 1652 *data = SMC_GET_E2P_DATA(lp);
0a0c72c9
DM
1653 return 0;
1654}
1655
d5498bef 1656static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
0a0c72c9
DM
1657 u8 data)
1658{
699559f8 1659 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1660 int ret;
1661
d5498bef 1662 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1663 return ret;
699559f8 1664 SMC_SET_E2P_DATA(lp, data);
0a0c72c9
DM
1665 return 0;
1666}
1667
d5498bef 1668static int smc911x_ethtool_geteeprom(struct net_device *dev,
0a0c72c9
DM
1669 struct ethtool_eeprom *eeprom, u8 *data)
1670{
1671 u8 eebuf[SMC911X_EEPROM_LEN];
1672 int i, ret;
1673
1674 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1675 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1676 return ret;
1677 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1678 return ret;
1679 }
1680 memcpy(data, eebuf+eeprom->offset, eeprom->len);
d5498bef 1681 return 0;
0a0c72c9
DM
1682}
1683
d5498bef 1684static int smc911x_ethtool_seteeprom(struct net_device *dev,
0a0c72c9
DM
1685 struct ethtool_eeprom *eeprom, u8 *data)
1686{
1687 int i, ret;
1688
1689 /* Enable erase */
1690 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1691 return ret;
1692 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1693 /* erase byte */
1694 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1695 return ret;
1696 /* write byte */
1697 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1698 return ret;
1699 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1700 return ret;
1701 }
1702 return 0;
1703}
1704
1705static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1706{
1707 return SMC911X_EEPROM_LEN;
1708}
1709
7282d491 1710static const struct ethtool_ops smc911x_ethtool_ops = {
0a0c72c9
DM
1711 .get_settings = smc911x_ethtool_getsettings,
1712 .set_settings = smc911x_ethtool_setsettings,
1713 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1714 .get_msglevel = smc911x_ethtool_getmsglevel,
1715 .set_msglevel = smc911x_ethtool_setmsglevel,
1716 .nway_reset = smc911x_ethtool_nwayreset,
1717 .get_link = ethtool_op_get_link,
1718 .get_regs_len = smc911x_ethtool_getregslen,
1719 .get_regs = smc911x_ethtool_getregs,
1720 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1721 .get_eeprom = smc911x_ethtool_geteeprom,
1722 .set_eeprom = smc911x_ethtool_seteeprom,
1723};
1724
1725/*
1726 * smc911x_findirq
1727 *
1728 * This routine has a simple purpose -- make the SMC chip generate an
1729 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1730 */
f57628d7 1731static int __devinit smc911x_findirq(struct net_device *dev)
0a0c72c9 1732{
699559f8 1733 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1734 int timeout = 20;
1735 unsigned long cookie;
1736
b39d66a8 1737 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
0a0c72c9
DM
1738
1739 cookie = probe_irq_on();
1740
1741 /*
1742 * Force a SW interrupt
1743 */
1744
699559f8 1745 SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
0a0c72c9
DM
1746
1747 /*
1748 * Wait until positive that the interrupt has been generated
1749 */
1750 do {
1751 int int_status;
1752 udelay(10);
699559f8 1753 int_status = SMC_GET_INT_EN(lp);
0a0c72c9
DM
1754 if (int_status & INT_EN_SW_INT_EN_)
1755 break; /* got the interrupt */
1756 } while (--timeout);
1757
1758 /*
1759 * there is really nothing that I can do here if timeout fails,
1760 * as autoirq_report will return a 0 anyway, which is what I
1761 * want in this case. Plus, the clean up is needed in both
1762 * cases.
1763 */
1764
1765 /* and disable all interrupts again */
699559f8 1766 SMC_SET_INT_EN(lp, 0);
0a0c72c9
DM
1767
1768 /* and return what I found */
1769 return probe_irq_off(cookie);
1770}
1771
ec4e0cff
AB
1772static const struct net_device_ops smc911x_netdev_ops = {
1773 .ndo_open = smc911x_open,
1774 .ndo_stop = smc911x_close,
1775 .ndo_start_xmit = smc911x_hard_start_xmit,
1776 .ndo_tx_timeout = smc911x_timeout,
1777 .ndo_set_multicast_list = smc911x_set_multicast_list,
1778 .ndo_change_mtu = eth_change_mtu,
1779 .ndo_validate_addr = eth_validate_addr,
1780 .ndo_set_mac_address = eth_mac_addr,
1781#ifdef CONFIG_NET_POLL_CONTROLLER
1782 .ndo_poll_controller = smc911x_poll_controller,
1783#endif
1784};
1785
0a0c72c9
DM
1786/*
1787 * Function: smc911x_probe(unsigned long ioaddr)
1788 *
1789 * Purpose:
1790 * Tests to see if a given ioaddr points to an SMC911x chip.
1791 * Returns a 0 on success
1792 *
1793 * Algorithm:
1794 * (1) see if the endian word is OK
1795 * (1) see if I recognize the chip ID in the appropriate register
1796 *
1797 * Here I do typical initialization tasks.
1798 *
1799 * o Initialize the structure if needed
1800 * o print out my vanity message if not done so already
1801 * o print out what type of hardware is detected
1802 * o print out the ethernet address
1803 * o find the IRQ
1804 * o set up my private data
1805 * o configure the dev structure with my subroutines
1806 * o actually GRAB the irq.
1807 * o GRAB the region
1808 */
f57628d7 1809static int __devinit smc911x_probe(struct net_device *dev)
0a0c72c9
DM
1810{
1811 struct smc911x_local *lp = netdev_priv(dev);
1812 int i, retval;
1813 unsigned int val, chip_id, revision;
1814 const char *version_string;
12c03f59 1815 unsigned long irq_flags;
0a0c72c9 1816
b39d66a8 1817 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1818
1819 /* First, see if the endian word is recognized */
699559f8 1820 val = SMC_GET_BYTE_TEST(lp);
0a0c72c9
DM
1821 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1822 if (val != 0x87654321) {
eafdcb43 1823 printk(KERN_ERR "Invalid chip endian 0x%08x\n",val);
0a0c72c9
DM
1824 retval = -ENODEV;
1825 goto err_out;
1826 }
1827
1828 /*
1829 * check if the revision register is something that I
1830 * recognize. These might need to be added to later,
1831 * as future revisions could be added.
1832 */
699559f8 1833 chip_id = SMC_GET_PN(lp);
0a0c72c9
DM
1834 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1835 for(i=0;chip_ids[i].id != 0; i++) {
1836 if (chip_ids[i].id == chip_id) break;
1837 }
1838 if (!chip_ids[i].id) {
1839 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1840 retval = -ENODEV;
1841 goto err_out;
1842 }
1843 version_string = chip_ids[i].name;
1844
699559f8 1845 revision = SMC_GET_REV(lp);
0a0c72c9
DM
1846 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1847
1848 /* At this point I'll assume that the chip is an SMC911x. */
1849 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1850
1851 /* Validate the TX FIFO size requested */
1852 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1853 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1854 retval = -EINVAL;
1855 goto err_out;
1856 }
d5498bef 1857
0a0c72c9 1858 /* fill in some of the fields */
0a0c72c9
DM
1859 lp->version = chip_ids[i].id;
1860 lp->revision = revision;
1861 lp->tx_fifo_kb = tx_fifo_kb;
1862 /* Reverse calculate the RX FIFO size from the TX */
1863 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1864 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1865
1866 /* Set the automatic flow control values */
1867 switch(lp->tx_fifo_kb) {
d5498bef 1868 /*
0a0c72c9
DM
1869 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1870 * AFC_LO is AFC_HI/2
1871 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1872 */
1873 case 2:/* 13440 Rx Data Fifo Size */
1874 lp->afc_cfg=0x008C46AF;break;
1875 case 3:/* 12480 Rx Data Fifo Size */
1876 lp->afc_cfg=0x0082419F;break;
1877 case 4:/* 11520 Rx Data Fifo Size */
1878 lp->afc_cfg=0x00783C9F;break;
1879 case 5:/* 10560 Rx Data Fifo Size */
1880 lp->afc_cfg=0x006E374F;break;
1881 case 6:/* 9600 Rx Data Fifo Size */
1882 lp->afc_cfg=0x0064328F;break;
1883 case 7:/* 8640 Rx Data Fifo Size */
1884 lp->afc_cfg=0x005A2D7F;break;
1885 case 8:/* 7680 Rx Data Fifo Size */
1886 lp->afc_cfg=0x0050287F;break;
1887 case 9:/* 6720 Rx Data Fifo Size */
1888 lp->afc_cfg=0x0046236F;break;
1889 case 10:/* 5760 Rx Data Fifo Size */
1890 lp->afc_cfg=0x003C1E6F;break;
1891 case 11:/* 4800 Rx Data Fifo Size */
1892 lp->afc_cfg=0x0032195F;break;
d5498bef 1893 /*
0a0c72c9
DM
1894 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1895 * AFC_LO is AFC_HI/2
1896 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1897 */
1898 case 12:/* 3840 Rx Data Fifo Size */
1899 lp->afc_cfg=0x0024124F;break;
1900 case 13:/* 2880 Rx Data Fifo Size */
1901 lp->afc_cfg=0x0015073F;break;
1902 case 14:/* 1920 Rx Data Fifo Size */
1903 lp->afc_cfg=0x0006032F;break;
1904 default:
d5498bef 1905 PRINTK("%s: ERROR -- no AFC_CFG setting found",
0a0c72c9
DM
1906 dev->name);
1907 break;
1908 }
1909
d5498bef
JG
1910 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
1911 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
0a0c72c9
DM
1912 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1913
1914 spin_lock_init(&lp->lock);
1915
1916 /* Get the MAC address */
699559f8 1917 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
0a0c72c9
DM
1918
1919 /* now, reset the chip, and put it into a known state */
1920 smc911x_reset(dev);
1921
1922 /*
1923 * If dev->irq is 0, then the device has to be banged on to see
1924 * what the IRQ is.
1925 *
1926 * Specifying an IRQ is done with the assumption that the user knows
1927 * what (s)he is doing. No checking is done!!!!
1928 */
1929 if (dev->irq < 1) {
1930 int trials;
1931
1932 trials = 3;
1933 while (trials--) {
699559f8 1934 dev->irq = smc911x_findirq(dev);
0a0c72c9
DM
1935 if (dev->irq)
1936 break;
1937 /* kick the card and try again */
1938 smc911x_reset(dev);
1939 }
1940 }
1941 if (dev->irq == 0) {
1942 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1943 dev->name);
1944 retval = -ENODEV;
1945 goto err_out;
1946 }
1947 dev->irq = irq_canonicalize(dev->irq);
1948
1949 /* Fill in the fields of the device structure with ethernet values. */
1950 ether_setup(dev);
1951
ec4e0cff 1952 dev->netdev_ops = &smc911x_netdev_ops;
0a0c72c9 1953 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
0a0c72c9 1954 dev->ethtool_ops = &smc911x_ethtool_ops;
0a0c72c9 1955
ef8142a5 1956 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
0a0c72c9
DM
1957 lp->mii.phy_id_mask = 0x1f;
1958 lp->mii.reg_num_mask = 0x1f;
1959 lp->mii.force_media = 0;
1960 lp->mii.full_duplex = 0;
1961 lp->mii.dev = dev;
1962 lp->mii.mdio_read = smc911x_phy_read;
1963 lp->mii.mdio_write = smc911x_phy_write;
1964
1965 /*
1966 * Locate the phy, if any.
1967 */
1968 smc911x_phy_detect(dev);
1969
1970 /* Set default parameters */
1971 lp->msg_enable = NETIF_MSG_LINK;
1972 lp->ctl_rfduplx = 1;
1973 lp->ctl_rspeed = 100;
1974
12c03f59
MD
1975#ifdef SMC_DYNAMIC_BUS_CONFIG
1976 irq_flags = lp->cfg.irq_flags;
1977#else
1978 irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
1979#endif
1980
0a0c72c9 1981 /* Grab the IRQ */
a0607fd3 1982 retval = request_irq(dev->irq, smc911x_interrupt,
12c03f59 1983 irq_flags, dev->name, dev);
0a0c72c9
DM
1984 if (retval)
1985 goto err_out;
1986
0a0c72c9
DM
1987#ifdef SMC_USE_DMA
1988 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
1989 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
1990 lp->rxdma_active = 0;
1991 lp->txdma_active = 0;
1992 dev->dma = lp->rxdma;
1993#endif
1994
1995 retval = register_netdev(dev);
1996 if (retval == 0) {
1997 /* now, print out the card info, in a short format.. */
1998 printk("%s: %s (rev %d) at %#lx IRQ %d",
1999 dev->name, version_string, lp->revision,
2000 dev->base_addr, dev->irq);
2001
2002#ifdef SMC_USE_DMA
2003 if (lp->rxdma != -1)
2004 printk(" RXDMA %d ", lp->rxdma);
2005
2006 if (lp->txdma != -1)
2007 printk("TXDMA %d", lp->txdma);
2008#endif
2009 printk("\n");
2010 if (!is_valid_ether_addr(dev->dev_addr)) {
2011 printk("%s: Invalid ethernet MAC address. Please "
2012 "set using ifconfig\n", dev->name);
2013 } else {
2014 /* Print the Ethernet address */
fa876b47
HS
2015 printk("%s: Ethernet addr: %pM\n",
2016 dev->name, dev->dev_addr);
0a0c72c9
DM
2017 }
2018
2019 if (lp->phy_type == 0) {
2020 PRINTK("%s: No PHY found\n", dev->name);
2021 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2022 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2023 } else {
2024 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2025 }
2026 }
d5498bef 2027
0a0c72c9
DM
2028err_out:
2029#ifdef SMC_USE_DMA
2030 if (retval) {
2031 if (lp->rxdma != -1) {
2032 SMC_DMA_FREE(dev, lp->rxdma);
2033 }
2034 if (lp->txdma != -1) {
2035 SMC_DMA_FREE(dev, lp->txdma);
2036 }
2037 }
2038#endif
2039 return retval;
2040}
2041
2042/*
2043 * smc911x_init(void)
2044 *
2045 * Output:
2046 * 0 --> there is a device
2047 * anything else, error
2048 */
f57628d7 2049static int __devinit smc911x_drv_probe(struct platform_device *pdev)
0a0c72c9
DM
2050{
2051 struct net_device *ndev;
2052 struct resource *res;
ef8142a5 2053 struct smc911x_local *lp;
0a0c72c9
DM
2054 unsigned int *addr;
2055 int ret;
2056
b39d66a8 2057 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
0a0c72c9
DM
2058 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2059 if (!res) {
2060 ret = -ENODEV;
2061 goto out;
2062 }
2063
2064 /*
2065 * Request the regions.
2066 */
2067 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2068 ret = -EBUSY;
2069 goto out;
2070 }
2071
2072 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2073 if (!ndev) {
2074 printk("%s: could not allocate device.\n", CARDNAME);
2075 ret = -ENOMEM;
2076 goto release_1;
2077 }
0a0c72c9
DM
2078 SET_NETDEV_DEV(ndev, &pdev->dev);
2079
2080 ndev->dma = (unsigned char)-1;
2081 ndev->irq = platform_get_irq(pdev, 0);
ef8142a5
AM
2082 lp = netdev_priv(ndev);
2083 lp->netdev = ndev;
12c03f59 2084#ifdef SMC_DYNAMIC_BUS_CONFIG
a316084c
AM
2085 {
2086 struct smc911x_platdata *pd = pdev->dev.platform_data;
2087 if (!pd) {
2088 ret = -EINVAL;
2089 goto release_both;
2090 }
2091 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
12c03f59 2092 }
12c03f59 2093#endif
0a0c72c9
DM
2094
2095 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2096 if (!addr) {
2097 ret = -ENOMEM;
2098 goto release_both;
2099 }
2100
2101 platform_set_drvdata(pdev, ndev);
699559f8
MD
2102 lp->base = addr;
2103 ndev->base_addr = res->start;
2104 ret = smc911x_probe(ndev);
0a0c72c9
DM
2105 if (ret != 0) {
2106 platform_set_drvdata(pdev, NULL);
2107 iounmap(addr);
2108release_both:
2109 free_netdev(ndev);
2110release_1:
2111 release_mem_region(res->start, SMC911X_IO_EXTENT);
2112out:
2113 printk("%s: not found (%d).\n", CARDNAME, ret);
2114 }
2115#ifdef SMC_USE_DMA
2116 else {
0a0c72c9
DM
2117 lp->physaddr = res->start;
2118 lp->dev = &pdev->dev;
2119 }
2120#endif
2121
2122 return ret;
2123}
2124
f57628d7 2125static int __devexit smc911x_drv_remove(struct platform_device *pdev)
0a0c72c9
DM
2126{
2127 struct net_device *ndev = platform_get_drvdata(pdev);
699559f8 2128 struct smc911x_local *lp = netdev_priv(ndev);
0a0c72c9
DM
2129 struct resource *res;
2130
b39d66a8 2131 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
0a0c72c9
DM
2132 platform_set_drvdata(pdev, NULL);
2133
2134 unregister_netdev(ndev);
2135
2136 free_irq(ndev->irq, ndev);
2137
2138#ifdef SMC_USE_DMA
2139 {
0a0c72c9
DM
2140 if (lp->rxdma != -1) {
2141 SMC_DMA_FREE(dev, lp->rxdma);
2142 }
2143 if (lp->txdma != -1) {
2144 SMC_DMA_FREE(dev, lp->txdma);
2145 }
2146 }
2147#endif
699559f8 2148 iounmap(lp->base);
0a0c72c9
DM
2149 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2150 release_mem_region(res->start, SMC911X_IO_EXTENT);
2151
2152 free_netdev(ndev);
2153 return 0;
2154}
2155
2156static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2157{
2158 struct net_device *ndev = platform_get_drvdata(dev);
699559f8 2159 struct smc911x_local *lp = netdev_priv(ndev);
0a0c72c9 2160
b39d66a8 2161 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
0a0c72c9
DM
2162 if (ndev) {
2163 if (netif_running(ndev)) {
2164 netif_device_detach(ndev);
2165 smc911x_shutdown(ndev);
2166#if POWER_DOWN
2167 /* Set D2 - Energy detect only setting */
699559f8 2168 SMC_SET_PMT_CTRL(lp, 2<<12);
0a0c72c9
DM
2169#endif
2170 }
2171 }
2172 return 0;
2173}
2174
2175static int smc911x_drv_resume(struct platform_device *dev)
2176{
2177 struct net_device *ndev = platform_get_drvdata(dev);
2178
b39d66a8 2179 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
0a0c72c9
DM
2180 if (ndev) {
2181 struct smc911x_local *lp = netdev_priv(ndev);
2182
2183 if (netif_running(ndev)) {
2184 smc911x_reset(ndev);
0a0c72c9 2185 if (lp->phy_type != 0)
ef8142a5 2186 smc911x_phy_configure(&lp->phy_configure);
347c8d83 2187 smc911x_enable(ndev);
0a0c72c9
DM
2188 netif_device_attach(ndev);
2189 }
2190 }
2191 return 0;
2192}
2193
2194static struct platform_driver smc911x_driver = {
2195 .probe = smc911x_drv_probe,
f57628d7 2196 .remove = __devexit_p(smc911x_drv_remove),
0a0c72c9
DM
2197 .suspend = smc911x_drv_suspend,
2198 .resume = smc911x_drv_resume,
2199 .driver = {
2200 .name = CARDNAME,
72abb461 2201 .owner = THIS_MODULE,
0a0c72c9
DM
2202 },
2203};
d5498bef 2204
0a0c72c9
DM
2205static int __init smc911x_init(void)
2206{
2207 return platform_driver_register(&smc911x_driver);
2208}
2209
2210static void __exit smc911x_cleanup(void)
2211{
2212 platform_driver_unregister(&smc911x_driver);
2213}
2214
2215module_init(smc911x_init);
2216module_exit(smc911x_cleanup);