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1da177e4
LT
1/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
ea37ccea 3 Revision: 1.08.09 Sep. 19 2005
1da177e4
LT
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
ea37ccea 20 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
1da177e4
LT
21 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
22 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <webvenza@libero.it> add suspend/resume support
23 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
24 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
25 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
26 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
27 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
28 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
29 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
30 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
31 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
32 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
33 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
34 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
35 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
36 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
37 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
38 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
39 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
40 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
41 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
42 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
43 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
44 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
45 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
46 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
47 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
48 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
49*/
50
51#include <linux/module.h>
52#include <linux/moduleparam.h>
53#include <linux/kernel.h>
54#include <linux/string.h>
55#include <linux/timer.h>
56#include <linux/errno.h>
57#include <linux/ioport.h>
58#include <linux/slab.h>
59#include <linux/interrupt.h>
60#include <linux/pci.h>
61#include <linux/netdevice.h>
62#include <linux/init.h>
63#include <linux/mii.h>
64#include <linux/etherdevice.h>
65#include <linux/skbuff.h>
66#include <linux/delay.h>
67#include <linux/ethtool.h>
68#include <linux/crc32.h>
69#include <linux/bitops.h>
12b279f9 70#include <linux/dma-mapping.h>
1da177e4
LT
71
72#include <asm/processor.h> /* Processor type for cache alignment. */
73#include <asm/io.h>
74#include <asm/irq.h>
75#include <asm/uaccess.h> /* User space memory access functions */
76
77#include "sis900.h"
78
79#define SIS900_MODULE_NAME "sis900"
ea37ccea 80#define SIS900_DRV_VERSION "v1.08.09 Sep. 19 2005"
1da177e4
LT
81
82static char version[] __devinitdata =
83KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
84
85static int max_interrupt_work = 40;
86static int multicast_filter_limit = 128;
87
88static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
89
90#define SIS900_DEF_MSG \
91 (NETIF_MSG_DRV | \
92 NETIF_MSG_LINK | \
93 NETIF_MSG_RX_ERR | \
94 NETIF_MSG_TX_ERR)
95
96/* Time in jiffies before concluding the transmitter is hung. */
97#define TX_TIMEOUT (4*HZ)
1da177e4
LT
98
99enum {
100 SIS_900 = 0,
101 SIS_7016
102};
f71e1309 103static const char * card_names[] = {
1da177e4
LT
104 "SiS 900 PCI Fast Ethernet",
105 "SiS 7016 PCI Fast Ethernet"
106};
107static struct pci_device_id sis900_pci_tbl [] = {
108 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
109 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
110 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
111 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
112 {0,}
113};
114MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
115
116static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
117
f71e1309 118static const struct mii_chip_info {
1da177e4
LT
119 const char * name;
120 u16 phy_id0;
121 u16 phy_id1;
122 u8 phy_types;
123#define HOME 0x0001
124#define LAN 0x0002
125#define MIX 0x0003
126#define UNKNOWN 0x0
127} mii_chip_table[] = {
128 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
129 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
130 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
494aced2 131 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
1da177e4
LT
132 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
133 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
134 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
135 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
136 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
137 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
138 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
139 {NULL,},
140};
141
142struct mii_phy {
143 struct mii_phy * next;
144 int phy_addr;
145 u16 phy_id0;
146 u16 phy_id1;
147 u16 status;
148 u8 phy_types;
149};
150
151typedef struct _BufferDesc {
152 u32 link;
153 u32 cmdsts;
154 u32 bufptr;
155} BufferDesc;
156
157struct sis900_private {
158 struct net_device_stats stats;
159 struct pci_dev * pci_dev;
160
161 spinlock_t lock;
162
163 struct mii_phy * mii;
164 struct mii_phy * first_mii; /* record the first mii structure */
165 unsigned int cur_phy;
da369b01 166 struct mii_if_info mii_info;
1da177e4
LT
167
168 struct timer_list timer; /* Link status detection timer. */
169 u8 autong_complete; /* 1: auto-negotiate complete */
170
171 u32 msg_enable;
172
173 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
174 unsigned int cur_tx, dirty_tx;
175
176 /* The saved address of a sent/receive-in-place packet buffer */
177 struct sk_buff *tx_skbuff[NUM_TX_DESC];
178 struct sk_buff *rx_skbuff[NUM_RX_DESC];
179 BufferDesc *tx_ring;
180 BufferDesc *rx_ring;
181
182 dma_addr_t tx_ring_dma;
183 dma_addr_t rx_ring_dma;
184
185 unsigned int tx_full; /* The Tx queue is full. */
186 u8 host_bridge_rev;
187 u8 chipset_rev;
188};
189
190MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
191MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
192MODULE_LICENSE("GPL");
193
194module_param(multicast_filter_limit, int, 0444);
195module_param(max_interrupt_work, int, 0444);
196module_param(sis900_debug, int, 0444);
197MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
198MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
199MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
200
201#ifdef CONFIG_NET_POLL_CONTROLLER
202static void sis900_poll(struct net_device *dev);
203#endif
204static int sis900_open(struct net_device *net_dev);
205static int sis900_mii_probe (struct net_device * net_dev);
206static void sis900_init_rxfilter (struct net_device * net_dev);
207static u16 read_eeprom(long ioaddr, int location);
da369b01 208static int mdio_read(struct net_device *net_dev, int phy_id, int location);
1da177e4
LT
209static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
210static void sis900_timer(unsigned long data);
211static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
212static void sis900_tx_timeout(struct net_device *net_dev);
213static void sis900_init_tx_ring(struct net_device *net_dev);
214static void sis900_init_rx_ring(struct net_device *net_dev);
215static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
216static int sis900_rx(struct net_device *net_dev);
217static void sis900_finish_xmit (struct net_device *net_dev);
218static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
219static int sis900_close(struct net_device *net_dev);
220static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
221static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
222static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
223static void set_rx_mode(struct net_device *net_dev);
224static void sis900_reset(struct net_device *net_dev);
225static void sis630_set_eq(struct net_device *net_dev, u8 revision);
226static int sis900_set_config(struct net_device *dev, struct ifmap *map);
227static u16 sis900_default_phy(struct net_device * net_dev);
228static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
229static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
230static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
231static void sis900_set_mode (long ioaddr, int speed, int duplex);
232static struct ethtool_ops sis900_ethtool_ops;
233
234/**
235 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
236 * @pci_dev: the sis900 pci device
237 * @net_dev: the net device to get address for
238 *
239 * Older SiS900 and friends, use EEPROM to store MAC address.
240 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
241 */
242
243static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
244{
245 long ioaddr = pci_resource_start(pci_dev, 0);
246 u16 signature;
247 int i;
248
249 /* check to see if we have sane EEPROM */
250 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
251 if (signature == 0xffff || signature == 0x0000) {
252 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
253 pci_name(pci_dev), signature);
254 return 0;
255 }
256
257 /* get MAC address from EEPROM */
258 for (i = 0; i < 3; i++)
259 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
260
261 return 1;
262}
263
264/**
265 * sis630e_get_mac_addr - Get MAC address for SiS630E model
266 * @pci_dev: the sis900 pci device
267 * @net_dev: the net device to get address for
268 *
269 * SiS630E model, use APC CMOS RAM to store MAC address.
270 * APC CMOS RAM is accessed through ISA bridge.
271 * MAC address is read into @net_dev->dev_addr.
272 */
273
274static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
275 struct net_device *net_dev)
276{
277 struct pci_dev *isa_bridge = NULL;
278 u8 reg;
279 int i;
280
281 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
282 if (!isa_bridge)
283 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
284 if (!isa_bridge) {
285 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
286 pci_name(pci_dev));
287 return 0;
288 }
289 pci_read_config_byte(isa_bridge, 0x48, &reg);
290 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
291
292 for (i = 0; i < 6; i++) {
293 outb(0x09 + i, 0x70);
294 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
295 }
296 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
297 pci_dev_put(isa_bridge);
298
299 return 1;
300}
301
302
303/**
304 * sis635_get_mac_addr - Get MAC address for SIS635 model
305 * @pci_dev: the sis900 pci device
306 * @net_dev: the net device to get address for
307 *
308 * SiS635 model, set MAC Reload Bit to load Mac address from APC
309 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
310 * @net_dev->dev_addr.
311 */
312
313static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
314 struct net_device *net_dev)
315{
316 long ioaddr = net_dev->base_addr;
317 u32 rfcrSave;
318 u32 i;
319
320 rfcrSave = inl(rfcr + ioaddr);
321
322 outl(rfcrSave | RELOAD, ioaddr + cr);
323 outl(0, ioaddr + cr);
324
325 /* disable packet filtering before setting filter */
326 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
327
328 /* load MAC addr to filter data register */
329 for (i = 0 ; i < 3 ; i++) {
330 outl((i << RFADDR_shift), ioaddr + rfcr);
331 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
332 }
333
334 /* enable packet filtering */
335 outl(rfcrSave | RFEN, rfcr + ioaddr);
336
337 return 1;
338}
339
340/**
341 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
342 * @pci_dev: the sis900 pci device
343 * @net_dev: the net device to get address for
344 *
345 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
346 * is shared by
347 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
348 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
349 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
350 * EEDONE signal to refuse EEPROM access by LAN.
351 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
352 * The signature field in SiS962 or SiS963 spec is meaningless.
353 * MAC address is read into @net_dev->dev_addr.
354 */
355
356static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
357 struct net_device *net_dev)
358{
359 long ioaddr = net_dev->base_addr;
360 long ee_addr = ioaddr + mear;
361 u32 waittime = 0;
362 int i;
363
364 outl(EEREQ, ee_addr);
365 while(waittime < 2000) {
366 if(inl(ee_addr) & EEGNT) {
367
368 /* get MAC address from EEPROM */
369 for (i = 0; i < 3; i++)
370 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
371
372 outl(EEDONE, ee_addr);
373 return 1;
374 } else {
375 udelay(1);
376 waittime ++;
377 }
378 }
379 outl(EEDONE, ee_addr);
380 return 0;
381}
382
383/**
384 * sis900_probe - Probe for sis900 device
385 * @pci_dev: the sis900 pci device
386 * @pci_id: the pci device ID
387 *
388 * Check and probe sis900 net device for @pci_dev.
389 * Get mac address according to the chip revision,
390 * and assign SiS900-specific entries in the device structure.
391 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
392 */
393
394static int __devinit sis900_probe(struct pci_dev *pci_dev,
395 const struct pci_device_id *pci_id)
396{
397 struct sis900_private *sis_priv;
398 struct net_device *net_dev;
399 struct pci_dev *dev;
400 dma_addr_t ring_dma;
401 void *ring_space;
402 long ioaddr;
403 int i, ret;
f71e1309 404 const char *card_name = card_names[pci_id->driver_data];
1da177e4
LT
405 const char *dev_name = pci_name(pci_dev);
406
407/* when built into the kernel, we only print version if device is found */
408#ifndef MODULE
409 static int printed_version;
410 if (!printed_version++)
411 printk(version);
412#endif
413
414 /* setup various bits in PCI command register */
415 ret = pci_enable_device(pci_dev);
416 if(ret) return ret;
417
12b279f9 418 i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
1da177e4
LT
419 if(i){
420 printk(KERN_ERR "sis900.c: architecture does not support"
421 "32bit PCI busmaster DMA\n");
422 return i;
423 }
424
425 pci_set_master(pci_dev);
426
427 net_dev = alloc_etherdev(sizeof(struct sis900_private));
428 if (!net_dev)
429 return -ENOMEM;
430 SET_MODULE_OWNER(net_dev);
431 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
432
433 /* We do a request_region() to register /proc/ioports info. */
434 ioaddr = pci_resource_start(pci_dev, 0);
435 ret = pci_request_regions(pci_dev, "sis900");
436 if (ret)
437 goto err_out;
438
439 sis_priv = net_dev->priv;
440 net_dev->base_addr = ioaddr;
441 net_dev->irq = pci_dev->irq;
442 sis_priv->pci_dev = pci_dev;
443 spin_lock_init(&sis_priv->lock);
444
445 pci_set_drvdata(pci_dev, net_dev);
446
447 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
448 if (!ring_space) {
449 ret = -ENOMEM;
450 goto err_out_cleardev;
451 }
452 sis_priv->tx_ring = (BufferDesc *)ring_space;
453 sis_priv->tx_ring_dma = ring_dma;
454
455 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
456 if (!ring_space) {
457 ret = -ENOMEM;
458 goto err_unmap_tx;
459 }
460 sis_priv->rx_ring = (BufferDesc *)ring_space;
461 sis_priv->rx_ring_dma = ring_dma;
462
463 /* The SiS900-specific entries in the device structure. */
464 net_dev->open = &sis900_open;
465 net_dev->hard_start_xmit = &sis900_start_xmit;
466 net_dev->stop = &sis900_close;
467 net_dev->get_stats = &sis900_get_stats;
468 net_dev->set_config = &sis900_set_config;
469 net_dev->set_multicast_list = &set_rx_mode;
470 net_dev->do_ioctl = &mii_ioctl;
471 net_dev->tx_timeout = sis900_tx_timeout;
472 net_dev->watchdog_timeo = TX_TIMEOUT;
473 net_dev->ethtool_ops = &sis900_ethtool_ops;
474
475#ifdef CONFIG_NET_POLL_CONTROLLER
476 net_dev->poll_controller = &sis900_poll;
477#endif
478
479 if (sis900_debug > 0)
480 sis_priv->msg_enable = sis900_debug;
481 else
482 sis_priv->msg_enable = SIS900_DEF_MSG;
da369b01
DV
483
484 sis_priv->mii_info.dev = net_dev;
485 sis_priv->mii_info.mdio_read = mdio_read;
486 sis_priv->mii_info.mdio_write = mdio_write;
487 sis_priv->mii_info.phy_id_mask = 0x1f;
488 sis_priv->mii_info.reg_num_mask = 0x1f;
489
1da177e4
LT
490 /* Get Mac address according to the chip revision */
491 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
492 if(netif_msg_probe(sis_priv))
493 printk(KERN_DEBUG "%s: detected revision %2.2x, "
494 "trying to get MAC address...\n",
495 dev_name, sis_priv->chipset_rev);
496
497 ret = 0;
498 if (sis_priv->chipset_rev == SIS630E_900_REV)
499 ret = sis630e_get_mac_addr(pci_dev, net_dev);
500 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
501 ret = sis635_get_mac_addr(pci_dev, net_dev);
502 else if (sis_priv->chipset_rev == SIS96x_900_REV)
503 ret = sis96x_get_mac_addr(pci_dev, net_dev);
504 else
505 ret = sis900_get_mac_addr(pci_dev, net_dev);
506
507 if (ret == 0) {
508 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
509 ret = -ENODEV;
510 goto err_unmap_rx;
511 }
512
513 /* 630ET : set the mii access mode as software-mode */
514 if (sis_priv->chipset_rev == SIS630ET_900_REV)
515 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
516
517 /* probe for mii transceiver */
518 if (sis900_mii_probe(net_dev) == 0) {
519 printk(KERN_WARNING "%s: Error probing MII device.\n",
520 dev_name);
521 ret = -ENODEV;
522 goto err_unmap_rx;
523 }
524
525 /* save our host bridge revision */
526 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
527 if (dev) {
528 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
529 pci_dev_put(dev);
530 }
531
532 ret = register_netdev(net_dev);
533 if (ret)
534 goto err_unmap_rx;
535
536 /* print some information about our NIC */
537 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
538 card_name, ioaddr, net_dev->irq);
539 for (i = 0; i < 5; i++)
540 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
541 printk("%2.2x.\n", net_dev->dev_addr[i]);
542
ea37ccea 543 /* Detect Wake on Lan support */
7bef4b39 544 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
ea37ccea
DV
545 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
546 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
547
1da177e4
LT
548 return 0;
549
550 err_unmap_rx:
551 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
552 sis_priv->rx_ring_dma);
553 err_unmap_tx:
554 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
555 sis_priv->tx_ring_dma);
556 err_out_cleardev:
557 pci_set_drvdata(pci_dev, NULL);
558 pci_release_regions(pci_dev);
559 err_out:
560 free_netdev(net_dev);
561 return ret;
562}
563
564/**
565 * sis900_mii_probe - Probe MII PHY for sis900
566 * @net_dev: the net device to probe for
567 *
568 * Search for total of 32 possible mii phy addresses.
569 * Identify and set current phy if found one,
570 * return error if it failed to found.
571 */
572
573static int __init sis900_mii_probe(struct net_device * net_dev)
574{
575 struct sis900_private * sis_priv = net_dev->priv;
576 const char *dev_name = pci_name(sis_priv->pci_dev);
577 u16 poll_bit = MII_STAT_LINK, status = 0;
578 unsigned long timeout = jiffies + 5 * HZ;
579 int phy_addr;
580
581 sis_priv->mii = NULL;
582
583 /* search for total of 32 possible mii phy addresses */
584 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
585 struct mii_phy * mii_phy = NULL;
586 u16 mii_status;
587 int i;
588
589 mii_phy = NULL;
590 for(i = 0; i < 2; i++)
591 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
592
593 if (mii_status == 0xffff || mii_status == 0x0000) {
594 if (netif_msg_probe(sis_priv))
595 printk(KERN_DEBUG "%s: MII at address %d"
596 " not accessible\n",
597 dev_name, phy_addr);
598 continue;
599 }
600
601 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
602 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
603 mii_phy = sis_priv->first_mii;
604 while (mii_phy) {
605 struct mii_phy *phy;
606 phy = mii_phy;
607 mii_phy = mii_phy->next;
608 kfree(phy);
609 }
610 return 0;
611 }
612
613 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
614 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
615 mii_phy->phy_addr = phy_addr;
616 mii_phy->status = mii_status;
617 mii_phy->next = sis_priv->mii;
618 sis_priv->mii = mii_phy;
619 sis_priv->first_mii = mii_phy;
620
621 for (i = 0; mii_chip_table[i].phy_id1; i++)
622 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
623 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
624 mii_phy->phy_types = mii_chip_table[i].phy_types;
625 if (mii_chip_table[i].phy_types == MIX)
626 mii_phy->phy_types =
627 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
628 printk(KERN_INFO "%s: %s transceiver found "
629 "at address %d.\n",
630 dev_name,
631 mii_chip_table[i].name,
632 phy_addr);
633 break;
634 }
635
636 if( !mii_chip_table[i].phy_id1 ) {
637 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
638 dev_name, phy_addr);
639 mii_phy->phy_types = UNKNOWN;
640 }
641 }
642
643 if (sis_priv->mii == NULL) {
644 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
645 return 0;
646 }
647
648 /* select default PHY for mac */
649 sis_priv->mii = NULL;
650 sis900_default_phy( net_dev );
651
652 /* Reset phy if default phy is internal sis900 */
653 if ((sis_priv->mii->phy_id0 == 0x001D) &&
654 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
655 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
656
657 /* workaround for ICS1893 PHY */
658 if ((sis_priv->mii->phy_id0 == 0x0015) &&
659 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
660 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
661
662 if(status & MII_STAT_LINK){
663 while (poll_bit) {
664 yield();
665
666 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
667 if (time_after_eq(jiffies, timeout)) {
668 printk(KERN_WARNING "%s: reset phy and link down now\n",
669 dev_name);
670 return -ETIME;
671 }
672 }
673 }
674
675 if (sis_priv->chipset_rev == SIS630E_900_REV) {
676 /* SiS 630E has some bugs on default value of PHY registers */
677 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
678 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
679 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
680 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
681 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
682 }
683
684 if (sis_priv->mii->status & MII_STAT_LINK)
685 netif_carrier_on(net_dev);
686 else
687 netif_carrier_off(net_dev);
688
689 return 1;
690}
691
692/**
693 * sis900_default_phy - Select default PHY for sis900 mac.
694 * @net_dev: the net device to probe for
695 *
696 * Select first detected PHY with link as default.
697 * If no one is link on, select PHY whose types is HOME as default.
698 * If HOME doesn't exist, select LAN.
699 */
700
701static u16 sis900_default_phy(struct net_device * net_dev)
702{
703 struct sis900_private * sis_priv = net_dev->priv;
704 struct mii_phy *phy = NULL, *phy_home = NULL,
705 *default_phy = NULL, *phy_lan = NULL;
706 u16 status;
707
708 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
709 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
710 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
711
712 /* Link ON & Not select default PHY & not ghost PHY */
713 if ((status & MII_STAT_LINK) && !default_phy &&
714 (phy->phy_types != UNKNOWN))
715 default_phy = phy;
716 else {
717 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
718 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
719 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
720 if (phy->phy_types == HOME)
721 phy_home = phy;
722 else if(phy->phy_types == LAN)
723 phy_lan = phy;
724 }
725 }
726
727 if (!default_phy && phy_home)
728 default_phy = phy_home;
729 else if (!default_phy && phy_lan)
730 default_phy = phy_lan;
731 else if (!default_phy)
732 default_phy = sis_priv->first_mii;
733
734 if (sis_priv->mii != default_phy) {
735 sis_priv->mii = default_phy;
736 sis_priv->cur_phy = default_phy->phy_addr;
737 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
738 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
739 }
740
da369b01
DV
741 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
742
1da177e4
LT
743 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
744 status &= (~MII_CNTL_ISOLATE);
745
746 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
747 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
748 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
749
750 return status;
751}
752
753
754/**
755 * sis900_set_capability - set the media capability of network adapter.
756 * @net_dev : the net device to probe for
757 * @phy : default PHY
758 *
759 * Set the media capability of network adapter according to
760 * mii status register. It's necessary before auto-negotiate.
761 */
762
763static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
764{
765 u16 cap;
766 u16 status;
767
768 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
769 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
770
771 cap = MII_NWAY_CSMA_CD |
772 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
773 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
774 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
775 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
776
777 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
778}
779
780
781/* Delay between EEPROM clock transitions. */
782#define eeprom_delay() inl(ee_addr)
783
784/**
785 * read_eeprom - Read Serial EEPROM
786 * @ioaddr: base i/o address
787 * @location: the EEPROM location to read
788 *
789 * Read Serial EEPROM through EEPROM Access Register.
790 * Note that location is in word (16 bits) unit
791 */
792
793static u16 __devinit read_eeprom(long ioaddr, int location)
794{
795 int i;
796 u16 retval = 0;
797 long ee_addr = ioaddr + mear;
798 u32 read_cmd = location | EEread;
799
800 outl(0, ee_addr);
801 eeprom_delay();
802 outl(EECS, ee_addr);
803 eeprom_delay();
804
805 /* Shift the read command (9) bits out. */
806 for (i = 8; i >= 0; i--) {
807 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
808 outl(dataval, ee_addr);
809 eeprom_delay();
810 outl(dataval | EECLK, ee_addr);
811 eeprom_delay();
812 }
813 outl(EECS, ee_addr);
814 eeprom_delay();
815
816 /* read the 16-bits data in */
817 for (i = 16; i > 0; i--) {
818 outl(EECS, ee_addr);
819 eeprom_delay();
820 outl(EECS | EECLK, ee_addr);
821 eeprom_delay();
822 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
823 eeprom_delay();
824 }
825
826 /* Terminate the EEPROM access. */
827 outl(0, ee_addr);
828 eeprom_delay();
829
830 return (retval);
831}
832
833/* Read and write the MII management registers using software-generated
834 serial MDIO protocol. Note that the command bits and data bits are
835 send out separately */
836#define mdio_delay() inl(mdio_addr)
837
838static void mdio_idle(long mdio_addr)
839{
840 outl(MDIO | MDDIR, mdio_addr);
841 mdio_delay();
842 outl(MDIO | MDDIR | MDC, mdio_addr);
843}
844
845/* Syncronize the MII management interface by shifting 32 one bits out. */
846static void mdio_reset(long mdio_addr)
847{
848 int i;
849
850 for (i = 31; i >= 0; i--) {
851 outl(MDDIR | MDIO, mdio_addr);
852 mdio_delay();
853 outl(MDDIR | MDIO | MDC, mdio_addr);
854 mdio_delay();
855 }
856 return;
857}
858
859/**
860 * mdio_read - read MII PHY register
861 * @net_dev: the net device to read
862 * @phy_id: the phy address to read
863 * @location: the phy regiester id to read
864 *
865 * Read MII registers through MDIO and MDC
866 * using MDIO management frame structure and protocol(defined by ISO/IEC).
867 * Please see SiS7014 or ICS spec
868 */
869
da369b01 870static int mdio_read(struct net_device *net_dev, int phy_id, int location)
1da177e4
LT
871{
872 long mdio_addr = net_dev->base_addr + mear;
873 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
874 u16 retval = 0;
875 int i;
876
877 mdio_reset(mdio_addr);
878 mdio_idle(mdio_addr);
879
880 for (i = 15; i >= 0; i--) {
881 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
882 outl(dataval, mdio_addr);
883 mdio_delay();
884 outl(dataval | MDC, mdio_addr);
885 mdio_delay();
886 }
887
888 /* Read the 16 data bits. */
889 for (i = 16; i > 0; i--) {
890 outl(0, mdio_addr);
891 mdio_delay();
892 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
893 outl(MDC, mdio_addr);
894 mdio_delay();
895 }
896 outl(0x00, mdio_addr);
897
898 return retval;
899}
900
901/**
902 * mdio_write - write MII PHY register
903 * @net_dev: the net device to write
904 * @phy_id: the phy address to write
905 * @location: the phy regiester id to write
906 * @value: the register value to write with
907 *
908 * Write MII registers with @value through MDIO and MDC
909 * using MDIO management frame structure and protocol(defined by ISO/IEC)
910 * please see SiS7014 or ICS spec
911 */
912
913static void mdio_write(struct net_device *net_dev, int phy_id, int location,
914 int value)
915{
916 long mdio_addr = net_dev->base_addr + mear;
917 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
918 int i;
919
920 mdio_reset(mdio_addr);
921 mdio_idle(mdio_addr);
922
923 /* Shift the command bits out. */
924 for (i = 15; i >= 0; i--) {
925 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
926 outb(dataval, mdio_addr);
927 mdio_delay();
928 outb(dataval | MDC, mdio_addr);
929 mdio_delay();
930 }
931 mdio_delay();
932
933 /* Shift the value bits out. */
934 for (i = 15; i >= 0; i--) {
935 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
936 outl(dataval, mdio_addr);
937 mdio_delay();
938 outl(dataval | MDC, mdio_addr);
939 mdio_delay();
940 }
941 mdio_delay();
942
943 /* Clear out extra bits. */
944 for (i = 2; i > 0; i--) {
945 outb(0, mdio_addr);
946 mdio_delay();
947 outb(MDC, mdio_addr);
948 mdio_delay();
949 }
950 outl(0x00, mdio_addr);
951
952 return;
953}
954
955
956/**
957 * sis900_reset_phy - reset sis900 mii phy.
958 * @net_dev: the net device to write
959 * @phy_addr: default phy address
960 *
961 * Some specific phy can't work properly without reset.
962 * This function will be called during initialization and
963 * link status change from ON to DOWN.
964 */
965
966static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
967{
968 int i = 0;
969 u16 status;
970
971 while (i++ < 2)
972 status = mdio_read(net_dev, phy_addr, MII_STATUS);
973
974 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
975
976 return status;
977}
978
979#ifdef CONFIG_NET_POLL_CONTROLLER
980/*
981 * Polling 'interrupt' - used by things like netconsole to send skbs
982 * without having to re-enable interrupts. It's not called while
983 * the interrupt routine is executing.
984*/
985static void sis900_poll(struct net_device *dev)
986{
987 disable_irq(dev->irq);
988 sis900_interrupt(dev->irq, dev, NULL);
989 enable_irq(dev->irq);
990}
991#endif
992
993/**
994 * sis900_open - open sis900 device
995 * @net_dev: the net device to open
996 *
997 * Do some initialization and start net interface.
998 * enable interrupts and set sis900 timer.
999 */
1000
1001static int
1002sis900_open(struct net_device *net_dev)
1003{
1004 struct sis900_private *sis_priv = net_dev->priv;
1005 long ioaddr = net_dev->base_addr;
1006 int ret;
1007
1008 /* Soft reset the chip. */
1009 sis900_reset(net_dev);
1010
1011 /* Equalizer workaround Rule */
1012 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1013
1014 ret = request_irq(net_dev->irq, &sis900_interrupt, SA_SHIRQ,
1015 net_dev->name, net_dev);
1016 if (ret)
1017 return ret;
1018
1019 sis900_init_rxfilter(net_dev);
1020
1021 sis900_init_tx_ring(net_dev);
1022 sis900_init_rx_ring(net_dev);
1023
1024 set_rx_mode(net_dev);
1025
1026 netif_start_queue(net_dev);
1027
1028 /* Workaround for EDB */
1029 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1030
1031 /* Enable all known interrupts by setting the interrupt mask. */
1032 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1033 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1034 outl(IE, ioaddr + ier);
1035
1036 sis900_check_mode(net_dev, sis_priv->mii);
1037
1038 /* Set the timer to switch to check for link beat and perhaps switch
1039 to an alternate media type. */
1040 init_timer(&sis_priv->timer);
1041 sis_priv->timer.expires = jiffies + HZ;
1042 sis_priv->timer.data = (unsigned long)net_dev;
1043 sis_priv->timer.function = &sis900_timer;
1044 add_timer(&sis_priv->timer);
1045
1046 return 0;
1047}
1048
1049/**
1050 * sis900_init_rxfilter - Initialize the Rx filter
1051 * @net_dev: the net device to initialize for
1052 *
1053 * Set receive filter address to our MAC address
1054 * and enable packet filtering.
1055 */
1056
1057static void
1058sis900_init_rxfilter (struct net_device * net_dev)
1059{
1060 struct sis900_private *sis_priv = net_dev->priv;
1061 long ioaddr = net_dev->base_addr;
1062 u32 rfcrSave;
1063 u32 i;
1064
1065 rfcrSave = inl(rfcr + ioaddr);
1066
1067 /* disable packet filtering before setting filter */
1068 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1069
1070 /* load MAC addr to filter data register */
1071 for (i = 0 ; i < 3 ; i++) {
1072 u32 w;
1073
1074 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1075 outl((i << RFADDR_shift), ioaddr + rfcr);
1076 outl(w, ioaddr + rfdr);
1077
1078 if (netif_msg_hw(sis_priv)) {
1079 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1080 net_dev->name, i, inl(ioaddr + rfdr));
1081 }
1082 }
1083
1084 /* enable packet filtering */
1085 outl(rfcrSave | RFEN, rfcr + ioaddr);
1086}
1087
1088/**
1089 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1090 * @net_dev: the net device to initialize for
1091 *
1092 * Initialize the Tx descriptor ring,
1093 */
1094
1095static void
1096sis900_init_tx_ring(struct net_device *net_dev)
1097{
1098 struct sis900_private *sis_priv = net_dev->priv;
1099 long ioaddr = net_dev->base_addr;
1100 int i;
1101
1102 sis_priv->tx_full = 0;
1103 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1104
1105 for (i = 0; i < NUM_TX_DESC; i++) {
1106 sis_priv->tx_skbuff[i] = NULL;
1107
1108 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1109 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1110 sis_priv->tx_ring[i].cmdsts = 0;
1111 sis_priv->tx_ring[i].bufptr = 0;
1112 }
1113
1114 /* load Transmit Descriptor Register */
1115 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1116 if (netif_msg_hw(sis_priv))
1117 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1118 net_dev->name, inl(ioaddr + txdp));
1119}
1120
1121/**
1122 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1123 * @net_dev: the net device to initialize for
1124 *
1125 * Initialize the Rx descriptor ring,
1126 * and pre-allocate recevie buffers (socket buffer)
1127 */
1128
1129static void
1130sis900_init_rx_ring(struct net_device *net_dev)
1131{
1132 struct sis900_private *sis_priv = net_dev->priv;
1133 long ioaddr = net_dev->base_addr;
1134 int i;
1135
1136 sis_priv->cur_rx = 0;
1137 sis_priv->dirty_rx = 0;
1138
1139 /* init RX descriptor */
1140 for (i = 0; i < NUM_RX_DESC; i++) {
1141 sis_priv->rx_skbuff[i] = NULL;
1142
1143 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1144 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1145 sis_priv->rx_ring[i].cmdsts = 0;
1146 sis_priv->rx_ring[i].bufptr = 0;
1147 }
1148
1149 /* allocate sock buffers */
1150 for (i = 0; i < NUM_RX_DESC; i++) {
1151 struct sk_buff *skb;
1152
1153 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1154 /* not enough memory for skbuff, this makes a "hole"
1155 on the buffer ring, it is not clear how the
1156 hardware will react to this kind of degenerated
1157 buffer */
1158 break;
1159 }
1160 skb->dev = net_dev;
1161 sis_priv->rx_skbuff[i] = skb;
1162 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1163 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
689be439 1164 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1da177e4
LT
1165 }
1166 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1167
1168 /* load Receive Descriptor Register */
1169 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1170 if (netif_msg_hw(sis_priv))
1171 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1172 net_dev->name, inl(ioaddr + rxdp));
1173}
1174
1175/**
1176 * sis630_set_eq - set phy equalizer value for 630 LAN
1177 * @net_dev: the net device to set equalizer value
1178 * @revision: 630 LAN revision number
1179 *
1180 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1181 * PHY register 14h(Test)
1182 * Bit 14: 0 -- Automatically dectect (default)
1183 * 1 -- Manually set Equalizer filter
1184 * Bit 13: 0 -- (Default)
1185 * 1 -- Speed up convergence of equalizer setting
1186 * Bit 9 : 0 -- (Default)
1187 * 1 -- Disable Baseline Wander
1188 * Bit 3~7 -- Equalizer filter setting
1189 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1190 * Then calculate equalizer value
1191 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1192 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1193 * Calculate Equalizer value:
1194 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1195 * When the equalizer is stable, this value is not a fixed value. It will be within
1196 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1197 * 0 <= max <= 4 --> set equalizer to max
1198 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1199 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1200 */
1201
1202static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1203{
1204 struct sis900_private *sis_priv = net_dev->priv;
1205 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1206 int i, maxcount=10;
1207
1208 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1209 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1210 return;
1211
1212 if (netif_carrier_ok(net_dev)) {
1213 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1214 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1215 (0x2200 | reg14h) & 0xBFFF);
1216 for (i=0; i < maxcount; i++) {
1217 eq_value = (0x00F8 & mdio_read(net_dev,
1218 sis_priv->cur_phy, MII_RESV)) >> 3;
1219 if (i == 0)
1220 max_value=min_value=eq_value;
1221 max_value = (eq_value > max_value) ?
1222 eq_value : max_value;
1223 min_value = (eq_value < min_value) ?
1224 eq_value : min_value;
1225 }
1226 /* 630E rule to determine the equalizer value */
1227 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1228 revision == SIS630ET_900_REV) {
1229 if (max_value < 5)
1230 eq_value = max_value;
1231 else if (max_value >= 5 && max_value < 15)
1232 eq_value = (max_value == min_value) ?
1233 max_value+2 : max_value+1;
1234 else if (max_value >= 15)
1235 eq_value=(max_value == min_value) ?
1236 max_value+6 : max_value+5;
1237 }
1238 /* 630B0&B1 rule to determine the equalizer value */
1239 if (revision == SIS630A_900_REV &&
1240 (sis_priv->host_bridge_rev == SIS630B0 ||
1241 sis_priv->host_bridge_rev == SIS630B1)) {
1242 if (max_value == 0)
1243 eq_value = 3;
1244 else
1245 eq_value = (max_value + min_value + 1)/2;
1246 }
1247 /* write equalizer value and setting */
1248 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1249 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1250 reg14h = (reg14h | 0x6000) & 0xFDFF;
1251 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1252 } else {
1253 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1254 if (revision == SIS630A_900_REV &&
1255 (sis_priv->host_bridge_rev == SIS630B0 ||
1256 sis_priv->host_bridge_rev == SIS630B1))
1257 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1258 (reg14h | 0x2200) & 0xBFFF);
1259 else
1260 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1261 (reg14h | 0x2000) & 0xBFFF);
1262 }
1263 return;
1264}
1265
1266/**
1267 * sis900_timer - sis900 timer routine
1268 * @data: pointer to sis900 net device
1269 *
1270 * On each timer ticks we check two things,
1271 * link status (ON/OFF) and link mode (10/100/Full/Half)
1272 */
1273
1274static void sis900_timer(unsigned long data)
1275{
1276 struct net_device *net_dev = (struct net_device *)data;
1277 struct sis900_private *sis_priv = net_dev->priv;
1278 struct mii_phy *mii_phy = sis_priv->mii;
f71e1309 1279 static const int next_tick = 5*HZ;
1da177e4
LT
1280 u16 status;
1281
1282 if (!sis_priv->autong_complete){
1283 int speed, duplex = 0;
1284
1285 sis900_read_mode(net_dev, &speed, &duplex);
1286 if (duplex){
1287 sis900_set_mode(net_dev->base_addr, speed, duplex);
1288 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1289 netif_start_queue(net_dev);
1290 }
1291
1292 sis_priv->timer.expires = jiffies + HZ;
1293 add_timer(&sis_priv->timer);
1294 return;
1295 }
1296
1297 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1298 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1299
1300 /* Link OFF -> ON */
1301 if (!netif_carrier_ok(net_dev)) {
1302 LookForLink:
1303 /* Search for new PHY */
1304 status = sis900_default_phy(net_dev);
1305 mii_phy = sis_priv->mii;
1306
1307 if (status & MII_STAT_LINK){
1308 sis900_check_mode(net_dev, mii_phy);
1309 netif_carrier_on(net_dev);
1310 }
1311 } else {
1312 /* Link ON -> OFF */
1313 if (!(status & MII_STAT_LINK)){
1314 netif_carrier_off(net_dev);
1315 if(netif_msg_link(sis_priv))
1316 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1317
1318 /* Change mode issue */
1319 if ((mii_phy->phy_id0 == 0x001D) &&
1320 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1321 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1322
1323 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1324
1325 goto LookForLink;
1326 }
1327 }
1328
1329 sis_priv->timer.expires = jiffies + next_tick;
1330 add_timer(&sis_priv->timer);
1331}
1332
1333/**
1334 * sis900_check_mode - check the media mode for sis900
1335 * @net_dev: the net device to be checked
1336 * @mii_phy: the mii phy
1337 *
1338 * Older driver gets the media mode from mii status output
1339 * register. Now we set our media capability and auto-negotiate
1340 * to get the upper bound of speed and duplex between two ends.
1341 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1342 * and autong_complete should be set to 1.
1343 */
1344
1345static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1346{
1347 struct sis900_private *sis_priv = net_dev->priv;
1348 long ioaddr = net_dev->base_addr;
1349 int speed, duplex;
1350
1351 if (mii_phy->phy_types == LAN) {
1352 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1353 sis900_set_capability(net_dev , mii_phy);
1354 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1355 } else {
1356 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1357 speed = HW_SPEED_HOME;
1358 duplex = FDX_CAPABLE_HALF_SELECTED;
1359 sis900_set_mode(ioaddr, speed, duplex);
1360 sis_priv->autong_complete = 1;
1361 }
1362}
1363
1364/**
1365 * sis900_set_mode - Set the media mode of mac register.
1366 * @ioaddr: the address of the device
1367 * @speed : the transmit speed to be determined
1368 * @duplex: the duplex mode to be determined
1369 *
1370 * Set the media mode of mac register txcfg/rxcfg according to
1371 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1372 * bus is used instead of PCI bus. When this bit is set 1, the
1373 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1374 * double words.
1375 */
1376
1377static void sis900_set_mode (long ioaddr, int speed, int duplex)
1378{
1379 u32 tx_flags = 0, rx_flags = 0;
1380
1381 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1382 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1383 (TX_FILL_THRESH << TxFILLT_shift);
1384 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1385 } else {
1386 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1387 (TX_FILL_THRESH << TxFILLT_shift);
1388 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1389 }
1390
1391 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1392 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1393 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1394 } else {
1395 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1396 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1397 }
1398
1399 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1400 tx_flags |= (TxCSI | TxHBI);
1401 rx_flags |= RxATX;
1402 }
1403
1404 outl (tx_flags, ioaddr + txcfg);
1405 outl (rx_flags, ioaddr + rxcfg);
1406}
1407
1408/**
1409 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1410 * @net_dev: the net device to read mode for
1411 * @phy_addr: mii phy address
1412 *
1413 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1414 * autong_complete should be set to 0 when starting auto-negotiation.
1415 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1416 * sis900_timer will wait for link on again if autong_complete = 0.
1417 */
1418
1419static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1420{
1421 struct sis900_private *sis_priv = net_dev->priv;
1422 int i = 0;
1423 u32 status;
1424
1425 while (i++ < 2)
1426 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1427
1428 if (!(status & MII_STAT_LINK)){
1429 if(netif_msg_link(sis_priv))
1430 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1431 sis_priv->autong_complete = 1;
1432 netif_carrier_off(net_dev);
1433 return;
1434 }
1435
1436 /* (Re)start AutoNegotiate */
1437 mdio_write(net_dev, phy_addr, MII_CONTROL,
1438 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1439 sis_priv->autong_complete = 0;
1440}
1441
1442
1443/**
1444 * sis900_read_mode - read media mode for sis900 internal phy
1445 * @net_dev: the net device to read mode for
1446 * @speed : the transmit speed to be determined
1447 * @duplex : the duplex mode to be determined
1448 *
1449 * The capability of remote end will be put in mii register autorec
1450 * after auto-negotiation. Use AND operation to get the upper bound
1451 * of speed and duplex between two ends.
1452 */
1453
1454static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1455{
1456 struct sis900_private *sis_priv = net_dev->priv;
1457 struct mii_phy *phy = sis_priv->mii;
1458 int phy_addr = sis_priv->cur_phy;
1459 u32 status;
1460 u16 autoadv, autorec;
1461 int i = 0;
1462
1463 while (i++ < 2)
1464 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1465
1466 if (!(status & MII_STAT_LINK))
1467 return;
1468
1469 /* AutoNegotiate completed */
1470 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1471 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1472 status = autoadv & autorec;
1473
1474 *speed = HW_SPEED_10_MBPS;
1475 *duplex = FDX_CAPABLE_HALF_SELECTED;
1476
1477 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1478 *speed = HW_SPEED_100_MBPS;
1479 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1480 *duplex = FDX_CAPABLE_FULL_SELECTED;
1481
1482 sis_priv->autong_complete = 1;
1483
1484 /* Workaround for Realtek RTL8201 PHY issue */
1485 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1486 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1487 *duplex = FDX_CAPABLE_FULL_SELECTED;
1488 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1489 *speed = HW_SPEED_100_MBPS;
1490 }
1491
1492 if(netif_msg_link(sis_priv))
1493 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1494 net_dev->name,
1495 *speed == HW_SPEED_100_MBPS ?
1496 "100mbps" : "10mbps",
1497 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1498 "full" : "half");
1499}
1500
1501/**
1502 * sis900_tx_timeout - sis900 transmit timeout routine
1503 * @net_dev: the net device to transmit
1504 *
1505 * print transmit timeout status
1506 * disable interrupts and do some tasks
1507 */
1508
1509static void sis900_tx_timeout(struct net_device *net_dev)
1510{
1511 struct sis900_private *sis_priv = net_dev->priv;
1512 long ioaddr = net_dev->base_addr;
1513 unsigned long flags;
1514 int i;
1515
1516 if(netif_msg_tx_err(sis_priv))
1517 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1518 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1519
1520 /* Disable interrupts by clearing the interrupt mask. */
1521 outl(0x0000, ioaddr + imr);
1522
1523 /* use spinlock to prevent interrupt handler accessing buffer ring */
1524 spin_lock_irqsave(&sis_priv->lock, flags);
1525
1526 /* discard unsent packets */
1527 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1528 for (i = 0; i < NUM_TX_DESC; i++) {
1529 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1530
1531 if (skb) {
1532 pci_unmap_single(sis_priv->pci_dev,
1533 sis_priv->tx_ring[i].bufptr, skb->len,
1534 PCI_DMA_TODEVICE);
1535 dev_kfree_skb_irq(skb);
1536 sis_priv->tx_skbuff[i] = NULL;
1537 sis_priv->tx_ring[i].cmdsts = 0;
1538 sis_priv->tx_ring[i].bufptr = 0;
1539 sis_priv->stats.tx_dropped++;
1540 }
1541 }
1542 sis_priv->tx_full = 0;
1543 netif_wake_queue(net_dev);
1544
1545 spin_unlock_irqrestore(&sis_priv->lock, flags);
1546
1547 net_dev->trans_start = jiffies;
1548
1549 /* load Transmit Descriptor Register */
1550 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1551
1552 /* Enable all known interrupts by setting the interrupt mask. */
1553 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1554 return;
1555}
1556
1557/**
1558 * sis900_start_xmit - sis900 start transmit routine
1559 * @skb: socket buffer pointer to put the data being transmitted
1560 * @net_dev: the net device to transmit with
1561 *
1562 * Set the transmit buffer descriptor,
1563 * and write TxENA to enable transmit state machine.
1564 * tell upper layer if the buffer is full
1565 */
1566
1567static int
1568sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1569{
1570 struct sis900_private *sis_priv = net_dev->priv;
1571 long ioaddr = net_dev->base_addr;
1572 unsigned int entry;
1573 unsigned long flags;
1574 unsigned int index_cur_tx, index_dirty_tx;
1575 unsigned int count_dirty_tx;
1576
1577 /* Don't transmit data before the complete of auto-negotiation */
1578 if(!sis_priv->autong_complete){
1579 netif_stop_queue(net_dev);
1580 return 1;
1581 }
1582
1583 spin_lock_irqsave(&sis_priv->lock, flags);
1584
1585 /* Calculate the next Tx descriptor entry. */
1586 entry = sis_priv->cur_tx % NUM_TX_DESC;
1587 sis_priv->tx_skbuff[entry] = skb;
1588
1589 /* set the transmit buffer descriptor and enable Transmit State Machine */
1590 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1591 skb->data, skb->len, PCI_DMA_TODEVICE);
1592 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1593 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1594
1595 sis_priv->cur_tx ++;
1596 index_cur_tx = sis_priv->cur_tx;
1597 index_dirty_tx = sis_priv->dirty_tx;
1598
1599 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1600 count_dirty_tx ++;
1601
1602 if (index_cur_tx == index_dirty_tx) {
1603 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1604 sis_priv->tx_full = 1;
1605 netif_stop_queue(net_dev);
1606 } else if (count_dirty_tx < NUM_TX_DESC) {
1607 /* Typical path, tell upper layer that more transmission is possible */
1608 netif_start_queue(net_dev);
1609 } else {
1610 /* buffer full, tell upper layer no more transmission */
1611 sis_priv->tx_full = 1;
1612 netif_stop_queue(net_dev);
1613 }
1614
1615 spin_unlock_irqrestore(&sis_priv->lock, flags);
1616
1617 net_dev->trans_start = jiffies;
1618
1619 if (netif_msg_tx_queued(sis_priv))
1620 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1621 "to slot %d.\n",
1622 net_dev->name, skb->data, (int)skb->len, entry);
1623
1624 return 0;
1625}
1626
1627/**
1628 * sis900_interrupt - sis900 interrupt handler
1629 * @irq: the irq number
1630 * @dev_instance: the client data object
1631 * @regs: snapshot of processor context
1632 *
1633 * The interrupt handler does all of the Rx thread work,
1634 * and cleans up after the Tx thread
1635 */
1636
1637static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1638{
1639 struct net_device *net_dev = dev_instance;
1640 struct sis900_private *sis_priv = net_dev->priv;
1641 int boguscnt = max_interrupt_work;
1642 long ioaddr = net_dev->base_addr;
1643 u32 status;
1644 unsigned int handled = 0;
1645
1646 spin_lock (&sis_priv->lock);
1647
1648 do {
1649 status = inl(ioaddr + isr);
1650
1651 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1652 /* nothing intresting happened */
1653 break;
1654 handled = 1;
1655
1656 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1657 if (status & (RxORN | RxERR | RxOK))
1658 /* Rx interrupt */
1659 sis900_rx(net_dev);
1660
1661 if (status & (TxURN | TxERR | TxIDLE))
1662 /* Tx interrupt */
1663 sis900_finish_xmit(net_dev);
1664
1665 /* something strange happened !!! */
1666 if (status & HIBERR) {
1667 if(netif_msg_intr(sis_priv))
1668 printk(KERN_INFO "%s: Abnormal interrupt,"
1669 "status %#8.8x.\n", net_dev->name, status);
1670 break;
1671 }
1672 if (--boguscnt < 0) {
1673 if(netif_msg_intr(sis_priv))
1674 printk(KERN_INFO "%s: Too much work at interrupt, "
1675 "interrupt status = %#8.8x.\n",
1676 net_dev->name, status);
1677 break;
1678 }
1679 } while (1);
1680
1681 if(netif_msg_intr(sis_priv))
1682 printk(KERN_DEBUG "%s: exiting interrupt, "
1683 "interrupt status = 0x%#8.8x.\n",
1684 net_dev->name, inl(ioaddr + isr));
1685
1686 spin_unlock (&sis_priv->lock);
1687 return IRQ_RETVAL(handled);
1688}
1689
1690/**
1691 * sis900_rx - sis900 receive routine
1692 * @net_dev: the net device which receives data
1693 *
1694 * Process receive interrupt events,
1695 * put buffer to higher layer and refill buffer pool
0b28002f 1696 * Note: This function is called by interrupt handler,
1da177e4
LT
1697 * don't do "too much" work here
1698 */
1699
1700static int sis900_rx(struct net_device *net_dev)
1701{
1702 struct sis900_private *sis_priv = net_dev->priv;
1703 long ioaddr = net_dev->base_addr;
1704 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1705 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
7380a78a 1706 int rx_work_limit;
1da177e4
LT
1707
1708 if (netif_msg_rx_status(sis_priv))
1709 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1710 "status:0x%8.8x\n",
1711 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
7380a78a 1712 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1da177e4
LT
1713
1714 while (rx_status & OWN) {
1715 unsigned int rx_size;
1716
7380a78a
VA
1717 if (--rx_work_limit < 0)
1718 break;
1719
1da177e4
LT
1720 rx_size = (rx_status & DSIZE) - CRC_SIZE;
1721
1722 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1723 /* corrupted packet received */
1724 if (netif_msg_rx_err(sis_priv))
1725 printk(KERN_DEBUG "%s: Corrupted packet "
1726 "received, buffer status = 0x%8.8x.\n",
1727 net_dev->name, rx_status);
1728 sis_priv->stats.rx_errors++;
1729 if (rx_status & OVERRUN)
1730 sis_priv->stats.rx_over_errors++;
1731 if (rx_status & (TOOLONG|RUNT))
1732 sis_priv->stats.rx_length_errors++;
1733 if (rx_status & (RXISERR | FAERR))
1734 sis_priv->stats.rx_frame_errors++;
1735 if (rx_status & CRCERR)
1736 sis_priv->stats.rx_crc_errors++;
1737 /* reset buffer descriptor state */
1738 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1739 } else {
1740 struct sk_buff * skb;
1741
1742 /* This situation should never happen, but due to
1743 some unknow bugs, it is possible that
1744 we are working on NULL sk_buff :-( */
1745 if (sis_priv->rx_skbuff[entry] == NULL) {
1746 if (netif_msg_rx_err(sis_priv))
7380a78a
VA
1747 printk(KERN_WARNING "%s: NULL pointer "
1748 "encountered in Rx ring\n"
1749 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1750 net_dev->name, sis_priv->cur_rx,
1751 sis_priv->dirty_rx);
1da177e4
LT
1752 break;
1753 }
1754
1755 pci_unmap_single(sis_priv->pci_dev,
1756 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1757 PCI_DMA_FROMDEVICE);
1758 /* give the socket buffer to upper layers */
1759 skb = sis_priv->rx_skbuff[entry];
1760 skb_put(skb, rx_size);
1761 skb->protocol = eth_type_trans(skb, net_dev);
1762 netif_rx(skb);
1763
1764 /* some network statistics */
1765 if ((rx_status & BCAST) == MCAST)
1766 sis_priv->stats.multicast++;
1767 net_dev->last_rx = jiffies;
1768 sis_priv->stats.rx_bytes += rx_size;
1769 sis_priv->stats.rx_packets++;
1770
1771 /* refill the Rx buffer, what if there is not enought
1772 * memory for new socket buffer ?? */
1773 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1774 /* not enough memory for skbuff, this makes a
1775 * "hole" on the buffer ring, it is not clear
1776 * how the hardware will react to this kind
1777 * of degenerated buffer */
1778 if (netif_msg_rx_status(sis_priv))
1779 printk(KERN_INFO "%s: Memory squeeze,"
1780 "deferring packet.\n",
1781 net_dev->name);
1782 sis_priv->rx_skbuff[entry] = NULL;
1783 /* reset buffer descriptor state */
1784 sis_priv->rx_ring[entry].cmdsts = 0;
1785 sis_priv->rx_ring[entry].bufptr = 0;
1786 sis_priv->stats.rx_dropped++;
7380a78a 1787 sis_priv->cur_rx++;
1da177e4
LT
1788 break;
1789 }
1790 skb->dev = net_dev;
1791 sis_priv->rx_skbuff[entry] = skb;
1792 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1793 sis_priv->rx_ring[entry].bufptr =
689be439 1794 pci_map_single(sis_priv->pci_dev, skb->data,
1da177e4
LT
1795 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1796 sis_priv->dirty_rx++;
1797 }
1798 sis_priv->cur_rx++;
1799 entry = sis_priv->cur_rx % NUM_RX_DESC;
1800 rx_status = sis_priv->rx_ring[entry].cmdsts;
1801 } // while
1802
1803 /* refill the Rx buffer, what if the rate of refilling is slower
1804 * than consuming ?? */
7380a78a 1805 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1da177e4
LT
1806 struct sk_buff *skb;
1807
1808 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1809
1810 if (sis_priv->rx_skbuff[entry] == NULL) {
1811 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1812 /* not enough memory for skbuff, this makes a
1813 * "hole" on the buffer ring, it is not clear
1814 * how the hardware will react to this kind
1815 * of degenerated buffer */
1816 if (netif_msg_rx_err(sis_priv))
1817 printk(KERN_INFO "%s: Memory squeeze,"
1818 "deferring packet.\n",
1819 net_dev->name);
1820 sis_priv->stats.rx_dropped++;
1821 break;
1822 }
1823 skb->dev = net_dev;
1824 sis_priv->rx_skbuff[entry] = skb;
1825 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1826 sis_priv->rx_ring[entry].bufptr =
689be439 1827 pci_map_single(sis_priv->pci_dev, skb->data,
1da177e4
LT
1828 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1829 }
1830 }
1831 /* re-enable the potentially idle receive state matchine */
1832 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1833
1834 return 0;
1835}
1836
1837/**
1838 * sis900_finish_xmit - finish up transmission of packets
1839 * @net_dev: the net device to be transmitted on
1840 *
1841 * Check for error condition and free socket buffer etc
1842 * schedule for more transmission as needed
0b28002f 1843 * Note: This function is called by interrupt handler,
1da177e4
LT
1844 * don't do "too much" work here
1845 */
1846
1847static void sis900_finish_xmit (struct net_device *net_dev)
1848{
1849 struct sis900_private *sis_priv = net_dev->priv;
1850
1851 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1852 struct sk_buff *skb;
1853 unsigned int entry;
1854 u32 tx_status;
1855
1856 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1857 tx_status = sis_priv->tx_ring[entry].cmdsts;
1858
1859 if (tx_status & OWN) {
1860 /* The packet is not transmitted yet (owned by hardware) !
1861 * Note: the interrupt is generated only when Tx Machine
1862 * is idle, so this is an almost impossible case */
1863 break;
1864 }
1865
1866 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1867 /* packet unsuccessfully transmitted */
1868 if (netif_msg_tx_err(sis_priv))
1869 printk(KERN_DEBUG "%s: Transmit "
1870 "error, Tx status %8.8x.\n",
1871 net_dev->name, tx_status);
1872 sis_priv->stats.tx_errors++;
1873 if (tx_status & UNDERRUN)
1874 sis_priv->stats.tx_fifo_errors++;
1875 if (tx_status & ABORT)
1876 sis_priv->stats.tx_aborted_errors++;
1877 if (tx_status & NOCARRIER)
1878 sis_priv->stats.tx_carrier_errors++;
1879 if (tx_status & OWCOLL)
1880 sis_priv->stats.tx_window_errors++;
1881 } else {
1882 /* packet successfully transmitted */
1883 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1884 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1885 sis_priv->stats.tx_packets++;
1886 }
1887 /* Free the original skb. */
1888 skb = sis_priv->tx_skbuff[entry];
1889 pci_unmap_single(sis_priv->pci_dev,
1890 sis_priv->tx_ring[entry].bufptr, skb->len,
1891 PCI_DMA_TODEVICE);
1892 dev_kfree_skb_irq(skb);
1893 sis_priv->tx_skbuff[entry] = NULL;
1894 sis_priv->tx_ring[entry].bufptr = 0;
1895 sis_priv->tx_ring[entry].cmdsts = 0;
1896 }
1897
1898 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1899 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1900 /* The ring is no longer full, clear tx_full and schedule
1901 * more transmission by netif_wake_queue(net_dev) */
1902 sis_priv->tx_full = 0;
1903 netif_wake_queue (net_dev);
1904 }
1905}
1906
1907/**
1908 * sis900_close - close sis900 device
1909 * @net_dev: the net device to be closed
1910 *
1911 * Disable interrupts, stop the Tx and Rx Status Machine
1912 * free Tx and RX socket buffer
1913 */
1914
1915static int sis900_close(struct net_device *net_dev)
1916{
1917 long ioaddr = net_dev->base_addr;
1918 struct sis900_private *sis_priv = net_dev->priv;
1919 struct sk_buff *skb;
1920 int i;
1921
1922 netif_stop_queue(net_dev);
1923
1924 /* Disable interrupts by clearing the interrupt mask. */
1925 outl(0x0000, ioaddr + imr);
1926 outl(0x0000, ioaddr + ier);
1927
1928 /* Stop the chip's Tx and Rx Status Machine */
1929 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1930
1931 del_timer(&sis_priv->timer);
1932
1933 free_irq(net_dev->irq, net_dev);
1934
1935 /* Free Tx and RX skbuff */
1936 for (i = 0; i < NUM_RX_DESC; i++) {
1937 skb = sis_priv->rx_skbuff[i];
1938 if (skb) {
1939 pci_unmap_single(sis_priv->pci_dev,
1940 sis_priv->rx_ring[i].bufptr,
1941 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1942 dev_kfree_skb(skb);
1943 sis_priv->rx_skbuff[i] = NULL;
1944 }
1945 }
1946 for (i = 0; i < NUM_TX_DESC; i++) {
1947 skb = sis_priv->tx_skbuff[i];
1948 if (skb) {
1949 pci_unmap_single(sis_priv->pci_dev,
1950 sis_priv->tx_ring[i].bufptr, skb->len,
1951 PCI_DMA_TODEVICE);
1952 dev_kfree_skb(skb);
1953 sis_priv->tx_skbuff[i] = NULL;
1954 }
1955 }
1956
1957 /* Green! Put the chip in low-power mode. */
1958
1959 return 0;
1960}
1961
1962/**
1963 * sis900_get_drvinfo - Return information about driver
1964 * @net_dev: the net device to probe
1965 * @info: container for info returned
1966 *
1967 * Process ethtool command such as "ehtool -i" to show information
1968 */
1969
1970static void sis900_get_drvinfo(struct net_device *net_dev,
1971 struct ethtool_drvinfo *info)
1972{
1973 struct sis900_private *sis_priv = net_dev->priv;
1974
1975 strcpy (info->driver, SIS900_MODULE_NAME);
1976 strcpy (info->version, SIS900_DRV_VERSION);
1977 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1978}
1979
1980static u32 sis900_get_msglevel(struct net_device *net_dev)
1981{
1982 struct sis900_private *sis_priv = net_dev->priv;
1983 return sis_priv->msg_enable;
1984}
1985
1986static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
1987{
1988 struct sis900_private *sis_priv = net_dev->priv;
1989 sis_priv->msg_enable = value;
1990}
1991
da369b01
DV
1992static u32 sis900_get_link(struct net_device *net_dev)
1993{
1994 struct sis900_private *sis_priv = net_dev->priv;
1995 return mii_link_ok(&sis_priv->mii_info);
1996}
1997
1998static int sis900_get_settings(struct net_device *net_dev,
1999 struct ethtool_cmd *cmd)
2000{
2001 struct sis900_private *sis_priv = net_dev->priv;
2002 spin_lock_irq(&sis_priv->lock);
2003 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2004 spin_unlock_irq(&sis_priv->lock);
2005 return 0;
2006}
2007
2008static int sis900_set_settings(struct net_device *net_dev,
2009 struct ethtool_cmd *cmd)
2010{
2011 struct sis900_private *sis_priv = net_dev->priv;
2012 int rt;
2013 spin_lock_irq(&sis_priv->lock);
2014 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2015 spin_unlock_irq(&sis_priv->lock);
2016 return rt;
2017}
2018
2019static int sis900_nway_reset(struct net_device *net_dev)
2020{
2021 struct sis900_private *sis_priv = net_dev->priv;
2022 return mii_nway_restart(&sis_priv->mii_info);
2023}
2024
ea37ccea
DV
2025/**
2026 * sis900_set_wol - Set up Wake on Lan registers
2027 * @net_dev: the net device to probe
2028 * @wol: container for info passed to the driver
2029 *
2030 * Process ethtool command "wol" to setup wake on lan features.
2031 * SiS900 supports sending WoL events if a correct packet is received,
2032 * but there is no simple way to filter them to only a subset (broadcast,
2033 * multicast, unicast or arp).
2034 */
2035
2036static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2037{
2038 struct sis900_private *sis_priv = net_dev->priv;
2039 long pmctrl_addr = net_dev->base_addr + pmctrl;
2040 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2041
2042 if (wol->wolopts == 0) {
2043 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
7bef4b39 2044 cfgpmcsr &= ~PME_EN;
ea37ccea
DV
2045 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2046 outl(pmctrl_bits, pmctrl_addr);
2047 if (netif_msg_wol(sis_priv))
2048 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2049 return 0;
2050 }
2051
2052 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2053 | WAKE_BCAST | WAKE_ARP))
2054 return -EINVAL;
2055
2056 if (wol->wolopts & WAKE_MAGIC)
2057 pmctrl_bits |= MAGICPKT;
2058 if (wol->wolopts & WAKE_PHY)
2059 pmctrl_bits |= LINKON;
2060
2061 outl(pmctrl_bits, pmctrl_addr);
2062
2063 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2064 cfgpmcsr |= PME_EN;
2065 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2066 if (netif_msg_wol(sis_priv))
2067 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2068
2069 return 0;
2070}
2071
2072static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2073{
2074 long pmctrl_addr = net_dev->base_addr + pmctrl;
2075 u32 pmctrl_bits;
2076
2077 pmctrl_bits = inl(pmctrl_addr);
2078 if (pmctrl_bits & MAGICPKT)
2079 wol->wolopts |= WAKE_MAGIC;
2080 if (pmctrl_bits & LINKON)
2081 wol->wolopts |= WAKE_PHY;
2082
2083 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2084}
2085
1da177e4
LT
2086static struct ethtool_ops sis900_ethtool_ops = {
2087 .get_drvinfo = sis900_get_drvinfo,
2088 .get_msglevel = sis900_get_msglevel,
2089 .set_msglevel = sis900_set_msglevel,
da369b01
DV
2090 .get_link = sis900_get_link,
2091 .get_settings = sis900_get_settings,
2092 .set_settings = sis900_set_settings,
2093 .nway_reset = sis900_nway_reset,
ea37ccea
DV
2094 .get_wol = sis900_get_wol,
2095 .set_wol = sis900_set_wol
1da177e4
LT
2096};
2097
2098/**
2099 * mii_ioctl - process MII i/o control command
2100 * @net_dev: the net device to command for
2101 * @rq: parameter for command
2102 * @cmd: the i/o command
2103 *
2104 * Process MII command like read/write MII register
2105 */
2106
2107static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2108{
2109 struct sis900_private *sis_priv = net_dev->priv;
2110 struct mii_ioctl_data *data = if_mii(rq);
2111
2112 switch(cmd) {
2113 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2114 data->phy_id = sis_priv->mii->phy_addr;
2115 /* Fall Through */
2116
2117 case SIOCGMIIREG: /* Read MII PHY register. */
2118 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2119 return 0;
2120
2121 case SIOCSMIIREG: /* Write MII PHY register. */
2122 if (!capable(CAP_NET_ADMIN))
2123 return -EPERM;
2124 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2125 return 0;
2126 default:
2127 return -EOPNOTSUPP;
2128 }
2129}
2130
2131/**
2132 * sis900_get_stats - Get sis900 read/write statistics
2133 * @net_dev: the net device to get statistics for
2134 *
2135 * get tx/rx statistics for sis900
2136 */
2137
2138static struct net_device_stats *
2139sis900_get_stats(struct net_device *net_dev)
2140{
2141 struct sis900_private *sis_priv = net_dev->priv;
2142
2143 return &sis_priv->stats;
2144}
2145
2146/**
2147 * sis900_set_config - Set media type by net_device.set_config
2148 * @dev: the net device for media type change
2149 * @map: ifmap passed by ifconfig
2150 *
2151 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2152 * we support only port changes. All other runtime configuration
2153 * changes will be ignored
2154 */
2155
2156static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2157{
2158 struct sis900_private *sis_priv = dev->priv;
2159 struct mii_phy *mii_phy = sis_priv->mii;
2160
2161 u16 status;
2162
2163 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2164 /* we switch on the ifmap->port field. I couldn't find anything
2165 * like a definition or standard for the values of that field.
2166 * I think the meaning of those values is device specific. But
2167 * since I would like to change the media type via the ifconfig
2168 * command I use the definition from linux/netdevice.h
2169 * (which seems to be different from the ifport(pcmcia) definition) */
2170 switch(map->port){
2171 case IF_PORT_UNKNOWN: /* use auto here */
2172 dev->if_port = map->port;
2173 /* we are going to change the media type, so the Link
2174 * will be temporary down and we need to reflect that
2175 * here. When the Link comes up again, it will be
2176 * sensed by the sis_timer procedure, which also does
2177 * all the rest for us */
2178 netif_carrier_off(dev);
2179
2180 /* read current state */
2181 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2182
2183 /* enable auto negotiation and reset the negotioation
2184 * (I don't really know what the auto negatiotiation
2185 * reset really means, but it sounds for me right to
2186 * do one here) */
2187 mdio_write(dev, mii_phy->phy_addr,
2188 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2189
2190 break;
2191
2192 case IF_PORT_10BASET: /* 10BaseT */
2193 dev->if_port = map->port;
2194
2195 /* we are going to change the media type, so the Link
2196 * will be temporary down and we need to reflect that
2197 * here. When the Link comes up again, it will be
2198 * sensed by the sis_timer procedure, which also does
2199 * all the rest for us */
2200 netif_carrier_off(dev);
2201
2202 /* set Speed to 10Mbps */
2203 /* read current state */
2204 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2205
2206 /* disable auto negotiation and force 10MBit mode*/
2207 mdio_write(dev, mii_phy->phy_addr,
2208 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2209 MII_CNTL_AUTO));
2210 break;
2211
2212 case IF_PORT_100BASET: /* 100BaseT */
2213 case IF_PORT_100BASETX: /* 100BaseTx */
2214 dev->if_port = map->port;
2215
2216 /* we are going to change the media type, so the Link
2217 * will be temporary down and we need to reflect that
2218 * here. When the Link comes up again, it will be
2219 * sensed by the sis_timer procedure, which also does
2220 * all the rest for us */
2221 netif_carrier_off(dev);
2222
2223 /* set Speed to 100Mbps */
2224 /* disable auto negotiation and enable 100MBit Mode */
2225 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2226 mdio_write(dev, mii_phy->phy_addr,
2227 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2228 MII_CNTL_SPEED);
2229
2230 break;
2231
2232 case IF_PORT_10BASE2: /* 10Base2 */
2233 case IF_PORT_AUI: /* AUI */
2234 case IF_PORT_100BASEFX: /* 100BaseFx */
2235 /* These Modes are not supported (are they?)*/
2236 return -EOPNOTSUPP;
2237 break;
2238
2239 default:
2240 return -EINVAL;
2241 }
2242 }
2243 return 0;
2244}
2245
2246/**
2247 * sis900_mcast_bitnr - compute hashtable index
2248 * @addr: multicast address
2249 * @revision: revision id of chip
2250 *
2251 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2252 * hash table, which makes this function a little bit different from other drivers
2253 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2254 * multicast hash table.
2255 */
2256
2257static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2258{
2259
2260 u32 crc = ether_crc(6, addr);
2261
2262 /* leave 8 or 7 most siginifant bits */
2263 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2264 return ((int)(crc >> 24));
2265 else
2266 return ((int)(crc >> 25));
2267}
2268
2269/**
2270 * set_rx_mode - Set SiS900 receive mode
2271 * @net_dev: the net device to be set
2272 *
2273 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2274 * And set the appropriate multicast filter.
2275 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2276 */
2277
2278static void set_rx_mode(struct net_device *net_dev)
2279{
2280 long ioaddr = net_dev->base_addr;
2281 struct sis900_private * sis_priv = net_dev->priv;
2282 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2283 int i, table_entries;
2284 u32 rx_mode;
2285
7f927fcc 2286 /* 635 Hash Table entries = 256(2^16) */
1da177e4
LT
2287 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2288 (sis_priv->chipset_rev == SIS900B_900_REV))
2289 table_entries = 16;
2290 else
2291 table_entries = 8;
2292
2293 if (net_dev->flags & IFF_PROMISC) {
2294 /* Accept any kinds of packets */
2295 rx_mode = RFPromiscuous;
2296 for (i = 0; i < table_entries; i++)
2297 mc_filter[i] = 0xffff;
2298 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2299 (net_dev->flags & IFF_ALLMULTI)) {
2300 /* too many multicast addresses or accept all multicast packet */
2301 rx_mode = RFAAB | RFAAM;
2302 for (i = 0; i < table_entries; i++)
2303 mc_filter[i] = 0xffff;
2304 } else {
2305 /* Accept Broadcast packet, destination address matchs our
2306 * MAC address, use Receive Filter to reject unwanted MCAST
2307 * packets */
2308 struct dev_mc_list *mclist;
2309 rx_mode = RFAAB;
2310 for (i = 0, mclist = net_dev->mc_list;
2311 mclist && i < net_dev->mc_count;
2312 i++, mclist = mclist->next) {
2313 unsigned int bit_nr =
2314 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2315 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2316 }
2317 }
2318
2319 /* update Multicast Hash Table in Receive Filter */
2320 for (i = 0; i < table_entries; i++) {
2321 /* why plus 0x04 ??, That makes the correct value for hash table. */
2322 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2323 outl(mc_filter[i], ioaddr + rfdr);
2324 }
2325
2326 outl(RFEN | rx_mode, ioaddr + rfcr);
2327
2328 /* sis900 is capable of looping back packets at MAC level for
2329 * debugging purpose */
2330 if (net_dev->flags & IFF_LOOPBACK) {
2331 u32 cr_saved;
2332 /* We must disable Tx/Rx before setting loopback mode */
2333 cr_saved = inl(ioaddr + cr);
2334 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2335 /* enable loopback */
2336 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2337 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2338 /* restore cr */
2339 outl(cr_saved, ioaddr + cr);
2340 }
2341
2342 return;
2343}
2344
2345/**
2346 * sis900_reset - Reset sis900 MAC
2347 * @net_dev: the net device to reset
2348 *
2349 * reset sis900 MAC and wait until finished
2350 * reset through command register
2351 * change backoff algorithm for 900B0 & 635 M/B
2352 */
2353
2354static void sis900_reset(struct net_device *net_dev)
2355{
2356 struct sis900_private * sis_priv = net_dev->priv;
2357 long ioaddr = net_dev->base_addr;
2358 int i = 0;
2359 u32 status = TxRCMP | RxRCMP;
2360
2361 outl(0, ioaddr + ier);
2362 outl(0, ioaddr + imr);
2363 outl(0, ioaddr + rfcr);
2364
2365 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2366
2367 /* Check that the chip has finished the reset. */
2368 while (status && (i++ < 1000)) {
2369 status ^= (inl(isr + ioaddr) & status);
2370 }
2371
2372 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2373 (sis_priv->chipset_rev == SIS900B_900_REV) )
2374 outl(PESEL | RND_CNT, ioaddr + cfg);
2375 else
2376 outl(PESEL, ioaddr + cfg);
2377}
2378
2379/**
2380 * sis900_remove - Remove sis900 device
2381 * @pci_dev: the pci device to be removed
2382 *
2383 * remove and release SiS900 net device
2384 */
2385
2386static void __devexit sis900_remove(struct pci_dev *pci_dev)
2387{
2388 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2389 struct sis900_private * sis_priv = net_dev->priv;
2390 struct mii_phy *phy = NULL;
2391
2392 while (sis_priv->first_mii) {
2393 phy = sis_priv->first_mii;
2394 sis_priv->first_mii = phy->next;
2395 kfree(phy);
2396 }
2397
2398 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2399 sis_priv->rx_ring_dma);
2400 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2401 sis_priv->tx_ring_dma);
2402 unregister_netdev(net_dev);
2403 free_netdev(net_dev);
2404 pci_release_regions(pci_dev);
2405 pci_set_drvdata(pci_dev, NULL);
2406}
2407
2408#ifdef CONFIG_PM
2409
2410static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2411{
2412 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2413 long ioaddr = net_dev->base_addr;
2414
2415 if(!netif_running(net_dev))
2416 return 0;
2417
2418 netif_stop_queue(net_dev);
2419 netif_device_detach(net_dev);
2420
2421 /* Stop the chip's Tx and Rx Status Machine */
2422 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2423
2424 pci_set_power_state(pci_dev, PCI_D3hot);
2425 pci_save_state(pci_dev);
2426
2427 return 0;
2428}
2429
2430static int sis900_resume(struct pci_dev *pci_dev)
2431{
2432 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2433 struct sis900_private *sis_priv = net_dev->priv;
2434 long ioaddr = net_dev->base_addr;
2435
2436 if(!netif_running(net_dev))
2437 return 0;
2438 pci_restore_state(pci_dev);
2439 pci_set_power_state(pci_dev, PCI_D0);
2440
2441 sis900_init_rxfilter(net_dev);
2442
2443 sis900_init_tx_ring(net_dev);
2444 sis900_init_rx_ring(net_dev);
2445
2446 set_rx_mode(net_dev);
2447
2448 netif_device_attach(net_dev);
2449 netif_start_queue(net_dev);
2450
2451 /* Workaround for EDB */
2452 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2453
2454 /* Enable all known interrupts by setting the interrupt mask. */
2455 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2456 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2457 outl(IE, ioaddr + ier);
2458
2459 sis900_check_mode(net_dev, sis_priv->mii);
2460
2461 return 0;
2462}
2463#endif /* CONFIG_PM */
2464
2465static struct pci_driver sis900_pci_driver = {
2466 .name = SIS900_MODULE_NAME,
2467 .id_table = sis900_pci_tbl,
2468 .probe = sis900_probe,
2469 .remove = __devexit_p(sis900_remove),
2470#ifdef CONFIG_PM
2471 .suspend = sis900_suspend,
2472 .resume = sis900_resume,
2473#endif /* CONFIG_PM */
2474};
2475
2476static int __init sis900_init_module(void)
2477{
2478/* when a module, this is printed whether or not devices are found in probe */
2479#ifdef MODULE
2480 printk(version);
2481#endif
2482
2483 return pci_module_init(&sis900_pci_driver);
2484}
2485
2486static void __exit sis900_cleanup_module(void)
2487{
2488 pci_unregister_driver(&sis900_pci_driver);
2489}
2490
2491module_init(sis900_init_module);
2492module_exit(sis900_cleanup_module);
2493