]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/net/sfc/phy.h
sfc: Update version, copyright dates, authors
[net-next-2.6.git] / drivers / net / sfc / phy.h
CommitLineData
8ceee660
BH
1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
906bb26c 3 * Copyright 2007-2009 Solarflare Communications Inc.
8ceee660
BH
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10#ifndef EFX_PHY_H
11#define EFX_PHY_H
12
13/****************************************************************************
e6fa2eb7 14 * 10Xpress (SFX7101 and SFT9001) PHYs
8ceee660 15 */
e6fa2eb7
BH
16extern struct efx_phy_operations falcon_sfx7101_phy_ops;
17extern struct efx_phy_operations falcon_sft9001_phy_ops;
8ceee660 18
398468ed 19extern void tenxpress_set_id_led(struct efx_nic *efx, enum efx_led_mode mode);
8ceee660 20
190dbcfd
BH
21/* Wait for the PHY to boot. Return 0 on success, -EINVAL if the PHY failed
22 * to boot due to corrupt flash, or some other negative error code. */
23extern int sft9001_wait_boot(struct efx_nic *efx);
24
8ceee660 25/****************************************************************************
b37b62fe 26 * AMCC/Quake QT202x PHYs
8ceee660 27 */
b37b62fe 28extern struct efx_phy_operations falcon_qt202x_phy_ops;
8ceee660 29
d2d2c373 30/* These PHYs provide various H/W control states for LEDs */
8ceee660
BH
31#define QUAKE_LED_LINK_INVAL (0)
32#define QUAKE_LED_LINK_STAT (1)
33#define QUAKE_LED_LINK_ACT (2)
34#define QUAKE_LED_LINK_ACTSTAT (3)
35#define QUAKE_LED_OFF (4)
36#define QUAKE_LED_ON (5)
37#define QUAKE_LED_LINK_INPUT (6) /* Pin is an input. */
38/* What link the LED tracks */
39#define QUAKE_LED_TXLINK (0)
40#define QUAKE_LED_RXLINK (8)
41
b37b62fe 42extern void falcon_qt202x_set_led(struct efx_nic *p, int led, int state);
8ceee660 43
8880f4ec
BH
44/****************************************************************************
45 * Siena managed PHYs
46 */
47extern struct efx_phy_operations efx_mcdi_phy_ops;
48
49extern int efx_mcdi_mdio_read(struct efx_nic *efx, unsigned int bus,
50 unsigned int prtad, unsigned int devad,
51 u16 addr, u16 *value_out, u32 *status_out);
52extern int efx_mcdi_mdio_write(struct efx_nic *efx, unsigned int bus,
53 unsigned int prtad, unsigned int devad,
54 u16 addr, u16 value, u32 *status_out);
55extern void efx_mcdi_phy_decode_link(struct efx_nic *efx,
56 struct efx_link_state *link_state,
57 u32 speed, u32 flags, u32 fcntl);
58extern int efx_mcdi_phy_reconfigure(struct efx_nic *efx);
59extern void efx_mcdi_phy_check_fcntl(struct efx_nic *efx, u32 lpa);
60
8ceee660 61#endif