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sfc: Extend loopback mode enumeration
[net-next-2.6.git] / drivers / net / sfc / mdio_10g.c
CommitLineData
8ceee660
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1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2006-2008 Solarflare Communications Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9/*
10 * Useful functions for working with MDIO clause 45 PHYs
11 */
12#include <linux/types.h>
13#include <linux/ethtool.h>
14#include <linux/delay.h>
15#include "net_driver.h"
16#include "mdio_10g.h"
8b9dc8dd 17#include "workarounds.h"
8ceee660 18
68e7f45e 19unsigned efx_mdio_id_oui(u32 id)
3f39a5e9
BH
20{
21 unsigned oui = 0;
22 int i;
23
24 /* The bits of the OUI are designated a..x, with a=0 and b variable.
25 * In the id register c is the MSB but the OUI is conventionally
26 * written as bytes h..a, p..i, x..q. Reorder the bits accordingly. */
27 for (i = 0; i < 22; ++i)
28 if (id & (1 << (i + 10)))
29 oui |= 1 << (i ^ 7);
30
31 return oui;
32}
33
68e7f45e 34int efx_mdio_reset_mmd(struct efx_nic *port, int mmd,
8ceee660
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35 int spins, int spintime)
36{
37 u32 ctrl;
8ceee660
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38
39 /* Catch callers passing values in the wrong units (or just silly) */
40 EFX_BUG_ON_PARANOID(spins * spintime >= 5000);
41
68e7f45e 42 efx_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET);
8ceee660
BH
43 /* Wait for the reset bit to clear. */
44 do {
45 msleep(spintime);
68e7f45e 46 ctrl = efx_mdio_read(port, mmd, MDIO_CTRL1);
8ceee660
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47 spins--;
48
68e7f45e 49 } while (spins && (ctrl & MDIO_CTRL1_RESET));
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50
51 return spins ? spins : -ETIMEDOUT;
52}
53
68e7f45e 54static int efx_mdio_check_mmd(struct efx_nic *efx, int mmd, int fault_fatal)
8ceee660
BH
55{
56 int status;
8ceee660 57
3273c2e8
BH
58 if (LOOPBACK_INTERNAL(efx))
59 return 0;
60
04cc8cac
BH
61 if (mmd != MDIO_MMD_AN) {
62 /* Read MMD STATUS2 to check it is responding. */
68e7f45e
BH
63 status = efx_mdio_read(efx, mmd, MDIO_STAT2);
64 if ((status & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL) {
04cc8cac
BH
65 EFX_ERR(efx, "PHY MMD %d not responding.\n", mmd);
66 return -EIO;
67 }
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68 }
69
70 /* Read MMD STATUS 1 to check for fault. */
68e7f45e
BH
71 status = efx_mdio_read(efx, mmd, MDIO_STAT1);
72 if (status & MDIO_STAT1_FAULT) {
8ceee660
BH
73 if (fault_fatal) {
74 EFX_ERR(efx, "PHY MMD %d reporting fatal"
75 " fault: status %x\n", mmd, status);
76 return -EIO;
77 } else {
78 EFX_LOG(efx, "PHY MMD %d reporting status"
79 " %x (expected)\n", mmd, status);
80 }
81 }
82 return 0;
83}
84
85/* This ought to be ridiculous overkill. We expect it to fail rarely */
86#define MDIO45_RESET_TIME 1000 /* ms */
87#define MDIO45_RESET_ITERS 100
88
68e7f45e 89int efx_mdio_wait_reset_mmds(struct efx_nic *efx, unsigned int mmd_mask)
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90{
91 const int spintime = MDIO45_RESET_TIME / MDIO45_RESET_ITERS;
92 int tries = MDIO45_RESET_ITERS;
93 int rc = 0;
94 int in_reset;
95
96 while (tries) {
97 int mask = mmd_mask;
98 int mmd = 0;
99 int stat;
100 in_reset = 0;
101 while (mask) {
102 if (mask & 1) {
68e7f45e 103 stat = efx_mdio_read(efx, mmd, MDIO_CTRL1);
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104 if (stat < 0) {
105 EFX_ERR(efx, "failed to read status of"
106 " MMD %d\n", mmd);
107 return -EIO;
108 }
68e7f45e 109 if (stat & MDIO_CTRL1_RESET)
8ceee660
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110 in_reset |= (1 << mmd);
111 }
112 mask = mask >> 1;
113 mmd++;
114 }
115 if (!in_reset)
116 break;
117 tries--;
118 msleep(spintime);
119 }
120 if (in_reset != 0) {
121 EFX_ERR(efx, "not all MMDs came out of reset in time."
122 " MMDs still in reset: %x\n", in_reset);
123 rc = -ETIMEDOUT;
124 }
125 return rc;
126}
127
68e7f45e
BH
128int efx_mdio_check_mmds(struct efx_nic *efx,
129 unsigned int mmd_mask, unsigned int fatal_mask)
8ceee660 130{
68e7f45e 131 int mmd = 0, probe_mmd, devs1, devs2;
27dd2cac 132 u32 devices;
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133
134 /* Historically we have probed the PHYXS to find out what devices are
135 * present,but that doesn't work so well if the PHYXS isn't expected
136 * to exist, if so just find the first item in the list supplied. */
68e7f45e 137 probe_mmd = (mmd_mask & MDIO_DEVS_PHYXS) ? MDIO_MMD_PHYXS :
8ceee660 138 __ffs(mmd_mask);
8ceee660
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139
140 /* Check all the expected MMDs are present */
68e7f45e
BH
141 devs1 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS1);
142 devs2 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS2);
143 if (devs1 < 0 || devs2 < 0) {
8ceee660
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144 EFX_ERR(efx, "failed to read devices present\n");
145 return -EIO;
146 }
68e7f45e 147 devices = devs1 | (devs2 << 16);
8ceee660
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148 if ((devices & mmd_mask) != mmd_mask) {
149 EFX_ERR(efx, "required MMDs not present: got %x, "
150 "wanted %x\n", devices, mmd_mask);
151 return -ENODEV;
152 }
153 EFX_TRACE(efx, "Devices present: %x\n", devices);
154
155 /* Check all required MMDs are responding and happy. */
156 while (mmd_mask) {
157 if (mmd_mask & 1) {
158 int fault_fatal = fatal_mask & 1;
68e7f45e 159 if (efx_mdio_check_mmd(efx, mmd, fault_fatal))
8ceee660
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160 return -EIO;
161 }
162 mmd_mask = mmd_mask >> 1;
163 fatal_mask = fatal_mask >> 1;
164 mmd++;
165 }
166
167 return 0;
168}
169
68e7f45e 170bool efx_mdio_links_ok(struct efx_nic *efx, unsigned int mmd_mask)
8ceee660 171{
3273c2e8
BH
172 /* If the port is in loopback, then we should only consider a subset
173 * of mmd's */
174 if (LOOPBACK_INTERNAL(efx))
dc8cfa55 175 return true;
e58f69f4 176 else if (LOOPBACK_MASK(efx) & LOOPBACKS_WS)
dc8cfa55 177 return false;
f8b87c17
BH
178 else if (efx_phy_mode_disabled(efx->phy_mode))
179 return false;
67797763 180 else if (efx->loopback_mode == LOOPBACK_PHYXS)
68e7f45e
BH
181 mmd_mask &= ~(MDIO_DEVS_PHYXS |
182 MDIO_DEVS_PCS |
183 MDIO_DEVS_PMAPMD |
184 MDIO_DEVS_AN);
67797763 185 else if (efx->loopback_mode == LOOPBACK_PCS)
68e7f45e
BH
186 mmd_mask &= ~(MDIO_DEVS_PCS |
187 MDIO_DEVS_PMAPMD |
188 MDIO_DEVS_AN);
3273c2e8 189 else if (efx->loopback_mode == LOOPBACK_PMAPMD)
68e7f45e
BH
190 mmd_mask &= ~(MDIO_DEVS_PMAPMD |
191 MDIO_DEVS_AN);
67797763 192
68e7f45e 193 return mdio45_links_ok(&efx->mdio, mmd_mask);
8ceee660
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194}
195
68e7f45e 196void efx_mdio_transmit_disable(struct efx_nic *efx)
3273c2e8 197{
68e7f45e
BH
198 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
199 MDIO_PMA_TXDIS, MDIO_PMD_TXDIS_GLOBAL,
200 efx->phy_mode & PHY_MODE_TX_DISABLED);
3273c2e8
BH
201}
202
68e7f45e 203void efx_mdio_phy_reconfigure(struct efx_nic *efx)
3273c2e8 204{
68e7f45e
BH
205 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
206 MDIO_CTRL1, MDIO_PMA_CTRL1_LOOPBACK,
207 efx->loopback_mode == LOOPBACK_PMAPMD);
208 efx_mdio_set_flag(efx, MDIO_MMD_PCS,
209 MDIO_CTRL1, MDIO_PCS_CTRL1_LOOPBACK,
210 efx->loopback_mode == LOOPBACK_PCS);
211 efx_mdio_set_flag(efx, MDIO_MMD_PHYXS,
212 MDIO_CTRL1, MDIO_PHYXS_CTRL1_LOOPBACK,
e58f69f4 213 efx->loopback_mode == LOOPBACK_PHYXS_WS);
3273c2e8
BH
214}
215
68e7f45e
BH
216static void efx_mdio_set_mmd_lpower(struct efx_nic *efx,
217 int lpower, int mmd)
3e133c44 218{
68e7f45e 219 int stat = efx_mdio_read(efx, mmd, MDIO_STAT1);
3e133c44
BH
220
221 EFX_TRACE(efx, "Setting low power mode for MMD %d to %d\n",
222 mmd, lpower);
223
68e7f45e
BH
224 if (stat & MDIO_STAT1_LPOWERABLE) {
225 efx_mdio_set_flag(efx, mmd, MDIO_CTRL1,
226 MDIO_CTRL1_LPOWER, lpower);
3e133c44
BH
227 }
228}
229
68e7f45e
BH
230void efx_mdio_set_mmds_lpower(struct efx_nic *efx,
231 int low_power, unsigned int mmd_mask)
3e133c44
BH
232{
233 int mmd = 0;
68e7f45e 234 mmd_mask &= ~MDIO_DEVS_AN;
3e133c44
BH
235 while (mmd_mask) {
236 if (mmd_mask & 1)
68e7f45e 237 efx_mdio_set_mmd_lpower(efx, low_power, mmd);
3e133c44
BH
238 mmd_mask = (mmd_mask >> 1);
239 mmd++;
240 }
241}
242
04cc8cac 243/**
68e7f45e 244 * efx_mdio_set_settings - Set (some of) the PHY settings over MDIO.
8ceee660
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245 * @efx: Efx NIC
246 * @ecmd: New settings
8ceee660 247 */
68e7f45e 248int efx_mdio_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
8ceee660 249{
04cc8cac 250 struct ethtool_cmd prev;
04cc8cac
BH
251
252 efx->phy_op->get_settings(efx, &prev);
253
254 if (ecmd->advertising == prev.advertising &&
255 ecmd->speed == prev.speed &&
256 ecmd->duplex == prev.duplex &&
257 ecmd->port == prev.port &&
258 ecmd->autoneg == prev.autoneg)
8ceee660 259 return 0;
04cc8cac
BH
260
261 /* We can only change these settings for -T PHYs */
262 if (prev.port != PORT_TP || ecmd->port != PORT_TP)
263 return -EINVAL;
264
af4ad9bc 265 /* Check that PHY supports these settings */
fc2b5e67
BH
266 if (!ecmd->autoneg ||
267 (ecmd->advertising | SUPPORTED_Autoneg) & ~prev.supported)
04cc8cac
BH
268 return -EINVAL;
269
d3245b28
BH
270 efx_link_set_advertising(efx, ecmd->advertising | ADVERTISED_Autoneg);
271 efx_mdio_an_reconfigure(efx);
272 return 0;
273}
274
275/**
276 * efx_mdio_an_reconfigure - Push advertising flags and restart autonegotiation
277 * @efx: Efx NIC
278 */
279void efx_mdio_an_reconfigure(struct efx_nic *efx)
280{
281 bool xnp = (efx->link_advertising & ADVERTISED_10000baseT_Full
282 || EFX_WORKAROUND_13204(efx));
283 int reg;
284
285 WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN));
fc2b5e67
BH
286
287 /* Set up the base page */
288 reg = ADVERTISE_CSMA;
d3245b28 289 if (efx->link_advertising & ADVERTISED_10baseT_Half)
fc2b5e67 290 reg |= ADVERTISE_10HALF;
d3245b28 291 if (efx->link_advertising & ADVERTISED_10baseT_Full)
fc2b5e67 292 reg |= ADVERTISE_10FULL;
d3245b28 293 if (efx->link_advertising & ADVERTISED_100baseT_Half)
fc2b5e67 294 reg |= ADVERTISE_100HALF;
d3245b28 295 if (efx->link_advertising & ADVERTISED_100baseT_Full)
fc2b5e67
BH
296 reg |= ADVERTISE_100FULL;
297 if (xnp)
298 reg |= ADVERTISE_RESV;
d3245b28
BH
299 else if (efx->link_advertising & (ADVERTISED_1000baseT_Half |
300 ADVERTISED_1000baseT_Full))
fc2b5e67 301 reg |= ADVERTISE_NPAGE;
d3245b28
BH
302 if (efx->link_advertising & ADVERTISED_Pause)
303 reg |= ADVERTISE_PAUSE_CAP;
304 if (efx->link_advertising & ADVERTISED_Asym_Pause)
305 reg |= ADVERTISE_PAUSE_ASYM;
fc2b5e67
BH
306 efx_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);
307
308 /* Set up the (extended) next page if necessary */
309 if (efx->phy_op->set_npage_adv)
d3245b28 310 efx->phy_op->set_npage_adv(efx, efx->link_advertising);
fc2b5e67
BH
311
312 /* Enable and restart AN */
313 reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1);
314 reg |= MDIO_AN_CTRL1_ENABLE;
315 if (!(EFX_WORKAROUND_15195(efx) &&
316 LOOPBACK_MASK(efx) & efx->phy_op->loopbacks))
317 reg |= MDIO_AN_CTRL1_RESTART;
318 if (xnp)
319 reg |= MDIO_AN_CTRL1_XNP;
320 else
321 reg &= ~MDIO_AN_CTRL1_XNP;
322 efx_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg);
04cc8cac
BH
323}
324
68e7f45e 325enum efx_fc_type efx_mdio_get_pause(struct efx_nic *efx)
04cc8cac 326{
18ea024f 327 BUILD_BUG_ON(EFX_FC_AUTO & (EFX_FC_RX | EFX_FC_TX));
04cc8cac 328
18ea024f 329 if (!(efx->wanted_fc & EFX_FC_AUTO))
04cc8cac 330 return efx->wanted_fc;
18ea024f
BH
331
332 WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN));
333
334 return mii_resolve_flowctrl_fdx(
335 mii_advertise_flowctrl(efx->wanted_fc),
336 efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_LPA));
8ceee660 337}