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[net-next-2.6.git] / drivers / net / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
32#include <linux/types.h>
33#include <linux/module.h>
34#include <linux/pci.h>
35#include <linux/netdevice.h>
36#include <linux/vmalloc.h>
37#include <linux/string.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/ethtool.h>
45#include <linux/if_vlan.h>
46
47#include "ixgbevf.h"
48
49char ixgbevf_driver_name[] = "ixgbevf";
50static const char ixgbevf_driver_string[] =
51 "Intel(R) 82599 Virtual Function";
52
53#define DRV_VERSION "1.0.0-k0"
54const char ixgbevf_driver_version[] = DRV_VERSION;
55static char ixgbevf_copyright[] = "Copyright (c) 2009 Intel Corporation.";
56
57static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
58 [board_82599_vf] = &ixgbevf_vf_info,
59};
60
61/* ixgbevf_pci_tbl - PCI Device ID Table
62 *
63 * Wildcard entries (PCI_ANY_ID) should come last
64 * Last entry must be all 0s
65 *
66 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
67 * Class, Class Mask, private data (not used) }
68 */
69static struct pci_device_id ixgbevf_pci_tbl[] = {
70 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
71 board_82599_vf},
72
73 /* required last entry */
74 {0, }
75};
76MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
77
78MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
79MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
80MODULE_LICENSE("GPL");
81MODULE_VERSION(DRV_VERSION);
82
83#define DEFAULT_DEBUG_LEVEL_SHIFT 3
84
85/* forward decls */
86static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector);
87static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
88 u32 itr_reg);
89
90static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
91 struct ixgbevf_ring *rx_ring,
92 u32 val)
93{
94 /*
95 * Force memory writes to complete before letting h/w
96 * know there are new descriptors to fetch. (Only
97 * applicable for weak-ordered memory model archs,
98 * such as IA-64).
99 */
100 wmb();
101 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
102}
103
104/*
105 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
106 * @adapter: pointer to adapter struct
107 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
108 * @queue: queue to map the corresponding interrupt to
109 * @msix_vector: the vector to map to the corresponding queue
110 *
111 */
112static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
113 u8 queue, u8 msix_vector)
114{
115 u32 ivar, index;
116 struct ixgbe_hw *hw = &adapter->hw;
117 if (direction == -1) {
118 /* other causes */
119 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
120 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
121 ivar &= ~0xFF;
122 ivar |= msix_vector;
123 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
124 } else {
125 /* tx or rx causes */
126 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
127 index = ((16 * (queue & 1)) + (8 * direction));
128 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
129 ivar &= ~(0xFF << index);
130 ivar |= (msix_vector << index);
131 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
132 }
133}
134
135static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
136 struct ixgbevf_tx_buffer
137 *tx_buffer_info)
138{
139 if (tx_buffer_info->dma) {
140 if (tx_buffer_info->mapped_as_page)
141 pci_unmap_page(adapter->pdev,
142 tx_buffer_info->dma,
143 tx_buffer_info->length,
144 PCI_DMA_TODEVICE);
145 else
146 pci_unmap_single(adapter->pdev,
147 tx_buffer_info->dma,
148 tx_buffer_info->length,
149 PCI_DMA_TODEVICE);
150 tx_buffer_info->dma = 0;
151 }
152 if (tx_buffer_info->skb) {
153 dev_kfree_skb_any(tx_buffer_info->skb);
154 tx_buffer_info->skb = NULL;
155 }
156 tx_buffer_info->time_stamp = 0;
157 /* tx_buffer_info must be completely set up in the transmit path */
158}
159
160static inline bool ixgbevf_check_tx_hang(struct ixgbevf_adapter *adapter,
161 struct ixgbevf_ring *tx_ring,
162 unsigned int eop)
163{
164 struct ixgbe_hw *hw = &adapter->hw;
165 u32 head, tail;
166
167 /* Detect a transmit hang in hardware, this serializes the
168 * check with the clearing of time_stamp and movement of eop */
169 head = readl(hw->hw_addr + tx_ring->head);
170 tail = readl(hw->hw_addr + tx_ring->tail);
171 adapter->detect_tx_hung = false;
172 if ((head != tail) &&
173 tx_ring->tx_buffer_info[eop].time_stamp &&
174 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ)) {
175 /* detected Tx unit hang */
176 union ixgbe_adv_tx_desc *tx_desc;
177 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
178 printk(KERN_ERR "Detected Tx Unit Hang\n"
179 " Tx Queue <%d>\n"
180 " TDH, TDT <%x>, <%x>\n"
181 " next_to_use <%x>\n"
182 " next_to_clean <%x>\n"
183 "tx_buffer_info[next_to_clean]\n"
184 " time_stamp <%lx>\n"
185 " jiffies <%lx>\n",
186 tx_ring->queue_index,
187 head, tail,
188 tx_ring->next_to_use, eop,
189 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
190 return true;
191 }
192
193 return false;
194}
195
196#define IXGBE_MAX_TXD_PWR 14
197#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
198
199/* Tx Descriptors needed, worst case */
200#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
201 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
202#ifdef MAX_SKB_FRAGS
203#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
204 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
205#else
206#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD)
207#endif
208
209static void ixgbevf_tx_timeout(struct net_device *netdev);
210
211/**
212 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
213 * @adapter: board private structure
214 * @tx_ring: tx ring to clean
215 **/
216static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter,
217 struct ixgbevf_ring *tx_ring)
218{
219 struct net_device *netdev = adapter->netdev;
220 struct ixgbe_hw *hw = &adapter->hw;
221 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
222 struct ixgbevf_tx_buffer *tx_buffer_info;
223 unsigned int i, eop, count = 0;
224 unsigned int total_bytes = 0, total_packets = 0;
225
226 i = tx_ring->next_to_clean;
227 eop = tx_ring->tx_buffer_info[i].next_to_watch;
228 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
229
230 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
231 (count < tx_ring->work_limit)) {
232 bool cleaned = false;
233 for ( ; !cleaned; count++) {
234 struct sk_buff *skb;
235 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
236 tx_buffer_info = &tx_ring->tx_buffer_info[i];
237 cleaned = (i == eop);
238 skb = tx_buffer_info->skb;
239
240 if (cleaned && skb) {
241 unsigned int segs, bytecount;
242
243 /* gso_segs is currently only valid for tcp */
244 segs = skb_shinfo(skb)->gso_segs ?: 1;
245 /* multiply data chunks by size of headers */
246 bytecount = ((segs - 1) * skb_headlen(skb)) +
247 skb->len;
248 total_packets += segs;
249 total_bytes += bytecount;
250 }
251
252 ixgbevf_unmap_and_free_tx_resource(adapter,
253 tx_buffer_info);
254
255 tx_desc->wb.status = 0;
256
257 i++;
258 if (i == tx_ring->count)
259 i = 0;
260 }
261
262 eop = tx_ring->tx_buffer_info[i].next_to_watch;
263 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
264 }
265
266 tx_ring->next_to_clean = i;
267
268#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
269 if (unlikely(count && netif_carrier_ok(netdev) &&
270 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
271 /* Make sure that anybody stopping the queue after this
272 * sees the new next_to_clean.
273 */
274 smp_mb();
275#ifdef HAVE_TX_MQ
276 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
277 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
278 netif_wake_subqueue(netdev, tx_ring->queue_index);
279 ++adapter->restart_queue;
280 }
281#else
282 if (netif_queue_stopped(netdev) &&
283 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
284 netif_wake_queue(netdev);
285 ++adapter->restart_queue;
286 }
287#endif
288 }
289
290 if (adapter->detect_tx_hung) {
291 if (ixgbevf_check_tx_hang(adapter, tx_ring, i)) {
292 /* schedule immediate reset if we believe we hung */
293 printk(KERN_INFO
294 "tx hang %d detected, resetting adapter\n",
295 adapter->tx_timeout_count + 1);
296 ixgbevf_tx_timeout(adapter->netdev);
297 }
298 }
299
300 /* re-arm the interrupt */
301 if ((count >= tx_ring->work_limit) &&
302 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) {
303 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);
304 }
305
306 tx_ring->total_bytes += total_bytes;
307 tx_ring->total_packets += total_packets;
308
309 adapter->net_stats.tx_bytes += total_bytes;
310 adapter->net_stats.tx_packets += total_packets;
311
312 return (count < tx_ring->work_limit);
313}
314
315/**
316 * ixgbevf_receive_skb - Send a completed packet up the stack
317 * @q_vector: structure containing interrupt and ring information
318 * @skb: packet to send up
319 * @status: hardware indication of status of receive
320 * @rx_ring: rx descriptor ring (for a specific queue) to setup
321 * @rx_desc: rx descriptor
322 **/
323static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
324 struct sk_buff *skb, u8 status,
325 struct ixgbevf_ring *ring,
326 union ixgbe_adv_rx_desc *rx_desc)
327{
328 struct ixgbevf_adapter *adapter = q_vector->adapter;
329 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
330 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
331 int ret;
332
333 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
334 if (adapter->vlgrp && is_vlan)
335 vlan_gro_receive(&q_vector->napi,
336 adapter->vlgrp,
337 tag, skb);
338 else
339 napi_gro_receive(&q_vector->napi, skb);
340 } else {
341 if (adapter->vlgrp && is_vlan)
342 ret = vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
343 else
344 ret = netif_rx(skb);
345 }
346}
347
348/**
349 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
350 * @adapter: address of board private structure
351 * @status_err: hardware indication of status of receive
352 * @skb: skb currently being received and modified
353 **/
354static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
355 u32 status_err, struct sk_buff *skb)
356{
357 skb->ip_summed = CHECKSUM_NONE;
358
359 /* Rx csum disabled */
360 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
361 return;
362
363 /* if IP and error */
364 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
365 (status_err & IXGBE_RXDADV_ERR_IPE)) {
366 adapter->hw_csum_rx_error++;
367 return;
368 }
369
370 if (!(status_err & IXGBE_RXD_STAT_L4CS))
371 return;
372
373 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
374 adapter->hw_csum_rx_error++;
375 return;
376 }
377
378 /* It must be a TCP or UDP packet with a valid checksum */
379 skb->ip_summed = CHECKSUM_UNNECESSARY;
380 adapter->hw_csum_rx_good++;
381}
382
383/**
384 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
385 * @adapter: address of board private structure
386 **/
387static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
388 struct ixgbevf_ring *rx_ring,
389 int cleaned_count)
390{
391 struct pci_dev *pdev = adapter->pdev;
392 union ixgbe_adv_rx_desc *rx_desc;
393 struct ixgbevf_rx_buffer *bi;
394 struct sk_buff *skb;
395 unsigned int i;
396 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
397
398 i = rx_ring->next_to_use;
399 bi = &rx_ring->rx_buffer_info[i];
400
401 while (cleaned_count--) {
402 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
403
404 if (!bi->page_dma &&
405 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
406 if (!bi->page) {
407 bi->page = netdev_alloc_page(adapter->netdev);
408 if (!bi->page) {
409 adapter->alloc_rx_page_failed++;
410 goto no_buffers;
411 }
412 bi->page_offset = 0;
413 } else {
414 /* use a half page if we're re-using */
415 bi->page_offset ^= (PAGE_SIZE / 2);
416 }
417
418 bi->page_dma = pci_map_page(pdev, bi->page,
419 bi->page_offset,
420 (PAGE_SIZE / 2),
421 PCI_DMA_FROMDEVICE);
422 }
423
424 skb = bi->skb;
425 if (!skb) {
426 skb = netdev_alloc_skb(adapter->netdev,
427 bufsz);
428
429 if (!skb) {
430 adapter->alloc_rx_buff_failed++;
431 goto no_buffers;
432 }
433
434 /*
435 * Make buffer alignment 2 beyond a 16 byte boundary
436 * this will result in a 16 byte aligned IP header after
437 * the 14 byte MAC header is removed
438 */
439 skb_reserve(skb, NET_IP_ALIGN);
440
441 bi->skb = skb;
442 }
443 if (!bi->dma) {
444 bi->dma = pci_map_single(pdev, skb->data,
445 rx_ring->rx_buf_len,
446 PCI_DMA_FROMDEVICE);
447 }
448 /* Refresh the desc even if buffer_addrs didn't change because
449 * each write-back erases this info. */
450 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
451 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
452 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
453 } else {
454 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
455 }
456
457 i++;
458 if (i == rx_ring->count)
459 i = 0;
460 bi = &rx_ring->rx_buffer_info[i];
461 }
462
463no_buffers:
464 if (rx_ring->next_to_use != i) {
465 rx_ring->next_to_use = i;
466 if (i-- == 0)
467 i = (rx_ring->count - 1);
468
469 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
470 }
471}
472
473static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
474 u64 qmask)
475{
476 u32 mask;
477 struct ixgbe_hw *hw = &adapter->hw;
478
479 mask = (qmask & 0xFFFFFFFF);
480 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
481}
482
483static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
484{
485 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
486}
487
488static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
489{
490 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
491}
492
493static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
494 struct ixgbevf_ring *rx_ring,
495 int *work_done, int work_to_do)
496{
497 struct ixgbevf_adapter *adapter = q_vector->adapter;
498 struct pci_dev *pdev = adapter->pdev;
499 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
500 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
501 struct sk_buff *skb;
502 unsigned int i;
503 u32 len, staterr;
504 u16 hdr_info;
505 bool cleaned = false;
506 int cleaned_count = 0;
507 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
508
509 i = rx_ring->next_to_clean;
510 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
511 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
512 rx_buffer_info = &rx_ring->rx_buffer_info[i];
513
514 while (staterr & IXGBE_RXD_STAT_DD) {
515 u32 upper_len = 0;
516 if (*work_done >= work_to_do)
517 break;
518 (*work_done)++;
519
520 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
521 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc));
522 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
523 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
524 if (hdr_info & IXGBE_RXDADV_SPH)
525 adapter->rx_hdr_split++;
526 if (len > IXGBEVF_RX_HDR_SIZE)
527 len = IXGBEVF_RX_HDR_SIZE;
528 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
529 } else {
530 len = le16_to_cpu(rx_desc->wb.upper.length);
531 }
532 cleaned = true;
533 skb = rx_buffer_info->skb;
534 prefetch(skb->data - NET_IP_ALIGN);
535 rx_buffer_info->skb = NULL;
536
537 if (rx_buffer_info->dma) {
538 pci_unmap_single(pdev, rx_buffer_info->dma,
539 rx_ring->rx_buf_len,
540 PCI_DMA_FROMDEVICE);
541 rx_buffer_info->dma = 0;
542 skb_put(skb, len);
543 }
544
545 if (upper_len) {
546 pci_unmap_page(pdev, rx_buffer_info->page_dma,
547 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
548 rx_buffer_info->page_dma = 0;
549 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
550 rx_buffer_info->page,
551 rx_buffer_info->page_offset,
552 upper_len);
553
554 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
555 (page_count(rx_buffer_info->page) != 1))
556 rx_buffer_info->page = NULL;
557 else
558 get_page(rx_buffer_info->page);
559
560 skb->len += upper_len;
561 skb->data_len += upper_len;
562 skb->truesize += upper_len;
563 }
564
565 i++;
566 if (i == rx_ring->count)
567 i = 0;
568
569 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
570 prefetch(next_rxd);
571 cleaned_count++;
572
573 next_buffer = &rx_ring->rx_buffer_info[i];
574
575 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
576 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
577 rx_buffer_info->skb = next_buffer->skb;
578 rx_buffer_info->dma = next_buffer->dma;
579 next_buffer->skb = skb;
580 next_buffer->dma = 0;
581 } else {
582 skb->next = next_buffer->skb;
583 skb->next->prev = skb;
584 }
585 adapter->non_eop_descs++;
586 goto next_desc;
587 }
588
589 /* ERR_MASK will only have valid bits if EOP set */
590 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
591 dev_kfree_skb_irq(skb);
592 goto next_desc;
593 }
594
595 ixgbevf_rx_checksum(adapter, staterr, skb);
596
597 /* probably a little skewed due to removing CRC */
598 total_rx_bytes += skb->len;
599 total_rx_packets++;
600
601 /*
602 * Work around issue of some types of VM to VM loop back
603 * packets not getting split correctly
604 */
605 if (staterr & IXGBE_RXD_STAT_LB) {
606 u32 header_fixup_len = skb->len - skb->data_len;
607 if (header_fixup_len < 14)
608 skb_push(skb, header_fixup_len);
609 }
610 skb->protocol = eth_type_trans(skb, adapter->netdev);
611
612 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
613 adapter->netdev->last_rx = jiffies;
614
615next_desc:
616 rx_desc->wb.upper.status_error = 0;
617
618 /* return some buffers to hardware, one at a time is too slow */
619 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
620 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
621 cleaned_count);
622 cleaned_count = 0;
623 }
624
625 /* use prefetched values */
626 rx_desc = next_rxd;
627 rx_buffer_info = &rx_ring->rx_buffer_info[i];
628
629 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
630 }
631
632 rx_ring->next_to_clean = i;
633 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
634
635 if (cleaned_count)
636 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
637
638 rx_ring->total_packets += total_rx_packets;
639 rx_ring->total_bytes += total_rx_bytes;
640 adapter->net_stats.rx_bytes += total_rx_bytes;
641 adapter->net_stats.rx_packets += total_rx_packets;
642
643 return cleaned;
644}
645
646/**
647 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine
648 * @napi: napi struct with our devices info in it
649 * @budget: amount of work driver is allowed to do this pass, in packets
650 *
651 * This function is optimized for cleaning one queue only on a single
652 * q_vector!!!
653 **/
654static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
655{
656 struct ixgbevf_q_vector *q_vector =
657 container_of(napi, struct ixgbevf_q_vector, napi);
658 struct ixgbevf_adapter *adapter = q_vector->adapter;
659 struct ixgbevf_ring *rx_ring = NULL;
660 int work_done = 0;
661 long r_idx;
662
663 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
664 rx_ring = &(adapter->rx_ring[r_idx]);
665
666 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
667
668 /* If all Rx work done, exit the polling mode */
669 if (work_done < budget) {
670 napi_complete(napi);
671 if (adapter->itr_setting & 1)
672 ixgbevf_set_itr_msix(q_vector);
673 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
674 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
675 }
676
677 return work_done;
678}
679
680/**
681 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine
682 * @napi: napi struct with our devices info in it
683 * @budget: amount of work driver is allowed to do this pass, in packets
684 *
685 * This function will clean more than one rx queue associated with a
686 * q_vector.
687 **/
688static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
689{
690 struct ixgbevf_q_vector *q_vector =
691 container_of(napi, struct ixgbevf_q_vector, napi);
692 struct ixgbevf_adapter *adapter = q_vector->adapter;
693 struct ixgbevf_ring *rx_ring = NULL;
694 int work_done = 0, i;
695 long r_idx;
696 u64 enable_mask = 0;
697
698 /* attempt to distribute budget to each queue fairly, but don't allow
699 * the budget to go below 1 because we'll exit polling */
700 budget /= (q_vector->rxr_count ?: 1);
701 budget = max(budget, 1);
702 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
703 for (i = 0; i < q_vector->rxr_count; i++) {
704 rx_ring = &(adapter->rx_ring[r_idx]);
705 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
706 enable_mask |= rx_ring->v_idx;
707 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
708 r_idx + 1);
709 }
710
711#ifndef HAVE_NETDEV_NAPI_LIST
712 if (!netif_running(adapter->netdev))
713 work_done = 0;
714
715#endif
716 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
717 rx_ring = &(adapter->rx_ring[r_idx]);
718
719 /* If all Rx work done, exit the polling mode */
720 if (work_done < budget) {
721 napi_complete(napi);
722 if (adapter->itr_setting & 1)
723 ixgbevf_set_itr_msix(q_vector);
724 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
725 ixgbevf_irq_enable_queues(adapter, enable_mask);
726 }
727
728 return work_done;
729}
730
731
732/**
733 * ixgbevf_configure_msix - Configure MSI-X hardware
734 * @adapter: board private structure
735 *
736 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
737 * interrupts.
738 **/
739static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
740{
741 struct ixgbevf_q_vector *q_vector;
742 struct ixgbe_hw *hw = &adapter->hw;
743 int i, j, q_vectors, v_idx, r_idx;
744 u32 mask;
745
746 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
747
748 /*
749 * Populate the IVAR table and set the ITR values to the
750 * corresponding register.
751 */
752 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
753 q_vector = adapter->q_vector[v_idx];
754 /* XXX for_each_bit(...) */
755 r_idx = find_first_bit(q_vector->rxr_idx,
756 adapter->num_rx_queues);
757
758 for (i = 0; i < q_vector->rxr_count; i++) {
759 j = adapter->rx_ring[r_idx].reg_idx;
760 ixgbevf_set_ivar(adapter, 0, j, v_idx);
761 r_idx = find_next_bit(q_vector->rxr_idx,
762 adapter->num_rx_queues,
763 r_idx + 1);
764 }
765 r_idx = find_first_bit(q_vector->txr_idx,
766 adapter->num_tx_queues);
767
768 for (i = 0; i < q_vector->txr_count; i++) {
769 j = adapter->tx_ring[r_idx].reg_idx;
770 ixgbevf_set_ivar(adapter, 1, j, v_idx);
771 r_idx = find_next_bit(q_vector->txr_idx,
772 adapter->num_tx_queues,
773 r_idx + 1);
774 }
775
776 /* if this is a tx only vector halve the interrupt rate */
777 if (q_vector->txr_count && !q_vector->rxr_count)
778 q_vector->eitr = (adapter->eitr_param >> 1);
779 else if (q_vector->rxr_count)
780 /* rx only */
781 q_vector->eitr = adapter->eitr_param;
782
783 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);
784 }
785
786 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
787
788 /* set up to autoclear timer, and the vectors */
789 mask = IXGBE_EIMS_ENABLE_MASK;
790 mask &= ~IXGBE_EIMS_OTHER;
791 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
792}
793
794enum latency_range {
795 lowest_latency = 0,
796 low_latency = 1,
797 bulk_latency = 2,
798 latency_invalid = 255
799};
800
801/**
802 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
803 * @adapter: pointer to adapter
804 * @eitr: eitr setting (ints per sec) to give last timeslice
805 * @itr_setting: current throttle rate in ints/second
806 * @packets: the number of packets during this measurement interval
807 * @bytes: the number of bytes during this measurement interval
808 *
809 * Stores a new ITR value based on packets and byte
810 * counts during the last interrupt. The advantage of per interrupt
811 * computation is faster updates and more accurate ITR for the current
812 * traffic pattern. Constants in this function were computed
813 * based on theoretical maximum wire speed and thresholds were set based
814 * on testing data as well as attempting to minimize response time
815 * while increasing bulk throughput.
816 **/
817static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter,
818 u32 eitr, u8 itr_setting,
819 int packets, int bytes)
820{
821 unsigned int retval = itr_setting;
822 u32 timepassed_us;
823 u64 bytes_perint;
824
825 if (packets == 0)
826 goto update_itr_done;
827
828
829 /* simple throttlerate management
830 * 0-20MB/s lowest (100000 ints/s)
831 * 20-100MB/s low (20000 ints/s)
832 * 100-1249MB/s bulk (8000 ints/s)
833 */
834 /* what was last interrupt timeslice? */
835 timepassed_us = 1000000/eitr;
836 bytes_perint = bytes / timepassed_us; /* bytes/usec */
837
838 switch (itr_setting) {
839 case lowest_latency:
840 if (bytes_perint > adapter->eitr_low)
841 retval = low_latency;
842 break;
843 case low_latency:
844 if (bytes_perint > adapter->eitr_high)
845 retval = bulk_latency;
846 else if (bytes_perint <= adapter->eitr_low)
847 retval = lowest_latency;
848 break;
849 case bulk_latency:
850 if (bytes_perint <= adapter->eitr_high)
851 retval = low_latency;
852 break;
853 }
854
855update_itr_done:
856 return retval;
857}
858
859/**
860 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
861 * @adapter: pointer to adapter struct
862 * @v_idx: vector index into q_vector array
863 * @itr_reg: new value to be written in *register* format, not ints/s
864 *
865 * This function is made to be called by ethtool and by the driver
866 * when it needs to update VTEITR registers at runtime. Hardware
867 * specific quirks/differences are taken care of here.
868 */
869static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
870 u32 itr_reg)
871{
872 struct ixgbe_hw *hw = &adapter->hw;
873
874 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg);
875
876 /*
877 * set the WDIS bit to not clear the timer bits and cause an
878 * immediate assertion of the interrupt
879 */
880 itr_reg |= IXGBE_EITR_CNT_WDIS;
881
882 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
883}
884
885static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
886{
887 struct ixgbevf_adapter *adapter = q_vector->adapter;
888 u32 new_itr;
889 u8 current_itr, ret_itr;
890 int i, r_idx, v_idx = q_vector->v_idx;
891 struct ixgbevf_ring *rx_ring, *tx_ring;
892
893 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
894 for (i = 0; i < q_vector->txr_count; i++) {
895 tx_ring = &(adapter->tx_ring[r_idx]);
896 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
897 q_vector->tx_itr,
898 tx_ring->total_packets,
899 tx_ring->total_bytes);
900 /* if the result for this queue would decrease interrupt
901 * rate for this vector then use that result */
902 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
903 q_vector->tx_itr - 1 : ret_itr);
904 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
905 r_idx + 1);
906 }
907
908 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
909 for (i = 0; i < q_vector->rxr_count; i++) {
910 rx_ring = &(adapter->rx_ring[r_idx]);
911 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
912 q_vector->rx_itr,
913 rx_ring->total_packets,
914 rx_ring->total_bytes);
915 /* if the result for this queue would decrease interrupt
916 * rate for this vector then use that result */
917 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
918 q_vector->rx_itr - 1 : ret_itr);
919 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
920 r_idx + 1);
921 }
922
923 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
924
925 switch (current_itr) {
926 /* counts and packets in update_itr are dependent on these numbers */
927 case lowest_latency:
928 new_itr = 100000;
929 break;
930 case low_latency:
931 new_itr = 20000; /* aka hwitr = ~200 */
932 break;
933 case bulk_latency:
934 default:
935 new_itr = 8000;
936 break;
937 }
938
939 if (new_itr != q_vector->eitr) {
940 u32 itr_reg;
941
942 /* save the algorithm value here, not the smoothed one */
943 q_vector->eitr = new_itr;
944 /* do an exponential smoothing */
945 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
946 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
947 ixgbevf_write_eitr(adapter, v_idx, itr_reg);
948 }
949
950 return;
951}
952
953static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
954{
955 struct net_device *netdev = data;
956 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
957 struct ixgbe_hw *hw = &adapter->hw;
958 u32 eicr;
a9ee25a2 959 u32 msg;
92915f71
GR		 960
961 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS);
962 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr);
963
a9ee25a2
GR		 964 hw->mbx.ops.read(hw, &msg, 1);
965
966 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
967 mod_timer(&adapter->watchdog_timer,
968 round_jiffies(jiffies + 10));
969
92915f71
GR		 970 return IRQ_HANDLED;
971}
972
973static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
974{
975 struct ixgbevf_q_vector *q_vector = data;
976 struct ixgbevf_adapter *adapter = q_vector->adapter;
977 struct ixgbevf_ring *tx_ring;
978 int i, r_idx;
979
980 if (!q_vector->txr_count)
981 return IRQ_HANDLED;
982
983 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
984 for (i = 0; i < q_vector->txr_count; i++) {
985 tx_ring = &(adapter->tx_ring[r_idx]);
986 tx_ring->total_bytes = 0;
987 tx_ring->total_packets = 0;
988 ixgbevf_clean_tx_irq(adapter, tx_ring);
989 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
990 r_idx + 1);
991 }
992
993 if (adapter->itr_setting & 1)
994 ixgbevf_set_itr_msix(q_vector);
995
996 return IRQ_HANDLED;
997}
998
999/**
1000 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1001 * @irq: unused
1002 * @data: pointer to our q_vector struct for this interrupt vector
1003 **/
1004static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
1005{
1006 struct ixgbevf_q_vector *q_vector = data;
1007 struct ixgbevf_adapter *adapter = q_vector->adapter;
1008 struct ixgbe_hw *hw = &adapter->hw;
1009 struct ixgbevf_ring *rx_ring;
1010 int r_idx;
1011 int i;
1012
1013 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1014 for (i = 0; i < q_vector->rxr_count; i++) {
1015 rx_ring = &(adapter->rx_ring[r_idx]);
1016 rx_ring->total_bytes = 0;
1017 rx_ring->total_packets = 0;
1018 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1019 r_idx + 1);
1020 }
1021
1022 if (!q_vector->rxr_count)
1023 return IRQ_HANDLED;
1024
1025 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1026 rx_ring = &(adapter->rx_ring[r_idx]);
1027 /* disable interrupts on this vector only */
1028 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
1029 napi_schedule(&q_vector->napi);
1030
1031
1032 return IRQ_HANDLED;
1033}
1034
1035static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data)
1036{
1037 ixgbevf_msix_clean_rx(irq, data);
1038 ixgbevf_msix_clean_tx(irq, data);
1039
1040 return IRQ_HANDLED;
1041}
1042
1043static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1044 int r_idx)
1045{
1046 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1047
1048 set_bit(r_idx, q_vector->rxr_idx);
1049 q_vector->rxr_count++;
1050 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1051}
1052
1053static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1054 int t_idx)
1055{
1056 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1057
1058 set_bit(t_idx, q_vector->txr_idx);
1059 q_vector->txr_count++;
1060 a->tx_ring[t_idx].v_idx = 1 << v_idx;
1061}
1062
1063/**
1064 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1065 * @adapter: board private structure to initialize
1066 *
1067 * This function maps descriptor rings to the queue-specific vectors
1068 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1069 * one vector per ring/queue, but on a constrained vector budget, we
1070 * group the rings as "efficiently" as possible. You would add new
1071 * mapping configurations in here.
1072 **/
1073static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1074{
1075 int q_vectors;
1076 int v_start = 0;
1077 int rxr_idx = 0, txr_idx = 0;
1078 int rxr_remaining = adapter->num_rx_queues;
1079 int txr_remaining = adapter->num_tx_queues;
1080 int i, j;
1081 int rqpv, tqpv;
1082 int err = 0;
1083
1084 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1085
1086 /*
1087 * The ideal configuration...
1088 * We have enough vectors to map one per queue.
1089 */
1090 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1091 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1092 map_vector_to_rxq(adapter, v_start, rxr_idx);
1093
1094 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1095 map_vector_to_txq(adapter, v_start, txr_idx);
1096 goto out;
1097 }
1098
1099 /*
1100 * If we don't have enough vectors for a 1-to-1
1101 * mapping, we'll have to group them so there are
1102 * multiple queues per vector.
1103 */
1104 /* Re-adjusting *qpv takes care of the remainder. */
1105 for (i = v_start; i < q_vectors; i++) {
1106 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1107 for (j = 0; j < rqpv; j++) {
1108 map_vector_to_rxq(adapter, i, rxr_idx);
1109 rxr_idx++;
1110 rxr_remaining--;
1111 }
1112 }
1113 for (i = v_start; i < q_vectors; i++) {
1114 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1115 for (j = 0; j < tqpv; j++) {
1116 map_vector_to_txq(adapter, i, txr_idx);
1117 txr_idx++;
1118 txr_remaining--;
1119 }
1120 }
1121
1122out:
1123 return err;
1124}
1125
1126/**
1127 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1128 * @adapter: board private structure
1129 *
1130 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1131 * interrupts from the kernel.
1132 **/
1133static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1134{
1135 struct net_device *netdev = adapter->netdev;
1136 irqreturn_t (*handler)(int, void *);
1137 int i, vector, q_vectors, err;
1138 int ri = 0, ti = 0;
1139
1140 /* Decrement for Other and TCP Timer vectors */
1141 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1142
1143#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
1144 ? &ixgbevf_msix_clean_many : \
1145 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
1146 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \
1147 NULL)
1148 for (vector = 0; vector < q_vectors; vector++) {
1149 handler = SET_HANDLER(adapter->q_vector[vector]);
1150
1151 if (handler == &ixgbevf_msix_clean_rx) {
1152 sprintf(adapter->name[vector], "%s-%s-%d",
1153 netdev->name, "rx", ri++);
1154 } else if (handler == &ixgbevf_msix_clean_tx) {
1155 sprintf(adapter->name[vector], "%s-%s-%d",
1156 netdev->name, "tx", ti++);
1157 } else if (handler == &ixgbevf_msix_clean_many) {
1158 sprintf(adapter->name[vector], "%s-%s-%d",
1159 netdev->name, "TxRx", vector);
1160 } else {
1161 /* skip this unused q_vector */
1162 continue;
1163 }
1164 err = request_irq(adapter->msix_entries[vector].vector,
1165 handler, 0, adapter->name[vector],
1166 adapter->q_vector[vector]);
1167 if (err) {
1168 hw_dbg(&adapter->hw,
1169 "request_irq failed for MSIX interrupt "
1170 "Error: %d\n", err);
1171 goto free_queue_irqs;
1172 }
1173 }
1174
1175 sprintf(adapter->name[vector], "%s:mbx", netdev->name);
1176 err = request_irq(adapter->msix_entries[vector].vector,
1177 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev);
1178 if (err) {
1179 hw_dbg(&adapter->hw,
1180 "request_irq for msix_mbx failed: %d\n", err);
1181 goto free_queue_irqs;
1182 }
1183
1184 return 0;
1185
1186free_queue_irqs:
1187 for (i = vector - 1; i >= 0; i--)
1188 free_irq(adapter->msix_entries[--vector].vector,
1189 &(adapter->q_vector[i]));
1190 pci_disable_msix(adapter->pdev);
1191 kfree(adapter->msix_entries);
1192 adapter->msix_entries = NULL;
1193 return err;
1194}
1195
1196static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1197{
1198 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1199
1200 for (i = 0; i < q_vectors; i++) {
1201 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1202 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1203 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1204 q_vector->rxr_count = 0;
1205 q_vector->txr_count = 0;
1206 q_vector->eitr = adapter->eitr_param;
1207 }
1208}
1209
1210/**
1211 * ixgbevf_request_irq - initialize interrupts
1212 * @adapter: board private structure
1213 *
1214 * Attempts to configure interrupts using the best available
1215 * capabilities of the hardware and kernel.
1216 **/
1217static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1218{
1219 int err = 0;
1220
1221 err = ixgbevf_request_msix_irqs(adapter);
1222
1223 if (err)
1224 hw_dbg(&adapter->hw,
1225 "request_irq failed, Error %d\n", err);
1226
1227 return err;
1228}
1229
1230static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1231{
1232 struct net_device *netdev = adapter->netdev;
1233 int i, q_vectors;
1234
1235 q_vectors = adapter->num_msix_vectors;
1236
1237 i = q_vectors - 1;
1238
1239 free_irq(adapter->msix_entries[i].vector, netdev);
1240 i--;
1241
1242 for (; i >= 0; i--) {
1243 free_irq(adapter->msix_entries[i].vector,
1244 adapter->q_vector[i]);
1245 }
1246
1247 ixgbevf_reset_q_vectors(adapter);
1248}
1249
1250/**
1251 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1252 * @adapter: board private structure
1253 **/
1254static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1255{
1256 int i;
1257 struct ixgbe_hw *hw = &adapter->hw;
1258
1259 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1260
1261 IXGBE_WRITE_FLUSH(hw);
1262
1263 for (i = 0; i < adapter->num_msix_vectors; i++)
1264 synchronize_irq(adapter->msix_entries[i].vector);
1265}
1266
1267/**
1268 * ixgbevf_irq_enable - Enable default interrupt generation settings
1269 * @adapter: board private structure
1270 **/
1271static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter,
1272 bool queues, bool flush)
1273{
1274 struct ixgbe_hw *hw = &adapter->hw;
1275 u32 mask;
1276 u64 qmask;
1277
1278 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1279 qmask = ~0;
1280
1281 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
1282
1283 if (queues)
1284 ixgbevf_irq_enable_queues(adapter, qmask);
1285
1286 if (flush)
1287 IXGBE_WRITE_FLUSH(hw);
1288}
1289
1290/**
1291 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1292 * @adapter: board private structure
1293 *
1294 * Configure the Tx unit of the MAC after a reset.
1295 **/
1296static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1297{
1298 u64 tdba;
1299 struct ixgbe_hw *hw = &adapter->hw;
1300 u32 i, j, tdlen, txctrl;
1301
1302 /* Setup the HW Tx Head and Tail descriptor pointers */
1303 for (i = 0; i < adapter->num_tx_queues; i++) {
1304 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1305 j = ring->reg_idx;
1306 tdba = ring->dma;
1307 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1308 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1309 (tdba & DMA_BIT_MASK(32)));
1310 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1311 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1312 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1313 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1314 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1315 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1316 /* Disable Tx Head Writeback RO bit, since this hoses
1317 * bookkeeping if things aren't delivered in order.
1318 */
1319 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1320 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1321 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1322 }
1323}
1324
1325#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1326
1327static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1328{
1329 struct ixgbevf_ring *rx_ring;
1330 struct ixgbe_hw *hw = &adapter->hw;
1331 u32 srrctl;
1332
1333 rx_ring = &adapter->rx_ring[index];
1334
1335 srrctl = IXGBE_SRRCTL_DROP_EN;
1336
1337 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1338 u16 bufsz = IXGBEVF_RXBUFFER_2048;
1339 /* grow the amount we can receive on large page machines */
1340 if (bufsz < (PAGE_SIZE / 2))
1341 bufsz = (PAGE_SIZE / 2);
1342 /* cap the bufsz at our largest descriptor size */
1343 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz);
1344
1345 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1346 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1347 srrctl |= ((IXGBEVF_RX_HDR_SIZE <<
1348 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1349 IXGBE_SRRCTL_BSIZEHDR_MASK);
1350 } else {
1351 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1352
1353 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1354 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1355 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1356 else
1357 srrctl |= rx_ring->rx_buf_len >>
1358 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1359 }
1360 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1361}
1362
1363/**
1364 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1365 * @adapter: board private structure
1366 *
1367 * Configure the Rx unit of the MAC after a reset.
1368 **/
1369static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1370{
1371 u64 rdba;
1372 struct ixgbe_hw *hw = &adapter->hw;
1373 struct net_device *netdev = adapter->netdev;
1374 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1375 int i, j;
1376 u32 rdlen;
1377 int rx_buf_len;
1378
1379 /* Decide whether to use packet split mode or not */
1380 if (netdev->mtu > ETH_DATA_LEN) {
1381 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE)
1382 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1383 else
1384 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1385 } else {
1386 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE)
1387 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1388 else
1389 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1390 }
1391
1392 /* Set the RX buffer length according to the mode */
1393 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1394 /* PSRTYPE must be initialized in 82599 */
1395 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1396 IXGBE_PSRTYPE_UDPHDR |
1397 IXGBE_PSRTYPE_IPV4HDR |
1398 IXGBE_PSRTYPE_IPV6HDR |
1399 IXGBE_PSRTYPE_L2HDR;
1400 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1401 rx_buf_len = IXGBEVF_RX_HDR_SIZE;
1402 } else {
1403 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1404 if (netdev->mtu <= ETH_DATA_LEN)
1405 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1406 else
1407 rx_buf_len = ALIGN(max_frame, 1024);
1408 }
1409
1410 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1411 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1412 * the Base and Length of the Rx Descriptor Ring */
1413 for (i = 0; i < adapter->num_rx_queues; i++) {
1414 rdba = adapter->rx_ring[i].dma;
1415 j = adapter->rx_ring[i].reg_idx;
1416 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1417 (rdba & DMA_BIT_MASK(32)));
1418 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1419 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1420 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1421 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1422 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1423 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1424 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1425
1426 ixgbevf_configure_srrctl(adapter, j);
1427 }
1428}
1429
1430static void ixgbevf_vlan_rx_register(struct net_device *netdev,
1431 struct vlan_group *grp)
1432{
1433 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1434 struct ixgbe_hw *hw = &adapter->hw;
1435 int i, j;
1436 u32 ctrl;
1437
1438 adapter->vlgrp = grp;
1439
1440 for (i = 0; i < adapter->num_rx_queues; i++) {
1441 j = adapter->rx_ring[i].reg_idx;
1442 ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1443 ctrl |= IXGBE_RXDCTL_VME;
1444 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), ctrl);
1445 }
1446}
1447
1448static void ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1449{
1450 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1451 struct ixgbe_hw *hw = &adapter->hw;
1452 struct net_device *v_netdev;
1453
1454 /* add VID to filter table */
1455 if (hw->mac.ops.set_vfta)
1456 hw->mac.ops.set_vfta(hw, vid, 0, true);
1457 /*
1458 * Copy feature flags from netdev to the vlan netdev for this vid.
1459 * This allows things like TSO to bubble down to our vlan device.
1460 */
1461 v_netdev = vlan_group_get_device(adapter->vlgrp, vid);
1462 v_netdev->features |= adapter->netdev->features;
1463 vlan_group_set_device(adapter->vlgrp, vid, v_netdev);
1464}
1465
1466static void ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1467{
1468 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1469 struct ixgbe_hw *hw = &adapter->hw;
1470
1471 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1472 ixgbevf_irq_disable(adapter);
1473
1474 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1475
1476 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1477 ixgbevf_irq_enable(adapter, true, true);
1478
1479 /* remove VID from filter table */
1480 if (hw->mac.ops.set_vfta)
1481 hw->mac.ops.set_vfta(hw, vid, 0, false);
1482}
1483
1484static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1485{
1486 ixgbevf_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1487
1488 if (adapter->vlgrp) {
1489 u16 vid;
1490 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1491 if (!vlan_group_get_device(adapter->vlgrp, vid))
1492 continue;
1493 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
1494 }
1495 }
1496}
1497
1498static u8 *ixgbevf_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr,
1499 u32 *vmdq)
1500{
1501 struct dev_mc_list *mc_ptr;
1502 u8 *addr = *mc_addr_ptr;
1503 *vmdq = 0;
1504
1505 mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1506 if (mc_ptr->next)
1507 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1508 else
1509 *mc_addr_ptr = NULL;
1510
1511 return addr;
1512}
1513
1514/**
1515 * ixgbevf_set_rx_mode - Multicast set
1516 * @netdev: network interface device structure
1517 *
1518 * The set_rx_method entry point is called whenever the multicast address
1519 * list or the network interface flags are updated. This routine is
1520 * responsible for configuring the hardware for proper multicast mode.
1521 **/
1522static void ixgbevf_set_rx_mode(struct net_device *netdev)
1523{
1524 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1525 struct ixgbe_hw *hw = &adapter->hw;
1526 u8 *addr_list = NULL;
1527 int addr_count = 0;
1528
1529 /* reprogram multicast list */
1530 addr_count = netdev->mc_count;
1531 if (addr_count)
1532 addr_list = netdev->mc_list->dmi_addr;
1533 if (hw->mac.ops.update_mc_addr_list)
1534 hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1535 ixgbevf_addr_list_itr);
1536}
1537
1538static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1539{
1540 int q_idx;
1541 struct ixgbevf_q_vector *q_vector;
1542 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1543
1544 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1545 struct napi_struct *napi;
1546 q_vector = adapter->q_vector[q_idx];
1547 if (!q_vector->rxr_count)
1548 continue;
1549 napi = &q_vector->napi;
1550 if (q_vector->rxr_count > 1)
1551 napi->poll = &ixgbevf_clean_rxonly_many;
1552
1553 napi_enable(napi);
1554 }
1555}
1556
1557static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1558{
1559 int q_idx;
1560 struct ixgbevf_q_vector *q_vector;
1561 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1562
1563 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1564 q_vector = adapter->q_vector[q_idx];
1565 if (!q_vector->rxr_count)
1566 continue;
1567 napi_disable(&q_vector->napi);
1568 }
1569}
1570
1571static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1572{
1573 struct net_device *netdev = adapter->netdev;
1574 int i;
1575
1576 ixgbevf_set_rx_mode(netdev);
1577
1578 ixgbevf_restore_vlan(adapter);
1579
1580 ixgbevf_configure_tx(adapter);
1581 ixgbevf_configure_rx(adapter);
1582 for (i = 0; i < adapter->num_rx_queues; i++) {
1583 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
1584 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count);
1585 ring->next_to_use = ring->count - 1;
1586 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail);
1587 }
1588}
1589
1590#define IXGBE_MAX_RX_DESC_POLL 10
1591static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1592 int rxr)
1593{
1594 struct ixgbe_hw *hw = &adapter->hw;
1595 int j = adapter->rx_ring[rxr].reg_idx;
1596 int k;
1597
1598 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1599 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1600 break;
1601 else
1602 msleep(1);
1603 }
1604 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1605 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1606 "not set within the polling period\n", rxr);
1607 }
1608
1609 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1610 (adapter->rx_ring[rxr].count - 1));
1611}
1612
1613static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1614{
1615 struct net_device *netdev = adapter->netdev;
1616 struct ixgbe_hw *hw = &adapter->hw;
1617 int i, j = 0;
1618 int num_rx_rings = adapter->num_rx_queues;
1619 u32 txdctl, rxdctl;
1620
1621 for (i = 0; i < adapter->num_tx_queues; i++) {
1622 j = adapter->tx_ring[i].reg_idx;
1623 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1624 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1625 txdctl |= (8 << 16);
1626 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1627 }
1628
1629 for (i = 0; i < adapter->num_tx_queues; i++) {
1630 j = adapter->tx_ring[i].reg_idx;
1631 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1632 txdctl |= IXGBE_TXDCTL_ENABLE;
1633 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1634 }
1635
1636 for (i = 0; i < num_rx_rings; i++) {
1637 j = adapter->rx_ring[i].reg_idx;
1638 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1639 rxdctl |= IXGBE_RXDCTL_ENABLE;
1640 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1641 ixgbevf_rx_desc_queue_enable(adapter, i);
1642 }
1643
1644 ixgbevf_configure_msix(adapter);
1645
1646 if (hw->mac.ops.set_rar) {
1647 if (is_valid_ether_addr(hw->mac.addr))
1648 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1649 else
1650 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1651 }
1652
1653 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1654 ixgbevf_napi_enable_all(adapter);
1655
1656 /* enable transmits */
1657 netif_tx_start_all_queues(netdev);
1658
1659 /* bring the link up in the watchdog, this could race with our first
1660 * link up interrupt but shouldn't be a problem */
1661 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1662 adapter->link_check_timeout = jiffies;
1663 mod_timer(&adapter->watchdog_timer, jiffies);
1664 return 0;
1665}
1666
1667int ixgbevf_up(struct ixgbevf_adapter *adapter)
1668{
1669 int err;
1670 struct ixgbe_hw *hw = &adapter->hw;
1671
1672 ixgbevf_configure(adapter);
1673
1674 err = ixgbevf_up_complete(adapter);
1675
1676 /* clear any pending interrupts, may auto mask */
1677 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1678
1679 ixgbevf_irq_enable(adapter, true, true);
1680
1681 return err;
1682}
1683
1684/**
1685 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1686 * @adapter: board private structure
1687 * @rx_ring: ring to free buffers from
1688 **/
1689static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1690 struct ixgbevf_ring *rx_ring)
1691{
1692 struct pci_dev *pdev = adapter->pdev;
1693 unsigned long size;
1694 unsigned int i;
1695
c0456c23
GR		 1696 if (!rx_ring->rx_buffer_info)
1697 return;
92915f71 1698
c0456c23 1699 /* Free all the Rx ring sk_buffs */
92915f71
GR		 1700 for (i = 0; i < rx_ring->count; i++) {
1701 struct ixgbevf_rx_buffer *rx_buffer_info;
1702
1703 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1704 if (rx_buffer_info->dma) {
1705 pci_unmap_single(pdev, rx_buffer_info->dma,
1706 rx_ring->rx_buf_len,
1707 PCI_DMA_FROMDEVICE);
1708 rx_buffer_info->dma = 0;
1709 }
1710 if (rx_buffer_info->skb) {
1711 struct sk_buff *skb = rx_buffer_info->skb;
1712 rx_buffer_info->skb = NULL;
1713 do {
1714 struct sk_buff *this = skb;
1715 skb = skb->prev;
1716 dev_kfree_skb(this);
1717 } while (skb);
1718 }
1719 if (!rx_buffer_info->page)
1720 continue;
1721 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
1722 PCI_DMA_FROMDEVICE);
1723 rx_buffer_info->page_dma = 0;
1724 put_page(rx_buffer_info->page);
1725 rx_buffer_info->page = NULL;
1726 rx_buffer_info->page_offset = 0;
1727 }
1728
1729 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1730 memset(rx_ring->rx_buffer_info, 0, size);
1731
1732 /* Zero out the descriptor ring */
1733 memset(rx_ring->desc, 0, rx_ring->size);
1734
1735 rx_ring->next_to_clean = 0;
1736 rx_ring->next_to_use = 0;
1737
1738 if (rx_ring->head)
1739 writel(0, adapter->hw.hw_addr + rx_ring->head);
1740 if (rx_ring->tail)
1741 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1742}
1743
1744/**
1745 * ixgbevf_clean_tx_ring - Free Tx Buffers
1746 * @adapter: board private structure
1747 * @tx_ring: ring to be cleaned
1748 **/
1749static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1750 struct ixgbevf_ring *tx_ring)
1751{
1752 struct ixgbevf_tx_buffer *tx_buffer_info;
1753 unsigned long size;
1754 unsigned int i;
1755
c0456c23
GR		 1756 if (!tx_ring->tx_buffer_info)
1757 return;
1758
92915f71
GR		 1759 /* Free all the Tx ring sk_buffs */
1760
1761 for (i = 0; i < tx_ring->count; i++) {
1762 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1763 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1764 }
1765
1766 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1767 memset(tx_ring->tx_buffer_info, 0, size);
1768
1769 memset(tx_ring->desc, 0, tx_ring->size);
1770
1771 tx_ring->next_to_use = 0;
1772 tx_ring->next_to_clean = 0;
1773
1774 if (tx_ring->head)
1775 writel(0, adapter->hw.hw_addr + tx_ring->head);
1776 if (tx_ring->tail)
1777 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1778}
1779
1780/**
1781 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1782 * @adapter: board private structure
1783 **/
1784static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1785{
1786 int i;
1787
1788 for (i = 0; i < adapter->num_rx_queues; i++)
1789 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1790}
1791
1792/**
1793 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1794 * @adapter: board private structure
1795 **/
1796static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1797{
1798 int i;
1799
1800 for (i = 0; i < adapter->num_tx_queues; i++)
1801 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1802}
1803
1804void ixgbevf_down(struct ixgbevf_adapter *adapter)
1805{
1806 struct net_device *netdev = adapter->netdev;
1807 struct ixgbe_hw *hw = &adapter->hw;
1808 u32 txdctl;
1809 int i, j;
1810
1811 /* signal that we are down to the interrupt handler */
1812 set_bit(__IXGBEVF_DOWN, &adapter->state);
1813 /* disable receives */
1814
1815 netif_tx_disable(netdev);
1816
1817 msleep(10);
1818
1819 netif_tx_stop_all_queues(netdev);
1820
1821 ixgbevf_irq_disable(adapter);
1822
1823 ixgbevf_napi_disable_all(adapter);
1824
1825 del_timer_sync(&adapter->watchdog_timer);
1826 /* can't call flush scheduled work here because it can deadlock
1827 * if linkwatch_event tries to acquire the rtnl_lock which we are
1828 * holding */
1829 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1830 msleep(1);
1831
1832 /* disable transmits in the hardware now that interrupts are off */
1833 for (i = 0; i < adapter->num_tx_queues; i++) {
1834 j = adapter->tx_ring[i].reg_idx;
1835 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1836 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1837 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1838 }
1839
1840 netif_carrier_off(netdev);
1841
1842 if (!pci_channel_offline(adapter->pdev))
1843 ixgbevf_reset(adapter);
1844
1845 ixgbevf_clean_all_tx_rings(adapter);
1846 ixgbevf_clean_all_rx_rings(adapter);
1847}
1848
1849void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1850{
c0456c23
GR		 1851 struct ixgbe_hw *hw = &adapter->hw;
1852
92915f71 1853 WARN_ON(in_interrupt());
c0456c23 1854
92915f71
GR		 1855 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1856 msleep(1);
1857
c0456c23
GR		 1858 /*
1859 * Check if PF is up before re-init. If not then skip until
1860 * later when the PF is up and ready to service requests from
1861 * the VF via mailbox. If the VF is up and running then the
1862 * watchdog task will continue to schedule reset tasks until
1863 * the PF is up and running.
1864 */
1865 if (!hw->mac.ops.reset_hw(hw)) {
1866 ixgbevf_down(adapter);
1867 ixgbevf_up(adapter);
1868 }
92915f71
GR		 1869
1870 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1871}
1872
1873void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1874{
1875 struct ixgbe_hw *hw = &adapter->hw;
1876 struct net_device *netdev = adapter->netdev;
1877
1878 if (hw->mac.ops.reset_hw(hw))
1879 hw_dbg(hw, "PF still resetting\n");
1880 else
1881 hw->mac.ops.init_hw(hw);
1882
1883 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1884 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1885 netdev->addr_len);
1886 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1887 netdev->addr_len);
1888 }
1889}
1890
1891static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1892 int vectors)
1893{
1894 int err, vector_threshold;
1895
1896 /* We'll want at least 3 (vector_threshold):
1897 * 1) TxQ[0] Cleanup
1898 * 2) RxQ[0] Cleanup
1899 * 3) Other (Link Status Change, etc.)
1900 */
1901 vector_threshold = MIN_MSIX_COUNT;
1902
1903 /* The more we get, the more we will assign to Tx/Rx Cleanup
1904 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1905 * Right now, we simply care about how many we'll get; we'll
1906 * set them up later while requesting irq's.
1907 */
1908 while (vectors >= vector_threshold) {
1909 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1910 vectors);
1911 if (!err) /* Success in acquiring all requested vectors. */
1912 break;
1913 else if (err < 0)
1914 vectors = 0; /* Nasty failure, quit now */
1915 else /* err == number of vectors we should try again with */
1916 vectors = err;
1917 }
1918
1919 if (vectors < vector_threshold) {
1920 /* Can't allocate enough MSI-X interrupts? Oh well.
1921 * This just means we'll go with either a single MSI
1922 * vector or fall back to legacy interrupts.
1923 */
1924 hw_dbg(&adapter->hw,
1925 "Unable to allocate MSI-X interrupts\n");
1926 kfree(adapter->msix_entries);
1927 adapter->msix_entries = NULL;
1928 } else {
1929 /*
1930 * Adjust for only the vectors we'll use, which is minimum
1931 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1932 * vectors we were allocated.
1933 */
1934 adapter->num_msix_vectors = vectors;
1935 }
1936}
1937
1938/*
1939 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
1940 * @adapter: board private structure to initialize
1941 *
1942 * This is the top level queue allocation routine. The order here is very
1943 * important, starting with the "most" number of features turned on at once,
1944 * and ending with the smallest set of features. This way large combinations
1945 * can be allocated if they're turned on, and smaller combinations are the
1946 * fallthrough conditions.
1947 *
1948 **/
1949static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1950{
1951 /* Start with base case */
1952 adapter->num_rx_queues = 1;
1953 adapter->num_tx_queues = 1;
1954 adapter->num_rx_pools = adapter->num_rx_queues;
1955 adapter->num_rx_queues_per_pool = 1;
1956}
1957
1958/**
1959 * ixgbevf_alloc_queues - Allocate memory for all rings
1960 * @adapter: board private structure to initialize
1961 *
1962 * We allocate one ring per queue at run-time since we don't know the
1963 * number of queues at compile-time. The polling_netdev array is
1964 * intended for Multiqueue, but should work fine with a single queue.
1965 **/
1966static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1967{
1968 int i;
1969
1970 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1971 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1972 if (!adapter->tx_ring)
1973 goto err_tx_ring_allocation;
1974
1975 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1976 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1977 if (!adapter->rx_ring)
1978 goto err_rx_ring_allocation;
1979
1980 for (i = 0; i < adapter->num_tx_queues; i++) {
1981 adapter->tx_ring[i].count = adapter->tx_ring_count;
1982 adapter->tx_ring[i].queue_index = i;
1983 adapter->tx_ring[i].reg_idx = i;
1984 }
1985
1986 for (i = 0; i < adapter->num_rx_queues; i++) {
1987 adapter->rx_ring[i].count = adapter->rx_ring_count;
1988 adapter->rx_ring[i].queue_index = i;
1989 adapter->rx_ring[i].reg_idx = i;
1990 }
1991
1992 return 0;
1993
1994err_rx_ring_allocation:
1995 kfree(adapter->tx_ring);
1996err_tx_ring_allocation:
1997 return -ENOMEM;
1998}
1999
2000/**
2001 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2002 * @adapter: board private structure to initialize
2003 *
2004 * Attempt to configure the interrupts using the best available
2005 * capabilities of the hardware and the kernel.
2006 **/
2007static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2008{
2009 int err = 0;
2010 int vector, v_budget;
2011
2012 /*
2013 * It's easy to be greedy for MSI-X vectors, but it really
2014 * doesn't do us much good if we have a lot more vectors
2015 * than CPU's. So let's be conservative and only ask for
2016 * (roughly) twice the number of vectors as there are CPU's.
2017 */
2018 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2019 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2020
2021 /* A failure in MSI-X entry allocation isn't fatal, but it does
2022 * mean we disable MSI-X capabilities of the adapter. */
2023 adapter->msix_entries = kcalloc(v_budget,
2024 sizeof(struct msix_entry), GFP_KERNEL);
2025 if (!adapter->msix_entries) {
2026 err = -ENOMEM;
2027 goto out;
2028 }
2029
2030 for (vector = 0; vector < v_budget; vector++)
2031 adapter->msix_entries[vector].entry = vector;
2032
2033 ixgbevf_acquire_msix_vectors(adapter, v_budget);
2034
2035out:
2036 return err;
2037}
2038
2039/**
2040 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2041 * @adapter: board private structure to initialize
2042 *
2043 * We allocate one q_vector per queue interrupt. If allocation fails we
2044 * return -ENOMEM.
2045 **/
2046static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2047{
2048 int q_idx, num_q_vectors;
2049 struct ixgbevf_q_vector *q_vector;
2050 int napi_vectors;
2051 int (*poll)(struct napi_struct *, int);
2052
2053 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2054 napi_vectors = adapter->num_rx_queues;
2055 poll = &ixgbevf_clean_rxonly;
2056
2057 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2058 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2059 if (!q_vector)
2060 goto err_out;
2061 q_vector->adapter = adapter;
2062 q_vector->v_idx = q_idx;
2063 q_vector->eitr = adapter->eitr_param;
2064 if (q_idx < napi_vectors)
2065 netif_napi_add(adapter->netdev, &q_vector->napi,
2066 (*poll), 64);
2067 adapter->q_vector[q_idx] = q_vector;
2068 }
2069
2070 return 0;
2071
2072err_out:
2073 while (q_idx) {
2074 q_idx--;
2075 q_vector = adapter->q_vector[q_idx];
2076 netif_napi_del(&q_vector->napi);
2077 kfree(q_vector);
2078 adapter->q_vector[q_idx] = NULL;
2079 }
2080 return -ENOMEM;
2081}
2082
2083/**
2084 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2085 * @adapter: board private structure to initialize
2086 *
2087 * This function frees the memory allocated to the q_vectors. In addition if
2088 * NAPI is enabled it will delete any references to the NAPI struct prior
2089 * to freeing the q_vector.
2090 **/
2091static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2092{
2093 int q_idx, num_q_vectors;
2094 int napi_vectors;
2095
2096 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2097 napi_vectors = adapter->num_rx_queues;
2098
2099 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2100 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2101
2102 adapter->q_vector[q_idx] = NULL;
2103 if (q_idx < napi_vectors)
2104 netif_napi_del(&q_vector->napi);
2105 kfree(q_vector);
2106 }
2107}
2108
2109/**
2110 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2111 * @adapter: board private structure
2112 *
2113 **/
2114static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2115{
2116 pci_disable_msix(adapter->pdev);
2117 kfree(adapter->msix_entries);
2118 adapter->msix_entries = NULL;
2119
2120 return;
2121}
2122
2123/**
2124 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2125 * @adapter: board private structure to initialize
2126 *
2127 **/
2128static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2129{
2130 int err;
2131
2132 /* Number of supported queues */
2133 ixgbevf_set_num_queues(adapter);
2134
2135 err = ixgbevf_set_interrupt_capability(adapter);
2136 if (err) {
2137 hw_dbg(&adapter->hw,
2138 "Unable to setup interrupt capabilities\n");
2139 goto err_set_interrupt;
2140 }
2141
2142 err = ixgbevf_alloc_q_vectors(adapter);
2143 if (err) {
2144 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2145 "vectors\n");
2146 goto err_alloc_q_vectors;
2147 }
2148
2149 err = ixgbevf_alloc_queues(adapter);
2150 if (err) {
2151 printk(KERN_ERR "Unable to allocate memory for queues\n");
2152 goto err_alloc_queues;
2153 }
2154
2155 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2156 "Tx Queue count = %u\n",
2157 (adapter->num_rx_queues > 1) ? "Enabled" :
2158 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2159
2160 set_bit(__IXGBEVF_DOWN, &adapter->state);
2161
2162 return 0;
2163err_alloc_queues:
2164 ixgbevf_free_q_vectors(adapter);
2165err_alloc_q_vectors:
2166 ixgbevf_reset_interrupt_capability(adapter);
2167err_set_interrupt:
2168 return err;
2169}
2170
2171/**
2172 * ixgbevf_sw_init - Initialize general software structures
2173 * (struct ixgbevf_adapter)
2174 * @adapter: board private structure to initialize
2175 *
2176 * ixgbevf_sw_init initializes the Adapter private data structure.
2177 * Fields are initialized based on PCI device information and
2178 * OS network device settings (MTU size).
2179 **/
2180static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2181{
2182 struct ixgbe_hw *hw = &adapter->hw;
2183 struct pci_dev *pdev = adapter->pdev;
2184 int err;
2185
2186 /* PCI config space info */
2187
2188 hw->vendor_id = pdev->vendor;
2189 hw->device_id = pdev->device;
2190 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
2191 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2192 hw->subsystem_device_id = pdev->subsystem_device;
2193
2194 hw->mbx.ops.init_params(hw);
2195 hw->mac.max_tx_queues = MAX_TX_QUEUES;
2196 hw->mac.max_rx_queues = MAX_RX_QUEUES;
2197 err = hw->mac.ops.reset_hw(hw);
2198 if (err) {
2199 dev_info(&pdev->dev,
2200 "PF still in reset state, assigning new address\n");
2201 random_ether_addr(hw->mac.addr);
2202 } else {
2203 err = hw->mac.ops.init_hw(hw);
2204 if (err) {
2205 printk(KERN_ERR "init_shared_code failed: %d\n", err);
2206 goto out;
2207 }
2208 }
2209
2210 /* Enable dynamic interrupt throttling rates */
2211 adapter->eitr_param = 20000;
2212 adapter->itr_setting = 1;
2213
2214 /* set defaults for eitr in MegaBytes */
2215 adapter->eitr_low = 10;
2216 adapter->eitr_high = 20;
2217
2218 /* set default ring sizes */
2219 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2220 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2221
2222 /* enable rx csum by default */
2223 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2224
2225 set_bit(__IXGBEVF_DOWN, &adapter->state);
2226
2227out:
2228 return err;
2229}
2230
2231static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
2232{
2233 struct ixgbe_hw *hw = &adapter->hw;
2234
2235 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
2236 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
2237 adapter->stats.last_vfgorc |=
2238 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
2239 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
2240 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
2241 adapter->stats.last_vfgotc |=
2242 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
2243 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
2244
2245 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
2246 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
2247 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
2248 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2249 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2250}
2251
2252#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2253 { \
2254 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2255 if (current_counter < last_counter) \
2256 counter += 0x100000000LL; \
2257 last_counter = current_counter; \
2258 counter &= 0xFFFFFFFF00000000LL; \
2259 counter |= current_counter; \
2260 }
2261
2262#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2263 { \
2264 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2265 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2266 u64 current_counter = (current_counter_msb << 32) | \
2267 current_counter_lsb; \
2268 if (current_counter < last_counter) \
2269 counter += 0x1000000000LL; \
2270 last_counter = current_counter; \
2271 counter &= 0xFFFFFFF000000000LL; \
2272 counter |= current_counter; \
2273 }
2274/**
2275 * ixgbevf_update_stats - Update the board statistics counters.
2276 * @adapter: board private structure
2277 **/
2278void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2279{
2280 struct ixgbe_hw *hw = &adapter->hw;
2281
2282 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2283 adapter->stats.vfgprc);
2284 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2285 adapter->stats.vfgptc);
2286 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2287 adapter->stats.last_vfgorc,
2288 adapter->stats.vfgorc);
2289 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2290 adapter->stats.last_vfgotc,
2291 adapter->stats.vfgotc);
2292 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2293 adapter->stats.vfmprc);
2294
2295 /* Fill out the OS statistics structure */
2296 adapter->net_stats.multicast = adapter->stats.vfmprc -
2297 adapter->stats.base_vfmprc;
2298}
2299
2300/**
2301 * ixgbevf_watchdog - Timer Call-back
2302 * @data: pointer to adapter cast into an unsigned long
2303 **/
2304static void ixgbevf_watchdog(unsigned long data)
2305{
2306 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2307 struct ixgbe_hw *hw = &adapter->hw;
2308 u64 eics = 0;
2309 int i;
2310
2311 /*
2312 * Do the watchdog outside of interrupt context due to the lovely
2313 * delays that some of the newer hardware requires
2314 */
2315
2316 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2317 goto watchdog_short_circuit;
2318
2319 /* get one bit for every active tx/rx interrupt vector */
2320 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2321 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2322 if (qv->rxr_count || qv->txr_count)
2323 eics |= (1 << i);
2324 }
2325
2326 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics);
2327
2328watchdog_short_circuit:
2329 schedule_work(&adapter->watchdog_task);
2330}
2331
2332/**
2333 * ixgbevf_tx_timeout - Respond to a Tx Hang
2334 * @netdev: network interface device structure
2335 **/
2336static void ixgbevf_tx_timeout(struct net_device *netdev)
2337{
2338 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2339
2340 /* Do the reset outside of interrupt context */
2341 schedule_work(&adapter->reset_task);
2342}
2343
2344static void ixgbevf_reset_task(struct work_struct *work)
2345{
2346 struct ixgbevf_adapter *adapter;
2347 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2348
2349 /* If we're already down or resetting, just bail */
2350 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2351 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2352 return;
2353
2354 adapter->tx_timeout_count++;
2355
2356 ixgbevf_reinit_locked(adapter);
2357}
2358
2359/**
2360 * ixgbevf_watchdog_task - worker thread to bring link up
2361 * @work: pointer to work_struct containing our data
2362 **/
2363static void ixgbevf_watchdog_task(struct work_struct *work)
2364{
2365 struct ixgbevf_adapter *adapter = container_of(work,
2366 struct ixgbevf_adapter,
2367 watchdog_task);
2368 struct net_device *netdev = adapter->netdev;
2369 struct ixgbe_hw *hw = &adapter->hw;
2370 u32 link_speed = adapter->link_speed;
2371 bool link_up = adapter->link_up;
2372
2373 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2374
2375 /*
2376 * Always check the link on the watchdog because we have
2377 * no LSC interrupt
2378 */
2379 if (hw->mac.ops.check_link) {
2380 if ((hw->mac.ops.check_link(hw, &link_speed,
2381 &link_up, false)) != 0) {
2382 adapter->link_up = link_up;
2383 adapter->link_speed = link_speed;
da6b3330
GR		 2384 netif_carrier_off(netdev);
2385 netif_tx_stop_all_queues(netdev);
92915f71
GR		 2386 schedule_work(&adapter->reset_task);
2387 goto pf_has_reset;
2388 }
2389 } else {
2390 /* always assume link is up, if no check link
2391 * function */
2392 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2393 link_up = true;
2394 }
2395 adapter->link_up = link_up;
2396 adapter->link_speed = link_speed;
2397
2398 if (link_up) {
2399 if (!netif_carrier_ok(netdev)) {
2400 hw_dbg(&adapter->hw, "NIC Link is Up %s, ",
2401 ((link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2402 "10 Gbps" : "1 Gbps"));
2403 netif_carrier_on(netdev);
2404 netif_tx_wake_all_queues(netdev);
2405 } else {
2406 /* Force detection of hung controller */
2407 adapter->detect_tx_hung = true;
2408 }
2409 } else {
2410 adapter->link_up = false;
2411 adapter->link_speed = 0;
2412 if (netif_carrier_ok(netdev)) {
2413 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2414 netif_carrier_off(netdev);
2415 netif_tx_stop_all_queues(netdev);
2416 }
2417 }
2418
2419pf_has_reset:
2420 ixgbevf_update_stats(adapter);
2421
2422 /* Force detection of hung controller every watchdog period */
2423 adapter->detect_tx_hung = true;
2424
2425 /* Reset the timer */
2426 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2427 mod_timer(&adapter->watchdog_timer,
2428 round_jiffies(jiffies + (2 * HZ)));
2429
2430 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2431}
2432
2433/**
2434 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2435 * @adapter: board private structure
2436 * @tx_ring: Tx descriptor ring for a specific queue
2437 *
2438 * Free all transmit software resources
2439 **/
2440void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2441 struct ixgbevf_ring *tx_ring)
2442{
2443 struct pci_dev *pdev = adapter->pdev;
2444
92915f71
GR		 2445 ixgbevf_clean_tx_ring(adapter, tx_ring);
2446
2447 vfree(tx_ring->tx_buffer_info);
2448 tx_ring->tx_buffer_info = NULL;
2449
2450 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2451
2452 tx_ring->desc = NULL;
2453}
2454
2455/**
2456 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2457 * @adapter: board private structure
2458 *
2459 * Free all transmit software resources
2460 **/
2461static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2462{
2463 int i;
2464
2465 for (i = 0; i < adapter->num_tx_queues; i++)
2466 if (adapter->tx_ring[i].desc)
2467 ixgbevf_free_tx_resources(adapter,
2468 &adapter->tx_ring[i]);
2469
2470}
2471
2472/**
2473 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2474 * @adapter: board private structure
2475 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2476 *
2477 * Return 0 on success, negative on failure
2478 **/
2479int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2480 struct ixgbevf_ring *tx_ring)
2481{
2482 struct pci_dev *pdev = adapter->pdev;
2483 int size;
2484
2485 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2486 tx_ring->tx_buffer_info = vmalloc(size);
2487 if (!tx_ring->tx_buffer_info)
2488 goto err;
2489 memset(tx_ring->tx_buffer_info, 0, size);
2490
2491 /* round up to nearest 4K */
2492 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2493 tx_ring->size = ALIGN(tx_ring->size, 4096);
2494
2495 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2496 &tx_ring->dma);
2497 if (!tx_ring->desc)
2498 goto err;
2499
2500 tx_ring->next_to_use = 0;
2501 tx_ring->next_to_clean = 0;
2502 tx_ring->work_limit = tx_ring->count;
2503 return 0;
2504
2505err:
2506 vfree(tx_ring->tx_buffer_info);
2507 tx_ring->tx_buffer_info = NULL;
2508 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2509 "descriptor ring\n");
2510 return -ENOMEM;
2511}
2512
2513/**
2514 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2515 * @adapter: board private structure
2516 *
2517 * If this function returns with an error, then it's possible one or
2518 * more of the rings is populated (while the rest are not). It is the
2519 * callers duty to clean those orphaned rings.
2520 *
2521 * Return 0 on success, negative on failure
2522 **/
2523static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2524{
2525 int i, err = 0;
2526
2527 for (i = 0; i < adapter->num_tx_queues; i++) {
2528 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2529 if (!err)
2530 continue;
2531 hw_dbg(&adapter->hw,
2532 "Allocation for Tx Queue %u failed\n", i);
2533 break;
2534 }
2535
2536 return err;
2537}
2538
2539/**
2540 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2541 * @adapter: board private structure
2542 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2543 *
2544 * Returns 0 on success, negative on failure
2545 **/
2546int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2547 struct ixgbevf_ring *rx_ring)
2548{
2549 struct pci_dev *pdev = adapter->pdev;
2550 int size;
2551
2552 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2553 rx_ring->rx_buffer_info = vmalloc(size);
2554 if (!rx_ring->rx_buffer_info) {
2555 hw_dbg(&adapter->hw,
2556 "Unable to vmalloc buffer memory for "
2557 "the receive descriptor ring\n");
2558 goto alloc_failed;
2559 }
2560 memset(rx_ring->rx_buffer_info, 0, size);
2561
2562 /* Round up to nearest 4K */
2563 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2564 rx_ring->size = ALIGN(rx_ring->size, 4096);
2565
2566 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
2567 &rx_ring->dma);
2568
2569 if (!rx_ring->desc) {
2570 hw_dbg(&adapter->hw,
2571 "Unable to allocate memory for "
2572 "the receive descriptor ring\n");
2573 vfree(rx_ring->rx_buffer_info);
2574 rx_ring->rx_buffer_info = NULL;
2575 goto alloc_failed;
2576 }
2577
2578 rx_ring->next_to_clean = 0;
2579 rx_ring->next_to_use = 0;
2580
2581 return 0;
2582alloc_failed:
2583 return -ENOMEM;
2584}
2585
2586/**
2587 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2588 * @adapter: board private structure
2589 *
2590 * If this function returns with an error, then it's possible one or
2591 * more of the rings is populated (while the rest are not). It is the
2592 * callers duty to clean those orphaned rings.
2593 *
2594 * Return 0 on success, negative on failure
2595 **/
2596static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2597{
2598 int i, err = 0;
2599
2600 for (i = 0; i < adapter->num_rx_queues; i++) {
2601 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2602 if (!err)
2603 continue;
2604 hw_dbg(&adapter->hw,
2605 "Allocation for Rx Queue %u failed\n", i);
2606 break;
2607 }
2608 return err;
2609}
2610
2611/**
2612 * ixgbevf_free_rx_resources - Free Rx Resources
2613 * @adapter: board private structure
2614 * @rx_ring: ring to clean the resources from
2615 *
2616 * Free all receive software resources
2617 **/
2618void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2619 struct ixgbevf_ring *rx_ring)
2620{
2621 struct pci_dev *pdev = adapter->pdev;
2622
2623 ixgbevf_clean_rx_ring(adapter, rx_ring);
2624
2625 vfree(rx_ring->rx_buffer_info);
2626 rx_ring->rx_buffer_info = NULL;
2627
2628 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2629
2630 rx_ring->desc = NULL;
2631}
2632
2633/**
2634 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2635 * @adapter: board private structure
2636 *
2637 * Free all receive software resources
2638 **/
2639static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2640{
2641 int i;
2642
2643 for (i = 0; i < adapter->num_rx_queues; i++)
2644 if (adapter->rx_ring[i].desc)
2645 ixgbevf_free_rx_resources(adapter,
2646 &adapter->rx_ring[i]);
2647}
2648
2649/**
2650 * ixgbevf_open - Called when a network interface is made active
2651 * @netdev: network interface device structure
2652 *
2653 * Returns 0 on success, negative value on failure
2654 *
2655 * The open entry point is called when a network interface is made
2656 * active by the system (IFF_UP). At this point all resources needed
2657 * for transmit and receive operations are allocated, the interrupt
2658 * handler is registered with the OS, the watchdog timer is started,
2659 * and the stack is notified that the interface is ready.
2660 **/
2661static int ixgbevf_open(struct net_device *netdev)
2662{
2663 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2664 struct ixgbe_hw *hw = &adapter->hw;
2665 int err;
2666
2667 /* disallow open during test */
2668 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2669 return -EBUSY;
2670
2671 if (hw->adapter_stopped) {
2672 ixgbevf_reset(adapter);
2673 /* if adapter is still stopped then PF isn't up and
2674 * the vf can't start. */
2675 if (hw->adapter_stopped) {
2676 err = IXGBE_ERR_MBX;
2677 printk(KERN_ERR "Unable to start - perhaps the PF"
2678 "Driver isn't up yet\n");
2679 goto err_setup_reset;
2680 }
2681 }
2682
2683 /* allocate transmit descriptors */
2684 err = ixgbevf_setup_all_tx_resources(adapter);
2685 if (err)
2686 goto err_setup_tx;
2687
2688 /* allocate receive descriptors */
2689 err = ixgbevf_setup_all_rx_resources(adapter);
2690 if (err)
2691 goto err_setup_rx;
2692
2693 ixgbevf_configure(adapter);
2694
2695 /*
2696 * Map the Tx/Rx rings to the vectors we were allotted.
2697 * if request_irq will be called in this function map_rings
2698 * must be called *before* up_complete
2699 */
2700 ixgbevf_map_rings_to_vectors(adapter);
2701
2702 err = ixgbevf_up_complete(adapter);
2703 if (err)
2704 goto err_up;
2705
2706 /* clear any pending interrupts, may auto mask */
2707 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2708 err = ixgbevf_request_irq(adapter);
2709 if (err)
2710 goto err_req_irq;
2711
2712 ixgbevf_irq_enable(adapter, true, true);
2713
2714 return 0;
2715
2716err_req_irq:
2717 ixgbevf_down(adapter);
2718err_up:
2719 ixgbevf_free_irq(adapter);
2720err_setup_rx:
2721 ixgbevf_free_all_rx_resources(adapter);
2722err_setup_tx:
2723 ixgbevf_free_all_tx_resources(adapter);
2724 ixgbevf_reset(adapter);
2725
2726err_setup_reset:
2727
2728 return err;
2729}
2730
2731/**
2732 * ixgbevf_close - Disables a network interface
2733 * @netdev: network interface device structure
2734 *
2735 * Returns 0, this is not allowed to fail
2736 *
2737 * The close entry point is called when an interface is de-activated
2738 * by the OS. The hardware is still under the drivers control, but
2739 * needs to be disabled. A global MAC reset is issued to stop the
2740 * hardware, and all transmit and receive resources are freed.
2741 **/
2742static int ixgbevf_close(struct net_device *netdev)
2743{
2744 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2745
2746 ixgbevf_down(adapter);
2747 ixgbevf_free_irq(adapter);
2748
2749 ixgbevf_free_all_tx_resources(adapter);
2750 ixgbevf_free_all_rx_resources(adapter);
2751
2752 return 0;
2753}
2754
2755static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2756 struct ixgbevf_ring *tx_ring,
2757 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2758{
2759 struct ixgbe_adv_tx_context_desc *context_desc;
2760 unsigned int i;
2761 int err;
2762 struct ixgbevf_tx_buffer *tx_buffer_info;
2763 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2764 u32 mss_l4len_idx, l4len;
2765
2766 if (skb_is_gso(skb)) {
2767 if (skb_header_cloned(skb)) {
2768 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2769 if (err)
2770 return err;
2771 }
2772 l4len = tcp_hdrlen(skb);
2773 *hdr_len += l4len;
2774
2775 if (skb->protocol == htons(ETH_P_IP)) {
2776 struct iphdr *iph = ip_hdr(skb);
2777 iph->tot_len = 0;
2778 iph->check = 0;
2779 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2780 iph->daddr, 0,
2781 IPPROTO_TCP,
2782 0);
2783 adapter->hw_tso_ctxt++;
2784 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2785 ipv6_hdr(skb)->payload_len = 0;
2786 tcp_hdr(skb)->check =
2787 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2788 &ipv6_hdr(skb)->daddr,
2789 0, IPPROTO_TCP, 0);
2790 adapter->hw_tso6_ctxt++;
2791 }
2792
2793 i = tx_ring->next_to_use;
2794
2795 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2796 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2797
2798 /* VLAN MACLEN IPLEN */
2799 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2800 vlan_macip_lens |=
2801 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2802 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2803 IXGBE_ADVTXD_MACLEN_SHIFT);
2804 *hdr_len += skb_network_offset(skb);
2805 vlan_macip_lens |=
2806 (skb_transport_header(skb) - skb_network_header(skb));
2807 *hdr_len +=
2808 (skb_transport_header(skb) - skb_network_header(skb));
2809 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2810 context_desc->seqnum_seed = 0;
2811
2812 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2813 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2814 IXGBE_ADVTXD_DTYP_CTXT);
2815
2816 if (skb->protocol == htons(ETH_P_IP))
2817 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2818 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2819 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2820
2821 /* MSS L4LEN IDX */
2822 mss_l4len_idx =
2823 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2824 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2825 /* use index 1 for TSO */
2826 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2827 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2828
2829 tx_buffer_info->time_stamp = jiffies;
2830 tx_buffer_info->next_to_watch = i;
2831
2832 i++;
2833 if (i == tx_ring->count)
2834 i = 0;
2835 tx_ring->next_to_use = i;
2836
2837 return true;
2838 }
2839
2840 return false;
2841}
2842
2843static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2844 struct ixgbevf_ring *tx_ring,
2845 struct sk_buff *skb, u32 tx_flags)
2846{
2847 struct ixgbe_adv_tx_context_desc *context_desc;
2848 unsigned int i;
2849 struct ixgbevf_tx_buffer *tx_buffer_info;
2850 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2851
2852 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2853 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2854 i = tx_ring->next_to_use;
2855 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2856 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2857
2858 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2859 vlan_macip_lens |= (tx_flags &
2860 IXGBE_TX_FLAGS_VLAN_MASK);
2861 vlan_macip_lens |= (skb_network_offset(skb) <<
2862 IXGBE_ADVTXD_MACLEN_SHIFT);
2863 if (skb->ip_summed == CHECKSUM_PARTIAL)
2864 vlan_macip_lens |= (skb_transport_header(skb) -
2865 skb_network_header(skb));
2866
2867 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2868 context_desc->seqnum_seed = 0;
2869
2870 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2871 IXGBE_ADVTXD_DTYP_CTXT);
2872
2873 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2874 switch (skb->protocol) {
2875 case __constant_htons(ETH_P_IP):
2876 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2877 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2878 type_tucmd_mlhl |=
2879 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2880 break;
2881 case __constant_htons(ETH_P_IPV6):
2882 /* XXX what about other V6 headers?? */
2883 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2884 type_tucmd_mlhl |=
2885 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2886 break;
2887 default:
2888 if (unlikely(net_ratelimit())) {
2889 printk(KERN_WARNING
2890 "partial checksum but "
2891 "proto=%x!\n",
2892 skb->protocol);
2893 }
2894 break;
2895 }
2896 }
2897
2898 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2899 /* use index zero for tx checksum offload */
2900 context_desc->mss_l4len_idx = 0;
2901
2902 tx_buffer_info->time_stamp = jiffies;
2903 tx_buffer_info->next_to_watch = i;
2904
2905 adapter->hw_csum_tx_good++;
2906 i++;
2907 if (i == tx_ring->count)
2908 i = 0;
2909 tx_ring->next_to_use = i;
2910
2911 return true;
2912 }
2913
2914 return false;
2915}
2916
2917static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2918 struct ixgbevf_ring *tx_ring,
2919 struct sk_buff *skb, u32 tx_flags,
2920 unsigned int first)
2921{
2922 struct pci_dev *pdev = adapter->pdev;
2923 struct ixgbevf_tx_buffer *tx_buffer_info;
2924 unsigned int len;
2925 unsigned int total = skb->len;
2926 unsigned int offset = 0, size, count = 0, i;
2927 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2928 unsigned int f;
2929
2930 i = tx_ring->next_to_use;
2931
2932 len = min(skb_headlen(skb), total);
2933 while (len) {
2934 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2935 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2936
2937 tx_buffer_info->length = size;
2938 tx_buffer_info->mapped_as_page = false;
2939 tx_buffer_info->dma = pci_map_single(adapter->pdev,
2940 skb->data + offset,
2941 size, PCI_DMA_TODEVICE);
2942 if (pci_dma_mapping_error(pdev, tx_buffer_info->dma))
2943 goto dma_error;
2944 tx_buffer_info->time_stamp = jiffies;
2945 tx_buffer_info->next_to_watch = i;
2946
2947 len -= size;
2948 total -= size;
2949 offset += size;
2950 count++;
2951 i++;
2952 if (i == tx_ring->count)
2953 i = 0;
2954 }
2955
2956 for (f = 0; f < nr_frags; f++) {
2957 struct skb_frag_struct *frag;
2958
2959 frag = &skb_shinfo(skb)->frags[f];
2960 len = min((unsigned int)frag->size, total);
2961 offset = frag->page_offset;
2962
2963 while (len) {
2964 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2965 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2966
2967 tx_buffer_info->length = size;
2968 tx_buffer_info->dma = pci_map_page(adapter->pdev,
2969 frag->page,
2970 offset,
2971 size,
2972 PCI_DMA_TODEVICE);
2973 tx_buffer_info->mapped_as_page = true;
2974 if (pci_dma_mapping_error(pdev, tx_buffer_info->dma))
2975 goto dma_error;
2976 tx_buffer_info->time_stamp = jiffies;
2977 tx_buffer_info->next_to_watch = i;
2978
2979 len -= size;
2980 total -= size;
2981 offset += size;
2982 count++;
2983 i++;
2984 if (i == tx_ring->count)
2985 i = 0;
2986 }
2987 if (total == 0)
2988 break;
2989 }
2990
2991 if (i == 0)
2992 i = tx_ring->count - 1;
2993 else
2994 i = i - 1;
2995 tx_ring->tx_buffer_info[i].skb = skb;
2996 tx_ring->tx_buffer_info[first].next_to_watch = i;
2997
2998 return count;
2999
3000dma_error:
3001 dev_err(&pdev->dev, "TX DMA map failed\n");
3002
3003 /* clear timestamp and dma mappings for failed tx_buffer_info map */
3004 tx_buffer_info->dma = 0;
3005 tx_buffer_info->time_stamp = 0;
3006 tx_buffer_info->next_to_watch = 0;
3007 count--;
3008
3009 /* clear timestamp and dma mappings for remaining portion of packet */
3010 while (count >= 0) {
3011 count--;
3012 i--;
3013 if (i < 0)
3014 i += tx_ring->count;
3015 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3016 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3017 }
3018
3019 return count;
3020}
3021
3022static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
3023 struct ixgbevf_ring *tx_ring, int tx_flags,
3024 int count, u32 paylen, u8 hdr_len)
3025{
3026 union ixgbe_adv_tx_desc *tx_desc = NULL;
3027 struct ixgbevf_tx_buffer *tx_buffer_info;
3028 u32 olinfo_status = 0, cmd_type_len = 0;
3029 unsigned int i;
3030
3031 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3032
3033 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3034
3035 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3036
3037 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3038 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3039
3040 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3041 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3042
3043 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3044 IXGBE_ADVTXD_POPTS_SHIFT;
3045
3046 /* use index 1 context for tso */
3047 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3048 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3049 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3050 IXGBE_ADVTXD_POPTS_SHIFT;
3051
3052 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3053 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3054 IXGBE_ADVTXD_POPTS_SHIFT;
3055
3056 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3057
3058 i = tx_ring->next_to_use;
3059 while (count--) {
3060 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3061 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3062 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3063 tx_desc->read.cmd_type_len =
3064 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3065 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3066 i++;
3067 if (i == tx_ring->count)
3068 i = 0;
3069 }
3070
3071 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3072
3073 /*
3074 * Force memory writes to complete before letting h/w
3075 * know there are new descriptors to fetch. (Only
3076 * applicable for weak-ordered memory model archs,
3077 * such as IA-64).
3078 */
3079 wmb();
3080
3081 tx_ring->next_to_use = i;
3082 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3083}
3084
3085static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
3086 struct ixgbevf_ring *tx_ring, int size)
3087{
3088 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3089
3090 netif_stop_subqueue(netdev, tx_ring->queue_index);
3091 /* Herbert's original patch had:
3092 * smp_mb__after_netif_stop_queue();
3093 * but since that doesn't exist yet, just open code it. */
3094 smp_mb();
3095
3096 /* We need to check again in a case another CPU has just
3097 * made room available. */
3098 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3099 return -EBUSY;
3100
3101 /* A reprieve! - use start_queue because it doesn't call schedule */
3102 netif_start_subqueue(netdev, tx_ring->queue_index);
3103 ++adapter->restart_queue;
3104 return 0;
3105}
3106
3107static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
3108 struct ixgbevf_ring *tx_ring, int size)
3109{
3110 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3111 return 0;
3112 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
3113}
3114
3115static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3116{
3117 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3118 struct ixgbevf_ring *tx_ring;
3119 unsigned int first;
3120 unsigned int tx_flags = 0;
3121 u8 hdr_len = 0;
3122 int r_idx = 0, tso;
3123 int count = 0;
3124
3125 unsigned int f;
3126
3127 tx_ring = &adapter->tx_ring[r_idx];
3128
3129 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3130 tx_flags |= vlan_tx_tag_get(skb);
3131 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3132 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3133 }
3134
3135 /* four things can cause us to need a context descriptor */
3136 if (skb_is_gso(skb) ||
3137 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3138 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3139 count++;
3140
3141 count += TXD_USE_COUNT(skb_headlen(skb));
3142 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3143 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3144
3145 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) {
3146 adapter->tx_busy++;
3147 return NETDEV_TX_BUSY;
3148 }
3149
3150 first = tx_ring->next_to_use;
3151
3152 if (skb->protocol == htons(ETH_P_IP))
3153 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3154 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3155 if (tso < 0) {
3156 dev_kfree_skb_any(skb);
3157 return NETDEV_TX_OK;
3158 }
3159
3160 if (tso)
3161 tx_flags |= IXGBE_TX_FLAGS_TSO;
3162 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3163 (skb->ip_summed == CHECKSUM_PARTIAL))
3164 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3165
3166 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
3167 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
3168 skb->len, hdr_len);
3169
3170 netdev->trans_start = jiffies;
3171
3172 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3173
3174 return NETDEV_TX_OK;
3175}
3176
3177/**
3178 * ixgbevf_get_stats - Get System Network Statistics
3179 * @netdev: network interface device structure
3180 *
3181 * Returns the address of the device statistics structure.
3182 * The statistics are actually updated from the timer callback.
3183 **/
3184static struct net_device_stats *ixgbevf_get_stats(struct net_device *netdev)
3185{
3186 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3187
3188 /* only return the current stats */
3189 return &adapter->net_stats;
3190}
3191
3192/**
3193 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3194 * @netdev: network interface device structure
3195 * @p: pointer to an address structure
3196 *
3197 * Returns 0 on success, negative on failure
3198 **/
3199static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3200{
3201 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3202 struct ixgbe_hw *hw = &adapter->hw;
3203 struct sockaddr *addr = p;
3204
3205 if (!is_valid_ether_addr(addr->sa_data))
3206 return -EADDRNOTAVAIL;
3207
3208 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3209 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3210
3211 if (hw->mac.ops.set_rar)
3212 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3213
3214 return 0;
3215}
3216
3217/**
3218 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3219 * @netdev: network interface device structure
3220 * @new_mtu: new value for maximum frame size
3221 *
3222 * Returns 0 on success, negative on failure
3223 **/
3224static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3225{
3226 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3227 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3228
3229 /* MTU < 68 is an error and causes problems on some kernels */
3230 if ((new_mtu < 68) || (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
3231 return -EINVAL;
3232
3233 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3234 netdev->mtu, new_mtu);
3235 /* must set new MTU before calling down or up */
3236 netdev->mtu = new_mtu;
3237
3238 if (netif_running(netdev))
3239 ixgbevf_reinit_locked(adapter);
3240
3241 return 0;
3242}
3243
3244static void ixgbevf_shutdown(struct pci_dev *pdev)
3245{
3246 struct net_device *netdev = pci_get_drvdata(pdev);
3247 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3248
3249 netif_device_detach(netdev);
3250
3251 if (netif_running(netdev)) {
3252 ixgbevf_down(adapter);
3253 ixgbevf_free_irq(adapter);
3254 ixgbevf_free_all_tx_resources(adapter);
3255 ixgbevf_free_all_rx_resources(adapter);
3256 }
3257
3258#ifdef CONFIG_PM
3259 pci_save_state(pdev);
3260#endif
3261
3262 pci_disable_device(pdev);
3263}
3264
3265#ifdef HAVE_NET_DEVICE_OPS
3266static const struct net_device_ops ixgbe_netdev_ops = {
3267 .ndo_open = &ixgbevf_open,
3268 .ndo_stop = &ixgbevf_close,
3269 .ndo_start_xmit = &ixgbevf_xmit_frame,
3270 .ndo_get_stats = &ixgbevf_get_stats,
3271 .ndo_set_rx_mode = &ixgbevf_set_rx_mode,
3272 .ndo_set_multicast_list = &ixgbevf_set_rx_mode,
3273 .ndo_validate_addr = eth_validate_addr,
3274 .ndo_set_mac_address = &ixgbevf_set_mac,
3275 .ndo_change_mtu = &ixgbevf_change_mtu,
3276 .ndo_tx_timeout = &ixgbevf_tx_timeout,
3277 .ndo_vlan_rx_register = &ixgbevf_vlan_rx_register,
3278 .ndo_vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid,
3279 .ndo_vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid,
3280};
3281#endif /* HAVE_NET_DEVICE_OPS */
3282
3283static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3284{
3285 struct ixgbevf_adapter *adapter;
3286 adapter = netdev_priv(dev);
3287#ifdef HAVE_NET_DEVICE_OPS
3288 dev->netdev_ops = &ixgbe_netdev_ops;
3289#else /* HAVE_NET_DEVICE_OPS */
3290 dev->open = &ixgbevf_open;
3291 dev->stop = &ixgbevf_close;
3292
3293 dev->hard_start_xmit = &ixgbevf_xmit_frame;
3294
3295 dev->get_stats = &ixgbevf_get_stats;
3296 dev->set_multicast_list = &ixgbevf_set_rx_mode;
3297 dev->set_mac_address = &ixgbevf_set_mac;
3298 dev->change_mtu = &ixgbevf_change_mtu;
3299 dev->tx_timeout = &ixgbevf_tx_timeout;
3300 dev->vlan_rx_register = &ixgbevf_vlan_rx_register;
3301 dev->vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid;
3302 dev->vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid;
3303#endif /* HAVE_NET_DEVICE_OPS */
3304 ixgbevf_set_ethtool_ops(dev);
3305 dev->watchdog_timeo = 5 * HZ;
3306}
3307
3308/**
3309 * ixgbevf_probe - Device Initialization Routine
3310 * @pdev: PCI device information struct
3311 * @ent: entry in ixgbevf_pci_tbl
3312 *
3313 * Returns 0 on success, negative on failure
3314 *
3315 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3316 * The OS initialization, configuring of the adapter private structure,
3317 * and a hardware reset occur.
3318 **/
3319static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3320 const struct pci_device_id *ent)
3321{
3322 struct net_device *netdev;
3323 struct ixgbevf_adapter *adapter = NULL;
3324 struct ixgbe_hw *hw = NULL;
3325 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3326 static int cards_found;
3327 int err, pci_using_dac;
3328
3329 err = pci_enable_device(pdev);
3330 if (err)
3331 return err;
3332
3333 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
3334 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
3335 pci_using_dac = 1;
3336 } else {
3337 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3338 if (err) {
3339 err = pci_set_consistent_dma_mask(pdev,
3340 DMA_BIT_MASK(32));
3341 if (err) {
3342 dev_err(&pdev->dev, "No usable DMA "
3343 "configuration, aborting\n");
3344 goto err_dma;
3345 }
3346 }
3347 pci_using_dac = 0;
3348 }
3349
3350 err = pci_request_regions(pdev, ixgbevf_driver_name);
3351 if (err) {
3352 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3353 goto err_pci_reg;
3354 }
3355
3356 pci_set_master(pdev);
3357
3358#ifdef HAVE_TX_MQ
3359 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3360 MAX_TX_QUEUES);
3361#else
3362 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter));
3363#endif
3364 if (!netdev) {
3365 err = -ENOMEM;
3366 goto err_alloc_etherdev;
3367 }
3368
3369 SET_NETDEV_DEV(netdev, &pdev->dev);
3370
3371 pci_set_drvdata(pdev, netdev);
3372 adapter = netdev_priv(netdev);
3373
3374 adapter->netdev = netdev;
3375 adapter->pdev = pdev;
3376 hw = &adapter->hw;
3377 hw->back = adapter;
3378 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3379
3380 /*
3381 * call save state here in standalone driver because it relies on
3382 * adapter struct to exist, and needs to call netdev_priv
3383 */
3384 pci_save_state(pdev);
3385
3386 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3387 pci_resource_len(pdev, 0));
3388 if (!hw->hw_addr) {
3389 err = -EIO;
3390 goto err_ioremap;
3391 }
3392
3393 ixgbevf_assign_netdev_ops(netdev);
3394
3395 adapter->bd_number = cards_found;
3396
3397 /* Setup hw api */
3398 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3399 hw->mac.type = ii->mac;
3400
3401 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
3402 sizeof(struct ixgbe_mac_operations));
3403
3404 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE;
3405 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
3406 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE;
3407
3408 /* setup the private structure */
3409 err = ixgbevf_sw_init(adapter);
3410
3411 ixgbevf_init_last_counter_stats(adapter);
3412
3413#ifdef MAX_SKB_FRAGS
3414 netdev->features = NETIF_F_SG |
3415 NETIF_F_IP_CSUM |
3416 NETIF_F_HW_VLAN_TX |
3417 NETIF_F_HW_VLAN_RX |
3418 NETIF_F_HW_VLAN_FILTER;
3419
3420 netdev->features |= NETIF_F_IPV6_CSUM;
3421 netdev->features |= NETIF_F_TSO;
3422 netdev->features |= NETIF_F_TSO6;
3423 netdev->vlan_features |= NETIF_F_TSO;
3424 netdev->vlan_features |= NETIF_F_TSO6;
3425 netdev->vlan_features |= NETIF_F_IP_CSUM;
3426 netdev->vlan_features |= NETIF_F_SG;
3427
3428 if (pci_using_dac)
3429 netdev->features |= NETIF_F_HIGHDMA;
3430
3431#endif /* MAX_SKB_FRAGS */
3432
3433 /* The HW MAC address was set and/or determined in sw_init */
3434 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
3435 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3436
3437 if (!is_valid_ether_addr(netdev->dev_addr)) {
3438 printk(KERN_ERR "invalid MAC address\n");
3439 err = -EIO;
3440 goto err_sw_init;
3441 }
3442
3443 init_timer(&adapter->watchdog_timer);
3444 adapter->watchdog_timer.function = &ixgbevf_watchdog;
3445 adapter->watchdog_timer.data = (unsigned long)adapter;
3446
3447 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3448 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3449
3450 err = ixgbevf_init_interrupt_scheme(adapter);
3451 if (err)
3452 goto err_sw_init;
3453
3454 /* pick up the PCI bus settings for reporting later */
3455 if (hw->mac.ops.get_bus_info)
3456 hw->mac.ops.get_bus_info(hw);
3457
3458
3459 netif_carrier_off(netdev);
3460 netif_tx_stop_all_queues(netdev);
3461
3462 strcpy(netdev->name, "eth%d");
3463
3464 err = register_netdev(netdev);
3465 if (err)
3466 goto err_register;
3467
3468 adapter->netdev_registered = true;
3469
3470 /* print the MAC address */
3471 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
3472 netdev->dev_addr[0],
3473 netdev->dev_addr[1],
3474 netdev->dev_addr[2],
3475 netdev->dev_addr[3],
3476 netdev->dev_addr[4],
3477 netdev->dev_addr[5]);
3478
3479 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3480
3481 hw_dbg(hw, "LRO is disabled \n");
3482
3483 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3484 cards_found++;
3485 return 0;
3486
3487err_register:
3488err_sw_init:
3489 ixgbevf_reset_interrupt_capability(adapter);
3490 iounmap(hw->hw_addr);
3491err_ioremap:
3492 free_netdev(netdev);
3493err_alloc_etherdev:
3494 pci_release_regions(pdev);
3495err_pci_reg:
3496err_dma:
3497 pci_disable_device(pdev);
3498 return err;
3499}
3500
3501/**
3502 * ixgbevf_remove - Device Removal Routine
3503 * @pdev: PCI device information struct
3504 *
3505 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3506 * that it should release a PCI device. The could be caused by a
3507 * Hot-Plug event, or because the driver is going to be removed from
3508 * memory.
3509 **/
3510static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3511{
3512 struct net_device *netdev = pci_get_drvdata(pdev);
3513 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3514
3515 set_bit(__IXGBEVF_DOWN, &adapter->state);
3516
3517 del_timer_sync(&adapter->watchdog_timer);
3518
3519 cancel_work_sync(&adapter->watchdog_task);
3520
3521 flush_scheduled_work();
3522
3523 if (adapter->netdev_registered) {
3524 unregister_netdev(netdev);
3525 adapter->netdev_registered = false;
3526 }
3527
3528 ixgbevf_reset_interrupt_capability(adapter);
3529
3530 iounmap(adapter->hw.hw_addr);
3531 pci_release_regions(pdev);
3532
3533 hw_dbg(&adapter->hw, "Remove complete\n");
3534
3535 kfree(adapter->tx_ring);
3536 kfree(adapter->rx_ring);
3537
3538 free_netdev(netdev);
3539
3540 pci_disable_device(pdev);
3541}
3542
3543static struct pci_driver ixgbevf_driver = {
3544 .name = ixgbevf_driver_name,
3545 .id_table = ixgbevf_pci_tbl,
3546 .probe = ixgbevf_probe,
3547 .remove = __devexit_p(ixgbevf_remove),
3548 .shutdown = ixgbevf_shutdown,
3549};
3550
3551/**
3552 * ixgbe_init_module - Driver Registration Routine
3553 *
3554 * ixgbe_init_module is the first routine called when the driver is
3555 * loaded. All it does is register with the PCI subsystem.
3556 **/
3557static int __init ixgbevf_init_module(void)
3558{
3559 int ret;
3560 printk(KERN_INFO "ixgbevf: %s - version %s\n", ixgbevf_driver_string,
3561 ixgbevf_driver_version);
3562
3563 printk(KERN_INFO "%s\n", ixgbevf_copyright);
3564
3565 ret = pci_register_driver(&ixgbevf_driver);
3566 return ret;
3567}
3568
3569module_init(ixgbevf_init_module);
3570
3571/**
3572 * ixgbe_exit_module - Driver Exit Cleanup Routine
3573 *
3574 * ixgbe_exit_module is called just before the driver is removed
3575 * from memory.
3576 **/
3577static void __exit ixgbevf_exit_module(void)
3578{
3579 pci_unregister_driver(&ixgbevf_driver);
3580}
3581
3582#ifdef DEBUG
3583/**
3584 * ixgbe_get_hw_dev_name - return device name string
3585 * used by hardware layer to print debugging information
3586 **/
3587char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3588{
3589 struct ixgbevf_adapter *adapter = hw->back;
3590 return adapter->netdev->name;
3591}
3592
3593#endif
3594module_exit(ixgbevf_exit_module);
3595
3596/* ixgbevf_main.c */
Clone of davem's net-next-2.6 tree