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e1000e: Fix irq_synchronize in MSI-X case
[net-next-2.6.git] / drivers / net / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
32#include <linux/types.h>
33#include <linux/module.h>
34#include <linux/pci.h>
35#include <linux/netdevice.h>
36#include <linux/vmalloc.h>
37#include <linux/string.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
5a0e3ad6 42#include <linux/slab.h>
92915f71
GR		 43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47
48#include "ixgbevf.h"
49
50char ixgbevf_driver_name[] = "ixgbevf";
51static const char ixgbevf_driver_string[] =
52 "Intel(R) 82599 Virtual Function";
53
54#define DRV_VERSION "1.0.0-k0"
55const char ixgbevf_driver_version[] = DRV_VERSION;
56static char ixgbevf_copyright[] = "Copyright (c) 2009 Intel Corporation.";
57
58static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
59 [board_82599_vf] = &ixgbevf_vf_info,
60};
61
62/* ixgbevf_pci_tbl - PCI Device ID Table
63 *
64 * Wildcard entries (PCI_ANY_ID) should come last
65 * Last entry must be all 0s
66 *
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
69 */
70static struct pci_device_id ixgbevf_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
72 board_82599_vf},
73
74 /* required last entry */
75 {0, }
76};
77MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
78
79MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
80MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
81MODULE_LICENSE("GPL");
82MODULE_VERSION(DRV_VERSION);
83
84#define DEFAULT_DEBUG_LEVEL_SHIFT 3
85
86/* forward decls */
87static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector);
88static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
89 u32 itr_reg);
90
91static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
92 struct ixgbevf_ring *rx_ring,
93 u32 val)
94{
95 /*
96 * Force memory writes to complete before letting h/w
97 * know there are new descriptors to fetch. (Only
98 * applicable for weak-ordered memory model archs,
99 * such as IA-64).
100 */
101 wmb();
102 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
103}
104
105/*
106 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
107 * @adapter: pointer to adapter struct
108 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
109 * @queue: queue to map the corresponding interrupt to
110 * @msix_vector: the vector to map to the corresponding queue
111 *
112 */
113static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
114 u8 queue, u8 msix_vector)
115{
116 u32 ivar, index;
117 struct ixgbe_hw *hw = &adapter->hw;
118 if (direction == -1) {
119 /* other causes */
120 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
121 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
122 ivar &= ~0xFF;
123 ivar |= msix_vector;
124 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
125 } else {
126 /* tx or rx causes */
127 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
128 index = ((16 * (queue & 1)) + (8 * direction));
129 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
130 ivar &= ~(0xFF << index);
131 ivar |= (msix_vector << index);
132 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
133 }
134}
135
136static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
137 struct ixgbevf_tx_buffer
138 *tx_buffer_info)
139{
140 if (tx_buffer_info->dma) {
141 if (tx_buffer_info->mapped_as_page)
2a1f8794 142 dma_unmap_page(&adapter->pdev->dev,
92915f71
GR		 143 tx_buffer_info->dma,
144 tx_buffer_info->length,
2a1f8794 145 DMA_TO_DEVICE);
92915f71 146 else
2a1f8794 147 dma_unmap_single(&adapter->pdev->dev,
92915f71
GR		 148 tx_buffer_info->dma,
149 tx_buffer_info->length,
2a1f8794 150 DMA_TO_DEVICE);
92915f71
GR		 151 tx_buffer_info->dma = 0;
152 }
153 if (tx_buffer_info->skb) {
154 dev_kfree_skb_any(tx_buffer_info->skb);
155 tx_buffer_info->skb = NULL;
156 }
157 tx_buffer_info->time_stamp = 0;
158 /* tx_buffer_info must be completely set up in the transmit path */
159}
160
161static inline bool ixgbevf_check_tx_hang(struct ixgbevf_adapter *adapter,
162 struct ixgbevf_ring *tx_ring,
163 unsigned int eop)
164{
165 struct ixgbe_hw *hw = &adapter->hw;
166 u32 head, tail;
167
168 /* Detect a transmit hang in hardware, this serializes the
169 * check with the clearing of time_stamp and movement of eop */
170 head = readl(hw->hw_addr + tx_ring->head);
171 tail = readl(hw->hw_addr + tx_ring->tail);
172 adapter->detect_tx_hung = false;
173 if ((head != tail) &&
174 tx_ring->tx_buffer_info[eop].time_stamp &&
175 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ)) {
176 /* detected Tx unit hang */
177 union ixgbe_adv_tx_desc *tx_desc;
178 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
179 printk(KERN_ERR "Detected Tx Unit Hang\n"
180 " Tx Queue <%d>\n"
181 " TDH, TDT <%x>, <%x>\n"
182 " next_to_use <%x>\n"
183 " next_to_clean <%x>\n"
184 "tx_buffer_info[next_to_clean]\n"
185 " time_stamp <%lx>\n"
186 " jiffies <%lx>\n",
187 tx_ring->queue_index,
188 head, tail,
189 tx_ring->next_to_use, eop,
190 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
191 return true;
192 }
193
194 return false;
195}
196
197#define IXGBE_MAX_TXD_PWR 14
198#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
199
200/* Tx Descriptors needed, worst case */
201#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
202 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
203#ifdef MAX_SKB_FRAGS
204#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
205 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
206#else
207#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD)
208#endif
209
210static void ixgbevf_tx_timeout(struct net_device *netdev);
211
212/**
213 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
214 * @adapter: board private structure
215 * @tx_ring: tx ring to clean
216 **/
217static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter,
218 struct ixgbevf_ring *tx_ring)
219{
220 struct net_device *netdev = adapter->netdev;
221 struct ixgbe_hw *hw = &adapter->hw;
222 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
223 struct ixgbevf_tx_buffer *tx_buffer_info;
224 unsigned int i, eop, count = 0;
225 unsigned int total_bytes = 0, total_packets = 0;
226
227 i = tx_ring->next_to_clean;
228 eop = tx_ring->tx_buffer_info[i].next_to_watch;
229 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
230
231 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
232 (count < tx_ring->work_limit)) {
233 bool cleaned = false;
234 for ( ; !cleaned; count++) {
235 struct sk_buff *skb;
236 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
237 tx_buffer_info = &tx_ring->tx_buffer_info[i];
238 cleaned = (i == eop);
239 skb = tx_buffer_info->skb;
240
241 if (cleaned && skb) {
242 unsigned int segs, bytecount;
243
244 /* gso_segs is currently only valid for tcp */
245 segs = skb_shinfo(skb)->gso_segs ?: 1;
246 /* multiply data chunks by size of headers */
247 bytecount = ((segs - 1) * skb_headlen(skb)) +
248 skb->len;
249 total_packets += segs;
250 total_bytes += bytecount;
251 }
252
253 ixgbevf_unmap_and_free_tx_resource(adapter,
254 tx_buffer_info);
255
256 tx_desc->wb.status = 0;
257
258 i++;
259 if (i == tx_ring->count)
260 i = 0;
261 }
262
263 eop = tx_ring->tx_buffer_info[i].next_to_watch;
264 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
265 }
266
267 tx_ring->next_to_clean = i;
268
269#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
270 if (unlikely(count && netif_carrier_ok(netdev) &&
271 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
272 /* Make sure that anybody stopping the queue after this
273 * sees the new next_to_clean.
274 */
275 smp_mb();
276#ifdef HAVE_TX_MQ
277 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
278 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
279 netif_wake_subqueue(netdev, tx_ring->queue_index);
280 ++adapter->restart_queue;
281 }
282#else
283 if (netif_queue_stopped(netdev) &&
284 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
285 netif_wake_queue(netdev);
286 ++adapter->restart_queue;
287 }
288#endif
289 }
290
291 if (adapter->detect_tx_hung) {
292 if (ixgbevf_check_tx_hang(adapter, tx_ring, i)) {
293 /* schedule immediate reset if we believe we hung */
294 printk(KERN_INFO
295 "tx hang %d detected, resetting adapter\n",
296 adapter->tx_timeout_count + 1);
297 ixgbevf_tx_timeout(adapter->netdev);
298 }
299 }
300
301 /* re-arm the interrupt */
302 if ((count >= tx_ring->work_limit) &&
303 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) {
304 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);
305 }
306
307 tx_ring->total_bytes += total_bytes;
308 tx_ring->total_packets += total_packets;
309
310 adapter->net_stats.tx_bytes += total_bytes;
311 adapter->net_stats.tx_packets += total_packets;
312
313 return (count < tx_ring->work_limit);
314}
315
316/**
317 * ixgbevf_receive_skb - Send a completed packet up the stack
318 * @q_vector: structure containing interrupt and ring information
319 * @skb: packet to send up
320 * @status: hardware indication of status of receive
321 * @rx_ring: rx descriptor ring (for a specific queue) to setup
322 * @rx_desc: rx descriptor
323 **/
324static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
325 struct sk_buff *skb, u8 status,
326 struct ixgbevf_ring *ring,
327 union ixgbe_adv_rx_desc *rx_desc)
328{
329 struct ixgbevf_adapter *adapter = q_vector->adapter;
330 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
331 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
332 int ret;
333
334 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
335 if (adapter->vlgrp && is_vlan)
336 vlan_gro_receive(&q_vector->napi,
337 adapter->vlgrp,
338 tag, skb);
339 else
340 napi_gro_receive(&q_vector->napi, skb);
341 } else {
342 if (adapter->vlgrp && is_vlan)
343 ret = vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
344 else
345 ret = netif_rx(skb);
346 }
347}
348
349/**
350 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
351 * @adapter: address of board private structure
352 * @status_err: hardware indication of status of receive
353 * @skb: skb currently being received and modified
354 **/
355static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
356 u32 status_err, struct sk_buff *skb)
357{
358 skb->ip_summed = CHECKSUM_NONE;
359
360 /* Rx csum disabled */
361 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
362 return;
363
364 /* if IP and error */
365 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
366 (status_err & IXGBE_RXDADV_ERR_IPE)) {
367 adapter->hw_csum_rx_error++;
368 return;
369 }
370
371 if (!(status_err & IXGBE_RXD_STAT_L4CS))
372 return;
373
374 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
375 adapter->hw_csum_rx_error++;
376 return;
377 }
378
379 /* It must be a TCP or UDP packet with a valid checksum */
380 skb->ip_summed = CHECKSUM_UNNECESSARY;
381 adapter->hw_csum_rx_good++;
382}
383
384/**
385 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
386 * @adapter: address of board private structure
387 **/
388static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
389 struct ixgbevf_ring *rx_ring,
390 int cleaned_count)
391{
392 struct pci_dev *pdev = adapter->pdev;
393 union ixgbe_adv_rx_desc *rx_desc;
394 struct ixgbevf_rx_buffer *bi;
395 struct sk_buff *skb;
396 unsigned int i;
397 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
398
399 i = rx_ring->next_to_use;
400 bi = &rx_ring->rx_buffer_info[i];
401
402 while (cleaned_count--) {
403 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
404
405 if (!bi->page_dma &&
406 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
407 if (!bi->page) {
408 bi->page = netdev_alloc_page(adapter->netdev);
409 if (!bi->page) {
410 adapter->alloc_rx_page_failed++;
411 goto no_buffers;
412 }
413 bi->page_offset = 0;
414 } else {
415 /* use a half page if we're re-using */
416 bi->page_offset ^= (PAGE_SIZE / 2);
417 }
418
2a1f8794 419 bi->page_dma = dma_map_page(&pdev->dev, bi->page,
92915f71
GR		 420 bi->page_offset,
421 (PAGE_SIZE / 2),
2a1f8794 422 DMA_FROM_DEVICE);
92915f71
GR		 423 }
424
425 skb = bi->skb;
426 if (!skb) {
427 skb = netdev_alloc_skb(adapter->netdev,
428 bufsz);
429
430 if (!skb) {
431 adapter->alloc_rx_buff_failed++;
432 goto no_buffers;
433 }
434
435 /*
436 * Make buffer alignment 2 beyond a 16 byte boundary
437 * this will result in a 16 byte aligned IP header after
438 * the 14 byte MAC header is removed
439 */
440 skb_reserve(skb, NET_IP_ALIGN);
441
442 bi->skb = skb;
443 }
444 if (!bi->dma) {
2a1f8794 445 bi->dma = dma_map_single(&pdev->dev, skb->data,
92915f71 446 rx_ring->rx_buf_len,
2a1f8794 447 DMA_FROM_DEVICE);
92915f71
GR		 448 }
449 /* Refresh the desc even if buffer_addrs didn't change because
450 * each write-back erases this info. */
451 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
452 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
453 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
454 } else {
455 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
456 }
457
458 i++;
459 if (i == rx_ring->count)
460 i = 0;
461 bi = &rx_ring->rx_buffer_info[i];
462 }
463
464no_buffers:
465 if (rx_ring->next_to_use != i) {
466 rx_ring->next_to_use = i;
467 if (i-- == 0)
468 i = (rx_ring->count - 1);
469
470 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
471 }
472}
473
474static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
475 u64 qmask)
476{
477 u32 mask;
478 struct ixgbe_hw *hw = &adapter->hw;
479
480 mask = (qmask & 0xFFFFFFFF);
481 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
482}
483
484static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
485{
486 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
487}
488
489static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
490{
491 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
492}
493
494static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
495 struct ixgbevf_ring *rx_ring,
496 int *work_done, int work_to_do)
497{
498 struct ixgbevf_adapter *adapter = q_vector->adapter;
499 struct pci_dev *pdev = adapter->pdev;
500 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
501 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
502 struct sk_buff *skb;
503 unsigned int i;
504 u32 len, staterr;
505 u16 hdr_info;
506 bool cleaned = false;
507 int cleaned_count = 0;
508 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
509
510 i = rx_ring->next_to_clean;
511 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
512 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
513 rx_buffer_info = &rx_ring->rx_buffer_info[i];
514
515 while (staterr & IXGBE_RXD_STAT_DD) {
516 u32 upper_len = 0;
517 if (*work_done >= work_to_do)
518 break;
519 (*work_done)++;
520
521 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
522 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc));
523 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
524 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
525 if (hdr_info & IXGBE_RXDADV_SPH)
526 adapter->rx_hdr_split++;
527 if (len > IXGBEVF_RX_HDR_SIZE)
528 len = IXGBEVF_RX_HDR_SIZE;
529 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
530 } else {
531 len = le16_to_cpu(rx_desc->wb.upper.length);
532 }
533 cleaned = true;
534 skb = rx_buffer_info->skb;
535 prefetch(skb->data - NET_IP_ALIGN);
536 rx_buffer_info->skb = NULL;
537
538 if (rx_buffer_info->dma) {
2a1f8794 539 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 540 rx_ring->rx_buf_len,
2a1f8794 541 DMA_FROM_DEVICE);
92915f71
GR		 542 rx_buffer_info->dma = 0;
543 skb_put(skb, len);
544 }
545
546 if (upper_len) {
2a1f8794
NN		 547 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
548 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 549 rx_buffer_info->page_dma = 0;
550 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
551 rx_buffer_info->page,
552 rx_buffer_info->page_offset,
553 upper_len);
554
555 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
556 (page_count(rx_buffer_info->page) != 1))
557 rx_buffer_info->page = NULL;
558 else
559 get_page(rx_buffer_info->page);
560
561 skb->len += upper_len;
562 skb->data_len += upper_len;
563 skb->truesize += upper_len;
564 }
565
566 i++;
567 if (i == rx_ring->count)
568 i = 0;
569
570 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
571 prefetch(next_rxd);
572 cleaned_count++;
573
574 next_buffer = &rx_ring->rx_buffer_info[i];
575
576 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
577 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
578 rx_buffer_info->skb = next_buffer->skb;
579 rx_buffer_info->dma = next_buffer->dma;
580 next_buffer->skb = skb;
581 next_buffer->dma = 0;
582 } else {
583 skb->next = next_buffer->skb;
584 skb->next->prev = skb;
585 }
586 adapter->non_eop_descs++;
587 goto next_desc;
588 }
589
590 /* ERR_MASK will only have valid bits if EOP set */
591 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
592 dev_kfree_skb_irq(skb);
593 goto next_desc;
594 }
595
596 ixgbevf_rx_checksum(adapter, staterr, skb);
597
598 /* probably a little skewed due to removing CRC */
599 total_rx_bytes += skb->len;
600 total_rx_packets++;
601
602 /*
603 * Work around issue of some types of VM to VM loop back
604 * packets not getting split correctly
605 */
606 if (staterr & IXGBE_RXD_STAT_LB) {
e743d313 607 u32 header_fixup_len = skb_headlen(skb);
92915f71
GR		 608 if (header_fixup_len < 14)
609 skb_push(skb, header_fixup_len);
610 }
611 skb->protocol = eth_type_trans(skb, adapter->netdev);
612
613 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
92915f71
GR		 614
615next_desc:
616 rx_desc->wb.upper.status_error = 0;
617
618 /* return some buffers to hardware, one at a time is too slow */
619 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
620 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
621 cleaned_count);
622 cleaned_count = 0;
623 }
624
625 /* use prefetched values */
626 rx_desc = next_rxd;
627 rx_buffer_info = &rx_ring->rx_buffer_info[i];
628
629 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
630 }
631
632 rx_ring->next_to_clean = i;
633 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
634
635 if (cleaned_count)
636 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
637
638 rx_ring->total_packets += total_rx_packets;
639 rx_ring->total_bytes += total_rx_bytes;
640 adapter->net_stats.rx_bytes += total_rx_bytes;
641 adapter->net_stats.rx_packets += total_rx_packets;
642
643 return cleaned;
644}
645
646/**
647 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine
648 * @napi: napi struct with our devices info in it
649 * @budget: amount of work driver is allowed to do this pass, in packets
650 *
651 * This function is optimized for cleaning one queue only on a single
652 * q_vector!!!
653 **/
654static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
655{
656 struct ixgbevf_q_vector *q_vector =
657 container_of(napi, struct ixgbevf_q_vector, napi);
658 struct ixgbevf_adapter *adapter = q_vector->adapter;
659 struct ixgbevf_ring *rx_ring = NULL;
660 int work_done = 0;
661 long r_idx;
662
663 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
664 rx_ring = &(adapter->rx_ring[r_idx]);
665
666 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
667
668 /* If all Rx work done, exit the polling mode */
669 if (work_done < budget) {
670 napi_complete(napi);
671 if (adapter->itr_setting & 1)
672 ixgbevf_set_itr_msix(q_vector);
673 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
674 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
675 }
676
677 return work_done;
678}
679
680/**
681 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine
682 * @napi: napi struct with our devices info in it
683 * @budget: amount of work driver is allowed to do this pass, in packets
684 *
685 * This function will clean more than one rx queue associated with a
686 * q_vector.
687 **/
688static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
689{
690 struct ixgbevf_q_vector *q_vector =
691 container_of(napi, struct ixgbevf_q_vector, napi);
692 struct ixgbevf_adapter *adapter = q_vector->adapter;
693 struct ixgbevf_ring *rx_ring = NULL;
694 int work_done = 0, i;
695 long r_idx;
696 u64 enable_mask = 0;
697
698 /* attempt to distribute budget to each queue fairly, but don't allow
699 * the budget to go below 1 because we'll exit polling */
700 budget /= (q_vector->rxr_count ?: 1);
701 budget = max(budget, 1);
702 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
703 for (i = 0; i < q_vector->rxr_count; i++) {
704 rx_ring = &(adapter->rx_ring[r_idx]);
705 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
706 enable_mask |= rx_ring->v_idx;
707 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
708 r_idx + 1);
709 }
710
711#ifndef HAVE_NETDEV_NAPI_LIST
712 if (!netif_running(adapter->netdev))
713 work_done = 0;
714
715#endif
716 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
717 rx_ring = &(adapter->rx_ring[r_idx]);
718
719 /* If all Rx work done, exit the polling mode */
720 if (work_done < budget) {
721 napi_complete(napi);
722 if (adapter->itr_setting & 1)
723 ixgbevf_set_itr_msix(q_vector);
724 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
725 ixgbevf_irq_enable_queues(adapter, enable_mask);
726 }
727
728 return work_done;
729}
730
731
732/**
733 * ixgbevf_configure_msix - Configure MSI-X hardware
734 * @adapter: board private structure
735 *
736 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
737 * interrupts.
738 **/
739static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
740{
741 struct ixgbevf_q_vector *q_vector;
742 struct ixgbe_hw *hw = &adapter->hw;
743 int i, j, q_vectors, v_idx, r_idx;
744 u32 mask;
745
746 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
747
748 /*
749 * Populate the IVAR table and set the ITR values to the
750 * corresponding register.
751 */
752 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
753 q_vector = adapter->q_vector[v_idx];
984b3f57 754 /* XXX for_each_set_bit(...) */
92915f71
GR		 755 r_idx = find_first_bit(q_vector->rxr_idx,
756 adapter->num_rx_queues);
757
758 for (i = 0; i < q_vector->rxr_count; i++) {
759 j = adapter->rx_ring[r_idx].reg_idx;
760 ixgbevf_set_ivar(adapter, 0, j, v_idx);
761 r_idx = find_next_bit(q_vector->rxr_idx,
762 adapter->num_rx_queues,
763 r_idx + 1);
764 }
765 r_idx = find_first_bit(q_vector->txr_idx,
766 adapter->num_tx_queues);
767
768 for (i = 0; i < q_vector->txr_count; i++) {
769 j = adapter->tx_ring[r_idx].reg_idx;
770 ixgbevf_set_ivar(adapter, 1, j, v_idx);
771 r_idx = find_next_bit(q_vector->txr_idx,
772 adapter->num_tx_queues,
773 r_idx + 1);
774 }
775
776 /* if this is a tx only vector halve the interrupt rate */
777 if (q_vector->txr_count && !q_vector->rxr_count)
778 q_vector->eitr = (adapter->eitr_param >> 1);
779 else if (q_vector->rxr_count)
780 /* rx only */
781 q_vector->eitr = adapter->eitr_param;
782
783 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);
784 }
785
786 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
787
788 /* set up to autoclear timer, and the vectors */
789 mask = IXGBE_EIMS_ENABLE_MASK;
790 mask &= ~IXGBE_EIMS_OTHER;
791 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
792}
793
794enum latency_range {
795 lowest_latency = 0,
796 low_latency = 1,
797 bulk_latency = 2,
798 latency_invalid = 255
799};
800
801/**
802 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
803 * @adapter: pointer to adapter
804 * @eitr: eitr setting (ints per sec) to give last timeslice
805 * @itr_setting: current throttle rate in ints/second
806 * @packets: the number of packets during this measurement interval
807 * @bytes: the number of bytes during this measurement interval
808 *
809 * Stores a new ITR value based on packets and byte
810 * counts during the last interrupt. The advantage of per interrupt
811 * computation is faster updates and more accurate ITR for the current
812 * traffic pattern. Constants in this function were computed
813 * based on theoretical maximum wire speed and thresholds were set based
814 * on testing data as well as attempting to minimize response time
815 * while increasing bulk throughput.
816 **/
817static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter,
818 u32 eitr, u8 itr_setting,
819 int packets, int bytes)
820{
821 unsigned int retval = itr_setting;
822 u32 timepassed_us;
823 u64 bytes_perint;
824
825 if (packets == 0)
826 goto update_itr_done;
827
828
829 /* simple throttlerate management
830 * 0-20MB/s lowest (100000 ints/s)
831 * 20-100MB/s low (20000 ints/s)
832 * 100-1249MB/s bulk (8000 ints/s)
833 */
834 /* what was last interrupt timeslice? */
835 timepassed_us = 1000000/eitr;
836 bytes_perint = bytes / timepassed_us; /* bytes/usec */
837
838 switch (itr_setting) {
839 case lowest_latency:
840 if (bytes_perint > adapter->eitr_low)
841 retval = low_latency;
842 break;
843 case low_latency:
844 if (bytes_perint > adapter->eitr_high)
845 retval = bulk_latency;
846 else if (bytes_perint <= adapter->eitr_low)
847 retval = lowest_latency;
848 break;
849 case bulk_latency:
850 if (bytes_perint <= adapter->eitr_high)
851 retval = low_latency;
852 break;
853 }
854
855update_itr_done:
856 return retval;
857}
858
859/**
860 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
861 * @adapter: pointer to adapter struct
862 * @v_idx: vector index into q_vector array
863 * @itr_reg: new value to be written in *register* format, not ints/s
864 *
865 * This function is made to be called by ethtool and by the driver
866 * when it needs to update VTEITR registers at runtime. Hardware
867 * specific quirks/differences are taken care of here.
868 */
869static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
870 u32 itr_reg)
871{
872 struct ixgbe_hw *hw = &adapter->hw;
873
874 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg);
875
876 /*
877 * set the WDIS bit to not clear the timer bits and cause an
878 * immediate assertion of the interrupt
879 */
880 itr_reg |= IXGBE_EITR_CNT_WDIS;
881
882 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
883}
884
885static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
886{
887 struct ixgbevf_adapter *adapter = q_vector->adapter;
888 u32 new_itr;
889 u8 current_itr, ret_itr;
890 int i, r_idx, v_idx = q_vector->v_idx;
891 struct ixgbevf_ring *rx_ring, *tx_ring;
892
893 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
894 for (i = 0; i < q_vector->txr_count; i++) {
895 tx_ring = &(adapter->tx_ring[r_idx]);
896 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
897 q_vector->tx_itr,
898 tx_ring->total_packets,
899 tx_ring->total_bytes);
900 /* if the result for this queue would decrease interrupt
901 * rate for this vector then use that result */
902 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
903 q_vector->tx_itr - 1 : ret_itr);
904 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
905 r_idx + 1);
906 }
907
908 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
909 for (i = 0; i < q_vector->rxr_count; i++) {
910 rx_ring = &(adapter->rx_ring[r_idx]);
911 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
912 q_vector->rx_itr,
913 rx_ring->total_packets,
914 rx_ring->total_bytes);
915 /* if the result for this queue would decrease interrupt
916 * rate for this vector then use that result */
917 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
918 q_vector->rx_itr - 1 : ret_itr);
919 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
920 r_idx + 1);
921 }
922
923 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
924
925 switch (current_itr) {
926 /* counts and packets in update_itr are dependent on these numbers */
927 case lowest_latency:
928 new_itr = 100000;
929 break;
930 case low_latency:
931 new_itr = 20000; /* aka hwitr = ~200 */
932 break;
933 case bulk_latency:
934 default:
935 new_itr = 8000;
936 break;
937 }
938
939 if (new_itr != q_vector->eitr) {
940 u32 itr_reg;
941
942 /* save the algorithm value here, not the smoothed one */
943 q_vector->eitr = new_itr;
944 /* do an exponential smoothing */
945 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
946 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
947 ixgbevf_write_eitr(adapter, v_idx, itr_reg);
948 }
92915f71
GR		 949}
950
951static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
952{
953 struct net_device *netdev = data;
954 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
955 struct ixgbe_hw *hw = &adapter->hw;
956 u32 eicr;
a9ee25a2 957 u32 msg;
92915f71
GR		 958
959 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS);
960 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr);
961
08259594
GR		 962 if (!hw->mbx.ops.check_for_ack(hw)) {
963 /*
964 * checking for the ack clears the PFACK bit. Place
965 * it back in the v2p_mailbox cache so that anyone
966 * polling for an ack will not miss it. Also
967 * avoid the read below because the code to read
968 * the mailbox will also clear the ack bit. This was
969 * causing lost acks. Just cache the bit and exit
970 * the IRQ handler.
971 */
972 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK;
973 goto out;
974 }
975
976 /* Not an ack interrupt, go ahead and read the message */
a9ee25a2
GR		 977 hw->mbx.ops.read(hw, &msg, 1);
978
979 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
980 mod_timer(&adapter->watchdog_timer,
4c3a8223 981 round_jiffies(jiffies + 1));
a9ee25a2 982
08259594 983out:
92915f71
GR		 984 return IRQ_HANDLED;
985}
986
987static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
988{
989 struct ixgbevf_q_vector *q_vector = data;
990 struct ixgbevf_adapter *adapter = q_vector->adapter;
991 struct ixgbevf_ring *tx_ring;
992 int i, r_idx;
993
994 if (!q_vector->txr_count)
995 return IRQ_HANDLED;
996
997 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
998 for (i = 0; i < q_vector->txr_count; i++) {
999 tx_ring = &(adapter->tx_ring[r_idx]);
1000 tx_ring->total_bytes = 0;
1001 tx_ring->total_packets = 0;
1002 ixgbevf_clean_tx_irq(adapter, tx_ring);
1003 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1004 r_idx + 1);
1005 }
1006
1007 if (adapter->itr_setting & 1)
1008 ixgbevf_set_itr_msix(q_vector);
1009
1010 return IRQ_HANDLED;
1011}
1012
1013/**
1014 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1015 * @irq: unused
1016 * @data: pointer to our q_vector struct for this interrupt vector
1017 **/
1018static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
1019{
1020 struct ixgbevf_q_vector *q_vector = data;
1021 struct ixgbevf_adapter *adapter = q_vector->adapter;
1022 struct ixgbe_hw *hw = &adapter->hw;
1023 struct ixgbevf_ring *rx_ring;
1024 int r_idx;
1025 int i;
1026
1027 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1028 for (i = 0; i < q_vector->rxr_count; i++) {
1029 rx_ring = &(adapter->rx_ring[r_idx]);
1030 rx_ring->total_bytes = 0;
1031 rx_ring->total_packets = 0;
1032 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1033 r_idx + 1);
1034 }
1035
1036 if (!q_vector->rxr_count)
1037 return IRQ_HANDLED;
1038
1039 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1040 rx_ring = &(adapter->rx_ring[r_idx]);
1041 /* disable interrupts on this vector only */
1042 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
1043 napi_schedule(&q_vector->napi);
1044
1045
1046 return IRQ_HANDLED;
1047}
1048
1049static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data)
1050{
1051 ixgbevf_msix_clean_rx(irq, data);
1052 ixgbevf_msix_clean_tx(irq, data);
1053
1054 return IRQ_HANDLED;
1055}
1056
1057static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1058 int r_idx)
1059{
1060 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1061
1062 set_bit(r_idx, q_vector->rxr_idx);
1063 q_vector->rxr_count++;
1064 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1065}
1066
1067static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1068 int t_idx)
1069{
1070 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1071
1072 set_bit(t_idx, q_vector->txr_idx);
1073 q_vector->txr_count++;
1074 a->tx_ring[t_idx].v_idx = 1 << v_idx;
1075}
1076
1077/**
1078 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1079 * @adapter: board private structure to initialize
1080 *
1081 * This function maps descriptor rings to the queue-specific vectors
1082 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1083 * one vector per ring/queue, but on a constrained vector budget, we
1084 * group the rings as "efficiently" as possible. You would add new
1085 * mapping configurations in here.
1086 **/
1087static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1088{
1089 int q_vectors;
1090 int v_start = 0;
1091 int rxr_idx = 0, txr_idx = 0;
1092 int rxr_remaining = adapter->num_rx_queues;
1093 int txr_remaining = adapter->num_tx_queues;
1094 int i, j;
1095 int rqpv, tqpv;
1096 int err = 0;
1097
1098 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1099
1100 /*
1101 * The ideal configuration...
1102 * We have enough vectors to map one per queue.
1103 */
1104 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1105 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1106 map_vector_to_rxq(adapter, v_start, rxr_idx);
1107
1108 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1109 map_vector_to_txq(adapter, v_start, txr_idx);
1110 goto out;
1111 }
1112
1113 /*
1114 * If we don't have enough vectors for a 1-to-1
1115 * mapping, we'll have to group them so there are
1116 * multiple queues per vector.
1117 */
1118 /* Re-adjusting *qpv takes care of the remainder. */
1119 for (i = v_start; i < q_vectors; i++) {
1120 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1121 for (j = 0; j < rqpv; j++) {
1122 map_vector_to_rxq(adapter, i, rxr_idx);
1123 rxr_idx++;
1124 rxr_remaining--;
1125 }
1126 }
1127 for (i = v_start; i < q_vectors; i++) {
1128 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1129 for (j = 0; j < tqpv; j++) {
1130 map_vector_to_txq(adapter, i, txr_idx);
1131 txr_idx++;
1132 txr_remaining--;
1133 }
1134 }
1135
1136out:
1137 return err;
1138}
1139
1140/**
1141 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1142 * @adapter: board private structure
1143 *
1144 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1145 * interrupts from the kernel.
1146 **/
1147static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1148{
1149 struct net_device *netdev = adapter->netdev;
1150 irqreturn_t (*handler)(int, void *);
1151 int i, vector, q_vectors, err;
1152 int ri = 0, ti = 0;
1153
1154 /* Decrement for Other and TCP Timer vectors */
1155 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1156
1157#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
1158 ? &ixgbevf_msix_clean_many : \
1159 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
1160 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \
1161 NULL)
1162 for (vector = 0; vector < q_vectors; vector++) {
1163 handler = SET_HANDLER(adapter->q_vector[vector]);
1164
1165 if (handler == &ixgbevf_msix_clean_rx) {
1166 sprintf(adapter->name[vector], "%s-%s-%d",
1167 netdev->name, "rx", ri++);
1168 } else if (handler == &ixgbevf_msix_clean_tx) {
1169 sprintf(adapter->name[vector], "%s-%s-%d",
1170 netdev->name, "tx", ti++);
1171 } else if (handler == &ixgbevf_msix_clean_many) {
1172 sprintf(adapter->name[vector], "%s-%s-%d",
1173 netdev->name, "TxRx", vector);
1174 } else {
1175 /* skip this unused q_vector */
1176 continue;
1177 }
1178 err = request_irq(adapter->msix_entries[vector].vector,
1179 handler, 0, adapter->name[vector],
1180 adapter->q_vector[vector]);
1181 if (err) {
1182 hw_dbg(&adapter->hw,
1183 "request_irq failed for MSIX interrupt "
1184 "Error: %d\n", err);
1185 goto free_queue_irqs;
1186 }
1187 }
1188
1189 sprintf(adapter->name[vector], "%s:mbx", netdev->name);
1190 err = request_irq(adapter->msix_entries[vector].vector,
1191 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev);
1192 if (err) {
1193 hw_dbg(&adapter->hw,
1194 "request_irq for msix_mbx failed: %d\n", err);
1195 goto free_queue_irqs;
1196 }
1197
1198 return 0;
1199
1200free_queue_irqs:
1201 for (i = vector - 1; i >= 0; i--)
1202 free_irq(adapter->msix_entries[--vector].vector,
1203 &(adapter->q_vector[i]));
1204 pci_disable_msix(adapter->pdev);
1205 kfree(adapter->msix_entries);
1206 adapter->msix_entries = NULL;
1207 return err;
1208}
1209
1210static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1211{
1212 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1213
1214 for (i = 0; i < q_vectors; i++) {
1215 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1216 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1217 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1218 q_vector->rxr_count = 0;
1219 q_vector->txr_count = 0;
1220 q_vector->eitr = adapter->eitr_param;
1221 }
1222}
1223
1224/**
1225 * ixgbevf_request_irq - initialize interrupts
1226 * @adapter: board private structure
1227 *
1228 * Attempts to configure interrupts using the best available
1229 * capabilities of the hardware and kernel.
1230 **/
1231static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1232{
1233 int err = 0;
1234
1235 err = ixgbevf_request_msix_irqs(adapter);
1236
1237 if (err)
1238 hw_dbg(&adapter->hw,
1239 "request_irq failed, Error %d\n", err);
1240
1241 return err;
1242}
1243
1244static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1245{
1246 struct net_device *netdev = adapter->netdev;
1247 int i, q_vectors;
1248
1249 q_vectors = adapter->num_msix_vectors;
1250
1251 i = q_vectors - 1;
1252
1253 free_irq(adapter->msix_entries[i].vector, netdev);
1254 i--;
1255
1256 for (; i >= 0; i--) {
1257 free_irq(adapter->msix_entries[i].vector,
1258 adapter->q_vector[i]);
1259 }
1260
1261 ixgbevf_reset_q_vectors(adapter);
1262}
1263
1264/**
1265 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1266 * @adapter: board private structure
1267 **/
1268static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1269{
1270 int i;
1271 struct ixgbe_hw *hw = &adapter->hw;
1272
1273 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1274
1275 IXGBE_WRITE_FLUSH(hw);
1276
1277 for (i = 0; i < adapter->num_msix_vectors; i++)
1278 synchronize_irq(adapter->msix_entries[i].vector);
1279}
1280
1281/**
1282 * ixgbevf_irq_enable - Enable default interrupt generation settings
1283 * @adapter: board private structure
1284 **/
1285static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter,
1286 bool queues, bool flush)
1287{
1288 struct ixgbe_hw *hw = &adapter->hw;
1289 u32 mask;
1290 u64 qmask;
1291
1292 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1293 qmask = ~0;
1294
1295 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
1296
1297 if (queues)
1298 ixgbevf_irq_enable_queues(adapter, qmask);
1299
1300 if (flush)
1301 IXGBE_WRITE_FLUSH(hw);
1302}
1303
1304/**
1305 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1306 * @adapter: board private structure
1307 *
1308 * Configure the Tx unit of the MAC after a reset.
1309 **/
1310static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1311{
1312 u64 tdba;
1313 struct ixgbe_hw *hw = &adapter->hw;
1314 u32 i, j, tdlen, txctrl;
1315
1316 /* Setup the HW Tx Head and Tail descriptor pointers */
1317 for (i = 0; i < adapter->num_tx_queues; i++) {
1318 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1319 j = ring->reg_idx;
1320 tdba = ring->dma;
1321 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1322 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1323 (tdba & DMA_BIT_MASK(32)));
1324 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1325 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1326 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1327 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1328 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1329 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1330 /* Disable Tx Head Writeback RO bit, since this hoses
1331 * bookkeeping if things aren't delivered in order.
1332 */
1333 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1334 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1335 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1336 }
1337}
1338
1339#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1340
1341static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1342{
1343 struct ixgbevf_ring *rx_ring;
1344 struct ixgbe_hw *hw = &adapter->hw;
1345 u32 srrctl;
1346
1347 rx_ring = &adapter->rx_ring[index];
1348
1349 srrctl = IXGBE_SRRCTL_DROP_EN;
1350
1351 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1352 u16 bufsz = IXGBEVF_RXBUFFER_2048;
1353 /* grow the amount we can receive on large page machines */
1354 if (bufsz < (PAGE_SIZE / 2))
1355 bufsz = (PAGE_SIZE / 2);
1356 /* cap the bufsz at our largest descriptor size */
1357 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz);
1358
1359 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1360 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1361 srrctl |= ((IXGBEVF_RX_HDR_SIZE <<
1362 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1363 IXGBE_SRRCTL_BSIZEHDR_MASK);
1364 } else {
1365 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1366
1367 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1368 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1369 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1370 else
1371 srrctl |= rx_ring->rx_buf_len >>
1372 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1373 }
1374 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1375}
1376
1377/**
1378 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1379 * @adapter: board private structure
1380 *
1381 * Configure the Rx unit of the MAC after a reset.
1382 **/
1383static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1384{
1385 u64 rdba;
1386 struct ixgbe_hw *hw = &adapter->hw;
1387 struct net_device *netdev = adapter->netdev;
1388 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1389 int i, j;
1390 u32 rdlen;
1391 int rx_buf_len;
1392
1393 /* Decide whether to use packet split mode or not */
1394 if (netdev->mtu > ETH_DATA_LEN) {
1395 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE)
1396 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1397 else
1398 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1399 } else {
1400 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE)
1401 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1402 else
1403 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1404 }
1405
1406 /* Set the RX buffer length according to the mode */
1407 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1408 /* PSRTYPE must be initialized in 82599 */
1409 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1410 IXGBE_PSRTYPE_UDPHDR |
1411 IXGBE_PSRTYPE_IPV4HDR |
1412 IXGBE_PSRTYPE_IPV6HDR |
1413 IXGBE_PSRTYPE_L2HDR;
1414 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1415 rx_buf_len = IXGBEVF_RX_HDR_SIZE;
1416 } else {
1417 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1418 if (netdev->mtu <= ETH_DATA_LEN)
1419 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1420 else
1421 rx_buf_len = ALIGN(max_frame, 1024);
1422 }
1423
1424 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1425 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1426 * the Base and Length of the Rx Descriptor Ring */
1427 for (i = 0; i < adapter->num_rx_queues; i++) {
1428 rdba = adapter->rx_ring[i].dma;
1429 j = adapter->rx_ring[i].reg_idx;
1430 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1431 (rdba & DMA_BIT_MASK(32)));
1432 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1433 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1434 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1435 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1436 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1437 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1438 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1439
1440 ixgbevf_configure_srrctl(adapter, j);
1441 }
1442}
1443
1444static void ixgbevf_vlan_rx_register(struct net_device *netdev,
1445 struct vlan_group *grp)
1446{
1447 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1448 struct ixgbe_hw *hw = &adapter->hw;
1449 int i, j;
1450 u32 ctrl;
1451
1452 adapter->vlgrp = grp;
1453
1454 for (i = 0; i < adapter->num_rx_queues; i++) {
1455 j = adapter->rx_ring[i].reg_idx;
1456 ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1457 ctrl |= IXGBE_RXDCTL_VME;
1458 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), ctrl);
1459 }
1460}
1461
1462static void ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1463{
1464 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1465 struct ixgbe_hw *hw = &adapter->hw;
1466 struct net_device *v_netdev;
1467
1468 /* add VID to filter table */
1469 if (hw->mac.ops.set_vfta)
1470 hw->mac.ops.set_vfta(hw, vid, 0, true);
1471 /*
1472 * Copy feature flags from netdev to the vlan netdev for this vid.
1473 * This allows things like TSO to bubble down to our vlan device.
1474 */
1475 v_netdev = vlan_group_get_device(adapter->vlgrp, vid);
1476 v_netdev->features |= adapter->netdev->features;
1477 vlan_group_set_device(adapter->vlgrp, vid, v_netdev);
1478}
1479
1480static void ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1481{
1482 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1483 struct ixgbe_hw *hw = &adapter->hw;
1484
1485 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1486 ixgbevf_irq_disable(adapter);
1487
1488 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1489
1490 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1491 ixgbevf_irq_enable(adapter, true, true);
1492
1493 /* remove VID from filter table */
1494 if (hw->mac.ops.set_vfta)
1495 hw->mac.ops.set_vfta(hw, vid, 0, false);
1496}
1497
1498static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1499{
1500 ixgbevf_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1501
1502 if (adapter->vlgrp) {
1503 u16 vid;
1504 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1505 if (!vlan_group_get_device(adapter->vlgrp, vid))
1506 continue;
1507 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
1508 }
1509 }
1510}
1511
92915f71
GR		 1512/**
1513 * ixgbevf_set_rx_mode - Multicast set
1514 * @netdev: network interface device structure
1515 *
1516 * The set_rx_method entry point is called whenever the multicast address
1517 * list or the network interface flags are updated. This routine is
1518 * responsible for configuring the hardware for proper multicast mode.
1519 **/
1520static void ixgbevf_set_rx_mode(struct net_device *netdev)
1521{
1522 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1523 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1524
1525 /* reprogram multicast list */
92915f71 1526 if (hw->mac.ops.update_mc_addr_list)
5c58c47a 1527 hw->mac.ops.update_mc_addr_list(hw, netdev);
92915f71
GR		 1528}
1529
1530static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1531{
1532 int q_idx;
1533 struct ixgbevf_q_vector *q_vector;
1534 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1535
1536 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1537 struct napi_struct *napi;
1538 q_vector = adapter->q_vector[q_idx];
1539 if (!q_vector->rxr_count)
1540 continue;
1541 napi = &q_vector->napi;
1542 if (q_vector->rxr_count > 1)
1543 napi->poll = &ixgbevf_clean_rxonly_many;
1544
1545 napi_enable(napi);
1546 }
1547}
1548
1549static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1550{
1551 int q_idx;
1552 struct ixgbevf_q_vector *q_vector;
1553 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1554
1555 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1556 q_vector = adapter->q_vector[q_idx];
1557 if (!q_vector->rxr_count)
1558 continue;
1559 napi_disable(&q_vector->napi);
1560 }
1561}
1562
1563static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1564{
1565 struct net_device *netdev = adapter->netdev;
1566 int i;
1567
1568 ixgbevf_set_rx_mode(netdev);
1569
1570 ixgbevf_restore_vlan(adapter);
1571
1572 ixgbevf_configure_tx(adapter);
1573 ixgbevf_configure_rx(adapter);
1574 for (i = 0; i < adapter->num_rx_queues; i++) {
1575 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
1576 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count);
1577 ring->next_to_use = ring->count - 1;
1578 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail);
1579 }
1580}
1581
1582#define IXGBE_MAX_RX_DESC_POLL 10
1583static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1584 int rxr)
1585{
1586 struct ixgbe_hw *hw = &adapter->hw;
1587 int j = adapter->rx_ring[rxr].reg_idx;
1588 int k;
1589
1590 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1591 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1592 break;
1593 else
1594 msleep(1);
1595 }
1596 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1597 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1598 "not set within the polling period\n", rxr);
1599 }
1600
1601 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1602 (adapter->rx_ring[rxr].count - 1));
1603}
1604
33bd9f60
GR		 1605static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1606{
1607 /* Only save pre-reset stats if there are some */
1608 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1609 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1610 adapter->stats.base_vfgprc;
1611 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1612 adapter->stats.base_vfgptc;
1613 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1614 adapter->stats.base_vfgorc;
1615 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1616 adapter->stats.base_vfgotc;
1617 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1618 adapter->stats.base_vfmprc;
1619 }
1620}
1621
1622static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1623{
1624 struct ixgbe_hw *hw = &adapter->hw;
1625
1626 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1627 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1628 adapter->stats.last_vfgorc |=
1629 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1630 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1631 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1632 adapter->stats.last_vfgotc |=
1633 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1634 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1635
1636 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1637 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1638 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1639 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1640 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1641}
1642
92915f71
GR		 1643static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1644{
1645 struct net_device *netdev = adapter->netdev;
1646 struct ixgbe_hw *hw = &adapter->hw;
1647 int i, j = 0;
1648 int num_rx_rings = adapter->num_rx_queues;
1649 u32 txdctl, rxdctl;
1650
1651 for (i = 0; i < adapter->num_tx_queues; i++) {
1652 j = adapter->tx_ring[i].reg_idx;
1653 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1654 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1655 txdctl |= (8 << 16);
1656 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1657 }
1658
1659 for (i = 0; i < adapter->num_tx_queues; i++) {
1660 j = adapter->tx_ring[i].reg_idx;
1661 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1662 txdctl |= IXGBE_TXDCTL_ENABLE;
1663 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1664 }
1665
1666 for (i = 0; i < num_rx_rings; i++) {
1667 j = adapter->rx_ring[i].reg_idx;
1668 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1669 rxdctl |= IXGBE_RXDCTL_ENABLE;
1670 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1671 ixgbevf_rx_desc_queue_enable(adapter, i);
1672 }
1673
1674 ixgbevf_configure_msix(adapter);
1675
1676 if (hw->mac.ops.set_rar) {
1677 if (is_valid_ether_addr(hw->mac.addr))
1678 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1679 else
1680 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1681 }
1682
1683 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1684 ixgbevf_napi_enable_all(adapter);
1685
1686 /* enable transmits */
1687 netif_tx_start_all_queues(netdev);
1688
33bd9f60
GR		 1689 ixgbevf_save_reset_stats(adapter);
1690 ixgbevf_init_last_counter_stats(adapter);
1691
92915f71
GR		 1692 /* bring the link up in the watchdog, this could race with our first
1693 * link up interrupt but shouldn't be a problem */
1694 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1695 adapter->link_check_timeout = jiffies;
1696 mod_timer(&adapter->watchdog_timer, jiffies);
1697 return 0;
1698}
1699
1700int ixgbevf_up(struct ixgbevf_adapter *adapter)
1701{
1702 int err;
1703 struct ixgbe_hw *hw = &adapter->hw;
1704
1705 ixgbevf_configure(adapter);
1706
1707 err = ixgbevf_up_complete(adapter);
1708
1709 /* clear any pending interrupts, may auto mask */
1710 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1711
1712 ixgbevf_irq_enable(adapter, true, true);
1713
1714 return err;
1715}
1716
1717/**
1718 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1719 * @adapter: board private structure
1720 * @rx_ring: ring to free buffers from
1721 **/
1722static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1723 struct ixgbevf_ring *rx_ring)
1724{
1725 struct pci_dev *pdev = adapter->pdev;
1726 unsigned long size;
1727 unsigned int i;
1728
c0456c23
GR		 1729 if (!rx_ring->rx_buffer_info)
1730 return;
92915f71 1731
c0456c23 1732 /* Free all the Rx ring sk_buffs */
92915f71
GR		 1733 for (i = 0; i < rx_ring->count; i++) {
1734 struct ixgbevf_rx_buffer *rx_buffer_info;
1735
1736 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1737 if (rx_buffer_info->dma) {
2a1f8794 1738 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 1739 rx_ring->rx_buf_len,
2a1f8794 1740 DMA_FROM_DEVICE);
92915f71
GR		 1741 rx_buffer_info->dma = 0;
1742 }
1743 if (rx_buffer_info->skb) {
1744 struct sk_buff *skb = rx_buffer_info->skb;
1745 rx_buffer_info->skb = NULL;
1746 do {
1747 struct sk_buff *this = skb;
1748 skb = skb->prev;
1749 dev_kfree_skb(this);
1750 } while (skb);
1751 }
1752 if (!rx_buffer_info->page)
1753 continue;
2a1f8794
NN		 1754 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
1755 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 1756 rx_buffer_info->page_dma = 0;
1757 put_page(rx_buffer_info->page);
1758 rx_buffer_info->page = NULL;
1759 rx_buffer_info->page_offset = 0;
1760 }
1761
1762 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1763 memset(rx_ring->rx_buffer_info, 0, size);
1764
1765 /* Zero out the descriptor ring */
1766 memset(rx_ring->desc, 0, rx_ring->size);
1767
1768 rx_ring->next_to_clean = 0;
1769 rx_ring->next_to_use = 0;
1770
1771 if (rx_ring->head)
1772 writel(0, adapter->hw.hw_addr + rx_ring->head);
1773 if (rx_ring->tail)
1774 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1775}
1776
1777/**
1778 * ixgbevf_clean_tx_ring - Free Tx Buffers
1779 * @adapter: board private structure
1780 * @tx_ring: ring to be cleaned
1781 **/
1782static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1783 struct ixgbevf_ring *tx_ring)
1784{
1785 struct ixgbevf_tx_buffer *tx_buffer_info;
1786 unsigned long size;
1787 unsigned int i;
1788
c0456c23
GR		 1789 if (!tx_ring->tx_buffer_info)
1790 return;
1791
92915f71
GR		 1792 /* Free all the Tx ring sk_buffs */
1793
1794 for (i = 0; i < tx_ring->count; i++) {
1795 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1796 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1797 }
1798
1799 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1800 memset(tx_ring->tx_buffer_info, 0, size);
1801
1802 memset(tx_ring->desc, 0, tx_ring->size);
1803
1804 tx_ring->next_to_use = 0;
1805 tx_ring->next_to_clean = 0;
1806
1807 if (tx_ring->head)
1808 writel(0, adapter->hw.hw_addr + tx_ring->head);
1809 if (tx_ring->tail)
1810 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1811}
1812
1813/**
1814 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1815 * @adapter: board private structure
1816 **/
1817static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1818{
1819 int i;
1820
1821 for (i = 0; i < adapter->num_rx_queues; i++)
1822 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1823}
1824
1825/**
1826 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1827 * @adapter: board private structure
1828 **/
1829static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1830{
1831 int i;
1832
1833 for (i = 0; i < adapter->num_tx_queues; i++)
1834 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1835}
1836
1837void ixgbevf_down(struct ixgbevf_adapter *adapter)
1838{
1839 struct net_device *netdev = adapter->netdev;
1840 struct ixgbe_hw *hw = &adapter->hw;
1841 u32 txdctl;
1842 int i, j;
1843
1844 /* signal that we are down to the interrupt handler */
1845 set_bit(__IXGBEVF_DOWN, &adapter->state);
1846 /* disable receives */
1847
1848 netif_tx_disable(netdev);
1849
1850 msleep(10);
1851
1852 netif_tx_stop_all_queues(netdev);
1853
1854 ixgbevf_irq_disable(adapter);
1855
1856 ixgbevf_napi_disable_all(adapter);
1857
1858 del_timer_sync(&adapter->watchdog_timer);
1859 /* can't call flush scheduled work here because it can deadlock
1860 * if linkwatch_event tries to acquire the rtnl_lock which we are
1861 * holding */
1862 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1863 msleep(1);
1864
1865 /* disable transmits in the hardware now that interrupts are off */
1866 for (i = 0; i < adapter->num_tx_queues; i++) {
1867 j = adapter->tx_ring[i].reg_idx;
1868 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1869 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1870 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1871 }
1872
1873 netif_carrier_off(netdev);
1874
1875 if (!pci_channel_offline(adapter->pdev))
1876 ixgbevf_reset(adapter);
1877
1878 ixgbevf_clean_all_tx_rings(adapter);
1879 ixgbevf_clean_all_rx_rings(adapter);
1880}
1881
1882void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1883{
c0456c23
GR		 1884 struct ixgbe_hw *hw = &adapter->hw;
1885
92915f71 1886 WARN_ON(in_interrupt());
c0456c23 1887
92915f71
GR		 1888 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1889 msleep(1);
1890
c0456c23
GR		 1891 /*
1892 * Check if PF is up before re-init. If not then skip until
1893 * later when the PF is up and ready to service requests from
1894 * the VF via mailbox. If the VF is up and running then the
1895 * watchdog task will continue to schedule reset tasks until
1896 * the PF is up and running.
1897 */
1898 if (!hw->mac.ops.reset_hw(hw)) {
1899 ixgbevf_down(adapter);
1900 ixgbevf_up(adapter);
1901 }
92915f71
GR		 1902
1903 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1904}
1905
1906void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1907{
1908 struct ixgbe_hw *hw = &adapter->hw;
1909 struct net_device *netdev = adapter->netdev;
1910
1911 if (hw->mac.ops.reset_hw(hw))
1912 hw_dbg(hw, "PF still resetting\n");
1913 else
1914 hw->mac.ops.init_hw(hw);
1915
1916 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1917 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1918 netdev->addr_len);
1919 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1920 netdev->addr_len);
1921 }
1922}
1923
1924static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1925 int vectors)
1926{
1927 int err, vector_threshold;
1928
1929 /* We'll want at least 3 (vector_threshold):
1930 * 1) TxQ[0] Cleanup
1931 * 2) RxQ[0] Cleanup
1932 * 3) Other (Link Status Change, etc.)
1933 */
1934 vector_threshold = MIN_MSIX_COUNT;
1935
1936 /* The more we get, the more we will assign to Tx/Rx Cleanup
1937 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1938 * Right now, we simply care about how many we'll get; we'll
1939 * set them up later while requesting irq's.
1940 */
1941 while (vectors >= vector_threshold) {
1942 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1943 vectors);
1944 if (!err) /* Success in acquiring all requested vectors. */
1945 break;
1946 else if (err < 0)
1947 vectors = 0; /* Nasty failure, quit now */
1948 else /* err == number of vectors we should try again with */
1949 vectors = err;
1950 }
1951
1952 if (vectors < vector_threshold) {
1953 /* Can't allocate enough MSI-X interrupts? Oh well.
1954 * This just means we'll go with either a single MSI
1955 * vector or fall back to legacy interrupts.
1956 */
1957 hw_dbg(&adapter->hw,
1958 "Unable to allocate MSI-X interrupts\n");
1959 kfree(adapter->msix_entries);
1960 adapter->msix_entries = NULL;
1961 } else {
1962 /*
1963 * Adjust for only the vectors we'll use, which is minimum
1964 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1965 * vectors we were allocated.
1966 */
1967 adapter->num_msix_vectors = vectors;
1968 }
1969}
1970
1971/*
1972 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
1973 * @adapter: board private structure to initialize
1974 *
1975 * This is the top level queue allocation routine. The order here is very
1976 * important, starting with the "most" number of features turned on at once,
1977 * and ending with the smallest set of features. This way large combinations
1978 * can be allocated if they're turned on, and smaller combinations are the
1979 * fallthrough conditions.
1980 *
1981 **/
1982static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1983{
1984 /* Start with base case */
1985 adapter->num_rx_queues = 1;
1986 adapter->num_tx_queues = 1;
1987 adapter->num_rx_pools = adapter->num_rx_queues;
1988 adapter->num_rx_queues_per_pool = 1;
1989}
1990
1991/**
1992 * ixgbevf_alloc_queues - Allocate memory for all rings
1993 * @adapter: board private structure to initialize
1994 *
1995 * We allocate one ring per queue at run-time since we don't know the
1996 * number of queues at compile-time. The polling_netdev array is
1997 * intended for Multiqueue, but should work fine with a single queue.
1998 **/
1999static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
2000{
2001 int i;
2002
2003 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2004 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2005 if (!adapter->tx_ring)
2006 goto err_tx_ring_allocation;
2007
2008 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2009 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2010 if (!adapter->rx_ring)
2011 goto err_rx_ring_allocation;
2012
2013 for (i = 0; i < adapter->num_tx_queues; i++) {
2014 adapter->tx_ring[i].count = adapter->tx_ring_count;
2015 adapter->tx_ring[i].queue_index = i;
2016 adapter->tx_ring[i].reg_idx = i;
2017 }
2018
2019 for (i = 0; i < adapter->num_rx_queues; i++) {
2020 adapter->rx_ring[i].count = adapter->rx_ring_count;
2021 adapter->rx_ring[i].queue_index = i;
2022 adapter->rx_ring[i].reg_idx = i;
2023 }
2024
2025 return 0;
2026
2027err_rx_ring_allocation:
2028 kfree(adapter->tx_ring);
2029err_tx_ring_allocation:
2030 return -ENOMEM;
2031}
2032
2033/**
2034 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2035 * @adapter: board private structure to initialize
2036 *
2037 * Attempt to configure the interrupts using the best available
2038 * capabilities of the hardware and the kernel.
2039 **/
2040static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2041{
2042 int err = 0;
2043 int vector, v_budget;
2044
2045 /*
2046 * It's easy to be greedy for MSI-X vectors, but it really
2047 * doesn't do us much good if we have a lot more vectors
2048 * than CPU's. So let's be conservative and only ask for
2049 * (roughly) twice the number of vectors as there are CPU's.
2050 */
2051 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2052 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2053
2054 /* A failure in MSI-X entry allocation isn't fatal, but it does
2055 * mean we disable MSI-X capabilities of the adapter. */
2056 adapter->msix_entries = kcalloc(v_budget,
2057 sizeof(struct msix_entry), GFP_KERNEL);
2058 if (!adapter->msix_entries) {
2059 err = -ENOMEM;
2060 goto out;
2061 }
2062
2063 for (vector = 0; vector < v_budget; vector++)
2064 adapter->msix_entries[vector].entry = vector;
2065
2066 ixgbevf_acquire_msix_vectors(adapter, v_budget);
2067
2068out:
2069 return err;
2070}
2071
2072/**
2073 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2074 * @adapter: board private structure to initialize
2075 *
2076 * We allocate one q_vector per queue interrupt. If allocation fails we
2077 * return -ENOMEM.
2078 **/
2079static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2080{
2081 int q_idx, num_q_vectors;
2082 struct ixgbevf_q_vector *q_vector;
2083 int napi_vectors;
2084 int (*poll)(struct napi_struct *, int);
2085
2086 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2087 napi_vectors = adapter->num_rx_queues;
2088 poll = &ixgbevf_clean_rxonly;
2089
2090 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2091 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2092 if (!q_vector)
2093 goto err_out;
2094 q_vector->adapter = adapter;
2095 q_vector->v_idx = q_idx;
2096 q_vector->eitr = adapter->eitr_param;
2097 if (q_idx < napi_vectors)
2098 netif_napi_add(adapter->netdev, &q_vector->napi,
2099 (*poll), 64);
2100 adapter->q_vector[q_idx] = q_vector;
2101 }
2102
2103 return 0;
2104
2105err_out:
2106 while (q_idx) {
2107 q_idx--;
2108 q_vector = adapter->q_vector[q_idx];
2109 netif_napi_del(&q_vector->napi);
2110 kfree(q_vector);
2111 adapter->q_vector[q_idx] = NULL;
2112 }
2113 return -ENOMEM;
2114}
2115
2116/**
2117 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2118 * @adapter: board private structure to initialize
2119 *
2120 * This function frees the memory allocated to the q_vectors. In addition if
2121 * NAPI is enabled it will delete any references to the NAPI struct prior
2122 * to freeing the q_vector.
2123 **/
2124static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2125{
2126 int q_idx, num_q_vectors;
2127 int napi_vectors;
2128
2129 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2130 napi_vectors = adapter->num_rx_queues;
2131
2132 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2133 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2134
2135 adapter->q_vector[q_idx] = NULL;
2136 if (q_idx < napi_vectors)
2137 netif_napi_del(&q_vector->napi);
2138 kfree(q_vector);
2139 }
2140}
2141
2142/**
2143 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2144 * @adapter: board private structure
2145 *
2146 **/
2147static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2148{
2149 pci_disable_msix(adapter->pdev);
2150 kfree(adapter->msix_entries);
2151 adapter->msix_entries = NULL;
92915f71
GR		 2152}
2153
2154/**
2155 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2156 * @adapter: board private structure to initialize
2157 *
2158 **/
2159static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2160{
2161 int err;
2162
2163 /* Number of supported queues */
2164 ixgbevf_set_num_queues(adapter);
2165
2166 err = ixgbevf_set_interrupt_capability(adapter);
2167 if (err) {
2168 hw_dbg(&adapter->hw,
2169 "Unable to setup interrupt capabilities\n");
2170 goto err_set_interrupt;
2171 }
2172
2173 err = ixgbevf_alloc_q_vectors(adapter);
2174 if (err) {
2175 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2176 "vectors\n");
2177 goto err_alloc_q_vectors;
2178 }
2179
2180 err = ixgbevf_alloc_queues(adapter);
2181 if (err) {
2182 printk(KERN_ERR "Unable to allocate memory for queues\n");
2183 goto err_alloc_queues;
2184 }
2185
2186 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2187 "Tx Queue count = %u\n",
2188 (adapter->num_rx_queues > 1) ? "Enabled" :
2189 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2190
2191 set_bit(__IXGBEVF_DOWN, &adapter->state);
2192
2193 return 0;
2194err_alloc_queues:
2195 ixgbevf_free_q_vectors(adapter);
2196err_alloc_q_vectors:
2197 ixgbevf_reset_interrupt_capability(adapter);
2198err_set_interrupt:
2199 return err;
2200}
2201
2202/**
2203 * ixgbevf_sw_init - Initialize general software structures
2204 * (struct ixgbevf_adapter)
2205 * @adapter: board private structure to initialize
2206 *
2207 * ixgbevf_sw_init initializes the Adapter private data structure.
2208 * Fields are initialized based on PCI device information and
2209 * OS network device settings (MTU size).
2210 **/
2211static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2212{
2213 struct ixgbe_hw *hw = &adapter->hw;
2214 struct pci_dev *pdev = adapter->pdev;
2215 int err;
2216
2217 /* PCI config space info */
2218
2219 hw->vendor_id = pdev->vendor;
2220 hw->device_id = pdev->device;
2221 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
2222 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2223 hw->subsystem_device_id = pdev->subsystem_device;
2224
2225 hw->mbx.ops.init_params(hw);
2226 hw->mac.max_tx_queues = MAX_TX_QUEUES;
2227 hw->mac.max_rx_queues = MAX_RX_QUEUES;
2228 err = hw->mac.ops.reset_hw(hw);
2229 if (err) {
2230 dev_info(&pdev->dev,
2231 "PF still in reset state, assigning new address\n");
2c6952df 2232 dev_hw_addr_random(adapter->netdev, hw->mac.addr);
92915f71
GR		 2233 } else {
2234 err = hw->mac.ops.init_hw(hw);
2235 if (err) {
2236 printk(KERN_ERR "init_shared_code failed: %d\n", err);
2237 goto out;
2238 }
2239 }
2240
2241 /* Enable dynamic interrupt throttling rates */
2242 adapter->eitr_param = 20000;
2243 adapter->itr_setting = 1;
2244
2245 /* set defaults for eitr in MegaBytes */
2246 adapter->eitr_low = 10;
2247 adapter->eitr_high = 20;
2248
2249 /* set default ring sizes */
2250 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2251 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2252
2253 /* enable rx csum by default */
2254 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2255
2256 set_bit(__IXGBEVF_DOWN, &adapter->state);
2257
2258out:
2259 return err;
2260}
2261
92915f71
GR		 2262#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2263 { \
2264 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2265 if (current_counter < last_counter) \
2266 counter += 0x100000000LL; \
2267 last_counter = current_counter; \
2268 counter &= 0xFFFFFFFF00000000LL; \
2269 counter |= current_counter; \
2270 }
2271
2272#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2273 { \
2274 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2275 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2276 u64 current_counter = (current_counter_msb << 32) | \
2277 current_counter_lsb; \
2278 if (current_counter < last_counter) \
2279 counter += 0x1000000000LL; \
2280 last_counter = current_counter; \
2281 counter &= 0xFFFFFFF000000000LL; \
2282 counter |= current_counter; \
2283 }
2284/**
2285 * ixgbevf_update_stats - Update the board statistics counters.
2286 * @adapter: board private structure
2287 **/
2288void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2289{
2290 struct ixgbe_hw *hw = &adapter->hw;
2291
2292 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2293 adapter->stats.vfgprc);
2294 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2295 adapter->stats.vfgptc);
2296 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2297 adapter->stats.last_vfgorc,
2298 adapter->stats.vfgorc);
2299 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2300 adapter->stats.last_vfgotc,
2301 adapter->stats.vfgotc);
2302 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2303 adapter->stats.vfmprc);
2304
2305 /* Fill out the OS statistics structure */
2306 adapter->net_stats.multicast = adapter->stats.vfmprc -
2307 adapter->stats.base_vfmprc;
2308}
2309
2310/**
2311 * ixgbevf_watchdog - Timer Call-back
2312 * @data: pointer to adapter cast into an unsigned long
2313 **/
2314static void ixgbevf_watchdog(unsigned long data)
2315{
2316 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2317 struct ixgbe_hw *hw = &adapter->hw;
2318 u64 eics = 0;
2319 int i;
2320
2321 /*
2322 * Do the watchdog outside of interrupt context due to the lovely
2323 * delays that some of the newer hardware requires
2324 */
2325
2326 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2327 goto watchdog_short_circuit;
2328
2329 /* get one bit for every active tx/rx interrupt vector */
2330 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2331 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2332 if (qv->rxr_count || qv->txr_count)
2333 eics |= (1 << i);
2334 }
2335
2336 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics);
2337
2338watchdog_short_circuit:
2339 schedule_work(&adapter->watchdog_task);
2340}
2341
2342/**
2343 * ixgbevf_tx_timeout - Respond to a Tx Hang
2344 * @netdev: network interface device structure
2345 **/
2346static void ixgbevf_tx_timeout(struct net_device *netdev)
2347{
2348 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2349
2350 /* Do the reset outside of interrupt context */
2351 schedule_work(&adapter->reset_task);
2352}
2353
2354static void ixgbevf_reset_task(struct work_struct *work)
2355{
2356 struct ixgbevf_adapter *adapter;
2357 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2358
2359 /* If we're already down or resetting, just bail */
2360 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2361 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2362 return;
2363
2364 adapter->tx_timeout_count++;
2365
2366 ixgbevf_reinit_locked(adapter);
2367}
2368
2369/**
2370 * ixgbevf_watchdog_task - worker thread to bring link up
2371 * @work: pointer to work_struct containing our data
2372 **/
2373static void ixgbevf_watchdog_task(struct work_struct *work)
2374{
2375 struct ixgbevf_adapter *adapter = container_of(work,
2376 struct ixgbevf_adapter,
2377 watchdog_task);
2378 struct net_device *netdev = adapter->netdev;
2379 struct ixgbe_hw *hw = &adapter->hw;
2380 u32 link_speed = adapter->link_speed;
2381 bool link_up = adapter->link_up;
2382
2383 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2384
2385 /*
2386 * Always check the link on the watchdog because we have
2387 * no LSC interrupt
2388 */
2389 if (hw->mac.ops.check_link) {
2390 if ((hw->mac.ops.check_link(hw, &link_speed,
2391 &link_up, false)) != 0) {
2392 adapter->link_up = link_up;
2393 adapter->link_speed = link_speed;
da6b3330
GR		 2394 netif_carrier_off(netdev);
2395 netif_tx_stop_all_queues(netdev);
92915f71
GR		 2396 schedule_work(&adapter->reset_task);
2397 goto pf_has_reset;
2398 }
2399 } else {
2400 /* always assume link is up, if no check link
2401 * function */
2402 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2403 link_up = true;
2404 }
2405 adapter->link_up = link_up;
2406 adapter->link_speed = link_speed;
2407
2408 if (link_up) {
2409 if (!netif_carrier_ok(netdev)) {
300bc060
JP		 2410 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
2411 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2412 10 : 1);
92915f71
GR		 2413 netif_carrier_on(netdev);
2414 netif_tx_wake_all_queues(netdev);
2415 } else {
2416 /* Force detection of hung controller */
2417 adapter->detect_tx_hung = true;
2418 }
2419 } else {
2420 adapter->link_up = false;
2421 adapter->link_speed = 0;
2422 if (netif_carrier_ok(netdev)) {
2423 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2424 netif_carrier_off(netdev);
2425 netif_tx_stop_all_queues(netdev);
2426 }
2427 }
2428
92915f71
GR		 2429 ixgbevf_update_stats(adapter);
2430
33bd9f60 2431pf_has_reset:
92915f71
GR		 2432 /* Force detection of hung controller every watchdog period */
2433 adapter->detect_tx_hung = true;
2434
2435 /* Reset the timer */
2436 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2437 mod_timer(&adapter->watchdog_timer,
2438 round_jiffies(jiffies + (2 * HZ)));
2439
2440 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2441}
2442
2443/**
2444 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2445 * @adapter: board private structure
2446 * @tx_ring: Tx descriptor ring for a specific queue
2447 *
2448 * Free all transmit software resources
2449 **/
2450void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2451 struct ixgbevf_ring *tx_ring)
2452{
2453 struct pci_dev *pdev = adapter->pdev;
2454
92915f71
GR		 2455 ixgbevf_clean_tx_ring(adapter, tx_ring);
2456
2457 vfree(tx_ring->tx_buffer_info);
2458 tx_ring->tx_buffer_info = NULL;
2459
2a1f8794
NN		 2460 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2461 tx_ring->dma);
92915f71
GR		 2462
2463 tx_ring->desc = NULL;
2464}
2465
2466/**
2467 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2468 * @adapter: board private structure
2469 *
2470 * Free all transmit software resources
2471 **/
2472static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2473{
2474 int i;
2475
2476 for (i = 0; i < adapter->num_tx_queues; i++)
2477 if (adapter->tx_ring[i].desc)
2478 ixgbevf_free_tx_resources(adapter,
2479 &adapter->tx_ring[i]);
2480
2481}
2482
2483/**
2484 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2485 * @adapter: board private structure
2486 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2487 *
2488 * Return 0 on success, negative on failure
2489 **/
2490int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2491 struct ixgbevf_ring *tx_ring)
2492{
2493 struct pci_dev *pdev = adapter->pdev;
2494 int size;
2495
2496 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2497 tx_ring->tx_buffer_info = vmalloc(size);
2498 if (!tx_ring->tx_buffer_info)
2499 goto err;
2500 memset(tx_ring->tx_buffer_info, 0, size);
2501
2502 /* round up to nearest 4K */
2503 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2504 tx_ring->size = ALIGN(tx_ring->size, 4096);
2505
2a1f8794
NN		 2506 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
2507 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2508 if (!tx_ring->desc)
2509 goto err;
2510
2511 tx_ring->next_to_use = 0;
2512 tx_ring->next_to_clean = 0;
2513 tx_ring->work_limit = tx_ring->count;
2514 return 0;
2515
2516err:
2517 vfree(tx_ring->tx_buffer_info);
2518 tx_ring->tx_buffer_info = NULL;
2519 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2520 "descriptor ring\n");
2521 return -ENOMEM;
2522}
2523
2524/**
2525 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2526 * @adapter: board private structure
2527 *
2528 * If this function returns with an error, then it's possible one or
2529 * more of the rings is populated (while the rest are not). It is the
2530 * callers duty to clean those orphaned rings.
2531 *
2532 * Return 0 on success, negative on failure
2533 **/
2534static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2535{
2536 int i, err = 0;
2537
2538 for (i = 0; i < adapter->num_tx_queues; i++) {
2539 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2540 if (!err)
2541 continue;
2542 hw_dbg(&adapter->hw,
2543 "Allocation for Tx Queue %u failed\n", i);
2544 break;
2545 }
2546
2547 return err;
2548}
2549
2550/**
2551 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2552 * @adapter: board private structure
2553 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2554 *
2555 * Returns 0 on success, negative on failure
2556 **/
2557int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2558 struct ixgbevf_ring *rx_ring)
2559{
2560 struct pci_dev *pdev = adapter->pdev;
2561 int size;
2562
2563 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2564 rx_ring->rx_buffer_info = vmalloc(size);
2565 if (!rx_ring->rx_buffer_info) {
2566 hw_dbg(&adapter->hw,
2567 "Unable to vmalloc buffer memory for "
2568 "the receive descriptor ring\n");
2569 goto alloc_failed;
2570 }
2571 memset(rx_ring->rx_buffer_info, 0, size);
2572
2573 /* Round up to nearest 4K */
2574 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2575 rx_ring->size = ALIGN(rx_ring->size, 4096);
2576
2a1f8794
NN		 2577 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
2578 &rx_ring->dma, GFP_KERNEL);
92915f71
GR		 2579
2580 if (!rx_ring->desc) {
2581 hw_dbg(&adapter->hw,
2582 "Unable to allocate memory for "
2583 "the receive descriptor ring\n");
2584 vfree(rx_ring->rx_buffer_info);
2585 rx_ring->rx_buffer_info = NULL;
2586 goto alloc_failed;
2587 }
2588
2589 rx_ring->next_to_clean = 0;
2590 rx_ring->next_to_use = 0;
2591
2592 return 0;
2593alloc_failed:
2594 return -ENOMEM;
2595}
2596
2597/**
2598 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2599 * @adapter: board private structure
2600 *
2601 * If this function returns with an error, then it's possible one or
2602 * more of the rings is populated (while the rest are not). It is the
2603 * callers duty to clean those orphaned rings.
2604 *
2605 * Return 0 on success, negative on failure
2606 **/
2607static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2608{
2609 int i, err = 0;
2610
2611 for (i = 0; i < adapter->num_rx_queues; i++) {
2612 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2613 if (!err)
2614 continue;
2615 hw_dbg(&adapter->hw,
2616 "Allocation for Rx Queue %u failed\n", i);
2617 break;
2618 }
2619 return err;
2620}
2621
2622/**
2623 * ixgbevf_free_rx_resources - Free Rx Resources
2624 * @adapter: board private structure
2625 * @rx_ring: ring to clean the resources from
2626 *
2627 * Free all receive software resources
2628 **/
2629void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2630 struct ixgbevf_ring *rx_ring)
2631{
2632 struct pci_dev *pdev = adapter->pdev;
2633
2634 ixgbevf_clean_rx_ring(adapter, rx_ring);
2635
2636 vfree(rx_ring->rx_buffer_info);
2637 rx_ring->rx_buffer_info = NULL;
2638
2a1f8794
NN		 2639 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2640 rx_ring->dma);
92915f71
GR		 2641
2642 rx_ring->desc = NULL;
2643}
2644
2645/**
2646 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2647 * @adapter: board private structure
2648 *
2649 * Free all receive software resources
2650 **/
2651static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2652{
2653 int i;
2654
2655 for (i = 0; i < adapter->num_rx_queues; i++)
2656 if (adapter->rx_ring[i].desc)
2657 ixgbevf_free_rx_resources(adapter,
2658 &adapter->rx_ring[i]);
2659}
2660
2661/**
2662 * ixgbevf_open - Called when a network interface is made active
2663 * @netdev: network interface device structure
2664 *
2665 * Returns 0 on success, negative value on failure
2666 *
2667 * The open entry point is called when a network interface is made
2668 * active by the system (IFF_UP). At this point all resources needed
2669 * for transmit and receive operations are allocated, the interrupt
2670 * handler is registered with the OS, the watchdog timer is started,
2671 * and the stack is notified that the interface is ready.
2672 **/
2673static int ixgbevf_open(struct net_device *netdev)
2674{
2675 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2676 struct ixgbe_hw *hw = &adapter->hw;
2677 int err;
2678
2679 /* disallow open during test */
2680 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2681 return -EBUSY;
2682
2683 if (hw->adapter_stopped) {
2684 ixgbevf_reset(adapter);
2685 /* if adapter is still stopped then PF isn't up and
2686 * the vf can't start. */
2687 if (hw->adapter_stopped) {
2688 err = IXGBE_ERR_MBX;
2689 printk(KERN_ERR "Unable to start - perhaps the PF"
29b8dd02 2690 " Driver isn't up yet\n");
92915f71
GR		 2691 goto err_setup_reset;
2692 }
2693 }
2694
2695 /* allocate transmit descriptors */
2696 err = ixgbevf_setup_all_tx_resources(adapter);
2697 if (err)
2698 goto err_setup_tx;
2699
2700 /* allocate receive descriptors */
2701 err = ixgbevf_setup_all_rx_resources(adapter);
2702 if (err)
2703 goto err_setup_rx;
2704
2705 ixgbevf_configure(adapter);
2706
2707 /*
2708 * Map the Tx/Rx rings to the vectors we were allotted.
2709 * if request_irq will be called in this function map_rings
2710 * must be called *before* up_complete
2711 */
2712 ixgbevf_map_rings_to_vectors(adapter);
2713
2714 err = ixgbevf_up_complete(adapter);
2715 if (err)
2716 goto err_up;
2717
2718 /* clear any pending interrupts, may auto mask */
2719 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2720 err = ixgbevf_request_irq(adapter);
2721 if (err)
2722 goto err_req_irq;
2723
2724 ixgbevf_irq_enable(adapter, true, true);
2725
2726 return 0;
2727
2728err_req_irq:
2729 ixgbevf_down(adapter);
2730err_up:
2731 ixgbevf_free_irq(adapter);
2732err_setup_rx:
2733 ixgbevf_free_all_rx_resources(adapter);
2734err_setup_tx:
2735 ixgbevf_free_all_tx_resources(adapter);
2736 ixgbevf_reset(adapter);
2737
2738err_setup_reset:
2739
2740 return err;
2741}
2742
2743/**
2744 * ixgbevf_close - Disables a network interface
2745 * @netdev: network interface device structure
2746 *
2747 * Returns 0, this is not allowed to fail
2748 *
2749 * The close entry point is called when an interface is de-activated
2750 * by the OS. The hardware is still under the drivers control, but
2751 * needs to be disabled. A global MAC reset is issued to stop the
2752 * hardware, and all transmit and receive resources are freed.
2753 **/
2754static int ixgbevf_close(struct net_device *netdev)
2755{
2756 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2757
2758 ixgbevf_down(adapter);
2759 ixgbevf_free_irq(adapter);
2760
2761 ixgbevf_free_all_tx_resources(adapter);
2762 ixgbevf_free_all_rx_resources(adapter);
2763
2764 return 0;
2765}
2766
2767static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2768 struct ixgbevf_ring *tx_ring,
2769 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2770{
2771 struct ixgbe_adv_tx_context_desc *context_desc;
2772 unsigned int i;
2773 int err;
2774 struct ixgbevf_tx_buffer *tx_buffer_info;
2775 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2776 u32 mss_l4len_idx, l4len;
2777
2778 if (skb_is_gso(skb)) {
2779 if (skb_header_cloned(skb)) {
2780 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2781 if (err)
2782 return err;
2783 }
2784 l4len = tcp_hdrlen(skb);
2785 *hdr_len += l4len;
2786
2787 if (skb->protocol == htons(ETH_P_IP)) {
2788 struct iphdr *iph = ip_hdr(skb);
2789 iph->tot_len = 0;
2790 iph->check = 0;
2791 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2792 iph->daddr, 0,
2793 IPPROTO_TCP,
2794 0);
2795 adapter->hw_tso_ctxt++;
9010bc33 2796 } else if (skb_is_gso_v6(skb)) {
92915f71
GR		 2797 ipv6_hdr(skb)->payload_len = 0;
2798 tcp_hdr(skb)->check =
2799 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2800 &ipv6_hdr(skb)->daddr,
2801 0, IPPROTO_TCP, 0);
2802 adapter->hw_tso6_ctxt++;
2803 }
2804
2805 i = tx_ring->next_to_use;
2806
2807 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2808 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2809
2810 /* VLAN MACLEN IPLEN */
2811 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2812 vlan_macip_lens |=
2813 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2814 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2815 IXGBE_ADVTXD_MACLEN_SHIFT);
2816 *hdr_len += skb_network_offset(skb);
2817 vlan_macip_lens |=
2818 (skb_transport_header(skb) - skb_network_header(skb));
2819 *hdr_len +=
2820 (skb_transport_header(skb) - skb_network_header(skb));
2821 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2822 context_desc->seqnum_seed = 0;
2823
2824 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2825 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2826 IXGBE_ADVTXD_DTYP_CTXT);
2827
2828 if (skb->protocol == htons(ETH_P_IP))
2829 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2830 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2831 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2832
2833 /* MSS L4LEN IDX */
2834 mss_l4len_idx =
2835 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2836 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2837 /* use index 1 for TSO */
2838 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2839 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2840
2841 tx_buffer_info->time_stamp = jiffies;
2842 tx_buffer_info->next_to_watch = i;
2843
2844 i++;
2845 if (i == tx_ring->count)
2846 i = 0;
2847 tx_ring->next_to_use = i;
2848
2849 return true;
2850 }
2851
2852 return false;
2853}
2854
2855static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2856 struct ixgbevf_ring *tx_ring,
2857 struct sk_buff *skb, u32 tx_flags)
2858{
2859 struct ixgbe_adv_tx_context_desc *context_desc;
2860 unsigned int i;
2861 struct ixgbevf_tx_buffer *tx_buffer_info;
2862 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2863
2864 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2865 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2866 i = tx_ring->next_to_use;
2867 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2868 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2869
2870 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2871 vlan_macip_lens |= (tx_flags &
2872 IXGBE_TX_FLAGS_VLAN_MASK);
2873 vlan_macip_lens |= (skb_network_offset(skb) <<
2874 IXGBE_ADVTXD_MACLEN_SHIFT);
2875 if (skb->ip_summed == CHECKSUM_PARTIAL)
2876 vlan_macip_lens |= (skb_transport_header(skb) -
2877 skb_network_header(skb));
2878
2879 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2880 context_desc->seqnum_seed = 0;
2881
2882 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2883 IXGBE_ADVTXD_DTYP_CTXT);
2884
2885 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2886 switch (skb->protocol) {
2887 case __constant_htons(ETH_P_IP):
2888 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2889 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2890 type_tucmd_mlhl |=
2891 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2892 break;
2893 case __constant_htons(ETH_P_IPV6):
2894 /* XXX what about other V6 headers?? */
2895 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2896 type_tucmd_mlhl |=
2897 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2898 break;
2899 default:
2900 if (unlikely(net_ratelimit())) {
2901 printk(KERN_WARNING
2902 "partial checksum but "
2903 "proto=%x!\n",
2904 skb->protocol);
2905 }
2906 break;
2907 }
2908 }
2909
2910 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2911 /* use index zero for tx checksum offload */
2912 context_desc->mss_l4len_idx = 0;
2913
2914 tx_buffer_info->time_stamp = jiffies;
2915 tx_buffer_info->next_to_watch = i;
2916
2917 adapter->hw_csum_tx_good++;
2918 i++;
2919 if (i == tx_ring->count)
2920 i = 0;
2921 tx_ring->next_to_use = i;
2922
2923 return true;
2924 }
2925
2926 return false;
2927}
2928
2929static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2930 struct ixgbevf_ring *tx_ring,
2931 struct sk_buff *skb, u32 tx_flags,
2932 unsigned int first)
2933{
2934 struct pci_dev *pdev = adapter->pdev;
2935 struct ixgbevf_tx_buffer *tx_buffer_info;
2936 unsigned int len;
2937 unsigned int total = skb->len;
2540ddb5
KV		 2938 unsigned int offset = 0, size;
2939 int count = 0;
92915f71
GR		 2940 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2941 unsigned int f;
65deeed7 2942 int i;
92915f71
GR		 2943
2944 i = tx_ring->next_to_use;
2945
2946 len = min(skb_headlen(skb), total);
2947 while (len) {
2948 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2949 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2950
2951 tx_buffer_info->length = size;
2952 tx_buffer_info->mapped_as_page = false;
2a1f8794 2953 tx_buffer_info->dma = dma_map_single(&adapter->pdev->dev,
92915f71 2954 skb->data + offset,
2a1f8794
NN		 2955 size, DMA_TO_DEVICE);
2956 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2957 goto dma_error;
2958 tx_buffer_info->time_stamp = jiffies;
2959 tx_buffer_info->next_to_watch = i;
2960
2961 len -= size;
2962 total -= size;
2963 offset += size;
2964 count++;
2965 i++;
2966 if (i == tx_ring->count)
2967 i = 0;
2968 }
2969
2970 for (f = 0; f < nr_frags; f++) {
2971 struct skb_frag_struct *frag;
2972
2973 frag = &skb_shinfo(skb)->frags[f];
2974 len = min((unsigned int)frag->size, total);
2975 offset = frag->page_offset;
2976
2977 while (len) {
2978 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2979 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2980
2981 tx_buffer_info->length = size;
2a1f8794 2982 tx_buffer_info->dma = dma_map_page(&adapter->pdev->dev,
92915f71
GR		 2983 frag->page,
2984 offset,
2985 size,
2a1f8794 2986 DMA_TO_DEVICE);
92915f71 2987 tx_buffer_info->mapped_as_page = true;
2a1f8794 2988 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2989 goto dma_error;
2990 tx_buffer_info->time_stamp = jiffies;
2991 tx_buffer_info->next_to_watch = i;
2992
2993 len -= size;
2994 total -= size;
2995 offset += size;
2996 count++;
2997 i++;
2998 if (i == tx_ring->count)
2999 i = 0;
3000 }
3001 if (total == 0)
3002 break;
3003 }
3004
3005 if (i == 0)
3006 i = tx_ring->count - 1;
3007 else
3008 i = i - 1;
3009 tx_ring->tx_buffer_info[i].skb = skb;
3010 tx_ring->tx_buffer_info[first].next_to_watch = i;
3011
3012 return count;
3013
3014dma_error:
3015 dev_err(&pdev->dev, "TX DMA map failed\n");
3016
3017 /* clear timestamp and dma mappings for failed tx_buffer_info map */
3018 tx_buffer_info->dma = 0;
3019 tx_buffer_info->time_stamp = 0;
3020 tx_buffer_info->next_to_watch = 0;
3021 count--;
3022
3023 /* clear timestamp and dma mappings for remaining portion of packet */
3024 while (count >= 0) {
3025 count--;
3026 i--;
3027 if (i < 0)
3028 i += tx_ring->count;
3029 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3030 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3031 }
3032
3033 return count;
3034}
3035
3036static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
3037 struct ixgbevf_ring *tx_ring, int tx_flags,
3038 int count, u32 paylen, u8 hdr_len)
3039{
3040 union ixgbe_adv_tx_desc *tx_desc = NULL;
3041 struct ixgbevf_tx_buffer *tx_buffer_info;
3042 u32 olinfo_status = 0, cmd_type_len = 0;
3043 unsigned int i;
3044
3045 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3046
3047 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3048
3049 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3050
3051 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3052 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3053
3054 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3055 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3056
3057 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3058 IXGBE_ADVTXD_POPTS_SHIFT;
3059
3060 /* use index 1 context for tso */
3061 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3062 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3063 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3064 IXGBE_ADVTXD_POPTS_SHIFT;
3065
3066 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3067 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3068 IXGBE_ADVTXD_POPTS_SHIFT;
3069
3070 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3071
3072 i = tx_ring->next_to_use;
3073 while (count--) {
3074 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3075 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3076 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3077 tx_desc->read.cmd_type_len =
3078 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3079 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3080 i++;
3081 if (i == tx_ring->count)
3082 i = 0;
3083 }
3084
3085 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3086
3087 /*
3088 * Force memory writes to complete before letting h/w
3089 * know there are new descriptors to fetch. (Only
3090 * applicable for weak-ordered memory model archs,
3091 * such as IA-64).
3092 */
3093 wmb();
3094
3095 tx_ring->next_to_use = i;
3096 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3097}
3098
3099static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
3100 struct ixgbevf_ring *tx_ring, int size)
3101{
3102 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3103
3104 netif_stop_subqueue(netdev, tx_ring->queue_index);
3105 /* Herbert's original patch had:
3106 * smp_mb__after_netif_stop_queue();
3107 * but since that doesn't exist yet, just open code it. */
3108 smp_mb();
3109
3110 /* We need to check again in a case another CPU has just
3111 * made room available. */
3112 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3113 return -EBUSY;
3114
3115 /* A reprieve! - use start_queue because it doesn't call schedule */
3116 netif_start_subqueue(netdev, tx_ring->queue_index);
3117 ++adapter->restart_queue;
3118 return 0;
3119}
3120
3121static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
3122 struct ixgbevf_ring *tx_ring, int size)
3123{
3124 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3125 return 0;
3126 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
3127}
3128
3129static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3130{
3131 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3132 struct ixgbevf_ring *tx_ring;
3133 unsigned int first;
3134 unsigned int tx_flags = 0;
3135 u8 hdr_len = 0;
3136 int r_idx = 0, tso;
3137 int count = 0;
3138
3139 unsigned int f;
3140
3141 tx_ring = &adapter->tx_ring[r_idx];
3142
3143 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3144 tx_flags |= vlan_tx_tag_get(skb);
3145 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3146 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3147 }
3148
3149 /* four things can cause us to need a context descriptor */
3150 if (skb_is_gso(skb) ||
3151 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3152 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3153 count++;
3154
3155 count += TXD_USE_COUNT(skb_headlen(skb));
3156 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3157 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3158
3159 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) {
3160 adapter->tx_busy++;
3161 return NETDEV_TX_BUSY;
3162 }
3163
3164 first = tx_ring->next_to_use;
3165
3166 if (skb->protocol == htons(ETH_P_IP))
3167 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3168 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3169 if (tso < 0) {
3170 dev_kfree_skb_any(skb);
3171 return NETDEV_TX_OK;
3172 }
3173
3174 if (tso)
3175 tx_flags |= IXGBE_TX_FLAGS_TSO;
3176 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3177 (skb->ip_summed == CHECKSUM_PARTIAL))
3178 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3179
3180 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
3181 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
3182 skb->len, hdr_len);
3183
92915f71
GR		 3184 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3185
3186 return NETDEV_TX_OK;
3187}
3188
3189/**
3190 * ixgbevf_get_stats - Get System Network Statistics
3191 * @netdev: network interface device structure
3192 *
3193 * Returns the address of the device statistics structure.
3194 * The statistics are actually updated from the timer callback.
3195 **/
3196static struct net_device_stats *ixgbevf_get_stats(struct net_device *netdev)
3197{
3198 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3199
3200 /* only return the current stats */
3201 return &adapter->net_stats;
3202}
3203
3204/**
3205 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3206 * @netdev: network interface device structure
3207 * @p: pointer to an address structure
3208 *
3209 * Returns 0 on success, negative on failure
3210 **/
3211static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3212{
3213 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3214 struct ixgbe_hw *hw = &adapter->hw;
3215 struct sockaddr *addr = p;
3216
3217 if (!is_valid_ether_addr(addr->sa_data))
3218 return -EADDRNOTAVAIL;
3219
3220 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3221 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3222
3223 if (hw->mac.ops.set_rar)
3224 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3225
3226 return 0;
3227}
3228
3229/**
3230 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3231 * @netdev: network interface device structure
3232 * @new_mtu: new value for maximum frame size
3233 *
3234 * Returns 0 on success, negative on failure
3235 **/
3236static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3237{
3238 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3239 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3240
3241 /* MTU < 68 is an error and causes problems on some kernels */
3242 if ((new_mtu < 68) || (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
3243 return -EINVAL;
3244
3245 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3246 netdev->mtu, new_mtu);
3247 /* must set new MTU before calling down or up */
3248 netdev->mtu = new_mtu;
3249
3250 if (netif_running(netdev))
3251 ixgbevf_reinit_locked(adapter);
3252
3253 return 0;
3254}
3255
3256static void ixgbevf_shutdown(struct pci_dev *pdev)
3257{
3258 struct net_device *netdev = pci_get_drvdata(pdev);
3259 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3260
3261 netif_device_detach(netdev);
3262
3263 if (netif_running(netdev)) {
3264 ixgbevf_down(adapter);
3265 ixgbevf_free_irq(adapter);
3266 ixgbevf_free_all_tx_resources(adapter);
3267 ixgbevf_free_all_rx_resources(adapter);
3268 }
3269
3270#ifdef CONFIG_PM
3271 pci_save_state(pdev);
3272#endif
3273
3274 pci_disable_device(pdev);
3275}
3276
92915f71
GR		 3277static const struct net_device_ops ixgbe_netdev_ops = {
3278 .ndo_open = &ixgbevf_open,
3279 .ndo_stop = &ixgbevf_close,
3280 .ndo_start_xmit = &ixgbevf_xmit_frame,
3281 .ndo_get_stats = &ixgbevf_get_stats,
3282 .ndo_set_rx_mode = &ixgbevf_set_rx_mode,
3283 .ndo_set_multicast_list = &ixgbevf_set_rx_mode,
3284 .ndo_validate_addr = eth_validate_addr,
3285 .ndo_set_mac_address = &ixgbevf_set_mac,
3286 .ndo_change_mtu = &ixgbevf_change_mtu,
3287 .ndo_tx_timeout = &ixgbevf_tx_timeout,
3288 .ndo_vlan_rx_register = &ixgbevf_vlan_rx_register,
3289 .ndo_vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid,
3290 .ndo_vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid,
3291};
92915f71
GR		 3292
3293static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3294{
3295 struct ixgbevf_adapter *adapter;
3296 adapter = netdev_priv(dev);
92915f71 3297 dev->netdev_ops = &ixgbe_netdev_ops;
92915f71
GR		 3298 ixgbevf_set_ethtool_ops(dev);
3299 dev->watchdog_timeo = 5 * HZ;
3300}
3301
3302/**
3303 * ixgbevf_probe - Device Initialization Routine
3304 * @pdev: PCI device information struct
3305 * @ent: entry in ixgbevf_pci_tbl
3306 *
3307 * Returns 0 on success, negative on failure
3308 *
3309 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3310 * The OS initialization, configuring of the adapter private structure,
3311 * and a hardware reset occur.
3312 **/
3313static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3314 const struct pci_device_id *ent)
3315{
3316 struct net_device *netdev;
3317 struct ixgbevf_adapter *adapter = NULL;
3318 struct ixgbe_hw *hw = NULL;
3319 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3320 static int cards_found;
3321 int err, pci_using_dac;
3322
3323 err = pci_enable_device(pdev);
3324 if (err)
3325 return err;
3326
2a1f8794
NN		 3327 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3328 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3329 pci_using_dac = 1;
3330 } else {
2a1f8794 3331 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3332 if (err) {
2a1f8794
NN		 3333 err = dma_set_coherent_mask(&pdev->dev,
3334 DMA_BIT_MASK(32));
92915f71
GR		 3335 if (err) {
3336 dev_err(&pdev->dev, "No usable DMA "
3337 "configuration, aborting\n");
3338 goto err_dma;
3339 }
3340 }
3341 pci_using_dac = 0;
3342 }
3343
3344 err = pci_request_regions(pdev, ixgbevf_driver_name);
3345 if (err) {
3346 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3347 goto err_pci_reg;
3348 }
3349
3350 pci_set_master(pdev);
3351
3352#ifdef HAVE_TX_MQ
3353 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3354 MAX_TX_QUEUES);
3355#else
3356 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter));
3357#endif
3358 if (!netdev) {
3359 err = -ENOMEM;
3360 goto err_alloc_etherdev;
3361 }
3362
3363 SET_NETDEV_DEV(netdev, &pdev->dev);
3364
3365 pci_set_drvdata(pdev, netdev);
3366 adapter = netdev_priv(netdev);
3367
3368 adapter->netdev = netdev;
3369 adapter->pdev = pdev;
3370 hw = &adapter->hw;
3371 hw->back = adapter;
3372 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3373
3374 /*
3375 * call save state here in standalone driver because it relies on
3376 * adapter struct to exist, and needs to call netdev_priv
3377 */
3378 pci_save_state(pdev);
3379
3380 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3381 pci_resource_len(pdev, 0));
3382 if (!hw->hw_addr) {
3383 err = -EIO;
3384 goto err_ioremap;
3385 }
3386
3387 ixgbevf_assign_netdev_ops(netdev);
3388
3389 adapter->bd_number = cards_found;
3390
3391 /* Setup hw api */
3392 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3393 hw->mac.type = ii->mac;
3394
3395 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
3396 sizeof(struct ixgbe_mac_operations));
3397
3398 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE;
3399 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
3400 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE;
3401
3402 /* setup the private structure */
3403 err = ixgbevf_sw_init(adapter);
3404
92915f71
GR		 3405#ifdef MAX_SKB_FRAGS
3406 netdev->features = NETIF_F_SG |
3407 NETIF_F_IP_CSUM |
3408 NETIF_F_HW_VLAN_TX |
3409 NETIF_F_HW_VLAN_RX |
3410 NETIF_F_HW_VLAN_FILTER;
3411
3412 netdev->features |= NETIF_F_IPV6_CSUM;
3413 netdev->features |= NETIF_F_TSO;
3414 netdev->features |= NETIF_F_TSO6;
e59d44df 3415 netdev->features |= NETIF_F_GRO;
92915f71
GR		 3416 netdev->vlan_features |= NETIF_F_TSO;
3417 netdev->vlan_features |= NETIF_F_TSO6;
3418 netdev->vlan_features |= NETIF_F_IP_CSUM;
3419 netdev->vlan_features |= NETIF_F_SG;
3420
3421 if (pci_using_dac)
3422 netdev->features |= NETIF_F_HIGHDMA;
3423
3424#endif /* MAX_SKB_FRAGS */
3425
3426 /* The HW MAC address was set and/or determined in sw_init */
3427 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
3428 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3429
3430 if (!is_valid_ether_addr(netdev->dev_addr)) {
3431 printk(KERN_ERR "invalid MAC address\n");
3432 err = -EIO;
3433 goto err_sw_init;
3434 }
3435
3436 init_timer(&adapter->watchdog_timer);
3437 adapter->watchdog_timer.function = &ixgbevf_watchdog;
3438 adapter->watchdog_timer.data = (unsigned long)adapter;
3439
3440 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3441 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3442
3443 err = ixgbevf_init_interrupt_scheme(adapter);
3444 if (err)
3445 goto err_sw_init;
3446
3447 /* pick up the PCI bus settings for reporting later */
3448 if (hw->mac.ops.get_bus_info)
3449 hw->mac.ops.get_bus_info(hw);
3450
3451
3452 netif_carrier_off(netdev);
3453 netif_tx_stop_all_queues(netdev);
3454
3455 strcpy(netdev->name, "eth%d");
3456
3457 err = register_netdev(netdev);
3458 if (err)
3459 goto err_register;
3460
3461 adapter->netdev_registered = true;
3462
33bd9f60
GR		 3463 ixgbevf_init_last_counter_stats(adapter);
3464
92915f71
GR		 3465 /* print the MAC address */
3466 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
3467 netdev->dev_addr[0],
3468 netdev->dev_addr[1],
3469 netdev->dev_addr[2],
3470 netdev->dev_addr[3],
3471 netdev->dev_addr[4],
3472 netdev->dev_addr[5]);
3473
3474 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3475
d6dbee86 3476 hw_dbg(hw, "LRO is disabled\n");
92915f71
GR		 3477
3478 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3479 cards_found++;
3480 return 0;
3481
3482err_register:
3483err_sw_init:
3484 ixgbevf_reset_interrupt_capability(adapter);
3485 iounmap(hw->hw_addr);
3486err_ioremap:
3487 free_netdev(netdev);
3488err_alloc_etherdev:
3489 pci_release_regions(pdev);
3490err_pci_reg:
3491err_dma:
3492 pci_disable_device(pdev);
3493 return err;
3494}
3495
3496/**
3497 * ixgbevf_remove - Device Removal Routine
3498 * @pdev: PCI device information struct
3499 *
3500 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3501 * that it should release a PCI device. The could be caused by a
3502 * Hot-Plug event, or because the driver is going to be removed from
3503 * memory.
3504 **/
3505static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3506{
3507 struct net_device *netdev = pci_get_drvdata(pdev);
3508 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3509
3510 set_bit(__IXGBEVF_DOWN, &adapter->state);
3511
3512 del_timer_sync(&adapter->watchdog_timer);
3513
3514 cancel_work_sync(&adapter->watchdog_task);
3515
3516 flush_scheduled_work();
3517
3518 if (adapter->netdev_registered) {
3519 unregister_netdev(netdev);
3520 adapter->netdev_registered = false;
3521 }
3522
3523 ixgbevf_reset_interrupt_capability(adapter);
3524
3525 iounmap(adapter->hw.hw_addr);
3526 pci_release_regions(pdev);
3527
3528 hw_dbg(&adapter->hw, "Remove complete\n");
3529
3530 kfree(adapter->tx_ring);
3531 kfree(adapter->rx_ring);
3532
3533 free_netdev(netdev);
3534
3535 pci_disable_device(pdev);
3536}
3537
3538static struct pci_driver ixgbevf_driver = {
3539 .name = ixgbevf_driver_name,
3540 .id_table = ixgbevf_pci_tbl,
3541 .probe = ixgbevf_probe,
3542 .remove = __devexit_p(ixgbevf_remove),
3543 .shutdown = ixgbevf_shutdown,
3544};
3545
3546/**
3547 * ixgbe_init_module - Driver Registration Routine
3548 *
3549 * ixgbe_init_module is the first routine called when the driver is
3550 * loaded. All it does is register with the PCI subsystem.
3551 **/
3552static int __init ixgbevf_init_module(void)
3553{
3554 int ret;
3555 printk(KERN_INFO "ixgbevf: %s - version %s\n", ixgbevf_driver_string,
3556 ixgbevf_driver_version);
3557
3558 printk(KERN_INFO "%s\n", ixgbevf_copyright);
3559
3560 ret = pci_register_driver(&ixgbevf_driver);
3561 return ret;
3562}
3563
3564module_init(ixgbevf_init_module);
3565
3566/**
3567 * ixgbe_exit_module - Driver Exit Cleanup Routine
3568 *
3569 * ixgbe_exit_module is called just before the driver is removed
3570 * from memory.
3571 **/
3572static void __exit ixgbevf_exit_module(void)
3573{
3574 pci_unregister_driver(&ixgbevf_driver);
3575}
3576
3577#ifdef DEBUG
3578/**
3579 * ixgbe_get_hw_dev_name - return device name string
3580 * used by hardware layer to print debugging information
3581 **/
3582char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3583{
3584 struct ixgbevf_adapter *adapter = hw->back;
3585 return adapter->netdev->name;
3586}
3587
3588#endif
3589module_exit(ixgbevf_exit_module);
3590
3591/* ixgbevf_main.c */
Clone of davem's net-next-2.6 tree