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[net-next-2.6.git] / drivers / net / ixgbevf / ixgbevf_main.c
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92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
32#include <linux/types.h>
33#include <linux/module.h>
34#include <linux/pci.h>
35#include <linux/netdevice.h>
36#include <linux/vmalloc.h>
37#include <linux/string.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
5a0e3ad6 42#include <linux/slab.h>
92915f71
GR		 43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47
48#include "ixgbevf.h"
49
50char ixgbevf_driver_name[] = "ixgbevf";
51static const char ixgbevf_driver_string[] =
52 "Intel(R) 82599 Virtual Function";
53
54#define DRV_VERSION "1.0.0-k0"
55const char ixgbevf_driver_version[] = DRV_VERSION;
56static char ixgbevf_copyright[] = "Copyright (c) 2009 Intel Corporation.";
57
58static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
59 [board_82599_vf] = &ixgbevf_vf_info,
60};
61
62/* ixgbevf_pci_tbl - PCI Device ID Table
63 *
64 * Wildcard entries (PCI_ANY_ID) should come last
65 * Last entry must be all 0s
66 *
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
69 */
70static struct pci_device_id ixgbevf_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
72 board_82599_vf},
73
74 /* required last entry */
75 {0, }
76};
77MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
78
79MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
80MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
81MODULE_LICENSE("GPL");
82MODULE_VERSION(DRV_VERSION);
83
84#define DEFAULT_DEBUG_LEVEL_SHIFT 3
85
86/* forward decls */
87static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector);
88static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
89 u32 itr_reg);
90
91static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
92 struct ixgbevf_ring *rx_ring,
93 u32 val)
94{
95 /*
96 * Force memory writes to complete before letting h/w
97 * know there are new descriptors to fetch. (Only
98 * applicable for weak-ordered memory model archs,
99 * such as IA-64).
100 */
101 wmb();
102 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
103}
104
105/*
106 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
107 * @adapter: pointer to adapter struct
108 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
109 * @queue: queue to map the corresponding interrupt to
110 * @msix_vector: the vector to map to the corresponding queue
111 *
112 */
113static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
114 u8 queue, u8 msix_vector)
115{
116 u32 ivar, index;
117 struct ixgbe_hw *hw = &adapter->hw;
118 if (direction == -1) {
119 /* other causes */
120 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
121 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
122 ivar &= ~0xFF;
123 ivar |= msix_vector;
124 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
125 } else {
126 /* tx or rx causes */
127 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
128 index = ((16 * (queue & 1)) + (8 * direction));
129 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
130 ivar &= ~(0xFF << index);
131 ivar |= (msix_vector << index);
132 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
133 }
134}
135
136static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
137 struct ixgbevf_tx_buffer
138 *tx_buffer_info)
139{
140 if (tx_buffer_info->dma) {
141 if (tx_buffer_info->mapped_as_page)
2a1f8794 142 dma_unmap_page(&adapter->pdev->dev,
92915f71
GR		 143 tx_buffer_info->dma,
144 tx_buffer_info->length,
2a1f8794 145 DMA_TO_DEVICE);
92915f71 146 else
2a1f8794 147 dma_unmap_single(&adapter->pdev->dev,
92915f71
GR		 148 tx_buffer_info->dma,
149 tx_buffer_info->length,
2a1f8794 150 DMA_TO_DEVICE);
92915f71
GR		 151 tx_buffer_info->dma = 0;
152 }
153 if (tx_buffer_info->skb) {
154 dev_kfree_skb_any(tx_buffer_info->skb);
155 tx_buffer_info->skb = NULL;
156 }
157 tx_buffer_info->time_stamp = 0;
158 /* tx_buffer_info must be completely set up in the transmit path */
159}
160
161static inline bool ixgbevf_check_tx_hang(struct ixgbevf_adapter *adapter,
162 struct ixgbevf_ring *tx_ring,
163 unsigned int eop)
164{
165 struct ixgbe_hw *hw = &adapter->hw;
166 u32 head, tail;
167
168 /* Detect a transmit hang in hardware, this serializes the
169 * check with the clearing of time_stamp and movement of eop */
170 head = readl(hw->hw_addr + tx_ring->head);
171 tail = readl(hw->hw_addr + tx_ring->tail);
172 adapter->detect_tx_hung = false;
173 if ((head != tail) &&
174 tx_ring->tx_buffer_info[eop].time_stamp &&
175 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ)) {
176 /* detected Tx unit hang */
177 union ixgbe_adv_tx_desc *tx_desc;
178 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
179 printk(KERN_ERR "Detected Tx Unit Hang\n"
180 " Tx Queue <%d>\n"
181 " TDH, TDT <%x>, <%x>\n"
182 " next_to_use <%x>\n"
183 " next_to_clean <%x>\n"
184 "tx_buffer_info[next_to_clean]\n"
185 " time_stamp <%lx>\n"
186 " jiffies <%lx>\n",
187 tx_ring->queue_index,
188 head, tail,
189 tx_ring->next_to_use, eop,
190 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
191 return true;
192 }
193
194 return false;
195}
196
197#define IXGBE_MAX_TXD_PWR 14
198#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
199
200/* Tx Descriptors needed, worst case */
201#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
202 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
203#ifdef MAX_SKB_FRAGS
204#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
205 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
206#else
207#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD)
208#endif
209
210static void ixgbevf_tx_timeout(struct net_device *netdev);
211
212/**
213 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
214 * @adapter: board private structure
215 * @tx_ring: tx ring to clean
216 **/
217static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter,
218 struct ixgbevf_ring *tx_ring)
219{
220 struct net_device *netdev = adapter->netdev;
221 struct ixgbe_hw *hw = &adapter->hw;
222 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
223 struct ixgbevf_tx_buffer *tx_buffer_info;
224 unsigned int i, eop, count = 0;
225 unsigned int total_bytes = 0, total_packets = 0;
226
227 i = tx_ring->next_to_clean;
228 eop = tx_ring->tx_buffer_info[i].next_to_watch;
229 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
230
231 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
232 (count < tx_ring->work_limit)) {
233 bool cleaned = false;
2d0bb1c1 234 rmb(); /* read buffer_info after eop_desc */
92915f71
GR		 235 for ( ; !cleaned; count++) {
236 struct sk_buff *skb;
237 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
238 tx_buffer_info = &tx_ring->tx_buffer_info[i];
239 cleaned = (i == eop);
240 skb = tx_buffer_info->skb;
241
242 if (cleaned && skb) {
243 unsigned int segs, bytecount;
244
245 /* gso_segs is currently only valid for tcp */
246 segs = skb_shinfo(skb)->gso_segs ?: 1;
247 /* multiply data chunks by size of headers */
248 bytecount = ((segs - 1) * skb_headlen(skb)) +
249 skb->len;
250 total_packets += segs;
251 total_bytes += bytecount;
252 }
253
254 ixgbevf_unmap_and_free_tx_resource(adapter,
255 tx_buffer_info);
256
257 tx_desc->wb.status = 0;
258
259 i++;
260 if (i == tx_ring->count)
261 i = 0;
262 }
263
264 eop = tx_ring->tx_buffer_info[i].next_to_watch;
265 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
266 }
267
268 tx_ring->next_to_clean = i;
269
270#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
271 if (unlikely(count && netif_carrier_ok(netdev) &&
272 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
273 /* Make sure that anybody stopping the queue after this
274 * sees the new next_to_clean.
275 */
276 smp_mb();
277#ifdef HAVE_TX_MQ
278 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
279 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
280 netif_wake_subqueue(netdev, tx_ring->queue_index);
281 ++adapter->restart_queue;
282 }
283#else
284 if (netif_queue_stopped(netdev) &&
285 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
286 netif_wake_queue(netdev);
287 ++adapter->restart_queue;
288 }
289#endif
290 }
291
292 if (adapter->detect_tx_hung) {
293 if (ixgbevf_check_tx_hang(adapter, tx_ring, i)) {
294 /* schedule immediate reset if we believe we hung */
295 printk(KERN_INFO
296 "tx hang %d detected, resetting adapter\n",
297 adapter->tx_timeout_count + 1);
298 ixgbevf_tx_timeout(adapter->netdev);
299 }
300 }
301
302 /* re-arm the interrupt */
303 if ((count >= tx_ring->work_limit) &&
304 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) {
305 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);
306 }
307
308 tx_ring->total_bytes += total_bytes;
309 tx_ring->total_packets += total_packets;
310
311 adapter->net_stats.tx_bytes += total_bytes;
312 adapter->net_stats.tx_packets += total_packets;
313
314 return (count < tx_ring->work_limit);
315}
316
317/**
318 * ixgbevf_receive_skb - Send a completed packet up the stack
319 * @q_vector: structure containing interrupt and ring information
320 * @skb: packet to send up
321 * @status: hardware indication of status of receive
322 * @rx_ring: rx descriptor ring (for a specific queue) to setup
323 * @rx_desc: rx descriptor
324 **/
325static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
326 struct sk_buff *skb, u8 status,
327 struct ixgbevf_ring *ring,
328 union ixgbe_adv_rx_desc *rx_desc)
329{
330 struct ixgbevf_adapter *adapter = q_vector->adapter;
331 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
332 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
333 int ret;
334
335 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
336 if (adapter->vlgrp && is_vlan)
337 vlan_gro_receive(&q_vector->napi,
338 adapter->vlgrp,
339 tag, skb);
340 else
341 napi_gro_receive(&q_vector->napi, skb);
342 } else {
343 if (adapter->vlgrp && is_vlan)
344 ret = vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
345 else
346 ret = netif_rx(skb);
347 }
348}
349
350/**
351 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
352 * @adapter: address of board private structure
353 * @status_err: hardware indication of status of receive
354 * @skb: skb currently being received and modified
355 **/
356static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
357 u32 status_err, struct sk_buff *skb)
358{
bc8acf2c 359 skb_checksum_none_assert(skb);
92915f71
GR		 360
361 /* Rx csum disabled */
362 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
363 return;
364
365 /* if IP and error */
366 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
367 (status_err & IXGBE_RXDADV_ERR_IPE)) {
368 adapter->hw_csum_rx_error++;
369 return;
370 }
371
372 if (!(status_err & IXGBE_RXD_STAT_L4CS))
373 return;
374
375 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
376 adapter->hw_csum_rx_error++;
377 return;
378 }
379
380 /* It must be a TCP or UDP packet with a valid checksum */
381 skb->ip_summed = CHECKSUM_UNNECESSARY;
382 adapter->hw_csum_rx_good++;
383}
384
385/**
386 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
387 * @adapter: address of board private structure
388 **/
389static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
390 struct ixgbevf_ring *rx_ring,
391 int cleaned_count)
392{
393 struct pci_dev *pdev = adapter->pdev;
394 union ixgbe_adv_rx_desc *rx_desc;
395 struct ixgbevf_rx_buffer *bi;
396 struct sk_buff *skb;
397 unsigned int i;
398 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
399
400 i = rx_ring->next_to_use;
401 bi = &rx_ring->rx_buffer_info[i];
402
403 while (cleaned_count--) {
404 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
405
406 if (!bi->page_dma &&
407 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
408 if (!bi->page) {
409 bi->page = netdev_alloc_page(adapter->netdev);
410 if (!bi->page) {
411 adapter->alloc_rx_page_failed++;
412 goto no_buffers;
413 }
414 bi->page_offset = 0;
415 } else {
416 /* use a half page if we're re-using */
417 bi->page_offset ^= (PAGE_SIZE / 2);
418 }
419
2a1f8794 420 bi->page_dma = dma_map_page(&pdev->dev, bi->page,
92915f71
GR		 421 bi->page_offset,
422 (PAGE_SIZE / 2),
2a1f8794 423 DMA_FROM_DEVICE);
92915f71
GR		 424 }
425
426 skb = bi->skb;
427 if (!skb) {
428 skb = netdev_alloc_skb(adapter->netdev,
429 bufsz);
430
431 if (!skb) {
432 adapter->alloc_rx_buff_failed++;
433 goto no_buffers;
434 }
435
436 /*
437 * Make buffer alignment 2 beyond a 16 byte boundary
438 * this will result in a 16 byte aligned IP header after
439 * the 14 byte MAC header is removed
440 */
441 skb_reserve(skb, NET_IP_ALIGN);
442
443 bi->skb = skb;
444 }
445 if (!bi->dma) {
2a1f8794 446 bi->dma = dma_map_single(&pdev->dev, skb->data,
92915f71 447 rx_ring->rx_buf_len,
2a1f8794 448 DMA_FROM_DEVICE);
92915f71
GR		 449 }
450 /* Refresh the desc even if buffer_addrs didn't change because
451 * each write-back erases this info. */
452 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
453 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
454 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
455 } else {
456 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
457 }
458
459 i++;
460 if (i == rx_ring->count)
461 i = 0;
462 bi = &rx_ring->rx_buffer_info[i];
463 }
464
465no_buffers:
466 if (rx_ring->next_to_use != i) {
467 rx_ring->next_to_use = i;
468 if (i-- == 0)
469 i = (rx_ring->count - 1);
470
471 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
472 }
473}
474
475static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
476 u64 qmask)
477{
478 u32 mask;
479 struct ixgbe_hw *hw = &adapter->hw;
480
481 mask = (qmask & 0xFFFFFFFF);
482 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
483}
484
485static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
486{
487 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
488}
489
490static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
491{
492 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
493}
494
495static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
496 struct ixgbevf_ring *rx_ring,
497 int *work_done, int work_to_do)
498{
499 struct ixgbevf_adapter *adapter = q_vector->adapter;
500 struct pci_dev *pdev = adapter->pdev;
501 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
502 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
503 struct sk_buff *skb;
504 unsigned int i;
505 u32 len, staterr;
506 u16 hdr_info;
507 bool cleaned = false;
508 int cleaned_count = 0;
509 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
510
511 i = rx_ring->next_to_clean;
512 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
513 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
514 rx_buffer_info = &rx_ring->rx_buffer_info[i];
515
516 while (staterr & IXGBE_RXD_STAT_DD) {
517 u32 upper_len = 0;
518 if (*work_done >= work_to_do)
519 break;
520 (*work_done)++;
521
2d0bb1c1 522 rmb(); /* read descriptor and rx_buffer_info after status DD */
92915f71
GR		 523 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
524 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc));
525 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
526 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
527 if (hdr_info & IXGBE_RXDADV_SPH)
528 adapter->rx_hdr_split++;
529 if (len > IXGBEVF_RX_HDR_SIZE)
530 len = IXGBEVF_RX_HDR_SIZE;
531 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
532 } else {
533 len = le16_to_cpu(rx_desc->wb.upper.length);
534 }
535 cleaned = true;
536 skb = rx_buffer_info->skb;
537 prefetch(skb->data - NET_IP_ALIGN);
538 rx_buffer_info->skb = NULL;
539
540 if (rx_buffer_info->dma) {
2a1f8794 541 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 542 rx_ring->rx_buf_len,
2a1f8794 543 DMA_FROM_DEVICE);
92915f71
GR		 544 rx_buffer_info->dma = 0;
545 skb_put(skb, len);
546 }
547
548 if (upper_len) {
2a1f8794
NN		 549 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
550 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 551 rx_buffer_info->page_dma = 0;
552 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
553 rx_buffer_info->page,
554 rx_buffer_info->page_offset,
555 upper_len);
556
557 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
558 (page_count(rx_buffer_info->page) != 1))
559 rx_buffer_info->page = NULL;
560 else
561 get_page(rx_buffer_info->page);
562
563 skb->len += upper_len;
564 skb->data_len += upper_len;
565 skb->truesize += upper_len;
566 }
567
568 i++;
569 if (i == rx_ring->count)
570 i = 0;
571
572 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
573 prefetch(next_rxd);
574 cleaned_count++;
575
576 next_buffer = &rx_ring->rx_buffer_info[i];
577
578 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
579 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
580 rx_buffer_info->skb = next_buffer->skb;
581 rx_buffer_info->dma = next_buffer->dma;
582 next_buffer->skb = skb;
583 next_buffer->dma = 0;
584 } else {
585 skb->next = next_buffer->skb;
586 skb->next->prev = skb;
587 }
588 adapter->non_eop_descs++;
589 goto next_desc;
590 }
591
592 /* ERR_MASK will only have valid bits if EOP set */
593 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
594 dev_kfree_skb_irq(skb);
595 goto next_desc;
596 }
597
598 ixgbevf_rx_checksum(adapter, staterr, skb);
599
600 /* probably a little skewed due to removing CRC */
601 total_rx_bytes += skb->len;
602 total_rx_packets++;
603
604 /*
605 * Work around issue of some types of VM to VM loop back
606 * packets not getting split correctly
607 */
608 if (staterr & IXGBE_RXD_STAT_LB) {
e743d313 609 u32 header_fixup_len = skb_headlen(skb);
92915f71
GR		 610 if (header_fixup_len < 14)
611 skb_push(skb, header_fixup_len);
612 }
613 skb->protocol = eth_type_trans(skb, adapter->netdev);
614
615 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
92915f71
GR		 616
617next_desc:
618 rx_desc->wb.upper.status_error = 0;
619
620 /* return some buffers to hardware, one at a time is too slow */
621 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
622 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
623 cleaned_count);
624 cleaned_count = 0;
625 }
626
627 /* use prefetched values */
628 rx_desc = next_rxd;
629 rx_buffer_info = &rx_ring->rx_buffer_info[i];
630
631 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
632 }
633
634 rx_ring->next_to_clean = i;
635 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
636
637 if (cleaned_count)
638 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
639
640 rx_ring->total_packets += total_rx_packets;
641 rx_ring->total_bytes += total_rx_bytes;
642 adapter->net_stats.rx_bytes += total_rx_bytes;
643 adapter->net_stats.rx_packets += total_rx_packets;
644
645 return cleaned;
646}
647
648/**
649 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine
650 * @napi: napi struct with our devices info in it
651 * @budget: amount of work driver is allowed to do this pass, in packets
652 *
653 * This function is optimized for cleaning one queue only on a single
654 * q_vector!!!
655 **/
656static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
657{
658 struct ixgbevf_q_vector *q_vector =
659 container_of(napi, struct ixgbevf_q_vector, napi);
660 struct ixgbevf_adapter *adapter = q_vector->adapter;
661 struct ixgbevf_ring *rx_ring = NULL;
662 int work_done = 0;
663 long r_idx;
664
665 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
666 rx_ring = &(adapter->rx_ring[r_idx]);
667
668 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
669
670 /* If all Rx work done, exit the polling mode */
671 if (work_done < budget) {
672 napi_complete(napi);
673 if (adapter->itr_setting & 1)
674 ixgbevf_set_itr_msix(q_vector);
675 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
676 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
677 }
678
679 return work_done;
680}
681
682/**
683 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine
684 * @napi: napi struct with our devices info in it
685 * @budget: amount of work driver is allowed to do this pass, in packets
686 *
687 * This function will clean more than one rx queue associated with a
688 * q_vector.
689 **/
690static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
691{
692 struct ixgbevf_q_vector *q_vector =
693 container_of(napi, struct ixgbevf_q_vector, napi);
694 struct ixgbevf_adapter *adapter = q_vector->adapter;
695 struct ixgbevf_ring *rx_ring = NULL;
696 int work_done = 0, i;
697 long r_idx;
698 u64 enable_mask = 0;
699
700 /* attempt to distribute budget to each queue fairly, but don't allow
701 * the budget to go below 1 because we'll exit polling */
702 budget /= (q_vector->rxr_count ?: 1);
703 budget = max(budget, 1);
704 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
705 for (i = 0; i < q_vector->rxr_count; i++) {
706 rx_ring = &(adapter->rx_ring[r_idx]);
707 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
708 enable_mask |= rx_ring->v_idx;
709 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
710 r_idx + 1);
711 }
712
713#ifndef HAVE_NETDEV_NAPI_LIST
714 if (!netif_running(adapter->netdev))
715 work_done = 0;
716
717#endif
718 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
719 rx_ring = &(adapter->rx_ring[r_idx]);
720
721 /* If all Rx work done, exit the polling mode */
722 if (work_done < budget) {
723 napi_complete(napi);
724 if (adapter->itr_setting & 1)
725 ixgbevf_set_itr_msix(q_vector);
726 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
727 ixgbevf_irq_enable_queues(adapter, enable_mask);
728 }
729
730 return work_done;
731}
732
733
734/**
735 * ixgbevf_configure_msix - Configure MSI-X hardware
736 * @adapter: board private structure
737 *
738 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
739 * interrupts.
740 **/
741static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
742{
743 struct ixgbevf_q_vector *q_vector;
744 struct ixgbe_hw *hw = &adapter->hw;
745 int i, j, q_vectors, v_idx, r_idx;
746 u32 mask;
747
748 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
749
750 /*
751 * Populate the IVAR table and set the ITR values to the
752 * corresponding register.
753 */
754 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
755 q_vector = adapter->q_vector[v_idx];
984b3f57 756 /* XXX for_each_set_bit(...) */
92915f71
GR		 757 r_idx = find_first_bit(q_vector->rxr_idx,
758 adapter->num_rx_queues);
759
760 for (i = 0; i < q_vector->rxr_count; i++) {
761 j = adapter->rx_ring[r_idx].reg_idx;
762 ixgbevf_set_ivar(adapter, 0, j, v_idx);
763 r_idx = find_next_bit(q_vector->rxr_idx,
764 adapter->num_rx_queues,
765 r_idx + 1);
766 }
767 r_idx = find_first_bit(q_vector->txr_idx,
768 adapter->num_tx_queues);
769
770 for (i = 0; i < q_vector->txr_count; i++) {
771 j = adapter->tx_ring[r_idx].reg_idx;
772 ixgbevf_set_ivar(adapter, 1, j, v_idx);
773 r_idx = find_next_bit(q_vector->txr_idx,
774 adapter->num_tx_queues,
775 r_idx + 1);
776 }
777
778 /* if this is a tx only vector halve the interrupt rate */
779 if (q_vector->txr_count && !q_vector->rxr_count)
780 q_vector->eitr = (adapter->eitr_param >> 1);
781 else if (q_vector->rxr_count)
782 /* rx only */
783 q_vector->eitr = adapter->eitr_param;
784
785 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);
786 }
787
788 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
789
790 /* set up to autoclear timer, and the vectors */
791 mask = IXGBE_EIMS_ENABLE_MASK;
792 mask &= ~IXGBE_EIMS_OTHER;
793 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
794}
795
796enum latency_range {
797 lowest_latency = 0,
798 low_latency = 1,
799 bulk_latency = 2,
800 latency_invalid = 255
801};
802
803/**
804 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
805 * @adapter: pointer to adapter
806 * @eitr: eitr setting (ints per sec) to give last timeslice
807 * @itr_setting: current throttle rate in ints/second
808 * @packets: the number of packets during this measurement interval
809 * @bytes: the number of bytes during this measurement interval
810 *
811 * Stores a new ITR value based on packets and byte
812 * counts during the last interrupt. The advantage of per interrupt
813 * computation is faster updates and more accurate ITR for the current
814 * traffic pattern. Constants in this function were computed
815 * based on theoretical maximum wire speed and thresholds were set based
816 * on testing data as well as attempting to minimize response time
817 * while increasing bulk throughput.
818 **/
819static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter,
820 u32 eitr, u8 itr_setting,
821 int packets, int bytes)
822{
823 unsigned int retval = itr_setting;
824 u32 timepassed_us;
825 u64 bytes_perint;
826
827 if (packets == 0)
828 goto update_itr_done;
829
830
831 /* simple throttlerate management
832 * 0-20MB/s lowest (100000 ints/s)
833 * 20-100MB/s low (20000 ints/s)
834 * 100-1249MB/s bulk (8000 ints/s)
835 */
836 /* what was last interrupt timeslice? */
837 timepassed_us = 1000000/eitr;
838 bytes_perint = bytes / timepassed_us; /* bytes/usec */
839
840 switch (itr_setting) {
841 case lowest_latency:
842 if (bytes_perint > adapter->eitr_low)
843 retval = low_latency;
844 break;
845 case low_latency:
846 if (bytes_perint > adapter->eitr_high)
847 retval = bulk_latency;
848 else if (bytes_perint <= adapter->eitr_low)
849 retval = lowest_latency;
850 break;
851 case bulk_latency:
852 if (bytes_perint <= adapter->eitr_high)
853 retval = low_latency;
854 break;
855 }
856
857update_itr_done:
858 return retval;
859}
860
861/**
862 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
863 * @adapter: pointer to adapter struct
864 * @v_idx: vector index into q_vector array
865 * @itr_reg: new value to be written in *register* format, not ints/s
866 *
867 * This function is made to be called by ethtool and by the driver
868 * when it needs to update VTEITR registers at runtime. Hardware
869 * specific quirks/differences are taken care of here.
870 */
871static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
872 u32 itr_reg)
873{
874 struct ixgbe_hw *hw = &adapter->hw;
875
876 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg);
877
878 /*
879 * set the WDIS bit to not clear the timer bits and cause an
880 * immediate assertion of the interrupt
881 */
882 itr_reg |= IXGBE_EITR_CNT_WDIS;
883
884 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
885}
886
887static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
888{
889 struct ixgbevf_adapter *adapter = q_vector->adapter;
890 u32 new_itr;
891 u8 current_itr, ret_itr;
892 int i, r_idx, v_idx = q_vector->v_idx;
893 struct ixgbevf_ring *rx_ring, *tx_ring;
894
895 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
896 for (i = 0; i < q_vector->txr_count; i++) {
897 tx_ring = &(adapter->tx_ring[r_idx]);
898 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
899 q_vector->tx_itr,
900 tx_ring->total_packets,
901 tx_ring->total_bytes);
902 /* if the result for this queue would decrease interrupt
903 * rate for this vector then use that result */
904 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
905 q_vector->tx_itr - 1 : ret_itr);
906 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
907 r_idx + 1);
908 }
909
910 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
911 for (i = 0; i < q_vector->rxr_count; i++) {
912 rx_ring = &(adapter->rx_ring[r_idx]);
913 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
914 q_vector->rx_itr,
915 rx_ring->total_packets,
916 rx_ring->total_bytes);
917 /* if the result for this queue would decrease interrupt
918 * rate for this vector then use that result */
919 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
920 q_vector->rx_itr - 1 : ret_itr);
921 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
922 r_idx + 1);
923 }
924
925 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
926
927 switch (current_itr) {
928 /* counts and packets in update_itr are dependent on these numbers */
929 case lowest_latency:
930 new_itr = 100000;
931 break;
932 case low_latency:
933 new_itr = 20000; /* aka hwitr = ~200 */
934 break;
935 case bulk_latency:
936 default:
937 new_itr = 8000;
938 break;
939 }
940
941 if (new_itr != q_vector->eitr) {
942 u32 itr_reg;
943
944 /* save the algorithm value here, not the smoothed one */
945 q_vector->eitr = new_itr;
946 /* do an exponential smoothing */
947 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
948 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
949 ixgbevf_write_eitr(adapter, v_idx, itr_reg);
950 }
92915f71
GR		 951}
952
953static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
954{
955 struct net_device *netdev = data;
956 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
957 struct ixgbe_hw *hw = &adapter->hw;
958 u32 eicr;
a9ee25a2 959 u32 msg;
92915f71
GR		 960
961 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS);
962 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr);
963
08259594
GR		 964 if (!hw->mbx.ops.check_for_ack(hw)) {
965 /*
966 * checking for the ack clears the PFACK bit. Place
967 * it back in the v2p_mailbox cache so that anyone
968 * polling for an ack will not miss it. Also
969 * avoid the read below because the code to read
970 * the mailbox will also clear the ack bit. This was
971 * causing lost acks. Just cache the bit and exit
972 * the IRQ handler.
973 */
974 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK;
975 goto out;
976 }
977
978 /* Not an ack interrupt, go ahead and read the message */
a9ee25a2
GR		 979 hw->mbx.ops.read(hw, &msg, 1);
980
981 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
982 mod_timer(&adapter->watchdog_timer,
4c3a8223 983 round_jiffies(jiffies + 1));
a9ee25a2 984
08259594 985out:
92915f71
GR		 986 return IRQ_HANDLED;
987}
988
989static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
990{
991 struct ixgbevf_q_vector *q_vector = data;
992 struct ixgbevf_adapter *adapter = q_vector->adapter;
993 struct ixgbevf_ring *tx_ring;
994 int i, r_idx;
995
996 if (!q_vector->txr_count)
997 return IRQ_HANDLED;
998
999 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1000 for (i = 0; i < q_vector->txr_count; i++) {
1001 tx_ring = &(adapter->tx_ring[r_idx]);
1002 tx_ring->total_bytes = 0;
1003 tx_ring->total_packets = 0;
1004 ixgbevf_clean_tx_irq(adapter, tx_ring);
1005 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1006 r_idx + 1);
1007 }
1008
1009 if (adapter->itr_setting & 1)
1010 ixgbevf_set_itr_msix(q_vector);
1011
1012 return IRQ_HANDLED;
1013}
1014
1015/**
1016 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1017 * @irq: unused
1018 * @data: pointer to our q_vector struct for this interrupt vector
1019 **/
1020static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
1021{
1022 struct ixgbevf_q_vector *q_vector = data;
1023 struct ixgbevf_adapter *adapter = q_vector->adapter;
1024 struct ixgbe_hw *hw = &adapter->hw;
1025 struct ixgbevf_ring *rx_ring;
1026 int r_idx;
1027 int i;
1028
1029 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1030 for (i = 0; i < q_vector->rxr_count; i++) {
1031 rx_ring = &(adapter->rx_ring[r_idx]);
1032 rx_ring->total_bytes = 0;
1033 rx_ring->total_packets = 0;
1034 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1035 r_idx + 1);
1036 }
1037
1038 if (!q_vector->rxr_count)
1039 return IRQ_HANDLED;
1040
1041 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1042 rx_ring = &(adapter->rx_ring[r_idx]);
1043 /* disable interrupts on this vector only */
1044 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
1045 napi_schedule(&q_vector->napi);
1046
1047
1048 return IRQ_HANDLED;
1049}
1050
1051static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data)
1052{
1053 ixgbevf_msix_clean_rx(irq, data);
1054 ixgbevf_msix_clean_tx(irq, data);
1055
1056 return IRQ_HANDLED;
1057}
1058
1059static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1060 int r_idx)
1061{
1062 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1063
1064 set_bit(r_idx, q_vector->rxr_idx);
1065 q_vector->rxr_count++;
1066 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1067}
1068
1069static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1070 int t_idx)
1071{
1072 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1073
1074 set_bit(t_idx, q_vector->txr_idx);
1075 q_vector->txr_count++;
1076 a->tx_ring[t_idx].v_idx = 1 << v_idx;
1077}
1078
1079/**
1080 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1081 * @adapter: board private structure to initialize
1082 *
1083 * This function maps descriptor rings to the queue-specific vectors
1084 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1085 * one vector per ring/queue, but on a constrained vector budget, we
1086 * group the rings as "efficiently" as possible. You would add new
1087 * mapping configurations in here.
1088 **/
1089static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1090{
1091 int q_vectors;
1092 int v_start = 0;
1093 int rxr_idx = 0, txr_idx = 0;
1094 int rxr_remaining = adapter->num_rx_queues;
1095 int txr_remaining = adapter->num_tx_queues;
1096 int i, j;
1097 int rqpv, tqpv;
1098 int err = 0;
1099
1100 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1101
1102 /*
1103 * The ideal configuration...
1104 * We have enough vectors to map one per queue.
1105 */
1106 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1107 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1108 map_vector_to_rxq(adapter, v_start, rxr_idx);
1109
1110 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1111 map_vector_to_txq(adapter, v_start, txr_idx);
1112 goto out;
1113 }
1114
1115 /*
1116 * If we don't have enough vectors for a 1-to-1
1117 * mapping, we'll have to group them so there are
1118 * multiple queues per vector.
1119 */
1120 /* Re-adjusting *qpv takes care of the remainder. */
1121 for (i = v_start; i < q_vectors; i++) {
1122 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1123 for (j = 0; j < rqpv; j++) {
1124 map_vector_to_rxq(adapter, i, rxr_idx);
1125 rxr_idx++;
1126 rxr_remaining--;
1127 }
1128 }
1129 for (i = v_start; i < q_vectors; i++) {
1130 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1131 for (j = 0; j < tqpv; j++) {
1132 map_vector_to_txq(adapter, i, txr_idx);
1133 txr_idx++;
1134 txr_remaining--;
1135 }
1136 }
1137
1138out:
1139 return err;
1140}
1141
1142/**
1143 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1144 * @adapter: board private structure
1145 *
1146 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1147 * interrupts from the kernel.
1148 **/
1149static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1150{
1151 struct net_device *netdev = adapter->netdev;
1152 irqreturn_t (*handler)(int, void *);
1153 int i, vector, q_vectors, err;
1154 int ri = 0, ti = 0;
1155
1156 /* Decrement for Other and TCP Timer vectors */
1157 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1158
1159#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
1160 ? &ixgbevf_msix_clean_many : \
1161 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
1162 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \
1163 NULL)
1164 for (vector = 0; vector < q_vectors; vector++) {
1165 handler = SET_HANDLER(adapter->q_vector[vector]);
1166
1167 if (handler == &ixgbevf_msix_clean_rx) {
1168 sprintf(adapter->name[vector], "%s-%s-%d",
1169 netdev->name, "rx", ri++);
1170 } else if (handler == &ixgbevf_msix_clean_tx) {
1171 sprintf(adapter->name[vector], "%s-%s-%d",
1172 netdev->name, "tx", ti++);
1173 } else if (handler == &ixgbevf_msix_clean_many) {
1174 sprintf(adapter->name[vector], "%s-%s-%d",
1175 netdev->name, "TxRx", vector);
1176 } else {
1177 /* skip this unused q_vector */
1178 continue;
1179 }
1180 err = request_irq(adapter->msix_entries[vector].vector,
1181 handler, 0, adapter->name[vector],
1182 adapter->q_vector[vector]);
1183 if (err) {
1184 hw_dbg(&adapter->hw,
1185 "request_irq failed for MSIX interrupt "
1186 "Error: %d\n", err);
1187 goto free_queue_irqs;
1188 }
1189 }
1190
1191 sprintf(adapter->name[vector], "%s:mbx", netdev->name);
1192 err = request_irq(adapter->msix_entries[vector].vector,
1193 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev);
1194 if (err) {
1195 hw_dbg(&adapter->hw,
1196 "request_irq for msix_mbx failed: %d\n", err);
1197 goto free_queue_irqs;
1198 }
1199
1200 return 0;
1201
1202free_queue_irqs:
1203 for (i = vector - 1; i >= 0; i--)
1204 free_irq(adapter->msix_entries[--vector].vector,
1205 &(adapter->q_vector[i]));
1206 pci_disable_msix(adapter->pdev);
1207 kfree(adapter->msix_entries);
1208 adapter->msix_entries = NULL;
1209 return err;
1210}
1211
1212static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1213{
1214 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1215
1216 for (i = 0; i < q_vectors; i++) {
1217 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1218 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1219 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1220 q_vector->rxr_count = 0;
1221 q_vector->txr_count = 0;
1222 q_vector->eitr = adapter->eitr_param;
1223 }
1224}
1225
1226/**
1227 * ixgbevf_request_irq - initialize interrupts
1228 * @adapter: board private structure
1229 *
1230 * Attempts to configure interrupts using the best available
1231 * capabilities of the hardware and kernel.
1232 **/
1233static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1234{
1235 int err = 0;
1236
1237 err = ixgbevf_request_msix_irqs(adapter);
1238
1239 if (err)
1240 hw_dbg(&adapter->hw,
1241 "request_irq failed, Error %d\n", err);
1242
1243 return err;
1244}
1245
1246static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1247{
1248 struct net_device *netdev = adapter->netdev;
1249 int i, q_vectors;
1250
1251 q_vectors = adapter->num_msix_vectors;
1252
1253 i = q_vectors - 1;
1254
1255 free_irq(adapter->msix_entries[i].vector, netdev);
1256 i--;
1257
1258 for (; i >= 0; i--) {
1259 free_irq(adapter->msix_entries[i].vector,
1260 adapter->q_vector[i]);
1261 }
1262
1263 ixgbevf_reset_q_vectors(adapter);
1264}
1265
1266/**
1267 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1268 * @adapter: board private structure
1269 **/
1270static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1271{
1272 int i;
1273 struct ixgbe_hw *hw = &adapter->hw;
1274
1275 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1276
1277 IXGBE_WRITE_FLUSH(hw);
1278
1279 for (i = 0; i < adapter->num_msix_vectors; i++)
1280 synchronize_irq(adapter->msix_entries[i].vector);
1281}
1282
1283/**
1284 * ixgbevf_irq_enable - Enable default interrupt generation settings
1285 * @adapter: board private structure
1286 **/
1287static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter,
1288 bool queues, bool flush)
1289{
1290 struct ixgbe_hw *hw = &adapter->hw;
1291 u32 mask;
1292 u64 qmask;
1293
1294 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1295 qmask = ~0;
1296
1297 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
1298
1299 if (queues)
1300 ixgbevf_irq_enable_queues(adapter, qmask);
1301
1302 if (flush)
1303 IXGBE_WRITE_FLUSH(hw);
1304}
1305
1306/**
1307 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1308 * @adapter: board private structure
1309 *
1310 * Configure the Tx unit of the MAC after a reset.
1311 **/
1312static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1313{
1314 u64 tdba;
1315 struct ixgbe_hw *hw = &adapter->hw;
1316 u32 i, j, tdlen, txctrl;
1317
1318 /* Setup the HW Tx Head and Tail descriptor pointers */
1319 for (i = 0; i < adapter->num_tx_queues; i++) {
1320 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1321 j = ring->reg_idx;
1322 tdba = ring->dma;
1323 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1324 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1325 (tdba & DMA_BIT_MASK(32)));
1326 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1327 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1328 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1329 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1330 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1331 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1332 /* Disable Tx Head Writeback RO bit, since this hoses
1333 * bookkeeping if things aren't delivered in order.
1334 */
1335 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1336 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1337 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1338 }
1339}
1340
1341#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1342
1343static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1344{
1345 struct ixgbevf_ring *rx_ring;
1346 struct ixgbe_hw *hw = &adapter->hw;
1347 u32 srrctl;
1348
1349 rx_ring = &adapter->rx_ring[index];
1350
1351 srrctl = IXGBE_SRRCTL_DROP_EN;
1352
1353 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1354 u16 bufsz = IXGBEVF_RXBUFFER_2048;
1355 /* grow the amount we can receive on large page machines */
1356 if (bufsz < (PAGE_SIZE / 2))
1357 bufsz = (PAGE_SIZE / 2);
1358 /* cap the bufsz at our largest descriptor size */
1359 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz);
1360
1361 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1362 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1363 srrctl |= ((IXGBEVF_RX_HDR_SIZE <<
1364 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1365 IXGBE_SRRCTL_BSIZEHDR_MASK);
1366 } else {
1367 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1368
1369 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1370 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1371 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1372 else
1373 srrctl |= rx_ring->rx_buf_len >>
1374 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1375 }
1376 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1377}
1378
1379/**
1380 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1381 * @adapter: board private structure
1382 *
1383 * Configure the Rx unit of the MAC after a reset.
1384 **/
1385static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1386{
1387 u64 rdba;
1388 struct ixgbe_hw *hw = &adapter->hw;
1389 struct net_device *netdev = adapter->netdev;
1390 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1391 int i, j;
1392 u32 rdlen;
1393 int rx_buf_len;
1394
1395 /* Decide whether to use packet split mode or not */
1396 if (netdev->mtu > ETH_DATA_LEN) {
1397 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE)
1398 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1399 else
1400 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1401 } else {
1402 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE)
1403 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1404 else
1405 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1406 }
1407
1408 /* Set the RX buffer length according to the mode */
1409 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1410 /* PSRTYPE must be initialized in 82599 */
1411 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1412 IXGBE_PSRTYPE_UDPHDR |
1413 IXGBE_PSRTYPE_IPV4HDR |
1414 IXGBE_PSRTYPE_IPV6HDR |
1415 IXGBE_PSRTYPE_L2HDR;
1416 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1417 rx_buf_len = IXGBEVF_RX_HDR_SIZE;
1418 } else {
1419 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1420 if (netdev->mtu <= ETH_DATA_LEN)
1421 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1422 else
1423 rx_buf_len = ALIGN(max_frame, 1024);
1424 }
1425
1426 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1427 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1428 * the Base and Length of the Rx Descriptor Ring */
1429 for (i = 0; i < adapter->num_rx_queues; i++) {
1430 rdba = adapter->rx_ring[i].dma;
1431 j = adapter->rx_ring[i].reg_idx;
1432 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1433 (rdba & DMA_BIT_MASK(32)));
1434 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1435 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1436 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1437 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1438 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1439 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1440 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1441
1442 ixgbevf_configure_srrctl(adapter, j);
1443 }
1444}
1445
1446static void ixgbevf_vlan_rx_register(struct net_device *netdev,
1447 struct vlan_group *grp)
1448{
1449 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1450 struct ixgbe_hw *hw = &adapter->hw;
1451 int i, j;
1452 u32 ctrl;
1453
1454 adapter->vlgrp = grp;
1455
1456 for (i = 0; i < adapter->num_rx_queues; i++) {
1457 j = adapter->rx_ring[i].reg_idx;
1458 ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1459 ctrl |= IXGBE_RXDCTL_VME;
1460 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), ctrl);
1461 }
1462}
1463
1464static void ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1465{
1466 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1467 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1468
1469 /* add VID to filter table */
1470 if (hw->mac.ops.set_vfta)
1471 hw->mac.ops.set_vfta(hw, vid, 0, true);
92915f71
GR		 1472}
1473
1474static void ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1475{
1476 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1477 struct ixgbe_hw *hw = &adapter->hw;
1478
1479 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1480 ixgbevf_irq_disable(adapter);
1481
1482 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1483
1484 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1485 ixgbevf_irq_enable(adapter, true, true);
1486
1487 /* remove VID from filter table */
1488 if (hw->mac.ops.set_vfta)
1489 hw->mac.ops.set_vfta(hw, vid, 0, false);
1490}
1491
1492static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1493{
1494 ixgbevf_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1495
1496 if (adapter->vlgrp) {
1497 u16 vid;
1498 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1499 if (!vlan_group_get_device(adapter->vlgrp, vid))
1500 continue;
1501 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
1502 }
1503 }
1504}
1505
92915f71
GR		 1506/**
1507 * ixgbevf_set_rx_mode - Multicast set
1508 * @netdev: network interface device structure
1509 *
1510 * The set_rx_method entry point is called whenever the multicast address
1511 * list or the network interface flags are updated. This routine is
1512 * responsible for configuring the hardware for proper multicast mode.
1513 **/
1514static void ixgbevf_set_rx_mode(struct net_device *netdev)
1515{
1516 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1517 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1518
1519 /* reprogram multicast list */
92915f71 1520 if (hw->mac.ops.update_mc_addr_list)
5c58c47a 1521 hw->mac.ops.update_mc_addr_list(hw, netdev);
92915f71
GR		 1522}
1523
1524static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1525{
1526 int q_idx;
1527 struct ixgbevf_q_vector *q_vector;
1528 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1529
1530 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1531 struct napi_struct *napi;
1532 q_vector = adapter->q_vector[q_idx];
1533 if (!q_vector->rxr_count)
1534 continue;
1535 napi = &q_vector->napi;
1536 if (q_vector->rxr_count > 1)
1537 napi->poll = &ixgbevf_clean_rxonly_many;
1538
1539 napi_enable(napi);
1540 }
1541}
1542
1543static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1544{
1545 int q_idx;
1546 struct ixgbevf_q_vector *q_vector;
1547 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1548
1549 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1550 q_vector = adapter->q_vector[q_idx];
1551 if (!q_vector->rxr_count)
1552 continue;
1553 napi_disable(&q_vector->napi);
1554 }
1555}
1556
1557static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1558{
1559 struct net_device *netdev = adapter->netdev;
1560 int i;
1561
1562 ixgbevf_set_rx_mode(netdev);
1563
1564 ixgbevf_restore_vlan(adapter);
1565
1566 ixgbevf_configure_tx(adapter);
1567 ixgbevf_configure_rx(adapter);
1568 for (i = 0; i < adapter->num_rx_queues; i++) {
1569 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
1570 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count);
1571 ring->next_to_use = ring->count - 1;
1572 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail);
1573 }
1574}
1575
1576#define IXGBE_MAX_RX_DESC_POLL 10
1577static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1578 int rxr)
1579{
1580 struct ixgbe_hw *hw = &adapter->hw;
1581 int j = adapter->rx_ring[rxr].reg_idx;
1582 int k;
1583
1584 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1585 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1586 break;
1587 else
1588 msleep(1);
1589 }
1590 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1591 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1592 "not set within the polling period\n", rxr);
1593 }
1594
1595 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1596 (adapter->rx_ring[rxr].count - 1));
1597}
1598
33bd9f60
GR		 1599static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1600{
1601 /* Only save pre-reset stats if there are some */
1602 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1603 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1604 adapter->stats.base_vfgprc;
1605 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1606 adapter->stats.base_vfgptc;
1607 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1608 adapter->stats.base_vfgorc;
1609 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1610 adapter->stats.base_vfgotc;
1611 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1612 adapter->stats.base_vfmprc;
1613 }
1614}
1615
1616static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1617{
1618 struct ixgbe_hw *hw = &adapter->hw;
1619
1620 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1621 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1622 adapter->stats.last_vfgorc |=
1623 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1624 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1625 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1626 adapter->stats.last_vfgotc |=
1627 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1628 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1629
1630 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1631 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1632 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1633 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1634 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1635}
1636
92915f71
GR		 1637static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1638{
1639 struct net_device *netdev = adapter->netdev;
1640 struct ixgbe_hw *hw = &adapter->hw;
1641 int i, j = 0;
1642 int num_rx_rings = adapter->num_rx_queues;
1643 u32 txdctl, rxdctl;
1644
1645 for (i = 0; i < adapter->num_tx_queues; i++) {
1646 j = adapter->tx_ring[i].reg_idx;
1647 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1648 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1649 txdctl |= (8 << 16);
1650 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1651 }
1652
1653 for (i = 0; i < adapter->num_tx_queues; i++) {
1654 j = adapter->tx_ring[i].reg_idx;
1655 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1656 txdctl |= IXGBE_TXDCTL_ENABLE;
1657 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1658 }
1659
1660 for (i = 0; i < num_rx_rings; i++) {
1661 j = adapter->rx_ring[i].reg_idx;
1662 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1663 rxdctl |= IXGBE_RXDCTL_ENABLE;
1664 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1665 ixgbevf_rx_desc_queue_enable(adapter, i);
1666 }
1667
1668 ixgbevf_configure_msix(adapter);
1669
1670 if (hw->mac.ops.set_rar) {
1671 if (is_valid_ether_addr(hw->mac.addr))
1672 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1673 else
1674 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1675 }
1676
1677 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1678 ixgbevf_napi_enable_all(adapter);
1679
1680 /* enable transmits */
1681 netif_tx_start_all_queues(netdev);
1682
33bd9f60
GR		 1683 ixgbevf_save_reset_stats(adapter);
1684 ixgbevf_init_last_counter_stats(adapter);
1685
92915f71
GR		 1686 /* bring the link up in the watchdog, this could race with our first
1687 * link up interrupt but shouldn't be a problem */
1688 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1689 adapter->link_check_timeout = jiffies;
1690 mod_timer(&adapter->watchdog_timer, jiffies);
1691 return 0;
1692}
1693
1694int ixgbevf_up(struct ixgbevf_adapter *adapter)
1695{
1696 int err;
1697 struct ixgbe_hw *hw = &adapter->hw;
1698
1699 ixgbevf_configure(adapter);
1700
1701 err = ixgbevf_up_complete(adapter);
1702
1703 /* clear any pending interrupts, may auto mask */
1704 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1705
1706 ixgbevf_irq_enable(adapter, true, true);
1707
1708 return err;
1709}
1710
1711/**
1712 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1713 * @adapter: board private structure
1714 * @rx_ring: ring to free buffers from
1715 **/
1716static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1717 struct ixgbevf_ring *rx_ring)
1718{
1719 struct pci_dev *pdev = adapter->pdev;
1720 unsigned long size;
1721 unsigned int i;
1722
c0456c23
GR		 1723 if (!rx_ring->rx_buffer_info)
1724 return;
92915f71 1725
c0456c23 1726 /* Free all the Rx ring sk_buffs */
92915f71
GR		 1727 for (i = 0; i < rx_ring->count; i++) {
1728 struct ixgbevf_rx_buffer *rx_buffer_info;
1729
1730 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1731 if (rx_buffer_info->dma) {
2a1f8794 1732 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 1733 rx_ring->rx_buf_len,
2a1f8794 1734 DMA_FROM_DEVICE);
92915f71
GR		 1735 rx_buffer_info->dma = 0;
1736 }
1737 if (rx_buffer_info->skb) {
1738 struct sk_buff *skb = rx_buffer_info->skb;
1739 rx_buffer_info->skb = NULL;
1740 do {
1741 struct sk_buff *this = skb;
1742 skb = skb->prev;
1743 dev_kfree_skb(this);
1744 } while (skb);
1745 }
1746 if (!rx_buffer_info->page)
1747 continue;
2a1f8794
NN		 1748 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
1749 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 1750 rx_buffer_info->page_dma = 0;
1751 put_page(rx_buffer_info->page);
1752 rx_buffer_info->page = NULL;
1753 rx_buffer_info->page_offset = 0;
1754 }
1755
1756 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1757 memset(rx_ring->rx_buffer_info, 0, size);
1758
1759 /* Zero out the descriptor ring */
1760 memset(rx_ring->desc, 0, rx_ring->size);
1761
1762 rx_ring->next_to_clean = 0;
1763 rx_ring->next_to_use = 0;
1764
1765 if (rx_ring->head)
1766 writel(0, adapter->hw.hw_addr + rx_ring->head);
1767 if (rx_ring->tail)
1768 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1769}
1770
1771/**
1772 * ixgbevf_clean_tx_ring - Free Tx Buffers
1773 * @adapter: board private structure
1774 * @tx_ring: ring to be cleaned
1775 **/
1776static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1777 struct ixgbevf_ring *tx_ring)
1778{
1779 struct ixgbevf_tx_buffer *tx_buffer_info;
1780 unsigned long size;
1781 unsigned int i;
1782
c0456c23
GR		 1783 if (!tx_ring->tx_buffer_info)
1784 return;
1785
92915f71
GR		 1786 /* Free all the Tx ring sk_buffs */
1787
1788 for (i = 0; i < tx_ring->count; i++) {
1789 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1790 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1791 }
1792
1793 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1794 memset(tx_ring->tx_buffer_info, 0, size);
1795
1796 memset(tx_ring->desc, 0, tx_ring->size);
1797
1798 tx_ring->next_to_use = 0;
1799 tx_ring->next_to_clean = 0;
1800
1801 if (tx_ring->head)
1802 writel(0, adapter->hw.hw_addr + tx_ring->head);
1803 if (tx_ring->tail)
1804 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1805}
1806
1807/**
1808 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1809 * @adapter: board private structure
1810 **/
1811static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1812{
1813 int i;
1814
1815 for (i = 0; i < adapter->num_rx_queues; i++)
1816 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1817}
1818
1819/**
1820 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1821 * @adapter: board private structure
1822 **/
1823static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1824{
1825 int i;
1826
1827 for (i = 0; i < adapter->num_tx_queues; i++)
1828 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1829}
1830
1831void ixgbevf_down(struct ixgbevf_adapter *adapter)
1832{
1833 struct net_device *netdev = adapter->netdev;
1834 struct ixgbe_hw *hw = &adapter->hw;
1835 u32 txdctl;
1836 int i, j;
1837
1838 /* signal that we are down to the interrupt handler */
1839 set_bit(__IXGBEVF_DOWN, &adapter->state);
1840 /* disable receives */
1841
1842 netif_tx_disable(netdev);
1843
1844 msleep(10);
1845
1846 netif_tx_stop_all_queues(netdev);
1847
1848 ixgbevf_irq_disable(adapter);
1849
1850 ixgbevf_napi_disable_all(adapter);
1851
1852 del_timer_sync(&adapter->watchdog_timer);
1853 /* can't call flush scheduled work here because it can deadlock
1854 * if linkwatch_event tries to acquire the rtnl_lock which we are
1855 * holding */
1856 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1857 msleep(1);
1858
1859 /* disable transmits in the hardware now that interrupts are off */
1860 for (i = 0; i < adapter->num_tx_queues; i++) {
1861 j = adapter->tx_ring[i].reg_idx;
1862 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1863 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1864 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1865 }
1866
1867 netif_carrier_off(netdev);
1868
1869 if (!pci_channel_offline(adapter->pdev))
1870 ixgbevf_reset(adapter);
1871
1872 ixgbevf_clean_all_tx_rings(adapter);
1873 ixgbevf_clean_all_rx_rings(adapter);
1874}
1875
1876void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1877{
c0456c23
GR		 1878 struct ixgbe_hw *hw = &adapter->hw;
1879
92915f71 1880 WARN_ON(in_interrupt());
c0456c23 1881
92915f71
GR		 1882 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1883 msleep(1);
1884
c0456c23
GR		 1885 /*
1886 * Check if PF is up before re-init. If not then skip until
1887 * later when the PF is up and ready to service requests from
1888 * the VF via mailbox. If the VF is up and running then the
1889 * watchdog task will continue to schedule reset tasks until
1890 * the PF is up and running.
1891 */
1892 if (!hw->mac.ops.reset_hw(hw)) {
1893 ixgbevf_down(adapter);
1894 ixgbevf_up(adapter);
1895 }
92915f71
GR		 1896
1897 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1898}
1899
1900void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1901{
1902 struct ixgbe_hw *hw = &adapter->hw;
1903 struct net_device *netdev = adapter->netdev;
1904
1905 if (hw->mac.ops.reset_hw(hw))
1906 hw_dbg(hw, "PF still resetting\n");
1907 else
1908 hw->mac.ops.init_hw(hw);
1909
1910 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1911 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1912 netdev->addr_len);
1913 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1914 netdev->addr_len);
1915 }
1916}
1917
1918static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1919 int vectors)
1920{
1921 int err, vector_threshold;
1922
1923 /* We'll want at least 3 (vector_threshold):
1924 * 1) TxQ[0] Cleanup
1925 * 2) RxQ[0] Cleanup
1926 * 3) Other (Link Status Change, etc.)
1927 */
1928 vector_threshold = MIN_MSIX_COUNT;
1929
1930 /* The more we get, the more we will assign to Tx/Rx Cleanup
1931 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1932 * Right now, we simply care about how many we'll get; we'll
1933 * set them up later while requesting irq's.
1934 */
1935 while (vectors >= vector_threshold) {
1936 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1937 vectors);
1938 if (!err) /* Success in acquiring all requested vectors. */
1939 break;
1940 else if (err < 0)
1941 vectors = 0; /* Nasty failure, quit now */
1942 else /* err == number of vectors we should try again with */
1943 vectors = err;
1944 }
1945
1946 if (vectors < vector_threshold) {
1947 /* Can't allocate enough MSI-X interrupts? Oh well.
1948 * This just means we'll go with either a single MSI
1949 * vector or fall back to legacy interrupts.
1950 */
1951 hw_dbg(&adapter->hw,
1952 "Unable to allocate MSI-X interrupts\n");
1953 kfree(adapter->msix_entries);
1954 adapter->msix_entries = NULL;
1955 } else {
1956 /*
1957 * Adjust for only the vectors we'll use, which is minimum
1958 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1959 * vectors we were allocated.
1960 */
1961 adapter->num_msix_vectors = vectors;
1962 }
1963}
1964
1965/*
1966 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
1967 * @adapter: board private structure to initialize
1968 *
1969 * This is the top level queue allocation routine. The order here is very
1970 * important, starting with the "most" number of features turned on at once,
1971 * and ending with the smallest set of features. This way large combinations
1972 * can be allocated if they're turned on, and smaller combinations are the
1973 * fallthrough conditions.
1974 *
1975 **/
1976static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1977{
1978 /* Start with base case */
1979 adapter->num_rx_queues = 1;
1980 adapter->num_tx_queues = 1;
1981 adapter->num_rx_pools = adapter->num_rx_queues;
1982 adapter->num_rx_queues_per_pool = 1;
1983}
1984
1985/**
1986 * ixgbevf_alloc_queues - Allocate memory for all rings
1987 * @adapter: board private structure to initialize
1988 *
1989 * We allocate one ring per queue at run-time since we don't know the
1990 * number of queues at compile-time. The polling_netdev array is
1991 * intended for Multiqueue, but should work fine with a single queue.
1992 **/
1993static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1994{
1995 int i;
1996
1997 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1998 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1999 if (!adapter->tx_ring)
2000 goto err_tx_ring_allocation;
2001
2002 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2003 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2004 if (!adapter->rx_ring)
2005 goto err_rx_ring_allocation;
2006
2007 for (i = 0; i < adapter->num_tx_queues; i++) {
2008 adapter->tx_ring[i].count = adapter->tx_ring_count;
2009 adapter->tx_ring[i].queue_index = i;
2010 adapter->tx_ring[i].reg_idx = i;
2011 }
2012
2013 for (i = 0; i < adapter->num_rx_queues; i++) {
2014 adapter->rx_ring[i].count = adapter->rx_ring_count;
2015 adapter->rx_ring[i].queue_index = i;
2016 adapter->rx_ring[i].reg_idx = i;
2017 }
2018
2019 return 0;
2020
2021err_rx_ring_allocation:
2022 kfree(adapter->tx_ring);
2023err_tx_ring_allocation:
2024 return -ENOMEM;
2025}
2026
2027/**
2028 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2029 * @adapter: board private structure to initialize
2030 *
2031 * Attempt to configure the interrupts using the best available
2032 * capabilities of the hardware and the kernel.
2033 **/
2034static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2035{
2036 int err = 0;
2037 int vector, v_budget;
2038
2039 /*
2040 * It's easy to be greedy for MSI-X vectors, but it really
2041 * doesn't do us much good if we have a lot more vectors
2042 * than CPU's. So let's be conservative and only ask for
2043 * (roughly) twice the number of vectors as there are CPU's.
2044 */
2045 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2046 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2047
2048 /* A failure in MSI-X entry allocation isn't fatal, but it does
2049 * mean we disable MSI-X capabilities of the adapter. */
2050 adapter->msix_entries = kcalloc(v_budget,
2051 sizeof(struct msix_entry), GFP_KERNEL);
2052 if (!adapter->msix_entries) {
2053 err = -ENOMEM;
2054 goto out;
2055 }
2056
2057 for (vector = 0; vector < v_budget; vector++)
2058 adapter->msix_entries[vector].entry = vector;
2059
2060 ixgbevf_acquire_msix_vectors(adapter, v_budget);
2061
2062out:
2063 return err;
2064}
2065
2066/**
2067 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2068 * @adapter: board private structure to initialize
2069 *
2070 * We allocate one q_vector per queue interrupt. If allocation fails we
2071 * return -ENOMEM.
2072 **/
2073static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2074{
2075 int q_idx, num_q_vectors;
2076 struct ixgbevf_q_vector *q_vector;
2077 int napi_vectors;
2078 int (*poll)(struct napi_struct *, int);
2079
2080 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2081 napi_vectors = adapter->num_rx_queues;
2082 poll = &ixgbevf_clean_rxonly;
2083
2084 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2085 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2086 if (!q_vector)
2087 goto err_out;
2088 q_vector->adapter = adapter;
2089 q_vector->v_idx = q_idx;
2090 q_vector->eitr = adapter->eitr_param;
2091 if (q_idx < napi_vectors)
2092 netif_napi_add(adapter->netdev, &q_vector->napi,
2093 (*poll), 64);
2094 adapter->q_vector[q_idx] = q_vector;
2095 }
2096
2097 return 0;
2098
2099err_out:
2100 while (q_idx) {
2101 q_idx--;
2102 q_vector = adapter->q_vector[q_idx];
2103 netif_napi_del(&q_vector->napi);
2104 kfree(q_vector);
2105 adapter->q_vector[q_idx] = NULL;
2106 }
2107 return -ENOMEM;
2108}
2109
2110/**
2111 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2112 * @adapter: board private structure to initialize
2113 *
2114 * This function frees the memory allocated to the q_vectors. In addition if
2115 * NAPI is enabled it will delete any references to the NAPI struct prior
2116 * to freeing the q_vector.
2117 **/
2118static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2119{
2120 int q_idx, num_q_vectors;
2121 int napi_vectors;
2122
2123 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2124 napi_vectors = adapter->num_rx_queues;
2125
2126 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2127 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2128
2129 adapter->q_vector[q_idx] = NULL;
2130 if (q_idx < napi_vectors)
2131 netif_napi_del(&q_vector->napi);
2132 kfree(q_vector);
2133 }
2134}
2135
2136/**
2137 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2138 * @adapter: board private structure
2139 *
2140 **/
2141static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2142{
2143 pci_disable_msix(adapter->pdev);
2144 kfree(adapter->msix_entries);
2145 adapter->msix_entries = NULL;
92915f71
GR		 2146}
2147
2148/**
2149 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2150 * @adapter: board private structure to initialize
2151 *
2152 **/
2153static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2154{
2155 int err;
2156
2157 /* Number of supported queues */
2158 ixgbevf_set_num_queues(adapter);
2159
2160 err = ixgbevf_set_interrupt_capability(adapter);
2161 if (err) {
2162 hw_dbg(&adapter->hw,
2163 "Unable to setup interrupt capabilities\n");
2164 goto err_set_interrupt;
2165 }
2166
2167 err = ixgbevf_alloc_q_vectors(adapter);
2168 if (err) {
2169 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2170 "vectors\n");
2171 goto err_alloc_q_vectors;
2172 }
2173
2174 err = ixgbevf_alloc_queues(adapter);
2175 if (err) {
2176 printk(KERN_ERR "Unable to allocate memory for queues\n");
2177 goto err_alloc_queues;
2178 }
2179
2180 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2181 "Tx Queue count = %u\n",
2182 (adapter->num_rx_queues > 1) ? "Enabled" :
2183 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2184
2185 set_bit(__IXGBEVF_DOWN, &adapter->state);
2186
2187 return 0;
2188err_alloc_queues:
2189 ixgbevf_free_q_vectors(adapter);
2190err_alloc_q_vectors:
2191 ixgbevf_reset_interrupt_capability(adapter);
2192err_set_interrupt:
2193 return err;
2194}
2195
2196/**
2197 * ixgbevf_sw_init - Initialize general software structures
2198 * (struct ixgbevf_adapter)
2199 * @adapter: board private structure to initialize
2200 *
2201 * ixgbevf_sw_init initializes the Adapter private data structure.
2202 * Fields are initialized based on PCI device information and
2203 * OS network device settings (MTU size).
2204 **/
2205static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2206{
2207 struct ixgbe_hw *hw = &adapter->hw;
2208 struct pci_dev *pdev = adapter->pdev;
2209 int err;
2210
2211 /* PCI config space info */
2212
2213 hw->vendor_id = pdev->vendor;
2214 hw->device_id = pdev->device;
2215 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
2216 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2217 hw->subsystem_device_id = pdev->subsystem_device;
2218
2219 hw->mbx.ops.init_params(hw);
2220 hw->mac.max_tx_queues = MAX_TX_QUEUES;
2221 hw->mac.max_rx_queues = MAX_RX_QUEUES;
2222 err = hw->mac.ops.reset_hw(hw);
2223 if (err) {
2224 dev_info(&pdev->dev,
2225 "PF still in reset state, assigning new address\n");
2c6952df 2226 dev_hw_addr_random(adapter->netdev, hw->mac.addr);
92915f71
GR		 2227 } else {
2228 err = hw->mac.ops.init_hw(hw);
2229 if (err) {
2230 printk(KERN_ERR "init_shared_code failed: %d\n", err);
2231 goto out;
2232 }
2233 }
2234
2235 /* Enable dynamic interrupt throttling rates */
2236 adapter->eitr_param = 20000;
2237 adapter->itr_setting = 1;
2238
2239 /* set defaults for eitr in MegaBytes */
2240 adapter->eitr_low = 10;
2241 adapter->eitr_high = 20;
2242
2243 /* set default ring sizes */
2244 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2245 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2246
2247 /* enable rx csum by default */
2248 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2249
2250 set_bit(__IXGBEVF_DOWN, &adapter->state);
2251
2252out:
2253 return err;
2254}
2255
92915f71
GR		 2256#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2257 { \
2258 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2259 if (current_counter < last_counter) \
2260 counter += 0x100000000LL; \
2261 last_counter = current_counter; \
2262 counter &= 0xFFFFFFFF00000000LL; \
2263 counter |= current_counter; \
2264 }
2265
2266#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2267 { \
2268 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2269 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2270 u64 current_counter = (current_counter_msb << 32) | \
2271 current_counter_lsb; \
2272 if (current_counter < last_counter) \
2273 counter += 0x1000000000LL; \
2274 last_counter = current_counter; \
2275 counter &= 0xFFFFFFF000000000LL; \
2276 counter |= current_counter; \
2277 }
2278/**
2279 * ixgbevf_update_stats - Update the board statistics counters.
2280 * @adapter: board private structure
2281 **/
2282void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2283{
2284 struct ixgbe_hw *hw = &adapter->hw;
2285
2286 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2287 adapter->stats.vfgprc);
2288 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2289 adapter->stats.vfgptc);
2290 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2291 adapter->stats.last_vfgorc,
2292 adapter->stats.vfgorc);
2293 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2294 adapter->stats.last_vfgotc,
2295 adapter->stats.vfgotc);
2296 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2297 adapter->stats.vfmprc);
2298
2299 /* Fill out the OS statistics structure */
2300 adapter->net_stats.multicast = adapter->stats.vfmprc -
2301 adapter->stats.base_vfmprc;
2302}
2303
2304/**
2305 * ixgbevf_watchdog - Timer Call-back
2306 * @data: pointer to adapter cast into an unsigned long
2307 **/
2308static void ixgbevf_watchdog(unsigned long data)
2309{
2310 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2311 struct ixgbe_hw *hw = &adapter->hw;
2312 u64 eics = 0;
2313 int i;
2314
2315 /*
2316 * Do the watchdog outside of interrupt context due to the lovely
2317 * delays that some of the newer hardware requires
2318 */
2319
2320 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2321 goto watchdog_short_circuit;
2322
2323 /* get one bit for every active tx/rx interrupt vector */
2324 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2325 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2326 if (qv->rxr_count || qv->txr_count)
2327 eics |= (1 << i);
2328 }
2329
2330 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics);
2331
2332watchdog_short_circuit:
2333 schedule_work(&adapter->watchdog_task);
2334}
2335
2336/**
2337 * ixgbevf_tx_timeout - Respond to a Tx Hang
2338 * @netdev: network interface device structure
2339 **/
2340static void ixgbevf_tx_timeout(struct net_device *netdev)
2341{
2342 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2343
2344 /* Do the reset outside of interrupt context */
2345 schedule_work(&adapter->reset_task);
2346}
2347
2348static void ixgbevf_reset_task(struct work_struct *work)
2349{
2350 struct ixgbevf_adapter *adapter;
2351 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2352
2353 /* If we're already down or resetting, just bail */
2354 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2355 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2356 return;
2357
2358 adapter->tx_timeout_count++;
2359
2360 ixgbevf_reinit_locked(adapter);
2361}
2362
2363/**
2364 * ixgbevf_watchdog_task - worker thread to bring link up
2365 * @work: pointer to work_struct containing our data
2366 **/
2367static void ixgbevf_watchdog_task(struct work_struct *work)
2368{
2369 struct ixgbevf_adapter *adapter = container_of(work,
2370 struct ixgbevf_adapter,
2371 watchdog_task);
2372 struct net_device *netdev = adapter->netdev;
2373 struct ixgbe_hw *hw = &adapter->hw;
2374 u32 link_speed = adapter->link_speed;
2375 bool link_up = adapter->link_up;
2376
2377 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2378
2379 /*
2380 * Always check the link on the watchdog because we have
2381 * no LSC interrupt
2382 */
2383 if (hw->mac.ops.check_link) {
2384 if ((hw->mac.ops.check_link(hw, &link_speed,
2385 &link_up, false)) != 0) {
2386 adapter->link_up = link_up;
2387 adapter->link_speed = link_speed;
da6b3330
GR		 2388 netif_carrier_off(netdev);
2389 netif_tx_stop_all_queues(netdev);
92915f71
GR		 2390 schedule_work(&adapter->reset_task);
2391 goto pf_has_reset;
2392 }
2393 } else {
2394 /* always assume link is up, if no check link
2395 * function */
2396 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2397 link_up = true;
2398 }
2399 adapter->link_up = link_up;
2400 adapter->link_speed = link_speed;
2401
2402 if (link_up) {
2403 if (!netif_carrier_ok(netdev)) {
300bc060
JP		 2404 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
2405 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2406 10 : 1);
92915f71
GR		 2407 netif_carrier_on(netdev);
2408 netif_tx_wake_all_queues(netdev);
2409 } else {
2410 /* Force detection of hung controller */
2411 adapter->detect_tx_hung = true;
2412 }
2413 } else {
2414 adapter->link_up = false;
2415 adapter->link_speed = 0;
2416 if (netif_carrier_ok(netdev)) {
2417 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2418 netif_carrier_off(netdev);
2419 netif_tx_stop_all_queues(netdev);
2420 }
2421 }
2422
92915f71
GR		 2423 ixgbevf_update_stats(adapter);
2424
33bd9f60 2425pf_has_reset:
92915f71
GR		 2426 /* Force detection of hung controller every watchdog period */
2427 adapter->detect_tx_hung = true;
2428
2429 /* Reset the timer */
2430 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2431 mod_timer(&adapter->watchdog_timer,
2432 round_jiffies(jiffies + (2 * HZ)));
2433
2434 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2435}
2436
2437/**
2438 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2439 * @adapter: board private structure
2440 * @tx_ring: Tx descriptor ring for a specific queue
2441 *
2442 * Free all transmit software resources
2443 **/
2444void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2445 struct ixgbevf_ring *tx_ring)
2446{
2447 struct pci_dev *pdev = adapter->pdev;
2448
92915f71
GR		 2449 ixgbevf_clean_tx_ring(adapter, tx_ring);
2450
2451 vfree(tx_ring->tx_buffer_info);
2452 tx_ring->tx_buffer_info = NULL;
2453
2a1f8794
NN		 2454 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2455 tx_ring->dma);
92915f71
GR		 2456
2457 tx_ring->desc = NULL;
2458}
2459
2460/**
2461 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2462 * @adapter: board private structure
2463 *
2464 * Free all transmit software resources
2465 **/
2466static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2467{
2468 int i;
2469
2470 for (i = 0; i < adapter->num_tx_queues; i++)
2471 if (adapter->tx_ring[i].desc)
2472 ixgbevf_free_tx_resources(adapter,
2473 &adapter->tx_ring[i]);
2474
2475}
2476
2477/**
2478 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2479 * @adapter: board private structure
2480 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2481 *
2482 * Return 0 on success, negative on failure
2483 **/
2484int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2485 struct ixgbevf_ring *tx_ring)
2486{
2487 struct pci_dev *pdev = adapter->pdev;
2488 int size;
2489
2490 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2491 tx_ring->tx_buffer_info = vmalloc(size);
2492 if (!tx_ring->tx_buffer_info)
2493 goto err;
2494 memset(tx_ring->tx_buffer_info, 0, size);
2495
2496 /* round up to nearest 4K */
2497 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2498 tx_ring->size = ALIGN(tx_ring->size, 4096);
2499
2a1f8794
NN		 2500 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
2501 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2502 if (!tx_ring->desc)
2503 goto err;
2504
2505 tx_ring->next_to_use = 0;
2506 tx_ring->next_to_clean = 0;
2507 tx_ring->work_limit = tx_ring->count;
2508 return 0;
2509
2510err:
2511 vfree(tx_ring->tx_buffer_info);
2512 tx_ring->tx_buffer_info = NULL;
2513 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2514 "descriptor ring\n");
2515 return -ENOMEM;
2516}
2517
2518/**
2519 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2520 * @adapter: board private structure
2521 *
2522 * If this function returns with an error, then it's possible one or
2523 * more of the rings is populated (while the rest are not). It is the
2524 * callers duty to clean those orphaned rings.
2525 *
2526 * Return 0 on success, negative on failure
2527 **/
2528static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2529{
2530 int i, err = 0;
2531
2532 for (i = 0; i < adapter->num_tx_queues; i++) {
2533 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2534 if (!err)
2535 continue;
2536 hw_dbg(&adapter->hw,
2537 "Allocation for Tx Queue %u failed\n", i);
2538 break;
2539 }
2540
2541 return err;
2542}
2543
2544/**
2545 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2546 * @adapter: board private structure
2547 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2548 *
2549 * Returns 0 on success, negative on failure
2550 **/
2551int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2552 struct ixgbevf_ring *rx_ring)
2553{
2554 struct pci_dev *pdev = adapter->pdev;
2555 int size;
2556
2557 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2558 rx_ring->rx_buffer_info = vmalloc(size);
2559 if (!rx_ring->rx_buffer_info) {
2560 hw_dbg(&adapter->hw,
2561 "Unable to vmalloc buffer memory for "
2562 "the receive descriptor ring\n");
2563 goto alloc_failed;
2564 }
2565 memset(rx_ring->rx_buffer_info, 0, size);
2566
2567 /* Round up to nearest 4K */
2568 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2569 rx_ring->size = ALIGN(rx_ring->size, 4096);
2570
2a1f8794
NN		 2571 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
2572 &rx_ring->dma, GFP_KERNEL);
92915f71
GR		 2573
2574 if (!rx_ring->desc) {
2575 hw_dbg(&adapter->hw,
2576 "Unable to allocate memory for "
2577 "the receive descriptor ring\n");
2578 vfree(rx_ring->rx_buffer_info);
2579 rx_ring->rx_buffer_info = NULL;
2580 goto alloc_failed;
2581 }
2582
2583 rx_ring->next_to_clean = 0;
2584 rx_ring->next_to_use = 0;
2585
2586 return 0;
2587alloc_failed:
2588 return -ENOMEM;
2589}
2590
2591/**
2592 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2593 * @adapter: board private structure
2594 *
2595 * If this function returns with an error, then it's possible one or
2596 * more of the rings is populated (while the rest are not). It is the
2597 * callers duty to clean those orphaned rings.
2598 *
2599 * Return 0 on success, negative on failure
2600 **/
2601static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2602{
2603 int i, err = 0;
2604
2605 for (i = 0; i < adapter->num_rx_queues; i++) {
2606 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2607 if (!err)
2608 continue;
2609 hw_dbg(&adapter->hw,
2610 "Allocation for Rx Queue %u failed\n", i);
2611 break;
2612 }
2613 return err;
2614}
2615
2616/**
2617 * ixgbevf_free_rx_resources - Free Rx Resources
2618 * @adapter: board private structure
2619 * @rx_ring: ring to clean the resources from
2620 *
2621 * Free all receive software resources
2622 **/
2623void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2624 struct ixgbevf_ring *rx_ring)
2625{
2626 struct pci_dev *pdev = adapter->pdev;
2627
2628 ixgbevf_clean_rx_ring(adapter, rx_ring);
2629
2630 vfree(rx_ring->rx_buffer_info);
2631 rx_ring->rx_buffer_info = NULL;
2632
2a1f8794
NN		 2633 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2634 rx_ring->dma);
92915f71
GR		 2635
2636 rx_ring->desc = NULL;
2637}
2638
2639/**
2640 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2641 * @adapter: board private structure
2642 *
2643 * Free all receive software resources
2644 **/
2645static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2646{
2647 int i;
2648
2649 for (i = 0; i < adapter->num_rx_queues; i++)
2650 if (adapter->rx_ring[i].desc)
2651 ixgbevf_free_rx_resources(adapter,
2652 &adapter->rx_ring[i]);
2653}
2654
2655/**
2656 * ixgbevf_open - Called when a network interface is made active
2657 * @netdev: network interface device structure
2658 *
2659 * Returns 0 on success, negative value on failure
2660 *
2661 * The open entry point is called when a network interface is made
2662 * active by the system (IFF_UP). At this point all resources needed
2663 * for transmit and receive operations are allocated, the interrupt
2664 * handler is registered with the OS, the watchdog timer is started,
2665 * and the stack is notified that the interface is ready.
2666 **/
2667static int ixgbevf_open(struct net_device *netdev)
2668{
2669 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2670 struct ixgbe_hw *hw = &adapter->hw;
2671 int err;
2672
2673 /* disallow open during test */
2674 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2675 return -EBUSY;
2676
2677 if (hw->adapter_stopped) {
2678 ixgbevf_reset(adapter);
2679 /* if adapter is still stopped then PF isn't up and
2680 * the vf can't start. */
2681 if (hw->adapter_stopped) {
2682 err = IXGBE_ERR_MBX;
2683 printk(KERN_ERR "Unable to start - perhaps the PF"
29b8dd02 2684 " Driver isn't up yet\n");
92915f71
GR		 2685 goto err_setup_reset;
2686 }
2687 }
2688
2689 /* allocate transmit descriptors */
2690 err = ixgbevf_setup_all_tx_resources(adapter);
2691 if (err)
2692 goto err_setup_tx;
2693
2694 /* allocate receive descriptors */
2695 err = ixgbevf_setup_all_rx_resources(adapter);
2696 if (err)
2697 goto err_setup_rx;
2698
2699 ixgbevf_configure(adapter);
2700
2701 /*
2702 * Map the Tx/Rx rings to the vectors we were allotted.
2703 * if request_irq will be called in this function map_rings
2704 * must be called *before* up_complete
2705 */
2706 ixgbevf_map_rings_to_vectors(adapter);
2707
2708 err = ixgbevf_up_complete(adapter);
2709 if (err)
2710 goto err_up;
2711
2712 /* clear any pending interrupts, may auto mask */
2713 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2714 err = ixgbevf_request_irq(adapter);
2715 if (err)
2716 goto err_req_irq;
2717
2718 ixgbevf_irq_enable(adapter, true, true);
2719
2720 return 0;
2721
2722err_req_irq:
2723 ixgbevf_down(adapter);
2724err_up:
2725 ixgbevf_free_irq(adapter);
2726err_setup_rx:
2727 ixgbevf_free_all_rx_resources(adapter);
2728err_setup_tx:
2729 ixgbevf_free_all_tx_resources(adapter);
2730 ixgbevf_reset(adapter);
2731
2732err_setup_reset:
2733
2734 return err;
2735}
2736
2737/**
2738 * ixgbevf_close - Disables a network interface
2739 * @netdev: network interface device structure
2740 *
2741 * Returns 0, this is not allowed to fail
2742 *
2743 * The close entry point is called when an interface is de-activated
2744 * by the OS. The hardware is still under the drivers control, but
2745 * needs to be disabled. A global MAC reset is issued to stop the
2746 * hardware, and all transmit and receive resources are freed.
2747 **/
2748static int ixgbevf_close(struct net_device *netdev)
2749{
2750 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2751
2752 ixgbevf_down(adapter);
2753 ixgbevf_free_irq(adapter);
2754
2755 ixgbevf_free_all_tx_resources(adapter);
2756 ixgbevf_free_all_rx_resources(adapter);
2757
2758 return 0;
2759}
2760
2761static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2762 struct ixgbevf_ring *tx_ring,
2763 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2764{
2765 struct ixgbe_adv_tx_context_desc *context_desc;
2766 unsigned int i;
2767 int err;
2768 struct ixgbevf_tx_buffer *tx_buffer_info;
2769 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2770 u32 mss_l4len_idx, l4len;
2771
2772 if (skb_is_gso(skb)) {
2773 if (skb_header_cloned(skb)) {
2774 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2775 if (err)
2776 return err;
2777 }
2778 l4len = tcp_hdrlen(skb);
2779 *hdr_len += l4len;
2780
2781 if (skb->protocol == htons(ETH_P_IP)) {
2782 struct iphdr *iph = ip_hdr(skb);
2783 iph->tot_len = 0;
2784 iph->check = 0;
2785 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2786 iph->daddr, 0,
2787 IPPROTO_TCP,
2788 0);
2789 adapter->hw_tso_ctxt++;
9010bc33 2790 } else if (skb_is_gso_v6(skb)) {
92915f71
GR		 2791 ipv6_hdr(skb)->payload_len = 0;
2792 tcp_hdr(skb)->check =
2793 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2794 &ipv6_hdr(skb)->daddr,
2795 0, IPPROTO_TCP, 0);
2796 adapter->hw_tso6_ctxt++;
2797 }
2798
2799 i = tx_ring->next_to_use;
2800
2801 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2802 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2803
2804 /* VLAN MACLEN IPLEN */
2805 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2806 vlan_macip_lens |=
2807 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2808 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2809 IXGBE_ADVTXD_MACLEN_SHIFT);
2810 *hdr_len += skb_network_offset(skb);
2811 vlan_macip_lens |=
2812 (skb_transport_header(skb) - skb_network_header(skb));
2813 *hdr_len +=
2814 (skb_transport_header(skb) - skb_network_header(skb));
2815 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2816 context_desc->seqnum_seed = 0;
2817
2818 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2819 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2820 IXGBE_ADVTXD_DTYP_CTXT);
2821
2822 if (skb->protocol == htons(ETH_P_IP))
2823 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2824 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2825 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2826
2827 /* MSS L4LEN IDX */
2828 mss_l4len_idx =
2829 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2830 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2831 /* use index 1 for TSO */
2832 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2833 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2834
2835 tx_buffer_info->time_stamp = jiffies;
2836 tx_buffer_info->next_to_watch = i;
2837
2838 i++;
2839 if (i == tx_ring->count)
2840 i = 0;
2841 tx_ring->next_to_use = i;
2842
2843 return true;
2844 }
2845
2846 return false;
2847}
2848
2849static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2850 struct ixgbevf_ring *tx_ring,
2851 struct sk_buff *skb, u32 tx_flags)
2852{
2853 struct ixgbe_adv_tx_context_desc *context_desc;
2854 unsigned int i;
2855 struct ixgbevf_tx_buffer *tx_buffer_info;
2856 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2857
2858 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2859 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2860 i = tx_ring->next_to_use;
2861 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2862 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2863
2864 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2865 vlan_macip_lens |= (tx_flags &
2866 IXGBE_TX_FLAGS_VLAN_MASK);
2867 vlan_macip_lens |= (skb_network_offset(skb) <<
2868 IXGBE_ADVTXD_MACLEN_SHIFT);
2869 if (skb->ip_summed == CHECKSUM_PARTIAL)
2870 vlan_macip_lens |= (skb_transport_header(skb) -
2871 skb_network_header(skb));
2872
2873 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2874 context_desc->seqnum_seed = 0;
2875
2876 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2877 IXGBE_ADVTXD_DTYP_CTXT);
2878
2879 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2880 switch (skb->protocol) {
2881 case __constant_htons(ETH_P_IP):
2882 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2883 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2884 type_tucmd_mlhl |=
2885 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2886 break;
2887 case __constant_htons(ETH_P_IPV6):
2888 /* XXX what about other V6 headers?? */
2889 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2890 type_tucmd_mlhl |=
2891 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2892 break;
2893 default:
2894 if (unlikely(net_ratelimit())) {
2895 printk(KERN_WARNING
2896 "partial checksum but "
2897 "proto=%x!\n",
2898 skb->protocol);
2899 }
2900 break;
2901 }
2902 }
2903
2904 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2905 /* use index zero for tx checksum offload */
2906 context_desc->mss_l4len_idx = 0;
2907
2908 tx_buffer_info->time_stamp = jiffies;
2909 tx_buffer_info->next_to_watch = i;
2910
2911 adapter->hw_csum_tx_good++;
2912 i++;
2913 if (i == tx_ring->count)
2914 i = 0;
2915 tx_ring->next_to_use = i;
2916
2917 return true;
2918 }
2919
2920 return false;
2921}
2922
2923static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2924 struct ixgbevf_ring *tx_ring,
2925 struct sk_buff *skb, u32 tx_flags,
2926 unsigned int first)
2927{
2928 struct pci_dev *pdev = adapter->pdev;
2929 struct ixgbevf_tx_buffer *tx_buffer_info;
2930 unsigned int len;
2931 unsigned int total = skb->len;
2540ddb5
KV		 2932 unsigned int offset = 0, size;
2933 int count = 0;
92915f71
GR		 2934 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2935 unsigned int f;
65deeed7 2936 int i;
92915f71
GR		 2937
2938 i = tx_ring->next_to_use;
2939
2940 len = min(skb_headlen(skb), total);
2941 while (len) {
2942 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2943 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2944
2945 tx_buffer_info->length = size;
2946 tx_buffer_info->mapped_as_page = false;
2a1f8794 2947 tx_buffer_info->dma = dma_map_single(&adapter->pdev->dev,
92915f71 2948 skb->data + offset,
2a1f8794
NN		 2949 size, DMA_TO_DEVICE);
2950 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2951 goto dma_error;
2952 tx_buffer_info->time_stamp = jiffies;
2953 tx_buffer_info->next_to_watch = i;
2954
2955 len -= size;
2956 total -= size;
2957 offset += size;
2958 count++;
2959 i++;
2960 if (i == tx_ring->count)
2961 i = 0;
2962 }
2963
2964 for (f = 0; f < nr_frags; f++) {
2965 struct skb_frag_struct *frag;
2966
2967 frag = &skb_shinfo(skb)->frags[f];
2968 len = min((unsigned int)frag->size, total);
2969 offset = frag->page_offset;
2970
2971 while (len) {
2972 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2973 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2974
2975 tx_buffer_info->length = size;
2a1f8794 2976 tx_buffer_info->dma = dma_map_page(&adapter->pdev->dev,
92915f71
GR		 2977 frag->page,
2978 offset,
2979 size,
2a1f8794 2980 DMA_TO_DEVICE);
92915f71 2981 tx_buffer_info->mapped_as_page = true;
2a1f8794 2982 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2983 goto dma_error;
2984 tx_buffer_info->time_stamp = jiffies;
2985 tx_buffer_info->next_to_watch = i;
2986
2987 len -= size;
2988 total -= size;
2989 offset += size;
2990 count++;
2991 i++;
2992 if (i == tx_ring->count)
2993 i = 0;
2994 }
2995 if (total == 0)
2996 break;
2997 }
2998
2999 if (i == 0)
3000 i = tx_ring->count - 1;
3001 else
3002 i = i - 1;
3003 tx_ring->tx_buffer_info[i].skb = skb;
3004 tx_ring->tx_buffer_info[first].next_to_watch = i;
3005
3006 return count;
3007
3008dma_error:
3009 dev_err(&pdev->dev, "TX DMA map failed\n");
3010
3011 /* clear timestamp and dma mappings for failed tx_buffer_info map */
3012 tx_buffer_info->dma = 0;
3013 tx_buffer_info->time_stamp = 0;
3014 tx_buffer_info->next_to_watch = 0;
3015 count--;
3016
3017 /* clear timestamp and dma mappings for remaining portion of packet */
3018 while (count >= 0) {
3019 count--;
3020 i--;
3021 if (i < 0)
3022 i += tx_ring->count;
3023 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3024 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3025 }
3026
3027 return count;
3028}
3029
3030static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
3031 struct ixgbevf_ring *tx_ring, int tx_flags,
3032 int count, u32 paylen, u8 hdr_len)
3033{
3034 union ixgbe_adv_tx_desc *tx_desc = NULL;
3035 struct ixgbevf_tx_buffer *tx_buffer_info;
3036 u32 olinfo_status = 0, cmd_type_len = 0;
3037 unsigned int i;
3038
3039 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3040
3041 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3042
3043 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3044
3045 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3046 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3047
3048 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3049 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3050
3051 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3052 IXGBE_ADVTXD_POPTS_SHIFT;
3053
3054 /* use index 1 context for tso */
3055 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3056 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3057 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3058 IXGBE_ADVTXD_POPTS_SHIFT;
3059
3060 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3061 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3062 IXGBE_ADVTXD_POPTS_SHIFT;
3063
3064 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3065
3066 i = tx_ring->next_to_use;
3067 while (count--) {
3068 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3069 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3070 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3071 tx_desc->read.cmd_type_len =
3072 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3073 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3074 i++;
3075 if (i == tx_ring->count)
3076 i = 0;
3077 }
3078
3079 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3080
3081 /*
3082 * Force memory writes to complete before letting h/w
3083 * know there are new descriptors to fetch. (Only
3084 * applicable for weak-ordered memory model archs,
3085 * such as IA-64).
3086 */
3087 wmb();
3088
3089 tx_ring->next_to_use = i;
3090 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3091}
3092
3093static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
3094 struct ixgbevf_ring *tx_ring, int size)
3095{
3096 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3097
3098 netif_stop_subqueue(netdev, tx_ring->queue_index);
3099 /* Herbert's original patch had:
3100 * smp_mb__after_netif_stop_queue();
3101 * but since that doesn't exist yet, just open code it. */
3102 smp_mb();
3103
3104 /* We need to check again in a case another CPU has just
3105 * made room available. */
3106 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3107 return -EBUSY;
3108
3109 /* A reprieve! - use start_queue because it doesn't call schedule */
3110 netif_start_subqueue(netdev, tx_ring->queue_index);
3111 ++adapter->restart_queue;
3112 return 0;
3113}
3114
3115static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
3116 struct ixgbevf_ring *tx_ring, int size)
3117{
3118 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3119 return 0;
3120 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
3121}
3122
3123static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3124{
3125 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3126 struct ixgbevf_ring *tx_ring;
3127 unsigned int first;
3128 unsigned int tx_flags = 0;
3129 u8 hdr_len = 0;
3130 int r_idx = 0, tso;
3131 int count = 0;
3132
3133 unsigned int f;
3134
3135 tx_ring = &adapter->tx_ring[r_idx];
3136
3137 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3138 tx_flags |= vlan_tx_tag_get(skb);
3139 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3140 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3141 }
3142
3143 /* four things can cause us to need a context descriptor */
3144 if (skb_is_gso(skb) ||
3145 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3146 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3147 count++;
3148
3149 count += TXD_USE_COUNT(skb_headlen(skb));
3150 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3151 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3152
3153 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) {
3154 adapter->tx_busy++;
3155 return NETDEV_TX_BUSY;
3156 }
3157
3158 first = tx_ring->next_to_use;
3159
3160 if (skb->protocol == htons(ETH_P_IP))
3161 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3162 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3163 if (tso < 0) {
3164 dev_kfree_skb_any(skb);
3165 return NETDEV_TX_OK;
3166 }
3167
3168 if (tso)
3169 tx_flags |= IXGBE_TX_FLAGS_TSO;
3170 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3171 (skb->ip_summed == CHECKSUM_PARTIAL))
3172 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3173
3174 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
3175 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
3176 skb->len, hdr_len);
3177
92915f71
GR		 3178 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3179
3180 return NETDEV_TX_OK;
3181}
3182
3183/**
3184 * ixgbevf_get_stats - Get System Network Statistics
3185 * @netdev: network interface device structure
3186 *
3187 * Returns the address of the device statistics structure.
3188 * The statistics are actually updated from the timer callback.
3189 **/
3190static struct net_device_stats *ixgbevf_get_stats(struct net_device *netdev)
3191{
3192 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3193
3194 /* only return the current stats */
3195 return &adapter->net_stats;
3196}
3197
3198/**
3199 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3200 * @netdev: network interface device structure
3201 * @p: pointer to an address structure
3202 *
3203 * Returns 0 on success, negative on failure
3204 **/
3205static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3206{
3207 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3208 struct ixgbe_hw *hw = &adapter->hw;
3209 struct sockaddr *addr = p;
3210
3211 if (!is_valid_ether_addr(addr->sa_data))
3212 return -EADDRNOTAVAIL;
3213
3214 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3215 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3216
3217 if (hw->mac.ops.set_rar)
3218 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3219
3220 return 0;
3221}
3222
3223/**
3224 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3225 * @netdev: network interface device structure
3226 * @new_mtu: new value for maximum frame size
3227 *
3228 * Returns 0 on success, negative on failure
3229 **/
3230static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3231{
3232 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3233 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3234
3235 /* MTU < 68 is an error and causes problems on some kernels */
3236 if ((new_mtu < 68) || (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
3237 return -EINVAL;
3238
3239 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3240 netdev->mtu, new_mtu);
3241 /* must set new MTU before calling down or up */
3242 netdev->mtu = new_mtu;
3243
3244 if (netif_running(netdev))
3245 ixgbevf_reinit_locked(adapter);
3246
3247 return 0;
3248}
3249
3250static void ixgbevf_shutdown(struct pci_dev *pdev)
3251{
3252 struct net_device *netdev = pci_get_drvdata(pdev);
3253 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3254
3255 netif_device_detach(netdev);
3256
3257 if (netif_running(netdev)) {
3258 ixgbevf_down(adapter);
3259 ixgbevf_free_irq(adapter);
3260 ixgbevf_free_all_tx_resources(adapter);
3261 ixgbevf_free_all_rx_resources(adapter);
3262 }
3263
3264#ifdef CONFIG_PM
3265 pci_save_state(pdev);
3266#endif
3267
3268 pci_disable_device(pdev);
3269}
3270
92915f71
GR		 3271static const struct net_device_ops ixgbe_netdev_ops = {
3272 .ndo_open = &ixgbevf_open,
3273 .ndo_stop = &ixgbevf_close,
3274 .ndo_start_xmit = &ixgbevf_xmit_frame,
3275 .ndo_get_stats = &ixgbevf_get_stats,
3276 .ndo_set_rx_mode = &ixgbevf_set_rx_mode,
3277 .ndo_set_multicast_list = &ixgbevf_set_rx_mode,
3278 .ndo_validate_addr = eth_validate_addr,
3279 .ndo_set_mac_address = &ixgbevf_set_mac,
3280 .ndo_change_mtu = &ixgbevf_change_mtu,
3281 .ndo_tx_timeout = &ixgbevf_tx_timeout,
3282 .ndo_vlan_rx_register = &ixgbevf_vlan_rx_register,
3283 .ndo_vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid,
3284 .ndo_vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid,
3285};
92915f71
GR		 3286
3287static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3288{
3289 struct ixgbevf_adapter *adapter;
3290 adapter = netdev_priv(dev);
92915f71 3291 dev->netdev_ops = &ixgbe_netdev_ops;
92915f71
GR		 3292 ixgbevf_set_ethtool_ops(dev);
3293 dev->watchdog_timeo = 5 * HZ;
3294}
3295
3296/**
3297 * ixgbevf_probe - Device Initialization Routine
3298 * @pdev: PCI device information struct
3299 * @ent: entry in ixgbevf_pci_tbl
3300 *
3301 * Returns 0 on success, negative on failure
3302 *
3303 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3304 * The OS initialization, configuring of the adapter private structure,
3305 * and a hardware reset occur.
3306 **/
3307static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3308 const struct pci_device_id *ent)
3309{
3310 struct net_device *netdev;
3311 struct ixgbevf_adapter *adapter = NULL;
3312 struct ixgbe_hw *hw = NULL;
3313 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3314 static int cards_found;
3315 int err, pci_using_dac;
3316
3317 err = pci_enable_device(pdev);
3318 if (err)
3319 return err;
3320
2a1f8794
NN		 3321 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3322 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3323 pci_using_dac = 1;
3324 } else {
2a1f8794 3325 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3326 if (err) {
2a1f8794
NN		 3327 err = dma_set_coherent_mask(&pdev->dev,
3328 DMA_BIT_MASK(32));
92915f71
GR		 3329 if (err) {
3330 dev_err(&pdev->dev, "No usable DMA "
3331 "configuration, aborting\n");
3332 goto err_dma;
3333 }
3334 }
3335 pci_using_dac = 0;
3336 }
3337
3338 err = pci_request_regions(pdev, ixgbevf_driver_name);
3339 if (err) {
3340 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3341 goto err_pci_reg;
3342 }
3343
3344 pci_set_master(pdev);
3345
3346#ifdef HAVE_TX_MQ
3347 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3348 MAX_TX_QUEUES);
3349#else
3350 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter));
3351#endif
3352 if (!netdev) {
3353 err = -ENOMEM;
3354 goto err_alloc_etherdev;
3355 }
3356
3357 SET_NETDEV_DEV(netdev, &pdev->dev);
3358
3359 pci_set_drvdata(pdev, netdev);
3360 adapter = netdev_priv(netdev);
3361
3362 adapter->netdev = netdev;
3363 adapter->pdev = pdev;
3364 hw = &adapter->hw;
3365 hw->back = adapter;
3366 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3367
3368 /*
3369 * call save state here in standalone driver because it relies on
3370 * adapter struct to exist, and needs to call netdev_priv
3371 */
3372 pci_save_state(pdev);
3373
3374 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3375 pci_resource_len(pdev, 0));
3376 if (!hw->hw_addr) {
3377 err = -EIO;
3378 goto err_ioremap;
3379 }
3380
3381 ixgbevf_assign_netdev_ops(netdev);
3382
3383 adapter->bd_number = cards_found;
3384
3385 /* Setup hw api */
3386 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3387 hw->mac.type = ii->mac;
3388
3389 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
3390 sizeof(struct ixgbe_mac_operations));
3391
3392 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE;
3393 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
3394 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE;
3395
3396 /* setup the private structure */
3397 err = ixgbevf_sw_init(adapter);
3398
92915f71
GR		 3399 netdev->features = NETIF_F_SG |
3400 NETIF_F_IP_CSUM |
3401 NETIF_F_HW_VLAN_TX |
3402 NETIF_F_HW_VLAN_RX |
3403 NETIF_F_HW_VLAN_FILTER;
3404
3405 netdev->features |= NETIF_F_IPV6_CSUM;
3406 netdev->features |= NETIF_F_TSO;
3407 netdev->features |= NETIF_F_TSO6;
e59d44df 3408 netdev->features |= NETIF_F_GRO;
92915f71
GR		 3409 netdev->vlan_features |= NETIF_F_TSO;
3410 netdev->vlan_features |= NETIF_F_TSO6;
3411 netdev->vlan_features |= NETIF_F_IP_CSUM;
3bfacf96 3412 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
92915f71
GR		 3413 netdev->vlan_features |= NETIF_F_SG;
3414
3415 if (pci_using_dac)
3416 netdev->features |= NETIF_F_HIGHDMA;
3417
92915f71
GR		 3418 /* The HW MAC address was set and/or determined in sw_init */
3419 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
3420 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3421
3422 if (!is_valid_ether_addr(netdev->dev_addr)) {
3423 printk(KERN_ERR "invalid MAC address\n");
3424 err = -EIO;
3425 goto err_sw_init;
3426 }
3427
3428 init_timer(&adapter->watchdog_timer);
c061b18d 3429 adapter->watchdog_timer.function = ixgbevf_watchdog;
92915f71
GR		 3430 adapter->watchdog_timer.data = (unsigned long)adapter;
3431
3432 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3433 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3434
3435 err = ixgbevf_init_interrupt_scheme(adapter);
3436 if (err)
3437 goto err_sw_init;
3438
3439 /* pick up the PCI bus settings for reporting later */
3440 if (hw->mac.ops.get_bus_info)
3441 hw->mac.ops.get_bus_info(hw);
3442
3443
3444 netif_carrier_off(netdev);
3445 netif_tx_stop_all_queues(netdev);
3446
3447 strcpy(netdev->name, "eth%d");
3448
3449 err = register_netdev(netdev);
3450 if (err)
3451 goto err_register;
3452
3453 adapter->netdev_registered = true;
3454
33bd9f60
GR		 3455 ixgbevf_init_last_counter_stats(adapter);
3456
92915f71
GR		 3457 /* print the MAC address */
3458 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
3459 netdev->dev_addr[0],
3460 netdev->dev_addr[1],
3461 netdev->dev_addr[2],
3462 netdev->dev_addr[3],
3463 netdev->dev_addr[4],
3464 netdev->dev_addr[5]);
3465
3466 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3467
d6dbee86 3468 hw_dbg(hw, "LRO is disabled\n");
92915f71
GR		 3469
3470 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3471 cards_found++;
3472 return 0;
3473
3474err_register:
3475err_sw_init:
3476 ixgbevf_reset_interrupt_capability(adapter);
3477 iounmap(hw->hw_addr);
3478err_ioremap:
3479 free_netdev(netdev);
3480err_alloc_etherdev:
3481 pci_release_regions(pdev);
3482err_pci_reg:
3483err_dma:
3484 pci_disable_device(pdev);
3485 return err;
3486}
3487
3488/**
3489 * ixgbevf_remove - Device Removal Routine
3490 * @pdev: PCI device information struct
3491 *
3492 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3493 * that it should release a PCI device. The could be caused by a
3494 * Hot-Plug event, or because the driver is going to be removed from
3495 * memory.
3496 **/
3497static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3498{
3499 struct net_device *netdev = pci_get_drvdata(pdev);
3500 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3501
3502 set_bit(__IXGBEVF_DOWN, &adapter->state);
3503
3504 del_timer_sync(&adapter->watchdog_timer);
3505
3506 cancel_work_sync(&adapter->watchdog_task);
3507
3508 flush_scheduled_work();
3509
3510 if (adapter->netdev_registered) {
3511 unregister_netdev(netdev);
3512 adapter->netdev_registered = false;
3513 }
3514
3515 ixgbevf_reset_interrupt_capability(adapter);
3516
3517 iounmap(adapter->hw.hw_addr);
3518 pci_release_regions(pdev);
3519
3520 hw_dbg(&adapter->hw, "Remove complete\n");
3521
3522 kfree(adapter->tx_ring);
3523 kfree(adapter->rx_ring);
3524
3525 free_netdev(netdev);
3526
3527 pci_disable_device(pdev);
3528}
3529
3530static struct pci_driver ixgbevf_driver = {
3531 .name = ixgbevf_driver_name,
3532 .id_table = ixgbevf_pci_tbl,
3533 .probe = ixgbevf_probe,
3534 .remove = __devexit_p(ixgbevf_remove),
3535 .shutdown = ixgbevf_shutdown,
3536};
3537
3538/**
3539 * ixgbe_init_module - Driver Registration Routine
3540 *
3541 * ixgbe_init_module is the first routine called when the driver is
3542 * loaded. All it does is register with the PCI subsystem.
3543 **/
3544static int __init ixgbevf_init_module(void)
3545{
3546 int ret;
3547 printk(KERN_INFO "ixgbevf: %s - version %s\n", ixgbevf_driver_string,
3548 ixgbevf_driver_version);
3549
3550 printk(KERN_INFO "%s\n", ixgbevf_copyright);
3551
3552 ret = pci_register_driver(&ixgbevf_driver);
3553 return ret;
3554}
3555
3556module_init(ixgbevf_init_module);
3557
3558/**
3559 * ixgbe_exit_module - Driver Exit Cleanup Routine
3560 *
3561 * ixgbe_exit_module is called just before the driver is removed
3562 * from memory.
3563 **/
3564static void __exit ixgbevf_exit_module(void)
3565{
3566 pci_unregister_driver(&ixgbevf_driver);
3567}
3568
3569#ifdef DEBUG
3570/**
3571 * ixgbe_get_hw_dev_name - return device name string
3572 * used by hardware layer to print debugging information
3573 **/
3574char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3575{
3576 struct ixgbevf_adapter *adapter = hw->back;
3577 return adapter->netdev->name;
3578}
3579
3580#endif
3581module_exit(ixgbevf_exit_module);
3582
3583/* ixgbevf_main.c */
Clone of davem's net-next-2.6 tree