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1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
32#include <linux/types.h>
33#include <linux/module.h>
34#include <linux/pci.h>
35#include <linux/netdevice.h>
36#include <linux/vmalloc.h>
37#include <linux/string.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
5a0e3ad6 42#include <linux/slab.h>
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43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47
48#include "ixgbevf.h"
49
50char ixgbevf_driver_name[] = "ixgbevf";
51static const char ixgbevf_driver_string[] =
52 "Intel(R) 82599 Virtual Function";
53
54#define DRV_VERSION "1.0.0-k0"
55const char ixgbevf_driver_version[] = DRV_VERSION;
56static char ixgbevf_copyright[] = "Copyright (c) 2009 Intel Corporation.";
57
58static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
59 [board_82599_vf] = &ixgbevf_vf_info,
60};
61
62/* ixgbevf_pci_tbl - PCI Device ID Table
63 *
64 * Wildcard entries (PCI_ANY_ID) should come last
65 * Last entry must be all 0s
66 *
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
69 */
70static struct pci_device_id ixgbevf_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
72 board_82599_vf},
73
74 /* required last entry */
75 {0, }
76};
77MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
78
79MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
80MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
81MODULE_LICENSE("GPL");
82MODULE_VERSION(DRV_VERSION);
83
84#define DEFAULT_DEBUG_LEVEL_SHIFT 3
85
86/* forward decls */
87static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector);
88static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
89 u32 itr_reg);
90
91static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
92 struct ixgbevf_ring *rx_ring,
93 u32 val)
94{
95 /*
96 * Force memory writes to complete before letting h/w
97 * know there are new descriptors to fetch. (Only
98 * applicable for weak-ordered memory model archs,
99 * such as IA-64).
100 */
101 wmb();
102 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
103}
104
105/*
106 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
107 * @adapter: pointer to adapter struct
108 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
109 * @queue: queue to map the corresponding interrupt to
110 * @msix_vector: the vector to map to the corresponding queue
111 *
112 */
113static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
114 u8 queue, u8 msix_vector)
115{
116 u32 ivar, index;
117 struct ixgbe_hw *hw = &adapter->hw;
118 if (direction == -1) {
119 /* other causes */
120 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
121 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
122 ivar &= ~0xFF;
123 ivar |= msix_vector;
124 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
125 } else {
126 /* tx or rx causes */
127 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
128 index = ((16 * (queue & 1)) + (8 * direction));
129 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
130 ivar &= ~(0xFF << index);
131 ivar |= (msix_vector << index);
132 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
133 }
134}
135
136static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
137 struct ixgbevf_tx_buffer
138 *tx_buffer_info)
139{
140 if (tx_buffer_info->dma) {
141 if (tx_buffer_info->mapped_as_page)
2a1f8794 142 dma_unmap_page(&adapter->pdev->dev,
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143 tx_buffer_info->dma,
144 tx_buffer_info->length,
2a1f8794 145 DMA_TO_DEVICE);
92915f71 146 else
2a1f8794 147 dma_unmap_single(&adapter->pdev->dev,
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148 tx_buffer_info->dma,
149 tx_buffer_info->length,
2a1f8794 150 DMA_TO_DEVICE);
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151 tx_buffer_info->dma = 0;
152 }
153 if (tx_buffer_info->skb) {
154 dev_kfree_skb_any(tx_buffer_info->skb);
155 tx_buffer_info->skb = NULL;
156 }
157 tx_buffer_info->time_stamp = 0;
158 /* tx_buffer_info must be completely set up in the transmit path */
159}
160
161static inline bool ixgbevf_check_tx_hang(struct ixgbevf_adapter *adapter,
162 struct ixgbevf_ring *tx_ring,
163 unsigned int eop)
164{
165 struct ixgbe_hw *hw = &adapter->hw;
166 u32 head, tail;
167
168 /* Detect a transmit hang in hardware, this serializes the
169 * check with the clearing of time_stamp and movement of eop */
170 head = readl(hw->hw_addr + tx_ring->head);
171 tail = readl(hw->hw_addr + tx_ring->tail);
172 adapter->detect_tx_hung = false;
173 if ((head != tail) &&
174 tx_ring->tx_buffer_info[eop].time_stamp &&
175 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ)) {
176 /* detected Tx unit hang */
177 union ixgbe_adv_tx_desc *tx_desc;
178 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
179 printk(KERN_ERR "Detected Tx Unit Hang\n"
180 " Tx Queue <%d>\n"
181 " TDH, TDT <%x>, <%x>\n"
182 " next_to_use <%x>\n"
183 " next_to_clean <%x>\n"
184 "tx_buffer_info[next_to_clean]\n"
185 " time_stamp <%lx>\n"
186 " jiffies <%lx>\n",
187 tx_ring->queue_index,
188 head, tail,
189 tx_ring->next_to_use, eop,
190 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
191 return true;
192 }
193
194 return false;
195}
196
197#define IXGBE_MAX_TXD_PWR 14
198#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
199
200/* Tx Descriptors needed, worst case */
201#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
202 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
203#ifdef MAX_SKB_FRAGS
204#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
205 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
206#else
207#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD)
208#endif
209
210static void ixgbevf_tx_timeout(struct net_device *netdev);
211
212/**
213 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
214 * @adapter: board private structure
215 * @tx_ring: tx ring to clean
216 **/
217static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter,
218 struct ixgbevf_ring *tx_ring)
219{
220 struct net_device *netdev = adapter->netdev;
221 struct ixgbe_hw *hw = &adapter->hw;
222 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
223 struct ixgbevf_tx_buffer *tx_buffer_info;
224 unsigned int i, eop, count = 0;
225 unsigned int total_bytes = 0, total_packets = 0;
226
227 i = tx_ring->next_to_clean;
228 eop = tx_ring->tx_buffer_info[i].next_to_watch;
229 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
230
231 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
232 (count < tx_ring->work_limit)) {
233 bool cleaned = false;
234 for ( ; !cleaned; count++) {
235 struct sk_buff *skb;
236 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
237 tx_buffer_info = &tx_ring->tx_buffer_info[i];
238 cleaned = (i == eop);
239 skb = tx_buffer_info->skb;
240
241 if (cleaned && skb) {
242 unsigned int segs, bytecount;
243
244 /* gso_segs is currently only valid for tcp */
245 segs = skb_shinfo(skb)->gso_segs ?: 1;
246 /* multiply data chunks by size of headers */
247 bytecount = ((segs - 1) * skb_headlen(skb)) +
248 skb->len;
249 total_packets += segs;
250 total_bytes += bytecount;
251 }
252
253 ixgbevf_unmap_and_free_tx_resource(adapter,
254 tx_buffer_info);
255
256 tx_desc->wb.status = 0;
257
258 i++;
259 if (i == tx_ring->count)
260 i = 0;
261 }
262
263 eop = tx_ring->tx_buffer_info[i].next_to_watch;
264 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
265 }
266
267 tx_ring->next_to_clean = i;
268
269#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
270 if (unlikely(count && netif_carrier_ok(netdev) &&
271 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
272 /* Make sure that anybody stopping the queue after this
273 * sees the new next_to_clean.
274 */
275 smp_mb();
276#ifdef HAVE_TX_MQ
277 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
278 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
279 netif_wake_subqueue(netdev, tx_ring->queue_index);
280 ++adapter->restart_queue;
281 }
282#else
283 if (netif_queue_stopped(netdev) &&
284 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
285 netif_wake_queue(netdev);
286 ++adapter->restart_queue;
287 }
288#endif
289 }
290
291 if (adapter->detect_tx_hung) {
292 if (ixgbevf_check_tx_hang(adapter, tx_ring, i)) {
293 /* schedule immediate reset if we believe we hung */
294 printk(KERN_INFO
295 "tx hang %d detected, resetting adapter\n",
296 adapter->tx_timeout_count + 1);
297 ixgbevf_tx_timeout(adapter->netdev);
298 }
299 }
300
301 /* re-arm the interrupt */
302 if ((count >= tx_ring->work_limit) &&
303 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) {
304 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);
305 }
306
307 tx_ring->total_bytes += total_bytes;
308 tx_ring->total_packets += total_packets;
309
310 adapter->net_stats.tx_bytes += total_bytes;
311 adapter->net_stats.tx_packets += total_packets;
312
313 return (count < tx_ring->work_limit);
314}
315
316/**
317 * ixgbevf_receive_skb - Send a completed packet up the stack
318 * @q_vector: structure containing interrupt and ring information
319 * @skb: packet to send up
320 * @status: hardware indication of status of receive
321 * @rx_ring: rx descriptor ring (for a specific queue) to setup
322 * @rx_desc: rx descriptor
323 **/
324static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
325 struct sk_buff *skb, u8 status,
326 struct ixgbevf_ring *ring,
327 union ixgbe_adv_rx_desc *rx_desc)
328{
329 struct ixgbevf_adapter *adapter = q_vector->adapter;
330 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
331 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
332 int ret;
333
334 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
335 if (adapter->vlgrp && is_vlan)
336 vlan_gro_receive(&q_vector->napi,
337 adapter->vlgrp,
338 tag, skb);
339 else
340 napi_gro_receive(&q_vector->napi, skb);
341 } else {
342 if (adapter->vlgrp && is_vlan)
343 ret = vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
344 else
345 ret = netif_rx(skb);
346 }
347}
348
349/**
350 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
351 * @adapter: address of board private structure
352 * @status_err: hardware indication of status of receive
353 * @skb: skb currently being received and modified
354 **/
355static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
356 u32 status_err, struct sk_buff *skb)
357{
358 skb->ip_summed = CHECKSUM_NONE;
359
360 /* Rx csum disabled */
361 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
362 return;
363
364 /* if IP and error */
365 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
366 (status_err & IXGBE_RXDADV_ERR_IPE)) {
367 adapter->hw_csum_rx_error++;
368 return;
369 }
370
371 if (!(status_err & IXGBE_RXD_STAT_L4CS))
372 return;
373
374 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
375 adapter->hw_csum_rx_error++;
376 return;
377 }
378
379 /* It must be a TCP or UDP packet with a valid checksum */
380 skb->ip_summed = CHECKSUM_UNNECESSARY;
381 adapter->hw_csum_rx_good++;
382}
383
384/**
385 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
386 * @adapter: address of board private structure
387 **/
388static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
389 struct ixgbevf_ring *rx_ring,
390 int cleaned_count)
391{
392 struct pci_dev *pdev = adapter->pdev;
393 union ixgbe_adv_rx_desc *rx_desc;
394 struct ixgbevf_rx_buffer *bi;
395 struct sk_buff *skb;
396 unsigned int i;
397 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
398
399 i = rx_ring->next_to_use;
400 bi = &rx_ring->rx_buffer_info[i];
401
402 while (cleaned_count--) {
403 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
404
405 if (!bi->page_dma &&
406 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
407 if (!bi->page) {
408 bi->page = netdev_alloc_page(adapter->netdev);
409 if (!bi->page) {
410 adapter->alloc_rx_page_failed++;
411 goto no_buffers;
412 }
413 bi->page_offset = 0;
414 } else {
415 /* use a half page if we're re-using */
416 bi->page_offset ^= (PAGE_SIZE / 2);
417 }
418
2a1f8794 419 bi->page_dma = dma_map_page(&pdev->dev, bi->page,
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420 bi->page_offset,
421 (PAGE_SIZE / 2),
2a1f8794 422 DMA_FROM_DEVICE);
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423 }
424
425 skb = bi->skb;
426 if (!skb) {
427 skb = netdev_alloc_skb(adapter->netdev,
428 bufsz);
429
430 if (!skb) {
431 adapter->alloc_rx_buff_failed++;
432 goto no_buffers;
433 }
434
435 /*
436 * Make buffer alignment 2 beyond a 16 byte boundary
437 * this will result in a 16 byte aligned IP header after
438 * the 14 byte MAC header is removed
439 */
440 skb_reserve(skb, NET_IP_ALIGN);
441
442 bi->skb = skb;
443 }
444 if (!bi->dma) {
2a1f8794 445 bi->dma = dma_map_single(&pdev->dev, skb->data,
92915f71 446 rx_ring->rx_buf_len,
2a1f8794 447 DMA_FROM_DEVICE);
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448 }
449 /* Refresh the desc even if buffer_addrs didn't change because
450 * each write-back erases this info. */
451 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
452 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
453 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
454 } else {
455 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
456 }
457
458 i++;
459 if (i == rx_ring->count)
460 i = 0;
461 bi = &rx_ring->rx_buffer_info[i];
462 }
463
464no_buffers:
465 if (rx_ring->next_to_use != i) {
466 rx_ring->next_to_use = i;
467 if (i-- == 0)
468 i = (rx_ring->count - 1);
469
470 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
471 }
472}
473
474static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
475 u64 qmask)
476{
477 u32 mask;
478 struct ixgbe_hw *hw = &adapter->hw;
479
480 mask = (qmask & 0xFFFFFFFF);
481 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
482}
483
484static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
485{
486 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
487}
488
489static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
490{
491 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
492}
493
494static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
495 struct ixgbevf_ring *rx_ring,
496 int *work_done, int work_to_do)
497{
498 struct ixgbevf_adapter *adapter = q_vector->adapter;
499 struct pci_dev *pdev = adapter->pdev;
500 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
501 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
502 struct sk_buff *skb;
503 unsigned int i;
504 u32 len, staterr;
505 u16 hdr_info;
506 bool cleaned = false;
507 int cleaned_count = 0;
508 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
509
510 i = rx_ring->next_to_clean;
511 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
512 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
513 rx_buffer_info = &rx_ring->rx_buffer_info[i];
514
515 while (staterr & IXGBE_RXD_STAT_DD) {
516 u32 upper_len = 0;
517 if (*work_done >= work_to_do)
518 break;
519 (*work_done)++;
520
521 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
522 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc));
523 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
524 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
525 if (hdr_info & IXGBE_RXDADV_SPH)
526 adapter->rx_hdr_split++;
527 if (len > IXGBEVF_RX_HDR_SIZE)
528 len = IXGBEVF_RX_HDR_SIZE;
529 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
530 } else {
531 len = le16_to_cpu(rx_desc->wb.upper.length);
532 }
533 cleaned = true;
534 skb = rx_buffer_info->skb;
535 prefetch(skb->data - NET_IP_ALIGN);
536 rx_buffer_info->skb = NULL;
537
538 if (rx_buffer_info->dma) {
2a1f8794 539 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 540 rx_ring->rx_buf_len,
2a1f8794 541 DMA_FROM_DEVICE);
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542 rx_buffer_info->dma = 0;
543 skb_put(skb, len);
544 }
545
546 if (upper_len) {
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547 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
548 PAGE_SIZE / 2, DMA_FROM_DEVICE);
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549 rx_buffer_info->page_dma = 0;
550 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
551 rx_buffer_info->page,
552 rx_buffer_info->page_offset,
553 upper_len);
554
555 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
556 (page_count(rx_buffer_info->page) != 1))
557 rx_buffer_info->page = NULL;
558 else
559 get_page(rx_buffer_info->page);
560
561 skb->len += upper_len;
562 skb->data_len += upper_len;
563 skb->truesize += upper_len;
564 }
565
566 i++;
567 if (i == rx_ring->count)
568 i = 0;
569
570 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
571 prefetch(next_rxd);
572 cleaned_count++;
573
574 next_buffer = &rx_ring->rx_buffer_info[i];
575
576 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
577 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
578 rx_buffer_info->skb = next_buffer->skb;
579 rx_buffer_info->dma = next_buffer->dma;
580 next_buffer->skb = skb;
581 next_buffer->dma = 0;
582 } else {
583 skb->next = next_buffer->skb;
584 skb->next->prev = skb;
585 }
586 adapter->non_eop_descs++;
587 goto next_desc;
588 }
589
590 /* ERR_MASK will only have valid bits if EOP set */
591 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
592 dev_kfree_skb_irq(skb);
593 goto next_desc;
594 }
595
596 ixgbevf_rx_checksum(adapter, staterr, skb);
597
598 /* probably a little skewed due to removing CRC */
599 total_rx_bytes += skb->len;
600 total_rx_packets++;
601
602 /*
603 * Work around issue of some types of VM to VM loop back
604 * packets not getting split correctly
605 */
606 if (staterr & IXGBE_RXD_STAT_LB) {
e743d313 607 u32 header_fixup_len = skb_headlen(skb);
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608 if (header_fixup_len < 14)
609 skb_push(skb, header_fixup_len);
610 }
611 skb->protocol = eth_type_trans(skb, adapter->netdev);
612
613 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
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614
615next_desc:
616 rx_desc->wb.upper.status_error = 0;
617
618 /* return some buffers to hardware, one at a time is too slow */
619 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
620 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
621 cleaned_count);
622 cleaned_count = 0;
623 }
624
625 /* use prefetched values */
626 rx_desc = next_rxd;
627 rx_buffer_info = &rx_ring->rx_buffer_info[i];
628
629 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
630 }
631
632 rx_ring->next_to_clean = i;
633 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
634
635 if (cleaned_count)
636 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
637
638 rx_ring->total_packets += total_rx_packets;
639 rx_ring->total_bytes += total_rx_bytes;
640 adapter->net_stats.rx_bytes += total_rx_bytes;
641 adapter->net_stats.rx_packets += total_rx_packets;
642
643 return cleaned;
644}
645
646/**
647 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine
648 * @napi: napi struct with our devices info in it
649 * @budget: amount of work driver is allowed to do this pass, in packets
650 *
651 * This function is optimized for cleaning one queue only on a single
652 * q_vector!!!
653 **/
654static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
655{
656 struct ixgbevf_q_vector *q_vector =
657 container_of(napi, struct ixgbevf_q_vector, napi);
658 struct ixgbevf_adapter *adapter = q_vector->adapter;
659 struct ixgbevf_ring *rx_ring = NULL;
660 int work_done = 0;
661 long r_idx;
662
663 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
664 rx_ring = &(adapter->rx_ring[r_idx]);
665
666 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
667
668 /* If all Rx work done, exit the polling mode */
669 if (work_done < budget) {
670 napi_complete(napi);
671 if (adapter->itr_setting & 1)
672 ixgbevf_set_itr_msix(q_vector);
673 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
674 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
675 }
676
677 return work_done;
678}
679
680/**
681 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine
682 * @napi: napi struct with our devices info in it
683 * @budget: amount of work driver is allowed to do this pass, in packets
684 *
685 * This function will clean more than one rx queue associated with a
686 * q_vector.
687 **/
688static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
689{
690 struct ixgbevf_q_vector *q_vector =
691 container_of(napi, struct ixgbevf_q_vector, napi);
692 struct ixgbevf_adapter *adapter = q_vector->adapter;
693 struct ixgbevf_ring *rx_ring = NULL;
694 int work_done = 0, i;
695 long r_idx;
696 u64 enable_mask = 0;
697
698 /* attempt to distribute budget to each queue fairly, but don't allow
699 * the budget to go below 1 because we'll exit polling */
700 budget /= (q_vector->rxr_count ?: 1);
701 budget = max(budget, 1);
702 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
703 for (i = 0; i < q_vector->rxr_count; i++) {
704 rx_ring = &(adapter->rx_ring[r_idx]);
705 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
706 enable_mask |= rx_ring->v_idx;
707 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
708 r_idx + 1);
709 }
710
711#ifndef HAVE_NETDEV_NAPI_LIST
712 if (!netif_running(adapter->netdev))
713 work_done = 0;
714
715#endif
716 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
717 rx_ring = &(adapter->rx_ring[r_idx]);
718
719 /* If all Rx work done, exit the polling mode */
720 if (work_done < budget) {
721 napi_complete(napi);
722 if (adapter->itr_setting & 1)
723 ixgbevf_set_itr_msix(q_vector);
724 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
725 ixgbevf_irq_enable_queues(adapter, enable_mask);
726 }
727
728 return work_done;
729}
730
731
732/**
733 * ixgbevf_configure_msix - Configure MSI-X hardware
734 * @adapter: board private structure
735 *
736 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
737 * interrupts.
738 **/
739static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
740{
741 struct ixgbevf_q_vector *q_vector;
742 struct ixgbe_hw *hw = &adapter->hw;
743 int i, j, q_vectors, v_idx, r_idx;
744 u32 mask;
745
746 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
747
748 /*
749 * Populate the IVAR table and set the ITR values to the
750 * corresponding register.
751 */
752 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
753 q_vector = adapter->q_vector[v_idx];
984b3f57 754 /* XXX for_each_set_bit(...) */
92915f71
GR
755 r_idx = find_first_bit(q_vector->rxr_idx,
756 adapter->num_rx_queues);
757
758 for (i = 0; i < q_vector->rxr_count; i++) {
759 j = adapter->rx_ring[r_idx].reg_idx;
760 ixgbevf_set_ivar(adapter, 0, j, v_idx);
761 r_idx = find_next_bit(q_vector->rxr_idx,
762 adapter->num_rx_queues,
763 r_idx + 1);
764 }
765 r_idx = find_first_bit(q_vector->txr_idx,
766 adapter->num_tx_queues);
767
768 for (i = 0; i < q_vector->txr_count; i++) {
769 j = adapter->tx_ring[r_idx].reg_idx;
770 ixgbevf_set_ivar(adapter, 1, j, v_idx);
771 r_idx = find_next_bit(q_vector->txr_idx,
772 adapter->num_tx_queues,
773 r_idx + 1);
774 }
775
776 /* if this is a tx only vector halve the interrupt rate */
777 if (q_vector->txr_count && !q_vector->rxr_count)
778 q_vector->eitr = (adapter->eitr_param >> 1);
779 else if (q_vector->rxr_count)
780 /* rx only */
781 q_vector->eitr = adapter->eitr_param;
782
783 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);
784 }
785
786 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
787
788 /* set up to autoclear timer, and the vectors */
789 mask = IXGBE_EIMS_ENABLE_MASK;
790 mask &= ~IXGBE_EIMS_OTHER;
791 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
792}
793
794enum latency_range {
795 lowest_latency = 0,
796 low_latency = 1,
797 bulk_latency = 2,
798 latency_invalid = 255
799};
800
801/**
802 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
803 * @adapter: pointer to adapter
804 * @eitr: eitr setting (ints per sec) to give last timeslice
805 * @itr_setting: current throttle rate in ints/second
806 * @packets: the number of packets during this measurement interval
807 * @bytes: the number of bytes during this measurement interval
808 *
809 * Stores a new ITR value based on packets and byte
810 * counts during the last interrupt. The advantage of per interrupt
811 * computation is faster updates and more accurate ITR for the current
812 * traffic pattern. Constants in this function were computed
813 * based on theoretical maximum wire speed and thresholds were set based
814 * on testing data as well as attempting to minimize response time
815 * while increasing bulk throughput.
816 **/
817static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter,
818 u32 eitr, u8 itr_setting,
819 int packets, int bytes)
820{
821 unsigned int retval = itr_setting;
822 u32 timepassed_us;
823 u64 bytes_perint;
824
825 if (packets == 0)
826 goto update_itr_done;
827
828
829 /* simple throttlerate management
830 * 0-20MB/s lowest (100000 ints/s)
831 * 20-100MB/s low (20000 ints/s)
832 * 100-1249MB/s bulk (8000 ints/s)
833 */
834 /* what was last interrupt timeslice? */
835 timepassed_us = 1000000/eitr;
836 bytes_perint = bytes / timepassed_us; /* bytes/usec */
837
838 switch (itr_setting) {
839 case lowest_latency:
840 if (bytes_perint > adapter->eitr_low)
841 retval = low_latency;
842 break;
843 case low_latency:
844 if (bytes_perint > adapter->eitr_high)
845 retval = bulk_latency;
846 else if (bytes_perint <= adapter->eitr_low)
847 retval = lowest_latency;
848 break;
849 case bulk_latency:
850 if (bytes_perint <= adapter->eitr_high)
851 retval = low_latency;
852 break;
853 }
854
855update_itr_done:
856 return retval;
857}
858
859/**
860 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
861 * @adapter: pointer to adapter struct
862 * @v_idx: vector index into q_vector array
863 * @itr_reg: new value to be written in *register* format, not ints/s
864 *
865 * This function is made to be called by ethtool and by the driver
866 * when it needs to update VTEITR registers at runtime. Hardware
867 * specific quirks/differences are taken care of here.
868 */
869static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
870 u32 itr_reg)
871{
872 struct ixgbe_hw *hw = &adapter->hw;
873
874 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg);
875
876 /*
877 * set the WDIS bit to not clear the timer bits and cause an
878 * immediate assertion of the interrupt
879 */
880 itr_reg |= IXGBE_EITR_CNT_WDIS;
881
882 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
883}
884
885static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
886{
887 struct ixgbevf_adapter *adapter = q_vector->adapter;
888 u32 new_itr;
889 u8 current_itr, ret_itr;
890 int i, r_idx, v_idx = q_vector->v_idx;
891 struct ixgbevf_ring *rx_ring, *tx_ring;
892
893 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
894 for (i = 0; i < q_vector->txr_count; i++) {
895 tx_ring = &(adapter->tx_ring[r_idx]);
896 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
897 q_vector->tx_itr,
898 tx_ring->total_packets,
899 tx_ring->total_bytes);
900 /* if the result for this queue would decrease interrupt
901 * rate for this vector then use that result */
902 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
903 q_vector->tx_itr - 1 : ret_itr);
904 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
905 r_idx + 1);
906 }
907
908 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
909 for (i = 0; i < q_vector->rxr_count; i++) {
910 rx_ring = &(adapter->rx_ring[r_idx]);
911 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
912 q_vector->rx_itr,
913 rx_ring->total_packets,
914 rx_ring->total_bytes);
915 /* if the result for this queue would decrease interrupt
916 * rate for this vector then use that result */
917 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
918 q_vector->rx_itr - 1 : ret_itr);
919 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
920 r_idx + 1);
921 }
922
923 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
924
925 switch (current_itr) {
926 /* counts and packets in update_itr are dependent on these numbers */
927 case lowest_latency:
928 new_itr = 100000;
929 break;
930 case low_latency:
931 new_itr = 20000; /* aka hwitr = ~200 */
932 break;
933 case bulk_latency:
934 default:
935 new_itr = 8000;
936 break;
937 }
938
939 if (new_itr != q_vector->eitr) {
940 u32 itr_reg;
941
942 /* save the algorithm value here, not the smoothed one */
943 q_vector->eitr = new_itr;
944 /* do an exponential smoothing */
945 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
946 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
947 ixgbevf_write_eitr(adapter, v_idx, itr_reg);
948 }
949
950 return;
951}
952
953static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
954{
955 struct net_device *netdev = data;
956 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
957 struct ixgbe_hw *hw = &adapter->hw;
958 u32 eicr;
a9ee25a2 959 u32 msg;
92915f71
GR
960
961 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS);
962 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr);
963
08259594
GR
964 if (!hw->mbx.ops.check_for_ack(hw)) {
965 /*
966 * checking for the ack clears the PFACK bit. Place
967 * it back in the v2p_mailbox cache so that anyone
968 * polling for an ack will not miss it. Also
969 * avoid the read below because the code to read
970 * the mailbox will also clear the ack bit. This was
971 * causing lost acks. Just cache the bit and exit
972 * the IRQ handler.
973 */
974 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK;
975 goto out;
976 }
977
978 /* Not an ack interrupt, go ahead and read the message */
a9ee25a2
GR
979 hw->mbx.ops.read(hw, &msg, 1);
980
981 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
982 mod_timer(&adapter->watchdog_timer,
4c3a8223 983 round_jiffies(jiffies + 1));
a9ee25a2 984
08259594 985out:
92915f71
GR
986 return IRQ_HANDLED;
987}
988
989static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
990{
991 struct ixgbevf_q_vector *q_vector = data;
992 struct ixgbevf_adapter *adapter = q_vector->adapter;
993 struct ixgbevf_ring *tx_ring;
994 int i, r_idx;
995
996 if (!q_vector->txr_count)
997 return IRQ_HANDLED;
998
999 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1000 for (i = 0; i < q_vector->txr_count; i++) {
1001 tx_ring = &(adapter->tx_ring[r_idx]);
1002 tx_ring->total_bytes = 0;
1003 tx_ring->total_packets = 0;
1004 ixgbevf_clean_tx_irq(adapter, tx_ring);
1005 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1006 r_idx + 1);
1007 }
1008
1009 if (adapter->itr_setting & 1)
1010 ixgbevf_set_itr_msix(q_vector);
1011
1012 return IRQ_HANDLED;
1013}
1014
1015/**
1016 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1017 * @irq: unused
1018 * @data: pointer to our q_vector struct for this interrupt vector
1019 **/
1020static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
1021{
1022 struct ixgbevf_q_vector *q_vector = data;
1023 struct ixgbevf_adapter *adapter = q_vector->adapter;
1024 struct ixgbe_hw *hw = &adapter->hw;
1025 struct ixgbevf_ring *rx_ring;
1026 int r_idx;
1027 int i;
1028
1029 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1030 for (i = 0; i < q_vector->rxr_count; i++) {
1031 rx_ring = &(adapter->rx_ring[r_idx]);
1032 rx_ring->total_bytes = 0;
1033 rx_ring->total_packets = 0;
1034 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1035 r_idx + 1);
1036 }
1037
1038 if (!q_vector->rxr_count)
1039 return IRQ_HANDLED;
1040
1041 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1042 rx_ring = &(adapter->rx_ring[r_idx]);
1043 /* disable interrupts on this vector only */
1044 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
1045 napi_schedule(&q_vector->napi);
1046
1047
1048 return IRQ_HANDLED;
1049}
1050
1051static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data)
1052{
1053 ixgbevf_msix_clean_rx(irq, data);
1054 ixgbevf_msix_clean_tx(irq, data);
1055
1056 return IRQ_HANDLED;
1057}
1058
1059static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1060 int r_idx)
1061{
1062 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1063
1064 set_bit(r_idx, q_vector->rxr_idx);
1065 q_vector->rxr_count++;
1066 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1067}
1068
1069static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1070 int t_idx)
1071{
1072 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1073
1074 set_bit(t_idx, q_vector->txr_idx);
1075 q_vector->txr_count++;
1076 a->tx_ring[t_idx].v_idx = 1 << v_idx;
1077}
1078
1079/**
1080 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1081 * @adapter: board private structure to initialize
1082 *
1083 * This function maps descriptor rings to the queue-specific vectors
1084 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1085 * one vector per ring/queue, but on a constrained vector budget, we
1086 * group the rings as "efficiently" as possible. You would add new
1087 * mapping configurations in here.
1088 **/
1089static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1090{
1091 int q_vectors;
1092 int v_start = 0;
1093 int rxr_idx = 0, txr_idx = 0;
1094 int rxr_remaining = adapter->num_rx_queues;
1095 int txr_remaining = adapter->num_tx_queues;
1096 int i, j;
1097 int rqpv, tqpv;
1098 int err = 0;
1099
1100 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1101
1102 /*
1103 * The ideal configuration...
1104 * We have enough vectors to map one per queue.
1105 */
1106 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1107 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1108 map_vector_to_rxq(adapter, v_start, rxr_idx);
1109
1110 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1111 map_vector_to_txq(adapter, v_start, txr_idx);
1112 goto out;
1113 }
1114
1115 /*
1116 * If we don't have enough vectors for a 1-to-1
1117 * mapping, we'll have to group them so there are
1118 * multiple queues per vector.
1119 */
1120 /* Re-adjusting *qpv takes care of the remainder. */
1121 for (i = v_start; i < q_vectors; i++) {
1122 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1123 for (j = 0; j < rqpv; j++) {
1124 map_vector_to_rxq(adapter, i, rxr_idx);
1125 rxr_idx++;
1126 rxr_remaining--;
1127 }
1128 }
1129 for (i = v_start; i < q_vectors; i++) {
1130 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1131 for (j = 0; j < tqpv; j++) {
1132 map_vector_to_txq(adapter, i, txr_idx);
1133 txr_idx++;
1134 txr_remaining--;
1135 }
1136 }
1137
1138out:
1139 return err;
1140}
1141
1142/**
1143 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1144 * @adapter: board private structure
1145 *
1146 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1147 * interrupts from the kernel.
1148 **/
1149static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1150{
1151 struct net_device *netdev = adapter->netdev;
1152 irqreturn_t (*handler)(int, void *);
1153 int i, vector, q_vectors, err;
1154 int ri = 0, ti = 0;
1155
1156 /* Decrement for Other and TCP Timer vectors */
1157 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1158
1159#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
1160 ? &ixgbevf_msix_clean_many : \
1161 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
1162 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \
1163 NULL)
1164 for (vector = 0; vector < q_vectors; vector++) {
1165 handler = SET_HANDLER(adapter->q_vector[vector]);
1166
1167 if (handler == &ixgbevf_msix_clean_rx) {
1168 sprintf(adapter->name[vector], "%s-%s-%d",
1169 netdev->name, "rx", ri++);
1170 } else if (handler == &ixgbevf_msix_clean_tx) {
1171 sprintf(adapter->name[vector], "%s-%s-%d",
1172 netdev->name, "tx", ti++);
1173 } else if (handler == &ixgbevf_msix_clean_many) {
1174 sprintf(adapter->name[vector], "%s-%s-%d",
1175 netdev->name, "TxRx", vector);
1176 } else {
1177 /* skip this unused q_vector */
1178 continue;
1179 }
1180 err = request_irq(adapter->msix_entries[vector].vector,
1181 handler, 0, adapter->name[vector],
1182 adapter->q_vector[vector]);
1183 if (err) {
1184 hw_dbg(&adapter->hw,
1185 "request_irq failed for MSIX interrupt "
1186 "Error: %d\n", err);
1187 goto free_queue_irqs;
1188 }
1189 }
1190
1191 sprintf(adapter->name[vector], "%s:mbx", netdev->name);
1192 err = request_irq(adapter->msix_entries[vector].vector,
1193 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev);
1194 if (err) {
1195 hw_dbg(&adapter->hw,
1196 "request_irq for msix_mbx failed: %d\n", err);
1197 goto free_queue_irqs;
1198 }
1199
1200 return 0;
1201
1202free_queue_irqs:
1203 for (i = vector - 1; i >= 0; i--)
1204 free_irq(adapter->msix_entries[--vector].vector,
1205 &(adapter->q_vector[i]));
1206 pci_disable_msix(adapter->pdev);
1207 kfree(adapter->msix_entries);
1208 adapter->msix_entries = NULL;
1209 return err;
1210}
1211
1212static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1213{
1214 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1215
1216 for (i = 0; i < q_vectors; i++) {
1217 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1218 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1219 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1220 q_vector->rxr_count = 0;
1221 q_vector->txr_count = 0;
1222 q_vector->eitr = adapter->eitr_param;
1223 }
1224}
1225
1226/**
1227 * ixgbevf_request_irq - initialize interrupts
1228 * @adapter: board private structure
1229 *
1230 * Attempts to configure interrupts using the best available
1231 * capabilities of the hardware and kernel.
1232 **/
1233static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1234{
1235 int err = 0;
1236
1237 err = ixgbevf_request_msix_irqs(adapter);
1238
1239 if (err)
1240 hw_dbg(&adapter->hw,
1241 "request_irq failed, Error %d\n", err);
1242
1243 return err;
1244}
1245
1246static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1247{
1248 struct net_device *netdev = adapter->netdev;
1249 int i, q_vectors;
1250
1251 q_vectors = adapter->num_msix_vectors;
1252
1253 i = q_vectors - 1;
1254
1255 free_irq(adapter->msix_entries[i].vector, netdev);
1256 i--;
1257
1258 for (; i >= 0; i--) {
1259 free_irq(adapter->msix_entries[i].vector,
1260 adapter->q_vector[i]);
1261 }
1262
1263 ixgbevf_reset_q_vectors(adapter);
1264}
1265
1266/**
1267 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1268 * @adapter: board private structure
1269 **/
1270static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1271{
1272 int i;
1273 struct ixgbe_hw *hw = &adapter->hw;
1274
1275 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1276
1277 IXGBE_WRITE_FLUSH(hw);
1278
1279 for (i = 0; i < adapter->num_msix_vectors; i++)
1280 synchronize_irq(adapter->msix_entries[i].vector);
1281}
1282
1283/**
1284 * ixgbevf_irq_enable - Enable default interrupt generation settings
1285 * @adapter: board private structure
1286 **/
1287static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter,
1288 bool queues, bool flush)
1289{
1290 struct ixgbe_hw *hw = &adapter->hw;
1291 u32 mask;
1292 u64 qmask;
1293
1294 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1295 qmask = ~0;
1296
1297 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
1298
1299 if (queues)
1300 ixgbevf_irq_enable_queues(adapter, qmask);
1301
1302 if (flush)
1303 IXGBE_WRITE_FLUSH(hw);
1304}
1305
1306/**
1307 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1308 * @adapter: board private structure
1309 *
1310 * Configure the Tx unit of the MAC after a reset.
1311 **/
1312static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1313{
1314 u64 tdba;
1315 struct ixgbe_hw *hw = &adapter->hw;
1316 u32 i, j, tdlen, txctrl;
1317
1318 /* Setup the HW Tx Head and Tail descriptor pointers */
1319 for (i = 0; i < adapter->num_tx_queues; i++) {
1320 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1321 j = ring->reg_idx;
1322 tdba = ring->dma;
1323 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1324 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1325 (tdba & DMA_BIT_MASK(32)));
1326 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1327 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1328 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1329 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1330 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1331 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1332 /* Disable Tx Head Writeback RO bit, since this hoses
1333 * bookkeeping if things aren't delivered in order.
1334 */
1335 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1336 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1337 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1338 }
1339}
1340
1341#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1342
1343static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1344{
1345 struct ixgbevf_ring *rx_ring;
1346 struct ixgbe_hw *hw = &adapter->hw;
1347 u32 srrctl;
1348
1349 rx_ring = &adapter->rx_ring[index];
1350
1351 srrctl = IXGBE_SRRCTL_DROP_EN;
1352
1353 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1354 u16 bufsz = IXGBEVF_RXBUFFER_2048;
1355 /* grow the amount we can receive on large page machines */
1356 if (bufsz < (PAGE_SIZE / 2))
1357 bufsz = (PAGE_SIZE / 2);
1358 /* cap the bufsz at our largest descriptor size */
1359 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz);
1360
1361 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1362 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1363 srrctl |= ((IXGBEVF_RX_HDR_SIZE <<
1364 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1365 IXGBE_SRRCTL_BSIZEHDR_MASK);
1366 } else {
1367 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1368
1369 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1370 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1371 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1372 else
1373 srrctl |= rx_ring->rx_buf_len >>
1374 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1375 }
1376 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1377}
1378
1379/**
1380 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1381 * @adapter: board private structure
1382 *
1383 * Configure the Rx unit of the MAC after a reset.
1384 **/
1385static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1386{
1387 u64 rdba;
1388 struct ixgbe_hw *hw = &adapter->hw;
1389 struct net_device *netdev = adapter->netdev;
1390 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1391 int i, j;
1392 u32 rdlen;
1393 int rx_buf_len;
1394
1395 /* Decide whether to use packet split mode or not */
1396 if (netdev->mtu > ETH_DATA_LEN) {
1397 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE)
1398 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1399 else
1400 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1401 } else {
1402 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE)
1403 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1404 else
1405 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1406 }
1407
1408 /* Set the RX buffer length according to the mode */
1409 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1410 /* PSRTYPE must be initialized in 82599 */
1411 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1412 IXGBE_PSRTYPE_UDPHDR |
1413 IXGBE_PSRTYPE_IPV4HDR |
1414 IXGBE_PSRTYPE_IPV6HDR |
1415 IXGBE_PSRTYPE_L2HDR;
1416 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1417 rx_buf_len = IXGBEVF_RX_HDR_SIZE;
1418 } else {
1419 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1420 if (netdev->mtu <= ETH_DATA_LEN)
1421 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1422 else
1423 rx_buf_len = ALIGN(max_frame, 1024);
1424 }
1425
1426 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1427 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1428 * the Base and Length of the Rx Descriptor Ring */
1429 for (i = 0; i < adapter->num_rx_queues; i++) {
1430 rdba = adapter->rx_ring[i].dma;
1431 j = adapter->rx_ring[i].reg_idx;
1432 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1433 (rdba & DMA_BIT_MASK(32)));
1434 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1435 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1436 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1437 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1438 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1439 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1440 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1441
1442 ixgbevf_configure_srrctl(adapter, j);
1443 }
1444}
1445
1446static void ixgbevf_vlan_rx_register(struct net_device *netdev,
1447 struct vlan_group *grp)
1448{
1449 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1450 struct ixgbe_hw *hw = &adapter->hw;
1451 int i, j;
1452 u32 ctrl;
1453
1454 adapter->vlgrp = grp;
1455
1456 for (i = 0; i < adapter->num_rx_queues; i++) {
1457 j = adapter->rx_ring[i].reg_idx;
1458 ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1459 ctrl |= IXGBE_RXDCTL_VME;
1460 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), ctrl);
1461 }
1462}
1463
1464static void ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1465{
1466 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1467 struct ixgbe_hw *hw = &adapter->hw;
1468 struct net_device *v_netdev;
1469
1470 /* add VID to filter table */
1471 if (hw->mac.ops.set_vfta)
1472 hw->mac.ops.set_vfta(hw, vid, 0, true);
1473 /*
1474 * Copy feature flags from netdev to the vlan netdev for this vid.
1475 * This allows things like TSO to bubble down to our vlan device.
1476 */
1477 v_netdev = vlan_group_get_device(adapter->vlgrp, vid);
1478 v_netdev->features |= adapter->netdev->features;
1479 vlan_group_set_device(adapter->vlgrp, vid, v_netdev);
1480}
1481
1482static void ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1483{
1484 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1485 struct ixgbe_hw *hw = &adapter->hw;
1486
1487 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1488 ixgbevf_irq_disable(adapter);
1489
1490 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1491
1492 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1493 ixgbevf_irq_enable(adapter, true, true);
1494
1495 /* remove VID from filter table */
1496 if (hw->mac.ops.set_vfta)
1497 hw->mac.ops.set_vfta(hw, vid, 0, false);
1498}
1499
1500static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1501{
1502 ixgbevf_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1503
1504 if (adapter->vlgrp) {
1505 u16 vid;
1506 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1507 if (!vlan_group_get_device(adapter->vlgrp, vid))
1508 continue;
1509 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
1510 }
1511 }
1512}
1513
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1514/**
1515 * ixgbevf_set_rx_mode - Multicast set
1516 * @netdev: network interface device structure
1517 *
1518 * The set_rx_method entry point is called whenever the multicast address
1519 * list or the network interface flags are updated. This routine is
1520 * responsible for configuring the hardware for proper multicast mode.
1521 **/
1522static void ixgbevf_set_rx_mode(struct net_device *netdev)
1523{
1524 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1525 struct ixgbe_hw *hw = &adapter->hw;
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1526
1527 /* reprogram multicast list */
92915f71 1528 if (hw->mac.ops.update_mc_addr_list)
5c58c47a 1529 hw->mac.ops.update_mc_addr_list(hw, netdev);
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1530}
1531
1532static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1533{
1534 int q_idx;
1535 struct ixgbevf_q_vector *q_vector;
1536 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1537
1538 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1539 struct napi_struct *napi;
1540 q_vector = adapter->q_vector[q_idx];
1541 if (!q_vector->rxr_count)
1542 continue;
1543 napi = &q_vector->napi;
1544 if (q_vector->rxr_count > 1)
1545 napi->poll = &ixgbevf_clean_rxonly_many;
1546
1547 napi_enable(napi);
1548 }
1549}
1550
1551static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1552{
1553 int q_idx;
1554 struct ixgbevf_q_vector *q_vector;
1555 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1556
1557 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1558 q_vector = adapter->q_vector[q_idx];
1559 if (!q_vector->rxr_count)
1560 continue;
1561 napi_disable(&q_vector->napi);
1562 }
1563}
1564
1565static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1566{
1567 struct net_device *netdev = adapter->netdev;
1568 int i;
1569
1570 ixgbevf_set_rx_mode(netdev);
1571
1572 ixgbevf_restore_vlan(adapter);
1573
1574 ixgbevf_configure_tx(adapter);
1575 ixgbevf_configure_rx(adapter);
1576 for (i = 0; i < adapter->num_rx_queues; i++) {
1577 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
1578 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count);
1579 ring->next_to_use = ring->count - 1;
1580 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail);
1581 }
1582}
1583
1584#define IXGBE_MAX_RX_DESC_POLL 10
1585static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1586 int rxr)
1587{
1588 struct ixgbe_hw *hw = &adapter->hw;
1589 int j = adapter->rx_ring[rxr].reg_idx;
1590 int k;
1591
1592 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1593 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1594 break;
1595 else
1596 msleep(1);
1597 }
1598 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1599 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1600 "not set within the polling period\n", rxr);
1601 }
1602
1603 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1604 (adapter->rx_ring[rxr].count - 1));
1605}
1606
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1607static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1608{
1609 /* Only save pre-reset stats if there are some */
1610 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1611 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1612 adapter->stats.base_vfgprc;
1613 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1614 adapter->stats.base_vfgptc;
1615 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1616 adapter->stats.base_vfgorc;
1617 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1618 adapter->stats.base_vfgotc;
1619 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1620 adapter->stats.base_vfmprc;
1621 }
1622}
1623
1624static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1625{
1626 struct ixgbe_hw *hw = &adapter->hw;
1627
1628 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1629 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1630 adapter->stats.last_vfgorc |=
1631 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1632 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1633 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1634 adapter->stats.last_vfgotc |=
1635 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1636 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1637
1638 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1639 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1640 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1641 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1642 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1643}
1644
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1645static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1646{
1647 struct net_device *netdev = adapter->netdev;
1648 struct ixgbe_hw *hw = &adapter->hw;
1649 int i, j = 0;
1650 int num_rx_rings = adapter->num_rx_queues;
1651 u32 txdctl, rxdctl;
1652
1653 for (i = 0; i < adapter->num_tx_queues; i++) {
1654 j = adapter->tx_ring[i].reg_idx;
1655 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1656 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1657 txdctl |= (8 << 16);
1658 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1659 }
1660
1661 for (i = 0; i < adapter->num_tx_queues; i++) {
1662 j = adapter->tx_ring[i].reg_idx;
1663 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1664 txdctl |= IXGBE_TXDCTL_ENABLE;
1665 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1666 }
1667
1668 for (i = 0; i < num_rx_rings; i++) {
1669 j = adapter->rx_ring[i].reg_idx;
1670 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1671 rxdctl |= IXGBE_RXDCTL_ENABLE;
1672 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1673 ixgbevf_rx_desc_queue_enable(adapter, i);
1674 }
1675
1676 ixgbevf_configure_msix(adapter);
1677
1678 if (hw->mac.ops.set_rar) {
1679 if (is_valid_ether_addr(hw->mac.addr))
1680 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1681 else
1682 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1683 }
1684
1685 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1686 ixgbevf_napi_enable_all(adapter);
1687
1688 /* enable transmits */
1689 netif_tx_start_all_queues(netdev);
1690
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1691 ixgbevf_save_reset_stats(adapter);
1692 ixgbevf_init_last_counter_stats(adapter);
1693
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1694 /* bring the link up in the watchdog, this could race with our first
1695 * link up interrupt but shouldn't be a problem */
1696 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1697 adapter->link_check_timeout = jiffies;
1698 mod_timer(&adapter->watchdog_timer, jiffies);
1699 return 0;
1700}
1701
1702int ixgbevf_up(struct ixgbevf_adapter *adapter)
1703{
1704 int err;
1705 struct ixgbe_hw *hw = &adapter->hw;
1706
1707 ixgbevf_configure(adapter);
1708
1709 err = ixgbevf_up_complete(adapter);
1710
1711 /* clear any pending interrupts, may auto mask */
1712 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1713
1714 ixgbevf_irq_enable(adapter, true, true);
1715
1716 return err;
1717}
1718
1719/**
1720 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1721 * @adapter: board private structure
1722 * @rx_ring: ring to free buffers from
1723 **/
1724static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1725 struct ixgbevf_ring *rx_ring)
1726{
1727 struct pci_dev *pdev = adapter->pdev;
1728 unsigned long size;
1729 unsigned int i;
1730
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1731 if (!rx_ring->rx_buffer_info)
1732 return;
92915f71 1733
c0456c23 1734 /* Free all the Rx ring sk_buffs */
92915f71
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1735 for (i = 0; i < rx_ring->count; i++) {
1736 struct ixgbevf_rx_buffer *rx_buffer_info;
1737
1738 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1739 if (rx_buffer_info->dma) {
2a1f8794 1740 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 1741 rx_ring->rx_buf_len,
2a1f8794 1742 DMA_FROM_DEVICE);
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1743 rx_buffer_info->dma = 0;
1744 }
1745 if (rx_buffer_info->skb) {
1746 struct sk_buff *skb = rx_buffer_info->skb;
1747 rx_buffer_info->skb = NULL;
1748 do {
1749 struct sk_buff *this = skb;
1750 skb = skb->prev;
1751 dev_kfree_skb(this);
1752 } while (skb);
1753 }
1754 if (!rx_buffer_info->page)
1755 continue;
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1756 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
1757 PAGE_SIZE / 2, DMA_FROM_DEVICE);
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1758 rx_buffer_info->page_dma = 0;
1759 put_page(rx_buffer_info->page);
1760 rx_buffer_info->page = NULL;
1761 rx_buffer_info->page_offset = 0;
1762 }
1763
1764 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1765 memset(rx_ring->rx_buffer_info, 0, size);
1766
1767 /* Zero out the descriptor ring */
1768 memset(rx_ring->desc, 0, rx_ring->size);
1769
1770 rx_ring->next_to_clean = 0;
1771 rx_ring->next_to_use = 0;
1772
1773 if (rx_ring->head)
1774 writel(0, adapter->hw.hw_addr + rx_ring->head);
1775 if (rx_ring->tail)
1776 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1777}
1778
1779/**
1780 * ixgbevf_clean_tx_ring - Free Tx Buffers
1781 * @adapter: board private structure
1782 * @tx_ring: ring to be cleaned
1783 **/
1784static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1785 struct ixgbevf_ring *tx_ring)
1786{
1787 struct ixgbevf_tx_buffer *tx_buffer_info;
1788 unsigned long size;
1789 unsigned int i;
1790
c0456c23
GR
1791 if (!tx_ring->tx_buffer_info)
1792 return;
1793
92915f71
GR
1794 /* Free all the Tx ring sk_buffs */
1795
1796 for (i = 0; i < tx_ring->count; i++) {
1797 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1798 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1799 }
1800
1801 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1802 memset(tx_ring->tx_buffer_info, 0, size);
1803
1804 memset(tx_ring->desc, 0, tx_ring->size);
1805
1806 tx_ring->next_to_use = 0;
1807 tx_ring->next_to_clean = 0;
1808
1809 if (tx_ring->head)
1810 writel(0, adapter->hw.hw_addr + tx_ring->head);
1811 if (tx_ring->tail)
1812 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1813}
1814
1815/**
1816 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1817 * @adapter: board private structure
1818 **/
1819static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1820{
1821 int i;
1822
1823 for (i = 0; i < adapter->num_rx_queues; i++)
1824 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1825}
1826
1827/**
1828 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1829 * @adapter: board private structure
1830 **/
1831static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1832{
1833 int i;
1834
1835 for (i = 0; i < adapter->num_tx_queues; i++)
1836 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1837}
1838
1839void ixgbevf_down(struct ixgbevf_adapter *adapter)
1840{
1841 struct net_device *netdev = adapter->netdev;
1842 struct ixgbe_hw *hw = &adapter->hw;
1843 u32 txdctl;
1844 int i, j;
1845
1846 /* signal that we are down to the interrupt handler */
1847 set_bit(__IXGBEVF_DOWN, &adapter->state);
1848 /* disable receives */
1849
1850 netif_tx_disable(netdev);
1851
1852 msleep(10);
1853
1854 netif_tx_stop_all_queues(netdev);
1855
1856 ixgbevf_irq_disable(adapter);
1857
1858 ixgbevf_napi_disable_all(adapter);
1859
1860 del_timer_sync(&adapter->watchdog_timer);
1861 /* can't call flush scheduled work here because it can deadlock
1862 * if linkwatch_event tries to acquire the rtnl_lock which we are
1863 * holding */
1864 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1865 msleep(1);
1866
1867 /* disable transmits in the hardware now that interrupts are off */
1868 for (i = 0; i < adapter->num_tx_queues; i++) {
1869 j = adapter->tx_ring[i].reg_idx;
1870 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1871 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1872 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1873 }
1874
1875 netif_carrier_off(netdev);
1876
1877 if (!pci_channel_offline(adapter->pdev))
1878 ixgbevf_reset(adapter);
1879
1880 ixgbevf_clean_all_tx_rings(adapter);
1881 ixgbevf_clean_all_rx_rings(adapter);
1882}
1883
1884void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1885{
c0456c23
GR
1886 struct ixgbe_hw *hw = &adapter->hw;
1887
92915f71 1888 WARN_ON(in_interrupt());
c0456c23 1889
92915f71
GR
1890 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1891 msleep(1);
1892
c0456c23
GR
1893 /*
1894 * Check if PF is up before re-init. If not then skip until
1895 * later when the PF is up and ready to service requests from
1896 * the VF via mailbox. If the VF is up and running then the
1897 * watchdog task will continue to schedule reset tasks until
1898 * the PF is up and running.
1899 */
1900 if (!hw->mac.ops.reset_hw(hw)) {
1901 ixgbevf_down(adapter);
1902 ixgbevf_up(adapter);
1903 }
92915f71
GR
1904
1905 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1906}
1907
1908void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1909{
1910 struct ixgbe_hw *hw = &adapter->hw;
1911 struct net_device *netdev = adapter->netdev;
1912
1913 if (hw->mac.ops.reset_hw(hw))
1914 hw_dbg(hw, "PF still resetting\n");
1915 else
1916 hw->mac.ops.init_hw(hw);
1917
1918 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1919 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1920 netdev->addr_len);
1921 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1922 netdev->addr_len);
1923 }
1924}
1925
1926static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1927 int vectors)
1928{
1929 int err, vector_threshold;
1930
1931 /* We'll want at least 3 (vector_threshold):
1932 * 1) TxQ[0] Cleanup
1933 * 2) RxQ[0] Cleanup
1934 * 3) Other (Link Status Change, etc.)
1935 */
1936 vector_threshold = MIN_MSIX_COUNT;
1937
1938 /* The more we get, the more we will assign to Tx/Rx Cleanup
1939 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1940 * Right now, we simply care about how many we'll get; we'll
1941 * set them up later while requesting irq's.
1942 */
1943 while (vectors >= vector_threshold) {
1944 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1945 vectors);
1946 if (!err) /* Success in acquiring all requested vectors. */
1947 break;
1948 else if (err < 0)
1949 vectors = 0; /* Nasty failure, quit now */
1950 else /* err == number of vectors we should try again with */
1951 vectors = err;
1952 }
1953
1954 if (vectors < vector_threshold) {
1955 /* Can't allocate enough MSI-X interrupts? Oh well.
1956 * This just means we'll go with either a single MSI
1957 * vector or fall back to legacy interrupts.
1958 */
1959 hw_dbg(&adapter->hw,
1960 "Unable to allocate MSI-X interrupts\n");
1961 kfree(adapter->msix_entries);
1962 adapter->msix_entries = NULL;
1963 } else {
1964 /*
1965 * Adjust for only the vectors we'll use, which is minimum
1966 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1967 * vectors we were allocated.
1968 */
1969 adapter->num_msix_vectors = vectors;
1970 }
1971}
1972
1973/*
1974 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
1975 * @adapter: board private structure to initialize
1976 *
1977 * This is the top level queue allocation routine. The order here is very
1978 * important, starting with the "most" number of features turned on at once,
1979 * and ending with the smallest set of features. This way large combinations
1980 * can be allocated if they're turned on, and smaller combinations are the
1981 * fallthrough conditions.
1982 *
1983 **/
1984static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1985{
1986 /* Start with base case */
1987 adapter->num_rx_queues = 1;
1988 adapter->num_tx_queues = 1;
1989 adapter->num_rx_pools = adapter->num_rx_queues;
1990 adapter->num_rx_queues_per_pool = 1;
1991}
1992
1993/**
1994 * ixgbevf_alloc_queues - Allocate memory for all rings
1995 * @adapter: board private structure to initialize
1996 *
1997 * We allocate one ring per queue at run-time since we don't know the
1998 * number of queues at compile-time. The polling_netdev array is
1999 * intended for Multiqueue, but should work fine with a single queue.
2000 **/
2001static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
2002{
2003 int i;
2004
2005 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2006 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2007 if (!adapter->tx_ring)
2008 goto err_tx_ring_allocation;
2009
2010 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2011 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2012 if (!adapter->rx_ring)
2013 goto err_rx_ring_allocation;
2014
2015 for (i = 0; i < adapter->num_tx_queues; i++) {
2016 adapter->tx_ring[i].count = adapter->tx_ring_count;
2017 adapter->tx_ring[i].queue_index = i;
2018 adapter->tx_ring[i].reg_idx = i;
2019 }
2020
2021 for (i = 0; i < adapter->num_rx_queues; i++) {
2022 adapter->rx_ring[i].count = adapter->rx_ring_count;
2023 adapter->rx_ring[i].queue_index = i;
2024 adapter->rx_ring[i].reg_idx = i;
2025 }
2026
2027 return 0;
2028
2029err_rx_ring_allocation:
2030 kfree(adapter->tx_ring);
2031err_tx_ring_allocation:
2032 return -ENOMEM;
2033}
2034
2035/**
2036 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2037 * @adapter: board private structure to initialize
2038 *
2039 * Attempt to configure the interrupts using the best available
2040 * capabilities of the hardware and the kernel.
2041 **/
2042static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2043{
2044 int err = 0;
2045 int vector, v_budget;
2046
2047 /*
2048 * It's easy to be greedy for MSI-X vectors, but it really
2049 * doesn't do us much good if we have a lot more vectors
2050 * than CPU's. So let's be conservative and only ask for
2051 * (roughly) twice the number of vectors as there are CPU's.
2052 */
2053 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2054 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2055
2056 /* A failure in MSI-X entry allocation isn't fatal, but it does
2057 * mean we disable MSI-X capabilities of the adapter. */
2058 adapter->msix_entries = kcalloc(v_budget,
2059 sizeof(struct msix_entry), GFP_KERNEL);
2060 if (!adapter->msix_entries) {
2061 err = -ENOMEM;
2062 goto out;
2063 }
2064
2065 for (vector = 0; vector < v_budget; vector++)
2066 adapter->msix_entries[vector].entry = vector;
2067
2068 ixgbevf_acquire_msix_vectors(adapter, v_budget);
2069
2070out:
2071 return err;
2072}
2073
2074/**
2075 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2076 * @adapter: board private structure to initialize
2077 *
2078 * We allocate one q_vector per queue interrupt. If allocation fails we
2079 * return -ENOMEM.
2080 **/
2081static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2082{
2083 int q_idx, num_q_vectors;
2084 struct ixgbevf_q_vector *q_vector;
2085 int napi_vectors;
2086 int (*poll)(struct napi_struct *, int);
2087
2088 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2089 napi_vectors = adapter->num_rx_queues;
2090 poll = &ixgbevf_clean_rxonly;
2091
2092 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2093 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2094 if (!q_vector)
2095 goto err_out;
2096 q_vector->adapter = adapter;
2097 q_vector->v_idx = q_idx;
2098 q_vector->eitr = adapter->eitr_param;
2099 if (q_idx < napi_vectors)
2100 netif_napi_add(adapter->netdev, &q_vector->napi,
2101 (*poll), 64);
2102 adapter->q_vector[q_idx] = q_vector;
2103 }
2104
2105 return 0;
2106
2107err_out:
2108 while (q_idx) {
2109 q_idx--;
2110 q_vector = adapter->q_vector[q_idx];
2111 netif_napi_del(&q_vector->napi);
2112 kfree(q_vector);
2113 adapter->q_vector[q_idx] = NULL;
2114 }
2115 return -ENOMEM;
2116}
2117
2118/**
2119 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2120 * @adapter: board private structure to initialize
2121 *
2122 * This function frees the memory allocated to the q_vectors. In addition if
2123 * NAPI is enabled it will delete any references to the NAPI struct prior
2124 * to freeing the q_vector.
2125 **/
2126static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2127{
2128 int q_idx, num_q_vectors;
2129 int napi_vectors;
2130
2131 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2132 napi_vectors = adapter->num_rx_queues;
2133
2134 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2135 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2136
2137 adapter->q_vector[q_idx] = NULL;
2138 if (q_idx < napi_vectors)
2139 netif_napi_del(&q_vector->napi);
2140 kfree(q_vector);
2141 }
2142}
2143
2144/**
2145 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2146 * @adapter: board private structure
2147 *
2148 **/
2149static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2150{
2151 pci_disable_msix(adapter->pdev);
2152 kfree(adapter->msix_entries);
2153 adapter->msix_entries = NULL;
2154
2155 return;
2156}
2157
2158/**
2159 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2160 * @adapter: board private structure to initialize
2161 *
2162 **/
2163static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2164{
2165 int err;
2166
2167 /* Number of supported queues */
2168 ixgbevf_set_num_queues(adapter);
2169
2170 err = ixgbevf_set_interrupt_capability(adapter);
2171 if (err) {
2172 hw_dbg(&adapter->hw,
2173 "Unable to setup interrupt capabilities\n");
2174 goto err_set_interrupt;
2175 }
2176
2177 err = ixgbevf_alloc_q_vectors(adapter);
2178 if (err) {
2179 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2180 "vectors\n");
2181 goto err_alloc_q_vectors;
2182 }
2183
2184 err = ixgbevf_alloc_queues(adapter);
2185 if (err) {
2186 printk(KERN_ERR "Unable to allocate memory for queues\n");
2187 goto err_alloc_queues;
2188 }
2189
2190 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2191 "Tx Queue count = %u\n",
2192 (adapter->num_rx_queues > 1) ? "Enabled" :
2193 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2194
2195 set_bit(__IXGBEVF_DOWN, &adapter->state);
2196
2197 return 0;
2198err_alloc_queues:
2199 ixgbevf_free_q_vectors(adapter);
2200err_alloc_q_vectors:
2201 ixgbevf_reset_interrupt_capability(adapter);
2202err_set_interrupt:
2203 return err;
2204}
2205
2206/**
2207 * ixgbevf_sw_init - Initialize general software structures
2208 * (struct ixgbevf_adapter)
2209 * @adapter: board private structure to initialize
2210 *
2211 * ixgbevf_sw_init initializes the Adapter private data structure.
2212 * Fields are initialized based on PCI device information and
2213 * OS network device settings (MTU size).
2214 **/
2215static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2216{
2217 struct ixgbe_hw *hw = &adapter->hw;
2218 struct pci_dev *pdev = adapter->pdev;
2219 int err;
2220
2221 /* PCI config space info */
2222
2223 hw->vendor_id = pdev->vendor;
2224 hw->device_id = pdev->device;
2225 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
2226 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2227 hw->subsystem_device_id = pdev->subsystem_device;
2228
2229 hw->mbx.ops.init_params(hw);
2230 hw->mac.max_tx_queues = MAX_TX_QUEUES;
2231 hw->mac.max_rx_queues = MAX_RX_QUEUES;
2232 err = hw->mac.ops.reset_hw(hw);
2233 if (err) {
2234 dev_info(&pdev->dev,
2235 "PF still in reset state, assigning new address\n");
2236 random_ether_addr(hw->mac.addr);
2237 } else {
2238 err = hw->mac.ops.init_hw(hw);
2239 if (err) {
2240 printk(KERN_ERR "init_shared_code failed: %d\n", err);
2241 goto out;
2242 }
2243 }
2244
2245 /* Enable dynamic interrupt throttling rates */
2246 adapter->eitr_param = 20000;
2247 adapter->itr_setting = 1;
2248
2249 /* set defaults for eitr in MegaBytes */
2250 adapter->eitr_low = 10;
2251 adapter->eitr_high = 20;
2252
2253 /* set default ring sizes */
2254 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2255 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2256
2257 /* enable rx csum by default */
2258 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2259
2260 set_bit(__IXGBEVF_DOWN, &adapter->state);
2261
2262out:
2263 return err;
2264}
2265
92915f71
GR
2266#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2267 { \
2268 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2269 if (current_counter < last_counter) \
2270 counter += 0x100000000LL; \
2271 last_counter = current_counter; \
2272 counter &= 0xFFFFFFFF00000000LL; \
2273 counter |= current_counter; \
2274 }
2275
2276#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2277 { \
2278 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2279 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2280 u64 current_counter = (current_counter_msb << 32) | \
2281 current_counter_lsb; \
2282 if (current_counter < last_counter) \
2283 counter += 0x1000000000LL; \
2284 last_counter = current_counter; \
2285 counter &= 0xFFFFFFF000000000LL; \
2286 counter |= current_counter; \
2287 }
2288/**
2289 * ixgbevf_update_stats - Update the board statistics counters.
2290 * @adapter: board private structure
2291 **/
2292void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2293{
2294 struct ixgbe_hw *hw = &adapter->hw;
2295
2296 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2297 adapter->stats.vfgprc);
2298 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2299 adapter->stats.vfgptc);
2300 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2301 adapter->stats.last_vfgorc,
2302 adapter->stats.vfgorc);
2303 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2304 adapter->stats.last_vfgotc,
2305 adapter->stats.vfgotc);
2306 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2307 adapter->stats.vfmprc);
2308
2309 /* Fill out the OS statistics structure */
2310 adapter->net_stats.multicast = adapter->stats.vfmprc -
2311 adapter->stats.base_vfmprc;
2312}
2313
2314/**
2315 * ixgbevf_watchdog - Timer Call-back
2316 * @data: pointer to adapter cast into an unsigned long
2317 **/
2318static void ixgbevf_watchdog(unsigned long data)
2319{
2320 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2321 struct ixgbe_hw *hw = &adapter->hw;
2322 u64 eics = 0;
2323 int i;
2324
2325 /*
2326 * Do the watchdog outside of interrupt context due to the lovely
2327 * delays that some of the newer hardware requires
2328 */
2329
2330 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2331 goto watchdog_short_circuit;
2332
2333 /* get one bit for every active tx/rx interrupt vector */
2334 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2335 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2336 if (qv->rxr_count || qv->txr_count)
2337 eics |= (1 << i);
2338 }
2339
2340 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics);
2341
2342watchdog_short_circuit:
2343 schedule_work(&adapter->watchdog_task);
2344}
2345
2346/**
2347 * ixgbevf_tx_timeout - Respond to a Tx Hang
2348 * @netdev: network interface device structure
2349 **/
2350static void ixgbevf_tx_timeout(struct net_device *netdev)
2351{
2352 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2353
2354 /* Do the reset outside of interrupt context */
2355 schedule_work(&adapter->reset_task);
2356}
2357
2358static void ixgbevf_reset_task(struct work_struct *work)
2359{
2360 struct ixgbevf_adapter *adapter;
2361 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2362
2363 /* If we're already down or resetting, just bail */
2364 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2365 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2366 return;
2367
2368 adapter->tx_timeout_count++;
2369
2370 ixgbevf_reinit_locked(adapter);
2371}
2372
2373/**
2374 * ixgbevf_watchdog_task - worker thread to bring link up
2375 * @work: pointer to work_struct containing our data
2376 **/
2377static void ixgbevf_watchdog_task(struct work_struct *work)
2378{
2379 struct ixgbevf_adapter *adapter = container_of(work,
2380 struct ixgbevf_adapter,
2381 watchdog_task);
2382 struct net_device *netdev = adapter->netdev;
2383 struct ixgbe_hw *hw = &adapter->hw;
2384 u32 link_speed = adapter->link_speed;
2385 bool link_up = adapter->link_up;
2386
2387 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2388
2389 /*
2390 * Always check the link on the watchdog because we have
2391 * no LSC interrupt
2392 */
2393 if (hw->mac.ops.check_link) {
2394 if ((hw->mac.ops.check_link(hw, &link_speed,
2395 &link_up, false)) != 0) {
2396 adapter->link_up = link_up;
2397 adapter->link_speed = link_speed;
da6b3330
GR
2398 netif_carrier_off(netdev);
2399 netif_tx_stop_all_queues(netdev);
92915f71
GR
2400 schedule_work(&adapter->reset_task);
2401 goto pf_has_reset;
2402 }
2403 } else {
2404 /* always assume link is up, if no check link
2405 * function */
2406 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2407 link_up = true;
2408 }
2409 adapter->link_up = link_up;
2410 adapter->link_speed = link_speed;
2411
2412 if (link_up) {
2413 if (!netif_carrier_ok(netdev)) {
300bc060
JP
2414 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
2415 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2416 10 : 1);
92915f71
GR
2417 netif_carrier_on(netdev);
2418 netif_tx_wake_all_queues(netdev);
2419 } else {
2420 /* Force detection of hung controller */
2421 adapter->detect_tx_hung = true;
2422 }
2423 } else {
2424 adapter->link_up = false;
2425 adapter->link_speed = 0;
2426 if (netif_carrier_ok(netdev)) {
2427 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2428 netif_carrier_off(netdev);
2429 netif_tx_stop_all_queues(netdev);
2430 }
2431 }
2432
92915f71
GR
2433 ixgbevf_update_stats(adapter);
2434
33bd9f60 2435pf_has_reset:
92915f71
GR
2436 /* Force detection of hung controller every watchdog period */
2437 adapter->detect_tx_hung = true;
2438
2439 /* Reset the timer */
2440 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2441 mod_timer(&adapter->watchdog_timer,
2442 round_jiffies(jiffies + (2 * HZ)));
2443
2444 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2445}
2446
2447/**
2448 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2449 * @adapter: board private structure
2450 * @tx_ring: Tx descriptor ring for a specific queue
2451 *
2452 * Free all transmit software resources
2453 **/
2454void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2455 struct ixgbevf_ring *tx_ring)
2456{
2457 struct pci_dev *pdev = adapter->pdev;
2458
92915f71
GR
2459 ixgbevf_clean_tx_ring(adapter, tx_ring);
2460
2461 vfree(tx_ring->tx_buffer_info);
2462 tx_ring->tx_buffer_info = NULL;
2463
2a1f8794
NN
2464 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2465 tx_ring->dma);
92915f71
GR
2466
2467 tx_ring->desc = NULL;
2468}
2469
2470/**
2471 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2472 * @adapter: board private structure
2473 *
2474 * Free all transmit software resources
2475 **/
2476static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2477{
2478 int i;
2479
2480 for (i = 0; i < adapter->num_tx_queues; i++)
2481 if (adapter->tx_ring[i].desc)
2482 ixgbevf_free_tx_resources(adapter,
2483 &adapter->tx_ring[i]);
2484
2485}
2486
2487/**
2488 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2489 * @adapter: board private structure
2490 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2491 *
2492 * Return 0 on success, negative on failure
2493 **/
2494int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2495 struct ixgbevf_ring *tx_ring)
2496{
2497 struct pci_dev *pdev = adapter->pdev;
2498 int size;
2499
2500 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2501 tx_ring->tx_buffer_info = vmalloc(size);
2502 if (!tx_ring->tx_buffer_info)
2503 goto err;
2504 memset(tx_ring->tx_buffer_info, 0, size);
2505
2506 /* round up to nearest 4K */
2507 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2508 tx_ring->size = ALIGN(tx_ring->size, 4096);
2509
2a1f8794
NN
2510 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
2511 &tx_ring->dma, GFP_KERNEL);
92915f71
GR
2512 if (!tx_ring->desc)
2513 goto err;
2514
2515 tx_ring->next_to_use = 0;
2516 tx_ring->next_to_clean = 0;
2517 tx_ring->work_limit = tx_ring->count;
2518 return 0;
2519
2520err:
2521 vfree(tx_ring->tx_buffer_info);
2522 tx_ring->tx_buffer_info = NULL;
2523 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2524 "descriptor ring\n");
2525 return -ENOMEM;
2526}
2527
2528/**
2529 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2530 * @adapter: board private structure
2531 *
2532 * If this function returns with an error, then it's possible one or
2533 * more of the rings is populated (while the rest are not). It is the
2534 * callers duty to clean those orphaned rings.
2535 *
2536 * Return 0 on success, negative on failure
2537 **/
2538static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2539{
2540 int i, err = 0;
2541
2542 for (i = 0; i < adapter->num_tx_queues; i++) {
2543 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2544 if (!err)
2545 continue;
2546 hw_dbg(&adapter->hw,
2547 "Allocation for Tx Queue %u failed\n", i);
2548 break;
2549 }
2550
2551 return err;
2552}
2553
2554/**
2555 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2556 * @adapter: board private structure
2557 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2558 *
2559 * Returns 0 on success, negative on failure
2560 **/
2561int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2562 struct ixgbevf_ring *rx_ring)
2563{
2564 struct pci_dev *pdev = adapter->pdev;
2565 int size;
2566
2567 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2568 rx_ring->rx_buffer_info = vmalloc(size);
2569 if (!rx_ring->rx_buffer_info) {
2570 hw_dbg(&adapter->hw,
2571 "Unable to vmalloc buffer memory for "
2572 "the receive descriptor ring\n");
2573 goto alloc_failed;
2574 }
2575 memset(rx_ring->rx_buffer_info, 0, size);
2576
2577 /* Round up to nearest 4K */
2578 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2579 rx_ring->size = ALIGN(rx_ring->size, 4096);
2580
2a1f8794
NN
2581 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
2582 &rx_ring->dma, GFP_KERNEL);
92915f71
GR
2583
2584 if (!rx_ring->desc) {
2585 hw_dbg(&adapter->hw,
2586 "Unable to allocate memory for "
2587 "the receive descriptor ring\n");
2588 vfree(rx_ring->rx_buffer_info);
2589 rx_ring->rx_buffer_info = NULL;
2590 goto alloc_failed;
2591 }
2592
2593 rx_ring->next_to_clean = 0;
2594 rx_ring->next_to_use = 0;
2595
2596 return 0;
2597alloc_failed:
2598 return -ENOMEM;
2599}
2600
2601/**
2602 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2603 * @adapter: board private structure
2604 *
2605 * If this function returns with an error, then it's possible one or
2606 * more of the rings is populated (while the rest are not). It is the
2607 * callers duty to clean those orphaned rings.
2608 *
2609 * Return 0 on success, negative on failure
2610 **/
2611static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2612{
2613 int i, err = 0;
2614
2615 for (i = 0; i < adapter->num_rx_queues; i++) {
2616 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2617 if (!err)
2618 continue;
2619 hw_dbg(&adapter->hw,
2620 "Allocation for Rx Queue %u failed\n", i);
2621 break;
2622 }
2623 return err;
2624}
2625
2626/**
2627 * ixgbevf_free_rx_resources - Free Rx Resources
2628 * @adapter: board private structure
2629 * @rx_ring: ring to clean the resources from
2630 *
2631 * Free all receive software resources
2632 **/
2633void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2634 struct ixgbevf_ring *rx_ring)
2635{
2636 struct pci_dev *pdev = adapter->pdev;
2637
2638 ixgbevf_clean_rx_ring(adapter, rx_ring);
2639
2640 vfree(rx_ring->rx_buffer_info);
2641 rx_ring->rx_buffer_info = NULL;
2642
2a1f8794
NN
2643 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2644 rx_ring->dma);
92915f71
GR
2645
2646 rx_ring->desc = NULL;
2647}
2648
2649/**
2650 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2651 * @adapter: board private structure
2652 *
2653 * Free all receive software resources
2654 **/
2655static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2656{
2657 int i;
2658
2659 for (i = 0; i < adapter->num_rx_queues; i++)
2660 if (adapter->rx_ring[i].desc)
2661 ixgbevf_free_rx_resources(adapter,
2662 &adapter->rx_ring[i]);
2663}
2664
2665/**
2666 * ixgbevf_open - Called when a network interface is made active
2667 * @netdev: network interface device structure
2668 *
2669 * Returns 0 on success, negative value on failure
2670 *
2671 * The open entry point is called when a network interface is made
2672 * active by the system (IFF_UP). At this point all resources needed
2673 * for transmit and receive operations are allocated, the interrupt
2674 * handler is registered with the OS, the watchdog timer is started,
2675 * and the stack is notified that the interface is ready.
2676 **/
2677static int ixgbevf_open(struct net_device *netdev)
2678{
2679 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2680 struct ixgbe_hw *hw = &adapter->hw;
2681 int err;
2682
2683 /* disallow open during test */
2684 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2685 return -EBUSY;
2686
2687 if (hw->adapter_stopped) {
2688 ixgbevf_reset(adapter);
2689 /* if adapter is still stopped then PF isn't up and
2690 * the vf can't start. */
2691 if (hw->adapter_stopped) {
2692 err = IXGBE_ERR_MBX;
2693 printk(KERN_ERR "Unable to start - perhaps the PF"
29b8dd02 2694 " Driver isn't up yet\n");
92915f71
GR
2695 goto err_setup_reset;
2696 }
2697 }
2698
2699 /* allocate transmit descriptors */
2700 err = ixgbevf_setup_all_tx_resources(adapter);
2701 if (err)
2702 goto err_setup_tx;
2703
2704 /* allocate receive descriptors */
2705 err = ixgbevf_setup_all_rx_resources(adapter);
2706 if (err)
2707 goto err_setup_rx;
2708
2709 ixgbevf_configure(adapter);
2710
2711 /*
2712 * Map the Tx/Rx rings to the vectors we were allotted.
2713 * if request_irq will be called in this function map_rings
2714 * must be called *before* up_complete
2715 */
2716 ixgbevf_map_rings_to_vectors(adapter);
2717
2718 err = ixgbevf_up_complete(adapter);
2719 if (err)
2720 goto err_up;
2721
2722 /* clear any pending interrupts, may auto mask */
2723 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2724 err = ixgbevf_request_irq(adapter);
2725 if (err)
2726 goto err_req_irq;
2727
2728 ixgbevf_irq_enable(adapter, true, true);
2729
2730 return 0;
2731
2732err_req_irq:
2733 ixgbevf_down(adapter);
2734err_up:
2735 ixgbevf_free_irq(adapter);
2736err_setup_rx:
2737 ixgbevf_free_all_rx_resources(adapter);
2738err_setup_tx:
2739 ixgbevf_free_all_tx_resources(adapter);
2740 ixgbevf_reset(adapter);
2741
2742err_setup_reset:
2743
2744 return err;
2745}
2746
2747/**
2748 * ixgbevf_close - Disables a network interface
2749 * @netdev: network interface device structure
2750 *
2751 * Returns 0, this is not allowed to fail
2752 *
2753 * The close entry point is called when an interface is de-activated
2754 * by the OS. The hardware is still under the drivers control, but
2755 * needs to be disabled. A global MAC reset is issued to stop the
2756 * hardware, and all transmit and receive resources are freed.
2757 **/
2758static int ixgbevf_close(struct net_device *netdev)
2759{
2760 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2761
2762 ixgbevf_down(adapter);
2763 ixgbevf_free_irq(adapter);
2764
2765 ixgbevf_free_all_tx_resources(adapter);
2766 ixgbevf_free_all_rx_resources(adapter);
2767
2768 return 0;
2769}
2770
2771static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2772 struct ixgbevf_ring *tx_ring,
2773 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2774{
2775 struct ixgbe_adv_tx_context_desc *context_desc;
2776 unsigned int i;
2777 int err;
2778 struct ixgbevf_tx_buffer *tx_buffer_info;
2779 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2780 u32 mss_l4len_idx, l4len;
2781
2782 if (skb_is_gso(skb)) {
2783 if (skb_header_cloned(skb)) {
2784 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2785 if (err)
2786 return err;
2787 }
2788 l4len = tcp_hdrlen(skb);
2789 *hdr_len += l4len;
2790
2791 if (skb->protocol == htons(ETH_P_IP)) {
2792 struct iphdr *iph = ip_hdr(skb);
2793 iph->tot_len = 0;
2794 iph->check = 0;
2795 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2796 iph->daddr, 0,
2797 IPPROTO_TCP,
2798 0);
2799 adapter->hw_tso_ctxt++;
9010bc33 2800 } else if (skb_is_gso_v6(skb)) {
92915f71
GR
2801 ipv6_hdr(skb)->payload_len = 0;
2802 tcp_hdr(skb)->check =
2803 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2804 &ipv6_hdr(skb)->daddr,
2805 0, IPPROTO_TCP, 0);
2806 adapter->hw_tso6_ctxt++;
2807 }
2808
2809 i = tx_ring->next_to_use;
2810
2811 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2812 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2813
2814 /* VLAN MACLEN IPLEN */
2815 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2816 vlan_macip_lens |=
2817 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2818 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2819 IXGBE_ADVTXD_MACLEN_SHIFT);
2820 *hdr_len += skb_network_offset(skb);
2821 vlan_macip_lens |=
2822 (skb_transport_header(skb) - skb_network_header(skb));
2823 *hdr_len +=
2824 (skb_transport_header(skb) - skb_network_header(skb));
2825 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2826 context_desc->seqnum_seed = 0;
2827
2828 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2829 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2830 IXGBE_ADVTXD_DTYP_CTXT);
2831
2832 if (skb->protocol == htons(ETH_P_IP))
2833 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2834 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2835 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2836
2837 /* MSS L4LEN IDX */
2838 mss_l4len_idx =
2839 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2840 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2841 /* use index 1 for TSO */
2842 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2843 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2844
2845 tx_buffer_info->time_stamp = jiffies;
2846 tx_buffer_info->next_to_watch = i;
2847
2848 i++;
2849 if (i == tx_ring->count)
2850 i = 0;
2851 tx_ring->next_to_use = i;
2852
2853 return true;
2854 }
2855
2856 return false;
2857}
2858
2859static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2860 struct ixgbevf_ring *tx_ring,
2861 struct sk_buff *skb, u32 tx_flags)
2862{
2863 struct ixgbe_adv_tx_context_desc *context_desc;
2864 unsigned int i;
2865 struct ixgbevf_tx_buffer *tx_buffer_info;
2866 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2867
2868 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2869 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2870 i = tx_ring->next_to_use;
2871 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2872 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2873
2874 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2875 vlan_macip_lens |= (tx_flags &
2876 IXGBE_TX_FLAGS_VLAN_MASK);
2877 vlan_macip_lens |= (skb_network_offset(skb) <<
2878 IXGBE_ADVTXD_MACLEN_SHIFT);
2879 if (skb->ip_summed == CHECKSUM_PARTIAL)
2880 vlan_macip_lens |= (skb_transport_header(skb) -
2881 skb_network_header(skb));
2882
2883 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2884 context_desc->seqnum_seed = 0;
2885
2886 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2887 IXGBE_ADVTXD_DTYP_CTXT);
2888
2889 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2890 switch (skb->protocol) {
2891 case __constant_htons(ETH_P_IP):
2892 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2893 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2894 type_tucmd_mlhl |=
2895 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2896 break;
2897 case __constant_htons(ETH_P_IPV6):
2898 /* XXX what about other V6 headers?? */
2899 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2900 type_tucmd_mlhl |=
2901 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2902 break;
2903 default:
2904 if (unlikely(net_ratelimit())) {
2905 printk(KERN_WARNING
2906 "partial checksum but "
2907 "proto=%x!\n",
2908 skb->protocol);
2909 }
2910 break;
2911 }
2912 }
2913
2914 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2915 /* use index zero for tx checksum offload */
2916 context_desc->mss_l4len_idx = 0;
2917
2918 tx_buffer_info->time_stamp = jiffies;
2919 tx_buffer_info->next_to_watch = i;
2920
2921 adapter->hw_csum_tx_good++;
2922 i++;
2923 if (i == tx_ring->count)
2924 i = 0;
2925 tx_ring->next_to_use = i;
2926
2927 return true;
2928 }
2929
2930 return false;
2931}
2932
2933static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2934 struct ixgbevf_ring *tx_ring,
2935 struct sk_buff *skb, u32 tx_flags,
2936 unsigned int first)
2937{
2938 struct pci_dev *pdev = adapter->pdev;
2939 struct ixgbevf_tx_buffer *tx_buffer_info;
2940 unsigned int len;
2941 unsigned int total = skb->len;
65deeed7 2942 unsigned int offset = 0, size, count = 0;
92915f71
GR
2943 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2944 unsigned int f;
65deeed7 2945 int i;
92915f71
GR
2946
2947 i = tx_ring->next_to_use;
2948
2949 len = min(skb_headlen(skb), total);
2950 while (len) {
2951 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2952 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2953
2954 tx_buffer_info->length = size;
2955 tx_buffer_info->mapped_as_page = false;
2a1f8794 2956 tx_buffer_info->dma = dma_map_single(&adapter->pdev->dev,
92915f71 2957 skb->data + offset,
2a1f8794
NN
2958 size, DMA_TO_DEVICE);
2959 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR
2960 goto dma_error;
2961 tx_buffer_info->time_stamp = jiffies;
2962 tx_buffer_info->next_to_watch = i;
2963
2964 len -= size;
2965 total -= size;
2966 offset += size;
2967 count++;
2968 i++;
2969 if (i == tx_ring->count)
2970 i = 0;
2971 }
2972
2973 for (f = 0; f < nr_frags; f++) {
2974 struct skb_frag_struct *frag;
2975
2976 frag = &skb_shinfo(skb)->frags[f];
2977 len = min((unsigned int)frag->size, total);
2978 offset = frag->page_offset;
2979
2980 while (len) {
2981 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2982 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2983
2984 tx_buffer_info->length = size;
2a1f8794 2985 tx_buffer_info->dma = dma_map_page(&adapter->pdev->dev,
92915f71
GR
2986 frag->page,
2987 offset,
2988 size,
2a1f8794 2989 DMA_TO_DEVICE);
92915f71 2990 tx_buffer_info->mapped_as_page = true;
2a1f8794 2991 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR
2992 goto dma_error;
2993 tx_buffer_info->time_stamp = jiffies;
2994 tx_buffer_info->next_to_watch = i;
2995
2996 len -= size;
2997 total -= size;
2998 offset += size;
2999 count++;
3000 i++;
3001 if (i == tx_ring->count)
3002 i = 0;
3003 }
3004 if (total == 0)
3005 break;
3006 }
3007
3008 if (i == 0)
3009 i = tx_ring->count - 1;
3010 else
3011 i = i - 1;
3012 tx_ring->tx_buffer_info[i].skb = skb;
3013 tx_ring->tx_buffer_info[first].next_to_watch = i;
3014
3015 return count;
3016
3017dma_error:
3018 dev_err(&pdev->dev, "TX DMA map failed\n");
3019
3020 /* clear timestamp and dma mappings for failed tx_buffer_info map */
3021 tx_buffer_info->dma = 0;
3022 tx_buffer_info->time_stamp = 0;
3023 tx_buffer_info->next_to_watch = 0;
3024 count--;
3025
3026 /* clear timestamp and dma mappings for remaining portion of packet */
3027 while (count >= 0) {
3028 count--;
3029 i--;
3030 if (i < 0)
3031 i += tx_ring->count;
3032 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3033 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3034 }
3035
3036 return count;
3037}
3038
3039static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
3040 struct ixgbevf_ring *tx_ring, int tx_flags,
3041 int count, u32 paylen, u8 hdr_len)
3042{
3043 union ixgbe_adv_tx_desc *tx_desc = NULL;
3044 struct ixgbevf_tx_buffer *tx_buffer_info;
3045 u32 olinfo_status = 0, cmd_type_len = 0;
3046 unsigned int i;
3047
3048 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3049
3050 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3051
3052 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3053
3054 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3055 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3056
3057 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3058 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3059
3060 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3061 IXGBE_ADVTXD_POPTS_SHIFT;
3062
3063 /* use index 1 context for tso */
3064 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3065 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3066 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3067 IXGBE_ADVTXD_POPTS_SHIFT;
3068
3069 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3070 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3071 IXGBE_ADVTXD_POPTS_SHIFT;
3072
3073 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3074
3075 i = tx_ring->next_to_use;
3076 while (count--) {
3077 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3078 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3079 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3080 tx_desc->read.cmd_type_len =
3081 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3082 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3083 i++;
3084 if (i == tx_ring->count)
3085 i = 0;
3086 }
3087
3088 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3089
3090 /*
3091 * Force memory writes to complete before letting h/w
3092 * know there are new descriptors to fetch. (Only
3093 * applicable for weak-ordered memory model archs,
3094 * such as IA-64).
3095 */
3096 wmb();
3097
3098 tx_ring->next_to_use = i;
3099 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3100}
3101
3102static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
3103 struct ixgbevf_ring *tx_ring, int size)
3104{
3105 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3106
3107 netif_stop_subqueue(netdev, tx_ring->queue_index);
3108 /* Herbert's original patch had:
3109 * smp_mb__after_netif_stop_queue();
3110 * but since that doesn't exist yet, just open code it. */
3111 smp_mb();
3112
3113 /* We need to check again in a case another CPU has just
3114 * made room available. */
3115 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3116 return -EBUSY;
3117
3118 /* A reprieve! - use start_queue because it doesn't call schedule */
3119 netif_start_subqueue(netdev, tx_ring->queue_index);
3120 ++adapter->restart_queue;
3121 return 0;
3122}
3123
3124static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
3125 struct ixgbevf_ring *tx_ring, int size)
3126{
3127 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3128 return 0;
3129 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
3130}
3131
3132static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3133{
3134 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3135 struct ixgbevf_ring *tx_ring;
3136 unsigned int first;
3137 unsigned int tx_flags = 0;
3138 u8 hdr_len = 0;
3139 int r_idx = 0, tso;
3140 int count = 0;
3141
3142 unsigned int f;
3143
3144 tx_ring = &adapter->tx_ring[r_idx];
3145
3146 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3147 tx_flags |= vlan_tx_tag_get(skb);
3148 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3149 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3150 }
3151
3152 /* four things can cause us to need a context descriptor */
3153 if (skb_is_gso(skb) ||
3154 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3155 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3156 count++;
3157
3158 count += TXD_USE_COUNT(skb_headlen(skb));
3159 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3160 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3161
3162 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) {
3163 adapter->tx_busy++;
3164 return NETDEV_TX_BUSY;
3165 }
3166
3167 first = tx_ring->next_to_use;
3168
3169 if (skb->protocol == htons(ETH_P_IP))
3170 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3171 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3172 if (tso < 0) {
3173 dev_kfree_skb_any(skb);
3174 return NETDEV_TX_OK;
3175 }
3176
3177 if (tso)
3178 tx_flags |= IXGBE_TX_FLAGS_TSO;
3179 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3180 (skb->ip_summed == CHECKSUM_PARTIAL))
3181 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3182
3183 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
3184 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
3185 skb->len, hdr_len);
3186
92915f71
GR
3187 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3188
3189 return NETDEV_TX_OK;
3190}
3191
3192/**
3193 * ixgbevf_get_stats - Get System Network Statistics
3194 * @netdev: network interface device structure
3195 *
3196 * Returns the address of the device statistics structure.
3197 * The statistics are actually updated from the timer callback.
3198 **/
3199static struct net_device_stats *ixgbevf_get_stats(struct net_device *netdev)
3200{
3201 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3202
3203 /* only return the current stats */
3204 return &adapter->net_stats;
3205}
3206
3207/**
3208 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3209 * @netdev: network interface device structure
3210 * @p: pointer to an address structure
3211 *
3212 * Returns 0 on success, negative on failure
3213 **/
3214static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3215{
3216 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3217 struct ixgbe_hw *hw = &adapter->hw;
3218 struct sockaddr *addr = p;
3219
3220 if (!is_valid_ether_addr(addr->sa_data))
3221 return -EADDRNOTAVAIL;
3222
3223 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3224 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3225
3226 if (hw->mac.ops.set_rar)
3227 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3228
3229 return 0;
3230}
3231
3232/**
3233 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3234 * @netdev: network interface device structure
3235 * @new_mtu: new value for maximum frame size
3236 *
3237 * Returns 0 on success, negative on failure
3238 **/
3239static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3240{
3241 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3242 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3243
3244 /* MTU < 68 is an error and causes problems on some kernels */
3245 if ((new_mtu < 68) || (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
3246 return -EINVAL;
3247
3248 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3249 netdev->mtu, new_mtu);
3250 /* must set new MTU before calling down or up */
3251 netdev->mtu = new_mtu;
3252
3253 if (netif_running(netdev))
3254 ixgbevf_reinit_locked(adapter);
3255
3256 return 0;
3257}
3258
3259static void ixgbevf_shutdown(struct pci_dev *pdev)
3260{
3261 struct net_device *netdev = pci_get_drvdata(pdev);
3262 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3263
3264 netif_device_detach(netdev);
3265
3266 if (netif_running(netdev)) {
3267 ixgbevf_down(adapter);
3268 ixgbevf_free_irq(adapter);
3269 ixgbevf_free_all_tx_resources(adapter);
3270 ixgbevf_free_all_rx_resources(adapter);
3271 }
3272
3273#ifdef CONFIG_PM
3274 pci_save_state(pdev);
3275#endif
3276
3277 pci_disable_device(pdev);
3278}
3279
92915f71
GR
3280static const struct net_device_ops ixgbe_netdev_ops = {
3281 .ndo_open = &ixgbevf_open,
3282 .ndo_stop = &ixgbevf_close,
3283 .ndo_start_xmit = &ixgbevf_xmit_frame,
3284 .ndo_get_stats = &ixgbevf_get_stats,
3285 .ndo_set_rx_mode = &ixgbevf_set_rx_mode,
3286 .ndo_set_multicast_list = &ixgbevf_set_rx_mode,
3287 .ndo_validate_addr = eth_validate_addr,
3288 .ndo_set_mac_address = &ixgbevf_set_mac,
3289 .ndo_change_mtu = &ixgbevf_change_mtu,
3290 .ndo_tx_timeout = &ixgbevf_tx_timeout,
3291 .ndo_vlan_rx_register = &ixgbevf_vlan_rx_register,
3292 .ndo_vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid,
3293 .ndo_vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid,
3294};
92915f71
GR
3295
3296static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3297{
3298 struct ixgbevf_adapter *adapter;
3299 adapter = netdev_priv(dev);
92915f71 3300 dev->netdev_ops = &ixgbe_netdev_ops;
92915f71
GR
3301 ixgbevf_set_ethtool_ops(dev);
3302 dev->watchdog_timeo = 5 * HZ;
3303}
3304
3305/**
3306 * ixgbevf_probe - Device Initialization Routine
3307 * @pdev: PCI device information struct
3308 * @ent: entry in ixgbevf_pci_tbl
3309 *
3310 * Returns 0 on success, negative on failure
3311 *
3312 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3313 * The OS initialization, configuring of the adapter private structure,
3314 * and a hardware reset occur.
3315 **/
3316static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3317 const struct pci_device_id *ent)
3318{
3319 struct net_device *netdev;
3320 struct ixgbevf_adapter *adapter = NULL;
3321 struct ixgbe_hw *hw = NULL;
3322 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3323 static int cards_found;
3324 int err, pci_using_dac;
3325
3326 err = pci_enable_device(pdev);
3327 if (err)
3328 return err;
3329
2a1f8794
NN
3330 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3331 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR
3332 pci_using_dac = 1;
3333 } else {
2a1f8794 3334 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3335 if (err) {
2a1f8794
NN
3336 err = dma_set_coherent_mask(&pdev->dev,
3337 DMA_BIT_MASK(32));
92915f71
GR
3338 if (err) {
3339 dev_err(&pdev->dev, "No usable DMA "
3340 "configuration, aborting\n");
3341 goto err_dma;
3342 }
3343 }
3344 pci_using_dac = 0;
3345 }
3346
3347 err = pci_request_regions(pdev, ixgbevf_driver_name);
3348 if (err) {
3349 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3350 goto err_pci_reg;
3351 }
3352
3353 pci_set_master(pdev);
3354
3355#ifdef HAVE_TX_MQ
3356 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3357 MAX_TX_QUEUES);
3358#else
3359 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter));
3360#endif
3361 if (!netdev) {
3362 err = -ENOMEM;
3363 goto err_alloc_etherdev;
3364 }
3365
3366 SET_NETDEV_DEV(netdev, &pdev->dev);
3367
3368 pci_set_drvdata(pdev, netdev);
3369 adapter = netdev_priv(netdev);
3370
3371 adapter->netdev = netdev;
3372 adapter->pdev = pdev;
3373 hw = &adapter->hw;
3374 hw->back = adapter;
3375 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3376
3377 /*
3378 * call save state here in standalone driver because it relies on
3379 * adapter struct to exist, and needs to call netdev_priv
3380 */
3381 pci_save_state(pdev);
3382
3383 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3384 pci_resource_len(pdev, 0));
3385 if (!hw->hw_addr) {
3386 err = -EIO;
3387 goto err_ioremap;
3388 }
3389
3390 ixgbevf_assign_netdev_ops(netdev);
3391
3392 adapter->bd_number = cards_found;
3393
3394 /* Setup hw api */
3395 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3396 hw->mac.type = ii->mac;
3397
3398 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
3399 sizeof(struct ixgbe_mac_operations));
3400
3401 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE;
3402 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
3403 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE;
3404
3405 /* setup the private structure */
3406 err = ixgbevf_sw_init(adapter);
3407
92915f71
GR
3408#ifdef MAX_SKB_FRAGS
3409 netdev->features = NETIF_F_SG |
3410 NETIF_F_IP_CSUM |
3411 NETIF_F_HW_VLAN_TX |
3412 NETIF_F_HW_VLAN_RX |
3413 NETIF_F_HW_VLAN_FILTER;
3414
3415 netdev->features |= NETIF_F_IPV6_CSUM;
3416 netdev->features |= NETIF_F_TSO;
3417 netdev->features |= NETIF_F_TSO6;
3418 netdev->vlan_features |= NETIF_F_TSO;
3419 netdev->vlan_features |= NETIF_F_TSO6;
3420 netdev->vlan_features |= NETIF_F_IP_CSUM;
3421 netdev->vlan_features |= NETIF_F_SG;
3422
3423 if (pci_using_dac)
3424 netdev->features |= NETIF_F_HIGHDMA;
3425
3426#endif /* MAX_SKB_FRAGS */
3427
3428 /* The HW MAC address was set and/or determined in sw_init */
3429 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
3430 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3431
3432 if (!is_valid_ether_addr(netdev->dev_addr)) {
3433 printk(KERN_ERR "invalid MAC address\n");
3434 err = -EIO;
3435 goto err_sw_init;
3436 }
3437
3438 init_timer(&adapter->watchdog_timer);
3439 adapter->watchdog_timer.function = &ixgbevf_watchdog;
3440 adapter->watchdog_timer.data = (unsigned long)adapter;
3441
3442 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3443 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3444
3445 err = ixgbevf_init_interrupt_scheme(adapter);
3446 if (err)
3447 goto err_sw_init;
3448
3449 /* pick up the PCI bus settings for reporting later */
3450 if (hw->mac.ops.get_bus_info)
3451 hw->mac.ops.get_bus_info(hw);
3452
3453
3454 netif_carrier_off(netdev);
3455 netif_tx_stop_all_queues(netdev);
3456
3457 strcpy(netdev->name, "eth%d");
3458
3459 err = register_netdev(netdev);
3460 if (err)
3461 goto err_register;
3462
3463 adapter->netdev_registered = true;
3464
33bd9f60
GR
3465 ixgbevf_init_last_counter_stats(adapter);
3466
92915f71
GR
3467 /* print the MAC address */
3468 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
3469 netdev->dev_addr[0],
3470 netdev->dev_addr[1],
3471 netdev->dev_addr[2],
3472 netdev->dev_addr[3],
3473 netdev->dev_addr[4],
3474 netdev->dev_addr[5]);
3475
3476 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3477
d6dbee86 3478 hw_dbg(hw, "LRO is disabled\n");
92915f71
GR
3479
3480 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3481 cards_found++;
3482 return 0;
3483
3484err_register:
3485err_sw_init:
3486 ixgbevf_reset_interrupt_capability(adapter);
3487 iounmap(hw->hw_addr);
3488err_ioremap:
3489 free_netdev(netdev);
3490err_alloc_etherdev:
3491 pci_release_regions(pdev);
3492err_pci_reg:
3493err_dma:
3494 pci_disable_device(pdev);
3495 return err;
3496}
3497
3498/**
3499 * ixgbevf_remove - Device Removal Routine
3500 * @pdev: PCI device information struct
3501 *
3502 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3503 * that it should release a PCI device. The could be caused by a
3504 * Hot-Plug event, or because the driver is going to be removed from
3505 * memory.
3506 **/
3507static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3508{
3509 struct net_device *netdev = pci_get_drvdata(pdev);
3510 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3511
3512 set_bit(__IXGBEVF_DOWN, &adapter->state);
3513
3514 del_timer_sync(&adapter->watchdog_timer);
3515
3516 cancel_work_sync(&adapter->watchdog_task);
3517
3518 flush_scheduled_work();
3519
3520 if (adapter->netdev_registered) {
3521 unregister_netdev(netdev);
3522 adapter->netdev_registered = false;
3523 }
3524
3525 ixgbevf_reset_interrupt_capability(adapter);
3526
3527 iounmap(adapter->hw.hw_addr);
3528 pci_release_regions(pdev);
3529
3530 hw_dbg(&adapter->hw, "Remove complete\n");
3531
3532 kfree(adapter->tx_ring);
3533 kfree(adapter->rx_ring);
3534
3535 free_netdev(netdev);
3536
3537 pci_disable_device(pdev);
3538}
3539
3540static struct pci_driver ixgbevf_driver = {
3541 .name = ixgbevf_driver_name,
3542 .id_table = ixgbevf_pci_tbl,
3543 .probe = ixgbevf_probe,
3544 .remove = __devexit_p(ixgbevf_remove),
3545 .shutdown = ixgbevf_shutdown,
3546};
3547
3548/**
3549 * ixgbe_init_module - Driver Registration Routine
3550 *
3551 * ixgbe_init_module is the first routine called when the driver is
3552 * loaded. All it does is register with the PCI subsystem.
3553 **/
3554static int __init ixgbevf_init_module(void)
3555{
3556 int ret;
3557 printk(KERN_INFO "ixgbevf: %s - version %s\n", ixgbevf_driver_string,
3558 ixgbevf_driver_version);
3559
3560 printk(KERN_INFO "%s\n", ixgbevf_copyright);
3561
3562 ret = pci_register_driver(&ixgbevf_driver);
3563 return ret;
3564}
3565
3566module_init(ixgbevf_init_module);
3567
3568/**
3569 * ixgbe_exit_module - Driver Exit Cleanup Routine
3570 *
3571 * ixgbe_exit_module is called just before the driver is removed
3572 * from memory.
3573 **/
3574static void __exit ixgbevf_exit_module(void)
3575{
3576 pci_unregister_driver(&ixgbevf_driver);
3577}
3578
3579#ifdef DEBUG
3580/**
3581 * ixgbe_get_hw_dev_name - return device name string
3582 * used by hardware layer to print debugging information
3583 **/
3584char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3585{
3586 struct ixgbevf_adapter *adapter = hw->back;
3587 return adapter->netdev->name;
3588}
3589
3590#endif
3591module_exit(ixgbevf_exit_module);
3592
3593/* ixgbevf_main.c */