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ixgbe: fix build when DEBUG is defined
[net-next-2.6.git] / drivers / net / ixgbe / ixgbe_ethtool.c
CommitLineData
9a799d71
AK		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
3efac5a0 4 Copyright(c) 1999 - 2009 Intel Corporation.
9a799d71
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
9a799d71
AK		 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28/* ethtool support for ixgbe */
29
30#include <linux/types.h>
31#include <linux/module.h>
32#include <linux/pci.h>
33#include <linux/netdevice.h>
34#include <linux/ethtool.h>
35#include <linux/vmalloc.h>
36#include <linux/uaccess.h>
37
38#include "ixgbe.h"
39
40
41#define IXGBE_ALL_RAR_ENTRIES 16
42
43struct ixgbe_stats {
44 char stat_string[ETH_GSTRING_LEN];
45 int sizeof_stat;
46 int stat_offset;
47};
48
49#define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
b4617240 50 offsetof(struct ixgbe_adapter, m)
9a799d71
AK		 51static struct ixgbe_stats ixgbe_gstrings_stats[] = {
52 {"rx_packets", IXGBE_STAT(net_stats.rx_packets)},
53 {"tx_packets", IXGBE_STAT(net_stats.tx_packets)},
54 {"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},
55 {"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},
56 {"lsc_int", IXGBE_STAT(lsc_int)},
57 {"tx_busy", IXGBE_STAT(tx_busy)},
58 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
59 {"rx_errors", IXGBE_STAT(net_stats.rx_errors)},
60 {"tx_errors", IXGBE_STAT(net_stats.tx_errors)},
61 {"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)},
62 {"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)},
63 {"multicast", IXGBE_STAT(net_stats.multicast)},
64 {"broadcast", IXGBE_STAT(stats.bprc)},
65 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
66 {"collisions", IXGBE_STAT(net_stats.collisions)},
67 {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
68 {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
69 {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
70 {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
71 {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
72 {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
73 {"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)},
74 {"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)},
75 {"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)},
76 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
77 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
78 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
79 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
80 {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)},
81 {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)},
82 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
83 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
84 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
85 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
86 {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)},
87 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
88 {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)},
89 {"rx_header_split", IXGBE_STAT(rx_hdr_split)},
90 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
91 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
e8e26350 92 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
9a799d71
AK		 93};
94
95#define IXGBE_QUEUE_STATS_LEN \
454d7c9b
WC		 96 ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
97 ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
98 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
b4617240 99#define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
2f90b865 100#define IXGBE_PB_STATS_LEN ( \
9d2f4720 101 (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
2f90b865
AD		 102 IXGBE_FLAG_DCB_ENABLED) ? \
103 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
104 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
105 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
106 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
107 / sizeof(u64) : 0)
108#define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
109 IXGBE_PB_STATS_LEN + \
110 IXGBE_QUEUE_STATS_LEN)
9a799d71
AK		 111
112static int ixgbe_get_settings(struct net_device *netdev,
b4617240 113 struct ethtool_cmd *ecmd)
9a799d71
AK		 114{
115 struct ixgbe_adapter *adapter = netdev_priv(netdev);
735441fb
AV		 116 struct ixgbe_hw *hw = &adapter->hw;
117 u32 link_speed = 0;
118 bool link_up;
9a799d71 119
735441fb
AV		 120 ecmd->supported = SUPPORTED_10000baseT_Full;
121 ecmd->autoneg = AUTONEG_ENABLE;
9a799d71 122 ecmd->transceiver = XCVR_EXTERNAL;
735441fb
AV		 123 if (hw->phy.media_type == ixgbe_media_type_copper) {
124 ecmd->supported |= (SUPPORTED_1000baseT_Full |
b4617240 125 SUPPORTED_TP | SUPPORTED_Autoneg);
735441fb
AV		 126
127 ecmd->advertising = (ADVERTISED_TP | ADVERTISED_Autoneg);
128 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
129 ecmd->advertising |= ADVERTISED_10000baseT_Full;
130 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
131 ecmd->advertising |= ADVERTISED_1000baseT_Full;
132
133 ecmd->port = PORT_TP;
1e336d0f
DS		 134 } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
135 /* Set as FIBRE until SERDES defined in kernel */
136 switch (hw->device_id) {
137 case IXGBE_DEV_ID_82598:
138 ecmd->supported |= (SUPPORTED_1000baseT_Full |
139 SUPPORTED_FIBRE);
140 ecmd->advertising = (ADVERTISED_10000baseT_Full |
141 ADVERTISED_1000baseT_Full |
142 ADVERTISED_FIBRE);
143 ecmd->port = PORT_FIBRE;
144 break;
2f21bdd3
DS		 145 case IXGBE_DEV_ID_82598_BX:
146 ecmd->supported = (SUPPORTED_1000baseT_Full |
147 SUPPORTED_FIBRE);
148 ecmd->advertising = (ADVERTISED_1000baseT_Full |
149 ADVERTISED_FIBRE);
150 ecmd->port = PORT_FIBRE;
151 ecmd->autoneg = AUTONEG_DISABLE;
152 break;
1e336d0f 153 }
735441fb
AV		 154 } else {
155 ecmd->supported |= SUPPORTED_FIBRE;
156 ecmd->advertising = (ADVERTISED_10000baseT_Full |
b4617240 157 ADVERTISED_FIBRE);
735441fb 158 ecmd->port = PORT_FIBRE;
c44ade9e 159 ecmd->autoneg = AUTONEG_DISABLE;
735441fb 160 }
9a799d71 161
c44ade9e 162 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
735441fb
AV		 163 if (link_up) {
164 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
b4617240 165 SPEED_10000 : SPEED_1000;
9a799d71
AK		 166 ecmd->duplex = DUPLEX_FULL;
167 } else {
168 ecmd->speed = -1;
169 ecmd->duplex = -1;
170 }
171
9a799d71
AK		 172 return 0;
173}
174
175static int ixgbe_set_settings(struct net_device *netdev,
b4617240 176 struct ethtool_cmd *ecmd)
9a799d71
AK		 177{
178 struct ixgbe_adapter *adapter = netdev_priv(netdev);
735441fb 179 struct ixgbe_hw *hw = &adapter->hw;
0befdb3e
JB		 180 u32 advertised, old;
181 s32 err;
9a799d71 182
735441fb
AV		 183 switch (hw->phy.media_type) {
184 case ixgbe_media_type_fiber:
185 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
186 (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
187 return -EINVAL;
188 /* in this case we currently only support 10Gb/FULL */
189 break;
0befdb3e
JB		 190 case ixgbe_media_type_copper:
191 /* 10000/copper and 1000/copper must autoneg
192 * this function does not support any duplex forcing, but can
193 * limit the advertising of the adapter to only 10000 or 1000 */
194 if (ecmd->autoneg == AUTONEG_DISABLE)
195 return -EINVAL;
196
197 old = hw->phy.autoneg_advertised;
198 advertised = 0;
199 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
200 advertised |= IXGBE_LINK_SPEED_10GB_FULL;
201
202 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
203 advertised |= IXGBE_LINK_SPEED_1GB_FULL;
204
205 if (old == advertised)
206 break;
207 /* this sets the link speed and restarts auto-neg */
208 err = hw->mac.ops.setup_link_speed(hw, advertised, true, true);
209 if (err) {
210 DPRINTK(PROBE, INFO,
211 "setup link failed with code %d\n", err);
212 hw->mac.ops.setup_link_speed(hw, old, true, true);
213 }
214 break;
735441fb
AV		 215 default:
216 break;
9a799d71
AK		 217 }
218
219 return 0;
220}
221
222static void ixgbe_get_pauseparam(struct net_device *netdev,
b4617240 223 struct ethtool_pauseparam *pause)
9a799d71
AK		 224{
225 struct ixgbe_adapter *adapter = netdev_priv(netdev);
226 struct ixgbe_hw *hw = &adapter->hw;
227
0ecc061d 228 pause->autoneg = (hw->fc.current_mode == ixgbe_fc_full ? 1 : 0);
9a799d71 229
0ecc061d 230 if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
9a799d71 231 pause->rx_pause = 1;
0ecc061d 232 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
9a799d71 233 pause->tx_pause = 1;
0ecc061d 234 } else if (hw->fc.current_mode == ixgbe_fc_full) {
9a799d71
AK		 235 pause->rx_pause = 1;
236 pause->tx_pause = 1;
237 }
238}
239
240static int ixgbe_set_pauseparam(struct net_device *netdev,
b4617240 241 struct ethtool_pauseparam *pause)
9a799d71
AK		 242{
243 struct ixgbe_adapter *adapter = netdev_priv(netdev);
244 struct ixgbe_hw *hw = &adapter->hw;
245
9c83b070
AV		 246 if ((pause->autoneg == AUTONEG_ENABLE) ||
247 (pause->rx_pause && pause->tx_pause))
0ecc061d 248 hw->fc.requested_mode = ixgbe_fc_full;
9a799d71 249 else if (pause->rx_pause && !pause->tx_pause)
0ecc061d 250 hw->fc.requested_mode = ixgbe_fc_rx_pause;
9a799d71 251 else if (!pause->rx_pause && pause->tx_pause)
0ecc061d 252 hw->fc.requested_mode = ixgbe_fc_tx_pause;
9a799d71 253 else if (!pause->rx_pause && !pause->tx_pause)
0ecc061d 254 hw->fc.requested_mode = ixgbe_fc_none;
9c83b070
AV		 255 else
256 return -EINVAL;
9a799d71 257
0ecc061d 258 hw->mac.ops.setup_fc(hw, 0);
9a799d71
AK		 259
260 return 0;
261}
262
263static u32 ixgbe_get_rx_csum(struct net_device *netdev)
264{
265 struct ixgbe_adapter *adapter = netdev_priv(netdev);
266 return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED);
267}
268
269static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
270{
271 struct ixgbe_adapter *adapter = netdev_priv(netdev);
272 if (data)
273 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
274 else
275 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
276
d4f80882
AV		 277 if (netif_running(netdev))
278 ixgbe_reinit_locked(adapter);
279 else
9a799d71 280 ixgbe_reset(adapter);
9a799d71
AK		 281
282 return 0;
283}
284
285static u32 ixgbe_get_tx_csum(struct net_device *netdev)
286{
22f32b7a 287 return (netdev->features & NETIF_F_IP_CSUM) != 0;
9a799d71
AK		 288}
289
290static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
291{
292 if (data)
22f32b7a 293 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
9a799d71 294 else
3d3d6d3c 295 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
9a799d71
AK		 296
297 return 0;
298}
299
300static int ixgbe_set_tso(struct net_device *netdev, u32 data)
301{
9a799d71
AK		 302 if (data) {
303 netdev->features |= NETIF_F_TSO;
304 netdev->features |= NETIF_F_TSO6;
305 } else {
fd2ea0a7 306 netif_tx_stop_all_queues(netdev);
9a799d71
AK		 307 netdev->features &= ~NETIF_F_TSO;
308 netdev->features &= ~NETIF_F_TSO6;
fd2ea0a7 309 netif_tx_start_all_queues(netdev);
9a799d71
AK		 310 }
311 return 0;
312}
313
314static u32 ixgbe_get_msglevel(struct net_device *netdev)
315{
316 struct ixgbe_adapter *adapter = netdev_priv(netdev);
317 return adapter->msg_enable;
318}
319
320static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
321{
322 struct ixgbe_adapter *adapter = netdev_priv(netdev);
323 adapter->msg_enable = data;
324}
325
326static int ixgbe_get_regs_len(struct net_device *netdev)
327{
328#define IXGBE_REGS_LEN 1128
329 return IXGBE_REGS_LEN * sizeof(u32);
330}
331
332#define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
333
334static void ixgbe_get_regs(struct net_device *netdev,
b4617240 335 struct ethtool_regs *regs, void *p)
9a799d71
AK		 336{
337 struct ixgbe_adapter *adapter = netdev_priv(netdev);
338 struct ixgbe_hw *hw = &adapter->hw;
339 u32 *regs_buff = p;
340 u8 i;
341
342 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
343
344 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
345
346 /* General Registers */
347 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
348 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
349 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
350 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
351 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
352 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
353 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
354 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
355
356 /* NVM Register */
357 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
358 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
359 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
360 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
361 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
362 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
363 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
364 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
365 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
366 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
367
368 /* Interrupt */
98c00a1c
JB		 369 /* don't read EICR because it can clear interrupt causes, instead
370 * read EICS which is a shadow but doesn't clear EICR */
371 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
9a799d71
AK		 372 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
373 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
374 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
375 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
376 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
377 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
378 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
379 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
380 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
c44ade9e 381 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
9a799d71
AK		 382 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
383
384 /* Flow Control */
385 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
386 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
387 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
388 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
389 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
390 for (i = 0; i < 8; i++)
391 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
392 for (i = 0; i < 8; i++)
393 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
394 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
395 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
396
397 /* Receive DMA */
398 for (i = 0; i < 64; i++)
399 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
400 for (i = 0; i < 64; i++)
401 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
402 for (i = 0; i < 64; i++)
403 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
404 for (i = 0; i < 64; i++)
405 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
406 for (i = 0; i < 64; i++)
407 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
408 for (i = 0; i < 64; i++)
409 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
410 for (i = 0; i < 16; i++)
411 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
412 for (i = 0; i < 16; i++)
413 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
414 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
415 for (i = 0; i < 8; i++)
416 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
417 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
418 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
419
420 /* Receive */
421 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
422 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
423 for (i = 0; i < 16; i++)
424 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
425 for (i = 0; i < 16; i++)
426 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
c44ade9e 427 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
9a799d71
AK		 428 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
429 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
430 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
431 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
432 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
433 for (i = 0; i < 8; i++)
434 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
435 for (i = 0; i < 8; i++)
436 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
437 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
438
439 /* Transmit */
440 for (i = 0; i < 32; i++)
441 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
442 for (i = 0; i < 32; i++)
443 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
444 for (i = 0; i < 32; i++)
445 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
446 for (i = 0; i < 32; i++)
447 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
448 for (i = 0; i < 32; i++)
449 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
450 for (i = 0; i < 32; i++)
451 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
452 for (i = 0; i < 32; i++)
453 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
454 for (i = 0; i < 32; i++)
455 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
456 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
457 for (i = 0; i < 16; i++)
458 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
459 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
460 for (i = 0; i < 8; i++)
461 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
462 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
463
464 /* Wake Up */
465 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
466 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
467 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
468 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
469 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
470 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
471 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
472 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
11afc1b1 473 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
9a799d71 474
9a799d71
AK		 475 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
476 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
477 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
478 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
479 for (i = 0; i < 8; i++)
480 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
481 for (i = 0; i < 8; i++)
482 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
483 for (i = 0; i < 8; i++)
484 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
485 for (i = 0; i < 8; i++)
486 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
487 for (i = 0; i < 8; i++)
488 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
489 for (i = 0; i < 8; i++)
490 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
491
492 /* Statistics */
493 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
494 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
495 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
496 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
497 for (i = 0; i < 8; i++)
498 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
499 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
500 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
501 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
502 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
503 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
504 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
505 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
506 for (i = 0; i < 8; i++)
507 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
508 for (i = 0; i < 8; i++)
509 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
510 for (i = 0; i < 8; i++)
511 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
512 for (i = 0; i < 8; i++)
513 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
514 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
515 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
516 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
517 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
518 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
519 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
520 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
521 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
522 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
523 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
524 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
525 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
526 for (i = 0; i < 8; i++)
527 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
528 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
529 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
530 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
531 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
532 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
533 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
534 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
535 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
536 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
537 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
538 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
539 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
540 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
541 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
542 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
543 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
544 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
545 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
546 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
547 for (i = 0; i < 16; i++)
548 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
549 for (i = 0; i < 16; i++)
550 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
551 for (i = 0; i < 16; i++)
552 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
553 for (i = 0; i < 16; i++)
554 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
555
556 /* MAC */
557 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
558 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
559 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
560 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
561 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
562 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
563 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
564 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
565 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
566 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
567 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
568 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
569 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
570 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
571 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
572 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
573 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
574 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
575 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
576 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
577 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
578 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
579 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
580 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
581 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
582 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
583 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
584 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
585 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
586 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
587 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
588 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
589 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
590
591 /* Diagnostic */
592 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
593 for (i = 0; i < 8; i++)
98c00a1c 594 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
9a799d71 595 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
98c00a1c
JB		 596 for (i = 0; i < 4; i++)
597 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
9a799d71
AK		 598 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
599 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
600 for (i = 0; i < 8; i++)
98c00a1c 601 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
9a799d71 602 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
98c00a1c
JB		 603 for (i = 0; i < 4; i++)
604 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
9a799d71
AK		 605 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
606 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
607 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
608 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
609 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
610 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
611 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
612 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
613 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
614 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
615 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
616 for (i = 0; i < 8; i++)
98c00a1c 617 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
9a799d71
AK		 618 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
619 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
620 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
621 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
622 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
623 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
624 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
625 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
626 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
627}
628
629static int ixgbe_get_eeprom_len(struct net_device *netdev)
630{
631 struct ixgbe_adapter *adapter = netdev_priv(netdev);
632 return adapter->hw.eeprom.word_size * 2;
633}
634
635static int ixgbe_get_eeprom(struct net_device *netdev,
b4617240 636 struct ethtool_eeprom *eeprom, u8 *bytes)
9a799d71
AK		 637{
638 struct ixgbe_adapter *adapter = netdev_priv(netdev);
639 struct ixgbe_hw *hw = &adapter->hw;
640 u16 *eeprom_buff;
641 int first_word, last_word, eeprom_len;
642 int ret_val = 0;
643 u16 i;
644
645 if (eeprom->len == 0)
646 return -EINVAL;
647
648 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
649
650 first_word = eeprom->offset >> 1;
651 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
652 eeprom_len = last_word - first_word + 1;
653
654 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
655 if (!eeprom_buff)
656 return -ENOMEM;
657
658 for (i = 0; i < eeprom_len; i++) {
c44ade9e 659 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
b4617240 660 &eeprom_buff[i])))
9a799d71
AK		 661 break;
662 }
663
664 /* Device's eeprom is always little-endian, word addressable */
665 for (i = 0; i < eeprom_len; i++)
666 le16_to_cpus(&eeprom_buff[i]);
667
668 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
669 kfree(eeprom_buff);
670
671 return ret_val;
672}
673
674static void ixgbe_get_drvinfo(struct net_device *netdev,
b4617240 675 struct ethtool_drvinfo *drvinfo)
9a799d71
AK		 676{
677 struct ixgbe_adapter *adapter = netdev_priv(netdev);
34b0368c 678 char firmware_version[32];
9a799d71
AK		 679
680 strncpy(drvinfo->driver, ixgbe_driver_name, 32);
681 strncpy(drvinfo->version, ixgbe_driver_version, 32);
34b0368c
PWJ		 682
683 sprintf(firmware_version, "%d.%d-%d",
684 (adapter->eeprom_version & 0xF000) >> 12,
685 (adapter->eeprom_version & 0x0FF0) >> 4,
686 adapter->eeprom_version & 0x000F);
687
688 strncpy(drvinfo->fw_version, firmware_version, 32);
9a799d71
AK		 689 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
690 drvinfo->n_stats = IXGBE_STATS_LEN;
691 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
692}
693
694static void ixgbe_get_ringparam(struct net_device *netdev,
b4617240 695 struct ethtool_ringparam *ring)
9a799d71
AK		 696{
697 struct ixgbe_adapter *adapter = netdev_priv(netdev);
698 struct ixgbe_ring *tx_ring = adapter->tx_ring;
699 struct ixgbe_ring *rx_ring = adapter->rx_ring;
700
701 ring->rx_max_pending = IXGBE_MAX_RXD;
702 ring->tx_max_pending = IXGBE_MAX_TXD;
703 ring->rx_mini_max_pending = 0;
704 ring->rx_jumbo_max_pending = 0;
705 ring->rx_pending = rx_ring->count;
706 ring->tx_pending = tx_ring->count;
707 ring->rx_mini_pending = 0;
708 ring->rx_jumbo_pending = 0;
709}
710
711static int ixgbe_set_ringparam(struct net_device *netdev,
b4617240 712 struct ethtool_ringparam *ring)
9a799d71
AK		 713{
714 struct ixgbe_adapter *adapter = netdev_priv(netdev);
c431f97e 715 struct ixgbe_ring *temp_ring;
9a799d71 716 int i, err;
c431f97e 717 u32 new_rx_count, new_tx_count;
9a799d71
AK		 718
719 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
720 return -EINVAL;
721
722 new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
723 new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
724 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
725
726 new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
727 new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
728 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
729
730 if ((new_tx_count == adapter->tx_ring->count) &&
731 (new_rx_count == adapter->rx_ring->count)) {
732 /* nothing to do */
733 return 0;
734 }
735
d3fa4721
PWJ		 736 temp_ring = kcalloc(adapter->num_tx_queues,
737 sizeof(struct ixgbe_ring), GFP_KERNEL);
c431f97e
JB		 738 if (!temp_ring)
739 return -ENOMEM;
740
d4f80882
AV		 741 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
742 msleep(1);
743
9a799d71
AK		 744 if (new_tx_count != adapter->tx_ring->count) {
745 for (i = 0; i < adapter->num_tx_queues; i++) {
c431f97e
JB		 746 temp_ring[i].count = new_tx_count;
747 err = ixgbe_setup_tx_resources(adapter, &temp_ring[i]);
9a799d71 748 if (err) {
c431f97e
JB		 749 while (i) {
750 i--;
b4617240
PW		 751 ixgbe_free_tx_resources(adapter,
752 &temp_ring[i]);
c431f97e 753 }
9a799d71
AK		 754 goto err_setup;
755 }
d3fa4721 756 temp_ring[i].v_idx = adapter->tx_ring[i].v_idx;
9a799d71 757 }
d3fa4721
PWJ		 758 if (netif_running(netdev))
759 netdev->netdev_ops->ndo_stop(netdev);
760 ixgbe_reset_interrupt_capability(adapter);
761 ixgbe_napi_del_all(adapter);
762 INIT_LIST_HEAD(&netdev->napi_list);
763 kfree(adapter->tx_ring);
764 adapter->tx_ring = temp_ring;
765 temp_ring = NULL;
c431f97e 766 adapter->tx_ring_count = new_tx_count;
9a799d71
AK		 767 }
768
d3fa4721
PWJ		 769 temp_ring = kcalloc(adapter->num_rx_queues,
770 sizeof(struct ixgbe_ring), GFP_KERNEL);
771 if (!temp_ring) {
772 if (netif_running(netdev))
773 netdev->netdev_ops->ndo_open(netdev);
774 return -ENOMEM;
775 }
9a799d71 776
d3fa4721 777 if (new_rx_count != adapter->rx_ring->count) {
c431f97e
JB		 778 for (i = 0; i < adapter->num_rx_queues; i++) {
779 temp_ring[i].count = new_rx_count;
780 err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]);
9a799d71 781 if (err) {
c431f97e
JB		 782 while (i) {
783 i--;
b4617240
PW		 784 ixgbe_free_rx_resources(adapter,
785 &temp_ring[i]);
c431f97e 786 }
9a799d71
AK		 787 goto err_setup;
788 }
d3fa4721 789 temp_ring[i].v_idx = adapter->rx_ring[i].v_idx;
9a799d71 790 }
d3fa4721
PWJ		 791 if (netif_running(netdev))
792 netdev->netdev_ops->ndo_stop(netdev);
793 ixgbe_reset_interrupt_capability(adapter);
794 ixgbe_napi_del_all(adapter);
795 INIT_LIST_HEAD(&netdev->napi_list);
796 kfree(adapter->rx_ring);
797 adapter->rx_ring = temp_ring;
798 temp_ring = NULL;
c431f97e
JB		 799
800 adapter->rx_ring_count = new_rx_count;
9a799d71
AK		 801 }
802
c431f97e 803 /* success! */
9a799d71
AK		 804 err = 0;
805err_setup:
d3fa4721 806 ixgbe_init_interrupt_scheme(adapter);
c431f97e 807 if (netif_running(netdev))
d3fa4721 808 netdev->netdev_ops->ndo_open(netdev);
9a799d71 809
d4f80882 810 clear_bit(__IXGBE_RESETTING, &adapter->state);
9a799d71
AK		 811 return err;
812}
813
b9f2c044 814static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
9a799d71 815{
b9f2c044
JG		 816 switch (sset) {
817 case ETH_SS_STATS:
818 return IXGBE_STATS_LEN;
819 default:
820 return -EOPNOTSUPP;
821 }
9a799d71
AK		 822}
823
824static void ixgbe_get_ethtool_stats(struct net_device *netdev,
b4617240 825 struct ethtool_stats *stats, u64 *data)
9a799d71
AK		 826{
827 struct ixgbe_adapter *adapter = netdev_priv(netdev);
828 u64 *queue_stat;
829 int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
830 int j, k;
831 int i;
832
833 ixgbe_update_stats(adapter);
834 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
835 char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset;
836 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
b4617240 837 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
9a799d71
AK		 838 }
839 for (j = 0; j < adapter->num_tx_queues; j++) {
840 queue_stat = (u64 *)&adapter->tx_ring[j].stats;
841 for (k = 0; k < stat_count; k++)
842 data[i + k] = queue_stat[k];
843 i += k;
844 }
845 for (j = 0; j < adapter->num_rx_queues; j++) {
846 queue_stat = (u64 *)&adapter->rx_ring[j].stats;
847 for (k = 0; k < stat_count; k++)
848 data[i + k] = queue_stat[k];
849 i += k;
850 }
2f90b865
AD		 851 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
852 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
853 data[i++] = adapter->stats.pxontxc[j];
854 data[i++] = adapter->stats.pxofftxc[j];
855 }
856 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
857 data[i++] = adapter->stats.pxonrxc[j];
858 data[i++] = adapter->stats.pxoffrxc[j];
859 }
860 }
9a799d71
AK		 861}
862
863static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
b4617240 864 u8 *data)
9a799d71
AK		 865{
866 struct ixgbe_adapter *adapter = netdev_priv(netdev);
c44ade9e 867 char *p = (char *)data;
9a799d71
AK		 868 int i;
869
870 switch (stringset) {
871 case ETH_SS_STATS:
872 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
873 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
874 ETH_GSTRING_LEN);
875 p += ETH_GSTRING_LEN;
876 }
877 for (i = 0; i < adapter->num_tx_queues; i++) {
878 sprintf(p, "tx_queue_%u_packets", i);
879 p += ETH_GSTRING_LEN;
880 sprintf(p, "tx_queue_%u_bytes", i);
881 p += ETH_GSTRING_LEN;
882 }
883 for (i = 0; i < adapter->num_rx_queues; i++) {
884 sprintf(p, "rx_queue_%u_packets", i);
885 p += ETH_GSTRING_LEN;
886 sprintf(p, "rx_queue_%u_bytes", i);
887 p += ETH_GSTRING_LEN;
888 }
2f90b865
AD		 889 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
890 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
891 sprintf(p, "tx_pb_%u_pxon", i);
bfb8cc31
DS		 892 p += ETH_GSTRING_LEN;
893 sprintf(p, "tx_pb_%u_pxoff", i);
894 p += ETH_GSTRING_LEN;
2f90b865
AD		 895 }
896 for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
bfb8cc31
DS		 897 sprintf(p, "rx_pb_%u_pxon", i);
898 p += ETH_GSTRING_LEN;
899 sprintf(p, "rx_pb_%u_pxoff", i);
900 p += ETH_GSTRING_LEN;
2f90b865
AD		 901 }
902 }
b4617240 903 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
9a799d71
AK		 904 break;
905 }
906}
907
908
909static void ixgbe_get_wol(struct net_device *netdev,
b4617240 910 struct ethtool_wolinfo *wol)
9a799d71 911{
e63d9762
PW		 912 struct ixgbe_adapter *adapter = netdev_priv(netdev);
913
914 wol->supported = WAKE_UCAST | WAKE_MCAST |
915 WAKE_BCAST | WAKE_MAGIC;
9a799d71
AK		 916 wol->wolopts = 0;
917
e63d9762
PW		 918 if (!device_can_wakeup(&adapter->pdev->dev))
919 return;
920
921 if (adapter->wol & IXGBE_WUFC_EX)
922 wol->wolopts |= WAKE_UCAST;
923 if (adapter->wol & IXGBE_WUFC_MC)
924 wol->wolopts |= WAKE_MCAST;
925 if (adapter->wol & IXGBE_WUFC_BC)
926 wol->wolopts |= WAKE_BCAST;
927 if (adapter->wol & IXGBE_WUFC_MAG)
928 wol->wolopts |= WAKE_MAGIC;
929
9a799d71
AK		 930 return;
931}
932
e63d9762
PW		 933static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
934{
935 struct ixgbe_adapter *adapter = netdev_priv(netdev);
936
937 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
938 return -EOPNOTSUPP;
939
940 adapter->wol = 0;
941
942 if (wol->wolopts & WAKE_UCAST)
943 adapter->wol |= IXGBE_WUFC_EX;
944 if (wol->wolopts & WAKE_MCAST)
945 adapter->wol |= IXGBE_WUFC_MC;
946 if (wol->wolopts & WAKE_BCAST)
947 adapter->wol |= IXGBE_WUFC_BC;
948 if (wol->wolopts & WAKE_MAGIC)
949 adapter->wol |= IXGBE_WUFC_MAG;
950
951 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
952
953 return 0;
954}
955
9a799d71
AK		 956static int ixgbe_nway_reset(struct net_device *netdev)
957{
958 struct ixgbe_adapter *adapter = netdev_priv(netdev);
959
d4f80882
AV		 960 if (netif_running(netdev))
961 ixgbe_reinit_locked(adapter);
9a799d71
AK		 962
963 return 0;
964}
965
966static int ixgbe_phys_id(struct net_device *netdev, u32 data)
967{
968 struct ixgbe_adapter *adapter = netdev_priv(netdev);
c44ade9e
JB		 969 struct ixgbe_hw *hw = &adapter->hw;
970 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
9a799d71
AK		 971 u32 i;
972
973 if (!data || data > 300)
974 data = 300;
975
976 for (i = 0; i < (data * 1000); i += 400) {
c44ade9e 977 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
9a799d71 978 msleep_interruptible(200);
c44ade9e 979 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
9a799d71
AK		 980 msleep_interruptible(200);
981 }
982
983 /* Restore LED settings */
984 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
985
986 return 0;
987}
988
989static int ixgbe_get_coalesce(struct net_device *netdev,
b4617240 990 struct ethtool_coalesce *ec)
9a799d71
AK		 991{
992 struct ixgbe_adapter *adapter = netdev_priv(netdev);
993
9a799d71 994 ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit;
30efa5a3
JB		 995
996 /* only valid if in constant ITR mode */
997 switch (adapter->itr_setting) {
998 case 0:
999 /* throttling disabled */
1000 ec->rx_coalesce_usecs = 0;
1001 break;
1002 case 1:
1003 /* dynamic ITR mode */
1004 ec->rx_coalesce_usecs = 1;
1005 break;
1006 default:
1007 /* fixed interrupt rate mode */
1008 ec->rx_coalesce_usecs = 1000000/adapter->eitr_param;
1009 break;
1010 }
9a799d71
AK		 1011 return 0;
1012}
1013
1014static int ixgbe_set_coalesce(struct net_device *netdev,
b4617240 1015 struct ethtool_coalesce *ec)
9a799d71
AK		 1016{
1017 struct ixgbe_adapter *adapter = netdev_priv(netdev);
30efa5a3 1018 int i;
9a799d71
AK		 1019
1020 if (ec->tx_max_coalesced_frames_irq)
30efa5a3
JB		 1021 adapter->tx_ring[0].work_limit = ec->tx_max_coalesced_frames_irq;
1022
1023 if (ec->rx_coalesce_usecs > 1) {
509ee935
JB		 1024 /* check the limits */
1025 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
1026 (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
1027 return -EINVAL;
1028
30efa5a3
JB		 1029 /* store the value in ints/second */
1030 adapter->eitr_param = 1000000/ec->rx_coalesce_usecs;
1031
1032 /* static value of interrupt rate */
1033 adapter->itr_setting = adapter->eitr_param;
509ee935 1034 /* clear the lower bit as its used for dynamic state */
30efa5a3
JB		 1035 adapter->itr_setting &= ~1;
1036 } else if (ec->rx_coalesce_usecs == 1) {
1037 /* 1 means dynamic mode */
1038 adapter->eitr_param = 20000;
1039 adapter->itr_setting = 1;
1040 } else {
509ee935
JB		 1041 /*
1042 * any other value means disable eitr, which is best
1043 * served by setting the interrupt rate very high
1044 */
1045 adapter->eitr_param = IXGBE_MAX_INT_RATE;
30efa5a3
JB		 1046 adapter->itr_setting = 0;
1047 }
9a799d71 1048
30efa5a3
JB		 1049 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
1050 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1051 if (q_vector->txr_count && !q_vector->rxr_count)
509ee935 1052 /* tx vector gets half the rate */
30efa5a3
JB		 1053 q_vector->eitr = (adapter->eitr_param >> 1);
1054 else
1055 /* rx only or mixed */
1056 q_vector->eitr = adapter->eitr_param;
509ee935
JB		 1057 ixgbe_write_eitr(adapter, i,
1058 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
9a799d71
AK		 1059 }
1060
1061 return 0;
1062}
1063
1064
b9804972 1065static const struct ethtool_ops ixgbe_ethtool_ops = {
9a799d71
AK		 1066 .get_settings = ixgbe_get_settings,
1067 .set_settings = ixgbe_set_settings,
1068 .get_drvinfo = ixgbe_get_drvinfo,
1069 .get_regs_len = ixgbe_get_regs_len,
1070 .get_regs = ixgbe_get_regs,
1071 .get_wol = ixgbe_get_wol,
e63d9762 1072 .set_wol = ixgbe_set_wol,
9a799d71
AK		 1073 .nway_reset = ixgbe_nway_reset,
1074 .get_link = ethtool_op_get_link,
1075 .get_eeprom_len = ixgbe_get_eeprom_len,
1076 .get_eeprom = ixgbe_get_eeprom,
1077 .get_ringparam = ixgbe_get_ringparam,
1078 .set_ringparam = ixgbe_set_ringparam,
1079 .get_pauseparam = ixgbe_get_pauseparam,
1080 .set_pauseparam = ixgbe_set_pauseparam,
1081 .get_rx_csum = ixgbe_get_rx_csum,
1082 .set_rx_csum = ixgbe_set_rx_csum,
1083 .get_tx_csum = ixgbe_get_tx_csum,
1084 .set_tx_csum = ixgbe_set_tx_csum,
1085 .get_sg = ethtool_op_get_sg,
1086 .set_sg = ethtool_op_set_sg,
1087 .get_msglevel = ixgbe_get_msglevel,
1088 .set_msglevel = ixgbe_set_msglevel,
1089 .get_tso = ethtool_op_get_tso,
1090 .set_tso = ixgbe_set_tso,
1091 .get_strings = ixgbe_get_strings,
1092 .phys_id = ixgbe_phys_id,
b4617240 1093 .get_sset_count = ixgbe_get_sset_count,
9a799d71
AK		 1094 .get_ethtool_stats = ixgbe_get_ethtool_stats,
1095 .get_coalesce = ixgbe_get_coalesce,
1096 .set_coalesce = ixgbe_set_coalesce,
177db6ff
MC		 1097 .get_flags = ethtool_op_get_flags,
1098 .set_flags = ethtool_op_set_flags,
9a799d71
AK		 1099};
1100
1101void ixgbe_set_ethtool_ops(struct net_device *netdev)
1102{
1103 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
1104}
Clone of davem's net-next-2.6 tree