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ixgbe: limit small mtu to minimum for ipv4 support
[net-next-2.6.git] / drivers / net / ixgbe / ixgbe_ethtool.c
CommitLineData
9a799d71
AK		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for ixgbe */
30
31#include <linux/types.h>
32#include <linux/module.h>
33#include <linux/pci.h>
34#include <linux/netdevice.h>
35#include <linux/ethtool.h>
36#include <linux/vmalloc.h>
37#include <linux/uaccess.h>
38
39#include "ixgbe.h"
40
41
42#define IXGBE_ALL_RAR_ENTRIES 16
43
44struct ixgbe_stats {
45 char stat_string[ETH_GSTRING_LEN];
46 int sizeof_stat;
47 int stat_offset;
48};
49
50#define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
51 offsetof(struct ixgbe_adapter, m)
52static struct ixgbe_stats ixgbe_gstrings_stats[] = {
53 {"rx_packets", IXGBE_STAT(net_stats.rx_packets)},
54 {"tx_packets", IXGBE_STAT(net_stats.tx_packets)},
55 {"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},
56 {"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},
57 {"lsc_int", IXGBE_STAT(lsc_int)},
58 {"tx_busy", IXGBE_STAT(tx_busy)},
59 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
60 {"rx_errors", IXGBE_STAT(net_stats.rx_errors)},
61 {"tx_errors", IXGBE_STAT(net_stats.tx_errors)},
62 {"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)},
63 {"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)},
64 {"multicast", IXGBE_STAT(net_stats.multicast)},
65 {"broadcast", IXGBE_STAT(stats.bprc)},
66 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
67 {"collisions", IXGBE_STAT(net_stats.collisions)},
68 {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
69 {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
70 {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
71 {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
72 {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
73 {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
74 {"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)},
75 {"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)},
76 {"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)},
77 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
78 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
79 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
80 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
81 {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)},
82 {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)},
83 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
84 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
85 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
86 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
87 {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)},
88 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
89 {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)},
90 {"rx_header_split", IXGBE_STAT(rx_hdr_split)},
91 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
92 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
177db6ff
MC		 93 {"lro_aggregated", IXGBE_STAT(lro_aggregated)},
94 {"lro_flushed", IXGBE_STAT(lro_flushed)},
9a799d71
AK		 95};
96
97#define IXGBE_QUEUE_STATS_LEN \
98 ((((struct ixgbe_adapter *)netdev->priv)->num_tx_queues + \
99 ((struct ixgbe_adapter *)netdev->priv)->num_rx_queues) * \
100 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
c00acf46 101#define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
9a799d71
AK		 102#define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + IXGBE_QUEUE_STATS_LEN)
103
104static int ixgbe_get_settings(struct net_device *netdev,
105 struct ethtool_cmd *ecmd)
106{
107 struct ixgbe_adapter *adapter = netdev_priv(netdev);
735441fb
AV		 108 struct ixgbe_hw *hw = &adapter->hw;
109 u32 link_speed = 0;
110 bool link_up;
9a799d71 111
735441fb
AV		 112 ecmd->supported = SUPPORTED_10000baseT_Full;
113 ecmd->autoneg = AUTONEG_ENABLE;
9a799d71 114 ecmd->transceiver = XCVR_EXTERNAL;
735441fb
AV		 115 if (hw->phy.media_type == ixgbe_media_type_copper) {
116 ecmd->supported |= (SUPPORTED_1000baseT_Full |
117 SUPPORTED_TP | SUPPORTED_Autoneg);
118
119 ecmd->advertising = (ADVERTISED_TP | ADVERTISED_Autoneg);
120 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
121 ecmd->advertising |= ADVERTISED_10000baseT_Full;
122 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
123 ecmd->advertising |= ADVERTISED_1000baseT_Full;
124
125 ecmd->port = PORT_TP;
126 } else {
127 ecmd->supported |= SUPPORTED_FIBRE;
128 ecmd->advertising = (ADVERTISED_10000baseT_Full |
129 ADVERTISED_FIBRE);
130 ecmd->port = PORT_FIBRE;
131 }
9a799d71 132
cf8280ee 133 adapter->hw.mac.ops.check_link(hw, &(link_speed), &link_up, false);
735441fb
AV		 134 if (link_up) {
135 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
136 SPEED_10000 : SPEED_1000;
9a799d71
AK		 137 ecmd->duplex = DUPLEX_FULL;
138 } else {
139 ecmd->speed = -1;
140 ecmd->duplex = -1;
141 }
142
9a799d71
AK		 143 return 0;
144}
145
146static int ixgbe_set_settings(struct net_device *netdev,
147 struct ethtool_cmd *ecmd)
148{
149 struct ixgbe_adapter *adapter = netdev_priv(netdev);
735441fb 150 struct ixgbe_hw *hw = &adapter->hw;
9a799d71 151
735441fb
AV		 152 switch (hw->phy.media_type) {
153 case ixgbe_media_type_fiber:
154 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
155 (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
156 return -EINVAL;
157 /* in this case we currently only support 10Gb/FULL */
158 break;
159 default:
160 break;
9a799d71
AK		 161 }
162
163 return 0;
164}
165
166static void ixgbe_get_pauseparam(struct net_device *netdev,
167 struct ethtool_pauseparam *pause)
168{
169 struct ixgbe_adapter *adapter = netdev_priv(netdev);
170 struct ixgbe_hw *hw = &adapter->hw;
171
9c83b070 172 pause->autoneg = (hw->fc.type == ixgbe_fc_full ? 1 : 0);
9a799d71
AK		 173
174 if (hw->fc.type == ixgbe_fc_rx_pause) {
175 pause->rx_pause = 1;
176 } else if (hw->fc.type == ixgbe_fc_tx_pause) {
177 pause->tx_pause = 1;
178 } else if (hw->fc.type == ixgbe_fc_full) {
179 pause->rx_pause = 1;
180 pause->tx_pause = 1;
181 }
182}
183
184static int ixgbe_set_pauseparam(struct net_device *netdev,
185 struct ethtool_pauseparam *pause)
186{
187 struct ixgbe_adapter *adapter = netdev_priv(netdev);
188 struct ixgbe_hw *hw = &adapter->hw;
189
9c83b070
AV		 190 if ((pause->autoneg == AUTONEG_ENABLE) ||
191 (pause->rx_pause && pause->tx_pause))
9a799d71
AK		 192 hw->fc.type = ixgbe_fc_full;
193 else if (pause->rx_pause && !pause->tx_pause)
194 hw->fc.type = ixgbe_fc_rx_pause;
195 else if (!pause->rx_pause && pause->tx_pause)
196 hw->fc.type = ixgbe_fc_tx_pause;
197 else if (!pause->rx_pause && !pause->tx_pause)
198 hw->fc.type = ixgbe_fc_none;
9c83b070
AV		 199 else
200 return -EINVAL;
9a799d71
AK		 201
202 hw->fc.original_type = hw->fc.type;
203
d4f80882
AV		 204 if (netif_running(netdev))
205 ixgbe_reinit_locked(adapter);
206 else
9a799d71 207 ixgbe_reset(adapter);
9a799d71
AK		 208
209 return 0;
210}
211
212static u32 ixgbe_get_rx_csum(struct net_device *netdev)
213{
214 struct ixgbe_adapter *adapter = netdev_priv(netdev);
215 return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED);
216}
217
218static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
219{
220 struct ixgbe_adapter *adapter = netdev_priv(netdev);
221 if (data)
222 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
223 else
224 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
225
d4f80882
AV		 226 if (netif_running(netdev))
227 ixgbe_reinit_locked(adapter);
228 else
9a799d71 229 ixgbe_reset(adapter);
9a799d71
AK		 230
231 return 0;
232}
233
234static u32 ixgbe_get_tx_csum(struct net_device *netdev)
235{
22f32b7a 236 return (netdev->features & NETIF_F_IP_CSUM) != 0;
9a799d71
AK		 237}
238
239static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
240{
241 if (data)
22f32b7a 242 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
9a799d71 243 else
22f32b7a 244 netdev->features &= ~NETIF_F_IP_CSUM;
9a799d71
AK		 245
246 return 0;
247}
248
249static int ixgbe_set_tso(struct net_device *netdev, u32 data)
250{
9a799d71
AK		 251 if (data) {
252 netdev->features |= NETIF_F_TSO;
253 netdev->features |= NETIF_F_TSO6;
254 } else {
fd2ea0a7 255 netif_tx_stop_all_queues(netdev);
9a799d71
AK		 256 netdev->features &= ~NETIF_F_TSO;
257 netdev->features &= ~NETIF_F_TSO6;
fd2ea0a7 258 netif_tx_start_all_queues(netdev);
9a799d71
AK		 259 }
260 return 0;
261}
262
263static u32 ixgbe_get_msglevel(struct net_device *netdev)
264{
265 struct ixgbe_adapter *adapter = netdev_priv(netdev);
266 return adapter->msg_enable;
267}
268
269static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
270{
271 struct ixgbe_adapter *adapter = netdev_priv(netdev);
272 adapter->msg_enable = data;
273}
274
275static int ixgbe_get_regs_len(struct net_device *netdev)
276{
277#define IXGBE_REGS_LEN 1128
278 return IXGBE_REGS_LEN * sizeof(u32);
279}
280
281#define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
282
283static void ixgbe_get_regs(struct net_device *netdev,
284 struct ethtool_regs *regs, void *p)
285{
286 struct ixgbe_adapter *adapter = netdev_priv(netdev);
287 struct ixgbe_hw *hw = &adapter->hw;
288 u32 *regs_buff = p;
289 u8 i;
290
291 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
292
293 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
294
295 /* General Registers */
296 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
297 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
298 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
299 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
300 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
301 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
302 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
303 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
304
305 /* NVM Register */
306 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
307 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
308 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
309 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
310 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
311 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
312 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
313 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
314 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
315 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
316
317 /* Interrupt */
318 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICR);
319 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
320 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
321 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
322 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
323 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
324 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
325 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
326 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
327 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
328 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL);
329 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
330
331 /* Flow Control */
332 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
333 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
334 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
335 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
336 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
337 for (i = 0; i < 8; i++)
338 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
339 for (i = 0; i < 8; i++)
340 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
341 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
342 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
343
344 /* Receive DMA */
345 for (i = 0; i < 64; i++)
346 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
347 for (i = 0; i < 64; i++)
348 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
349 for (i = 0; i < 64; i++)
350 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
351 for (i = 0; i < 64; i++)
352 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
353 for (i = 0; i < 64; i++)
354 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
355 for (i = 0; i < 64; i++)
356 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
357 for (i = 0; i < 16; i++)
358 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
359 for (i = 0; i < 16; i++)
360 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
361 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
362 for (i = 0; i < 8; i++)
363 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
364 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
365 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
366
367 /* Receive */
368 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
369 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
370 for (i = 0; i < 16; i++)
371 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
372 for (i = 0; i < 16; i++)
373 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
374 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE);
375 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
376 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
377 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
378 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
379 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
380 for (i = 0; i < 8; i++)
381 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
382 for (i = 0; i < 8; i++)
383 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
384 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
385
386 /* Transmit */
387 for (i = 0; i < 32; i++)
388 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
389 for (i = 0; i < 32; i++)
390 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
391 for (i = 0; i < 32; i++)
392 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
393 for (i = 0; i < 32; i++)
394 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
395 for (i = 0; i < 32; i++)
396 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
397 for (i = 0; i < 32; i++)
398 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
399 for (i = 0; i < 32; i++)
400 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
401 for (i = 0; i < 32; i++)
402 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
403 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
404 for (i = 0; i < 16; i++)
405 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
406 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
407 for (i = 0; i < 8; i++)
408 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
409 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
410
411 /* Wake Up */
412 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
413 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
414 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
415 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
416 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
417 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
418 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
419 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
420 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT);
421
422 /* DCE */
423 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
424 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
425 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
426 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
427 for (i = 0; i < 8; i++)
428 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
429 for (i = 0; i < 8; i++)
430 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
431 for (i = 0; i < 8; i++)
432 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
433 for (i = 0; i < 8; i++)
434 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
435 for (i = 0; i < 8; i++)
436 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
437 for (i = 0; i < 8; i++)
438 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
439
440 /* Statistics */
441 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
442 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
443 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
444 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
445 for (i = 0; i < 8; i++)
446 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
447 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
448 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
449 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
450 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
451 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
452 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
453 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
454 for (i = 0; i < 8; i++)
455 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
456 for (i = 0; i < 8; i++)
457 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
458 for (i = 0; i < 8; i++)
459 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
460 for (i = 0; i < 8; i++)
461 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
462 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
463 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
464 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
465 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
466 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
467 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
468 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
469 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
470 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
471 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
472 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
473 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
474 for (i = 0; i < 8; i++)
475 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
476 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
477 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
478 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
479 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
480 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
481 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
482 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
483 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
484 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
485 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
486 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
487 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
488 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
489 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
490 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
491 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
492 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
493 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
494 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
495 for (i = 0; i < 16; i++)
496 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
497 for (i = 0; i < 16; i++)
498 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
499 for (i = 0; i < 16; i++)
500 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
501 for (i = 0; i < 16; i++)
502 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
503
504 /* MAC */
505 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
506 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
507 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
508 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
509 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
510 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
511 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
512 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
513 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
514 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
515 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
516 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
517 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
518 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
519 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
520 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
521 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
522 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
523 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
524 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
525 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
526 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
527 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
528 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
529 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
530 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
531 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
532 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
533 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
534 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
535 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
536 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
537 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
538
539 /* Diagnostic */
540 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
541 for (i = 0; i < 8; i++)
542 regs_buff[1072] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
543 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
544 regs_buff[1081] = IXGBE_READ_REG(hw, IXGBE_RIC_DW0);
545 regs_buff[1082] = IXGBE_READ_REG(hw, IXGBE_RIC_DW1);
546 regs_buff[1083] = IXGBE_READ_REG(hw, IXGBE_RIC_DW2);
547 regs_buff[1084] = IXGBE_READ_REG(hw, IXGBE_RIC_DW3);
548 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
549 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
550 for (i = 0; i < 8; i++)
551 regs_buff[1087] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
552 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
553 regs_buff[1096] = IXGBE_READ_REG(hw, IXGBE_TIC_DW0);
554 regs_buff[1097] = IXGBE_READ_REG(hw, IXGBE_TIC_DW1);
555 regs_buff[1098] = IXGBE_READ_REG(hw, IXGBE_TIC_DW2);
556 regs_buff[1099] = IXGBE_READ_REG(hw, IXGBE_TIC_DW3);
557 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
558 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
559 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
560 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
561 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
562 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
563 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
564 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
565 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
566 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
567 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
568 for (i = 0; i < 8; i++)
569 regs_buff[1111] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
570 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
571 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
572 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
573 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
574 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
575 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
576 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
577 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
578 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
579}
580
581static int ixgbe_get_eeprom_len(struct net_device *netdev)
582{
583 struct ixgbe_adapter *adapter = netdev_priv(netdev);
584 return adapter->hw.eeprom.word_size * 2;
585}
586
587static int ixgbe_get_eeprom(struct net_device *netdev,
588 struct ethtool_eeprom *eeprom, u8 *bytes)
589{
590 struct ixgbe_adapter *adapter = netdev_priv(netdev);
591 struct ixgbe_hw *hw = &adapter->hw;
592 u16 *eeprom_buff;
593 int first_word, last_word, eeprom_len;
594 int ret_val = 0;
595 u16 i;
596
597 if (eeprom->len == 0)
598 return -EINVAL;
599
600 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
601
602 first_word = eeprom->offset >> 1;
603 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
604 eeprom_len = last_word - first_word + 1;
605
606 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
607 if (!eeprom_buff)
608 return -ENOMEM;
609
610 for (i = 0; i < eeprom_len; i++) {
611 if ((ret_val = ixgbe_read_eeprom(hw, first_word + i,
612 &eeprom_buff[i])))
613 break;
614 }
615
616 /* Device's eeprom is always little-endian, word addressable */
617 for (i = 0; i < eeprom_len; i++)
618 le16_to_cpus(&eeprom_buff[i]);
619
620 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
621 kfree(eeprom_buff);
622
623 return ret_val;
624}
625
626static void ixgbe_get_drvinfo(struct net_device *netdev,
627 struct ethtool_drvinfo *drvinfo)
628{
629 struct ixgbe_adapter *adapter = netdev_priv(netdev);
630
631 strncpy(drvinfo->driver, ixgbe_driver_name, 32);
632 strncpy(drvinfo->version, ixgbe_driver_version, 32);
633 strncpy(drvinfo->fw_version, "N/A", 32);
634 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
635 drvinfo->n_stats = IXGBE_STATS_LEN;
636 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
637}
638
639static void ixgbe_get_ringparam(struct net_device *netdev,
640 struct ethtool_ringparam *ring)
641{
642 struct ixgbe_adapter *adapter = netdev_priv(netdev);
643 struct ixgbe_ring *tx_ring = adapter->tx_ring;
644 struct ixgbe_ring *rx_ring = adapter->rx_ring;
645
646 ring->rx_max_pending = IXGBE_MAX_RXD;
647 ring->tx_max_pending = IXGBE_MAX_TXD;
648 ring->rx_mini_max_pending = 0;
649 ring->rx_jumbo_max_pending = 0;
650 ring->rx_pending = rx_ring->count;
651 ring->tx_pending = tx_ring->count;
652 ring->rx_mini_pending = 0;
653 ring->rx_jumbo_pending = 0;
654}
655
656static int ixgbe_set_ringparam(struct net_device *netdev,
657 struct ethtool_ringparam *ring)
658{
659 struct ixgbe_adapter *adapter = netdev_priv(netdev);
660 struct ixgbe_tx_buffer *old_buf;
661 struct ixgbe_rx_buffer *old_rx_buf;
662 void *old_desc;
663 int i, err;
664 u32 new_rx_count, new_tx_count, old_size;
665 dma_addr_t old_dma;
666
667 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
668 return -EINVAL;
669
670 new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
671 new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
672 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
673
674 new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
675 new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
676 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
677
678 if ((new_tx_count == adapter->tx_ring->count) &&
679 (new_rx_count == adapter->rx_ring->count)) {
680 /* nothing to do */
681 return 0;
682 }
683
d4f80882
AV		 684 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
685 msleep(1);
686
687 if (netif_running(netdev))
9a799d71
AK		 688 ixgbe_down(adapter);
689
690 /*
691 * We can't just free everything and then setup again,
692 * because the ISRs in MSI-X mode get passed pointers
693 * to the tx and rx ring structs.
694 */
695 if (new_tx_count != adapter->tx_ring->count) {
696 for (i = 0; i < adapter->num_tx_queues; i++) {
697 /* Save existing descriptor ring */
698 old_buf = adapter->tx_ring[i].tx_buffer_info;
699 old_desc = adapter->tx_ring[i].desc;
700 old_size = adapter->tx_ring[i].size;
701 old_dma = adapter->tx_ring[i].dma;
702 /* Try to allocate a new one */
703 adapter->tx_ring[i].tx_buffer_info = NULL;
704 adapter->tx_ring[i].desc = NULL;
705 adapter->tx_ring[i].count = new_tx_count;
706 err = ixgbe_setup_tx_resources(adapter,
707 &adapter->tx_ring[i]);
708 if (err) {
709 /* Restore the old one so at least
710 the adapter still works, even if
711 we failed the request */
712 adapter->tx_ring[i].tx_buffer_info = old_buf;
713 adapter->tx_ring[i].desc = old_desc;
714 adapter->tx_ring[i].size = old_size;
715 adapter->tx_ring[i].dma = old_dma;
716 goto err_setup;
717 }
718 /* Free the old buffer manually */
719 vfree(old_buf);
720 pci_free_consistent(adapter->pdev, old_size,
721 old_desc, old_dma);
722 }
723 }
724
725 if (new_rx_count != adapter->rx_ring->count) {
726 for (i = 0; i < adapter->num_rx_queues; i++) {
727
728 old_rx_buf = adapter->rx_ring[i].rx_buffer_info;
729 old_desc = adapter->rx_ring[i].desc;
730 old_size = adapter->rx_ring[i].size;
731 old_dma = adapter->rx_ring[i].dma;
732
733 adapter->rx_ring[i].rx_buffer_info = NULL;
734 adapter->rx_ring[i].desc = NULL;
735 adapter->rx_ring[i].dma = 0;
736 adapter->rx_ring[i].count = new_rx_count;
737 err = ixgbe_setup_rx_resources(adapter,
738 &adapter->rx_ring[i]);
739 if (err) {
740 adapter->rx_ring[i].rx_buffer_info = old_rx_buf;
741 adapter->rx_ring[i].desc = old_desc;
742 adapter->rx_ring[i].size = old_size;
743 adapter->rx_ring[i].dma = old_dma;
744 goto err_setup;
745 }
746
747 vfree(old_rx_buf);
748 pci_free_consistent(adapter->pdev, old_size, old_desc,
749 old_dma);
750 }
751 }
752
753 err = 0;
754err_setup:
755 if (netif_running(adapter->netdev))
756 ixgbe_up(adapter);
757
d4f80882 758 clear_bit(__IXGBE_RESETTING, &adapter->state);
9a799d71
AK		 759 return err;
760}
761
b9f2c044 762static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
9a799d71 763{
b9f2c044
JG		 764 switch (sset) {
765 case ETH_SS_STATS:
766 return IXGBE_STATS_LEN;
767 default:
768 return -EOPNOTSUPP;
769 }
9a799d71
AK		 770}
771
772static void ixgbe_get_ethtool_stats(struct net_device *netdev,
773 struct ethtool_stats *stats, u64 *data)
774{
775 struct ixgbe_adapter *adapter = netdev_priv(netdev);
776 u64 *queue_stat;
777 int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
778 int j, k;
779 int i;
177db6ff 780 u64 aggregated = 0, flushed = 0, no_desc = 0;
9a799d71
AK		 781
782 ixgbe_update_stats(adapter);
783 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
784 char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset;
785 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
786 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
787 }
788 for (j = 0; j < adapter->num_tx_queues; j++) {
789 queue_stat = (u64 *)&adapter->tx_ring[j].stats;
790 for (k = 0; k < stat_count; k++)
791 data[i + k] = queue_stat[k];
792 i += k;
793 }
794 for (j = 0; j < adapter->num_rx_queues; j++) {
177db6ff
MC		 795 aggregated += adapter->rx_ring[j].lro_mgr.stats.aggregated;
796 flushed += adapter->rx_ring[j].lro_mgr.stats.flushed;
797 no_desc += adapter->rx_ring[j].lro_mgr.stats.no_desc;
9a799d71
AK		 798 queue_stat = (u64 *)&adapter->rx_ring[j].stats;
799 for (k = 0; k < stat_count; k++)
800 data[i + k] = queue_stat[k];
801 i += k;
802 }
177db6ff
MC		 803 adapter->lro_aggregated = aggregated;
804 adapter->lro_flushed = flushed;
805 adapter->lro_no_desc = no_desc;
9a799d71
AK		 806}
807
808static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
809 u8 *data)
810{
811 struct ixgbe_adapter *adapter = netdev_priv(netdev);
812 u8 *p = data;
813 int i;
814
815 switch (stringset) {
816 case ETH_SS_STATS:
817 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
818 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
819 ETH_GSTRING_LEN);
820 p += ETH_GSTRING_LEN;
821 }
822 for (i = 0; i < adapter->num_tx_queues; i++) {
823 sprintf(p, "tx_queue_%u_packets", i);
824 p += ETH_GSTRING_LEN;
825 sprintf(p, "tx_queue_%u_bytes", i);
826 p += ETH_GSTRING_LEN;
827 }
828 for (i = 0; i < adapter->num_rx_queues; i++) {
829 sprintf(p, "rx_queue_%u_packets", i);
830 p += ETH_GSTRING_LEN;
831 sprintf(p, "rx_queue_%u_bytes", i);
832 p += ETH_GSTRING_LEN;
833 }
834/* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
835 break;
836 }
837}
838
839
840static void ixgbe_get_wol(struct net_device *netdev,
841 struct ethtool_wolinfo *wol)
842{
843 wol->supported = 0;
844 wol->wolopts = 0;
845
846 return;
847}
848
849static int ixgbe_nway_reset(struct net_device *netdev)
850{
851 struct ixgbe_adapter *adapter = netdev_priv(netdev);
852
d4f80882
AV		 853 if (netif_running(netdev))
854 ixgbe_reinit_locked(adapter);
9a799d71
AK		 855
856 return 0;
857}
858
859static int ixgbe_phys_id(struct net_device *netdev, u32 data)
860{
861 struct ixgbe_adapter *adapter = netdev_priv(netdev);
862 u32 led_reg = IXGBE_READ_REG(&adapter->hw, IXGBE_LEDCTL);
863 u32 i;
864
865 if (!data || data > 300)
866 data = 300;
867
868 for (i = 0; i < (data * 1000); i += 400) {
869 ixgbe_led_on(&adapter->hw, IXGBE_LED_ON);
870 msleep_interruptible(200);
871 ixgbe_led_off(&adapter->hw, IXGBE_LED_ON);
872 msleep_interruptible(200);
873 }
874
875 /* Restore LED settings */
876 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
877
878 return 0;
879}
880
881static int ixgbe_get_coalesce(struct net_device *netdev,
882 struct ethtool_coalesce *ec)
883{
884 struct ixgbe_adapter *adapter = netdev_priv(netdev);
885
f494e8fa
AV		 886 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
887 ec->rx_coalesce_usecs = adapter->rx_eitr;
9a799d71
AK		 888 else
889 ec->rx_coalesce_usecs = 1000000 / adapter->rx_eitr;
890
f494e8fa
AV		 891 if (adapter->tx_eitr < IXGBE_MIN_ITR_USECS)
892 ec->tx_coalesce_usecs = adapter->tx_eitr;
9a799d71
AK		 893 else
894 ec->tx_coalesce_usecs = 1000000 / adapter->tx_eitr;
895
896 ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit;
897 return 0;
898}
899
900static int ixgbe_set_coalesce(struct net_device *netdev,
901 struct ethtool_coalesce *ec)
902{
903 struct ixgbe_adapter *adapter = netdev_priv(netdev);
904
905 if ((ec->rx_coalesce_usecs > IXGBE_MAX_ITR_USECS) ||
f494e8fa
AV		 906 ((ec->rx_coalesce_usecs != 0) &&
907 (ec->rx_coalesce_usecs != 1) &&
908 (ec->rx_coalesce_usecs != 3) &&
9a799d71
AK		 909 (ec->rx_coalesce_usecs < IXGBE_MIN_ITR_USECS)))
910 return -EINVAL;
911 if ((ec->tx_coalesce_usecs > IXGBE_MAX_ITR_USECS) ||
f494e8fa
AV		 912 ((ec->tx_coalesce_usecs != 0) &&
913 (ec->tx_coalesce_usecs != 1) &&
914 (ec->tx_coalesce_usecs != 3) &&
9a799d71
AK		 915 (ec->tx_coalesce_usecs < IXGBE_MIN_ITR_USECS)))
916 return -EINVAL;
917
918 /* convert to rate of irq's per second */
f494e8fa
AV		 919 if (ec->rx_coalesce_usecs < IXGBE_MIN_ITR_USECS)
920 adapter->rx_eitr = ec->rx_coalesce_usecs;
9a799d71
AK		 921 else
922 adapter->rx_eitr = (1000000 / ec->rx_coalesce_usecs);
923
f494e8fa
AV		 924 if (ec->tx_coalesce_usecs < IXGBE_MIN_ITR_USECS)
925 adapter->tx_eitr = ec->rx_coalesce_usecs;
9a799d71
AK		 926 else
927 adapter->tx_eitr = (1000000 / ec->tx_coalesce_usecs);
928
929 if (ec->tx_max_coalesced_frames_irq)
930 adapter->tx_ring[0].work_limit =
931 ec->tx_max_coalesced_frames_irq;
932
933 if (netif_running(netdev)) {
934 ixgbe_down(adapter);
935 ixgbe_up(adapter);
936 }
937
938 return 0;
939}
940
941
942static struct ethtool_ops ixgbe_ethtool_ops = {
943 .get_settings = ixgbe_get_settings,
944 .set_settings = ixgbe_set_settings,
945 .get_drvinfo = ixgbe_get_drvinfo,
946 .get_regs_len = ixgbe_get_regs_len,
947 .get_regs = ixgbe_get_regs,
948 .get_wol = ixgbe_get_wol,
949 .nway_reset = ixgbe_nway_reset,
950 .get_link = ethtool_op_get_link,
951 .get_eeprom_len = ixgbe_get_eeprom_len,
952 .get_eeprom = ixgbe_get_eeprom,
953 .get_ringparam = ixgbe_get_ringparam,
954 .set_ringparam = ixgbe_set_ringparam,
955 .get_pauseparam = ixgbe_get_pauseparam,
956 .set_pauseparam = ixgbe_set_pauseparam,
957 .get_rx_csum = ixgbe_get_rx_csum,
958 .set_rx_csum = ixgbe_set_rx_csum,
959 .get_tx_csum = ixgbe_get_tx_csum,
960 .set_tx_csum = ixgbe_set_tx_csum,
961 .get_sg = ethtool_op_get_sg,
962 .set_sg = ethtool_op_set_sg,
963 .get_msglevel = ixgbe_get_msglevel,
964 .set_msglevel = ixgbe_set_msglevel,
965 .get_tso = ethtool_op_get_tso,
966 .set_tso = ixgbe_set_tso,
967 .get_strings = ixgbe_get_strings,
968 .phys_id = ixgbe_phys_id,
b9f2c044 969 .get_sset_count = ixgbe_get_sset_count,
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AK		 970 .get_ethtool_stats = ixgbe_get_ethtool_stats,
971 .get_coalesce = ixgbe_get_coalesce,
972 .set_coalesce = ixgbe_set_coalesce,
177db6ff
MC		 973 .get_flags = ethtool_op_get_flags,
974 .set_flags = ethtool_op_set_flags,
9a799d71
AK		 975};
976
977void ixgbe_set_ethtool_ops(struct net_device *netdev)
978{
979 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
980}
Clone of davem's net-next-2.6 tree