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ixgbe: Add support for the net_device_ops.ndo_fcoe_enable/disable to 82599
[net-next-2.6.git] / drivers / net / ixgbe / ixgbe_dcb_nl.c
CommitLineData
2f90b865
AD		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
3efac5a0 4 Copyright(c) 1999 - 2009 Intel Corporation.
2f90b865
AD		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgbe.h"
30#include <linux/dcbnl.h>
62551d3e
PWJ		 31#include "ixgbe_dcb_82598.h"
32#include "ixgbe_dcb_82599.h"
2f90b865
AD		 33
34/* Callbacks for DCB netlink in the kernel */
35#define BIT_DCB_MODE 0x01
36#define BIT_PFC 0x02
37#define BIT_PG_RX 0x04
38#define BIT_PG_TX 0x08
62551d3e 39#define BIT_RESETLINK 0x40
235ea828 40#define BIT_LINKSPEED 0x80
2f90b865 41
62551d3e
PWJ		 42/* Responses for the DCB_C_SET_ALL command */
43#define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
44#define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
45#define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
46
2f90b865
AD		 47int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
48 struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
49{
50 struct tc_configuration *src_tc_cfg = NULL;
51 struct tc_configuration *dst_tc_cfg = NULL;
52 int i;
53
54 if (!src_dcb_cfg || !dst_dcb_cfg)
55 return -EINVAL;
56
57 for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
58 src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
59 dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
60
61 dst_tc_cfg->path[DCB_TX_CONFIG].prio_type =
62 src_tc_cfg->path[DCB_TX_CONFIG].prio_type;
63
64 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id =
65 src_tc_cfg->path[DCB_TX_CONFIG].bwg_id;
66
67 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent =
68 src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent;
69
70 dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap =
71 src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap;
72
73 dst_tc_cfg->path[DCB_RX_CONFIG].prio_type =
74 src_tc_cfg->path[DCB_RX_CONFIG].prio_type;
75
76 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id =
77 src_tc_cfg->path[DCB_RX_CONFIG].bwg_id;
78
79 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent =
80 src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent;
81
82 dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap =
83 src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap;
84 }
85
86 for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
87 dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG]
88 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
89 [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
90 dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG]
91 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
92 [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
93 }
94
95 for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
96 dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc =
97 src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
98 }
99
ea4af4f4
PW		 100 dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
101
2f90b865
AD		 102 return 0;
103}
104
105static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
106{
107 struct ixgbe_adapter *adapter = netdev_priv(netdev);
108
2f90b865
AD		 109 return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
110}
111
1486a61e 112static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
2f90b865 113{
1486a61e 114 u8 err = 0;
2f90b865
AD		 115 struct ixgbe_adapter *adapter = netdev_priv(netdev);
116
2f90b865
AD		 117 if (state > 0) {
118 /* Turn on DCB */
1486a61e
DS		 119 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
120 goto out;
2f90b865 121
1486a61e
DS		 122 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
123 DPRINTK(DRV, ERR, "Enable failed, needs MSI-X\n");
124 err = 1;
125 goto out;
2f90b865 126 }
1486a61e
DS		 127
128 if (netif_running(netdev))
129 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 130 ixgbe_clear_interrupt_scheme(adapter);
1486a61e 131
264857b8
PWJ		 132 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
133 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
134 adapter->hw.fc.requested_mode = ixgbe_fc_none;
135 }
1486a61e 136 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
8faa2a78
YZ		 137 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
138 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
139 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
140 }
1486a61e
DS		 141 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
142 ixgbe_init_interrupt_scheme(adapter);
1486a61e
DS		 143 if (netif_running(netdev))
144 netdev->netdev_ops->ndo_open(netdev);
2f90b865
AD		 145 } else {
146 /* Turn off DCB */
147 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
148 if (netif_running(netdev))
1486a61e 149 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 150 ixgbe_clear_interrupt_scheme(adapter);
2f90b865 151
264857b8
PWJ		 152 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
153 adapter->temp_dcb_cfg.pfc_mode_enable = false;
154 adapter->dcb_cfg.pfc_mode_enable = false;
2f90b865
AD		 155 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
156 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
8faa2a78
YZ		 157 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
158 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
0d551589 159
2f90b865 160 ixgbe_init_interrupt_scheme(adapter);
2f90b865 161 if (netif_running(netdev))
1486a61e 162 netdev->netdev_ops->ndo_open(netdev);
2f90b865
AD		 163 }
164 }
1486a61e
DS		 165out:
166 return err;
2f90b865
AD		 167}
168
169static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
170 u8 *perm_addr)
171{
172 struct ixgbe_adapter *adapter = netdev_priv(netdev);
aca6bee7 173 int i, j;
2f90b865 174
86e713a0
LL		 175 memset(perm_addr, 0xff, MAX_ADDR_LEN);
176
2f90b865
AD		 177 for (i = 0; i < netdev->addr_len; i++)
178 perm_addr[i] = adapter->hw.mac.perm_addr[i];
aca6bee7
WJP		 179
180 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
181 for (j = 0; j < netdev->addr_len; j++, i++)
182 perm_addr[i] = adapter->hw.mac.san_addr[j];
183 }
2f90b865
AD		 184}
185
186static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
187 u8 prio, u8 bwg_id, u8 bw_pct,
188 u8 up_map)
189{
190 struct ixgbe_adapter *adapter = netdev_priv(netdev);
191
192 if (prio != DCB_ATTR_VALUE_UNDEFINED)
193 adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
194 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
195 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
196 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
197 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
198 bw_pct;
199 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
200 adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
201 up_map;
202
203 if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type !=
204 adapter->dcb_cfg.tc_config[tc].path[0].prio_type) ||
205 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id !=
206 adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) ||
207 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
208 adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
209 (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
62551d3e 210 adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)) {
2f90b865 211 adapter->dcb_set_bitmap |= BIT_PG_TX;
62551d3e
PWJ		 212 adapter->dcb_set_bitmap |= BIT_RESETLINK;
213 }
2f90b865
AD		 214}
215
216static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
217 u8 bw_pct)
218{
219 struct ixgbe_adapter *adapter = netdev_priv(netdev);
220
221 adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
222
223 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
62551d3e 224 adapter->dcb_cfg.bw_percentage[0][bwg_id]) {
2f90b865 225 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 226 adapter->dcb_set_bitmap |= BIT_RESETLINK;
227 }
2f90b865
AD		 228}
229
230static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
231 u8 prio, u8 bwg_id, u8 bw_pct,
232 u8 up_map)
233{
234 struct ixgbe_adapter *adapter = netdev_priv(netdev);
235
236 if (prio != DCB_ATTR_VALUE_UNDEFINED)
237 adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
238 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
239 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
240 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
241 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
242 bw_pct;
243 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
244 adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
245 up_map;
246
247 if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type !=
248 adapter->dcb_cfg.tc_config[tc].path[1].prio_type) ||
249 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id !=
250 adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) ||
251 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
252 adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
253 (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
62551d3e 254 adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)) {
2f90b865 255 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 256 adapter->dcb_set_bitmap |= BIT_RESETLINK;
257 }
2f90b865
AD		 258}
259
260static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
261 u8 bw_pct)
262{
263 struct ixgbe_adapter *adapter = netdev_priv(netdev);
264
265 adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
266
267 if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
62551d3e 268 adapter->dcb_cfg.bw_percentage[1][bwg_id]) {
2f90b865 269 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 270 adapter->dcb_set_bitmap |= BIT_RESETLINK;
271 }
2f90b865
AD		 272}
273
274static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
275 u8 *prio, u8 *bwg_id, u8 *bw_pct,
276 u8 *up_map)
277{
278 struct ixgbe_adapter *adapter = netdev_priv(netdev);
279
280 *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
281 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
282 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
283 *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
284}
285
286static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
287 u8 *bw_pct)
288{
289 struct ixgbe_adapter *adapter = netdev_priv(netdev);
290
291 *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
292}
293
294static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
295 u8 *prio, u8 *bwg_id, u8 *bw_pct,
296 u8 *up_map)
297{
298 struct ixgbe_adapter *adapter = netdev_priv(netdev);
299
300 *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
301 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
302 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
303 *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
304}
305
306static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
307 u8 *bw_pct)
308{
309 struct ixgbe_adapter *adapter = netdev_priv(netdev);
310
311 *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
312}
313
314static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
315 u8 setting)
316{
317 struct ixgbe_adapter *adapter = netdev_priv(netdev);
318
319 adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
320 if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
ea4af4f4 321 adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
2f90b865 322 adapter->dcb_set_bitmap |= BIT_PFC;
ea4af4f4
PW		 323 adapter->temp_dcb_cfg.pfc_mode_enable = true;
324 }
2f90b865
AD		 325}
326
327static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
328 u8 *setting)
329{
330 struct ixgbe_adapter *adapter = netdev_priv(netdev);
331
332 *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
333}
334
335static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
336{
337 struct ixgbe_adapter *adapter = netdev_priv(netdev);
338 int ret;
339
340 if (!adapter->dcb_set_bitmap)
62551d3e 341 return DCB_NO_HW_CHG;
2f90b865 342
62551d3e
PWJ		 343 /*
344 * Only take down the adapter if the configuration change
345 * requires a reset.
346 */
347 if (adapter->dcb_set_bitmap & BIT_RESETLINK) {
348 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
349 msleep(1);
2f90b865 350
62551d3e
PWJ		 351 if (netif_running(netdev))
352 ixgbe_down(adapter);
353 }
2f90b865
AD		 354
355 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
356 adapter->ring_feature[RING_F_DCB].indices);
357 if (ret) {
62551d3e
PWJ		 358 if (adapter->dcb_set_bitmap & BIT_RESETLINK)
359 clear_bit(__IXGBE_RESETTING, &adapter->state);
360 return DCB_NO_HW_CHG;
2f90b865
AD		 361 }
362
264857b8
PWJ		 363 if (adapter->dcb_cfg.pfc_mode_enable) {
364 if ((adapter->hw.mac.type != ixgbe_mac_82598EB) &&
365 (adapter->hw.fc.current_mode != ixgbe_fc_pfc))
366 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
367 adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
368 } else {
369 if (adapter->hw.mac.type != ixgbe_mac_82598EB)
370 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
371 else
372 adapter->hw.fc.requested_mode = ixgbe_fc_none;
373 }
374
62551d3e
PWJ		 375 if (adapter->dcb_set_bitmap & BIT_RESETLINK) {
376 if (netif_running(netdev))
377 ixgbe_up(adapter);
378 ret = DCB_HW_CHG_RST;
379 } else if (adapter->dcb_set_bitmap & BIT_PFC) {
380 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
381 ixgbe_dcb_config_pfc_82598(&adapter->hw,
382 &adapter->dcb_cfg);
383 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
384 ixgbe_dcb_config_pfc_82599(&adapter->hw,
385 &adapter->dcb_cfg);
386 ret = DCB_HW_CHG;
387 }
264857b8
PWJ		 388 if (adapter->dcb_cfg.pfc_mode_enable)
389 adapter->hw.fc.current_mode = ixgbe_fc_pfc;
390
62551d3e
PWJ		 391 if (adapter->dcb_set_bitmap & BIT_RESETLINK)
392 clear_bit(__IXGBE_RESETTING, &adapter->state);
2f90b865 393 adapter->dcb_set_bitmap = 0x00;
2f90b865
AD		 394 return ret;
395}
396
46132188
AD		 397static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
398{
399 struct ixgbe_adapter *adapter = netdev_priv(netdev);
400 u8 rval = 0;
401
402 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
403 switch (capid) {
404 case DCB_CAP_ATTR_PG:
405 *cap = true;
406 break;
407 case DCB_CAP_ATTR_PFC:
408 *cap = true;
409 break;
410 case DCB_CAP_ATTR_UP2TC:
411 *cap = false;
412 break;
413 case DCB_CAP_ATTR_PG_TCS:
414 *cap = 0x80;
415 break;
416 case DCB_CAP_ATTR_PFC_TCS:
417 *cap = 0x80;
418 break;
419 case DCB_CAP_ATTR_GSP:
420 *cap = true;
421 break;
422 case DCB_CAP_ATTR_BCN:
423 *cap = false;
424 break;
425 default:
426 rval = -EINVAL;
427 break;
428 }
429 } else {
430 rval = -EINVAL;
431 }
432
433 return rval;
434}
435
33dbabc4
AD		 436static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
437{
438 struct ixgbe_adapter *adapter = netdev_priv(netdev);
439 u8 rval = 0;
440
441 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
442 switch (tcid) {
443 case DCB_NUMTCS_ATTR_PG:
444 *num = MAX_TRAFFIC_CLASS;
445 break;
446 case DCB_NUMTCS_ATTR_PFC:
447 *num = MAX_TRAFFIC_CLASS;
448 break;
449 default:
450 rval = -EINVAL;
451 break;
452 }
453 } else {
454 rval = -EINVAL;
455 }
456
457 return rval;
458}
459
460static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
461{
462 return -EINVAL;
463}
464
0eb3aa9b
AD		 465static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
466{
467 struct ixgbe_adapter *adapter = netdev_priv(netdev);
468
264857b8 469 return adapter->dcb_cfg.pfc_mode_enable;
0eb3aa9b
AD		 470}
471
472static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
473{
264857b8
PWJ		 474 struct ixgbe_adapter *adapter = netdev_priv(netdev);
475
476 adapter->temp_dcb_cfg.pfc_mode_enable = state;
477 if (adapter->temp_dcb_cfg.pfc_mode_enable !=
478 adapter->dcb_cfg.pfc_mode_enable)
479 adapter->dcb_set_bitmap |= BIT_PFC;
0eb3aa9b
AD		 480 return;
481}
482
2f90b865
AD		 483struct dcbnl_rtnl_ops dcbnl_ops = {
484 .getstate = ixgbe_dcbnl_get_state,
485 .setstate = ixgbe_dcbnl_set_state,
486 .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
487 .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
488 .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
489 .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
490 .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
491 .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
492 .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
493 .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
494 .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
495 .setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
496 .getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
46132188 497 .setall = ixgbe_dcbnl_set_all,
33dbabc4
AD		 498 .getcap = ixgbe_dcbnl_getcap,
499 .getnumtcs = ixgbe_dcbnl_getnumtcs,
0eb3aa9b
AD		 500 .setnumtcs = ixgbe_dcbnl_setnumtcs,
501 .getpfcstate = ixgbe_dcbnl_getpfcstate,
859ee3c4 502 .setpfcstate = ixgbe_dcbnl_setpfcstate,
2f90b865
AD		 503};
504
Clone of davem's net-next-2.6 tree