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ixgbe: Enable FCoE offload when DCB is enabled for 82599
[net-next-2.6.git] / drivers / net / ixgbe / ixgbe_dcb_nl.c
CommitLineData
2f90b865
AD		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
3efac5a0 4 Copyright(c) 1999 - 2009 Intel Corporation.
2f90b865
AD		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgbe.h"
30#include <linux/dcbnl.h>
62551d3e
PWJ		 31#include "ixgbe_dcb_82598.h"
32#include "ixgbe_dcb_82599.h"
2f90b865
AD		 33
34/* Callbacks for DCB netlink in the kernel */
35#define BIT_DCB_MODE 0x01
36#define BIT_PFC 0x02
37#define BIT_PG_RX 0x04
38#define BIT_PG_TX 0x08
62551d3e 39#define BIT_RESETLINK 0x40
235ea828 40#define BIT_LINKSPEED 0x80
2f90b865 41
62551d3e
PWJ		 42/* Responses for the DCB_C_SET_ALL command */
43#define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
44#define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
45#define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
46
2f90b865
AD		 47int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
48 struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
49{
50 struct tc_configuration *src_tc_cfg = NULL;
51 struct tc_configuration *dst_tc_cfg = NULL;
52 int i;
53
54 if (!src_dcb_cfg || !dst_dcb_cfg)
55 return -EINVAL;
56
57 for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
58 src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
59 dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
60
61 dst_tc_cfg->path[DCB_TX_CONFIG].prio_type =
62 src_tc_cfg->path[DCB_TX_CONFIG].prio_type;
63
64 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id =
65 src_tc_cfg->path[DCB_TX_CONFIG].bwg_id;
66
67 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent =
68 src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent;
69
70 dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap =
71 src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap;
72
73 dst_tc_cfg->path[DCB_RX_CONFIG].prio_type =
74 src_tc_cfg->path[DCB_RX_CONFIG].prio_type;
75
76 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id =
77 src_tc_cfg->path[DCB_RX_CONFIG].bwg_id;
78
79 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent =
80 src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent;
81
82 dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap =
83 src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap;
84 }
85
86 for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
87 dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG]
88 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
89 [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
90 dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG]
91 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
92 [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
93 }
94
95 for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
96 dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc =
97 src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
98 }
99
ea4af4f4
PW		 100 dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
101
2f90b865
AD		 102 return 0;
103}
104
105static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
106{
107 struct ixgbe_adapter *adapter = netdev_priv(netdev);
108
2f90b865
AD		 109 return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
110}
111
1486a61e 112static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
2f90b865 113{
1486a61e 114 u8 err = 0;
2f90b865
AD		 115 struct ixgbe_adapter *adapter = netdev_priv(netdev);
116
2f90b865
AD		 117 if (state > 0) {
118 /* Turn on DCB */
1486a61e
DS		 119 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
120 goto out;
2f90b865 121
1486a61e
DS		 122 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
123 DPRINTK(DRV, ERR, "Enable failed, needs MSI-X\n");
124 err = 1;
125 goto out;
2f90b865 126 }
1486a61e
DS		 127
128 if (netif_running(netdev))
129 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 130 ixgbe_clear_interrupt_scheme(adapter);
1486a61e 131
264857b8
PWJ		 132 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
133 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
134 adapter->hw.fc.requested_mode = ixgbe_fc_none;
135 }
1486a61e 136 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
8faa2a78
YZ		 137 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
138 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
139 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
140 }
1486a61e 141 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
0d551589
YZ		 142#ifdef IXGBE_FCOE
143 /* Turn on FCoE offload */
144 if ((adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) &&
145 (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))) {
146 adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
147 adapter->ring_feature[RING_F_FCOE].indices =
148 IXGBE_FCRETA_SIZE;
149 netdev->features |= NETIF_F_FCOE_CRC;
150 netdev->features |= NETIF_F_FSO;
151 netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
152 }
153#endif /* IXGBE_FCOE */
1486a61e 154 ixgbe_init_interrupt_scheme(adapter);
1486a61e
DS		 155 if (netif_running(netdev))
156 netdev->netdev_ops->ndo_open(netdev);
2f90b865
AD		 157 } else {
158 /* Turn off DCB */
159 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
160 if (netif_running(netdev))
1486a61e 161 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 162 ixgbe_clear_interrupt_scheme(adapter);
2f90b865 163
264857b8
PWJ		 164 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
165 adapter->temp_dcb_cfg.pfc_mode_enable = false;
166 adapter->dcb_cfg.pfc_mode_enable = false;
2f90b865
AD		 167 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
168 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
8faa2a78
YZ		 169 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
170 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
0d551589
YZ		 171
172#ifdef IXGBE_FCOE
173 /* Turn off FCoE offload */
174 if (adapter->flags & (IXGBE_FLAG_FCOE_CAPABLE |
175 IXGBE_FLAG_FCOE_ENABLED)) {
176 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
177 adapter->ring_feature[RING_F_FCOE].indices = 0;
178 netdev->features &= ~NETIF_F_FCOE_CRC;
179 netdev->features &= ~NETIF_F_FSO;
180 netdev->fcoe_ddp_xid = 0;
181 }
182#endif /* IXGBE_FCOE */
2f90b865 183 ixgbe_init_interrupt_scheme(adapter);
2f90b865 184 if (netif_running(netdev))
1486a61e 185 netdev->netdev_ops->ndo_open(netdev);
2f90b865
AD		 186 }
187 }
1486a61e
DS		 188out:
189 return err;
2f90b865
AD		 190}
191
192static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
193 u8 *perm_addr)
194{
195 struct ixgbe_adapter *adapter = netdev_priv(netdev);
aca6bee7 196 int i, j;
2f90b865 197
86e713a0
LL		 198 memset(perm_addr, 0xff, MAX_ADDR_LEN);
199
2f90b865
AD		 200 for (i = 0; i < netdev->addr_len; i++)
201 perm_addr[i] = adapter->hw.mac.perm_addr[i];
aca6bee7
WJP		 202
203 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
204 for (j = 0; j < netdev->addr_len; j++, i++)
205 perm_addr[i] = adapter->hw.mac.san_addr[j];
206 }
2f90b865
AD		 207}
208
209static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
210 u8 prio, u8 bwg_id, u8 bw_pct,
211 u8 up_map)
212{
213 struct ixgbe_adapter *adapter = netdev_priv(netdev);
214
215 if (prio != DCB_ATTR_VALUE_UNDEFINED)
216 adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
217 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
218 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
219 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
220 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
221 bw_pct;
222 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
223 adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
224 up_map;
225
226 if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type !=
227 adapter->dcb_cfg.tc_config[tc].path[0].prio_type) ||
228 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id !=
229 adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) ||
230 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
231 adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
232 (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
62551d3e 233 adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)) {
2f90b865 234 adapter->dcb_set_bitmap |= BIT_PG_TX;
62551d3e
PWJ		 235 adapter->dcb_set_bitmap |= BIT_RESETLINK;
236 }
2f90b865
AD		 237}
238
239static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
240 u8 bw_pct)
241{
242 struct ixgbe_adapter *adapter = netdev_priv(netdev);
243
244 adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
245
246 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
62551d3e 247 adapter->dcb_cfg.bw_percentage[0][bwg_id]) {
2f90b865 248 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 249 adapter->dcb_set_bitmap |= BIT_RESETLINK;
250 }
2f90b865
AD		 251}
252
253static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
254 u8 prio, u8 bwg_id, u8 bw_pct,
255 u8 up_map)
256{
257 struct ixgbe_adapter *adapter = netdev_priv(netdev);
258
259 if (prio != DCB_ATTR_VALUE_UNDEFINED)
260 adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
261 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
262 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
263 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
264 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
265 bw_pct;
266 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
267 adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
268 up_map;
269
270 if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type !=
271 adapter->dcb_cfg.tc_config[tc].path[1].prio_type) ||
272 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id !=
273 adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) ||
274 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
275 adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
276 (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
62551d3e 277 adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)) {
2f90b865 278 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 279 adapter->dcb_set_bitmap |= BIT_RESETLINK;
280 }
2f90b865
AD		 281}
282
283static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
284 u8 bw_pct)
285{
286 struct ixgbe_adapter *adapter = netdev_priv(netdev);
287
288 adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
289
290 if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
62551d3e 291 adapter->dcb_cfg.bw_percentage[1][bwg_id]) {
2f90b865 292 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 293 adapter->dcb_set_bitmap |= BIT_RESETLINK;
294 }
2f90b865
AD		 295}
296
297static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
298 u8 *prio, u8 *bwg_id, u8 *bw_pct,
299 u8 *up_map)
300{
301 struct ixgbe_adapter *adapter = netdev_priv(netdev);
302
303 *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
304 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
305 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
306 *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
307}
308
309static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
310 u8 *bw_pct)
311{
312 struct ixgbe_adapter *adapter = netdev_priv(netdev);
313
314 *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
315}
316
317static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
318 u8 *prio, u8 *bwg_id, u8 *bw_pct,
319 u8 *up_map)
320{
321 struct ixgbe_adapter *adapter = netdev_priv(netdev);
322
323 *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
324 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
325 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
326 *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
327}
328
329static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
330 u8 *bw_pct)
331{
332 struct ixgbe_adapter *adapter = netdev_priv(netdev);
333
334 *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
335}
336
337static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
338 u8 setting)
339{
340 struct ixgbe_adapter *adapter = netdev_priv(netdev);
341
342 adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
343 if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
ea4af4f4 344 adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
2f90b865 345 adapter->dcb_set_bitmap |= BIT_PFC;
ea4af4f4
PW		 346 adapter->temp_dcb_cfg.pfc_mode_enable = true;
347 }
2f90b865
AD		 348}
349
350static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
351 u8 *setting)
352{
353 struct ixgbe_adapter *adapter = netdev_priv(netdev);
354
355 *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
356}
357
358static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
359{
360 struct ixgbe_adapter *adapter = netdev_priv(netdev);
361 int ret;
362
363 if (!adapter->dcb_set_bitmap)
62551d3e 364 return DCB_NO_HW_CHG;
2f90b865 365
62551d3e
PWJ		 366 /*
367 * Only take down the adapter if the configuration change
368 * requires a reset.
369 */
370 if (adapter->dcb_set_bitmap & BIT_RESETLINK) {
371 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
372 msleep(1);
2f90b865 373
62551d3e
PWJ		 374 if (netif_running(netdev))
375 ixgbe_down(adapter);
376 }
2f90b865
AD		 377
378 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
379 adapter->ring_feature[RING_F_DCB].indices);
380 if (ret) {
62551d3e
PWJ		 381 if (adapter->dcb_set_bitmap & BIT_RESETLINK)
382 clear_bit(__IXGBE_RESETTING, &adapter->state);
383 return DCB_NO_HW_CHG;
2f90b865
AD		 384 }
385
264857b8
PWJ		 386 if (adapter->dcb_cfg.pfc_mode_enable) {
387 if ((adapter->hw.mac.type != ixgbe_mac_82598EB) &&
388 (adapter->hw.fc.current_mode != ixgbe_fc_pfc))
389 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
390 adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
391 } else {
392 if (adapter->hw.mac.type != ixgbe_mac_82598EB)
393 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
394 else
395 adapter->hw.fc.requested_mode = ixgbe_fc_none;
396 }
397
62551d3e
PWJ		 398 if (adapter->dcb_set_bitmap & BIT_RESETLINK) {
399 if (netif_running(netdev))
400 ixgbe_up(adapter);
401 ret = DCB_HW_CHG_RST;
402 } else if (adapter->dcb_set_bitmap & BIT_PFC) {
403 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
404 ixgbe_dcb_config_pfc_82598(&adapter->hw,
405 &adapter->dcb_cfg);
406 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
407 ixgbe_dcb_config_pfc_82599(&adapter->hw,
408 &adapter->dcb_cfg);
409 ret = DCB_HW_CHG;
410 }
264857b8
PWJ		 411 if (adapter->dcb_cfg.pfc_mode_enable)
412 adapter->hw.fc.current_mode = ixgbe_fc_pfc;
413
62551d3e
PWJ		 414 if (adapter->dcb_set_bitmap & BIT_RESETLINK)
415 clear_bit(__IXGBE_RESETTING, &adapter->state);
2f90b865 416 adapter->dcb_set_bitmap = 0x00;
2f90b865
AD		 417 return ret;
418}
419
46132188
AD		 420static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
421{
422 struct ixgbe_adapter *adapter = netdev_priv(netdev);
423 u8 rval = 0;
424
425 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
426 switch (capid) {
427 case DCB_CAP_ATTR_PG:
428 *cap = true;
429 break;
430 case DCB_CAP_ATTR_PFC:
431 *cap = true;
432 break;
433 case DCB_CAP_ATTR_UP2TC:
434 *cap = false;
435 break;
436 case DCB_CAP_ATTR_PG_TCS:
437 *cap = 0x80;
438 break;
439 case DCB_CAP_ATTR_PFC_TCS:
440 *cap = 0x80;
441 break;
442 case DCB_CAP_ATTR_GSP:
443 *cap = true;
444 break;
445 case DCB_CAP_ATTR_BCN:
446 *cap = false;
447 break;
448 default:
449 rval = -EINVAL;
450 break;
451 }
452 } else {
453 rval = -EINVAL;
454 }
455
456 return rval;
457}
458
33dbabc4
AD		 459static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
460{
461 struct ixgbe_adapter *adapter = netdev_priv(netdev);
462 u8 rval = 0;
463
464 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
465 switch (tcid) {
466 case DCB_NUMTCS_ATTR_PG:
467 *num = MAX_TRAFFIC_CLASS;
468 break;
469 case DCB_NUMTCS_ATTR_PFC:
470 *num = MAX_TRAFFIC_CLASS;
471 break;
472 default:
473 rval = -EINVAL;
474 break;
475 }
476 } else {
477 rval = -EINVAL;
478 }
479
480 return rval;
481}
482
483static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
484{
485 return -EINVAL;
486}
487
0eb3aa9b
AD		 488static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
489{
490 struct ixgbe_adapter *adapter = netdev_priv(netdev);
491
264857b8 492 return adapter->dcb_cfg.pfc_mode_enable;
0eb3aa9b
AD		 493}
494
495static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
496{
264857b8
PWJ		 497 struct ixgbe_adapter *adapter = netdev_priv(netdev);
498
499 adapter->temp_dcb_cfg.pfc_mode_enable = state;
500 if (adapter->temp_dcb_cfg.pfc_mode_enable !=
501 adapter->dcb_cfg.pfc_mode_enable)
502 adapter->dcb_set_bitmap |= BIT_PFC;
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AD		 503 return;
504}
505
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AD		 506struct dcbnl_rtnl_ops dcbnl_ops = {
507 .getstate = ixgbe_dcbnl_get_state,
508 .setstate = ixgbe_dcbnl_set_state,
509 .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
510 .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
511 .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
512 .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
513 .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
514 .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
515 .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
516 .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
517 .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
518 .setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
519 .getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
46132188 520 .setall = ixgbe_dcbnl_set_all,
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AD		 521 .getcap = ixgbe_dcbnl_getcap,
522 .getnumtcs = ixgbe_dcbnl_getnumtcs,
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AD		 523 .setnumtcs = ixgbe_dcbnl_setnumtcs,
524 .getpfcstate = ixgbe_dcbnl_getpfcstate,
859ee3c4 525 .setpfcstate = ixgbe_dcbnl_setpfcstate,
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AD		 526};
527
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