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ixgbe: add clean rx many routine
[net-next-2.6.git] / drivers / net / ixgbe / ixgbe_82598.c
CommitLineData
9a799d71
AK		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/pci.h>
30#include <linux/delay.h>
31#include <linux/sched.h>
32
9c8eb720 33#include "ixgbe.h"
9a799d71
AK		 34#include "ixgbe_phy.h"
35
36#define IXGBE_82598_MAX_TX_QUEUES 32
37#define IXGBE_82598_MAX_RX_QUEUES 64
38#define IXGBE_82598_RAR_ENTRIES 16
2c5645cf
CL		 39#define IXGBE_82598_MC_TBL_SIZE 128
40#define IXGBE_82598_VFT_TBL_SIZE 128
9a799d71
AK		 41
42static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw);
43static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed,
44 bool *autoneg);
45static s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw,
46 u32 *speed, bool *autoneg);
47static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw);
48static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw);
49static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, u32 *speed,
cf8280ee
JB		 50 bool *link_up,
51 bool link_up_wait_to_complete);
9a799d71
AK		 52static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
53 bool autoneg,
54 bool autoneg_wait_to_complete);
55static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw);
9a799d71
AK		 56static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
57 bool autoneg,
58 bool autoneg_wait_to_complete);
59static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw);
60
61
62static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
63{
ff68cdbf
JK		 64 hw->mac.num_rx_queues = IXGBE_82598_MAX_RX_QUEUES;
65 hw->mac.num_tx_queues = IXGBE_82598_MAX_TX_QUEUES;
2c5645cf
CL		 66 hw->mac.mcft_size = IXGBE_82598_MC_TBL_SIZE;
67 hw->mac.vft_size = IXGBE_82598_VFT_TBL_SIZE;
68 hw->mac.num_rar_entries = IXGBE_82598_RAR_ENTRIES;
9a799d71 69
3957d63d
AK		 70 /* PHY ops are filled in by default properly for Fiber only */
71 if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) {
72 hw->mac.ops.setup_link = &ixgbe_setup_copper_link_82598;
73 hw->mac.ops.setup_link_speed = &ixgbe_setup_copper_link_speed_82598;
74 hw->mac.ops.get_link_settings =
75 &ixgbe_get_copper_link_settings_82598;
76
77 /* Call PHY identify routine to get the phy type */
78 ixgbe_identify_phy(hw);
79
80 switch (hw->phy.type) {
81 case ixgbe_phy_tn:
82 hw->phy.ops.setup_link = &ixgbe_setup_tnx_phy_link;
83 hw->phy.ops.check_link = &ixgbe_check_tnx_phy_link;
84 hw->phy.ops.setup_link_speed =
85 &ixgbe_setup_tnx_phy_link_speed;
86 break;
87 default:
88 break;
89 }
90 }
91
9a799d71
AK		 92 return 0;
93}
94
95/**
96 * ixgbe_get_link_settings_82598 - Determines default link settings
97 * @hw: pointer to hardware structure
98 * @speed: pointer to link speed
99 * @autoneg: boolean auto-negotiation value
100 *
101 * Determines the default link settings by reading the AUTOC register.
102 **/
103static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed,
104 bool *autoneg)
105{
106 s32 status = 0;
107 s32 autoc_reg;
108
109 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
110
111 if (hw->mac.link_settings_loaded) {
112 autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE;
113 autoc_reg &= ~IXGBE_AUTOC_LMS_MASK;
114 autoc_reg |= hw->mac.link_attach_type;
115 autoc_reg |= hw->mac.link_mode_select;
116 }
117
118 switch (autoc_reg & IXGBE_AUTOC_LMS_MASK) {
119 case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
120 *speed = IXGBE_LINK_SPEED_1GB_FULL;
121 *autoneg = false;
122 break;
123
124 case IXGBE_AUTOC_LMS_10G_LINK_NO_AN:
125 *speed = IXGBE_LINK_SPEED_10GB_FULL;
126 *autoneg = false;
127 break;
128
129 case IXGBE_AUTOC_LMS_1G_AN:
130 *speed = IXGBE_LINK_SPEED_1GB_FULL;
131 *autoneg = true;
132 break;
133
134 case IXGBE_AUTOC_LMS_KX4_AN:
135 case IXGBE_AUTOC_LMS_KX4_AN_1G_AN:
136 *speed = IXGBE_LINK_SPEED_UNKNOWN;
137 if (autoc_reg & IXGBE_AUTOC_KX4_SUPP)
138 *speed |= IXGBE_LINK_SPEED_10GB_FULL;
139 if (autoc_reg & IXGBE_AUTOC_KX_SUPP)
140 *speed |= IXGBE_LINK_SPEED_1GB_FULL;
141 *autoneg = true;
142 break;
143
144 default:
145 status = IXGBE_ERR_LINK_SETUP;
146 break;
147 }
148
149 return status;
150}
151
152/**
153 * ixgbe_get_copper_link_settings_82598 - Determines default link settings
154 * @hw: pointer to hardware structure
155 * @speed: pointer to link speed
156 * @autoneg: boolean auto-negotiation value
157 *
158 * Determines the default link settings by reading the AUTOC register.
159 **/
160static s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw,
161 u32 *speed, bool *autoneg)
162{
163 s32 status = IXGBE_ERR_LINK_SETUP;
164 u16 speed_ability;
165
166 *speed = 0;
167 *autoneg = true;
168
169 status = ixgbe_read_phy_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY,
170 IXGBE_MDIO_PMA_PMD_DEV_TYPE,
171 &speed_ability);
172
173 if (status == 0) {
174 if (speed_ability & IXGBE_MDIO_PHY_SPEED_10G)
175 *speed |= IXGBE_LINK_SPEED_10GB_FULL;
176 if (speed_ability & IXGBE_MDIO_PHY_SPEED_1G)
177 *speed |= IXGBE_LINK_SPEED_1GB_FULL;
178 }
179
180 return status;
181}
182
183/**
184 * ixgbe_get_media_type_82598 - Determines media type
185 * @hw: pointer to hardware structure
186 *
187 * Returns the media type (fiber, copper, backplane)
188 **/
189static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)
190{
191 enum ixgbe_media_type media_type;
192
193 /* Media type for I82598 is based on device ID */
194 switch (hw->device_id) {
195 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
196 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
197 case IXGBE_DEV_ID_82598EB_CX4:
8d792cd9 198 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
b95f5fcb 199 case IXGBE_DEV_ID_82598EB_XF_LR:
9a799d71
AK		 200 media_type = ixgbe_media_type_fiber;
201 break;
202 case IXGBE_DEV_ID_82598AT_DUAL_PORT:
203 media_type = ixgbe_media_type_copper;
204 break;
205 default:
206 media_type = ixgbe_media_type_unknown;
207 break;
208 }
209
210 return media_type;
211}
212
213/**
214 * ixgbe_setup_mac_link_82598 - Configures MAC link settings
215 * @hw: pointer to hardware structure
216 *
217 * Configures link settings based on values in the ixgbe_hw struct.
218 * Restarts the link. Performs autonegotiation if needed.
219 **/
220static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw)
221{
222 u32 autoc_reg;
223 u32 links_reg;
224 u32 i;
225 s32 status = 0;
226
227 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
228
229 if (hw->mac.link_settings_loaded) {
230 autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE;
231 autoc_reg &= ~IXGBE_AUTOC_LMS_MASK;
232 autoc_reg |= hw->mac.link_attach_type;
233 autoc_reg |= hw->mac.link_mode_select;
234
235 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
3957d63d 236 IXGBE_WRITE_FLUSH(hw);
9a799d71
AK		 237 msleep(50);
238 }
239
240 /* Restart link */
241 autoc_reg |= IXGBE_AUTOC_AN_RESTART;
242 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
243
244 /* Only poll for autoneg to complete if specified to do so */
245 if (hw->phy.autoneg_wait_to_complete) {
246 if (hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN ||
247 hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN_1G_AN) {
248 links_reg = 0; /* Just in case Autoneg time = 0 */
249 for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) {
250 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
251 if (links_reg & IXGBE_LINKS_KX_AN_COMP)
252 break;
253 msleep(100);
254 }
255 if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) {
256 status = IXGBE_ERR_AUTONEG_NOT_COMPLETE;
257 hw_dbg(hw,
258 "Autonegotiation did not complete.\n");
259 }
260 }
261 }
262
263 /*
264 * We want to save off the original Flow Control configuration just in
265 * case we get disconnected and then reconnected into a different hub
266 * or switch with different Flow Control capabilities.
267 */
268 hw->fc.type = hw->fc.original_type;
269 ixgbe_setup_fc(hw, 0);
270
271 /* Add delay to filter out noises during initial link setup */
272 msleep(50);
273
274 return status;
275}
276
277/**
278 * ixgbe_check_mac_link_82598 - Get link/speed status
279 * @hw: pointer to hardware structure
280 * @speed: pointer to link speed
281 * @link_up: true is link is up, false otherwise
cf8280ee 282 * @link_up_wait_to_complete: bool used to wait for link up or not
9a799d71
AK		 283 *
284 * Reads the links register to determine if link is up and the current speed
285 **/
286static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, u32 *speed,
cf8280ee
JB		 287 bool *link_up,
288 bool link_up_wait_to_complete)
9a799d71
AK		 289{
290 u32 links_reg;
cf8280ee 291 u32 i;
9a799d71
AK		 292
293 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
294
cf8280ee
JB		 295 if (link_up_wait_to_complete) {
296 for (i = 0; i < IXGBE_LINK_UP_TIME; i++) {
297 if (links_reg & IXGBE_LINKS_UP) {
298 *link_up = true;
299 break;
300 } else {
301 *link_up = false;
302 }
303 msleep(100);
304 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
305 }
306 } else {
307 if (links_reg & IXGBE_LINKS_UP)
308 *link_up = true;
309 else
310 *link_up = false;
311 }
9a799d71
AK		 312
313 if (links_reg & IXGBE_LINKS_SPEED)
314 *speed = IXGBE_LINK_SPEED_10GB_FULL;
315 else
316 *speed = IXGBE_LINK_SPEED_1GB_FULL;
317
318 return 0;
319}
320
321/**
322 * ixgbe_setup_mac_link_speed_82598 - Set MAC link speed
323 * @hw: pointer to hardware structure
324 * @speed: new link speed
325 * @autoneg: true if auto-negotiation enabled
326 * @autoneg_wait_to_complete: true if waiting is needed to complete
327 *
328 * Set the link speed in the AUTOC register and restarts link.
329 **/
330static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw,
331 u32 speed, bool autoneg,
332 bool autoneg_wait_to_complete)
333{
334 s32 status = 0;
335
336 /* If speed is 10G, then check for CX4 or XAUI. */
337 if ((speed == IXGBE_LINK_SPEED_10GB_FULL) &&
338 (!(hw->mac.link_attach_type & IXGBE_AUTOC_10G_KX4)))
339 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
340 else if ((speed == IXGBE_LINK_SPEED_1GB_FULL) && (!autoneg))
341 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_LINK_NO_AN;
342 else if (autoneg) {
343 /* BX mode - Autonegotiate 1G */
344 if (!(hw->mac.link_attach_type & IXGBE_AUTOC_1G_PMA_PMD))
345 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_AN;
346 else /* KX/KX4 mode */
347 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN_1G_AN;
348 } else {
349 status = IXGBE_ERR_LINK_SETUP;
350 }
351
352 if (status == 0) {
353 hw->phy.autoneg_wait_to_complete = autoneg_wait_to_complete;
354
355 hw->mac.link_settings_loaded = true;
356 /*
357 * Setup and restart the link based on the new values in
358 * ixgbe_hw This will write the AUTOC register based on the new
359 * stored values
360 */
3957d63d 361 hw->mac.ops.setup_link(hw);
9a799d71
AK		 362 }
363
364 return status;
365}
366
367
368/**
369 * ixgbe_setup_copper_link_82598 - Setup copper link settings
370 * @hw: pointer to hardware structure
371 *
372 * Configures link settings based on values in the ixgbe_hw struct.
373 * Restarts the link. Performs autonegotiation if needed. Restart
374 * phy and wait for autonegotiate to finish. Then synchronize the
375 * MAC and PHY.
376 **/
377static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw)
378{
3957d63d 379 s32 status = 0;
9a799d71
AK		 380
381 /* Restart autonegotiation on PHY */
3957d63d
AK		 382 if (hw->phy.ops.setup_link)
383 status = hw->phy.ops.setup_link(hw);
9a799d71 384
3957d63d
AK		 385 /* Set MAC to KX/KX4 autoneg, which defaultis to Parallel detection */
386 hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
387 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN;
9a799d71 388
3957d63d
AK		 389 /* Set up MAC */
390 hw->mac.ops.setup_link(hw);
9a799d71
AK		 391
392 return status;
393}
394
395/**
396 * ixgbe_setup_copper_link_speed_82598 - Set the PHY autoneg advertised field
397 * @hw: pointer to hardware structure
398 * @speed: new link speed
399 * @autoneg: true if autonegotiation enabled
400 * @autoneg_wait_to_complete: true if waiting is needed to complete
401 *
402 * Sets the link speed in the AUTOC register in the MAC and restarts link.
403 **/
404static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
405 bool autoneg,
406 bool autoneg_wait_to_complete)
407{
3957d63d 408 s32 status = 0;
9a799d71
AK		 409
410 /* Setup the PHY according to input speed */
3957d63d
AK		 411 if (hw->phy.ops.setup_link_speed)
412 status = hw->phy.ops.setup_link_speed(hw, speed, autoneg,
413 autoneg_wait_to_complete);
414
415 /* Set MAC to KX/KX4 autoneg, which defaults to Parallel detection */
416 hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
417 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN;
9a799d71 418
3957d63d
AK		 419 /* Set up MAC */
420 hw->mac.ops.setup_link(hw);
9a799d71
AK		 421
422 return status;
423}
424
425/**
426 * ixgbe_reset_hw_82598 - Performs hardware reset
427 * @hw: pointer to hardware structure
428 *
429 * Resets the hardware by reseting the transmit and receive units, masks and
430 * clears all interrupts, performing a PHY reset, and performing a link (MAC)
431 * reset.
432 **/
433static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
434{
435 s32 status = 0;
436 u32 ctrl;
437 u32 gheccr;
438 u32 i;
439 u32 autoc;
440 u8 analog_val;
441
442 /* Call adapter stop to disable tx/rx and clear interrupts */
443 ixgbe_stop_adapter(hw);
444
445 /*
446 * Power up the Atlas TX lanes if they are currently powered down.
447 * Atlas TX lanes are powered down for MAC loopback tests, but
448 * they are not automatically restored on reset.
449 */
450 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);
451 if (analog_val & IXGBE_ATLAS_PDN_TX_REG_EN) {
452 /* Enable TX Atlas so packets can be transmitted again */
453 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);
454 analog_val &= ~IXGBE_ATLAS_PDN_TX_REG_EN;
455 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, analog_val);
456
457 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &analog_val);
458 analog_val &= ~IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
459 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, analog_val);
460
461 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &analog_val);
462 analog_val &= ~IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
463 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, analog_val);
464
465 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &analog_val);
466 analog_val &= ~IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
467 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, analog_val);
468 }
469
470 /* Reset PHY */
471 ixgbe_reset_phy(hw);
472
473 /*
474 * Prevent the PCI-E bus from from hanging by disabling PCI-E master
475 * access and verify no pending requests before reset
476 */
477 if (ixgbe_disable_pcie_master(hw) != 0) {
478 status = IXGBE_ERR_MASTER_REQUESTS_PENDING;
479 hw_dbg(hw, "PCI-E Master disable polling has failed.\n");
480 }
481
482 /*
483 * Issue global reset to the MAC. This needs to be a SW reset.
484 * If link reset is used, it might reset the MAC when mng is using it
485 */
486 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
487 IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | IXGBE_CTRL_RST));
488 IXGBE_WRITE_FLUSH(hw);
489
490 /* Poll for reset bit to self-clear indicating reset is complete */
491 for (i = 0; i < 10; i++) {
492 udelay(1);
493 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
494 if (!(ctrl & IXGBE_CTRL_RST))
495 break;
496 }
497 if (ctrl & IXGBE_CTRL_RST) {
498 status = IXGBE_ERR_RESET_FAILED;
499 hw_dbg(hw, "Reset polling failed to complete.\n");
500 }
501
502 msleep(50);
503
504 gheccr = IXGBE_READ_REG(hw, IXGBE_GHECCR);
505 gheccr &= ~((1 << 21) | (1 << 18) | (1 << 9) | (1 << 6));
506 IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr);
507
508 /*
509 * AUTOC register which stores link settings gets cleared
510 * and reloaded from EEPROM after reset. We need to restore
511 * our stored value from init in case SW changed the attach
512 * type or speed. If this is the first time and link settings
513 * have not been stored, store default settings from AUTOC.
514 */
515 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
516 if (hw->mac.link_settings_loaded) {
517 autoc &= ~(IXGBE_AUTOC_LMS_ATTACH_TYPE);
518 autoc &= ~(IXGBE_AUTOC_LMS_MASK);
519 autoc |= hw->mac.link_attach_type;
520 autoc |= hw->mac.link_mode_select;
521 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
522 } else {
523 hw->mac.link_attach_type =
524 (autoc & IXGBE_AUTOC_LMS_ATTACH_TYPE);
525 hw->mac.link_mode_select = (autoc & IXGBE_AUTOC_LMS_MASK);
526 hw->mac.link_settings_loaded = true;
527 }
528
529 /* Store the permanent mac address */
530 ixgbe_get_mac_addr(hw, hw->mac.perm_addr);
531
532 return status;
533}
534
535static struct ixgbe_mac_operations mac_ops_82598 = {
536 .reset = &ixgbe_reset_hw_82598,
537 .get_media_type = &ixgbe_get_media_type_82598,
3957d63d
AK		 538 .setup_link = &ixgbe_setup_mac_link_82598,
539 .check_link = &ixgbe_check_mac_link_82598,
540 .setup_link_speed = &ixgbe_setup_mac_link_speed_82598,
541 .get_link_settings = &ixgbe_get_link_settings_82598,
9a799d71
AK		 542};
543
3957d63d 544struct ixgbe_info ixgbe_82598_info = {
9a799d71
AK		 545 .mac = ixgbe_mac_82598EB,
546 .get_invariants = &ixgbe_get_invariants_82598,
547 .mac_ops = &mac_ops_82598,
9a799d71
AK		 548};
549
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