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[NET]: Merge TSO/UFO fields in sk_buff
[net-next-2.6.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
d3f464b5 4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
1da177e4 31char ixgb_driver_name[] = "ixgb";
e9ab1d14 32static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT		 33
34#ifndef CONFIG_IXGB_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
d3f464b5 39#define DRV_VERSION "1.0.109-k2"DRIVERNAPI
01e5abc2 40char ixgb_driver_version[] = DRV_VERSION;
d3f464b5 41static char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* ixgb_pci_tbl - PCI Device ID Table
44 *
45 * Wildcard entries (PCI_ANY_ID) should come last
46 * Last entry must be all 0s
47 *
48 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
49 * Class, Class Mask, private data (not used) }
50 */
51static struct pci_device_id ixgb_pci_tbl[] = {
52 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
53 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
940829e2
AK		 54 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
55 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1da177e4
LT		 56 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
57 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
58 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
59 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
60
61 /* required last entry */
62 {0,}
63};
64
65MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
66
67/* Local Function Prototypes */
68
69int ixgb_up(struct ixgb_adapter *adapter);
70void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
71void ixgb_reset(struct ixgb_adapter *adapter);
72int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
73int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
74void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
75void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
76void ixgb_update_stats(struct ixgb_adapter *adapter);
77
78static int ixgb_init_module(void);
79static void ixgb_exit_module(void);
80static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
81static void __devexit ixgb_remove(struct pci_dev *pdev);
82static int ixgb_sw_init(struct ixgb_adapter *adapter);
83static int ixgb_open(struct net_device *netdev);
84static int ixgb_close(struct net_device *netdev);
85static void ixgb_configure_tx(struct ixgb_adapter *adapter);
86static void ixgb_configure_rx(struct ixgb_adapter *adapter);
87static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
88static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
89static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
90static void ixgb_set_multi(struct net_device *netdev);
91static void ixgb_watchdog(unsigned long data);
92static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
93static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
94static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
95static int ixgb_set_mac(struct net_device *netdev, void *p);
96static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
97static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 98
1da177e4
LT		 99#ifdef CONFIG_IXGB_NAPI
100static int ixgb_clean(struct net_device *netdev, int *budget);
101static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
102 int *work_done, int work_to_do);
103#else
104static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
105#endif
106static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
107void ixgb_set_ethtool_ops(struct net_device *netdev);
108static void ixgb_tx_timeout(struct net_device *dev);
109static void ixgb_tx_timeout_task(struct net_device *dev);
110static void ixgb_vlan_rx_register(struct net_device *netdev,
111 struct vlan_group *grp);
112static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
113static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
114static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
115
1da177e4
LT		 116#ifdef CONFIG_NET_POLL_CONTROLLER
117/* for netdump / net console */
118static void ixgb_netpoll(struct net_device *dev);
119#endif
120
1da177e4
LT		 121/* Exported from other modules */
122
123extern void ixgb_check_options(struct ixgb_adapter *adapter);
124
125static struct pci_driver ixgb_driver = {
c2eba932 126 .name = ixgb_driver_name,
1da177e4 127 .id_table = ixgb_pci_tbl,
c2eba932
MC		 128 .probe = ixgb_probe,
129 .remove = __devexit_p(ixgb_remove),
1da177e4
LT		 130};
131
132MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
133MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
134MODULE_LICENSE("GPL");
01e5abc2 135MODULE_VERSION(DRV_VERSION);
1da177e4 136
ec9c3f5d
AK		 137#define DEFAULT_DEBUG_LEVEL_SHIFT 3
138static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
139module_param(debug, int, 0);
140MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
141
1da177e4 142/* some defines for controlling descriptor fetches in h/w */
1da177e4 143#define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
9c15d24f
MC		 144#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
145 * this */
146#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
147 * is pushed this many descriptors
148 * from head */
1da177e4
LT		 149
150/**
151 * ixgb_init_module - Driver Registration Routine
152 *
153 * ixgb_init_module is the first routine called when the driver is
154 * loaded. All it does is register with the PCI subsystem.
155 **/
156
157static int __init
158ixgb_init_module(void)
159{
1da177e4
LT		 160 printk(KERN_INFO "%s - version %s\n",
161 ixgb_driver_string, ixgb_driver_version);
162
163 printk(KERN_INFO "%s\n", ixgb_copyright);
164
c2eba932 165 return pci_module_init(&ixgb_driver);
1da177e4
LT		 166}
167
168module_init(ixgb_init_module);
169
170/**
171 * ixgb_exit_module - Driver Exit Cleanup Routine
172 *
173 * ixgb_exit_module is called just before the driver is removed
174 * from memory.
175 **/
176
177static void __exit
178ixgb_exit_module(void)
179{
1da177e4
LT		 180 pci_unregister_driver(&ixgb_driver);
181}
182
183module_exit(ixgb_exit_module);
184
185/**
186 * ixgb_irq_disable - Mask off interrupt generation on the NIC
187 * @adapter: board private structure
188 **/
189
235949d1 190static void
1da177e4
LT		 191ixgb_irq_disable(struct ixgb_adapter *adapter)
192{
193 atomic_inc(&adapter->irq_sem);
194 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
195 IXGB_WRITE_FLUSH(&adapter->hw);
196 synchronize_irq(adapter->pdev->irq);
197}
198
199/**
200 * ixgb_irq_enable - Enable default interrupt generation settings
201 * @adapter: board private structure
202 **/
203
235949d1 204static void
1da177e4
LT		 205ixgb_irq_enable(struct ixgb_adapter *adapter)
206{
207 if(atomic_dec_and_test(&adapter->irq_sem)) {
208 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC		 209 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
210 IXGB_INT_LSC);
1da177e4
LT		 211 IXGB_WRITE_FLUSH(&adapter->hw);
212 }
213}
214
215int
216ixgb_up(struct ixgb_adapter *adapter)
217{
218 struct net_device *netdev = adapter->netdev;
219 int err;
220 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
221 struct ixgb_hw *hw = &adapter->hw;
222
223 /* hardware has been reset, we need to reload some things */
224
8556f0d1 225 ixgb_rar_set(hw, netdev->dev_addr, 0);
1da177e4
LT		 226 ixgb_set_multi(netdev);
227
228 ixgb_restore_vlan(adapter);
229
230 ixgb_configure_tx(adapter);
231 ixgb_setup_rctl(adapter);
232 ixgb_configure_rx(adapter);
233 ixgb_alloc_rx_buffers(adapter);
234
e59d1696
AK		 235 /* disable interrupts and get the hardware into a known state */
236 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
237
1da177e4
LT		 238#ifdef CONFIG_PCI_MSI
239 {
240 boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
241 IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
242 adapter->have_msi = TRUE;
243
244 if (!pcix)
245 adapter->have_msi = FALSE;
246 else if((err = pci_enable_msi(adapter->pdev))) {
ec9c3f5d 247 DPRINTK(PROBE, ERR,
1da177e4
LT		 248 "Unable to allocate MSI interrupt Error: %d\n", err);
249 adapter->have_msi = FALSE;
250 /* proceed to try to request regular interrupt */
251 }
252 }
253
254#endif
255 if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
256 SA_SHIRQ | SA_SAMPLE_RANDOM,
ec9c3f5d
AK		 257 netdev->name, netdev))) {
258 DPRINTK(PROBE, ERR,
259 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 260 return err;
ec9c3f5d 261 }
1da177e4 262
1da177e4
LT		 263 if((hw->max_frame_size != max_frame) ||
264 (hw->max_frame_size !=
265 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
266
267 hw->max_frame_size = max_frame;
268
269 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
270
271 if(hw->max_frame_size >
272 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
273 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
274
275 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
276 ctrl0 |= IXGB_CTRL0_JFE;
277 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
278 }
279 }
280 }
281
282 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 283
284#ifdef CONFIG_IXGB_NAPI
285 netif_poll_enable(netdev);
286#endif
e59d1696
AK		 287 ixgb_irq_enable(adapter);
288
1da177e4
LT		 289 return 0;
290}
291
292void
293ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
294{
295 struct net_device *netdev = adapter->netdev;
296
297 ixgb_irq_disable(adapter);
298 free_irq(adapter->pdev->irq, netdev);
299#ifdef CONFIG_PCI_MSI
300 if(adapter->have_msi == TRUE)
301 pci_disable_msi(adapter->pdev);
302
303#endif
304 if(kill_watchdog)
305 del_timer_sync(&adapter->watchdog_timer);
306#ifdef CONFIG_IXGB_NAPI
307 netif_poll_disable(netdev);
308#endif
309 adapter->link_speed = 0;
310 adapter->link_duplex = 0;
311 netif_carrier_off(netdev);
312 netif_stop_queue(netdev);
313
314 ixgb_reset(adapter);
315 ixgb_clean_tx_ring(adapter);
316 ixgb_clean_rx_ring(adapter);
317}
318
319void
320ixgb_reset(struct ixgb_adapter *adapter)
321{
322
323 ixgb_adapter_stop(&adapter->hw);
324 if(!ixgb_init_hw(&adapter->hw))
ec9c3f5d 325 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
1da177e4
LT		 326}
327
328/**
329 * ixgb_probe - Device Initialization Routine
330 * @pdev: PCI device information struct
331 * @ent: entry in ixgb_pci_tbl
332 *
333 * Returns 0 on success, negative on failure
334 *
335 * ixgb_probe initializes an adapter identified by a pci_dev structure.
336 * The OS initialization, configuring of the adapter private structure,
337 * and a hardware reset occur.
338 **/
339
340static int __devinit
341ixgb_probe(struct pci_dev *pdev,
342 const struct pci_device_id *ent)
343{
344 struct net_device *netdev = NULL;
345 struct ixgb_adapter *adapter;
346 static int cards_found = 0;
347 unsigned long mmio_start;
348 int mmio_len;
349 int pci_using_dac;
350 int i;
351 int err;
352
353 if((err = pci_enable_device(pdev)))
354 return err;
355
c91e468a
AS		 356 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
357 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 358 pci_using_dac = 1;
359 } else {
c91e468a
AS		 360 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
361 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
ec9c3f5d
AK		 362 printk(KERN_ERR
363 "ixgb: No usable DMA configuration, aborting\n");
c91e468a 364 goto err_dma_mask;
1da177e4
LT		 365 }
366 pci_using_dac = 0;
367 }
368
369 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 370 goto err_request_regions;
1da177e4
LT		 371
372 pci_set_master(pdev);
373
374 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
375 if(!netdev) {
376 err = -ENOMEM;
377 goto err_alloc_etherdev;
378 }
379
380 SET_MODULE_OWNER(netdev);
381 SET_NETDEV_DEV(netdev, &pdev->dev);
382
383 pci_set_drvdata(pdev, netdev);
8908c6cd 384 adapter = netdev_priv(netdev);
1da177e4
LT		 385 adapter->netdev = netdev;
386 adapter->pdev = pdev;
387 adapter->hw.back = adapter;
ec9c3f5d 388 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
1da177e4
LT		 389
390 mmio_start = pci_resource_start(pdev, BAR_0);
391 mmio_len = pci_resource_len(pdev, BAR_0);
392
393 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
394 if(!adapter->hw.hw_addr) {
395 err = -EIO;
396 goto err_ioremap;
397 }
398
399 for(i = BAR_1; i <= BAR_5; i++) {
400 if(pci_resource_len(pdev, i) == 0)
401 continue;
402 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
403 adapter->hw.io_base = pci_resource_start(pdev, i);
404 break;
405 }
406 }
407
408 netdev->open = &ixgb_open;
409 netdev->stop = &ixgb_close;
410 netdev->hard_start_xmit = &ixgb_xmit_frame;
411 netdev->get_stats = &ixgb_get_stats;
412 netdev->set_multicast_list = &ixgb_set_multi;
413 netdev->set_mac_address = &ixgb_set_mac;
414 netdev->change_mtu = &ixgb_change_mtu;
415 ixgb_set_ethtool_ops(netdev);
416 netdev->tx_timeout = &ixgb_tx_timeout;
9b8118df 417 netdev->watchdog_timeo = 5 * HZ;
1da177e4
LT		 418#ifdef CONFIG_IXGB_NAPI
419 netdev->poll = &ixgb_clean;
420 netdev->weight = 64;
421#endif
422 netdev->vlan_rx_register = ixgb_vlan_rx_register;
423 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
424 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
425#ifdef CONFIG_NET_POLL_CONTROLLER
426 netdev->poll_controller = ixgb_netpoll;
427#endif
428
ec9c3f5d 429 strcpy(netdev->name, pci_name(pdev));
1da177e4
LT		 430 netdev->mem_start = mmio_start;
431 netdev->mem_end = mmio_start + mmio_len;
432 netdev->base_addr = adapter->hw.io_base;
433
434 adapter->bd_number = cards_found;
435 adapter->link_speed = 0;
436 adapter->link_duplex = 0;
437
438 /* setup the private structure */
439
440 if((err = ixgb_sw_init(adapter)))
441 goto err_sw_init;
442
443 netdev->features = NETIF_F_SG |
444 NETIF_F_HW_CSUM |
445 NETIF_F_HW_VLAN_TX |
446 NETIF_F_HW_VLAN_RX |
447 NETIF_F_HW_VLAN_FILTER;
448#ifdef NETIF_F_TSO
449 netdev->features |= NETIF_F_TSO;
450#endif
f017f14b
AK		 451#ifdef NETIF_F_LLTX
452 netdev->features |= NETIF_F_LLTX;
453#endif
1da177e4
LT		 454
455 if(pci_using_dac)
456 netdev->features |= NETIF_F_HIGHDMA;
457
458 /* make sure the EEPROM is good */
459
460 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
ec9c3f5d 461 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 462 err = -EIO;
463 goto err_eeprom;
464 }
465
466 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 467 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 468
df859c51 469 if(!is_valid_ether_addr(netdev->perm_addr)) {
ec9c3f5d 470 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 471 err = -EIO;
472 goto err_eeprom;
473 }
474
475 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
476
477 init_timer(&adapter->watchdog_timer);
478 adapter->watchdog_timer.function = &ixgb_watchdog;
479 adapter->watchdog_timer.data = (unsigned long)adapter;
480
481 INIT_WORK(&adapter->tx_timeout_task,
482 (void (*)(void *))ixgb_tx_timeout_task, netdev);
483
ec9c3f5d 484 strcpy(netdev->name, "eth%d");
1da177e4
LT		 485 if((err = register_netdev(netdev)))
486 goto err_register;
487
488 /* we're going to reset, so assume we have no link for now */
489
490 netif_carrier_off(netdev);
491 netif_stop_queue(netdev);
492
ec9c3f5d 493 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
1da177e4
LT		 494 ixgb_check_options(adapter);
495 /* reset the hardware with the new settings */
496
497 ixgb_reset(adapter);
498
499 cards_found++;
500 return 0;
501
502err_register:
503err_sw_init:
504err_eeprom:
505 iounmap(adapter->hw.hw_addr);
506err_ioremap:
507 free_netdev(netdev);
508err_alloc_etherdev:
509 pci_release_regions(pdev);
c91e468a
AS		 510err_request_regions:
511err_dma_mask:
512 pci_disable_device(pdev);
1da177e4
LT		 513 return err;
514}
515
516/**
517 * ixgb_remove - Device Removal Routine
518 * @pdev: PCI device information struct
519 *
520 * ixgb_remove is called by the PCI subsystem to alert the driver
521 * that it should release a PCI device. The could be caused by a
522 * Hot-Plug event, or because the driver is going to be removed from
523 * memory.
524 **/
525
526static void __devexit
527ixgb_remove(struct pci_dev *pdev)
528{
529 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 530 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 531
532 unregister_netdev(netdev);
533
534 iounmap(adapter->hw.hw_addr);
535 pci_release_regions(pdev);
536
537 free_netdev(netdev);
538}
539
540/**
541 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
542 * @adapter: board private structure to initialize
543 *
544 * ixgb_sw_init initializes the Adapter private data structure.
545 * Fields are initialized based on PCI device information and
546 * OS network device settings (MTU size).
547 **/
548
549static int __devinit
550ixgb_sw_init(struct ixgb_adapter *adapter)
551{
552 struct ixgb_hw *hw = &adapter->hw;
553 struct net_device *netdev = adapter->netdev;
554 struct pci_dev *pdev = adapter->pdev;
555
556 /* PCI config space info */
557
558 hw->vendor_id = pdev->vendor;
559 hw->device_id = pdev->device;
560 hw->subsystem_vendor_id = pdev->subsystem_vendor;
561 hw->subsystem_id = pdev->subsystem_device;
562
1da177e4 563 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
3f3dc0dd 564 adapter->rx_buffer_len = hw->max_frame_size;
1da177e4
LT		 565
566 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
940829e2
AK		 567 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
568 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
569 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
1da177e4
LT		 570 hw->mac_type = ixgb_82597;
571 else {
572 /* should never have loaded on this device */
ec9c3f5d 573 DPRINTK(PROBE, ERR, "unsupported device id\n");
1da177e4
LT		 574 }
575
576 /* enable flow control to be programmed */
577 hw->fc.send_xon = 1;
578
579 atomic_set(&adapter->irq_sem, 1);
580 spin_lock_init(&adapter->tx_lock);
581
582 return 0;
583}
584
585/**
586 * ixgb_open - Called when a network interface is made active
587 * @netdev: network interface device structure
588 *
589 * Returns 0 on success, negative value on failure
590 *
591 * The open entry point is called when a network interface is made
592 * active by the system (IFF_UP). At this point all resources needed
593 * for transmit and receive operations are allocated, the interrupt
594 * handler is registered with the OS, the watchdog timer is started,
595 * and the stack is notified that the interface is ready.
596 **/
597
598static int
599ixgb_open(struct net_device *netdev)
600{
8908c6cd 601 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 602 int err;
603
604 /* allocate transmit descriptors */
605
606 if((err = ixgb_setup_tx_resources(adapter)))
607 goto err_setup_tx;
608
609 /* allocate receive descriptors */
610
611 if((err = ixgb_setup_rx_resources(adapter)))
612 goto err_setup_rx;
613
614 if((err = ixgb_up(adapter)))
615 goto err_up;
616
617 return 0;
618
619err_up:
620 ixgb_free_rx_resources(adapter);
621err_setup_rx:
622 ixgb_free_tx_resources(adapter);
623err_setup_tx:
624 ixgb_reset(adapter);
625
626 return err;
627}
628
629/**
630 * ixgb_close - Disables a network interface
631 * @netdev: network interface device structure
632 *
633 * Returns 0, this is not allowed to fail
634 *
635 * The close entry point is called when an interface is de-activated
636 * by the OS. The hardware is still under the drivers control, but
637 * needs to be disabled. A global MAC reset is issued to stop the
638 * hardware, and all transmit and receive resources are freed.
639 **/
640
641static int
642ixgb_close(struct net_device *netdev)
643{
8908c6cd 644 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 645
646 ixgb_down(adapter, TRUE);
647
648 ixgb_free_tx_resources(adapter);
649 ixgb_free_rx_resources(adapter);
650
651 return 0;
652}
653
654/**
655 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
656 * @adapter: board private structure
657 *
658 * Return 0 on success, negative on failure
659 **/
660
661int
662ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
663{
664 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
665 struct pci_dev *pdev = adapter->pdev;
666 int size;
667
668 size = sizeof(struct ixgb_buffer) * txdr->count;
669 txdr->buffer_info = vmalloc(size);
670 if(!txdr->buffer_info) {
ec9c3f5d
AK		 671 DPRINTK(PROBE, ERR,
672 "Unable to allocate transmit descriptor ring memory\n");
1da177e4
LT		 673 return -ENOMEM;
674 }
675 memset(txdr->buffer_info, 0, size);
676
677 /* round up to nearest 4K */
678
679 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
680 IXGB_ROUNDUP(txdr->size, 4096);
681
682 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
683 if(!txdr->desc) {
684 vfree(txdr->buffer_info);
ec9c3f5d
AK		 685 DPRINTK(PROBE, ERR,
686 "Unable to allocate transmit descriptor memory\n");
1da177e4
LT		 687 return -ENOMEM;
688 }
689 memset(txdr->desc, 0, txdr->size);
690
691 txdr->next_to_use = 0;
692 txdr->next_to_clean = 0;
693
694 return 0;
695}
696
697/**
698 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
699 * @adapter: board private structure
700 *
701 * Configure the Tx unit of the MAC after a reset.
702 **/
703
704static void
705ixgb_configure_tx(struct ixgb_adapter *adapter)
706{
707 uint64_t tdba = adapter->tx_ring.dma;
708 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
709 uint32_t tctl;
710 struct ixgb_hw *hw = &adapter->hw;
711
712 /* Setup the Base and Length of the Tx Descriptor Ring
713 * tx_ring.dma can be either a 32 or 64 bit value
714 */
715
716 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
717 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
718
719 IXGB_WRITE_REG(hw, TDLEN, tdlen);
720
721 /* Setup the HW Tx Head and Tail descriptor pointers */
722
723 IXGB_WRITE_REG(hw, TDH, 0);
724 IXGB_WRITE_REG(hw, TDT, 0);
725
726 /* don't set up txdctl, it induces performance problems if configured
727 * incorrectly */
728 /* Set the Tx Interrupt Delay register */
729
730 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
731
732 /* Program the Transmit Control Register */
733
734 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
735 IXGB_WRITE_REG(hw, TCTL, tctl);
736
737 /* Setup Transmit Descriptor Settings for this adapter */
738 adapter->tx_cmd_type =
739 IXGB_TX_DESC_TYPE
740 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
741}
742
743/**
744 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
745 * @adapter: board private structure
746 *
747 * Returns 0 on success, negative on failure
748 **/
749
750int
751ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
752{
753 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
754 struct pci_dev *pdev = adapter->pdev;
755 int size;
756
757 size = sizeof(struct ixgb_buffer) * rxdr->count;
758 rxdr->buffer_info = vmalloc(size);
759 if(!rxdr->buffer_info) {
ec9c3f5d
AK		 760 DPRINTK(PROBE, ERR,
761 "Unable to allocate receive descriptor ring\n");
1da177e4
LT		 762 return -ENOMEM;
763 }
764 memset(rxdr->buffer_info, 0, size);
765
766 /* Round up to nearest 4K */
767
768 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
769 IXGB_ROUNDUP(rxdr->size, 4096);
770
771 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
772
773 if(!rxdr->desc) {
774 vfree(rxdr->buffer_info);
ec9c3f5d
AK		 775 DPRINTK(PROBE, ERR,
776 "Unable to allocate receive descriptors\n");
1da177e4
LT		 777 return -ENOMEM;
778 }
779 memset(rxdr->desc, 0, rxdr->size);
780
781 rxdr->next_to_clean = 0;
782 rxdr->next_to_use = 0;
783
784 return 0;
785}
786
787/**
788 * ixgb_setup_rctl - configure the receive control register
789 * @adapter: Board private structure
790 **/
791
792static void
793ixgb_setup_rctl(struct ixgb_adapter *adapter)
794{
795 uint32_t rctl;
796
797 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
798
799 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
800
801 rctl |=
802 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
803 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
804 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
805
806 rctl |= IXGB_RCTL_SECRC;
807
3f3dc0dd 808 if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
1da177e4 809 rctl |= IXGB_RCTL_BSIZE_2048;
3f3dc0dd 810 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
1da177e4 811 rctl |= IXGB_RCTL_BSIZE_4096;
3f3dc0dd 812 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
1da177e4 813 rctl |= IXGB_RCTL_BSIZE_8192;
3f3dc0dd 814 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
1da177e4 815 rctl |= IXGB_RCTL_BSIZE_16384;
1da177e4
LT		 816
817 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
818}
819
820/**
821 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
822 * @adapter: board private structure
823 *
824 * Configure the Rx unit of the MAC after a reset.
825 **/
826
827static void
828ixgb_configure_rx(struct ixgb_adapter *adapter)
829{
830 uint64_t rdba = adapter->rx_ring.dma;
831 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
832 struct ixgb_hw *hw = &adapter->hw;
833 uint32_t rctl;
834 uint32_t rxcsum;
835 uint32_t rxdctl;
836
837 /* make sure receives are disabled while setting up the descriptors */
838
839 rctl = IXGB_READ_REG(hw, RCTL);
840 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
841
842 /* set the Receive Delay Timer Register */
843
844 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
845
846 /* Setup the Base and Length of the Rx Descriptor Ring */
847
848 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
849 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
850
851 IXGB_WRITE_REG(hw, RDLEN, rdlen);
852
853 /* Setup the HW Rx Head and Tail Descriptor Pointers */
854 IXGB_WRITE_REG(hw, RDH, 0);
855 IXGB_WRITE_REG(hw, RDT, 0);
856
857 /* set up pre-fetching of receive buffers so we get some before we
858 * run out (default hardware behavior is to run out before fetching
859 * more). This sets up to fetch if HTHRESH rx descriptors are avail
860 * and the descriptors in hw cache are below PTHRESH. This avoids
861 * the hardware behavior of fetching <=512 descriptors in a single
862 * burst that pre-empts all other activity, usually causing fifo
863 * overflows. */
864 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
865 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
866 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
867 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
868 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
869
870 /* Enable Receive Checksum Offload for TCP and UDP */
871 if(adapter->rx_csum == TRUE) {
872 rxcsum = IXGB_READ_REG(hw, RXCSUM);
873 rxcsum |= IXGB_RXCSUM_TUOFL;
874 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
875 }
876
877 /* Enable Receives */
878
879 IXGB_WRITE_REG(hw, RCTL, rctl);
880}
881
882/**
883 * ixgb_free_tx_resources - Free Tx Resources
884 * @adapter: board private structure
885 *
886 * Free all transmit software resources
887 **/
888
889void
890ixgb_free_tx_resources(struct ixgb_adapter *adapter)
891{
892 struct pci_dev *pdev = adapter->pdev;
893
894 ixgb_clean_tx_ring(adapter);
895
896 vfree(adapter->tx_ring.buffer_info);
897 adapter->tx_ring.buffer_info = NULL;
898
899 pci_free_consistent(pdev, adapter->tx_ring.size,
900 adapter->tx_ring.desc, adapter->tx_ring.dma);
901
902 adapter->tx_ring.desc = NULL;
903}
904
235949d1 905static void
1da177e4
LT		 906ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
907 struct ixgb_buffer *buffer_info)
908{
909 struct pci_dev *pdev = adapter->pdev;
1dfdd7df
AK		 910
911 if (buffer_info->dma)
912 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
913 PCI_DMA_TODEVICE);
914
915 if (buffer_info->skb)
1da177e4 916 dev_kfree_skb_any(buffer_info->skb);
1dfdd7df
AK		 917
918 buffer_info->skb = NULL;
919 buffer_info->dma = 0;
920 buffer_info->time_stamp = 0;
921 /* these fields must always be initialized in tx
922 * buffer_info->length = 0;
923 * buffer_info->next_to_watch = 0; */
1da177e4
LT		 924}
925
926/**
927 * ixgb_clean_tx_ring - Free Tx Buffers
928 * @adapter: board private structure
929 **/
930
931static void
932ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
933{
934 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
935 struct ixgb_buffer *buffer_info;
936 unsigned long size;
937 unsigned int i;
938
939 /* Free all the Tx ring sk_buffs */
940
941 for(i = 0; i < tx_ring->count; i++) {
942 buffer_info = &tx_ring->buffer_info[i];
943 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
944 }
945
946 size = sizeof(struct ixgb_buffer) * tx_ring->count;
947 memset(tx_ring->buffer_info, 0, size);
948
949 /* Zero out the descriptor ring */
950
951 memset(tx_ring->desc, 0, tx_ring->size);
952
953 tx_ring->next_to_use = 0;
954 tx_ring->next_to_clean = 0;
955
956 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
957 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
958}
959
960/**
961 * ixgb_free_rx_resources - Free Rx Resources
962 * @adapter: board private structure
963 *
964 * Free all receive software resources
965 **/
966
967void
968ixgb_free_rx_resources(struct ixgb_adapter *adapter)
969{
970 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
971 struct pci_dev *pdev = adapter->pdev;
972
973 ixgb_clean_rx_ring(adapter);
974
975 vfree(rx_ring->buffer_info);
976 rx_ring->buffer_info = NULL;
977
978 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
979
980 rx_ring->desc = NULL;
981}
982
983/**
984 * ixgb_clean_rx_ring - Free Rx Buffers
985 * @adapter: board private structure
986 **/
987
988static void
989ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
990{
991 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
992 struct ixgb_buffer *buffer_info;
993 struct pci_dev *pdev = adapter->pdev;
994 unsigned long size;
995 unsigned int i;
996
997 /* Free all the Rx ring sk_buffs */
998
999 for(i = 0; i < rx_ring->count; i++) {
1000 buffer_info = &rx_ring->buffer_info[i];
1001 if(buffer_info->skb) {
1002
1003 pci_unmap_single(pdev,
1004 buffer_info->dma,
1005 buffer_info->length,
1006 PCI_DMA_FROMDEVICE);
1007
1008 dev_kfree_skb(buffer_info->skb);
1009
1010 buffer_info->skb = NULL;
1011 }
1012 }
1013
1014 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1015 memset(rx_ring->buffer_info, 0, size);
1016
1017 /* Zero out the descriptor ring */
1018
1019 memset(rx_ring->desc, 0, rx_ring->size);
1020
1021 rx_ring->next_to_clean = 0;
1022 rx_ring->next_to_use = 0;
1023
1024 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1025 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1026}
1027
1028/**
1029 * ixgb_set_mac - Change the Ethernet Address of the NIC
1030 * @netdev: network interface device structure
1031 * @p: pointer to an address structure
1032 *
1033 * Returns 0 on success, negative on failure
1034 **/
1035
1036static int
1037ixgb_set_mac(struct net_device *netdev, void *p)
1038{
8908c6cd 1039 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1040 struct sockaddr *addr = p;
1041
1042 if(!is_valid_ether_addr(addr->sa_data))
1043 return -EADDRNOTAVAIL;
1044
1045 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1046
1047 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1048
1049 return 0;
1050}
1051
1052/**
1053 * ixgb_set_multi - Multicast and Promiscuous mode set
1054 * @netdev: network interface device structure
1055 *
1056 * The set_multi entry point is called whenever the multicast address
1057 * list or the network interface flags are updated. This routine is
1058 * responsible for configuring the hardware for proper multicast,
1059 * promiscuous mode, and all-multi behavior.
1060 **/
1061
1062static void
1063ixgb_set_multi(struct net_device *netdev)
1064{
8908c6cd 1065 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1066 struct ixgb_hw *hw = &adapter->hw;
1067 struct dev_mc_list *mc_ptr;
1068 uint32_t rctl;
1069 int i;
1070
1071 /* Check for Promiscuous and All Multicast modes */
1072
1073 rctl = IXGB_READ_REG(hw, RCTL);
1074
1075 if(netdev->flags & IFF_PROMISC) {
1076 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1077 } else if(netdev->flags & IFF_ALLMULTI) {
1078 rctl |= IXGB_RCTL_MPE;
1079 rctl &= ~IXGB_RCTL_UPE;
1080 } else {
1081 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1082 }
1083
1084 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1085 rctl |= IXGB_RCTL_MPE;
1086 IXGB_WRITE_REG(hw, RCTL, rctl);
1087 } else {
1088 uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
1089
1090 IXGB_WRITE_REG(hw, RCTL, rctl);
1091
1092 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1093 i++, mc_ptr = mc_ptr->next)
1094 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1095 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1096
1097 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1098 }
1099}
1100
1101/**
1102 * ixgb_watchdog - Timer Call-back
1103 * @data: pointer to netdev cast into an unsigned long
1104 **/
1105
1106static void
1107ixgb_watchdog(unsigned long data)
1108{
1109 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1110 struct net_device *netdev = adapter->netdev;
1111 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1112
1113 ixgb_check_for_link(&adapter->hw);
1114
1115 if (ixgb_check_for_bad_link(&adapter->hw)) {
1116 /* force the reset path */
1117 netif_stop_queue(netdev);
1118 }
1119
1120 if(adapter->hw.link_up) {
1121 if(!netif_carrier_ok(netdev)) {
ec9c3f5d
AK		 1122 DPRINTK(LINK, INFO,
1123 "NIC Link is Up 10000 Mbps Full Duplex\n");
1da177e4
LT		 1124 adapter->link_speed = 10000;
1125 adapter->link_duplex = FULL_DUPLEX;
1126 netif_carrier_on(netdev);
1127 netif_wake_queue(netdev);
1128 }
1129 } else {
1130 if(netif_carrier_ok(netdev)) {
1131 adapter->link_speed = 0;
1132 adapter->link_duplex = 0;
ec9c3f5d 1133 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1da177e4
LT		 1134 netif_carrier_off(netdev);
1135 netif_stop_queue(netdev);
1136
1137 }
1138 }
1139
1140 ixgb_update_stats(adapter);
1141
1142 if(!netif_carrier_ok(netdev)) {
1143 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1144 /* We've lost link, so the controller stops DMA,
1145 * but we've got queued Tx work that's never going
1146 * to get done, so reset controller to flush Tx.
1147 * (Do the reset outside of interrupt context). */
1148 schedule_work(&adapter->tx_timeout_task);
1149 }
1150 }
1151
1152 /* Force detection of hung controller every watchdog period */
1153 adapter->detect_tx_hung = TRUE;
1154
1155 /* generate an interrupt to force clean up of any stragglers */
1156 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1157
1158 /* Reset the timer */
1159 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1160}
1161
1162#define IXGB_TX_FLAGS_CSUM 0x00000001
1163#define IXGB_TX_FLAGS_VLAN 0x00000002
1164#define IXGB_TX_FLAGS_TSO 0x00000004
1165
235949d1 1166static int
1da177e4
LT		 1167ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1168{
1169#ifdef NETIF_F_TSO
1170 struct ixgb_context_desc *context_desc;
1171 unsigned int i;
1172 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1173 uint16_t ipcse, tucse, mss;
1174 int err;
1175
7967168c 1176 if(likely(skb_shinfo(skb)->gso_size)) {
1da177e4
LT		 1177 if (skb_header_cloned(skb)) {
1178 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1179 if (err)
1180 return err;
1181 }
1182
1183 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 1184 mss = skb_shinfo(skb)->gso_size;
1da177e4
LT		 1185 skb->nh.iph->tot_len = 0;
1186 skb->nh.iph->check = 0;
1187 skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
1188 skb->nh.iph->daddr,
1189 0, IPPROTO_TCP, 0);
1190 ipcss = skb->nh.raw - skb->data;
1191 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1192 ipcse = skb->h.raw - skb->data - 1;
1193 tucss = skb->h.raw - skb->data;
1194 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
1195 tucse = 0;
1196
1197 i = adapter->tx_ring.next_to_use;
1198 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1199
1200 context_desc->ipcss = ipcss;
1201 context_desc->ipcso = ipcso;
1202 context_desc->ipcse = cpu_to_le16(ipcse);
1203 context_desc->tucss = tucss;
1204 context_desc->tucso = tucso;
1205 context_desc->tucse = cpu_to_le16(tucse);
1206 context_desc->mss = cpu_to_le16(mss);
1207 context_desc->hdr_len = hdr_len;
1208 context_desc->status = 0;
1209 context_desc->cmd_type_len = cpu_to_le32(
1210 IXGB_CONTEXT_DESC_TYPE
1211 | IXGB_CONTEXT_DESC_CMD_TSE
1212 | IXGB_CONTEXT_DESC_CMD_IP
1213 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT		 1214 | IXGB_CONTEXT_DESC_CMD_IDE
1215 | (skb->len - (hdr_len)));
1216
06c2f9ec 1217
1da177e4
LT		 1218 if(++i == adapter->tx_ring.count) i = 0;
1219 adapter->tx_ring.next_to_use = i;
1220
1221 return 1;
1222 }
1223#endif
1224
1225 return 0;
1226}
1227
235949d1 1228static boolean_t
1da177e4
LT		 1229ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1230{
1231 struct ixgb_context_desc *context_desc;
1232 unsigned int i;
1233 uint8_t css, cso;
1234
1235 if(likely(skb->ip_summed == CHECKSUM_HW)) {
1236 css = skb->h.raw - skb->data;
1237 cso = (skb->h.raw + skb->csum) - skb->data;
1238
1239 i = adapter->tx_ring.next_to_use;
1240 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1241
1242 context_desc->tucss = css;
1243 context_desc->tucso = cso;
1244 context_desc->tucse = 0;
1245 /* zero out any previously existing data in one instruction */
1246 *(uint32_t *)&(context_desc->ipcss) = 0;
1247 context_desc->status = 0;
1248 context_desc->hdr_len = 0;
1249 context_desc->mss = 0;
1250 context_desc->cmd_type_len =
1251 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1252 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT		 1253
1254 if(++i == adapter->tx_ring.count) i = 0;
1255 adapter->tx_ring.next_to_use = i;
1256
1257 return TRUE;
1258 }
1259
1260 return FALSE;
1261}
1262
1263#define IXGB_MAX_TXD_PWR 14
1264#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1265
235949d1 1266static int
1da177e4
LT		 1267ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1268 unsigned int first)
1269{
1270 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1271 struct ixgb_buffer *buffer_info;
1272 int len = skb->len;
1273 unsigned int offset = 0, size, count = 0, i;
1274
1275 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1276 unsigned int f;
ac79c82e 1277
1da177e4
LT		 1278 len -= skb->data_len;
1279
1280 i = tx_ring->next_to_use;
1281
1282 while(len) {
1283 buffer_info = &tx_ring->buffer_info[i];
1284 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
1285 buffer_info->length = size;
1286 buffer_info->dma =
1287 pci_map_single(adapter->pdev,
1288 skb->data + offset,
1289 size,
1290 PCI_DMA_TODEVICE);
1291 buffer_info->time_stamp = jiffies;
1dfdd7df 1292 buffer_info->next_to_watch = 0;
1da177e4
LT		 1293
1294 len -= size;
1295 offset += size;
1296 count++;
1297 if(++i == tx_ring->count) i = 0;
1298 }
1299
1300 for(f = 0; f < nr_frags; f++) {
1301 struct skb_frag_struct *frag;
1302
1303 frag = &skb_shinfo(skb)->frags[f];
1304 len = frag->size;
1305 offset = 0;
1306
1307 while(len) {
1308 buffer_info = &tx_ring->buffer_info[i];
1309 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
1310 buffer_info->length = size;
1311 buffer_info->dma =
1312 pci_map_page(adapter->pdev,
1313 frag->page,
1314 frag->page_offset + offset,
1315 size,
1316 PCI_DMA_TODEVICE);
1317 buffer_info->time_stamp = jiffies;
1dfdd7df 1318 buffer_info->next_to_watch = 0;
1da177e4
LT		 1319
1320 len -= size;
1321 offset += size;
1322 count++;
1323 if(++i == tx_ring->count) i = 0;
1324 }
1325 }
1326 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1327 tx_ring->buffer_info[i].skb = skb;
1328 tx_ring->buffer_info[first].next_to_watch = i;
1329
1330 return count;
1331}
1332
235949d1 1333static void
1da177e4
LT		 1334ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1335{
1336 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1337 struct ixgb_tx_desc *tx_desc = NULL;
1338 struct ixgb_buffer *buffer_info;
1339 uint32_t cmd_type_len = adapter->tx_cmd_type;
1340 uint8_t status = 0;
1341 uint8_t popts = 0;
1342 unsigned int i;
1343
1344 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1345 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1346 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1347 }
1348
1349 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1350 popts |= IXGB_TX_DESC_POPTS_TXSM;
1351
1352 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1353 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1354 }
1355
1356 i = tx_ring->next_to_use;
1357
1358 while(count--) {
1359 buffer_info = &tx_ring->buffer_info[i];
1360 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1361 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1362 tx_desc->cmd_type_len =
1363 cpu_to_le32(cmd_type_len | buffer_info->length);
1364 tx_desc->status = status;
1365 tx_desc->popts = popts;
1366 tx_desc->vlan = cpu_to_le16(vlan_id);
1367
1368 if(++i == tx_ring->count) i = 0;
1369 }
1370
1371 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1372 | IXGB_TX_DESC_CMD_RS );
1373
1374 /* Force memory writes to complete before letting h/w
1375 * know there are new descriptors to fetch. (Only
1376 * applicable for weak-ordered memory model archs,
1377 * such as IA-64). */
1378 wmb();
1379
1380 tx_ring->next_to_use = i;
1381 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1382}
1383
1384/* Tx Descriptors needed, worst case */
1385#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1386 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1387#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
989316dd 1388 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
1da177e4
LT		 1389
1390static int
1391ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1392{
8908c6cd 1393 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1394 unsigned int first;
1395 unsigned int tx_flags = 0;
1396 unsigned long flags;
1397 int vlan_id = 0;
1398 int tso;
1399
1400 if(skb->len <= 0) {
1401 dev_kfree_skb_any(skb);
1402 return 0;
1403 }
1404
f017f14b
AK		 1405#ifdef NETIF_F_LLTX
1406 local_irq_save(flags);
1407 if (!spin_trylock(&adapter->tx_lock)) {
1408 /* Collision - tell upper layer to requeue */
1409 local_irq_restore(flags);
1410 return NETDEV_TX_LOCKED;
1411 }
1412#else
1da177e4 1413 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK		 1414#endif
1415
1da177e4
LT		 1416 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
1417 netif_stop_queue(netdev);
1418 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1419 return NETDEV_TX_BUSY;
1da177e4 1420 }
f017f14b
AK		 1421
1422#ifndef NETIF_F_LLTX
1da177e4 1423 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1424#endif
1da177e4
LT		 1425
1426 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1427 tx_flags |= IXGB_TX_FLAGS_VLAN;
1428 vlan_id = vlan_tx_tag_get(skb);
1429 }
1430
1431 first = adapter->tx_ring.next_to_use;
1432
1433 tso = ixgb_tso(adapter, skb);
1434 if (tso < 0) {
1435 dev_kfree_skb_any(skb);
f017f14b
AK		 1436#ifdef NETIF_F_LLTX
1437 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1438#endif
1da177e4
LT		 1439 return NETDEV_TX_OK;
1440 }
1441
96f9c2e2 1442 if (likely(tso))
1da177e4
LT		 1443 tx_flags |= IXGB_TX_FLAGS_TSO;
1444 else if(ixgb_tx_csum(adapter, skb))
1445 tx_flags |= IXGB_TX_FLAGS_CSUM;
1446
1447 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1448 tx_flags);
1449
1450 netdev->trans_start = jiffies;
1451
f017f14b
AK		 1452#ifdef NETIF_F_LLTX
1453 /* Make sure there is space in the ring for the next send. */
1454 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED))
1455 netif_stop_queue(netdev);
1456
1457 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1458
1459#endif
1460 return NETDEV_TX_OK;
1da177e4
LT		 1461}
1462
1463/**
1464 * ixgb_tx_timeout - Respond to a Tx Hang
1465 * @netdev: network interface device structure
1466 **/
1467
1468static void
1469ixgb_tx_timeout(struct net_device *netdev)
1470{
8908c6cd 1471 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1472
1473 /* Do the reset outside of interrupt context */
1474 schedule_work(&adapter->tx_timeout_task);
1475}
1476
1477static void
1478ixgb_tx_timeout_task(struct net_device *netdev)
1479{
8908c6cd 1480 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4 1481
9b8118df 1482 adapter->tx_timeout_count++;
1da177e4
LT		 1483 ixgb_down(adapter, TRUE);
1484 ixgb_up(adapter);
1485}
1486
1487/**
1488 * ixgb_get_stats - Get System Network Statistics
1489 * @netdev: network interface device structure
1490 *
1491 * Returns the address of the device statistics structure.
1492 * The statistics are actually updated from the timer callback.
1493 **/
1494
1495static struct net_device_stats *
1496ixgb_get_stats(struct net_device *netdev)
1497{
8908c6cd 1498 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1499
1500 return &adapter->net_stats;
1501}
1502
1503/**
1504 * ixgb_change_mtu - Change the Maximum Transfer Unit
1505 * @netdev: network interface device structure
1506 * @new_mtu: new value for maximum frame size
1507 *
1508 * Returns 0 on success, negative on failure
1509 **/
1510
1511static int
1512ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1513{
8908c6cd 1514 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1515 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1516 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1517
1518
1519 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1520 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
ec9c3f5d 1521 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1da177e4
LT		 1522 return -EINVAL;
1523 }
1524
3f3dc0dd 1525 adapter->rx_buffer_len = max_frame;
1da177e4
LT		 1526
1527 netdev->mtu = new_mtu;
1528
3f3dc0dd 1529 if ((old_max_frame != max_frame) && netif_running(netdev)) {
1da177e4
LT		 1530 ixgb_down(adapter, TRUE);
1531 ixgb_up(adapter);
1532 }
1533
1534 return 0;
1535}
1536
1537/**
1538 * ixgb_update_stats - Update the board statistics counters.
1539 * @adapter: board private structure
1540 **/
1541
1542void
1543ixgb_update_stats(struct ixgb_adapter *adapter)
1544{
5633684d
MC		 1545 struct net_device *netdev = adapter->netdev;
1546
1547 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1548 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1549 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1550 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1551 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1552 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1553
1554 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1555 /* fix up multicast stats by removing broadcasts */
7b89178d
MC		 1556 if(multi >= bcast)
1557 multi -= bcast;
5633684d
MC		 1558
1559 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1560 adapter->stats.mprch += (multi >> 32);
1561 adapter->stats.bprcl += bcast_l;
1562 adapter->stats.bprch += bcast_h;
1563 } else {
1564 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1565 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1566 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1567 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1568 }
1da177e4
LT		 1569 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1570 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1571 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1572 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT		 1573 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1574 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1575 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1576 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1577 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1578 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1579 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1580 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1581 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1582 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1583 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1584 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1585 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1586 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1587 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1588 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1589 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1590 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1591 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1592 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1593 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1594 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1595 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1596 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1597 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1598 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1599 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1600 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1601 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1602 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1603 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1604 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1605 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1606 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1607 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1608 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1609 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1610 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1611 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1612 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1613 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1614 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1615 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1616 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1617 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1618 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1619 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1620 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1621 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1622 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1623 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1624 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1625
1626 /* Fill out the OS statistics structure */
1627
1628 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1629 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1630 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1631 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1632 adapter->net_stats.multicast = adapter->stats.mprcl;
1633 adapter->net_stats.collisions = 0;
1634
1635 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1636 * with a length in the type/len field */
1637 adapter->net_stats.rx_errors =
1638 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1639 adapter->stats.ruc +
1640 adapter->stats.roc /*+ adapter->stats.rlec */ +
1641 adapter->stats.icbc +
1642 adapter->stats.ecbc + adapter->stats.mpc;
1643
1da177e4
LT		 1644 /* see above
1645 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1646 */
1647
1648 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1649 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1650 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1651 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1652
1653 adapter->net_stats.tx_errors = 0;
1654 adapter->net_stats.rx_frame_errors = 0;
1655 adapter->net_stats.tx_aborted_errors = 0;
1656 adapter->net_stats.tx_carrier_errors = 0;
1657 adapter->net_stats.tx_fifo_errors = 0;
1658 adapter->net_stats.tx_heartbeat_errors = 0;
1659 adapter->net_stats.tx_window_errors = 0;
1660}
1661
1662#define IXGB_MAX_INTR 10
1663/**
1664 * ixgb_intr - Interrupt Handler
1665 * @irq: interrupt number
1666 * @data: pointer to a network interface device structure
1667 * @pt_regs: CPU registers structure
1668 **/
1669
1670static irqreturn_t
1671ixgb_intr(int irq, void *data, struct pt_regs *regs)
1672{
1673 struct net_device *netdev = data;
8908c6cd 1674 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1675 struct ixgb_hw *hw = &adapter->hw;
1676 uint32_t icr = IXGB_READ_REG(hw, ICR);
1677#ifndef CONFIG_IXGB_NAPI
1678 unsigned int i;
1679#endif
1680
1681 if(unlikely(!icr))
1682 return IRQ_NONE; /* Not our interrupt */
1683
1684 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1685 mod_timer(&adapter->watchdog_timer, jiffies);
1686 }
1687
1688#ifdef CONFIG_IXGB_NAPI
1689 if(netif_rx_schedule_prep(netdev)) {
1690
1691 /* Disable interrupts and register for poll. The flush
1692 of the posted write is intentionally left out.
1693 */
1694
1695 atomic_inc(&adapter->irq_sem);
1696 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1697 __netif_rx_schedule(netdev);
1698 }
1699#else
1700 /* yes, that is actually a & and it is meant to make sure that
1701 * every pass through this for loop checks both receive and
1702 * transmit queues for completed descriptors, intended to
1703 * avoid starvation issues and assist tx/rx fairness. */
1704 for(i = 0; i < IXGB_MAX_INTR; i++)
1705 if(!ixgb_clean_rx_irq(adapter) &
1706 !ixgb_clean_tx_irq(adapter))
1707 break;
1708#endif
1709 return IRQ_HANDLED;
1710}
1711
1712#ifdef CONFIG_IXGB_NAPI
1713/**
1714 * ixgb_clean - NAPI Rx polling callback
1715 * @adapter: board private structure
1716 **/
1717
1718static int
1719ixgb_clean(struct net_device *netdev, int *budget)
1720{
8908c6cd 1721 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1722 int work_to_do = min(*budget, netdev->quota);
1723 int tx_cleaned;
1724 int work_done = 0;
1725
1726 tx_cleaned = ixgb_clean_tx_irq(adapter);
1727 ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
1728
1729 *budget -= work_done;
1730 netdev->quota -= work_done;
1731
1732 /* if no Tx and not enough Rx work done, exit the polling mode */
1733 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
1734 netif_rx_complete(netdev);
1735 ixgb_irq_enable(adapter);
1736 return 0;
1737 }
1738
1739 return 1;
1740}
1741#endif
1742
1743/**
1744 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1745 * @adapter: board private structure
1746 **/
1747
1748static boolean_t
1749ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1750{
1751 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1752 struct net_device *netdev = adapter->netdev;
1753 struct ixgb_tx_desc *tx_desc, *eop_desc;
1754 struct ixgb_buffer *buffer_info;
1755 unsigned int i, eop;
1756 boolean_t cleaned = FALSE;
1757
1758 i = tx_ring->next_to_clean;
1759 eop = tx_ring->buffer_info[i].next_to_watch;
1760 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1761
1762 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1763
1764 for(cleaned = FALSE; !cleaned; ) {
1765 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1766 buffer_info = &tx_ring->buffer_info[i];
1767
1768 if (tx_desc->popts
1769 & (IXGB_TX_DESC_POPTS_TXSM |
1770 IXGB_TX_DESC_POPTS_IXSM))
1771 adapter->hw_csum_tx_good++;
1772
1773 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1774
1775 *(uint32_t *)&(tx_desc->status) = 0;
1776
1777 cleaned = (i == eop);
1778 if(++i == tx_ring->count) i = 0;
1779 }
1780
1781 eop = tx_ring->buffer_info[i].next_to_watch;
1782 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1783 }
1784
1785 tx_ring->next_to_clean = i;
1786
3352a3b2
AK		 1787 if (unlikely(netif_queue_stopped(netdev))) {
1788 spin_lock(&adapter->tx_lock);
1789 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
1790 (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE))
1791 netif_wake_queue(netdev);
1792 spin_unlock(&adapter->tx_lock);
1da177e4 1793 }
1da177e4
LT		 1794
1795 if(adapter->detect_tx_hung) {
1796 /* detect a transmit hang in hardware, this serializes the
1797 * check with the clearing of time_stamp and movement of i */
1798 adapter->detect_tx_hung = FALSE;
9b8118df
AK		 1799 if (tx_ring->buffer_info[eop].dma &&
1800 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1da177e4 1801 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
9b8118df
AK		 1802 IXGB_STATUS_TXOFF)) {
1803 /* detected Tx unit hang */
1804 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1805 " TDH <%x>\n"
1806 " TDT <%x>\n"
1807 " next_to_use <%x>\n"
1808 " next_to_clean <%x>\n"
1809 "buffer_info[next_to_clean]\n"
1810 " time_stamp <%lx>\n"
1811 " next_to_watch <%x>\n"
1812 " jiffies <%lx>\n"
1813 " next_to_watch.status <%x>\n",
1814 IXGB_READ_REG(&adapter->hw, TDH),
1815 IXGB_READ_REG(&adapter->hw, TDT),
1816 tx_ring->next_to_use,
1817 tx_ring->next_to_clean,
1818 tx_ring->buffer_info[eop].time_stamp,
1819 eop,
1820 jiffies,
1821 eop_desc->status);
1da177e4 1822 netif_stop_queue(netdev);
9b8118df 1823 }
1da177e4
LT		 1824 }
1825
1826 return cleaned;
1827}
1828
1829/**
1830 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1831 * @adapter: board private structure
1832 * @rx_desc: receive descriptor
1833 * @sk_buff: socket buffer with received data
1834 **/
1835
235949d1 1836static void
1da177e4
LT		 1837ixgb_rx_checksum(struct ixgb_adapter *adapter,
1838 struct ixgb_rx_desc *rx_desc,
1839 struct sk_buff *skb)
1840{
1841 /* Ignore Checksum bit is set OR
1842 * TCP Checksum has not been calculated
1843 */
1844 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1845 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1846 skb->ip_summed = CHECKSUM_NONE;
1847 return;
1848 }
1849
1850 /* At this point we know the hardware did the TCP checksum */
1851 /* now look at the TCP checksum error bit */
1852 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1853 /* let the stack verify checksum errors */
1854 skb->ip_summed = CHECKSUM_NONE;
1855 adapter->hw_csum_rx_error++;
1856 } else {
1857 /* TCP checksum is good */
1858 skb->ip_summed = CHECKSUM_UNNECESSARY;
1859 adapter->hw_csum_rx_good++;
1860 }
1861}
1862
1863/**
1864 * ixgb_clean_rx_irq - Send received data up the network stack,
1865 * @adapter: board private structure
1866 **/
1867
1868static boolean_t
1869#ifdef CONFIG_IXGB_NAPI
1870ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1871#else
1872ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1873#endif
1874{
1875 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1876 struct net_device *netdev = adapter->netdev;
1877 struct pci_dev *pdev = adapter->pdev;
1878 struct ixgb_rx_desc *rx_desc, *next_rxd;
1879 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT		 1880 uint32_t length;
1881 unsigned int i, j;
1882 boolean_t cleaned = FALSE;
1883
1884 i = rx_ring->next_to_clean;
1885 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1886 buffer_info = &rx_ring->buffer_info[i];
1887
1888 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC		 1889 struct sk_buff *skb, *next_skb;
1890 u8 status;
1da177e4
LT		 1891
1892#ifdef CONFIG_IXGB_NAPI
1893 if(*work_done >= work_to_do)
1894 break;
1895
1896 (*work_done)++;
1897#endif
f404de1c 1898 status = rx_desc->status;
1da177e4 1899 skb = buffer_info->skb;
1dfdd7df 1900 buffer_info->skb = NULL;
f404de1c 1901
1da177e4
LT		 1902 prefetch(skb->data);
1903
1904 if(++i == rx_ring->count) i = 0;
1905 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1906 prefetch(next_rxd);
1907
1908 if((j = i + 1) == rx_ring->count) j = 0;
1909 next2_buffer = &rx_ring->buffer_info[j];
1910 prefetch(next2_buffer);
1911
1912 next_buffer = &rx_ring->buffer_info[i];
1913 next_skb = next_buffer->skb;
1914 prefetch(next_skb);
1915
1da177e4
LT		 1916 cleaned = TRUE;
1917
1918 pci_unmap_single(pdev,
1919 buffer_info->dma,
1920 buffer_info->length,
1921 PCI_DMA_FROMDEVICE);
1922
1923 length = le16_to_cpu(rx_desc->length);
1924
f404de1c 1925 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT		 1926
1927 /* All receives must fit into a single buffer */
1928
1929 IXGB_DBG("Receive packet consumed multiple buffers "
1930 "length<%x>\n", length);
1931
1932 dev_kfree_skb_irq(skb);
f404de1c 1933 goto rxdesc_done;
1da177e4
LT		 1934 }
1935
1936 if (unlikely(rx_desc->errors
1937 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
1938 | IXGB_RX_DESC_ERRORS_P |
1939 IXGB_RX_DESC_ERRORS_RXE))) {
1940
1941 dev_kfree_skb_irq(skb);
f404de1c 1942 goto rxdesc_done;
1da177e4
LT		 1943 }
1944
6b900bb4
AK		 1945 /* code added for copybreak, this should improve
1946 * performance for small packets with large amounts
1947 * of reassembly being done in the stack */
1948#define IXGB_CB_LENGTH 256
1949 if (length < IXGB_CB_LENGTH) {
1950 struct sk_buff *new_skb =
1951 dev_alloc_skb(length + NET_IP_ALIGN);
1952 if (new_skb) {
1953 skb_reserve(new_skb, NET_IP_ALIGN);
1954 new_skb->dev = netdev;
1955 memcpy(new_skb->data - NET_IP_ALIGN,
1956 skb->data - NET_IP_ALIGN,
1957 length + NET_IP_ALIGN);
1958 /* save the skb in buffer_info as good */
1959 buffer_info->skb = skb;
1960 skb = new_skb;
1961 }
1962 }
1963 /* end copybreak code */
1964
1da177e4
LT		 1965 /* Good Receive */
1966 skb_put(skb, length);
1967
1968 /* Receive Checksum Offload */
1969 ixgb_rx_checksum(adapter, rx_desc, skb);
1970
1971 skb->protocol = eth_type_trans(skb, netdev);
1972#ifdef CONFIG_IXGB_NAPI
f404de1c 1973 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 1974 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
1975 le16_to_cpu(rx_desc->special) &
1976 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1977 } else {
1978 netif_receive_skb(skb);
1979 }
1980#else /* CONFIG_IXGB_NAPI */
f404de1c 1981 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 1982 vlan_hwaccel_rx(skb, adapter->vlgrp,
1983 le16_to_cpu(rx_desc->special) &
1984 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1985 } else {
1986 netif_rx(skb);
1987 }
1988#endif /* CONFIG_IXGB_NAPI */
1989 netdev->last_rx = jiffies;
1990
f404de1c
MC		 1991rxdesc_done:
1992 /* clean up descriptor, might be written over by hw */
1da177e4 1993 rx_desc->status = 0;
1da177e4 1994
f404de1c 1995 /* use prefetched values */
1da177e4
LT		 1996 rx_desc = next_rxd;
1997 buffer_info = next_buffer;
1998 }
1999
2000 rx_ring->next_to_clean = i;
2001
2002 ixgb_alloc_rx_buffers(adapter);
2003
2004 return cleaned;
2005}
2006
2007/**
2008 * ixgb_alloc_rx_buffers - Replace used receive buffers
2009 * @adapter: address of board private structure
2010 **/
2011
2012static void
2013ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2014{
2015 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2016 struct net_device *netdev = adapter->netdev;
2017 struct pci_dev *pdev = adapter->pdev;
2018 struct ixgb_rx_desc *rx_desc;
2019 struct ixgb_buffer *buffer_info;
2020 struct sk_buff *skb;
2021 unsigned int i;
2022 int num_group_tail_writes;
2023 long cleancount;
2024
2025 i = rx_ring->next_to_use;
2026 buffer_info = &rx_ring->buffer_info[i];
2027 cleancount = IXGB_DESC_UNUSED(rx_ring);
2028
2029 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2030
41639fed
MC		 2031 /* leave three descriptors unused */
2032 while(--cleancount > 2) {
1dfdd7df
AK		 2033 /* recycle! its good for you */
2034 if (!(skb = buffer_info->skb))
2035 skb = dev_alloc_skb(adapter->rx_buffer_len
2036 + NET_IP_ALIGN);
2037 else {
2038 skb_trim(skb, 0);
2039 goto map_skb;
2040 }
1da177e4 2041
1dfdd7df 2042 if (unlikely(!skb)) {
1da177e4 2043 /* Better luck next round */
1dfdd7df 2044 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 2045 break;
2046 }
2047
2048 /* Make buffer alignment 2 beyond a 16 byte boundary
2049 * this will result in a 16 byte aligned IP header after
2050 * the 14 byte MAC header is removed
2051 */
2052 skb_reserve(skb, NET_IP_ALIGN);
2053
2054 skb->dev = netdev;
2055
2056 buffer_info->skb = skb;
2057 buffer_info->length = adapter->rx_buffer_len;
1dfdd7df
AK		 2058map_skb:
2059 buffer_info->dma = pci_map_single(pdev,
2060 skb->data,
2061 adapter->rx_buffer_len,
2062 PCI_DMA_FROMDEVICE);
1da177e4 2063
1dfdd7df 2064 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1da177e4 2065 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC		 2066 /* guarantee DD bit not set now before h/w gets descriptor
2067 * this is the rest of the workaround for h/w double
2068 * writeback. */
2069 rx_desc->status = 0;
1da177e4 2070
1da177e4
LT		 2071
2072 if(++i == rx_ring->count) i = 0;
2073 buffer_info = &rx_ring->buffer_info[i];
2074 }
2075
1dfdd7df
AK		 2076 if (likely(rx_ring->next_to_use != i)) {
2077 rx_ring->next_to_use = i;
2078 if (unlikely(i-- == 0))
2079 i = (rx_ring->count - 1);
2080
2081 /* Force memory writes to complete before letting h/w
2082 * know there are new descriptors to fetch. (Only
2083 * applicable for weak-ordered memory model archs, such
2084 * as IA-64). */
2085 wmb();
2086 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2087 }
1da177e4
LT		 2088}
2089
2090/**
2091 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2092 *
2093 * @param netdev network interface device structure
2094 * @param grp indicates to enable or disable tagging/stripping
2095 **/
2096static void
2097ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2098{
8908c6cd 2099 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2100 uint32_t ctrl, rctl;
2101
2102 ixgb_irq_disable(adapter);
2103 adapter->vlgrp = grp;
2104
2105 if(grp) {
2106 /* enable VLAN tag insert/strip */
2107 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2108 ctrl |= IXGB_CTRL0_VME;
2109 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2110
2111 /* enable VLAN receive filtering */
2112
2113 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2114 rctl |= IXGB_RCTL_VFE;
2115 rctl &= ~IXGB_RCTL_CFIEN;
2116 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2117 } else {
2118 /* disable VLAN tag insert/strip */
2119
2120 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2121 ctrl &= ~IXGB_CTRL0_VME;
2122 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2123
2124 /* disable VLAN filtering */
2125
2126 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2127 rctl &= ~IXGB_RCTL_VFE;
2128 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2129 }
2130
2131 ixgb_irq_enable(adapter);
2132}
2133
2134static void
2135ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2136{
8908c6cd 2137 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2138 uint32_t vfta, index;
2139
2140 /* add VID to filter table */
2141
2142 index = (vid >> 5) & 0x7F;
2143 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2144 vfta |= (1 << (vid & 0x1F));
2145 ixgb_write_vfta(&adapter->hw, index, vfta);
2146}
2147
2148static void
2149ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2150{
8908c6cd 2151 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2152 uint32_t vfta, index;
2153
2154 ixgb_irq_disable(adapter);
2155
2156 if(adapter->vlgrp)
2157 adapter->vlgrp->vlan_devices[vid] = NULL;
2158
2159 ixgb_irq_enable(adapter);
2160
2161 /* remove VID from filter table*/
2162
2163 index = (vid >> 5) & 0x7F;
2164 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2165 vfta &= ~(1 << (vid & 0x1F));
2166 ixgb_write_vfta(&adapter->hw, index, vfta);
2167}
2168
2169static void
2170ixgb_restore_vlan(struct ixgb_adapter *adapter)
2171{
2172 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2173
2174 if(adapter->vlgrp) {
2175 uint16_t vid;
2176 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2177 if(!adapter->vlgrp->vlan_devices[vid])
2178 continue;
2179 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2180 }
2181 }
2182}
2183
1da177e4
LT		 2184#ifdef CONFIG_NET_POLL_CONTROLLER
2185/*
2186 * Polling 'interrupt' - used by things like netconsole to send skbs
2187 * without having to re-enable interrupts. It's not called while
2188 * the interrupt routine is executing.
2189 */
2190
2191static void ixgb_netpoll(struct net_device *dev)
2192{
2193 struct ixgb_adapter *adapter = dev->priv;
ac79c82e 2194
1da177e4
LT		 2195 disable_irq(adapter->pdev->irq);
2196 ixgb_intr(adapter->pdev->irq, dev, NULL);
2197 enable_irq(adapter->pdev->irq);
2198}
2199#endif
2200
2201/* ixgb_main.c */
Clone of davem's net-next-2.6 tree