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1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
0abb6eb1 | 3 | Intel PRO/10GbE Linux driver |
f731a9ef | 4 | Copyright(c) 1999 - 2008 Intel Corporation. |
0abb6eb1 AK |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
1da177e4 | 13 | more details. |
0abb6eb1 | 14 | |
1da177e4 | 15 | You should have received a copy of the GNU General Public License along with |
0abb6eb1 AK |
16 | this program; if not, write to the Free Software Foundation, Inc., |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
1da177e4 LT |
22 | Contact Information: |
23 | Linux NICS <linux.nics@intel.com> | |
0abb6eb1 | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
1da177e4 LT |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
d328bc83 JP |
29 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
30 | ||
1da177e4 LT |
31 | #include "ixgb_hw.h" |
32 | #include "ixgb_ee.h" | |
33 | /* Local prototypes */ | |
222441a6 | 34 | static u16 ixgb_shift_in_bits(struct ixgb_hw *hw); |
1da177e4 LT |
35 | |
36 | static void ixgb_shift_out_bits(struct ixgb_hw *hw, | |
222441a6 JP |
37 | u16 data, |
38 | u16 count); | |
1da177e4 LT |
39 | static void ixgb_standby_eeprom(struct ixgb_hw *hw); |
40 | ||
446490ca | 41 | static bool ixgb_wait_eeprom_command(struct ixgb_hw *hw); |
1da177e4 LT |
42 | |
43 | static void ixgb_cleanup_eeprom(struct ixgb_hw *hw); | |
44 | ||
45 | /****************************************************************************** | |
46 | * Raises the EEPROM's clock input. | |
47 | * | |
48 | * hw - Struct containing variables accessed by shared code | |
49 | * eecd_reg - EECD's current value | |
50 | *****************************************************************************/ | |
51 | static void | |
52 | ixgb_raise_clock(struct ixgb_hw *hw, | |
222441a6 | 53 | u32 *eecd_reg) |
1da177e4 LT |
54 | { |
55 | /* Raise the clock input to the EEPROM (by setting the SK bit), and then | |
56 | * wait 50 microseconds. | |
57 | */ | |
58 | *eecd_reg = *eecd_reg | IXGB_EECD_SK; | |
59 | IXGB_WRITE_REG(hw, EECD, *eecd_reg); | |
60 | udelay(50); | |
1da177e4 LT |
61 | } |
62 | ||
63 | /****************************************************************************** | |
64 | * Lowers the EEPROM's clock input. | |
65 | * | |
66 | * hw - Struct containing variables accessed by shared code | |
67 | * eecd_reg - EECD's current value | |
68 | *****************************************************************************/ | |
69 | static void | |
70 | ixgb_lower_clock(struct ixgb_hw *hw, | |
222441a6 | 71 | u32 *eecd_reg) |
1da177e4 LT |
72 | { |
73 | /* Lower the clock input to the EEPROM (by clearing the SK bit), and then | |
74 | * wait 50 microseconds. | |
75 | */ | |
76 | *eecd_reg = *eecd_reg & ~IXGB_EECD_SK; | |
77 | IXGB_WRITE_REG(hw, EECD, *eecd_reg); | |
78 | udelay(50); | |
1da177e4 LT |
79 | } |
80 | ||
81 | /****************************************************************************** | |
82 | * Shift data bits out to the EEPROM. | |
83 | * | |
84 | * hw - Struct containing variables accessed by shared code | |
85 | * data - data to send to the EEPROM | |
86 | * count - number of bits to shift out | |
87 | *****************************************************************************/ | |
88 | static void | |
89 | ixgb_shift_out_bits(struct ixgb_hw *hw, | |
222441a6 JP |
90 | u16 data, |
91 | u16 count) | |
1da177e4 | 92 | { |
222441a6 JP |
93 | u32 eecd_reg; |
94 | u32 mask; | |
1da177e4 LT |
95 | |
96 | /* We need to shift "count" bits out to the EEPROM. So, value in the | |
97 | * "data" parameter will be shifted out to the EEPROM one bit at a time. | |
98 | * In order to do this, "data" must be broken down into bits. | |
99 | */ | |
100 | mask = 0x01 << (count - 1); | |
101 | eecd_reg = IXGB_READ_REG(hw, EECD); | |
102 | eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI); | |
103 | do { | |
104 | /* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1", | |
105 | * and then raising and then lowering the clock (the SK bit controls | |
106 | * the clock input to the EEPROM). A "0" is shifted out to the EEPROM | |
107 | * by setting "DI" to "0" and then raising and then lowering the clock. | |
108 | */ | |
109 | eecd_reg &= ~IXGB_EECD_DI; | |
110 | ||
03f83041 | 111 | if (data & mask) |
1da177e4 LT |
112 | eecd_reg |= IXGB_EECD_DI; |
113 | ||
114 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | |
115 | ||
116 | udelay(50); | |
117 | ||
118 | ixgb_raise_clock(hw, &eecd_reg); | |
119 | ixgb_lower_clock(hw, &eecd_reg); | |
120 | ||
121 | mask = mask >> 1; | |
122 | ||
9a432992 | 123 | } while (mask); |
1da177e4 LT |
124 | |
125 | /* We leave the "DI" bit set to "0" when we leave this routine. */ | |
126 | eecd_reg &= ~IXGB_EECD_DI; | |
127 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | |
1da177e4 LT |
128 | } |
129 | ||
130 | /****************************************************************************** | |
131 | * Shift data bits in from the EEPROM | |
132 | * | |
133 | * hw - Struct containing variables accessed by shared code | |
134 | *****************************************************************************/ | |
222441a6 | 135 | static u16 |
1da177e4 LT |
136 | ixgb_shift_in_bits(struct ixgb_hw *hw) |
137 | { | |
222441a6 JP |
138 | u32 eecd_reg; |
139 | u32 i; | |
140 | u16 data; | |
1da177e4 LT |
141 | |
142 | /* In order to read a register from the EEPROM, we need to shift 16 bits | |
143 | * in from the EEPROM. Bits are "shifted in" by raising the clock input to | |
144 | * the EEPROM (setting the SK bit), and then reading the value of the "DO" | |
145 | * bit. During this "shifting in" process the "DI" bit should always be | |
146 | * clear.. | |
147 | */ | |
148 | ||
149 | eecd_reg = IXGB_READ_REG(hw, EECD); | |
150 | ||
151 | eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI); | |
152 | data = 0; | |
153 | ||
1459336d | 154 | for (i = 0; i < 16; i++) { |
1da177e4 LT |
155 | data = data << 1; |
156 | ixgb_raise_clock(hw, &eecd_reg); | |
157 | ||
158 | eecd_reg = IXGB_READ_REG(hw, EECD); | |
159 | ||
160 | eecd_reg &= ~(IXGB_EECD_DI); | |
03f83041 | 161 | if (eecd_reg & IXGB_EECD_DO) |
1da177e4 LT |
162 | data |= 1; |
163 | ||
164 | ixgb_lower_clock(hw, &eecd_reg); | |
165 | } | |
166 | ||
167 | return data; | |
168 | } | |
169 | ||
170 | /****************************************************************************** | |
171 | * Prepares EEPROM for access | |
172 | * | |
173 | * hw - Struct containing variables accessed by shared code | |
174 | * | |
175 | * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This | |
176 | * function should be called before issuing a command to the EEPROM. | |
177 | *****************************************************************************/ | |
178 | static void | |
179 | ixgb_setup_eeprom(struct ixgb_hw *hw) | |
180 | { | |
222441a6 | 181 | u32 eecd_reg; |
1da177e4 LT |
182 | |
183 | eecd_reg = IXGB_READ_REG(hw, EECD); | |
184 | ||
185 | /* Clear SK and DI */ | |
186 | eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI); | |
187 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | |
188 | ||
189 | /* Set CS */ | |
190 | eecd_reg |= IXGB_EECD_CS; | |
191 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | |
1da177e4 LT |
192 | } |
193 | ||
194 | /****************************************************************************** | |
195 | * Returns EEPROM to a "standby" state | |
196 | * | |
197 | * hw - Struct containing variables accessed by shared code | |
198 | *****************************************************************************/ | |
199 | static void | |
200 | ixgb_standby_eeprom(struct ixgb_hw *hw) | |
201 | { | |
222441a6 | 202 | u32 eecd_reg; |
1da177e4 LT |
203 | |
204 | eecd_reg = IXGB_READ_REG(hw, EECD); | |
205 | ||
52035bdb | 206 | /* Deselect EEPROM */ |
1da177e4 LT |
207 | eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK); |
208 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | |
209 | udelay(50); | |
210 | ||
211 | /* Clock high */ | |
212 | eecd_reg |= IXGB_EECD_SK; | |
213 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | |
214 | udelay(50); | |
215 | ||
216 | /* Select EEPROM */ | |
217 | eecd_reg |= IXGB_EECD_CS; | |
218 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | |
219 | udelay(50); | |
220 | ||
221 | /* Clock low */ | |
222 | eecd_reg &= ~IXGB_EECD_SK; | |
223 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | |
224 | udelay(50); | |
1da177e4 LT |
225 | } |
226 | ||
227 | /****************************************************************************** | |
228 | * Raises then lowers the EEPROM's clock pin | |
229 | * | |
230 | * hw - Struct containing variables accessed by shared code | |
231 | *****************************************************************************/ | |
232 | static void | |
233 | ixgb_clock_eeprom(struct ixgb_hw *hw) | |
234 | { | |
222441a6 | 235 | u32 eecd_reg; |
1da177e4 LT |
236 | |
237 | eecd_reg = IXGB_READ_REG(hw, EECD); | |
238 | ||
239 | /* Rising edge of clock */ | |
240 | eecd_reg |= IXGB_EECD_SK; | |
241 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | |
242 | udelay(50); | |
243 | ||
244 | /* Falling edge of clock */ | |
245 | eecd_reg &= ~IXGB_EECD_SK; | |
246 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | |
247 | udelay(50); | |
1da177e4 LT |
248 | } |
249 | ||
250 | /****************************************************************************** | |
251 | * Terminates a command by lowering the EEPROM's chip select pin | |
252 | * | |
253 | * hw - Struct containing variables accessed by shared code | |
254 | *****************************************************************************/ | |
255 | static void | |
256 | ixgb_cleanup_eeprom(struct ixgb_hw *hw) | |
257 | { | |
222441a6 | 258 | u32 eecd_reg; |
1da177e4 LT |
259 | |
260 | eecd_reg = IXGB_READ_REG(hw, EECD); | |
261 | ||
262 | eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI); | |
263 | ||
264 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | |
265 | ||
266 | ixgb_clock_eeprom(hw); | |
1da177e4 LT |
267 | } |
268 | ||
269 | /****************************************************************************** | |
270 | * Waits for the EEPROM to finish the current command. | |
271 | * | |
272 | * hw - Struct containing variables accessed by shared code | |
273 | * | |
274 | * The command is done when the EEPROM's data out pin goes high. | |
275 | * | |
276 | * Returns: | |
446490ca JP |
277 | * true: EEPROM data pin is high before timeout. |
278 | * false: Time expired. | |
1da177e4 | 279 | *****************************************************************************/ |
446490ca | 280 | static bool |
1da177e4 LT |
281 | ixgb_wait_eeprom_command(struct ixgb_hw *hw) |
282 | { | |
222441a6 JP |
283 | u32 eecd_reg; |
284 | u32 i; | |
1da177e4 LT |
285 | |
286 | /* Toggle the CS line. This in effect tells to EEPROM to actually execute | |
287 | * the command in question. | |
288 | */ | |
289 | ixgb_standby_eeprom(hw); | |
290 | ||
52035bdb | 291 | /* Now read DO repeatedly until is high (equal to '1'). The EEPROM will |
1da177e4 LT |
292 | * signal that the command has been completed by raising the DO signal. |
293 | * If DO does not go high in 10 milliseconds, then error out. | |
294 | */ | |
1459336d | 295 | for (i = 0; i < 200; i++) { |
1da177e4 LT |
296 | eecd_reg = IXGB_READ_REG(hw, EECD); |
297 | ||
03f83041 | 298 | if (eecd_reg & IXGB_EECD_DO) |
807540ba | 299 | return true; |
1da177e4 LT |
300 | |
301 | udelay(50); | |
302 | } | |
303 | ASSERT(0); | |
807540ba | 304 | return false; |
1da177e4 LT |
305 | } |
306 | ||
307 | /****************************************************************************** | |
308 | * Verifies that the EEPROM has a valid checksum | |
309 | * | |
310 | * hw - Struct containing variables accessed by shared code | |
311 | * | |
312 | * Reads the first 64 16 bit words of the EEPROM and sums the values read. | |
59c51591 | 313 | * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is |
1da177e4 LT |
314 | * valid. |
315 | * | |
316 | * Returns: | |
446490ca JP |
317 | * true: Checksum is valid |
318 | * false: Checksum is not valid. | |
1da177e4 | 319 | *****************************************************************************/ |
446490ca | 320 | bool |
1da177e4 LT |
321 | ixgb_validate_eeprom_checksum(struct ixgb_hw *hw) |
322 | { | |
222441a6 JP |
323 | u16 checksum = 0; |
324 | u16 i; | |
1da177e4 | 325 | |
1459336d | 326 | for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) |
1da177e4 LT |
327 | checksum += ixgb_read_eeprom(hw, i); |
328 | ||
03f83041 | 329 | if (checksum == (u16) EEPROM_SUM) |
807540ba | 330 | return true; |
1da177e4 | 331 | else |
807540ba | 332 | return false; |
1da177e4 LT |
333 | } |
334 | ||
335 | /****************************************************************************** | |
336 | * Calculates the EEPROM checksum and writes it to the EEPROM | |
337 | * | |
338 | * hw - Struct containing variables accessed by shared code | |
339 | * | |
340 | * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA. | |
341 | * Writes the difference to word offset 63 of the EEPROM. | |
342 | *****************************************************************************/ | |
343 | void | |
344 | ixgb_update_eeprom_checksum(struct ixgb_hw *hw) | |
345 | { | |
222441a6 JP |
346 | u16 checksum = 0; |
347 | u16 i; | |
1da177e4 | 348 | |
1459336d | 349 | for (i = 0; i < EEPROM_CHECKSUM_REG; i++) |
1da177e4 LT |
350 | checksum += ixgb_read_eeprom(hw, i); |
351 | ||
222441a6 | 352 | checksum = (u16) EEPROM_SUM - checksum; |
1da177e4 LT |
353 | |
354 | ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum); | |
1da177e4 LT |
355 | } |
356 | ||
357 | /****************************************************************************** | |
358 | * Writes a 16 bit word to a given offset in the EEPROM. | |
359 | * | |
360 | * hw - Struct containing variables accessed by shared code | |
361 | * reg - offset within the EEPROM to be written to | |
52035bdb | 362 | * data - 16 bit word to be written to the EEPROM |
1da177e4 LT |
363 | * |
364 | * If ixgb_update_eeprom_checksum is not called after this function, the | |
365 | * EEPROM will most likely contain an invalid checksum. | |
366 | * | |
367 | *****************************************************************************/ | |
368 | void | |
222441a6 | 369 | ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data) |
1da177e4 LT |
370 | { |
371 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | |
372 | ||
373 | /* Prepare the EEPROM for writing */ | |
374 | ixgb_setup_eeprom(hw); | |
375 | ||
376 | /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode | |
377 | * plus 4-bit dummy). This puts the EEPROM into write/erase mode. | |
378 | */ | |
379 | ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5); | |
380 | ixgb_shift_out_bits(hw, 0, 4); | |
381 | ||
382 | /* Prepare the EEPROM */ | |
383 | ixgb_standby_eeprom(hw); | |
384 | ||
385 | /* Send the Write command (3-bit opcode + 6-bit addr) */ | |
386 | ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3); | |
387 | ixgb_shift_out_bits(hw, offset, 6); | |
388 | ||
389 | /* Send the data */ | |
390 | ixgb_shift_out_bits(hw, data, 16); | |
391 | ||
392 | ixgb_wait_eeprom_command(hw); | |
393 | ||
394 | /* Recover from write */ | |
395 | ixgb_standby_eeprom(hw); | |
396 | ||
397 | /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit | |
398 | * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase | |
399 | * mode. | |
400 | */ | |
401 | ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5); | |
402 | ixgb_shift_out_bits(hw, 0, 4); | |
403 | ||
404 | /* Done with writing */ | |
405 | ixgb_cleanup_eeprom(hw); | |
406 | ||
407 | /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */ | |
c676504e | 408 | ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR); |
1da177e4 LT |
409 | } |
410 | ||
411 | /****************************************************************************** | |
412 | * Reads a 16 bit word from the EEPROM. | |
413 | * | |
414 | * hw - Struct containing variables accessed by shared code | |
415 | * offset - offset of 16 bit word in the EEPROM to read | |
416 | * | |
417 | * Returns: | |
418 | * The 16-bit value read from the eeprom | |
419 | *****************************************************************************/ | |
222441a6 | 420 | u16 |
1da177e4 | 421 | ixgb_read_eeprom(struct ixgb_hw *hw, |
222441a6 | 422 | u16 offset) |
1da177e4 | 423 | { |
222441a6 | 424 | u16 data; |
1da177e4 LT |
425 | |
426 | /* Prepare the EEPROM for reading */ | |
427 | ixgb_setup_eeprom(hw); | |
428 | ||
429 | /* Send the READ command (opcode + addr) */ | |
430 | ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3); | |
431 | /* | |
432 | * We have a 64 word EEPROM, there are 6 address bits | |
433 | */ | |
434 | ixgb_shift_out_bits(hw, offset, 6); | |
435 | ||
436 | /* Read the data */ | |
437 | data = ixgb_shift_in_bits(hw); | |
438 | ||
439 | /* End this read operation */ | |
440 | ixgb_standby_eeprom(hw); | |
441 | ||
807540ba | 442 | return data; |
1da177e4 LT |
443 | } |
444 | ||
445 | /****************************************************************************** | |
446 | * Reads eeprom and stores data in shared structure. | |
447 | * Validates eeprom checksum and eeprom signature. | |
448 | * | |
449 | * hw - Struct containing variables accessed by shared code | |
450 | * | |
451 | * Returns: | |
446490ca JP |
452 | * true: if eeprom read is successful |
453 | * false: otherwise. | |
1da177e4 | 454 | *****************************************************************************/ |
446490ca | 455 | bool |
1da177e4 LT |
456 | ixgb_get_eeprom_data(struct ixgb_hw *hw) |
457 | { | |
222441a6 JP |
458 | u16 i; |
459 | u16 checksum = 0; | |
1da177e4 LT |
460 | struct ixgb_ee_map_type *ee_map; |
461 | ||
d328bc83 | 462 | ENTER(); |
1da177e4 LT |
463 | |
464 | ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | |
465 | ||
d328bc83 | 466 | pr_debug("Reading eeprom data\n"); |
1459336d | 467 | for (i = 0; i < IXGB_EEPROM_SIZE ; i++) { |
222441a6 | 468 | u16 ee_data; |
1da177e4 LT |
469 | ee_data = ixgb_read_eeprom(hw, i); |
470 | checksum += ee_data; | |
c676504e | 471 | hw->eeprom[i] = cpu_to_le16(ee_data); |
1da177e4 LT |
472 | } |
473 | ||
222441a6 | 474 | if (checksum != (u16) EEPROM_SUM) { |
d328bc83 | 475 | pr_debug("Checksum invalid\n"); |
1da177e4 LT |
476 | /* clear the init_ctrl_reg_1 to signify that the cache is |
477 | * invalidated */ | |
c676504e | 478 | ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR); |
807540ba | 479 | return false; |
1da177e4 LT |
480 | } |
481 | ||
c676504e AV |
482 | if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK)) |
483 | != cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) { | |
d328bc83 | 484 | pr_debug("Signature invalid\n"); |
807540ba | 485 | return false; |
1da177e4 LT |
486 | } |
487 | ||
807540ba | 488 | return true; |
1da177e4 LT |
489 | } |
490 | ||
491 | /****************************************************************************** | |
492 | * Local function to check if the eeprom signature is good | |
493 | * If the eeprom signature is good, calls ixgb)get_eeprom_data. | |
494 | * | |
495 | * hw - Struct containing variables accessed by shared code | |
496 | * | |
497 | * Returns: | |
446490ca JP |
498 | * true: eeprom signature was good and the eeprom read was successful |
499 | * false: otherwise. | |
1da177e4 | 500 | ******************************************************************************/ |
446490ca | 501 | static bool |
1da177e4 LT |
502 | ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw) |
503 | { | |
504 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | |
505 | ||
c676504e AV |
506 | if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK)) |
507 | == cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) { | |
807540ba | 508 | return true; |
1da177e4 LT |
509 | } else { |
510 | return ixgb_get_eeprom_data(hw); | |
511 | } | |
512 | } | |
513 | ||
514 | /****************************************************************************** | |
515 | * return a word from the eeprom | |
516 | * | |
517 | * hw - Struct containing variables accessed by shared code | |
518 | * index - Offset of eeprom word | |
519 | * | |
520 | * Returns: | |
521 | * Word at indexed offset in eeprom, if valid, 0 otherwise. | |
522 | ******************************************************************************/ | |
c676504e | 523 | __le16 |
222441a6 | 524 | ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index) |
1da177e4 LT |
525 | { |
526 | ||
527 | if ((index < IXGB_EEPROM_SIZE) && | |
446490ca | 528 | (ixgb_check_and_get_eeprom_data(hw) == true)) { |
807540ba | 529 | return hw->eeprom[index]; |
1da177e4 LT |
530 | } |
531 | ||
807540ba | 532 | return 0; |
1da177e4 LT |
533 | } |
534 | ||
535 | /****************************************************************************** | |
536 | * return the mac address from EEPROM | |
537 | * | |
538 | * hw - Struct containing variables accessed by shared code | |
539 | * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise | |
540 | * | |
541 | * Returns: None. | |
542 | ******************************************************************************/ | |
543 | void | |
544 | ixgb_get_ee_mac_addr(struct ixgb_hw *hw, | |
222441a6 | 545 | u8 *mac_addr) |
1da177e4 LT |
546 | { |
547 | int i; | |
548 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | |
549 | ||
d328bc83 | 550 | ENTER(); |
1da177e4 | 551 | |
446490ca | 552 | if (ixgb_check_and_get_eeprom_data(hw) == true) { |
1da177e4 LT |
553 | for (i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) { |
554 | mac_addr[i] = ee_map->mac_addr[i]; | |
1da177e4 | 555 | } |
d328bc83 | 556 | pr_debug("eeprom mac address = %pM\n", mac_addr); |
1da177e4 LT |
557 | } |
558 | } | |
559 | ||
1da177e4 LT |
560 | |
561 | /****************************************************************************** | |
562 | * return the Printed Board Assembly number from EEPROM | |
563 | * | |
564 | * hw - Struct containing variables accessed by shared code | |
565 | * | |
566 | * Returns: | |
567 | * PBA number if EEPROM contents are valid, 0 otherwise | |
568 | ******************************************************************************/ | |
222441a6 | 569 | u32 |
1da177e4 LT |
570 | ixgb_get_ee_pba_number(struct ixgb_hw *hw) |
571 | { | |
446490ca | 572 | if (ixgb_check_and_get_eeprom_data(hw) == true) |
807540ba ED |
573 | return le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG]) |
574 | | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16); | |
1da177e4 | 575 | |
807540ba | 576 | return 0; |
1da177e4 LT |
577 | } |
578 | ||
1da177e4 LT |
579 | |
580 | /****************************************************************************** | |
581 | * return the Device Id from EEPROM | |
582 | * | |
583 | * hw - Struct containing variables accessed by shared code | |
584 | * | |
585 | * Returns: | |
586 | * Device Id if EEPROM contents are valid, 0 otherwise | |
587 | ******************************************************************************/ | |
222441a6 | 588 | u16 |
1da177e4 LT |
589 | ixgb_get_ee_device_id(struct ixgb_hw *hw) |
590 | { | |
591 | struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; | |
592 | ||
446490ca | 593 | if (ixgb_check_and_get_eeprom_data(hw) == true) |
807540ba | 594 | return le16_to_cpu(ee_map->device_id); |
1da177e4 | 595 | |
807540ba | 596 | return 0; |
1da177e4 LT |
597 | } |
598 |