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[SK_BUFF]: Introduce skb_reset_mac_header(skb)
[net-next-2.6.git] / drivers / net / irda / via-ircc.c
CommitLineData
1da177e4
LT		 1/********************************************************************
2 Filename: via-ircc.c
3 Version: 1.0
4 Description: Driver for the VIA VT8231/VT8233 IrDA chipsets
5 Author: VIA Technologies,inc
6 Date : 08/06/2003
7
8Copyright (c) 1998-2003 VIA Technologies, Inc.
9
10This program is free software; you can redistribute it and/or modify it under
11the terms of the GNU General Public License as published by the Free Software
12Foundation; either version 2, or (at your option) any later version.
13
14This program is distributed in the hope that it will be useful, but WITHOUT
15ANY WARRANTIES OR REPRESENTATIONS; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
17See the GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along with
20this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23F01 Oct/02/02: Modify code for V0.11(move out back to back transfer)
24F02 Oct/28/02: Add SB device ID for 3147 and 3177.
25 Comment :
26 jul/09/2002 : only implement two kind of dongle currently.
27 Oct/02/2002 : work on VT8231 and VT8233 .
28 Aug/06/2003 : change driver format to pci driver .
29
302004-02-16: <sda@bdit.de>
31- Removed unneeded 'legacy' pci stuff.
32- Make sure SIR mode is set (hw_init()) before calling mode-dependant stuff.
33- On speed change from core, don't send SIR frame with new speed.
34 Use current speed and change speeds later.
35- Make module-param dongle_id actually work.
36- New dongle_id 17 (0x11): TDFS4500. Single-ended SIR only.
37 Tested with home-grown PCB on EPIA boards.
38- Code cleanup.
39
40 ********************************************************************/
41#include <linux/module.h>
42#include <linux/kernel.h>
43#include <linux/types.h>
44#include <linux/skbuff.h>
45#include <linux/netdevice.h>
46#include <linux/ioport.h>
47#include <linux/delay.h>
48#include <linux/slab.h>
49#include <linux/init.h>
50#include <linux/rtnetlink.h>
51#include <linux/pci.h>
52#include <linux/dma-mapping.h>
53
54#include <asm/io.h>
55#include <asm/dma.h>
56#include <asm/byteorder.h>
57
58#include <linux/pm.h>
59
60#include <net/irda/wrapper.h>
61#include <net/irda/irda.h>
62#include <net/irda/irda_device.h>
63
64#include "via-ircc.h"
65
66#define VIA_MODULE_NAME "via-ircc"
67#define CHIP_IO_EXTENT 0x40
68
69static char *driver_name = VIA_MODULE_NAME;
70
71/* Module parameters */
72static int qos_mtt_bits = 0x07; /* 1 ms or more */
73static int dongle_id = 0; /* default: probe */
74
75/* We can't guess the type of connected dongle, user *must* supply it. */
76module_param(dongle_id, int, 0);
77
78/* FIXME : we should not need this, because instances should be automatically
79 * managed by the PCI layer. Especially that we seem to only be using the
80 * first entry. Jean II */
81/* Max 4 instances for now */
82static struct via_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
83
84/* Some prototypes */
85static int via_ircc_open(int i, chipio_t * info, unsigned int id);
86static int via_ircc_close(struct via_ircc_cb *self);
87static int via_ircc_dma_receive(struct via_ircc_cb *self);
88static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
89 int iobase);
90static int via_ircc_hard_xmit_sir(struct sk_buff *skb,
91 struct net_device *dev);
92static int via_ircc_hard_xmit_fir(struct sk_buff *skb,
93 struct net_device *dev);
94static void via_hw_init(struct via_ircc_cb *self);
95static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 baud);
7d12e780 96static irqreturn_t via_ircc_interrupt(int irq, void *dev_id);
1da177e4
LT		 97static int via_ircc_is_receiving(struct via_ircc_cb *self);
98static int via_ircc_read_dongle_id(int iobase);
99
100static int via_ircc_net_open(struct net_device *dev);
101static int via_ircc_net_close(struct net_device *dev);
102static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
103 int cmd);
104static struct net_device_stats *via_ircc_net_get_stats(struct net_device
105 *dev);
106static void via_ircc_change_dongle_speed(int iobase, int speed,
107 int dongle_id);
108static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
109static void hwreset(struct via_ircc_cb *self);
110static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
111static int upload_rxdata(struct via_ircc_cb *self, int iobase);
112static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id);
113static void __devexit via_remove_one (struct pci_dev *pdev);
114
115/* FIXME : Should use udelay() instead, even if we are x86 only - Jean II */
116static void iodelay(int udelay)
117{
118 u8 data;
119 int i;
120
121 for (i = 0; i < udelay; i++) {
122 data = inb(0x80);
123 }
124}
125
126static struct pci_device_id via_pci_tbl[] = {
127 { PCI_VENDOR_ID_VIA, 0x8231, PCI_ANY_ID, PCI_ANY_ID,0,0,0 },
128 { PCI_VENDOR_ID_VIA, 0x3109, PCI_ANY_ID, PCI_ANY_ID,0,0,1 },
129 { PCI_VENDOR_ID_VIA, 0x3074, PCI_ANY_ID, PCI_ANY_ID,0,0,2 },
130 { PCI_VENDOR_ID_VIA, 0x3147, PCI_ANY_ID, PCI_ANY_ID,0,0,3 },
131 { PCI_VENDOR_ID_VIA, 0x3177, PCI_ANY_ID, PCI_ANY_ID,0,0,4 },
132 { 0, }
133};
134
135MODULE_DEVICE_TABLE(pci,via_pci_tbl);
136
137
138static struct pci_driver via_driver = {
139 .name = VIA_MODULE_NAME,
140 .id_table = via_pci_tbl,
141 .probe = via_init_one,
142 .remove = __devexit_p(via_remove_one),
143};
144
145
146/*
147 * Function via_ircc_init ()
148 *
149 * Initialize chip. Just find out chip type and resource.
150 */
151static int __init via_ircc_init(void)
152{
153 int rc;
154
155 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
156
157 rc = pci_register_driver(&via_driver);
158 if (rc < 0) {
159 IRDA_DEBUG(0, "%s(): error rc = %d, returning -ENODEV...\n",
160 __FUNCTION__, rc);
161 return -ENODEV;
162 }
163 return 0;
164}
165
166static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id)
167{
168 int rc;
169 u8 temp,oldPCI_40,oldPCI_44,bTmp,bTmp1;
170 u16 Chipset,FirDRQ1,FirDRQ0,FirIRQ,FirIOBase;
171 chipio_t info;
172
173 IRDA_DEBUG(2, "%s(): Device ID=(0X%X)\n", __FUNCTION__, id->device);
174
175 rc = pci_enable_device (pcidev);
176 if (rc) {
177 IRDA_DEBUG(0, "%s(): error rc = %d\n", __FUNCTION__, rc);
178 return -ENODEV;
179 }
180
181 // South Bridge exist
182 if ( ReadLPCReg(0x20) != 0x3C )
183 Chipset=0x3096;
184 else
185 Chipset=0x3076;
186
187 if (Chipset==0x3076) {
188 IRDA_DEBUG(2, "%s(): Chipset = 3076\n", __FUNCTION__);
189
190 WriteLPCReg(7,0x0c );
191 temp=ReadLPCReg(0x30);//check if BIOS Enable Fir
192 if((temp&0x01)==1) { // BIOS close or no FIR
193 WriteLPCReg(0x1d, 0x82 );
194 WriteLPCReg(0x23,0x18);
195 temp=ReadLPCReg(0xF0);
196 if((temp&0x01)==0) {
197 temp=(ReadLPCReg(0x74)&0x03); //DMA
198 FirDRQ0=temp + 4;
199 temp=(ReadLPCReg(0x74)&0x0C) >> 2;
200 FirDRQ1=temp + 4;
201 } else {
202 temp=(ReadLPCReg(0x74)&0x0C) >> 2; //DMA
203 FirDRQ0=temp + 4;
204 FirDRQ1=FirDRQ0;
205 }
206 FirIRQ=(ReadLPCReg(0x70)&0x0f); //IRQ
207 FirIOBase=ReadLPCReg(0x60 ) << 8; //IO Space :high byte
208 FirIOBase=FirIOBase| ReadLPCReg(0x61) ; //low byte
209 FirIOBase=FirIOBase ;
210 info.fir_base=FirIOBase;
211 info.irq=FirIRQ;
212 info.dma=FirDRQ1;
213 info.dma2=FirDRQ0;
214 pci_read_config_byte(pcidev,0x40,&bTmp);
215 pci_write_config_byte(pcidev,0x40,((bTmp | 0x08) & 0xfe));
216 pci_read_config_byte(pcidev,0x42,&bTmp);
217 pci_write_config_byte(pcidev,0x42,(bTmp | 0xf0));
218 pci_write_config_byte(pcidev,0x5a,0xc0);
219 WriteLPCReg(0x28, 0x70 );
220 if (via_ircc_open(0, &info,0x3076) == 0)
221 rc=0;
222 } else
223 rc = -ENODEV; //IR not turn on
224 } else { //Not VT1211
225 IRDA_DEBUG(2, "%s(): Chipset = 3096\n", __FUNCTION__);
226
227 pci_read_config_byte(pcidev,0x67,&bTmp);//check if BIOS Enable Fir
228 if((bTmp&0x01)==1) { // BIOS enable FIR
229 //Enable Double DMA clock
230 pci_read_config_byte(pcidev,0x42,&oldPCI_40);
231 pci_write_config_byte(pcidev,0x42,oldPCI_40 | 0x80);
232 pci_read_config_byte(pcidev,0x40,&oldPCI_40);
233 pci_write_config_byte(pcidev,0x40,oldPCI_40 & 0xf7);
234 pci_read_config_byte(pcidev,0x44,&oldPCI_44);
235 pci_write_config_byte(pcidev,0x44,0x4e);
236 //---------- read configuration from Function0 of south bridge
237 if((bTmp&0x02)==0) {
238 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
239 FirDRQ0 = (bTmp1 & 0x30) >> 4;
240 pci_read_config_byte(pcidev,0x44,&bTmp1);
241 FirDRQ1 = (bTmp1 & 0xc0) >> 6;
242 } else {
243 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
244 FirDRQ0 = (bTmp1 & 0x30) >> 4 ;
245 FirDRQ1=0;
246 }
247 pci_read_config_byte(pcidev,0x47,&bTmp1); //IRQ
248 FirIRQ = bTmp1 & 0x0f;
249
250 pci_read_config_byte(pcidev,0x69,&bTmp);
251 FirIOBase = bTmp << 8;//hight byte
252 pci_read_config_byte(pcidev,0x68,&bTmp);
253 FirIOBase = (FirIOBase | bTmp ) & 0xfff0;
254 //-------------------------
255 info.fir_base=FirIOBase;
256 info.irq=FirIRQ;
257 info.dma=FirDRQ1;
258 info.dma2=FirDRQ0;
259 if (via_ircc_open(0, &info,0x3096) == 0)
260 rc=0;
261 } else
262 rc = -ENODEV; //IR not turn on !!!!!
263 }//Not VT1211
264
265 IRDA_DEBUG(2, "%s(): End - rc = %d\n", __FUNCTION__, rc);
266 return rc;
267}
268
269/*
270 * Function via_ircc_clean ()
271 *
272 * Close all configured chips
273 *
274 */
275static void via_ircc_clean(void)
276{
277 int i;
278
279 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
280
9c3bd683 281 for (i=0; i < ARRAY_SIZE(dev_self); i++) {
1da177e4
LT		 282 if (dev_self[i])
283 via_ircc_close(dev_self[i]);
284 }
285}
286
287static void __devexit via_remove_one (struct pci_dev *pdev)
288{
289 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
290
291 /* FIXME : This is ugly. We should use pci_get_drvdata(pdev);
292 * to get our driver instance and call directly via_ircc_close().
293 * See vlsi_ir for details...
294 * Jean II */
295 via_ircc_clean();
296
297 /* FIXME : This should be in via_ircc_close(), because here we may
298 * theoritically disable still configured devices :-( - Jean II */
299 pci_disable_device(pdev);
300}
301
302static void __exit via_ircc_cleanup(void)
303{
304 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
305
306 /* FIXME : This should be redundant, as pci_unregister_driver()
307 * should call via_remove_one() on each device.
308 * Jean II */
309 via_ircc_clean();
310
311 /* Cleanup all instances of the driver */
312 pci_unregister_driver (&via_driver);
313}
314
315/*
316 * Function via_ircc_open (iobase, irq)
317 *
318 * Open driver instance
319 *
320 */
321static __devinit int via_ircc_open(int i, chipio_t * info, unsigned int id)
322{
323 struct net_device *dev;
324 struct via_ircc_cb *self;
325 int err;
326
327 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
328
9c3bd683
BH		 329 if (i >= ARRAY_SIZE(dev_self))
330 return -ENOMEM;
331
1da177e4
LT		 332 /* Allocate new instance of the driver */
333 dev = alloc_irdadev(sizeof(struct via_ircc_cb));
334 if (dev == NULL)
335 return -ENOMEM;
336
337 self = dev->priv;
338 self->netdev = dev;
339 spin_lock_init(&self->lock);
340
341 /* FIXME : We should store our driver instance in the PCI layer,
342 * using pci_set_drvdata(), not in this array.
343 * See vlsi_ir for details... - Jean II */
344 /* FIXME : 'i' is always 0 (see via_init_one()) :-( - Jean II */
345 /* Need to store self somewhere */
346 dev_self[i] = self;
347 self->index = i;
348 /* Initialize Resource */
349 self->io.cfg_base = info->cfg_base;
350 self->io.fir_base = info->fir_base;
351 self->io.irq = info->irq;
352 self->io.fir_ext = CHIP_IO_EXTENT;
353 self->io.dma = info->dma;
354 self->io.dma2 = info->dma2;
355 self->io.fifo_size = 32;
356 self->chip_id = id;
357 self->st_fifo.len = 0;
358 self->RxDataReady = 0;
359
360 /* Reserve the ioports that we need */
361 if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) {
362 IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n",
363 __FUNCTION__, self->io.fir_base);
364 err = -ENODEV;
365 goto err_out1;
366 }
367
368 /* Initialize QoS for this device */
369 irda_init_max_qos_capabilies(&self->qos);
370
371 /* Check if user has supplied the dongle id or not */
372 if (!dongle_id)
373 dongle_id = via_ircc_read_dongle_id(self->io.fir_base);
374 self->io.dongle_id = dongle_id;
375
376 /* The only value we must override it the baudrate */
377 /* Maximum speeds and capabilities are dongle-dependant. */
378 switch( self->io.dongle_id ){
379 case 0x0d:
380 self->qos.baud_rate.bits =
381 IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200 |
382 IR_576000 | IR_1152000 | (IR_4000000 << 8);
383 break;
384 default:
385 self->qos.baud_rate.bits =
386 IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200;
387 break;
388 }
389
390 /* Following was used for testing:
391 *
392 * self->qos.baud_rate.bits = IR_9600;
393 *
394 * Is is no good, as it prohibits (error-prone) speed-changes.
395 */
396
397 self->qos.min_turn_time.bits = qos_mtt_bits;
398 irda_qos_bits_to_value(&self->qos);
399
400 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
401 self->rx_buff.truesize = 14384 + 2048;
402 self->tx_buff.truesize = 14384 + 2048;
403
404 /* Allocate memory if needed */
405 self->rx_buff.head =
406 dma_alloc_coherent(NULL, self->rx_buff.truesize,
407 &self->rx_buff_dma, GFP_KERNEL);
408 if (self->rx_buff.head == NULL) {
409 err = -ENOMEM;
410 goto err_out2;
411 }
412 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
413
414 self->tx_buff.head =
415 dma_alloc_coherent(NULL, self->tx_buff.truesize,
416 &self->tx_buff_dma, GFP_KERNEL);
417 if (self->tx_buff.head == NULL) {
418 err = -ENOMEM;
419 goto err_out3;
420 }
421 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
422
423 self->rx_buff.in_frame = FALSE;
424 self->rx_buff.state = OUTSIDE_FRAME;
425 self->tx_buff.data = self->tx_buff.head;
426 self->rx_buff.data = self->rx_buff.head;
427
428 /* Reset Tx queue info */
429 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
430 self->tx_fifo.tail = self->tx_buff.head;
431
432 /* Keep track of module usage */
433 SET_MODULE_OWNER(dev);
434
435 /* Override the network functions we need to use */
436 dev->hard_start_xmit = via_ircc_hard_xmit_sir;
437 dev->open = via_ircc_net_open;
438 dev->stop = via_ircc_net_close;
439 dev->do_ioctl = via_ircc_net_ioctl;
440 dev->get_stats = via_ircc_net_get_stats;
441
442 err = register_netdev(dev);
443 if (err)
444 goto err_out4;
445
446 IRDA_MESSAGE("IrDA: Registered device %s (via-ircc)\n", dev->name);
447
448 /* Initialise the hardware..
449 */
450 self->io.speed = 9600;
451 via_hw_init(self);
452 return 0;
453 err_out4:
454 dma_free_coherent(NULL, self->tx_buff.truesize,
455 self->tx_buff.head, self->tx_buff_dma);
456 err_out3:
457 dma_free_coherent(NULL, self->rx_buff.truesize,
458 self->rx_buff.head, self->rx_buff_dma);
459 err_out2:
460 release_region(self->io.fir_base, self->io.fir_ext);
461 err_out1:
462 free_netdev(dev);
463 dev_self[i] = NULL;
464 return err;
465}
466
467/*
468 * Function via_ircc_close (self)
469 *
470 * Close driver instance
471 *
472 */
473static int via_ircc_close(struct via_ircc_cb *self)
474{
475 int iobase;
476
477 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
478
479 IRDA_ASSERT(self != NULL, return -1;);
480
481 iobase = self->io.fir_base;
482
483 ResetChip(iobase, 5); //hardware reset.
484 /* Remove netdevice */
485 unregister_netdev(self->netdev);
486
487 /* Release the PORT that this driver is using */
488 IRDA_DEBUG(2, "%s(), Releasing Region %03x\n",
489 __FUNCTION__, self->io.fir_base);
490 release_region(self->io.fir_base, self->io.fir_ext);
491 if (self->tx_buff.head)
492 dma_free_coherent(NULL, self->tx_buff.truesize,
493 self->tx_buff.head, self->tx_buff_dma);
494 if (self->rx_buff.head)
495 dma_free_coherent(NULL, self->rx_buff.truesize,
496 self->rx_buff.head, self->rx_buff_dma);
497 dev_self[self->index] = NULL;
498
499 free_netdev(self->netdev);
500
501 return 0;
502}
503
504/*
505 * Function via_hw_init(self)
506 *
507 * Returns non-negative on success.
508 *
509 * Formerly via_ircc_setup
510 */
511static void via_hw_init(struct via_ircc_cb *self)
512{
513 int iobase = self->io.fir_base;
514
515 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
516
517 SetMaxRxPacketSize(iobase, 0x0fff); //set to max:4095
518 // FIFO Init
519 EnRXFIFOReadyInt(iobase, OFF);
520 EnRXFIFOHalfLevelInt(iobase, OFF);
521 EnTXFIFOHalfLevelInt(iobase, OFF);
522 EnTXFIFOUnderrunEOMInt(iobase, ON);
523 EnTXFIFOReadyInt(iobase, OFF);
524 InvertTX(iobase, OFF);
525 InvertRX(iobase, OFF);
526
527 if (ReadLPCReg(0x20) == 0x3c)
528 WriteLPCReg(0xF0, 0); // for VT1211
529 /* Int Init */
530 EnRXSpecInt(iobase, ON);
531
532 /* The following is basically hwreset */
533 /* If this is the case, why not just call hwreset() ? Jean II */
534 ResetChip(iobase, 5);
535 EnableDMA(iobase, OFF);
536 EnableTX(iobase, OFF);
537 EnableRX(iobase, OFF);
538 EnRXDMA(iobase, OFF);
539 EnTXDMA(iobase, OFF);
540 RXStart(iobase, OFF);
541 TXStart(iobase, OFF);
542 InitCard(iobase);
543 CommonInit(iobase);
544 SIRFilter(iobase, ON);
545 SetSIR(iobase, ON);
546 CRC16(iobase, ON);
547 EnTXCRC(iobase, 0);
548 WriteReg(iobase, I_ST_CT_0, 0x00);
549 SetBaudRate(iobase, 9600);
550 SetPulseWidth(iobase, 12);
551 SetSendPreambleCount(iobase, 0);
552
553 self->io.speed = 9600;
554 self->st_fifo.len = 0;
555
556 via_ircc_change_dongle_speed(iobase, self->io.speed,
557 self->io.dongle_id);
558
559 WriteReg(iobase, I_ST_CT_0, 0x80);
560}
561
562/*
563 * Function via_ircc_read_dongle_id (void)
564 *
565 */
566static int via_ircc_read_dongle_id(int iobase)
567{
568 int dongle_id = 9; /* Default to IBM */
569
570 IRDA_ERROR("via-ircc: dongle probing not supported, please specify dongle_id module parameter.\n");
571 return dongle_id;
572}
573
574/*
575 * Function via_ircc_change_dongle_speed (iobase, speed, dongle_id)
576 * Change speed of the attach dongle
577 * only implement two type of dongle currently.
578 */
579static void via_ircc_change_dongle_speed(int iobase, int speed,
580 int dongle_id)
581{
582 u8 mode = 0;
583
584 /* speed is unused, as we use IsSIROn()/IsMIROn() */
585 speed = speed;
586
587 IRDA_DEBUG(1, "%s(): change_dongle_speed to %d for 0x%x, %d\n",
588 __FUNCTION__, speed, iobase, dongle_id);
589
590 switch (dongle_id) {
591
592 /* Note: The dongle_id's listed here are derived from
593 * nsc-ircc.c */
594
595 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
596 UseOneRX(iobase, ON); // use one RX pin RX1,RX2
597 InvertTX(iobase, OFF);
598 InvertRX(iobase, OFF);
599
600 EnRX2(iobase, ON); //sir to rx2
601 EnGPIOtoRX2(iobase, OFF);
602
603 if (IsSIROn(iobase)) { //sir
604 // Mode select Off
605 SlowIRRXLowActive(iobase, ON);
606 udelay(1000);
607 SlowIRRXLowActive(iobase, OFF);
608 } else {
609 if (IsMIROn(iobase)) { //mir
610 // Mode select On
611 SlowIRRXLowActive(iobase, OFF);
612 udelay(20);
613 } else { // fir
614 if (IsFIROn(iobase)) { //fir
615 // Mode select On
616 SlowIRRXLowActive(iobase, OFF);
617 udelay(20);
618 }
619 }
620 }
621 break;
622
623 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
624 UseOneRX(iobase, ON); //use ONE RX....RX1
625 InvertTX(iobase, OFF);
626 InvertRX(iobase, OFF); // invert RX pin
627
628 EnRX2(iobase, ON);
629 EnGPIOtoRX2(iobase, OFF);
630 if (IsSIROn(iobase)) { //sir
631 // Mode select On
632 SlowIRRXLowActive(iobase, ON);
633 udelay(20);
634 // Mode select Off
635 SlowIRRXLowActive(iobase, OFF);
636 }
637 if (IsMIROn(iobase)) { //mir
638 // Mode select On
639 SlowIRRXLowActive(iobase, OFF);
640 udelay(20);
641 // Mode select Off
642 SlowIRRXLowActive(iobase, ON);
643 } else { // fir
644 if (IsFIROn(iobase)) { //fir
645 // Mode select On
646 SlowIRRXLowActive(iobase, OFF);
647 // TX On
648 WriteTX(iobase, ON);
649 udelay(20);
650 // Mode select OFF
651 SlowIRRXLowActive(iobase, ON);
652 udelay(20);
653 // TX Off
654 WriteTX(iobase, OFF);
655 }
656 }
657 break;
658
659 case 0x0d:
660 UseOneRX(iobase, OFF); // use two RX pin RX1,RX2
661 InvertTX(iobase, OFF);
662 InvertRX(iobase, OFF);
663 SlowIRRXLowActive(iobase, OFF);
664 if (IsSIROn(iobase)) { //sir
665 EnGPIOtoRX2(iobase, OFF);
666 WriteGIO(iobase, OFF);
667 EnRX2(iobase, OFF); //sir to rx2
668 } else { // fir mir
669 EnGPIOtoRX2(iobase, OFF);
670 WriteGIO(iobase, OFF);
671 EnRX2(iobase, OFF); //fir to rx
672 }
673 break;
674
675 case 0x11: /* Temic TFDS4500 */
676
677 IRDA_DEBUG(2, "%s: Temic TFDS4500: One RX pin, TX normal, RX inverted.\n", __FUNCTION__);
678
679 UseOneRX(iobase, ON); //use ONE RX....RX1
680 InvertTX(iobase, OFF);
681 InvertRX(iobase, ON); // invert RX pin
682
683 EnRX2(iobase, ON); //sir to rx2
684 EnGPIOtoRX2(iobase, OFF);
685
686 if( IsSIROn(iobase) ){ //sir
687
688 // Mode select On
689 SlowIRRXLowActive(iobase, ON);
690 udelay(20);
691 // Mode select Off
692 SlowIRRXLowActive(iobase, OFF);
693
694 } else{
695 IRDA_DEBUG(0, "%s: Warning: TFDS4500 not running in SIR mode !\n", __FUNCTION__);
696 }
697 break;
698
699 case 0x0ff: /* Vishay */
700 if (IsSIROn(iobase))
701 mode = 0;
702 else if (IsMIROn(iobase))
703 mode = 1;
704 else if (IsFIROn(iobase))
705 mode = 2;
706 else if (IsVFIROn(iobase))
707 mode = 5; //VFIR-16
708 SI_SetMode(iobase, mode);
709 break;
710
711 default:
712 IRDA_ERROR("%s: Error: dongle_id %d unsupported !\n",
713 __FUNCTION__, dongle_id);
714 }
715}
716
717/*
718 * Function via_ircc_change_speed (self, baud)
719 *
720 * Change the speed of the device
721 *
722 */
723static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 speed)
724{
725 struct net_device *dev = self->netdev;
726 u16 iobase;
727 u8 value = 0, bTmp;
728
729 iobase = self->io.fir_base;
730 /* Update accounting for new speed */
731 self->io.speed = speed;
732 IRDA_DEBUG(1, "%s: change_speed to %d bps.\n", __FUNCTION__, speed);
733
734 WriteReg(iobase, I_ST_CT_0, 0x0);
735
736 /* Controller mode sellection */
737 switch (speed) {
738 case 2400:
739 case 9600:
740 case 19200:
741 case 38400:
742 case 57600:
743 case 115200:
744 value = (115200/speed)-1;
745 SetSIR(iobase, ON);
746 CRC16(iobase, ON);
747 break;
748 case 576000:
749 /* FIXME: this can't be right, as it's the same as 115200,
750 * and 576000 is MIR, not SIR. */
751 value = 0;
752 SetSIR(iobase, ON);
753 CRC16(iobase, ON);
754 break;
755 case 1152000:
756 value = 0;
757 SetMIR(iobase, ON);
758 /* FIXME: CRC ??? */
759 break;
760 case 4000000:
761 value = 0;
762 SetFIR(iobase, ON);
763 SetPulseWidth(iobase, 0);
764 SetSendPreambleCount(iobase, 14);
765 CRC16(iobase, OFF);
766 EnTXCRC(iobase, ON);
767 break;
768 case 16000000:
769 value = 0;
770 SetVFIR(iobase, ON);
771 /* FIXME: CRC ??? */
772 break;
773 default:
774 value = 0;
775 break;
776 }
777
778 /* Set baudrate to 0x19[2..7] */
779 bTmp = (ReadReg(iobase, I_CF_H_1) & 0x03);
780 bTmp |= value << 2;
781 WriteReg(iobase, I_CF_H_1, bTmp);
782
783 /* Some dongles may need to be informed about speed changes. */
784 via_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
785
786 /* Set FIFO size to 64 */
787 SetFIFO(iobase, 64);
788
789 /* Enable IR */
790 WriteReg(iobase, I_ST_CT_0, 0x80);
791
792 // EnTXFIFOHalfLevelInt(iobase,ON);
793
794 /* Enable some interrupts so we can receive frames */
795 //EnAllInt(iobase,ON);
796
797 if (IsSIROn(iobase)) {
798 SIRFilter(iobase, ON);
799 SIRRecvAny(iobase, ON);
800 } else {
801 SIRFilter(iobase, OFF);
802 SIRRecvAny(iobase, OFF);
803 }
804
805 if (speed > 115200) {
806 /* Install FIR xmit handler */
807 dev->hard_start_xmit = via_ircc_hard_xmit_fir;
808 via_ircc_dma_receive(self);
809 } else {
810 /* Install SIR xmit handler */
811 dev->hard_start_xmit = via_ircc_hard_xmit_sir;
812 }
813 netif_wake_queue(dev);
814}
815
816/*
817 * Function via_ircc_hard_xmit (skb, dev)
818 *
819 * Transmit the frame!
820 *
821 */
822static int via_ircc_hard_xmit_sir(struct sk_buff *skb,
823 struct net_device *dev)
824{
825 struct via_ircc_cb *self;
826 unsigned long flags;
827 u16 iobase;
828 __u32 speed;
829
830 self = (struct via_ircc_cb *) dev->priv;
831 IRDA_ASSERT(self != NULL, return 0;);
832 iobase = self->io.fir_base;
833
834 netif_stop_queue(dev);
835 /* Check if we need to change the speed */
836 speed = irda_get_next_speed(skb);
837 if ((speed != self->io.speed) && (speed != -1)) {
838 /* Check for empty frame */
839 if (!skb->len) {
840 via_ircc_change_speed(self, speed);
841 dev->trans_start = jiffies;
842 dev_kfree_skb(skb);
843 return 0;
844 } else
845 self->new_speed = speed;
846 }
847 InitCard(iobase);
848 CommonInit(iobase);
849 SIRFilter(iobase, ON);
850 SetSIR(iobase, ON);
851 CRC16(iobase, ON);
852 EnTXCRC(iobase, 0);
853 WriteReg(iobase, I_ST_CT_0, 0x00);
854
855 spin_lock_irqsave(&self->lock, flags);
856 self->tx_buff.data = self->tx_buff.head;
857 self->tx_buff.len =
858 async_wrap_skb(skb, self->tx_buff.data,
859 self->tx_buff.truesize);
860
861 self->stats.tx_bytes += self->tx_buff.len;
862 /* Send this frame with old speed */
863 SetBaudRate(iobase, self->io.speed);
864 SetPulseWidth(iobase, 12);
865 SetSendPreambleCount(iobase, 0);
866 WriteReg(iobase, I_ST_CT_0, 0x80);
867
868 EnableTX(iobase, ON);
869 EnableRX(iobase, OFF);
870
871 ResetChip(iobase, 0);
872 ResetChip(iobase, 1);
873 ResetChip(iobase, 2);
874 ResetChip(iobase, 3);
875 ResetChip(iobase, 4);
876
877 EnAllInt(iobase, ON);
878 EnTXDMA(iobase, ON);
879 EnRXDMA(iobase, OFF);
880
881 irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
882 DMA_TX_MODE);
883
884 SetSendByte(iobase, self->tx_buff.len);
885 RXStart(iobase, OFF);
886 TXStart(iobase, ON);
887
888 dev->trans_start = jiffies;
889 spin_unlock_irqrestore(&self->lock, flags);
890 dev_kfree_skb(skb);
891 return 0;
892}
893
894static int via_ircc_hard_xmit_fir(struct sk_buff *skb,
895 struct net_device *dev)
896{
897 struct via_ircc_cb *self;
898 u16 iobase;
899 __u32 speed;
900 unsigned long flags;
901
902 self = (struct via_ircc_cb *) dev->priv;
903 iobase = self->io.fir_base;
904
905 if (self->st_fifo.len)
906 return 0;
907 if (self->chip_id == 0x3076)
908 iodelay(1500);
909 else
910 udelay(1500);
911 netif_stop_queue(dev);
912 speed = irda_get_next_speed(skb);
913 if ((speed != self->io.speed) && (speed != -1)) {
914 if (!skb->len) {
915 via_ircc_change_speed(self, speed);
916 dev->trans_start = jiffies;
917 dev_kfree_skb(skb);
918 return 0;
919 } else
920 self->new_speed = speed;
921 }
922 spin_lock_irqsave(&self->lock, flags);
923 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
924 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
925
926 self->tx_fifo.tail += skb->len;
927 self->stats.tx_bytes += skb->len;
928 memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
929 skb->len);
930 self->tx_fifo.len++;
931 self->tx_fifo.free++;
932//F01 if (self->tx_fifo.len == 1) {
933 via_ircc_dma_xmit(self, iobase);
934//F01 }
935//F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) netif_wake_queue(self->netdev);
936 dev->trans_start = jiffies;
937 dev_kfree_skb(skb);
938 spin_unlock_irqrestore(&self->lock, flags);
939 return 0;
940
941}
942
943static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase)
944{
945 EnTXDMA(iobase, OFF);
946 self->io.direction = IO_XMIT;
947 EnPhys(iobase, ON);
948 EnableTX(iobase, ON);
949 EnableRX(iobase, OFF);
950 ResetChip(iobase, 0);
951 ResetChip(iobase, 1);
952 ResetChip(iobase, 2);
953 ResetChip(iobase, 3);
954 ResetChip(iobase, 4);
955 EnAllInt(iobase, ON);
956 EnTXDMA(iobase, ON);
957 EnRXDMA(iobase, OFF);
958 irda_setup_dma(self->io.dma,
959 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
960 self->tx_buff.head) + self->tx_buff_dma,
961 self->tx_fifo.queue[self->tx_fifo.ptr].len, DMA_TX_MODE);
962 IRDA_DEBUG(1, "%s: tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n",
963 __FUNCTION__, self->tx_fifo.ptr,
964 self->tx_fifo.queue[self->tx_fifo.ptr].len,
965 self->tx_fifo.len);
966
967 SetSendByte(iobase, self->tx_fifo.queue[self->tx_fifo.ptr].len);
968 RXStart(iobase, OFF);
969 TXStart(iobase, ON);
970 return 0;
971
972}
973
974/*
975 * Function via_ircc_dma_xmit_complete (self)
976 *
977 * The transfer of a frame in finished. This function will only be called
978 * by the interrupt handler
979 *
980 */
981static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self)
982{
983 int iobase;
984 int ret = TRUE;
985 u8 Tx_status;
986
987 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
988
989 iobase = self->io.fir_base;
990 /* Disable DMA */
991// DisableDmaChannel(self->io.dma);
992 /* Check for underrrun! */
993 /* Clear bit, by writing 1 into it */
994 Tx_status = GetTXStatus(iobase);
995 if (Tx_status & 0x08) {
996 self->stats.tx_errors++;
997 self->stats.tx_fifo_errors++;
998 hwreset(self);
999// how to clear underrrun ?
1000 } else {
1001 self->stats.tx_packets++;
1002 ResetChip(iobase, 3);
1003 ResetChip(iobase, 4);
1004 }
1005 /* Check if we need to change the speed */
1006 if (self->new_speed) {
1007 via_ircc_change_speed(self, self->new_speed);
1008 self->new_speed = 0;
1009 }
1010
1011 /* Finished with this frame, so prepare for next */
1012 if (IsFIROn(iobase)) {
1013 if (self->tx_fifo.len) {
1014 self->tx_fifo.len--;
1015 self->tx_fifo.ptr++;
1016 }
1017 }
1018 IRDA_DEBUG(1,
1019 "%s: tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n",
1020 __FUNCTION__,
1021 self->tx_fifo.len, self->tx_fifo.ptr, self->tx_fifo.free);
1022/* F01_S
1023 // Any frames to be sent back-to-back?
1024 if (self->tx_fifo.len) {
1025 // Not finished yet!
1026 via_ircc_dma_xmit(self, iobase);
1027 ret = FALSE;
1028 } else {
1029F01_E*/
1030 // Reset Tx FIFO info
1031 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1032 self->tx_fifo.tail = self->tx_buff.head;
1033//F01 }
1034
1035 // Make sure we have room for more frames
1036//F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) {
1037 // Not busy transmitting anymore
1038 // Tell the network layer, that we can accept more frames
1039 netif_wake_queue(self->netdev);
1040//F01 }
1041 return ret;
1042}
1043
1044/*
1045 * Function via_ircc_dma_receive (self)
1046 *
1047 * Set configuration for receive a frame.
1048 *
1049 */
1050static int via_ircc_dma_receive(struct via_ircc_cb *self)
1051{
1052 int iobase;
1053
1054 iobase = self->io.fir_base;
1055
1056 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
1057
1058 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1059 self->tx_fifo.tail = self->tx_buff.head;
1060 self->RxDataReady = 0;
1061 self->io.direction = IO_RECV;
1062 self->rx_buff.data = self->rx_buff.head;
1063 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1064 self->st_fifo.tail = self->st_fifo.head = 0;
1065
1066 EnPhys(iobase, ON);
1067 EnableTX(iobase, OFF);
1068 EnableRX(iobase, ON);
1069
1070 ResetChip(iobase, 0);
1071 ResetChip(iobase, 1);
1072 ResetChip(iobase, 2);
1073 ResetChip(iobase, 3);
1074 ResetChip(iobase, 4);
1075
1076 EnAllInt(iobase, ON);
1077 EnTXDMA(iobase, OFF);
1078 EnRXDMA(iobase, ON);
1079 irda_setup_dma(self->io.dma2, self->rx_buff_dma,
1080 self->rx_buff.truesize, DMA_RX_MODE);
1081 TXStart(iobase, OFF);
1082 RXStart(iobase, ON);
1083
1084 return 0;
1085}
1086
1087/*
1088 * Function via_ircc_dma_receive_complete (self)
1089 *
1090 * Controller Finished with receiving frames,
1091 * and this routine is call by ISR
1092 *
1093 */
1094static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
1095 int iobase)
1096{
1097 struct st_fifo *st_fifo;
1098 struct sk_buff *skb;
1099 int len, i;
1100 u8 status = 0;
1101
1102 iobase = self->io.fir_base;
1103 st_fifo = &self->st_fifo;
1104
1105 if (self->io.speed < 4000000) { //Speed below FIR
1106 len = GetRecvByte(iobase, self);
1107 skb = dev_alloc_skb(len + 1);
1108 if (skb == NULL)
1109 return FALSE;
1110 // Make sure IP header gets aligned
1111 skb_reserve(skb, 1);
1112 skb_put(skb, len - 2);
1113 if (self->chip_id == 0x3076) {
1114 for (i = 0; i < len - 2; i++)
1115 skb->data[i] = self->rx_buff.data[i * 2];
1116 } else {
1117 if (self->chip_id == 0x3096) {
1118 for (i = 0; i < len - 2; i++)
1119 skb->data[i] =
1120 self->rx_buff.data[i];
1121 }
1122 }
1123 // Move to next frame
1124 self->rx_buff.data += len;
1125 self->stats.rx_bytes += len;
1126 self->stats.rx_packets++;
1127 skb->dev = self->netdev;
459a98ed 1128 skb_reset_mac_header(skb);
1da177e4
LT		 1129 skb->protocol = htons(ETH_P_IRDA);
1130 netif_rx(skb);
1131 return TRUE;
1132 }
1133
1134 else { //FIR mode
1135 len = GetRecvByte(iobase, self);
1136 if (len == 0)
1137 return TRUE; //interrupt only, data maybe move by RxT
1138 if (((len - 4) < 2) || ((len - 4) > 2048)) {
1139 IRDA_DEBUG(1, "%s(): Trouble:len=%x,CurCount=%x,LastCount=%x..\n",
1140 __FUNCTION__, len, RxCurCount(iobase, self),
1141 self->RxLastCount);
1142 hwreset(self);
1143 return FALSE;
1144 }
1145 IRDA_DEBUG(2, "%s(): fifo.len=%x,len=%x,CurCount=%x..\n",
1146 __FUNCTION__,
1147 st_fifo->len, len - 4, RxCurCount(iobase, self));
1148
1149 st_fifo->entries[st_fifo->tail].status = status;
1150 st_fifo->entries[st_fifo->tail].len = len;
1151 st_fifo->pending_bytes += len;
1152 st_fifo->tail++;
1153 st_fifo->len++;
1154 if (st_fifo->tail > MAX_RX_WINDOW)
1155 st_fifo->tail = 0;
1156 self->RxDataReady = 0;
1157
1158 // It maybe have MAX_RX_WINDOW package receive by
1159 // receive_complete before Timer IRQ
1160/* F01_S
1161 if (st_fifo->len < (MAX_RX_WINDOW+2 )) {
1162 RXStart(iobase,ON);
1163 SetTimer(iobase,4);
1164 }
1165 else {
1166F01_E */
1167 EnableRX(iobase, OFF);
1168 EnRXDMA(iobase, OFF);
1169 RXStart(iobase, OFF);
1170//F01_S
1171 // Put this entry back in fifo
1172 if (st_fifo->head > MAX_RX_WINDOW)
1173 st_fifo->head = 0;
1174 status = st_fifo->entries[st_fifo->head].status;
1175 len = st_fifo->entries[st_fifo->head].len;
1176 st_fifo->head++;
1177 st_fifo->len--;
1178
1179 skb = dev_alloc_skb(len + 1 - 4);
1180 /*
1181 * if frame size,data ptr,or skb ptr are wrong ,the get next
1182 * entry.
1183 */
1184 if ((skb == NULL) || (skb->data == NULL)
1185 || (self->rx_buff.data == NULL) || (len < 6)) {
1186 self->stats.rx_dropped++;
1187 return TRUE;
1188 }
1189 skb_reserve(skb, 1);
1190 skb_put(skb, len - 4);
1191
1192 memcpy(skb->data, self->rx_buff.data, len - 4);
1193 IRDA_DEBUG(2, "%s(): len=%x.rx_buff=%p\n", __FUNCTION__,
1194 len - 4, self->rx_buff.data);
1195
1196 // Move to next frame
1197 self->rx_buff.data += len;
1198 self->stats.rx_bytes += len;
1199 self->stats.rx_packets++;
1200 skb->dev = self->netdev;
459a98ed 1201 skb_reset_mac_header(skb);
1da177e4
LT		 1202 skb->protocol = htons(ETH_P_IRDA);
1203 netif_rx(skb);
1204
1205//F01_E
1206 } //FIR
1207 return TRUE;
1208
1209}
1210
1211/*
1212 * if frame is received , but no INT ,then use this routine to upload frame.
1213 */
1214static int upload_rxdata(struct via_ircc_cb *self, int iobase)
1215{
1216 struct sk_buff *skb;
1217 int len;
1218 struct st_fifo *st_fifo;
1219 st_fifo = &self->st_fifo;
1220
1221 len = GetRecvByte(iobase, self);
1222
1223 IRDA_DEBUG(2, "%s(): len=%x\n", __FUNCTION__, len);
1224
83e331e2
CS		 1225 if ((len - 4) < 2) {
1226 self->stats.rx_dropped++;
1227 return FALSE;
1228 }
1229
1da177e4 1230 skb = dev_alloc_skb(len + 1);
83e331e2 1231 if (skb == NULL) {
1da177e4
LT		 1232 self->stats.rx_dropped++;
1233 return FALSE;
1234 }
1235 skb_reserve(skb, 1);
1236 skb_put(skb, len - 4 + 1);
1237 memcpy(skb->data, self->rx_buff.data, len - 4 + 1);
1238 st_fifo->tail++;
1239 st_fifo->len++;
1240 if (st_fifo->tail > MAX_RX_WINDOW)
1241 st_fifo->tail = 0;
1242 // Move to next frame
1243 self->rx_buff.data += len;
1244 self->stats.rx_bytes += len;
1245 self->stats.rx_packets++;
1246 skb->dev = self->netdev;
459a98ed 1247 skb_reset_mac_header(skb);
1da177e4
LT		 1248 skb->protocol = htons(ETH_P_IRDA);
1249 netif_rx(skb);
1250 if (st_fifo->len < (MAX_RX_WINDOW + 2)) {
1251 RXStart(iobase, ON);
1252 } else {
1253 EnableRX(iobase, OFF);
1254 EnRXDMA(iobase, OFF);
1255 RXStart(iobase, OFF);
1256 }
1257 return TRUE;
1258}
1259
1260/*
1261 * Implement back to back receive , use this routine to upload data.
1262 */
1263
1264static int RxTimerHandler(struct via_ircc_cb *self, int iobase)
1265{
1266 struct st_fifo *st_fifo;
1267 struct sk_buff *skb;
1268 int len;
1269 u8 status;
1270
1271 st_fifo = &self->st_fifo;
1272
1273 if (CkRxRecv(iobase, self)) {
1274 // if still receiving ,then return ,don't upload frame
1275 self->RetryCount = 0;
1276 SetTimer(iobase, 20);
1277 self->RxDataReady++;
1278 return FALSE;
1279 } else
1280 self->RetryCount++;
1281
1282 if ((self->RetryCount >= 1) ||
1283 ((st_fifo->pending_bytes + 2048) > self->rx_buff.truesize)
1284 || (st_fifo->len >= (MAX_RX_WINDOW))) {
1285 while (st_fifo->len > 0) { //upload frame
1286 // Put this entry back in fifo
1287 if (st_fifo->head > MAX_RX_WINDOW)
1288 st_fifo->head = 0;
1289 status = st_fifo->entries[st_fifo->head].status;
1290 len = st_fifo->entries[st_fifo->head].len;
1291 st_fifo->head++;
1292 st_fifo->len--;
1293
1294 skb = dev_alloc_skb(len + 1 - 4);
1295 /*
1296 * if frame size, data ptr, or skb ptr are wrong,
1297 * then get next entry.
1298 */
1299 if ((skb == NULL) || (skb->data == NULL)
1300 || (self->rx_buff.data == NULL) || (len < 6)) {
1301 self->stats.rx_dropped++;
1302 continue;
1303 }
1304 skb_reserve(skb, 1);
1305 skb_put(skb, len - 4);
1306 memcpy(skb->data, self->rx_buff.data, len - 4);
1307
1308 IRDA_DEBUG(2, "%s(): len=%x.head=%x\n", __FUNCTION__,
1309 len - 4, st_fifo->head);
1310
1311 // Move to next frame
1312 self->rx_buff.data += len;
1313 self->stats.rx_bytes += len;
1314 self->stats.rx_packets++;
1315 skb->dev = self->netdev;
459a98ed 1316 skb_reset_mac_header(skb);
1da177e4
LT		 1317 skb->protocol = htons(ETH_P_IRDA);
1318 netif_rx(skb);
1319 } //while
1320 self->RetryCount = 0;
1321
1322 IRDA_DEBUG(2,
1323 "%s(): End of upload HostStatus=%x,RxStatus=%x\n",
1324 __FUNCTION__,
1325 GetHostStatus(iobase), GetRXStatus(iobase));
1326
1327 /*
1328 * if frame is receive complete at this routine ,then upload
1329 * frame.
1330 */
1331 if ((GetRXStatus(iobase) & 0x10)
1332 && (RxCurCount(iobase, self) != self->RxLastCount)) {
1333 upload_rxdata(self, iobase);
1334 if (irda_device_txqueue_empty(self->netdev))
1335 via_ircc_dma_receive(self);
1336 }
1337 } // timer detect complete
1338 else
1339 SetTimer(iobase, 4);
1340 return TRUE;
1341
1342}
1343
1344
1345
1346/*
7d12e780 1347 * Function via_ircc_interrupt (irq, dev_id)
1da177e4
LT		 1348 *
1349 * An interrupt from the chip has arrived. Time to do some work
1350 *
1351 */
7d12e780 1352static irqreturn_t via_ircc_interrupt(int irq, void *dev_id)
1da177e4
LT		 1353{
1354 struct net_device *dev = (struct net_device *) dev_id;
1355 struct via_ircc_cb *self;
1356 int iobase;
1357 u8 iHostIntType, iRxIntType, iTxIntType;
1358
1359 if (!dev) {
1360 IRDA_WARNING("%s: irq %d for unknown device.\n", driver_name,
1361 irq);
1362 return IRQ_NONE;
1363 }
1364 self = (struct via_ircc_cb *) dev->priv;
1365 iobase = self->io.fir_base;
1366 spin_lock(&self->lock);
1367 iHostIntType = GetHostStatus(iobase);
1368
1369 IRDA_DEBUG(4, "%s(): iHostIntType %02x: %s %s %s %02x\n",
1370 __FUNCTION__, iHostIntType,
1371 (iHostIntType & 0x40) ? "Timer" : "",
1372 (iHostIntType & 0x20) ? "Tx" : "",
1373 (iHostIntType & 0x10) ? "Rx" : "",
1374 (iHostIntType & 0x0e) >> 1);
1375
1376 if ((iHostIntType & 0x40) != 0) { //Timer Event
1377 self->EventFlag.TimeOut++;
1378 ClearTimerInt(iobase, 1);
1379 if (self->io.direction == IO_XMIT) {
1380 via_ircc_dma_xmit(self, iobase);
1381 }
1382 if (self->io.direction == IO_RECV) {
1383 /*
1384 * frame ready hold too long, must reset.
1385 */
1386 if (self->RxDataReady > 30) {
1387 hwreset(self);
1388 if (irda_device_txqueue_empty(self->netdev)) {
1389 via_ircc_dma_receive(self);
1390 }
1391 } else { // call this to upload frame.
1392 RxTimerHandler(self, iobase);
1393 }
1394 } //RECV
1395 } //Timer Event
1396 if ((iHostIntType & 0x20) != 0) { //Tx Event
1397 iTxIntType = GetTXStatus(iobase);
1398
1399 IRDA_DEBUG(4, "%s(): iTxIntType %02x: %s %s %s %s\n",
1400 __FUNCTION__, iTxIntType,
1401 (iTxIntType & 0x08) ? "FIFO underr." : "",
1402 (iTxIntType & 0x04) ? "EOM" : "",
1403 (iTxIntType & 0x02) ? "FIFO ready" : "",
1404 (iTxIntType & 0x01) ? "Early EOM" : "");
1405
1406 if (iTxIntType & 0x4) {
1407 self->EventFlag.EOMessage++; // read and will auto clean
1408 if (via_ircc_dma_xmit_complete(self)) {
1409 if (irda_device_txqueue_empty
1410 (self->netdev)) {
1411 via_ircc_dma_receive(self);
1412 }
1413 } else {
1414 self->EventFlag.Unknown++;
1415 }
1416 } //EOP
1417 } //Tx Event
1418 //----------------------------------------
1419 if ((iHostIntType & 0x10) != 0) { //Rx Event
1420 /* Check if DMA has finished */
1421 iRxIntType = GetRXStatus(iobase);
1422
1423 IRDA_DEBUG(4, "%s(): iRxIntType %02x: %s %s %s %s %s %s %s\n",
1424 __FUNCTION__, iRxIntType,
1425 (iRxIntType & 0x80) ? "PHY err." : "",
1426 (iRxIntType & 0x40) ? "CRC err" : "",
1427 (iRxIntType & 0x20) ? "FIFO overr." : "",
1428 (iRxIntType & 0x10) ? "EOF" : "",
1429 (iRxIntType & 0x08) ? "RxData" : "",
1430 (iRxIntType & 0x02) ? "RxMaxLen" : "",
1431 (iRxIntType & 0x01) ? "SIR bad" : "");
1432 if (!iRxIntType)
1433 IRDA_DEBUG(3, "%s(): RxIRQ =0\n", __FUNCTION__);
1434
1435 if (iRxIntType & 0x10) {
1436 if (via_ircc_dma_receive_complete(self, iobase)) {
1437//F01 if(!(IsFIROn(iobase))) via_ircc_dma_receive(self);
1438 via_ircc_dma_receive(self);
1439 }
1440 } // No ERR
1441 else { //ERR
1442 IRDA_DEBUG(4, "%s(): RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n",
1443 __FUNCTION__, iRxIntType, iHostIntType,
1444 RxCurCount(iobase, self),
1445 self->RxLastCount);
1446
1447 if (iRxIntType & 0x20) { //FIFO OverRun ERR
1448 ResetChip(iobase, 0);
1449 ResetChip(iobase, 1);
1450 } else { //PHY,CRC ERR
1451
1452 if (iRxIntType != 0x08)
1453 hwreset(self); //F01
1454 }
1455 via_ircc_dma_receive(self);
1456 } //ERR
1457
1458 } //Rx Event
1459 spin_unlock(&self->lock);
1460 return IRQ_RETVAL(iHostIntType);
1461}
1462
1463static void hwreset(struct via_ircc_cb *self)
1464{
1465 int iobase;
1466 iobase = self->io.fir_base;
1467
1468 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
1469
1470 ResetChip(iobase, 5);
1471 EnableDMA(iobase, OFF);
1472 EnableTX(iobase, OFF);
1473 EnableRX(iobase, OFF);
1474 EnRXDMA(iobase, OFF);
1475 EnTXDMA(iobase, OFF);
1476 RXStart(iobase, OFF);
1477 TXStart(iobase, OFF);
1478 InitCard(iobase);
1479 CommonInit(iobase);
1480 SIRFilter(iobase, ON);
1481 SetSIR(iobase, ON);
1482 CRC16(iobase, ON);
1483 EnTXCRC(iobase, 0);
1484 WriteReg(iobase, I_ST_CT_0, 0x00);
1485 SetBaudRate(iobase, 9600);
1486 SetPulseWidth(iobase, 12);
1487 SetSendPreambleCount(iobase, 0);
1488 WriteReg(iobase, I_ST_CT_0, 0x80);
1489
1490 /* Restore speed. */
1491 via_ircc_change_speed(self, self->io.speed);
1492
1493 self->st_fifo.len = 0;
1494}
1495
1496/*
1497 * Function via_ircc_is_receiving (self)
1498 *
1499 * Return TRUE is we are currently receiving a frame
1500 *
1501 */
1502static int via_ircc_is_receiving(struct via_ircc_cb *self)
1503{
1504 int status = FALSE;
1505 int iobase;
1506
1507 IRDA_ASSERT(self != NULL, return FALSE;);
1508
1509 iobase = self->io.fir_base;
1510 if (CkRxRecv(iobase, self))
1511 status = TRUE;
1512
1513 IRDA_DEBUG(2, "%s(): status=%x....\n", __FUNCTION__, status);
1514
1515 return status;
1516}
1517
1518
1519/*
1520 * Function via_ircc_net_open (dev)
1521 *
1522 * Start the device
1523 *
1524 */
1525static int via_ircc_net_open(struct net_device *dev)
1526{
1527 struct via_ircc_cb *self;
1528 int iobase;
1529 char hwname[32];
1530
1531 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
1532
1533 IRDA_ASSERT(dev != NULL, return -1;);
1534 self = (struct via_ircc_cb *) dev->priv;
1535 self->stats.rx_packets = 0;
1536 IRDA_ASSERT(self != NULL, return 0;);
1537 iobase = self->io.fir_base;
1538 if (request_irq(self->io.irq, via_ircc_interrupt, 0, dev->name, dev)) {
1539 IRDA_WARNING("%s, unable to allocate irq=%d\n", driver_name,
1540 self->io.irq);
1541 return -EAGAIN;
1542 }
1543 /*
1544 * Always allocate the DMA channel after the IRQ, and clean up on
1545 * failure.
1546 */
1547 if (request_dma(self->io.dma, dev->name)) {
1548 IRDA_WARNING("%s, unable to allocate dma=%d\n", driver_name,
1549 self->io.dma);
1550 free_irq(self->io.irq, self);
1551 return -EAGAIN;
1552 }
1553 if (self->io.dma2 != self->io.dma) {
1554 if (request_dma(self->io.dma2, dev->name)) {
1555 IRDA_WARNING("%s, unable to allocate dma2=%d\n",
1556 driver_name, self->io.dma2);
1557 free_irq(self->io.irq, self);
1558 return -EAGAIN;
1559 }
1560 }
1561
1562
1563 /* turn on interrupts */
1564 EnAllInt(iobase, ON);
1565 EnInternalLoop(iobase, OFF);
1566 EnExternalLoop(iobase, OFF);
1567
1568 /* */
1569 via_ircc_dma_receive(self);
1570
1571 /* Ready to play! */
1572 netif_start_queue(dev);
1573
1574 /*
1575 * Open new IrLAP layer instance, now that everything should be
1576 * initialized properly
1577 */
1578 sprintf(hwname, "VIA @ 0x%x", iobase);
1579 self->irlap = irlap_open(dev, &self->qos, hwname);
1580
1581 self->RxLastCount = 0;
1582
1583 return 0;
1584}
1585
1586/*
1587 * Function via_ircc_net_close (dev)
1588 *
1589 * Stop the device
1590 *
1591 */
1592static int via_ircc_net_close(struct net_device *dev)
1593{
1594 struct via_ircc_cb *self;
1595 int iobase;
1596
1597 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
1598
1599 IRDA_ASSERT(dev != NULL, return -1;);
1600 self = (struct via_ircc_cb *) dev->priv;
1601 IRDA_ASSERT(self != NULL, return 0;);
1602
1603 /* Stop device */
1604 netif_stop_queue(dev);
1605 /* Stop and remove instance of IrLAP */
1606 if (self->irlap)
1607 irlap_close(self->irlap);
1608 self->irlap = NULL;
1609 iobase = self->io.fir_base;
1610 EnTXDMA(iobase, OFF);
1611 EnRXDMA(iobase, OFF);
1612 DisableDmaChannel(self->io.dma);
1613
1614 /* Disable interrupts */
1615 EnAllInt(iobase, OFF);
1616 free_irq(self->io.irq, dev);
1617 free_dma(self->io.dma);
1618
1619 return 0;
1620}
1621
1622/*
1623 * Function via_ircc_net_ioctl (dev, rq, cmd)
1624 *
1625 * Process IOCTL commands for this device
1626 *
1627 */
1628static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
1629 int cmd)
1630{
1631 struct if_irda_req *irq = (struct if_irda_req *) rq;
1632 struct via_ircc_cb *self;
1633 unsigned long flags;
1634 int ret = 0;
1635
1636 IRDA_ASSERT(dev != NULL, return -1;);
1637 self = dev->priv;
1638 IRDA_ASSERT(self != NULL, return -1;);
1639 IRDA_DEBUG(1, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name,
1640 cmd);
1641 /* Disable interrupts & save flags */
1642 spin_lock_irqsave(&self->lock, flags);
1643 switch (cmd) {
1644 case SIOCSBANDWIDTH: /* Set bandwidth */
1645 if (!capable(CAP_NET_ADMIN)) {
1646 ret = -EPERM;
1647 goto out;
1648 }
1649 via_ircc_change_speed(self, irq->ifr_baudrate);
1650 break;
1651 case SIOCSMEDIABUSY: /* Set media busy */
1652 if (!capable(CAP_NET_ADMIN)) {
1653 ret = -EPERM;
1654 goto out;
1655 }
1656 irda_device_set_media_busy(self->netdev, TRUE);
1657 break;
1658 case SIOCGRECEIVING: /* Check if we are receiving right now */
1659 irq->ifr_receiving = via_ircc_is_receiving(self);
1660 break;
1661 default:
1662 ret = -EOPNOTSUPP;
1663 }
1664 out:
1665 spin_unlock_irqrestore(&self->lock, flags);
1666 return ret;
1667}
1668
1669static struct net_device_stats *via_ircc_net_get_stats(struct net_device
1670 *dev)
1671{
1672 struct via_ircc_cb *self = (struct via_ircc_cb *) dev->priv;
1673
1674 return &self->stats;
1675}
1676
1677MODULE_AUTHOR("VIA Technologies,inc");
1678MODULE_DESCRIPTION("VIA IrDA Device Driver");
1679MODULE_LICENSE("GPL");
1680
1681module_init(via_ircc_init);
1682module_exit(via_ircc_cleanup);
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