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[net-next-2.6.git] / drivers / net / irda / nsc-ircc.c
CommitLineData
1da177e4
LT		 1/*********************************************************************
2 *
3 * Filename: nsc-ircc.c
4 * Version: 1.0
5 * Description: Driver for the NSC PC'108 and PC'338 IrDA chipsets
6 * Status: Stable.
7 * Author: Dag Brattli <dagb@cs.uit.no>
8 * Created at: Sat Nov 7 21:43:15 1998
9 * Modified at: Wed Mar 1 11:29:34 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
11 *
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14 * Copyright (c) 1998 Actisys Corp., www.actisys.com
ec4f32d5 15 * Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
1da177e4
LT		 16 * All Rights Reserved
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
96de0e25 23 * Neither Dag Brattli nor University of Tromsø admit liability nor
1da177e4
LT		 24 * provide warranty for any of this software. This material is
25 * provided "AS-IS" and at no charge.
26 *
27 * Notice that all functions that needs to access the chip in _any_
28 * way, must save BSR register on entry, and restore it on exit.
29 * It is _very_ important to follow this policy!
30 *
31 * __u8 bank;
32 *
33 * bank = inb(iobase+BSR);
34 *
35 * do_your_stuff_here();
36 *
37 * outb(bank, iobase+BSR);
38 *
39 * If you find bugs in this file, its very likely that the same bug
40 * will also be in w83977af_ir.c since the implementations are quite
41 * similar.
42 *
43 ********************************************************************/
44
45#include <linux/module.h>
5a0e3ad6 46#include <linux/gfp.h>
1da177e4
LT		 47
48#include <linux/kernel.h>
49#include <linux/types.h>
50#include <linux/skbuff.h>
51#include <linux/netdevice.h>
52#include <linux/ioport.h>
53#include <linux/delay.h>
1da177e4
LT		 54#include <linux/init.h>
55#include <linux/rtnetlink.h>
56#include <linux/dma-mapping.h>
ec4f32d5 57#include <linux/pnp.h>
3b99b93b 58#include <linux/platform_device.h>
1da177e4
LT		 59
60#include <asm/io.h>
61#include <asm/dma.h>
62#include <asm/byteorder.h>
63
1da177e4
LT		 64#include <net/irda/wrapper.h>
65#include <net/irda/irda.h>
66#include <net/irda/irda_device.h>
67
68#include "nsc-ircc.h"
69
70#define CHIP_IO_EXTENT 8
71#define BROKEN_DONGLE_ID
72
73static char *driver_name = "nsc-ircc";
74
3b99b93b
DT		 75/* Power Management */
76#define NSC_IRCC_DRIVER_NAME "nsc-ircc"
77static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
78static int nsc_ircc_resume(struct platform_device *dev);
79
80static struct platform_driver nsc_ircc_driver = {
81 .suspend = nsc_ircc_suspend,
82 .resume = nsc_ircc_resume,
83 .driver = {
84 .name = NSC_IRCC_DRIVER_NAME,
85 },
86};
87
1da177e4
LT		 88/* Module parameters */
89static int qos_mtt_bits = 0x07; /* 1 ms or more */
90static int dongle_id;
91
92/* Use BIOS settions by default, but user may supply module parameters */
0ed79c9b
JT		 93static unsigned int io[] = { ~0, ~0, ~0, ~0, ~0 };
94static unsigned int irq[] = { 0, 0, 0, 0, 0 };
95static unsigned int dma[] = { 0, 0, 0, 0, 0 };
1da177e4
LT		 96
97static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
98static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
99static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
100static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
101static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
102static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
c17f888f 103#ifdef CONFIG_PNP
ec4f32d5 104static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
c17f888f 105#endif
1da177e4
LT		 106
107/* These are the known NSC chips */
108static nsc_chip_t chips[] = {
109/* Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
110 { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
111 nsc_ircc_probe_108, nsc_ircc_init_108 },
112 { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
113 nsc_ircc_probe_338, nsc_ircc_init_338 },
114 /* Contributed by Steffen Pingel - IBM X40 */
2fd19a68 115 { "PC8738x", { 0x164e, 0x4e, 0x2e }, 0x20, 0xf4, 0xff,
1da177e4
LT		 116 nsc_ircc_probe_39x, nsc_ircc_init_39x },
117 /* Contributed by Jan Frey - IBM A30/A31 */
118 { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
119 nsc_ircc_probe_39x, nsc_ircc_init_39x },
d83561a4
BC		 120 /* IBM ThinkPads using PC8738x (T60/X60/Z60) */
121 { "IBM-PC8738x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
122 nsc_ircc_probe_39x, nsc_ircc_init_39x },
123 /* IBM ThinkPads using PC8394T (T43/R52/?) */
124 { "IBM-PC8394T", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf9, 0xff,
125 nsc_ircc_probe_39x, nsc_ircc_init_39x },
1da177e4
LT		 126 { NULL }
127};
128
0ed79c9b 129static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL };
1da177e4
LT		 130
131static char *dongle_types[] = {
132 "Differential serial interface",
133 "Differential serial interface",
134 "Reserved",
135 "Reserved",
136 "Sharp RY5HD01",
137 "Reserved",
138 "Single-ended serial interface",
139 "Consumer-IR only",
140 "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
141 "IBM31T1100 or Temic TFDS6000/TFDS6500",
142 "Reserved",
143 "Reserved",
144 "HP HSDL-1100/HSDL-2100",
145 "HP HSDL-1100/HSDL-2100",
146 "Supports SIR Mode only",
147 "No dongle connected",
148};
149
ec4f32d5
JT		 150/* PNP probing */
151static chipio_t pnp_info;
152static const struct pnp_device_id nsc_ircc_pnp_table[] = {
153 { .id = "NSC6001", .driver_data = 0 },
02307080 154 { .id = "HWPC224", .driver_data = 0 },
1fa98174 155 { .id = "IBM0071", .driver_data = NSC_FORCE_DONGLE_TYPE9 },
ec4f32d5
JT		 156 { }
157};
158
159MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
160
161static struct pnp_driver nsc_ircc_pnp_driver = {
c17f888f 162#ifdef CONFIG_PNP
ec4f32d5
JT		 163 .name = "nsc-ircc",
164 .id_table = nsc_ircc_pnp_table,
165 .probe = nsc_ircc_pnp_probe,
c17f888f 166#endif
ec4f32d5
JT		 167};
168
1da177e4 169/* Some prototypes */
ec4f32d5 170static int nsc_ircc_open(chipio_t *info);
1da177e4
LT		 171static int nsc_ircc_close(struct nsc_ircc_cb *self);
172static int nsc_ircc_setup(chipio_t *info);
173static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
174static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
175static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
6518bbb8
SH		 176static netdev_tx_t nsc_ircc_hard_xmit_sir(struct sk_buff *skb,
177 struct net_device *dev);
178static netdev_tx_t nsc_ircc_hard_xmit_fir(struct sk_buff *skb,
179 struct net_device *dev);
1da177e4
LT		 180static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
181static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
182static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
183static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
184static int nsc_ircc_read_dongle_id (int iobase);
185static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
186
187static int nsc_ircc_net_open(struct net_device *dev);
188static int nsc_ircc_net_close(struct net_device *dev);
189static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
1da177e4 190
ec4f32d5
JT		 191/* Globals */
192static int pnp_registered;
193static int pnp_succeeded;
194
1da177e4
LT		 195/*
196 * Function nsc_ircc_init ()
197 *
198 * Initialize chip. Just try to find out how many chips we are dealing with
199 * and where they are
200 */
201static int __init nsc_ircc_init(void)
202{
203 chipio_t info;
204 nsc_chip_t *chip;
ec4f32d5 205 int ret;
1da177e4
LT		 206 int cfg_base;
207 int cfg, id;
208 int reg;
209 int i = 0;
210
3b99b93b
DT		 211 ret = platform_driver_register(&nsc_ircc_driver);
212 if (ret) {
213 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
214 return ret;
215 }
216
ec4f32d5
JT		 217 /* Register with PnP subsystem to detect disable ports */
218 ret = pnp_register_driver(&nsc_ircc_pnp_driver);
219
803d0abb 220 if (!ret)
ec4f32d5
JT		 221 pnp_registered = 1;
222
223 ret = -ENODEV;
224
1da177e4 225 /* Probe for all the NSC chipsets we know about */
ec4f32d5 226 for (chip = chips; chip->name ; chip++) {
a97a6f10 227 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__,
1da177e4
LT		 228 chip->name);
229
230 /* Try all config registers for this chip */
ec4f32d5 231 for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
1da177e4
LT		 232 cfg_base = chip->cfg[cfg];
233 if (!cfg_base)
234 continue;
1da177e4
LT		 235
236 /* Read index register */
237 reg = inb(cfg_base);
238 if (reg == 0xff) {
a97a6f10 239 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __func__, cfg_base);
1da177e4
LT		 240 continue;
241 }
242
243 /* Read chip identification register */
244 outb(chip->cid_index, cfg_base);
245 id = inb(cfg_base+1);
246 if ((id & chip->cid_mask) == chip->cid_value) {
247 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
a97a6f10 248 __func__, chip->name, id & ~chip->cid_mask);
ec4f32d5
JT		 249
250 /*
251 * If we found a correct PnP setting,
252 * we first try it.
253 */
254 if (pnp_succeeded) {
255 memset(&info, 0, sizeof(chipio_t));
256 info.cfg_base = cfg_base;
257 info.fir_base = pnp_info.fir_base;
258 info.dma = pnp_info.dma;
259 info.irq = pnp_info.irq;
260
261 if (info.fir_base < 0x2000) {
262 IRDA_MESSAGE("%s, chip->init\n", driver_name);
263 chip->init(chip, &info);
264 } else
265 chip->probe(chip, &info);
266
267 if (nsc_ircc_open(&info) >= 0)
268 ret = 0;
269 }
270
271 /*
272 * Opening based on PnP values failed.
273 * Let's fallback to user values, or probe
274 * the chip.
275 */
276 if (ret) {
277 IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
278 memset(&info, 0, sizeof(chipio_t));
279 info.cfg_base = cfg_base;
280 info.fir_base = io[i];
281 info.dma = dma[i];
282 info.irq = irq[i];
283
284 /*
285 * If the user supplies the base address, then
286 * we init the chip, if not we probe the values
287 * set by the BIOS
288 */
289 if (io[i] < 0x2000) {
290 chip->init(chip, &info);
291 } else
292 chip->probe(chip, &info);
293
294 if (nsc_ircc_open(&info) >= 0)
295 ret = 0;
296 }
1da177e4
LT		 297 i++;
298 } else {
a97a6f10 299 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __func__, id);
1da177e4
LT		 300 }
301 }
ec4f32d5
JT		 302 }
303
304 if (ret) {
3b99b93b 305 platform_driver_unregister(&nsc_ircc_driver);
ec4f32d5
JT		 306 pnp_unregister_driver(&nsc_ircc_pnp_driver);
307 pnp_registered = 0;
1da177e4
LT		 308 }
309
310 return ret;
311}
312
313/*
314 * Function nsc_ircc_cleanup ()
315 *
316 * Close all configured chips
317 *
318 */
319static void __exit nsc_ircc_cleanup(void)
320{
321 int i;
322
ec4f32d5 323 for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
1da177e4
LT		 324 if (dev_self[i])
325 nsc_ircc_close(dev_self[i]);
326 }
ec4f32d5 327
3b99b93b
DT		 328 platform_driver_unregister(&nsc_ircc_driver);
329
ec4f32d5
JT		 330 if (pnp_registered)
331 pnp_unregister_driver(&nsc_ircc_pnp_driver);
332
333 pnp_registered = 0;
1da177e4
LT		 334}
335
c279b8c9
SH		 336static const struct net_device_ops nsc_ircc_sir_ops = {
337 .ndo_open = nsc_ircc_net_open,
338 .ndo_stop = nsc_ircc_net_close,
339 .ndo_start_xmit = nsc_ircc_hard_xmit_sir,
340 .ndo_do_ioctl = nsc_ircc_net_ioctl,
341};
342
343static const struct net_device_ops nsc_ircc_fir_ops = {
344 .ndo_open = nsc_ircc_net_open,
345 .ndo_stop = nsc_ircc_net_close,
346 .ndo_start_xmit = nsc_ircc_hard_xmit_fir,
347 .ndo_do_ioctl = nsc_ircc_net_ioctl,
348};
349
1da177e4
LT		 350/*
351 * Function nsc_ircc_open (iobase, irq)
352 *
353 * Open driver instance
354 *
355 */
ec4f32d5 356static int __init nsc_ircc_open(chipio_t *info)
1da177e4
LT		 357{
358 struct net_device *dev;
359 struct nsc_ircc_cb *self;
1da177e4 360 void *ret;
ec4f32d5 361 int err, chip_index;
1da177e4 362
a97a6f10 363 IRDA_DEBUG(2, "%s()\n", __func__);
1da177e4 364
ec4f32d5
JT		 365
366 for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
367 if (!dev_self[chip_index])
368 break;
369 }
370
371 if (chip_index == ARRAY_SIZE(dev_self)) {
a97a6f10 372 IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __func__);
ec4f32d5
JT		 373 return -ENOMEM;
374 }
375
1da177e4
LT		 376 IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
377 info->cfg_base);
378
379 if ((nsc_ircc_setup(info)) == -1)
380 return -1;
381
382 IRDA_MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
383
384 dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
385 if (dev == NULL) {
386 IRDA_ERROR("%s(), can't allocate memory for "
a97a6f10 387 "control block!\n", __func__);
1da177e4
LT		 388 return -ENOMEM;
389 }
390
4cf1653a 391 self = netdev_priv(dev);
1da177e4
LT		 392 self->netdev = dev;
393 spin_lock_init(&self->lock);
394
395 /* Need to store self somewhere */
ec4f32d5
JT		 396 dev_self[chip_index] = self;
397 self->index = chip_index;
1da177e4
LT		 398
399 /* Initialize IO */
400 self->io.cfg_base = info->cfg_base;
401 self->io.fir_base = info->fir_base;
402 self->io.irq = info->irq;
403 self->io.fir_ext = CHIP_IO_EXTENT;
404 self->io.dma = info->dma;
405 self->io.fifo_size = 32;
406
407 /* Reserve the ioports that we need */
408 ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
409 if (!ret) {
410 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n",
a97a6f10 411 __func__, self->io.fir_base);
1da177e4
LT		 412 err = -ENODEV;
413 goto out1;
414 }
415
416 /* Initialize QoS for this device */
417 irda_init_max_qos_capabilies(&self->qos);
418
419 /* The only value we must override it the baudrate */
420 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
421 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
422
423 self->qos.min_turn_time.bits = qos_mtt_bits;
424 irda_qos_bits_to_value(&self->qos);
425
426 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
427 self->rx_buff.truesize = 14384;
428 self->tx_buff.truesize = 14384;
429
430 /* Allocate memory if needed */
431 self->rx_buff.head =
432 dma_alloc_coherent(NULL, self->rx_buff.truesize,
433 &self->rx_buff_dma, GFP_KERNEL);
434 if (self->rx_buff.head == NULL) {
435 err = -ENOMEM;
436 goto out2;
437
438 }
439 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
440
441 self->tx_buff.head =
442 dma_alloc_coherent(NULL, self->tx_buff.truesize,
443 &self->tx_buff_dma, GFP_KERNEL);
444 if (self->tx_buff.head == NULL) {
445 err = -ENOMEM;
446 goto out3;
447 }
448 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
449
450 self->rx_buff.in_frame = FALSE;
451 self->rx_buff.state = OUTSIDE_FRAME;
452 self->tx_buff.data = self->tx_buff.head;
453 self->rx_buff.data = self->rx_buff.head;
454
455 /* Reset Tx queue info */
456 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
457 self->tx_fifo.tail = self->tx_buff.head;
458
459 /* Override the network functions we need to use */
c279b8c9 460 dev->netdev_ops = &nsc_ircc_sir_ops;
1da177e4
LT		 461
462 err = register_netdev(dev);
463 if (err) {
a97a6f10 464 IRDA_ERROR("%s(), register_netdev() failed!\n", __func__);
1da177e4
LT		 465 goto out4;
466 }
467 IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
468
469 /* Check if user has supplied a valid dongle id or not */
470 if ((dongle_id <= 0) ||
ec4f32d5 471 (dongle_id >= ARRAY_SIZE(dongle_types))) {
1da177e4
LT		 472 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
473
474 IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name,
475 dongle_types[dongle_id]);
476 } else {
477 IRDA_MESSAGE("%s, Using dongle: %s\n", driver_name,
478 dongle_types[dongle_id]);
479 }
480
481 self->io.dongle_id = dongle_id;
482 nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
483
3b99b93b
DT		 484 self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME,
485 self->index, NULL, 0);
486 if (IS_ERR(self->pldev)) {
487 err = PTR_ERR(self->pldev);
488 goto out5;
489 }
490 platform_set_drvdata(self->pldev, self);
1da177e4 491
ec4f32d5 492 return chip_index;
3b99b93b
DT		 493
494 out5:
495 unregister_netdev(dev);
1da177e4
LT		 496 out4:
497 dma_free_coherent(NULL, self->tx_buff.truesize,
498 self->tx_buff.head, self->tx_buff_dma);
499 out3:
500 dma_free_coherent(NULL, self->rx_buff.truesize,
501 self->rx_buff.head, self->rx_buff_dma);
502 out2:
503 release_region(self->io.fir_base, self->io.fir_ext);
504 out1:
505 free_netdev(dev);
ec4f32d5 506 dev_self[chip_index] = NULL;
1da177e4
LT		 507 return err;
508}
509
510/*
511 * Function nsc_ircc_close (self)
512 *
513 * Close driver instance
514 *
515 */
516static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
517{
518 int iobase;
519
a97a6f10 520 IRDA_DEBUG(4, "%s()\n", __func__);
1da177e4
LT		 521
522 IRDA_ASSERT(self != NULL, return -1;);
523
524 iobase = self->io.fir_base;
525
3b99b93b
DT		 526 platform_device_unregister(self->pldev);
527
1da177e4
LT		 528 /* Remove netdevice */
529 unregister_netdev(self->netdev);
530
531 /* Release the PORT that this driver is using */
532 IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
a97a6f10 533 __func__, self->io.fir_base);
1da177e4
LT		 534 release_region(self->io.fir_base, self->io.fir_ext);
535
536 if (self->tx_buff.head)
537 dma_free_coherent(NULL, self->tx_buff.truesize,
538 self->tx_buff.head, self->tx_buff_dma);
539
540 if (self->rx_buff.head)
541 dma_free_coherent(NULL, self->rx_buff.truesize,
542 self->rx_buff.head, self->rx_buff_dma);
543
544 dev_self[self->index] = NULL;
545 free_netdev(self->netdev);
546
547 return 0;
548}
549
550/*
551 * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
552 *
553 * Initialize the NSC '108 chip
554 *
555 */
556static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
557{
558 int cfg_base = info->cfg_base;
559 __u8 temp=0;
560
561 outb(2, cfg_base); /* Mode Control Register (MCTL) */
562 outb(0x00, cfg_base+1); /* Disable device */
563
564 /* Base Address and Interrupt Control Register (BAIC) */
565 outb(CFG_108_BAIC, cfg_base);
566 switch (info->fir_base) {
567 case 0x3e8: outb(0x14, cfg_base+1); break;
568 case 0x2e8: outb(0x15, cfg_base+1); break;
569 case 0x3f8: outb(0x16, cfg_base+1); break;
570 case 0x2f8: outb(0x17, cfg_base+1); break;
a97a6f10 571 default: IRDA_ERROR("%s(), invalid base_address", __func__);
1da177e4
LT		 572 }
573
574 /* Control Signal Routing Register (CSRT) */
575 switch (info->irq) {
576 case 3: temp = 0x01; break;
577 case 4: temp = 0x02; break;
578 case 5: temp = 0x03; break;
579 case 7: temp = 0x04; break;
580 case 9: temp = 0x05; break;
581 case 11: temp = 0x06; break;
582 case 15: temp = 0x07; break;
a97a6f10 583 default: IRDA_ERROR("%s(), invalid irq", __func__);
1da177e4
LT		 584 }
585 outb(CFG_108_CSRT, cfg_base);
586
587 switch (info->dma) {
588 case 0: outb(0x08+temp, cfg_base+1); break;
589 case 1: outb(0x10+temp, cfg_base+1); break;
590 case 3: outb(0x18+temp, cfg_base+1); break;
a97a6f10 591 default: IRDA_ERROR("%s(), invalid dma", __func__);
1da177e4
LT		 592 }
593
594 outb(CFG_108_MCTL, cfg_base); /* Mode Control Register (MCTL) */
595 outb(0x03, cfg_base+1); /* Enable device */
596
597 return 0;
598}
599
600/*
601 * Function nsc_ircc_probe_108 (chip, info)
602 *
603 *
604 *
605 */
606static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
607{
608 int cfg_base = info->cfg_base;
609 int reg;
610
611 /* Read address and interrupt control register (BAIC) */
612 outb(CFG_108_BAIC, cfg_base);
613 reg = inb(cfg_base+1);
614
615 switch (reg & 0x03) {
616 case 0:
617 info->fir_base = 0x3e8;
618 break;
619 case 1:
620 info->fir_base = 0x2e8;
621 break;
622 case 2:
623 info->fir_base = 0x3f8;
624 break;
625 case 3:
626 info->fir_base = 0x2f8;
627 break;
628 }
629 info->sir_base = info->fir_base;
a97a6f10 630 IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__,
1da177e4
LT		 631 info->fir_base);
632
633 /* Read control signals routing register (CSRT) */
634 outb(CFG_108_CSRT, cfg_base);
635 reg = inb(cfg_base+1);
636
637 switch (reg & 0x07) {
638 case 0:
639 info->irq = -1;
640 break;
641 case 1:
642 info->irq = 3;
643 break;
644 case 2:
645 info->irq = 4;
646 break;
647 case 3:
648 info->irq = 5;
649 break;
650 case 4:
651 info->irq = 7;
652 break;
653 case 5:
654 info->irq = 9;
655 break;
656 case 6:
657 info->irq = 11;
658 break;
659 case 7:
660 info->irq = 15;
661 break;
662 }
a97a6f10 663 IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq);
1da177e4
LT		 664
665 /* Currently we only read Rx DMA but it will also be used for Tx */
666 switch ((reg >> 3) & 0x03) {
667 case 0:
668 info->dma = -1;
669 break;
670 case 1:
671 info->dma = 0;
672 break;
673 case 2:
674 info->dma = 1;
675 break;
676 case 3:
677 info->dma = 3;
678 break;
679 }
a97a6f10 680 IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma);
1da177e4
LT		 681
682 /* Read mode control register (MCTL) */
683 outb(CFG_108_MCTL, cfg_base);
684 reg = inb(cfg_base+1);
685
686 info->enabled = reg & 0x01;
687 info->suspended = !((reg >> 1) & 0x01);
688
689 return 0;
690}
691
692/*
693 * Function nsc_ircc_init_338 (chip, info)
694 *
695 * Initialize the NSC '338 chip. Remember that the 87338 needs two
696 * consecutive writes to the data registers while CPU interrupts are
697 * disabled. The 97338 does not require this, but shouldn't be any
698 * harm if we do it anyway.
699 */
700static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
701{
702 /* No init yet */
703
704 return 0;
705}
706
707/*
708 * Function nsc_ircc_probe_338 (chip, info)
709 *
710 *
711 *
712 */
713static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
714{
715 int cfg_base = info->cfg_base;
716 int reg, com = 0;
717 int pnp;
718
719 /* Read funtion enable register (FER) */
720 outb(CFG_338_FER, cfg_base);
721 reg = inb(cfg_base+1);
722
723 info->enabled = (reg >> 2) & 0x01;
724
725 /* Check if we are in Legacy or PnP mode */
726 outb(CFG_338_PNP0, cfg_base);
727 reg = inb(cfg_base+1);
728
729 pnp = (reg >> 3) & 0x01;
730 if (pnp) {
731 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
732 outb(0x46, cfg_base);
733 reg = (inb(cfg_base+1) & 0xfe) << 2;
734
735 outb(0x47, cfg_base);
736 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
737
738 info->fir_base = reg;
739 } else {
740 /* Read function address register (FAR) */
741 outb(CFG_338_FAR, cfg_base);
742 reg = inb(cfg_base+1);
743
744 switch ((reg >> 4) & 0x03) {
745 case 0:
746 info->fir_base = 0x3f8;
747 break;
748 case 1:
749 info->fir_base = 0x2f8;
750 break;
751 case 2:
752 com = 3;
753 break;
754 case 3:
755 com = 4;
756 break;
757 }
758
759 if (com) {
760 switch ((reg >> 6) & 0x03) {
761 case 0:
762 if (com == 3)
763 info->fir_base = 0x3e8;
764 else
765 info->fir_base = 0x2e8;
766 break;
767 case 1:
768 if (com == 3)
769 info->fir_base = 0x338;
770 else
771 info->fir_base = 0x238;
772 break;
773 case 2:
774 if (com == 3)
775 info->fir_base = 0x2e8;
776 else
777 info->fir_base = 0x2e0;
778 break;
779 case 3:
780 if (com == 3)
781 info->fir_base = 0x220;
782 else
783 info->fir_base = 0x228;
784 break;
785 }
786 }
787 }
788 info->sir_base = info->fir_base;
789
790 /* Read PnP register 1 (PNP1) */
791 outb(CFG_338_PNP1, cfg_base);
792 reg = inb(cfg_base+1);
793
794 info->irq = reg >> 4;
795
796 /* Read PnP register 3 (PNP3) */
797 outb(CFG_338_PNP3, cfg_base);
798 reg = inb(cfg_base+1);
799
800 info->dma = (reg & 0x07) - 1;
801
802 /* Read power and test register (PTR) */
803 outb(CFG_338_PTR, cfg_base);
804 reg = inb(cfg_base+1);
805
806 info->suspended = reg & 0x01;
807
808 return 0;
809}
810
811
812/*
813 * Function nsc_ircc_init_39x (chip, info)
814 *
815 * Now that we know it's a '39x (see probe below), we need to
816 * configure it so we can use it.
817 *
818 * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
819 * the configuration of the different functionality (serial, parallel,
820 * floppy...) are each in a different bank (Logical Device Number).
821 * The base address, irq and dma configuration registers are common
822 * to all functionalities (index 0x30 to 0x7F).
823 * There is only one configuration register specific to the
824 * serial port, CFG_39X_SPC.
825 * JeanII
826 *
827 * Note : this code was written by Jan Frey <janfrey@web.de>
828 */
829static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
830{
831 int cfg_base = info->cfg_base;
832 int enabled;
833
7f927fcc 834 /* User is sure about his config... accept it. */
1da177e4
LT		 835 IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
836 "io=0x%04x, irq=%d, dma=%d\n",
a97a6f10 837 __func__, info->fir_base, info->irq, info->dma);
1da177e4
LT		 838
839 /* Access bank for SP2 */
840 outb(CFG_39X_LDN, cfg_base);
841 outb(0x02, cfg_base+1);
842
843 /* Configure SP2 */
844
845 /* We want to enable the device if not enabled */
846 outb(CFG_39X_ACT, cfg_base);
847 enabled = inb(cfg_base+1) & 0x01;
848
849 if (!enabled) {
850 /* Enable the device */
851 outb(CFG_39X_SIOCF1, cfg_base);
852 outb(0x01, cfg_base+1);
853 /* May want to update info->enabled. Jean II */
854 }
855
856 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
857 * power mode (wake up from sleep mode) (bit 1) */
858 outb(CFG_39X_SPC, cfg_base);
859 outb(0x82, cfg_base+1);
860
861 return 0;
862}
863
864/*
865 * Function nsc_ircc_probe_39x (chip, info)
866 *
867 * Test if we really have a '39x chip at the given address
868 *
869 * Note : this code was written by Jan Frey <janfrey@web.de>
870 */
871static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
872{
873 int cfg_base = info->cfg_base;
874 int reg1, reg2, irq, irqt, dma1, dma2;
875 int enabled, susp;
876
877 IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
a97a6f10 878 __func__, cfg_base);
1da177e4
LT		 879
880 /* This function should be executed with irq off to avoid
881 * another driver messing with the Super I/O bank - Jean II */
882
883 /* Access bank for SP2 */
884 outb(CFG_39X_LDN, cfg_base);
885 outb(0x02, cfg_base+1);
886
887 /* Read infos about SP2 ; store in info struct */
888 outb(CFG_39X_BASEH, cfg_base);
889 reg1 = inb(cfg_base+1);
890 outb(CFG_39X_BASEL, cfg_base);
891 reg2 = inb(cfg_base+1);
892 info->fir_base = (reg1 << 8) | reg2;
893
894 outb(CFG_39X_IRQNUM, cfg_base);
895 irq = inb(cfg_base+1);
896 outb(CFG_39X_IRQSEL, cfg_base);
897 irqt = inb(cfg_base+1);
898 info->irq = irq;
899
900 outb(CFG_39X_DMA0, cfg_base);
901 dma1 = inb(cfg_base+1);
902 outb(CFG_39X_DMA1, cfg_base);
903 dma2 = inb(cfg_base+1);
904 info->dma = dma1 -1;
905
906 outb(CFG_39X_ACT, cfg_base);
907 info->enabled = enabled = inb(cfg_base+1) & 0x01;
908
909 outb(CFG_39X_SPC, cfg_base);
910 susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
911
a97a6f10 912 IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __func__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
1da177e4
LT		 913
914 /* Configure SP2 */
915
916 /* We want to enable the device if not enabled */
917 outb(CFG_39X_ACT, cfg_base);
918 enabled = inb(cfg_base+1) & 0x01;
919
920 if (!enabled) {
921 /* Enable the device */
922 outb(CFG_39X_SIOCF1, cfg_base);
923 outb(0x01, cfg_base+1);
924 /* May want to update info->enabled. Jean II */
925 }
926
927 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
928 * power mode (wake up from sleep mode) (bit 1) */
929 outb(CFG_39X_SPC, cfg_base);
930 outb(0x82, cfg_base+1);
931
932 return 0;
933}
934
c17f888f 935#ifdef CONFIG_PNP
ec4f32d5
JT		 936/* PNP probing */
937static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
938{
939 memset(&pnp_info, 0, sizeof(chipio_t));
940 pnp_info.irq = -1;
941 pnp_info.dma = -1;
942 pnp_succeeded = 1;
943
1fa98174
MG		 944 if (id->driver_data & NSC_FORCE_DONGLE_TYPE9)
945 dongle_id = 0x9;
946
947 /* There doesn't seem to be any way of getting the cfg_base.
ec4f32d5
JT		 948 * On my box, cfg_base is in the PnP descriptor of the
949 * motherboard. Oh well... Jean II */
950
951 if (pnp_port_valid(dev, 0) &&
952 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
953 pnp_info.fir_base = pnp_port_start(dev, 0);
954
955 if (pnp_irq_valid(dev, 0) &&
956 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
957 pnp_info.irq = pnp_irq(dev, 0);
958
959 if (pnp_dma_valid(dev, 0) &&
960 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
961 pnp_info.dma = pnp_dma(dev, 0);
962
963 IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
a97a6f10 964 __func__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
ec4f32d5
JT		 965
966 if((pnp_info.fir_base == 0) ||
967 (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
968 /* Returning an error will disable the device. Yuck ! */
969 //return -EINVAL;
970 pnp_succeeded = 0;
971 }
972
973 return 0;
974}
c17f888f 975#endif
ec4f32d5 976
1da177e4
LT		 977/*
978 * Function nsc_ircc_setup (info)
979 *
980 * Returns non-negative on success.
981 *
982 */
983static int nsc_ircc_setup(chipio_t *info)
984{
985 int version;
986 int iobase = info->fir_base;
987
988 /* Read the Module ID */
989 switch_bank(iobase, BANK3);
990 version = inb(iobase+MID);
991
992 IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
a97a6f10 993 __func__, driver_name, version);
1da177e4
LT		 994
995 /* Should be 0x2? */
996 if (0x20 != (version & 0xf0)) {
997 IRDA_ERROR("%s, Wrong chip version %02x\n",
998 driver_name, version);
999 return -1;
1000 }
1001
1002 /* Switch to advanced mode */
1003 switch_bank(iobase, BANK2);
1004 outb(ECR1_EXT_SL, iobase+ECR1);
1005 switch_bank(iobase, BANK0);
1006
1007 /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
1008 switch_bank(iobase, BANK0);
1009 outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1010
1011 outb(0x03, iobase+LCR); /* 8 bit word length */
1012 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/
1013
1014 /* Set FIFO size to 32 */
1015 switch_bank(iobase, BANK2);
1016 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1017
1018 /* IRCR2: FEND_MD is not set */
1019 switch_bank(iobase, BANK5);
1020 outb(0x02, iobase+4);
1021
1022 /* Make sure that some defaults are OK */
1023 switch_bank(iobase, BANK6);
1024 outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
1025 outb(0x0a, iobase+1); /* Set MIR pulse width */
1026 outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
1027 outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
1028
1029 /* Enable receive interrupts */
1030 switch_bank(iobase, BANK0);
1031 outb(IER_RXHDL_IE, iobase+IER);
1032
1033 return 0;
1034}
1035
1036/*
1037 * Function nsc_ircc_read_dongle_id (void)
1038 *
1039 * Try to read dongle indentification. This procedure needs to be executed
1040 * once after power-on/reset. It also needs to be used whenever you suspect
1041 * that the user may have plugged/unplugged the IrDA Dongle.
1042 */
1043static int nsc_ircc_read_dongle_id (int iobase)
1044{
1045 int dongle_id;
1046 __u8 bank;
1047
1048 bank = inb(iobase+BSR);
1049
1050 /* Select Bank 7 */
1051 switch_bank(iobase, BANK7);
1052
1053 /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
1054 outb(0x00, iobase+7);
1055
1056 /* ID0, 1, and 2 are pulled up/down very slowly */
1057 udelay(50);
1058
1059 /* IRCFG1: read the ID bits */
1060 dongle_id = inb(iobase+4) & 0x0f;
1061
1062#ifdef BROKEN_DONGLE_ID
1063 if (dongle_id == 0x0a)
1064 dongle_id = 0x09;
1065#endif
1066 /* Go back to bank 0 before returning */
1067 switch_bank(iobase, BANK0);
1068
1069 outb(bank, iobase+BSR);
1070
1071 return dongle_id;
1072}
1073
1074/*
1075 * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
1076 *
1077 * This function initializes the dongle for the transceiver that is
1078 * used. This procedure needs to be executed once after
1079 * power-on/reset. It also needs to be used whenever you suspect that
1080 * the dongle is changed.
1081 */
1082static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
1083{
1084 int bank;
1085
1086 /* Save current bank */
1087 bank = inb(iobase+BSR);
1088
1089 /* Select Bank 7 */
1090 switch_bank(iobase, BANK7);
1091
1092 /* IRCFG4: set according to dongle_id */
1093 switch (dongle_id) {
1094 case 0x00: /* same as */
1095 case 0x01: /* Differential serial interface */
1096 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1097 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1098 break;
1099 case 0x02: /* same as */
1100 case 0x03: /* Reserved */
1101 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1102 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1103 break;
1104 case 0x04: /* Sharp RY5HD01 */
1105 break;
1106 case 0x05: /* Reserved, but this is what the Thinkpad reports */
1107 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1108 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1109 break;
1110 case 0x06: /* Single-ended serial interface */
1111 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1112 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1113 break;
1114 case 0x07: /* Consumer-IR only */
1115 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
a97a6f10 1116 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1117 break;
1118 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1119 IRDA_DEBUG(0, "%s(), %s\n",
a97a6f10 1120 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1121 break;
1122 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1123 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1124 break;
1125 case 0x0A: /* same as */
1126 case 0x0B: /* Reserved */
1127 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1128 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1129 break;
1130 case 0x0C: /* same as */
1131 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1132 /*
1133 * Set irsl0 as input, irsl[1-2] as output, and separate
1134 * inputs are used for SIR and MIR/FIR
1135 */
1136 outb(0x48, iobase+7);
1137 break;
1138 case 0x0E: /* Supports SIR Mode only */
1139 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1140 break;
1141 case 0x0F: /* No dongle connected */
1142 IRDA_DEBUG(0, "%s(), %s\n",
a97a6f10 1143 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1144
1145 switch_bank(iobase, BANK0);
1146 outb(0x62, iobase+MCR);
1147 break;
1148 default:
1149 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
a97a6f10 1150 __func__, dongle_id);
1da177e4
LT		 1151 }
1152
1153 /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
1154 outb(0x00, iobase+4);
1155
1156 /* Restore bank register */
1157 outb(bank, iobase+BSR);
1158
1159} /* set_up_dongle_interface */
1160
1161/*
1162 * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
1163 *
1164 * Change speed of the attach dongle
1165 *
1166 */
1167static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1168{
1169 __u8 bank;
1170
1171 /* Save current bank */
1172 bank = inb(iobase+BSR);
1173
1174 /* Select Bank 7 */
1175 switch_bank(iobase, BANK7);
1176
1177 /* IRCFG1: set according to dongle_id */
1178 switch (dongle_id) {
1179 case 0x00: /* same as */
1180 case 0x01: /* Differential serial interface */
1181 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1182 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1183 break;
1184 case 0x02: /* same as */
1185 case 0x03: /* Reserved */
1186 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1187 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1188 break;
1189 case 0x04: /* Sharp RY5HD01 */
1190 break;
1191 case 0x05: /* Reserved */
1192 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1193 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1194 break;
1195 case 0x06: /* Single-ended serial interface */
1196 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1197 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1198 break;
1199 case 0x07: /* Consumer-IR only */
1200 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
a97a6f10 1201 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1202 break;
1203 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1204 IRDA_DEBUG(0, "%s(), %s\n",
a97a6f10 1205 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1206 outb(0x00, iobase+4);
1207 if (speed > 115200)
1208 outb(0x01, iobase+4);
1209 break;
1210 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1211 outb(0x01, iobase+4);
1212
1213 if (speed == 4000000) {
1214 /* There was a cli() there, but we now are already
1215 * under spin_lock_irqsave() - JeanII */
1216 outb(0x81, iobase+4);
1217 outb(0x80, iobase+4);
1218 } else
1219 outb(0x00, iobase+4);
1220 break;
1221 case 0x0A: /* same as */
1222 case 0x0B: /* Reserved */
1223 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1224 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1225 break;
1226 case 0x0C: /* same as */
1227 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1228 break;
1229 case 0x0E: /* Supports SIR Mode only */
1230 break;
1231 case 0x0F: /* No dongle connected */
1232 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
a97a6f10 1233 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1234
1235 switch_bank(iobase, BANK0);
1236 outb(0x62, iobase+MCR);
1237 break;
1238 default:
a97a6f10 1239 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __func__);
1da177e4
LT		 1240 }
1241 /* Restore bank register */
1242 outb(bank, iobase+BSR);
1243}
1244
1245/*
1246 * Function nsc_ircc_change_speed (self, baud)
1247 *
1248 * Change the speed of the device
1249 *
1250 * This function *must* be called with irq off and spin-lock.
1251 */
1252static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1253{
1254 struct net_device *dev = self->netdev;
1255 __u8 mcr = MCR_SIR;
1256 int iobase;
1257 __u8 bank;
1258 __u8 ier; /* Interrupt enable register */
1259
a97a6f10 1260 IRDA_DEBUG(2, "%s(), speed=%d\n", __func__, speed);
1da177e4
LT		 1261
1262 IRDA_ASSERT(self != NULL, return 0;);
1263
1264 iobase = self->io.fir_base;
1265
1266 /* Update accounting for new speed */
1267 self->io.speed = speed;
1268
1269 /* Save current bank */
1270 bank = inb(iobase+BSR);
1271
1272 /* Disable interrupts */
1273 switch_bank(iobase, BANK0);
1274 outb(0, iobase+IER);
1275
1276 /* Select Bank 2 */
1277 switch_bank(iobase, BANK2);
1278
1279 outb(0x00, iobase+BGDH);
1280 switch (speed) {
1281 case 9600: outb(0x0c, iobase+BGDL); break;
1282 case 19200: outb(0x06, iobase+BGDL); break;
1283 case 38400: outb(0x03, iobase+BGDL); break;
1284 case 57600: outb(0x02, iobase+BGDL); break;
1285 case 115200: outb(0x01, iobase+BGDL); break;
1286 case 576000:
1287 switch_bank(iobase, BANK5);
1288
1289 /* IRCR2: MDRS is set */
1290 outb(inb(iobase+4) | 0x04, iobase+4);
1291
1292 mcr = MCR_MIR;
a97a6f10 1293 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __func__);
1da177e4
LT		 1294 break;
1295 case 1152000:
1296 mcr = MCR_MIR;
a97a6f10 1297 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __func__);
1da177e4
LT		 1298 break;
1299 case 4000000:
1300 mcr = MCR_FIR;
a97a6f10 1301 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __func__);
1da177e4
LT		 1302 break;
1303 default:
1304 mcr = MCR_FIR;
1305 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
a97a6f10 1306 __func__, speed);
1da177e4
LT		 1307 break;
1308 }
1309
1310 /* Set appropriate speed mode */
1311 switch_bank(iobase, BANK0);
1312 outb(mcr | MCR_TX_DFR, iobase+MCR);
1313
1314 /* Give some hits to the transceiver */
1315 nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1316
1317 /* Set FIFO threshold to TX17, RX16 */
1318 switch_bank(iobase, BANK0);
1319 outb(0x00, iobase+FCR);
1320 outb(FCR_FIFO_EN, iobase+FCR);
1321 outb(FCR_RXTH| /* Set Rx FIFO threshold */
1322 FCR_TXTH| /* Set Tx FIFO threshold */
1323 FCR_TXSR| /* Reset Tx FIFO */
1324 FCR_RXSR| /* Reset Rx FIFO */
1325 FCR_FIFO_EN, /* Enable FIFOs */
1326 iobase+FCR);
1327
1328 /* Set FIFO size to 32 */
1329 switch_bank(iobase, BANK2);
1330 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1331
1332 /* Enable some interrupts so we can receive frames */
1333 switch_bank(iobase, BANK0);
1334 if (speed > 115200) {
1335 /* Install FIR xmit handler */
c279b8c9 1336 dev->netdev_ops = &nsc_ircc_fir_ops;
1da177e4
LT		 1337 ier = IER_SFIF_IE;
1338 nsc_ircc_dma_receive(self);
1339 } else {
1340 /* Install SIR xmit handler */
c279b8c9 1341 dev->netdev_ops = &nsc_ircc_sir_ops;
1da177e4
LT		 1342 ier = IER_RXHDL_IE;
1343 }
1344 /* Set our current interrupt mask */
1345 outb(ier, iobase+IER);
1346
1347 /* Restore BSR */
1348 outb(bank, iobase+BSR);
1349
1350 /* Make sure interrupt handlers keep the proper interrupt mask */
1351 return(ier);
1352}
1353
1354/*
1355 * Function nsc_ircc_hard_xmit (skb, dev)
1356 *
1357 * Transmit the frame!
1358 *
1359 */
6518bbb8
SH		 1360static netdev_tx_t nsc_ircc_hard_xmit_sir(struct sk_buff *skb,
1361 struct net_device *dev)
1da177e4
LT		 1362{
1363 struct nsc_ircc_cb *self;
1364 unsigned long flags;
1365 int iobase;
1366 __s32 speed;
1367 __u8 bank;
1368
4cf1653a 1369 self = netdev_priv(dev);
1da177e4 1370
ec634fe3 1371 IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;);
1da177e4
LT		 1372
1373 iobase = self->io.fir_base;
1374
1375 netif_stop_queue(dev);
1376
1377 /* Make sure tests *& speed change are atomic */
1378 spin_lock_irqsave(&self->lock, flags);
1379
1380 /* Check if we need to change the speed */
1381 speed = irda_get_next_speed(skb);
1382 if ((speed != self->io.speed) && (speed != -1)) {
1383 /* Check for empty frame. */
1384 if (!skb->len) {
1385 /* If we just sent a frame, we get called before
1386 * the last bytes get out (because of the SIR FIFO).
1387 * If this is the case, let interrupt handler change
1388 * the speed itself... Jean II */
1389 if (self->io.direction == IO_RECV) {
1390 nsc_ircc_change_speed(self, speed);
1391 /* TODO : For SIR->SIR, the next packet
1392 * may get corrupted - Jean II */
1393 netif_wake_queue(dev);
1394 } else {
1395 self->new_speed = speed;
1396 /* Queue will be restarted after speed change
1397 * to make sure packets gets through the
1398 * proper xmit handler - Jean II */
1399 }
1400 dev->trans_start = jiffies;
1401 spin_unlock_irqrestore(&self->lock, flags);
1402 dev_kfree_skb(skb);
6ed10654 1403 return NETDEV_TX_OK;
1da177e4
LT		 1404 } else
1405 self->new_speed = speed;
1406 }
1407
1408 /* Save current bank */
1409 bank = inb(iobase+BSR);
1410
1411 self->tx_buff.data = self->tx_buff.head;
1412
1413 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1414 self->tx_buff.truesize);
1415
af049081 1416 dev->stats.tx_bytes += self->tx_buff.len;
1da177e4
LT		 1417
1418 /* Add interrupt on tx low level (will fire immediately) */
1419 switch_bank(iobase, BANK0);
1420 outb(IER_TXLDL_IE, iobase+IER);
1421
1422 /* Restore bank register */
1423 outb(bank, iobase+BSR);
1424
1425 dev->trans_start = jiffies;
1426 spin_unlock_irqrestore(&self->lock, flags);
1427
1428 dev_kfree_skb(skb);
1429
6ed10654 1430 return NETDEV_TX_OK;
1da177e4
LT		 1431}
1432
6518bbb8
SH		 1433static netdev_tx_t nsc_ircc_hard_xmit_fir(struct sk_buff *skb,
1434 struct net_device *dev)
1da177e4
LT		 1435{
1436 struct nsc_ircc_cb *self;
1437 unsigned long flags;
1438 int iobase;
1439 __s32 speed;
1440 __u8 bank;
1441 int mtt, diff;
1442
4cf1653a 1443 self = netdev_priv(dev);
1da177e4
LT		 1444 iobase = self->io.fir_base;
1445
1446 netif_stop_queue(dev);
1447
1448 /* Make sure tests *& speed change are atomic */
1449 spin_lock_irqsave(&self->lock, flags);
1450
1451 /* Check if we need to change the speed */
1452 speed = irda_get_next_speed(skb);
1453 if ((speed != self->io.speed) && (speed != -1)) {
1454 /* Check for empty frame. */
1455 if (!skb->len) {
1456 /* If we are currently transmitting, defer to
1457 * interrupt handler. - Jean II */
1458 if(self->tx_fifo.len == 0) {
1459 nsc_ircc_change_speed(self, speed);
1460 netif_wake_queue(dev);
1461 } else {
1462 self->new_speed = speed;
1463 /* Keep queue stopped :
1464 * the speed change operation may change the
1465 * xmit handler, and we want to make sure
1466 * the next packet get through the proper
1467 * Tx path, so block the Tx queue until
1468 * the speed change has been done.
1469 * Jean II */
1470 }
1471 dev->trans_start = jiffies;
1472 spin_unlock_irqrestore(&self->lock, flags);
1473 dev_kfree_skb(skb);
6ed10654 1474 return NETDEV_TX_OK;
1da177e4
LT		 1475 } else {
1476 /* Change speed after current frame */
1477 self->new_speed = speed;
1478 }
1479 }
1480
1481 /* Save current bank */
1482 bank = inb(iobase+BSR);
1483
1484 /* Register and copy this frame to DMA memory */
1485 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1486 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1487 self->tx_fifo.tail += skb->len;
1488
af049081 1489 dev->stats.tx_bytes += skb->len;
1da177e4 1490
d626f62b
ACM		 1491 skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start,
1492 skb->len);
1da177e4
LT		 1493 self->tx_fifo.len++;
1494 self->tx_fifo.free++;
1495
1496 /* Start transmit only if there is currently no transmit going on */
1497 if (self->tx_fifo.len == 1) {
1498 /* Check if we must wait the min turn time or not */
1499 mtt = irda_get_mtt(skb);
1500 if (mtt) {
1501 /* Check how much time we have used already */
1502 do_gettimeofday(&self->now);
1503 diff = self->now.tv_usec - self->stamp.tv_usec;
1504 if (diff < 0)
1505 diff += 1000000;
1506
1507 /* Check if the mtt is larger than the time we have
1508 * already used by all the protocol processing
1509 */
1510 if (mtt > diff) {
1511 mtt -= diff;
1512
1513 /*
1514 * Use timer if delay larger than 125 us, and
1515 * use udelay for smaller values which should
1516 * be acceptable
1517 */
1518 if (mtt > 125) {
1519 /* Adjust for timer resolution */
1520 mtt = mtt / 125;
1521
1522 /* Setup timer */
1523 switch_bank(iobase, BANK4);
1524 outb(mtt & 0xff, iobase+TMRL);
1525 outb((mtt >> 8) & 0x0f, iobase+TMRH);
1526
1527 /* Start timer */
1528 outb(IRCR1_TMR_EN, iobase+IRCR1);
1529 self->io.direction = IO_XMIT;
1530
1531 /* Enable timer interrupt */
1532 switch_bank(iobase, BANK0);
1533 outb(IER_TMR_IE, iobase+IER);
1534
1535 /* Timer will take care of the rest */
1536 goto out;
1537 } else
1538 udelay(mtt);
1539 }
1540 }
1541 /* Enable DMA interrupt */
1542 switch_bank(iobase, BANK0);
1543 outb(IER_DMA_IE, iobase+IER);
1544
1545 /* Transmit frame */
1546 nsc_ircc_dma_xmit(self, iobase);
1547 }
1548 out:
1549 /* Not busy transmitting anymore if window is not full,
1550 * and if we don't need to change speed */
1551 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1552 netif_wake_queue(self->netdev);
1553
1554 /* Restore bank register */
1555 outb(bank, iobase+BSR);
1556
1557 dev->trans_start = jiffies;
1558 spin_unlock_irqrestore(&self->lock, flags);
1559 dev_kfree_skb(skb);
1560
6ed10654 1561 return NETDEV_TX_OK;
1da177e4
LT		 1562}
1563
1564/*
1565 * Function nsc_ircc_dma_xmit (self, iobase)
1566 *
1567 * Transmit data using DMA
1568 *
1569 */
1570static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1571{
1572 int bsr;
1573
1574 /* Save current bank */
1575 bsr = inb(iobase+BSR);
1576
1577 /* Disable DMA */
1578 switch_bank(iobase, BANK0);
1579 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1580
1581 self->io.direction = IO_XMIT;
1582
1583 /* Choose transmit DMA channel */
1584 switch_bank(iobase, BANK2);
1585 outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1586
1587 irda_setup_dma(self->io.dma,
1588 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1589 self->tx_buff.head) + self->tx_buff_dma,
1590 self->tx_fifo.queue[self->tx_fifo.ptr].len,
1591 DMA_TX_MODE);
1592
1593 /* Enable DMA and SIR interaction pulse */
1594 switch_bank(iobase, BANK0);
1595 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1596
1597 /* Restore bank register */
1598 outb(bsr, iobase+BSR);
1599}
1600
1601/*
1602 * Function nsc_ircc_pio_xmit (self, iobase)
1603 *
1604 * Transmit data using PIO. Returns the number of bytes that actually
1605 * got transferred
1606 *
1607 */
1608static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1609{
1610 int actual = 0;
1611 __u8 bank;
1612
a97a6f10 1613 IRDA_DEBUG(4, "%s()\n", __func__);
1da177e4
LT		 1614
1615 /* Save current bank */
1616 bank = inb(iobase+BSR);
1617
1618 switch_bank(iobase, BANK0);
1619 if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1620 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
a97a6f10 1621 __func__);
1da177e4
LT		 1622
1623 /* FIFO may still be filled to the Tx interrupt threshold */
1624 fifo_size -= 17;
1625 }
1626
1627 /* Fill FIFO with current frame */
1628 while ((fifo_size-- > 0) && (actual < len)) {
1629 /* Transmit next byte */
1630 outb(buf[actual++], iobase+TXD);
1631 }
1632
1633 IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
a97a6f10 1634 __func__, fifo_size, actual, len);
1da177e4
LT		 1635
1636 /* Restore bank */
1637 outb(bank, iobase+BSR);
1638
1639 return actual;
1640}
1641
1642/*
1643 * Function nsc_ircc_dma_xmit_complete (self)
1644 *
1645 * The transfer of a frame in finished. This function will only be called
1646 * by the interrupt handler
1647 *
1648 */
1649static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1650{
1651 int iobase;
1652 __u8 bank;
1653 int ret = TRUE;
1654
a97a6f10 1655 IRDA_DEBUG(2, "%s()\n", __func__);
1da177e4
LT		 1656
1657 iobase = self->io.fir_base;
1658
1659 /* Save current bank */
1660 bank = inb(iobase+BSR);
1661
1662 /* Disable DMA */
1663 switch_bank(iobase, BANK0);
1664 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1665
1666 /* Check for underrrun! */
1667 if (inb(iobase+ASCR) & ASCR_TXUR) {
af049081
SH		 1668 self->netdev->stats.tx_errors++;
1669 self->netdev->stats.tx_fifo_errors++;
1da177e4
LT		 1670
1671 /* Clear bit, by writing 1 into it */
1672 outb(ASCR_TXUR, iobase+ASCR);
1673 } else {
af049081 1674 self->netdev->stats.tx_packets++;
1da177e4
LT		 1675 }
1676
1677 /* Finished with this frame, so prepare for next */
1678 self->tx_fifo.ptr++;
1679 self->tx_fifo.len--;
1680
1681 /* Any frames to be sent back-to-back? */
1682 if (self->tx_fifo.len) {
1683 nsc_ircc_dma_xmit(self, iobase);
1684
1685 /* Not finished yet! */
1686 ret = FALSE;
1687 } else {
1688 /* Reset Tx FIFO info */
1689 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1690 self->tx_fifo.tail = self->tx_buff.head;
1691 }
1692
1693 /* Make sure we have room for more frames and
1694 * that we don't need to change speed */
1695 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1696 /* Not busy transmitting anymore */
1697 /* Tell the network layer, that we can accept more frames */
1698 netif_wake_queue(self->netdev);
1699 }
1700
1701 /* Restore bank */
1702 outb(bank, iobase+BSR);
1703
1704 return ret;
1705}
1706
1707/*
1708 * Function nsc_ircc_dma_receive (self)
1709 *
1710 * Get ready for receiving a frame. The device will initiate a DMA
1711 * if it starts to receive a frame.
1712 *
1713 */
1714static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1715{
1716 int iobase;
1717 __u8 bsr;
1718
1719 iobase = self->io.fir_base;
1720
1721 /* Reset Tx FIFO info */
1722 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1723 self->tx_fifo.tail = self->tx_buff.head;
1724
1725 /* Save current bank */
1726 bsr = inb(iobase+BSR);
1727
1728 /* Disable DMA */
1729 switch_bank(iobase, BANK0);
1730 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1731
1732 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1733 switch_bank(iobase, BANK2);
1734 outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1735
1736 self->io.direction = IO_RECV;
1737 self->rx_buff.data = self->rx_buff.head;
1738
1739 /* Reset Rx FIFO. This will also flush the ST_FIFO */
1740 switch_bank(iobase, BANK0);
1741 outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1742
1743 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1744 self->st_fifo.tail = self->st_fifo.head = 0;
1745
1746 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1747 DMA_RX_MODE);
1748
1749 /* Enable DMA */
1750 switch_bank(iobase, BANK0);
1751 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1752
1753 /* Restore bank register */
1754 outb(bsr, iobase+BSR);
1755
1756 return 0;
1757}
1758
1759/*
1760 * Function nsc_ircc_dma_receive_complete (self)
1761 *
1762 * Finished with receiving frames
1763 *
1764 *
1765 */
1766static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1767{
1768 struct st_fifo *st_fifo;
1769 struct sk_buff *skb;
1770 __u8 status;
1771 __u8 bank;
1772 int len;
1773
1774 st_fifo = &self->st_fifo;
1775
1776 /* Save current bank */
1777 bank = inb(iobase+BSR);
1778
1779 /* Read all entries in status FIFO */
1780 switch_bank(iobase, BANK5);
1781 while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1782 /* We must empty the status FIFO no matter what */
1783 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1784
1785 if (st_fifo->tail >= MAX_RX_WINDOW) {
a97a6f10 1786 IRDA_DEBUG(0, "%s(), window is full!\n", __func__);
1da177e4
LT		 1787 continue;
1788 }
1789
1790 st_fifo->entries[st_fifo->tail].status = status;
1791 st_fifo->entries[st_fifo->tail].len = len;
1792 st_fifo->pending_bytes += len;
1793 st_fifo->tail++;
1794 st_fifo->len++;
1795 }
1796 /* Try to process all entries in status FIFO */
1797 while (st_fifo->len > 0) {
1798 /* Get first entry */
1799 status = st_fifo->entries[st_fifo->head].status;
1800 len = st_fifo->entries[st_fifo->head].len;
1801 st_fifo->pending_bytes -= len;
1802 st_fifo->head++;
1803 st_fifo->len--;
1804
1805 /* Check for errors */
1806 if (status & FRM_ST_ERR_MSK) {
1807 if (status & FRM_ST_LOST_FR) {
1808 /* Add number of lost frames to stats */
af049081 1809 self->netdev->stats.rx_errors += len;
1da177e4
LT		 1810 } else {
1811 /* Skip frame */
af049081 1812 self->netdev->stats.rx_errors++;
1da177e4
LT		 1813
1814 self->rx_buff.data += len;
1815
1816 if (status & FRM_ST_MAX_LEN)
af049081 1817 self->netdev->stats.rx_length_errors++;
1da177e4
LT		 1818
1819 if (status & FRM_ST_PHY_ERR)
af049081 1820 self->netdev->stats.rx_frame_errors++;
1da177e4
LT		 1821
1822 if (status & FRM_ST_BAD_CRC)
af049081 1823 self->netdev->stats.rx_crc_errors++;
1da177e4
LT		 1824 }
1825 /* The errors below can be reported in both cases */
1826 if (status & FRM_ST_OVR1)
af049081 1827 self->netdev->stats.rx_fifo_errors++;
1da177e4
LT		 1828
1829 if (status & FRM_ST_OVR2)
af049081 1830 self->netdev->stats.rx_fifo_errors++;
1da177e4
LT		 1831 } else {
1832 /*
1833 * First we must make sure that the frame we
1834 * want to deliver is all in main memory. If we
1835 * cannot tell, then we check if the Rx FIFO is
1836 * empty. If not then we will have to take a nap
1837 * and try again later.
1838 */
1839 if (st_fifo->pending_bytes < self->io.fifo_size) {
1840 switch_bank(iobase, BANK0);
1841 if (inb(iobase+LSR) & LSR_RXDA) {
1842 /* Put this entry back in fifo */
1843 st_fifo->head--;
1844 st_fifo->len++;
1845 st_fifo->pending_bytes += len;
1846 st_fifo->entries[st_fifo->head].status = status;
1847 st_fifo->entries[st_fifo->head].len = len;
1848 /*
1849 * DMA not finished yet, so try again
1850 * later, set timer value, resolution
1851 * 125 us
1852 */
1853 switch_bank(iobase, BANK4);
1854 outb(0x02, iobase+TMRL); /* x 125 us */
1855 outb(0x00, iobase+TMRH);
1856
1857 /* Start timer */
1858 outb(IRCR1_TMR_EN, iobase+IRCR1);
1859
1860 /* Restore bank register */
1861 outb(bank, iobase+BSR);
1862
1863 return FALSE; /* I'll be back! */
1864 }
1865 }
1866
1867 /*
1868 * Remember the time we received this frame, so we can
1869 * reduce the min turn time a bit since we will know
1870 * how much time we have used for protocol processing
1871 */
1872 do_gettimeofday(&self->stamp);
1873
1874 skb = dev_alloc_skb(len+1);
1875 if (skb == NULL) {
1876 IRDA_WARNING("%s(), memory squeeze, "
1877 "dropping frame.\n",
a97a6f10 1878 __func__);
af049081 1879 self->netdev->stats.rx_dropped++;
1da177e4
LT		 1880
1881 /* Restore bank register */
1882 outb(bank, iobase+BSR);
1883
1884 return FALSE;
1885 }
1886
1887 /* Make sure IP header gets aligned */
1888 skb_reserve(skb, 1);
1889
1890 /* Copy frame without CRC */
1891 if (self->io.speed < 4000000) {
1892 skb_put(skb, len-2);
27d7ff46
ACM		 1893 skb_copy_to_linear_data(skb,
1894 self->rx_buff.data,
1895 len - 2);
1da177e4
LT		 1896 } else {
1897 skb_put(skb, len-4);
27d7ff46
ACM		 1898 skb_copy_to_linear_data(skb,
1899 self->rx_buff.data,
1900 len - 4);
1da177e4
LT		 1901 }
1902
1903 /* Move to next frame */
1904 self->rx_buff.data += len;
af049081
SH		 1905 self->netdev->stats.rx_bytes += len;
1906 self->netdev->stats.rx_packets++;
1da177e4
LT		 1907
1908 skb->dev = self->netdev;
459a98ed 1909 skb_reset_mac_header(skb);
1da177e4
LT		 1910 skb->protocol = htons(ETH_P_IRDA);
1911 netif_rx(skb);
1da177e4
LT		 1912 }
1913 }
1914 /* Restore bank register */
1915 outb(bank, iobase+BSR);
1916
1917 return TRUE;
1918}
1919
1920/*
1921 * Function nsc_ircc_pio_receive (self)
1922 *
1923 * Receive all data in receiver FIFO
1924 *
1925 */
1926static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1927{
1928 __u8 byte;
1929 int iobase;
1930
1931 iobase = self->io.fir_base;
1932
1933 /* Receive all characters in Rx FIFO */
1934 do {
1935 byte = inb(iobase+RXD);
af049081
SH		 1936 async_unwrap_char(self->netdev, &self->netdev->stats,
1937 &self->rx_buff, byte);
1da177e4
LT		 1938 } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1939}
1940
1941/*
1942 * Function nsc_ircc_sir_interrupt (self, eir)
1943 *
1944 * Handle SIR interrupt
1945 *
1946 */
1947static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1948{
1949 int actual;
1950
1951 /* Check if transmit FIFO is low on data */
1952 if (eir & EIR_TXLDL_EV) {
1953 /* Write data left in transmit buffer */
1954 actual = nsc_ircc_pio_write(self->io.fir_base,
1955 self->tx_buff.data,
1956 self->tx_buff.len,
1957 self->io.fifo_size);
1958 self->tx_buff.data += actual;
1959 self->tx_buff.len -= actual;
1960
1961 self->io.direction = IO_XMIT;
1962
1963 /* Check if finished */
1964 if (self->tx_buff.len > 0)
1965 self->ier = IER_TXLDL_IE;
1966 else {
1967
af049081 1968 self->netdev->stats.tx_packets++;
1da177e4
LT		 1969 netif_wake_queue(self->netdev);
1970 self->ier = IER_TXEMP_IE;
1971 }
1972
1973 }
1974 /* Check if transmission has completed */
1975 if (eir & EIR_TXEMP_EV) {
1976 /* Turn around and get ready to receive some data */
1977 self->io.direction = IO_RECV;
1978 self->ier = IER_RXHDL_IE;
1979 /* Check if we need to change the speed?
1980 * Need to be after self->io.direction to avoid race with
1981 * nsc_ircc_hard_xmit_sir() - Jean II */
1982 if (self->new_speed) {
a97a6f10 1983 IRDA_DEBUG(2, "%s(), Changing speed!\n", __func__);
1da177e4
LT		 1984 self->ier = nsc_ircc_change_speed(self,
1985 self->new_speed);
1986 self->new_speed = 0;
1987 netif_wake_queue(self->netdev);
1988
1989 /* Check if we are going to FIR */
1990 if (self->io.speed > 115200) {
1991 /* No need to do anymore SIR stuff */
1992 return;
1993 }
1994 }
1995 }
1996
1997 /* Rx FIFO threshold or timeout */
1998 if (eir & EIR_RXHDL_EV) {
1999 nsc_ircc_pio_receive(self);
2000
2001 /* Keep receiving */
2002 self->ier = IER_RXHDL_IE;
2003 }
2004}
2005
2006/*
2007 * Function nsc_ircc_fir_interrupt (self, eir)
2008 *
2009 * Handle MIR/FIR interrupt
2010 *
2011 */
2012static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
2013 int eir)
2014{
2015 __u8 bank;
2016
2017 bank = inb(iobase+BSR);
2018
2019 /* Status FIFO event*/
2020 if (eir & EIR_SFIF_EV) {
2021 /* Check if DMA has finished */
2022 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2023 /* Wait for next status FIFO interrupt */
2024 self->ier = IER_SFIF_IE;
2025 } else {
2026 self->ier = IER_SFIF_IE | IER_TMR_IE;
2027 }
2028 } else if (eir & EIR_TMR_EV) { /* Timer finished */
2029 /* Disable timer */
2030 switch_bank(iobase, BANK4);
2031 outb(0, iobase+IRCR1);
2032
2033 /* Clear timer event */
2034 switch_bank(iobase, BANK0);
2035 outb(ASCR_CTE, iobase+ASCR);
2036
2037 /* Check if this is a Tx timer interrupt */
2038 if (self->io.direction == IO_XMIT) {
2039 nsc_ircc_dma_xmit(self, iobase);
2040
2041 /* Interrupt on DMA */
2042 self->ier = IER_DMA_IE;
2043 } else {
2044 /* Check (again) if DMA has finished */
2045 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2046 self->ier = IER_SFIF_IE;
2047 } else {
2048 self->ier = IER_SFIF_IE | IER_TMR_IE;
2049 }
2050 }
2051 } else if (eir & EIR_DMA_EV) {
2052 /* Finished with all transmissions? */
2053 if (nsc_ircc_dma_xmit_complete(self)) {
2054 if(self->new_speed != 0) {
2055 /* As we stop the Tx queue, the speed change
2056 * need to be done when the Tx fifo is
2057 * empty. Ask for a Tx done interrupt */
2058 self->ier = IER_TXEMP_IE;
2059 } else {
2060 /* Check if there are more frames to be
2061 * transmitted */
2062 if (irda_device_txqueue_empty(self->netdev)) {
2063 /* Prepare for receive */
2064 nsc_ircc_dma_receive(self);
2065 self->ier = IER_SFIF_IE;
2066 } else
2067 IRDA_WARNING("%s(), potential "
2068 "Tx queue lockup !\n",
a97a6f10 2069 __func__);
1da177e4
LT		 2070 }
2071 } else {
2072 /* Not finished yet, so interrupt on DMA again */
2073 self->ier = IER_DMA_IE;
2074 }
2075 } else if (eir & EIR_TXEMP_EV) {
2076 /* The Tx FIFO has totally drained out, so now we can change
2077 * the speed... - Jean II */
2078 self->ier = nsc_ircc_change_speed(self, self->new_speed);
2079 self->new_speed = 0;
2080 netif_wake_queue(self->netdev);
2081 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
2082 }
2083
2084 outb(bank, iobase+BSR);
2085}
2086
2087/*
2088 * Function nsc_ircc_interrupt (irq, dev_id, regs)
2089 *
2090 * An interrupt from the chip has arrived. Time to do some work
2091 *
2092 */
7d12e780 2093static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id)
1da177e4 2094{
c31f28e7 2095 struct net_device *dev = dev_id;
1da177e4
LT		 2096 struct nsc_ircc_cb *self;
2097 __u8 bsr, eir;
2098 int iobase;
2099
4cf1653a 2100 self = netdev_priv(dev);
1da177e4
LT		 2101
2102 spin_lock(&self->lock);
2103
2104 iobase = self->io.fir_base;
2105
2106 bsr = inb(iobase+BSR); /* Save current bank */
2107
2108 switch_bank(iobase, BANK0);
2109 self->ier = inb(iobase+IER);
2110 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
2111
2112 outb(0, iobase+IER); /* Disable interrupts */
2113
2114 if (eir) {
2115 /* Dispatch interrupt handler for the current speed */
2116 if (self->io.speed > 115200)
2117 nsc_ircc_fir_interrupt(self, iobase, eir);
2118 else
2119 nsc_ircc_sir_interrupt(self, eir);
2120 }
2121
2122 outb(self->ier, iobase+IER); /* Restore interrupts */
2123 outb(bsr, iobase+BSR); /* Restore bank register */
2124
2125 spin_unlock(&self->lock);
2126 return IRQ_RETVAL(eir);
2127}
2128
2129/*
2130 * Function nsc_ircc_is_receiving (self)
2131 *
2132 * Return TRUE is we are currently receiving a frame
2133 *
2134 */
2135static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
2136{
2137 unsigned long flags;
2138 int status = FALSE;
2139 int iobase;
2140 __u8 bank;
2141
2142 IRDA_ASSERT(self != NULL, return FALSE;);
2143
2144 spin_lock_irqsave(&self->lock, flags);
2145
2146 if (self->io.speed > 115200) {
2147 iobase = self->io.fir_base;
2148
2149 /* Check if rx FIFO is not empty */
2150 bank = inb(iobase+BSR);
2151 switch_bank(iobase, BANK2);
2152 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
2153 /* We are receiving something */
2154 status = TRUE;
2155 }
2156 outb(bank, iobase+BSR);
2157 } else
2158 status = (self->rx_buff.state != OUTSIDE_FRAME);
2159
2160 spin_unlock_irqrestore(&self->lock, flags);
2161
2162 return status;
2163}
2164
2165/*
2166 * Function nsc_ircc_net_open (dev)
2167 *
2168 * Start the device
2169 *
2170 */
2171static int nsc_ircc_net_open(struct net_device *dev)
2172{
2173 struct nsc_ircc_cb *self;
2174 int iobase;
2175 char hwname[32];
2176 __u8 bank;
2177
a97a6f10 2178 IRDA_DEBUG(4, "%s()\n", __func__);
1da177e4
LT		 2179
2180 IRDA_ASSERT(dev != NULL, return -1;);
4cf1653a 2181 self = netdev_priv(dev);
1da177e4
LT		 2182
2183 IRDA_ASSERT(self != NULL, return 0;);
2184
2185 iobase = self->io.fir_base;
2186
2187 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2188 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2189 driver_name, self->io.irq);
2190 return -EAGAIN;
2191 }
2192 /*
2193 * Always allocate the DMA channel after the IRQ, and clean up on
2194 * failure.
2195 */
2196 if (request_dma(self->io.dma, dev->name)) {
2197 IRDA_WARNING("%s, unable to allocate dma=%d\n",
2198 driver_name, self->io.dma);
2199 free_irq(self->io.irq, dev);
2200 return -EAGAIN;
2201 }
2202
2203 /* Save current bank */
2204 bank = inb(iobase+BSR);
2205
2206 /* turn on interrupts */
2207 switch_bank(iobase, BANK0);
2208 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2209
2210 /* Restore bank register */
2211 outb(bank, iobase+BSR);
2212
2213 /* Ready to play! */
2214 netif_start_queue(dev);
2215
2216 /* Give self a hardware name */
2217 sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2218
2219 /*
2220 * Open new IrLAP layer instance, now that everything should be
2221 * initialized properly
2222 */
2223 self->irlap = irlap_open(dev, &self->qos, hwname);
2224
2225 return 0;
2226}
2227
2228/*
2229 * Function nsc_ircc_net_close (dev)
2230 *
2231 * Stop the device
2232 *
2233 */
2234static int nsc_ircc_net_close(struct net_device *dev)
2235{
2236 struct nsc_ircc_cb *self;
2237 int iobase;
2238 __u8 bank;
2239
a97a6f10 2240 IRDA_DEBUG(4, "%s()\n", __func__);
1da177e4
LT		 2241
2242 IRDA_ASSERT(dev != NULL, return -1;);
2243
4cf1653a 2244 self = netdev_priv(dev);
1da177e4
LT		 2245 IRDA_ASSERT(self != NULL, return 0;);
2246
2247 /* Stop device */
2248 netif_stop_queue(dev);
2249
2250 /* Stop and remove instance of IrLAP */
2251 if (self->irlap)
2252 irlap_close(self->irlap);
2253 self->irlap = NULL;
2254
2255 iobase = self->io.fir_base;
2256
2257 disable_dma(self->io.dma);
2258
2259 /* Save current bank */
2260 bank = inb(iobase+BSR);
2261
2262 /* Disable interrupts */
2263 switch_bank(iobase, BANK0);
2264 outb(0, iobase+IER);
2265
2266 free_irq(self->io.irq, dev);
2267 free_dma(self->io.dma);
2268
2269 /* Restore bank register */
2270 outb(bank, iobase+BSR);
2271
2272 return 0;
2273}
2274
2275/*
2276 * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2277 *
2278 * Process IOCTL commands for this device
2279 *
2280 */
2281static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2282{
2283 struct if_irda_req *irq = (struct if_irda_req *) rq;
2284 struct nsc_ircc_cb *self;
2285 unsigned long flags;
2286 int ret = 0;
2287
2288 IRDA_ASSERT(dev != NULL, return -1;);
2289
4cf1653a 2290 self = netdev_priv(dev);
1da177e4
LT		 2291
2292 IRDA_ASSERT(self != NULL, return -1;);
2293
a97a6f10 2294 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name, cmd);
1da177e4
LT		 2295
2296 switch (cmd) {
2297 case SIOCSBANDWIDTH: /* Set bandwidth */
2298 if (!capable(CAP_NET_ADMIN)) {
2299 ret = -EPERM;
2300 break;
2301 }
2302 spin_lock_irqsave(&self->lock, flags);
2303 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2304 spin_unlock_irqrestore(&self->lock, flags);
2305 break;
2306 case SIOCSMEDIABUSY: /* Set media busy */
2307 if (!capable(CAP_NET_ADMIN)) {
2308 ret = -EPERM;
2309 break;
2310 }
2311 irda_device_set_media_busy(self->netdev, TRUE);
2312 break;
2313 case SIOCGRECEIVING: /* Check if we are receiving right now */
2314 /* This is already protected */
2315 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2316 break;
2317 default:
2318 ret = -EOPNOTSUPP;
2319 }
2320 return ret;
2321}
2322
3b99b93b 2323static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 2324{
3b99b93b
DT		 2325 struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2326 int bank;
2327 unsigned long flags;
2328 int iobase = self->io.fir_base;
1da177e4
LT		 2329
2330 if (self->io.suspended)
3b99b93b 2331 return 0;
1da177e4 2332
3b99b93b 2333 IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
1da177e4 2334
3b99b93b
DT		 2335 rtnl_lock();
2336 if (netif_running(self->netdev)) {
2337 netif_device_detach(self->netdev);
2338 spin_lock_irqsave(&self->lock, flags);
2339 /* Save current bank */
2340 bank = inb(iobase+BSR);
2341
2342 /* Disable interrupts */
2343 switch_bank(iobase, BANK0);
2344 outb(0, iobase+IER);
2345
2346 /* Restore bank register */
2347 outb(bank, iobase+BSR);
2348
2349 spin_unlock_irqrestore(&self->lock, flags);
2350 free_irq(self->io.irq, self->netdev);
2351 disable_dma(self->io.dma);
2352 }
1da177e4 2353 self->io.suspended = 1;
3b99b93b
DT		 2354 rtnl_unlock();
2355
2356 return 0;
1da177e4
LT		 2357}
2358
3b99b93b 2359static int nsc_ircc_resume(struct platform_device *dev)
1da177e4 2360{
3b99b93b
DT		 2361 struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2362 unsigned long flags;
2363
1da177e4 2364 if (!self->io.suspended)
3b99b93b 2365 return 0;
1da177e4 2366
3b99b93b
DT		 2367 IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
2368
2369 rtnl_lock();
1da177e4 2370 nsc_ircc_setup(&self->io);
3b99b93b 2371 nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id);
1da177e4 2372
3b99b93b
DT		 2373 if (netif_running(self->netdev)) {
2374 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0,
2375 self->netdev->name, self->netdev)) {
2376 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2377 driver_name, self->io.irq);
2378
2379 /*
2380 * Don't fail resume process, just kill this
2381 * network interface
2382 */
2383 unregister_netdevice(self->netdev);
2384 } else {
2385 spin_lock_irqsave(&self->lock, flags);
2386 nsc_ircc_change_speed(self, self->io.speed);
2387 spin_unlock_irqrestore(&self->lock, flags);
2388 netif_device_attach(self->netdev);
2389 }
2390
2391 } else {
2392 spin_lock_irqsave(&self->lock, flags);
2393 nsc_ircc_change_speed(self, 9600);
2394 spin_unlock_irqrestore(&self->lock, flags);
2395 }
1da177e4 2396 self->io.suspended = 0;
3b99b93b 2397 rtnl_unlock();
1da177e4 2398
3b99b93b 2399 return 0;
1da177e4
LT		 2400}
2401
2402MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2403MODULE_DESCRIPTION("NSC IrDA Device Driver");
2404MODULE_LICENSE("GPL");
2405
2406
2407module_param(qos_mtt_bits, int, 0);
2408MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2409module_param_array(io, int, NULL, 0);
2410MODULE_PARM_DESC(io, "Base I/O addresses");
2411module_param_array(irq, int, NULL, 0);
2412MODULE_PARM_DESC(irq, "IRQ lines");
2413module_param_array(dma, int, NULL, 0);
2414MODULE_PARM_DESC(dma, "DMA channels");
2415module_param(dongle_id, int, 0);
2416MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2417
2418module_init(nsc_ircc_init);
2419module_exit(nsc_ircc_cleanup);
2420
Clone of davem's net-next-2.6 tree