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48257c4f PA |
1 | /* |
2 | * Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx. | |
3 | * | |
4 | * Copyright (c) 2003 Intracom S.A. | |
5 | * by Pantelis Antoniou <panto@intracom.gr> | |
6 | * | |
7 | * 2005 (c) MontaVista Software, Inc. | |
8 | * Vitaly Bordug <vbordug@ru.mvista.com> | |
9 | * | |
10 | * This file is licensed under the terms of the GNU General Public License | |
11 | * version 2. This program is licensed "as is" without any warranty of any | |
12 | * kind, whether express or implied. | |
13 | */ | |
14 | ||
48257c4f PA |
15 | #include <linux/module.h> |
16 | #include <linux/kernel.h> | |
17 | #include <linux/types.h> | |
48257c4f PA |
18 | #include <linux/string.h> |
19 | #include <linux/ptrace.h> | |
20 | #include <linux/errno.h> | |
21 | #include <linux/ioport.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/interrupt.h> | |
48257c4f PA |
24 | #include <linux/init.h> |
25 | #include <linux/delay.h> | |
26 | #include <linux/netdevice.h> | |
27 | #include <linux/etherdevice.h> | |
28 | #include <linux/skbuff.h> | |
29 | #include <linux/spinlock.h> | |
30 | #include <linux/mii.h> | |
31 | #include <linux/ethtool.h> | |
32 | #include <linux/bitops.h> | |
33 | #include <linux/fs.h> | |
f7b99969 | 34 | #include <linux/platform_device.h> |
48257c4f PA |
35 | |
36 | #include <asm/irq.h> | |
37 | #include <asm/uaccess.h> | |
38 | ||
39 | #ifdef CONFIG_8xx | |
40 | #include <asm/8xx_immap.h> | |
41 | #include <asm/pgtable.h> | |
42 | #include <asm/mpc8xx.h> | |
43 | #include <asm/commproc.h> | |
44 | #endif | |
45 | ||
46 | #include "fs_enet.h" | |
47 | ||
48 | /*************************************************/ | |
49 | ||
50 | #if defined(CONFIG_CPM1) | |
51 | /* for a 8xx __raw_xxx's are sufficient */ | |
52 | #define __fs_out32(addr, x) __raw_writel(x, addr) | |
53 | #define __fs_out16(addr, x) __raw_writew(x, addr) | |
54 | #define __fs_out8(addr, x) __raw_writeb(x, addr) | |
55 | #define __fs_in32(addr) __raw_readl(addr) | |
56 | #define __fs_in16(addr) __raw_readw(addr) | |
57 | #define __fs_in8(addr) __raw_readb(addr) | |
58 | #else | |
59 | /* for others play it safe */ | |
60 | #define __fs_out32(addr, x) out_be32(addr, x) | |
61 | #define __fs_out16(addr, x) out_be16(addr, x) | |
62 | #define __fs_in32(addr) in_be32(addr) | |
63 | #define __fs_in16(addr) in_be16(addr) | |
64 | #endif | |
65 | ||
66 | /* write, read, set bits, clear bits */ | |
67 | #define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v)) | |
68 | #define R32(_p, _m) __fs_in32(&(_p)->_m) | |
69 | #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v)) | |
70 | #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v)) | |
71 | ||
72 | #define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v)) | |
73 | #define R16(_p, _m) __fs_in16(&(_p)->_m) | |
74 | #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v)) | |
75 | #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v)) | |
76 | ||
77 | #define W8(_p, _m, _v) __fs_out8(&(_p)->_m, (_v)) | |
78 | #define R8(_p, _m) __fs_in8(&(_p)->_m) | |
79 | #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v)) | |
80 | #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v)) | |
81 | ||
82 | #define SCC_MAX_MULTICAST_ADDRS 64 | |
83 | ||
84 | /* | |
85 | * Delay to wait for SCC reset command to complete (in us) | |
86 | */ | |
87 | #define SCC_RESET_DELAY 50 | |
88 | #define MAX_CR_CMD_LOOPS 10000 | |
89 | ||
90 | static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op) | |
91 | { | |
92 | cpm8xx_t *cpmp = &((immap_t *)fs_enet_immap)->im_cpm; | |
93 | u32 v, ch; | |
94 | int i = 0; | |
95 | ||
96 | ch = fep->scc.idx << 2; | |
97 | v = mk_cr_cmd(ch, op); | |
98 | W16(cpmp, cp_cpcr, v | CPM_CR_FLG); | |
99 | for (i = 0; i < MAX_CR_CMD_LOOPS; i++) | |
100 | if ((R16(cpmp, cp_cpcr) & CPM_CR_FLG) == 0) | |
101 | break; | |
102 | ||
103 | if (i >= MAX_CR_CMD_LOOPS) { | |
104 | printk(KERN_ERR "%s(): Not able to issue CPM command\n", | |
105 | __FUNCTION__); | |
106 | return 1; | |
107 | } | |
108 | return 0; | |
109 | } | |
110 | ||
111 | static int do_pd_setup(struct fs_enet_private *fep) | |
112 | { | |
113 | struct platform_device *pdev = to_platform_device(fep->dev); | |
114 | struct resource *r; | |
115 | ||
116 | /* Fill out IRQ field */ | |
117 | fep->interrupt = platform_get_irq_byname(pdev, "interrupt"); | |
48944738 DV |
118 | if (fep->interrupt < 0) |
119 | return -EINVAL; | |
48257c4f PA |
120 | |
121 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); | |
b1f54ba3 | 122 | fep->scc.sccp = ioremap(r->start, r->end - r->start + 1); |
48257c4f PA |
123 | |
124 | if (fep->scc.sccp == NULL) | |
125 | return -EINVAL; | |
126 | ||
127 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram"); | |
b1f54ba3 | 128 | fep->scc.ep = ioremap(r->start, r->end - r->start + 1); |
48257c4f PA |
129 | |
130 | if (fep->scc.ep == NULL) | |
131 | return -EINVAL; | |
132 | ||
133 | return 0; | |
134 | } | |
135 | ||
136 | #define SCC_NAPI_RX_EVENT_MSK (SCCE_ENET_RXF | SCCE_ENET_RXB) | |
137 | #define SCC_RX_EVENT (SCCE_ENET_RXF) | |
138 | #define SCC_TX_EVENT (SCCE_ENET_TXB) | |
139 | #define SCC_ERR_EVENT_MSK (SCCE_ENET_TXE | SCCE_ENET_BSY) | |
140 | ||
141 | static int setup_data(struct net_device *dev) | |
142 | { | |
143 | struct fs_enet_private *fep = netdev_priv(dev); | |
144 | const struct fs_platform_info *fpi = fep->fpi; | |
145 | ||
146 | fep->scc.idx = fs_get_scc_index(fpi->fs_no); | |
147 | if ((unsigned int)fep->fcc.idx > 4) /* max 4 SCCs */ | |
148 | return -EINVAL; | |
149 | ||
150 | do_pd_setup(fep); | |
151 | ||
152 | fep->scc.hthi = 0; | |
153 | fep->scc.htlo = 0; | |
154 | ||
155 | fep->ev_napi_rx = SCC_NAPI_RX_EVENT_MSK; | |
156 | fep->ev_rx = SCC_RX_EVENT; | |
157 | fep->ev_tx = SCC_TX_EVENT; | |
158 | fep->ev_err = SCC_ERR_EVENT_MSK; | |
159 | ||
160 | return 0; | |
161 | } | |
162 | ||
163 | static int allocate_bd(struct net_device *dev) | |
164 | { | |
165 | struct fs_enet_private *fep = netdev_priv(dev); | |
166 | const struct fs_platform_info *fpi = fep->fpi; | |
167 | ||
168 | fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) * | |
169 | sizeof(cbd_t), 8); | |
4c35630c | 170 | if (IS_ERR_VALUE(fep->ring_mem_addr)) |
48257c4f PA |
171 | return -ENOMEM; |
172 | ||
173 | fep->ring_base = cpm_dpram_addr(fep->ring_mem_addr); | |
174 | ||
175 | return 0; | |
176 | } | |
177 | ||
178 | static void free_bd(struct net_device *dev) | |
179 | { | |
180 | struct fs_enet_private *fep = netdev_priv(dev); | |
181 | ||
182 | if (fep->ring_base) | |
183 | cpm_dpfree(fep->ring_mem_addr); | |
184 | } | |
185 | ||
186 | static void cleanup_data(struct net_device *dev) | |
187 | { | |
188 | /* nothing */ | |
189 | } | |
190 | ||
191 | static void set_promiscuous_mode(struct net_device *dev) | |
192 | { | |
193 | struct fs_enet_private *fep = netdev_priv(dev); | |
194 | scc_t *sccp = fep->scc.sccp; | |
195 | ||
196 | S16(sccp, scc_psmr, SCC_PSMR_PRO); | |
197 | } | |
198 | ||
199 | static void set_multicast_start(struct net_device *dev) | |
200 | { | |
201 | struct fs_enet_private *fep = netdev_priv(dev); | |
202 | scc_enet_t *ep = fep->scc.ep; | |
203 | ||
204 | W16(ep, sen_gaddr1, 0); | |
205 | W16(ep, sen_gaddr2, 0); | |
206 | W16(ep, sen_gaddr3, 0); | |
207 | W16(ep, sen_gaddr4, 0); | |
208 | } | |
209 | ||
210 | static void set_multicast_one(struct net_device *dev, const u8 * mac) | |
211 | { | |
212 | struct fs_enet_private *fep = netdev_priv(dev); | |
213 | scc_enet_t *ep = fep->scc.ep; | |
214 | u16 taddrh, taddrm, taddrl; | |
215 | ||
216 | taddrh = ((u16) mac[5] << 8) | mac[4]; | |
217 | taddrm = ((u16) mac[3] << 8) | mac[2]; | |
218 | taddrl = ((u16) mac[1] << 8) | mac[0]; | |
219 | ||
220 | W16(ep, sen_taddrh, taddrh); | |
221 | W16(ep, sen_taddrm, taddrm); | |
222 | W16(ep, sen_taddrl, taddrl); | |
223 | scc_cr_cmd(fep, CPM_CR_SET_GADDR); | |
224 | } | |
225 | ||
226 | static void set_multicast_finish(struct net_device *dev) | |
227 | { | |
228 | struct fs_enet_private *fep = netdev_priv(dev); | |
229 | scc_t *sccp = fep->scc.sccp; | |
230 | scc_enet_t *ep = fep->scc.ep; | |
231 | ||
232 | /* clear promiscuous always */ | |
233 | C16(sccp, scc_psmr, SCC_PSMR_PRO); | |
234 | ||
235 | /* if all multi or too many multicasts; just enable all */ | |
236 | if ((dev->flags & IFF_ALLMULTI) != 0 || | |
237 | dev->mc_count > SCC_MAX_MULTICAST_ADDRS) { | |
238 | ||
239 | W16(ep, sen_gaddr1, 0xffff); | |
240 | W16(ep, sen_gaddr2, 0xffff); | |
241 | W16(ep, sen_gaddr3, 0xffff); | |
242 | W16(ep, sen_gaddr4, 0xffff); | |
243 | } | |
244 | } | |
245 | ||
246 | static void set_multicast_list(struct net_device *dev) | |
247 | { | |
248 | struct dev_mc_list *pmc; | |
249 | ||
250 | if ((dev->flags & IFF_PROMISC) == 0) { | |
251 | set_multicast_start(dev); | |
252 | for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next) | |
253 | set_multicast_one(dev, pmc->dmi_addr); | |
254 | set_multicast_finish(dev); | |
255 | } else | |
256 | set_promiscuous_mode(dev); | |
257 | } | |
258 | ||
259 | /* | |
260 | * This function is called to start or restart the FEC during a link | |
261 | * change. This only happens when switching between half and full | |
262 | * duplex. | |
263 | */ | |
264 | static void restart(struct net_device *dev) | |
265 | { | |
266 | struct fs_enet_private *fep = netdev_priv(dev); | |
267 | scc_t *sccp = fep->scc.sccp; | |
268 | scc_enet_t *ep = fep->scc.ep; | |
269 | const struct fs_platform_info *fpi = fep->fpi; | |
270 | u16 paddrh, paddrm, paddrl; | |
271 | const unsigned char *mac; | |
272 | int i; | |
273 | ||
274 | C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
275 | ||
276 | /* clear everything (slow & steady does it) */ | |
277 | for (i = 0; i < sizeof(*ep); i++) | |
278 | __fs_out8((char *)ep + i, 0); | |
279 | ||
280 | /* point to bds */ | |
281 | W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr); | |
282 | W16(ep, sen_genscc.scc_tbase, | |
283 | fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring); | |
284 | ||
285 | /* Initialize function code registers for big-endian. | |
286 | */ | |
287 | W8(ep, sen_genscc.scc_rfcr, SCC_EB); | |
288 | W8(ep, sen_genscc.scc_tfcr, SCC_EB); | |
289 | ||
290 | /* Set maximum bytes per receive buffer. | |
291 | * This appears to be an Ethernet frame size, not the buffer | |
292 | * fragment size. It must be a multiple of four. | |
293 | */ | |
294 | W16(ep, sen_genscc.scc_mrblr, 0x5f0); | |
295 | ||
296 | /* Set CRC preset and mask. | |
297 | */ | |
298 | W32(ep, sen_cpres, 0xffffffff); | |
299 | W32(ep, sen_cmask, 0xdebb20e3); | |
300 | ||
301 | W32(ep, sen_crcec, 0); /* CRC Error counter */ | |
302 | W32(ep, sen_alec, 0); /* alignment error counter */ | |
303 | W32(ep, sen_disfc, 0); /* discard frame counter */ | |
304 | ||
305 | W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */ | |
306 | W16(ep, sen_retlim, 15); /* Retry limit threshold */ | |
307 | ||
308 | W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */ | |
309 | ||
310 | W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */ | |
311 | ||
312 | W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */ | |
313 | W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */ | |
314 | ||
315 | /* Clear hash tables. | |
316 | */ | |
317 | W16(ep, sen_gaddr1, 0); | |
318 | W16(ep, sen_gaddr2, 0); | |
319 | W16(ep, sen_gaddr3, 0); | |
320 | W16(ep, sen_gaddr4, 0); | |
321 | W16(ep, sen_iaddr1, 0); | |
322 | W16(ep, sen_iaddr2, 0); | |
323 | W16(ep, sen_iaddr3, 0); | |
324 | W16(ep, sen_iaddr4, 0); | |
325 | ||
326 | /* set address | |
327 | */ | |
328 | mac = dev->dev_addr; | |
329 | paddrh = ((u16) mac[5] << 8) | mac[4]; | |
330 | paddrm = ((u16) mac[3] << 8) | mac[2]; | |
331 | paddrl = ((u16) mac[1] << 8) | mac[0]; | |
332 | ||
333 | W16(ep, sen_paddrh, paddrh); | |
334 | W16(ep, sen_paddrm, paddrm); | |
335 | W16(ep, sen_paddrl, paddrl); | |
336 | ||
337 | W16(ep, sen_pper, 0); | |
338 | W16(ep, sen_taddrl, 0); | |
339 | W16(ep, sen_taddrm, 0); | |
340 | W16(ep, sen_taddrh, 0); | |
341 | ||
342 | fs_init_bds(dev); | |
343 | ||
344 | scc_cr_cmd(fep, CPM_CR_INIT_TRX); | |
345 | ||
346 | W16(sccp, scc_scce, 0xffff); | |
347 | ||
348 | /* Enable interrupts we wish to service. | |
349 | */ | |
350 | W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB); | |
351 | ||
352 | /* Set GSMR_H to enable all normal operating modes. | |
353 | * Set GSMR_L to enable Ethernet to MC68160. | |
354 | */ | |
355 | W32(sccp, scc_gsmrh, 0); | |
356 | W32(sccp, scc_gsmrl, | |
357 | SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | | |
358 | SCC_GSMRL_MODE_ENET); | |
359 | ||
360 | /* Set sync/delimiters. | |
361 | */ | |
362 | W16(sccp, scc_dsr, 0xd555); | |
363 | ||
364 | /* Set processing mode. Use Ethernet CRC, catch broadcast, and | |
365 | * start frame search 22 bit times after RENA. | |
366 | */ | |
367 | W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22); | |
368 | ||
369 | /* Set full duplex mode if needed */ | |
5b4b8454 | 370 | if (fep->phydev->duplex) |
48257c4f PA |
371 | S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE); |
372 | ||
373 | S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
374 | } | |
375 | ||
376 | static void stop(struct net_device *dev) | |
377 | { | |
378 | struct fs_enet_private *fep = netdev_priv(dev); | |
379 | scc_t *sccp = fep->scc.sccp; | |
380 | int i; | |
381 | ||
382 | for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++) | |
383 | udelay(1); | |
384 | ||
385 | if (i == SCC_RESET_DELAY) | |
386 | printk(KERN_WARNING DRV_MODULE_NAME | |
387 | ": %s SCC timeout on graceful transmit stop\n", | |
388 | dev->name); | |
389 | ||
390 | W16(sccp, scc_sccm, 0); | |
391 | C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
392 | ||
393 | fs_cleanup_bds(dev); | |
394 | } | |
395 | ||
396 | static void pre_request_irq(struct net_device *dev, int irq) | |
397 | { | |
b1f54ba3 | 398 | #ifndef CONFIG_PPC_MERGE |
48257c4f PA |
399 | immap_t *immap = fs_enet_immap; |
400 | u32 siel; | |
401 | ||
402 | /* SIU interrupt */ | |
403 | if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) { | |
404 | ||
405 | siel = in_be32(&immap->im_siu_conf.sc_siel); | |
406 | if ((irq & 1) == 0) | |
407 | siel |= (0x80000000 >> irq); | |
408 | else | |
409 | siel &= ~(0x80000000 >> (irq & ~1)); | |
410 | out_be32(&immap->im_siu_conf.sc_siel, siel); | |
411 | } | |
b1f54ba3 | 412 | #endif |
48257c4f PA |
413 | } |
414 | ||
415 | static void post_free_irq(struct net_device *dev, int irq) | |
416 | { | |
417 | /* nothing */ | |
418 | } | |
419 | ||
420 | static void napi_clear_rx_event(struct net_device *dev) | |
421 | { | |
422 | struct fs_enet_private *fep = netdev_priv(dev); | |
423 | scc_t *sccp = fep->scc.sccp; | |
424 | ||
425 | W16(sccp, scc_scce, SCC_NAPI_RX_EVENT_MSK); | |
426 | } | |
427 | ||
428 | static void napi_enable_rx(struct net_device *dev) | |
429 | { | |
430 | struct fs_enet_private *fep = netdev_priv(dev); | |
431 | scc_t *sccp = fep->scc.sccp; | |
432 | ||
433 | S16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK); | |
434 | } | |
435 | ||
436 | static void napi_disable_rx(struct net_device *dev) | |
437 | { | |
438 | struct fs_enet_private *fep = netdev_priv(dev); | |
439 | scc_t *sccp = fep->scc.sccp; | |
440 | ||
441 | C16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK); | |
442 | } | |
443 | ||
444 | static void rx_bd_done(struct net_device *dev) | |
445 | { | |
446 | /* nothing */ | |
447 | } | |
448 | ||
449 | static void tx_kickstart(struct net_device *dev) | |
450 | { | |
451 | /* nothing */ | |
452 | } | |
453 | ||
454 | static u32 get_int_events(struct net_device *dev) | |
455 | { | |
456 | struct fs_enet_private *fep = netdev_priv(dev); | |
457 | scc_t *sccp = fep->scc.sccp; | |
458 | ||
459 | return (u32) R16(sccp, scc_scce); | |
460 | } | |
461 | ||
462 | static void clear_int_events(struct net_device *dev, u32 int_events) | |
463 | { | |
464 | struct fs_enet_private *fep = netdev_priv(dev); | |
465 | scc_t *sccp = fep->scc.sccp; | |
466 | ||
467 | W16(sccp, scc_scce, int_events & 0xffff); | |
468 | } | |
469 | ||
470 | static void ev_error(struct net_device *dev, u32 int_events) | |
471 | { | |
472 | printk(KERN_WARNING DRV_MODULE_NAME | |
473 | ": %s SCC ERROR(s) 0x%x\n", dev->name, int_events); | |
474 | } | |
475 | ||
476 | static int get_regs(struct net_device *dev, void *p, int *sizep) | |
477 | { | |
478 | struct fs_enet_private *fep = netdev_priv(dev); | |
479 | ||
480 | if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t)) | |
481 | return -EINVAL; | |
482 | ||
483 | memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t)); | |
484 | p = (char *)p + sizeof(scc_t); | |
485 | ||
486 | memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t)); | |
487 | ||
488 | return 0; | |
489 | } | |
490 | ||
491 | static int get_regs_len(struct net_device *dev) | |
492 | { | |
493 | return sizeof(scc_t) + sizeof(scc_enet_t); | |
494 | } | |
495 | ||
496 | static void tx_restart(struct net_device *dev) | |
497 | { | |
498 | struct fs_enet_private *fep = netdev_priv(dev); | |
499 | ||
500 | scc_cr_cmd(fep, CPM_CR_RESTART_TX); | |
501 | } | |
502 | ||
5b4b8454 VB |
503 | |
504 | ||
48257c4f PA |
505 | /*************************************************************************/ |
506 | ||
507 | const struct fs_ops fs_scc_ops = { | |
508 | .setup_data = setup_data, | |
509 | .cleanup_data = cleanup_data, | |
510 | .set_multicast_list = set_multicast_list, | |
511 | .restart = restart, | |
512 | .stop = stop, | |
513 | .pre_request_irq = pre_request_irq, | |
514 | .post_free_irq = post_free_irq, | |
515 | .napi_clear_rx_event = napi_clear_rx_event, | |
516 | .napi_enable_rx = napi_enable_rx, | |
517 | .napi_disable_rx = napi_disable_rx, | |
518 | .rx_bd_done = rx_bd_done, | |
519 | .tx_kickstart = tx_kickstart, | |
520 | .get_int_events = get_int_events, | |
521 | .clear_int_events = clear_int_events, | |
522 | .ev_error = ev_error, | |
523 | .get_regs = get_regs, | |
524 | .get_regs_len = get_regs_len, | |
525 | .tx_restart = tx_restart, | |
526 | .allocate_bd = allocate_bd, | |
527 | .free_bd = free_bd, | |
528 | }; |