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[TG3]: Fix race condition when calling register_netdev().
[net-next-2.6.git] / drivers / net / ewrk3.c
CommitLineData
1da177e4
LT		 1/* ewrk3.c: A DIGITAL EtherWORKS 3 ethernet driver for Linux.
2
3 Written 1994 by David C. Davies.
4
5 Copyright 1994 Digital Equipment Corporation.
6
7 This software may be used and distributed according to the terms of
8 the GNU General Public License, incorporated herein by reference.
9
10 This driver is written for the Digital Equipment Corporation series
11 of EtherWORKS ethernet cards:
12
13 DE203 Turbo (BNC)
14 DE204 Turbo (TP)
15 DE205 Turbo (TP BNC)
16
17 The driver has been tested on a relatively busy network using the DE205
18 card and benchmarked with 'ttcp': it transferred 16M of data at 975kB/s
19 (7.8Mb/s) to a DECstation 5000/200.
20
21 The author may be reached at davies@maniac.ultranet.com.
22
23 =========================================================================
24 This driver has been written substantially from scratch, although its
25 inheritance of style and stack interface from 'depca.c' and in turn from
26 Donald Becker's 'lance.c' should be obvious.
27
28 The DE203/4/5 boards all use a new proprietary chip in place of the
29 LANCE chip used in prior cards (DEPCA, DE100, DE200/1/2, DE210, DE422).
30 Use the depca.c driver in the standard distribution for the LANCE based
31 cards from DIGITAL; this driver will not work with them.
32
33 The DE203/4/5 cards have 2 main modes: shared memory and I/O only. I/O
34 only makes all the card accesses through I/O transactions and no high
35 (shared) memory is used. This mode provides a >48% performance penalty
36 and is deprecated in this driver, although allowed to provide initial
37 setup when hardstrapped.
38
39 The shared memory mode comes in 3 flavours: 2kB, 32kB and 64kB. There is
40 no point in using any mode other than the 2kB mode - their performances
41 are virtually identical, although the driver has been tested in the 2kB
42 and 32kB modes. I would suggest you uncomment the line:
43
44 FORCE_2K_MODE;
45
46 to allow the driver to configure the card as a 2kB card at your current
47 base address, thus leaving more room to clutter your system box with
48 other memory hungry boards.
49
50 As many ISA and EISA cards can be supported under this driver as you
51 wish, limited primarily by the available IRQ lines, rather than by the
52 available I/O addresses (24 ISA, 16 EISA). I have checked different
53 configurations of multiple depca cards and ewrk3 cards and have not
54 found a problem yet (provided you have at least depca.c v0.38) ...
55
56 The board IRQ setting must be at an unused IRQ which is auto-probed
57 using Donald Becker's autoprobe routines. All these cards are at
58 {5,10,11,15}.
59
60 No 16MB memory limitation should exist with this driver as DMA is not
61 used and the common memory area is in low memory on the network card (my
62 current system has 20MB and I've not had problems yet).
63
64 The ability to load this driver as a loadable module has been included
65 and used extensively during the driver development (to save those long
66 reboot sequences). To utilise this ability, you have to do 8 things:
67
68 0) have a copy of the loadable modules code installed on your system.
69 1) copy ewrk3.c from the /linux/drivers/net directory to your favourite
70 temporary directory.
71 2) edit the source code near line 1898 to reflect the I/O address and
72 IRQ you're using.
73 3) compile ewrk3.c, but include -DMODULE in the command line to ensure
74 that the correct bits are compiled (see end of source code).
75 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
76 kernel with the ewrk3 configuration turned off and reboot.
77 5) insmod ewrk3.o
78 [Alan Cox: Changed this so you can insmod ewrk3.o irq=x io=y]
79 [Adam Kropelin: now accepts irq=x1,x2 io=y1,y2 for multiple cards]
80 6) run the net startup bits for your new eth?? interface manually
81 (usually /etc/rc.inet[12] at boot time).
82 7) enjoy!
83
84 Note that autoprobing is not allowed in loadable modules - the system is
85 already up and running and you're messing with interrupts.
86
87 To unload a module, turn off the associated interface
88 'ifconfig eth?? down' then 'rmmod ewrk3'.
89
90 Promiscuous mode has been turned off in this driver, but all the
91 multicast address bits have been turned on. This improved the send
92 performance on a busy network by about 13%.
93
94 Ioctl's have now been provided (primarily because I wanted to grab some
95 packet size statistics). They are patterned after 'plipconfig.c' from a
96 suggestion by Alan Cox. Using these ioctls, you can enable promiscuous
97 mode, add/delete multicast addresses, change the hardware address, get
98 packet size distribution statistics and muck around with the control and
99 status register. I'll add others if and when the need arises.
100
101 TO DO:
102 ------
103
104
105 Revision History
106 ----------------
107
108 Version Date Description
109
110 0.1 26-aug-94 Initial writing. ALPHA code release.
111 0.11 31-aug-94 Fixed: 2k mode memory base calc.,
112 LeMAC version calc.,
113 IRQ vector assignments during autoprobe.
114 0.12 31-aug-94 Tested working on LeMAC2 (DE20[345]-AC) card.
115 Fixed up MCA hash table algorithm.
116 0.20 4-sep-94 Added IOCTL functionality.
117 0.21 14-sep-94 Added I/O mode.
118 0.21axp 15-sep-94 Special version for ALPHA AXP Linux V1.0.
119 0.22 16-sep-94 Added more IOCTLs & tidied up.
120 0.23 21-sep-94 Added transmit cut through.
121 0.24 31-oct-94 Added uid checks in some ioctls.
122 0.30 1-nov-94 BETA code release.
123 0.31 5-dec-94 Added check/allocate region code.
124 0.32 16-jan-95 Broadcast packet fix.
125 0.33 10-Feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>.
126 0.40 27-Dec-95 Rationalise MODULE and autoprobe code.
127 Rewrite for portability & updated.
128 ALPHA support from <jestabro@amt.tay1.dec.com>
129 Added verify_area() calls in ewrk3_ioctl() from
130 suggestion by <heiko@colossus.escape.de>.
131 Add new multicasting code.
132 0.41 20-Jan-96 Fix IRQ set up problem reported by
133 <kenneth@bbs.sas.ntu.ac.sg>.
134 0.42 22-Apr-96 Fix alloc_device() bug <jari@markkus2.fimr.fi>
135 0.43 16-Aug-96 Update alloc_device() to conform to de4x5.c
136 0.44 08-Nov-01 use library crc32 functions <Matt_Domsch@dell.com>
137 0.45 19-Jul-02 fix unaligned access on alpha <martin@bruli.net>
138 0.46 10-Oct-02 Multiple NIC support when module <akropel1@rochester.rr.com>
139 0.47 18-Oct-02 ethtool support <akropel1@rochester.rr.com>
140 0.48 18-Oct-02 cli/sti removal for 2.5 <vda@port.imtp.ilyichevsk.odessa.ua>
141 ioctl locking, signature search cleanup <akropel1@rochester.rr.com>
142
143 =========================================================================
144 */
145
146#include <linux/module.h>
147#include <linux/kernel.h>
148#include <linux/string.h>
149#include <linux/errno.h>
150#include <linux/ioport.h>
151#include <linux/slab.h>
152#include <linux/interrupt.h>
153#include <linux/delay.h>
154#include <linux/init.h>
155#include <linux/crc32.h>
156#include <linux/netdevice.h>
157#include <linux/etherdevice.h>
158#include <linux/skbuff.h>
159#include <linux/ethtool.h>
160#include <linux/time.h>
161#include <linux/types.h>
162#include <linux/unistd.h>
163#include <linux/ctype.h>
164#include <linux/bitops.h>
165
166#include <asm/io.h>
167#include <asm/dma.h>
168#include <asm/uaccess.h>
169
170#include "ewrk3.h"
171
172#define DRV_NAME "ewrk3"
173#define DRV_VERSION "0.48"
174
175static char version[] __initdata =
176DRV_NAME ":v" DRV_VERSION " 2002/10/18 davies@maniac.ultranet.com\n";
177
178#ifdef EWRK3_DEBUG
179static int ewrk3_debug = EWRK3_DEBUG;
180#else
181static int ewrk3_debug = 1;
182#endif
183
184#define EWRK3_NDA 0xffe0 /* No Device Address */
185
186#define PROBE_LENGTH 32
187#define ETH_PROM_SIG 0xAA5500FFUL
188
189#ifndef EWRK3_SIGNATURE
190#define EWRK3_SIGNATURE {"DE203","DE204","DE205",""}
191#define EWRK3_STRLEN 8
192#endif
193
194#ifndef EWRK3_RAM_BASE_ADDRESSES
195#define EWRK3_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0x00000}
196#endif
197
198/*
199 ** Sets up the I/O area for the autoprobe.
200 */
201#define EWRK3_IO_BASE 0x100 /* Start address for probe search */
202#define EWRK3_IOP_INC 0x20 /* I/O address increment */
203#define EWRK3_TOTAL_SIZE 0x20 /* required I/O address length */
204
205#ifndef MAX_NUM_EWRK3S
206#define MAX_NUM_EWRK3S 21
207#endif
208
209#ifndef EWRK3_EISA_IO_PORTS
210#define EWRK3_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
211#endif
212
213#ifndef MAX_EISA_SLOTS
214#define MAX_EISA_SLOTS 16
215#define EISA_SLOT_INC 0x1000
216#endif
217
218#define QUEUE_PKT_TIMEOUT (1*HZ) /* Jiffies */
219
220/*
221 ** EtherWORKS 3 shared memory window sizes
222 */
223#define IO_ONLY 0x00
224#define SHMEM_2K 0x800
225#define SHMEM_32K 0x8000
226#define SHMEM_64K 0x10000
227
228/*
229 ** EtherWORKS 3 IRQ ENABLE/DISABLE
230 */
231#define ENABLE_IRQs { \
232 icr |= lp->irq_mask;\
233 outb(icr, EWRK3_ICR); /* Enable the IRQs */\
234}
235
236#define DISABLE_IRQs { \
237 icr = inb(EWRK3_ICR);\
238 icr &= ~lp->irq_mask;\
239 outb(icr, EWRK3_ICR); /* Disable the IRQs */\
240}
241
242/*
243 ** EtherWORKS 3 START/STOP
244 */
245#define START_EWRK3 { \
246 csr = inb(EWRK3_CSR);\
247 csr &= ~(CSR_TXD|CSR_RXD);\
248 outb(csr, EWRK3_CSR); /* Enable the TX and/or RX */\
249}
250
251#define STOP_EWRK3 { \
252 csr = (CSR_TXD|CSR_RXD);\
253 outb(csr, EWRK3_CSR); /* Disable the TX and/or RX */\
254}
255
256/*
257 ** The EtherWORKS 3 private structure
258 */
259#define EWRK3_PKT_STAT_SZ 16
260#define EWRK3_PKT_BIN_SZ 128 /* Should be >=100 unless you
261 increase EWRK3_PKT_STAT_SZ */
262
263struct ewrk3_stats {
264 u32 bins[EWRK3_PKT_STAT_SZ];
265 u32 unicast;
266 u32 multicast;
267 u32 broadcast;
268 u32 excessive_collisions;
269 u32 tx_underruns;
270 u32 excessive_underruns;
271};
272
273struct ewrk3_private {
274 char adapter_name[80]; /* Name exported to /proc/ioports */
275 u_long shmem_base; /* Shared memory start address */
276 void __iomem *shmem;
277 u_long shmem_length; /* Shared memory window length */
278 struct net_device_stats stats; /* Public stats */
279 struct ewrk3_stats pktStats; /* Private stats counters */
280 u_char irq_mask; /* Adapter IRQ mask bits */
281 u_char mPage; /* Maximum 2kB Page number */
282 u_char lemac; /* Chip rev. level */
283 u_char hard_strapped; /* Don't allow a full open */
284 u_char txc; /* Transmit cut through */
285 void __iomem *mctbl; /* Pointer to the multicast table */
286 u_char led_mask; /* Used to reserve LED access for ethtool */
287 spinlock_t hw_lock;
288};
289
290/*
291 ** Force the EtherWORKS 3 card to be in 2kB MODE
292 */
293#define FORCE_2K_MODE { \
294 shmem_length = SHMEM_2K;\
295 outb(((mem_start - 0x80000) >> 11), EWRK3_MBR);\
296}
297
298/*
299 ** Public Functions
300 */
301static int ewrk3_open(struct net_device *dev);
302static int ewrk3_queue_pkt(struct sk_buff *skb, struct net_device *dev);
7d12e780 303static irqreturn_t ewrk3_interrupt(int irq, void *dev_id);
1da177e4
LT		 304static int ewrk3_close(struct net_device *dev);
305static struct net_device_stats *ewrk3_get_stats(struct net_device *dev);
306static void set_multicast_list(struct net_device *dev);
307static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
7282d491
JG		 308static const struct ethtool_ops ethtool_ops_203;
309static const struct ethtool_ops ethtool_ops;
1da177e4
LT		 310
311/*
312 ** Private functions
313 */
314static int ewrk3_hw_init(struct net_device *dev, u_long iobase);
315static void ewrk3_init(struct net_device *dev);
316static int ewrk3_rx(struct net_device *dev);
317static int ewrk3_tx(struct net_device *dev);
318static void ewrk3_timeout(struct net_device *dev);
319
320static void EthwrkSignature(char *name, char *eeprom_image);
321static int DevicePresent(u_long iobase);
322static void SetMulticastFilter(struct net_device *dev);
323static int EISA_signature(char *name, s32 eisa_id);
324
325static int Read_EEPROM(u_long iobase, u_char eaddr);
326static int Write_EEPROM(short data, u_long iobase, u_char eaddr);
327static u_char get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType);
328
329static int ewrk3_probe1(struct net_device *dev, u_long iobase, int irq);
330static int isa_probe(struct net_device *dev, u_long iobase);
331static int eisa_probe(struct net_device *dev, u_long iobase);
332
333static u_char irq[MAX_NUM_EWRK3S+1] = {5, 0, 10, 3, 11, 9, 15, 12};
334
335static char name[EWRK3_STRLEN + 1];
336static int num_ewrks3s;
337
338/*
339 ** Miscellaneous defines...
340 */
341#define INIT_EWRK3 {\
342 outb(EEPROM_INIT, EWRK3_IOPR);\
343 mdelay(1);\
344}
345
346#ifndef MODULE
347struct net_device * __init ewrk3_probe(int unit)
348{
349 struct net_device *dev = alloc_etherdev(sizeof(struct ewrk3_private));
350 int err;
351
352 if (!dev)
353 return ERR_PTR(-ENOMEM);
354
355 if (unit >= 0) {
356 sprintf(dev->name, "eth%d", unit);
357 netdev_boot_setup_check(dev);
358 }
359 SET_MODULE_OWNER(dev);
360
361 err = ewrk3_probe1(dev, dev->base_addr, dev->irq);
6aa20a22 362 if (err)
1da177e4
LT		 363 goto out;
364 return dev;
365out:
366 free_netdev(dev);
367 return ERR_PTR(err);
6aa20a22 368
1da177e4
LT		 369}
370#endif
371
372static int __init ewrk3_probe1(struct net_device *dev, u_long iobase, int irq)
373{
374 int err;
375
376 dev->base_addr = iobase;
377 dev->irq = irq;
378
379 /* Address PROM pattern */
380 err = isa_probe(dev, iobase);
6aa20a22 381 if (err != 0)
1da177e4
LT		 382 err = eisa_probe(dev, iobase);
383
384 if (err)
385 return err;
386
387 err = register_netdev(dev);
388 if (err)
389 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
390
391 return err;
392}
393
6aa20a22 394static int __init
1da177e4
LT		 395ewrk3_hw_init(struct net_device *dev, u_long iobase)
396{
397 struct ewrk3_private *lp;
398 int i, status = 0;
399 u_long mem_start, shmem_length;
400 u_char cr, cmr, icr, nicsr, lemac, hard_strapped = 0;
401 u_char eeprom_image[EEPROM_MAX], chksum, eisa_cr = 0;
402
403 /*
404 ** Stop the EWRK3. Enable the DBR ROM. Disable interrupts and remote boot.
405 ** This also disables the EISA_ENABLE bit in the EISA Control Register.
406 */
407 if (iobase > 0x400)
408 eisa_cr = inb(EISA_CR);
409 INIT_EWRK3;
410
411 nicsr = inb(EWRK3_CSR);
412
413 icr = inb(EWRK3_ICR);
414 icr &= 0x70;
415 outb(icr, EWRK3_ICR); /* Disable all the IRQs */
416
417 if (nicsr == (CSR_TXD | CSR_RXD))
418 return -ENXIO;
419
420
421 /* Check that the EEPROM is alive and well and not living on Pluto... */
422 for (chksum = 0, i = 0; i < EEPROM_MAX; i += 2) {
423 union {
424 short val;
425 char c[2];
426 } tmp;
427
428 tmp.val = (short) Read_EEPROM(iobase, (i >> 1));
429 eeprom_image[i] = tmp.c[0];
430 eeprom_image[i + 1] = tmp.c[1];
431 chksum += eeprom_image[i] + eeprom_image[i + 1];
432 }
433
434 if (chksum != 0) { /* Bad EEPROM Data! */
435 printk("%s: Device has a bad on-board EEPROM.\n", dev->name);
436 return -ENXIO;
437 }
6aa20a22 438
1da177e4 439 EthwrkSignature(name, eeprom_image);
6aa20a22 440 if (*name == '\0')
1da177e4
LT		 441 return -ENXIO;
442
443 dev->base_addr = iobase;
6aa20a22 444
1da177e4
LT		 445 if (iobase > 0x400) {
446 outb(eisa_cr, EISA_CR); /* Rewrite the EISA CR */
447 }
448 lemac = eeprom_image[EEPROM_CHIPVER];
449 cmr = inb(EWRK3_CMR);
6aa20a22 450
1da177e4
LT		 451 if (((lemac == LeMAC) && ((cmr & CMR_NO_EEPROM) != CMR_NO_EEPROM)) ||
452 ((lemac == LeMAC2) && !(cmr & CMR_HS))) {
453 printk("%s: %s at %#4lx", dev->name, name, iobase);
454 hard_strapped = 1;
455 } else if ((iobase & 0x0fff) == EWRK3_EISA_IO_PORTS) {
456 /* EISA slot address */
457 printk("%s: %s at %#4lx (EISA slot %ld)",
458 dev->name, name, iobase, ((iobase >> 12) & 0x0f));
459 } else { /* ISA port address */
460 printk("%s: %s at %#4lx", dev->name, name, iobase);
461 }
462
463 printk(", h/w address ");
464 if (lemac != LeMAC2)
465 DevicePresent(iobase); /* need after EWRK3_INIT */
466 status = get_hw_addr(dev, eeprom_image, lemac);
467 for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */
468 printk("%2.2x:", dev->dev_addr[i]);
469 }
470 printk("%2.2x,\n", dev->dev_addr[i]);
6aa20a22 471
1da177e4
LT		 472 if (status) {
473 printk(" which has an EEPROM CRC error.\n");
474 return -ENXIO;
475 }
476
477 if (lemac == LeMAC2) { /* Special LeMAC2 CMR things */
478 cmr &= ~(CMR_RA | CMR_WB | CMR_LINK | CMR_POLARITY | CMR_0WS);
479 if (eeprom_image[EEPROM_MISC0] & READ_AHEAD)
480 cmr |= CMR_RA;
481 if (eeprom_image[EEPROM_MISC0] & WRITE_BEHIND)
482 cmr |= CMR_WB;
483 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_POL)
484 cmr |= CMR_POLARITY;
485 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_LINK)
486 cmr |= CMR_LINK;
487 if (eeprom_image[EEPROM_MISC0] & _0WS_ENA)
488 cmr |= CMR_0WS;
489 }
490 if (eeprom_image[EEPROM_SETUP] & SETUP_DRAM)
491 cmr |= CMR_DRAM;
492 outb(cmr, EWRK3_CMR);
6aa20a22 493
1da177e4
LT		 494 cr = inb(EWRK3_CR); /* Set up the Control Register */
495 cr |= eeprom_image[EEPROM_SETUP] & SETUP_APD;
496 if (cr & SETUP_APD)
497 cr |= eeprom_image[EEPROM_SETUP] & SETUP_PS;
498 cr |= eeprom_image[EEPROM_MISC0] & FAST_BUS;
499 cr |= eeprom_image[EEPROM_MISC0] & ENA_16;
500 outb(cr, EWRK3_CR);
501
502 /*
503 ** Determine the base address and window length for the EWRK3
504 ** RAM from the memory base register.
505 */
506 mem_start = inb(EWRK3_MBR);
507 shmem_length = 0;
508 if (mem_start != 0) {
509 if ((mem_start >= 0x0a) && (mem_start <= 0x0f)) {
510 mem_start *= SHMEM_64K;
511 shmem_length = SHMEM_64K;
512 } else if ((mem_start >= 0x14) && (mem_start <= 0x1f)) {
513 mem_start *= SHMEM_32K;
514 shmem_length = SHMEM_32K;
515 } else if ((mem_start >= 0x40) && (mem_start <= 0xff)) {
516 mem_start = mem_start * SHMEM_2K + 0x80000;
517 shmem_length = SHMEM_2K;
518 } else {
519 return -ENXIO;
520 }
521 }
522 /*
523 ** See the top of this source code for comments about
524 ** uncommenting this line.
525 */
526/* FORCE_2K_MODE; */
6aa20a22 527
1da177e4
LT		 528 if (hard_strapped) {
529 printk(" is hard strapped.\n");
530 } else if (mem_start) {
531 printk(" has a %dk RAM window", (int) (shmem_length >> 10));
532 printk(" at 0x%.5lx", mem_start);
533 } else {
534 printk(" is in I/O only mode");
535 }
536
537 lp = netdev_priv(dev);
538 lp->shmem_base = mem_start;
539 lp->shmem = ioremap(mem_start, shmem_length);
540 if (!lp->shmem)
541 return -ENOMEM;
542 lp->shmem_length = shmem_length;
543 lp->lemac = lemac;
544 lp->hard_strapped = hard_strapped;
545 lp->led_mask = CR_LED;
546 spin_lock_init(&lp->hw_lock);
6aa20a22 547
1da177e4
LT		 548 lp->mPage = 64;
549 if (cmr & CMR_DRAM)
550 lp->mPage <<= 1; /* 2 DRAMS on module */
6aa20a22 551
1da177e4 552 sprintf(lp->adapter_name, "%s (%s)", name, dev->name);
6aa20a22 553
1da177e4 554 lp->irq_mask = ICR_TNEM | ICR_TXDM | ICR_RNEM | ICR_RXDM;
6aa20a22 555
1da177e4
LT		 556 if (!hard_strapped) {
557 /*
558 ** Enable EWRK3 board interrupts for autoprobing
559 */
560 icr |= ICR_IE; /* Enable interrupts */
561 outb(icr, EWRK3_ICR);
6aa20a22 562
1da177e4
LT		 563 /* The DMA channel may be passed in on this parameter. */
564 dev->dma = 0;
6aa20a22 565
1da177e4
LT		 566 /* To auto-IRQ we enable the initialization-done and DMA err,
567 interrupts. For now we will always get a DMA error. */
568 if (dev->irq < 2) {
569#ifndef MODULE
570 u_char irqnum;
571 unsigned long irq_mask;
6aa20a22 572
1da177e4
LT		 573
574 irq_mask = probe_irq_on();
6aa20a22 575
1da177e4
LT		 576 /*
577 ** Trigger a TNE interrupt.
578 */
579 icr |= ICR_TNEM;
580 outb(1, EWRK3_TDQ); /* Write to the TX done queue */
581 outb(icr, EWRK3_ICR); /* Unmask the TXD interrupt */
6aa20a22 582
1da177e4 583 irqnum = irq[((icr & IRQ_SEL) >> 4)];
6aa20a22 584
1da177e4
LT		 585 mdelay(20);
586 dev->irq = probe_irq_off(irq_mask);
587 if ((dev->irq) && (irqnum == dev->irq)) {
588 printk(" and uses IRQ%d.\n", dev->irq);
589 } else {
590 if (!dev->irq) {
591 printk(" and failed to detect IRQ line.\n");
592 } else if ((irqnum == 1) && (lemac == LeMAC2)) {
593 printk(" and an illegal IRQ line detected.\n");
594 } else {
595 printk(", but incorrect IRQ line detected.\n");
596 }
597 iounmap(lp->shmem);
598 return -ENXIO;
599 }
600
601 DISABLE_IRQs; /* Mask all interrupts */
602
603#endif /* MODULE */
604 } else {
605 printk(" and requires IRQ%d.\n", dev->irq);
606 }
607 }
608
609 if (ewrk3_debug > 1) {
610 printk(version);
611 }
612 /* The EWRK3-specific entries in the device structure. */
613 dev->open = ewrk3_open;
614 dev->hard_start_xmit = ewrk3_queue_pkt;
615 dev->stop = ewrk3_close;
616 dev->get_stats = ewrk3_get_stats;
617 dev->set_multicast_list = set_multicast_list;
618 dev->do_ioctl = ewrk3_ioctl;
619 if (lp->adapter_name[4] == '3')
620 SET_ETHTOOL_OPS(dev, &ethtool_ops_203);
621 else
622 SET_ETHTOOL_OPS(dev, &ethtool_ops);
623 dev->tx_timeout = ewrk3_timeout;
624 dev->watchdog_timeo = QUEUE_PKT_TIMEOUT;
6aa20a22 625
1da177e4
LT		 626 dev->mem_start = 0;
627
628 return 0;
629}
6aa20a22 630
1da177e4
LT		 631
632static int ewrk3_open(struct net_device *dev)
633{
634 struct ewrk3_private *lp = netdev_priv(dev);
635 u_long iobase = dev->base_addr;
636 int i, status = 0;
637 u_char icr, csr;
638
639 /*
640 ** Stop the TX and RX...
641 */
642 STOP_EWRK3;
643
644 if (!lp->hard_strapped) {
645 if (request_irq(dev->irq, (void *) ewrk3_interrupt, 0, "ewrk3", dev)) {
646 printk("ewrk3_open(): Requested IRQ%d is busy\n", dev->irq);
647 status = -EAGAIN;
648 } else {
649
650 /*
651 ** Re-initialize the EWRK3...
652 */
653 ewrk3_init(dev);
654
655 if (ewrk3_debug > 1) {
656 printk("%s: ewrk3 open with irq %d\n", dev->name, dev->irq);
657 printk(" physical address: ");
658 for (i = 0; i < 5; i++) {
659 printk("%2.2x:", (u_char) dev->dev_addr[i]);
660 }
661 printk("%2.2x\n", (u_char) dev->dev_addr[i]);
662 if (lp->shmem_length == 0) {
663 printk(" no shared memory, I/O only mode\n");
664 } else {
665 printk(" start of shared memory: 0x%08lx\n", lp->shmem_base);
666 printk(" window length: 0x%04lx\n", lp->shmem_length);
667 }
668 printk(" # of DRAMS: %d\n", ((inb(EWRK3_CMR) & 0x02) ? 2 : 1));
669 printk(" csr: 0x%02x\n", inb(EWRK3_CSR));
670 printk(" cr: 0x%02x\n", inb(EWRK3_CR));
671 printk(" icr: 0x%02x\n", inb(EWRK3_ICR));
672 printk(" cmr: 0x%02x\n", inb(EWRK3_CMR));
673 printk(" fmqc: 0x%02x\n", inb(EWRK3_FMQC));
674 }
675 netif_start_queue(dev);
676 /*
677 ** Unmask EWRK3 board interrupts
678 */
679 icr = inb(EWRK3_ICR);
680 ENABLE_IRQs;
681
682 }
683 } else {
684 printk(KERN_ERR "%s: ewrk3 available for hard strapped set up only.\n", dev->name);
685 printk(KERN_ERR " Run the 'ewrk3setup' utility or remove the hard straps.\n");
686 return -EINVAL;
687 }
688
689 return status;
690}
691
692/*
693 ** Initialize the EtherWORKS 3 operating conditions
694 */
695static void ewrk3_init(struct net_device *dev)
696{
697 struct ewrk3_private *lp = netdev_priv(dev);
698 u_char csr, page;
699 u_long iobase = dev->base_addr;
700 int i;
701
702 /*
703 ** Enable any multicasts
704 */
705 set_multicast_list(dev);
706
707 /*
708 ** Set hardware MAC address. Address is initialized from the EEPROM
709 ** during startup but may have since been changed by the user.
710 */
711 for (i=0; i<ETH_ALEN; i++)
712 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
713
714 /*
715 ** Clean out any remaining entries in all the queues here
716 */
717 while (inb(EWRK3_TQ));
718 while (inb(EWRK3_TDQ));
719 while (inb(EWRK3_RQ));
720 while (inb(EWRK3_FMQ));
721
722 /*
723 ** Write a clean free memory queue
724 */
725 for (page = 1; page < lp->mPage; page++) { /* Write the free page numbers */
726 outb(page, EWRK3_FMQ); /* to the Free Memory Queue */
727 }
728
729 START_EWRK3; /* Enable the TX and/or RX */
730}
731
732/*
733 * Transmit timeout
734 */
6aa20a22 735
1da177e4
LT		 736static void ewrk3_timeout(struct net_device *dev)
737{
738 struct ewrk3_private *lp = netdev_priv(dev);
739 u_char icr, csr;
740 u_long iobase = dev->base_addr;
6aa20a22
JG		 741
742 if (!lp->hard_strapped)
1da177e4
LT		 743 {
744 printk(KERN_WARNING"%s: transmit timed/locked out, status %04x, resetting.\n",
745 dev->name, inb(EWRK3_CSR));
746
747 /*
748 ** Mask all board interrupts
749 */
750 DISABLE_IRQs;
751
752 /*
753 ** Stop the TX and RX...
754 */
755 STOP_EWRK3;
756
757 ewrk3_init(dev);
758
759 /*
760 ** Unmask EWRK3 board interrupts
761 */
762 ENABLE_IRQs;
763
764 dev->trans_start = jiffies;
765 netif_wake_queue(dev);
766 }
767}
768
769/*
770 ** Writes a socket buffer to the free page queue
771 */
772static int ewrk3_queue_pkt (struct sk_buff *skb, struct net_device *dev)
773{
774 struct ewrk3_private *lp = netdev_priv(dev);
775 u_long iobase = dev->base_addr;
776 void __iomem *buf = NULL;
777 u_char icr;
778 u_char page;
779
780 spin_lock_irq (&lp->hw_lock);
781 DISABLE_IRQs;
782
783 /* if no resources available, exit, request packet be queued */
784 if (inb (EWRK3_FMQC) == 0) {
785 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): No free resources...\n",
786 dev->name);
787 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): CSR: %02x ICR: %02x FMQC: %02x\n",
788 dev->name, inb (EWRK3_CSR), inb (EWRK3_ICR),
789 inb (EWRK3_FMQC));
790 goto err_out;
791 }
792
793 /*
794 ** Get a free page from the FMQ
795 */
796 if ((page = inb (EWRK3_FMQ)) >= lp->mPage) {
797 printk ("ewrk3_queue_pkt(): Invalid free memory page (%d).\n",
798 (u_char) page);
799 goto err_out;
800 }
801
802
803 /*
804 ** Set up shared memory window and pointer into the window
805 */
806 if (lp->shmem_length == IO_ONLY) {
807 outb (page, EWRK3_IOPR);
808 } else if (lp->shmem_length == SHMEM_2K) {
809 buf = lp->shmem;
810 outb (page, EWRK3_MPR);
811 } else if (lp->shmem_length == SHMEM_32K) {
812 buf = (((short) page << 11) & 0x7800) + lp->shmem;
813 outb ((page >> 4), EWRK3_MPR);
814 } else if (lp->shmem_length == SHMEM_64K) {
815 buf = (((short) page << 11) & 0xf800) + lp->shmem;
816 outb ((page >> 5), EWRK3_MPR);
817 } else {
818 printk (KERN_ERR "%s: Oops - your private data area is hosed!\n",
819 dev->name);
820 BUG ();
821 }
822
823 /*
824 ** Set up the buffer control structures and copy the data from
825 ** the socket buffer to the shared memory .
826 */
827 if (lp->shmem_length == IO_ONLY) {
828 int i;
829 u_char *p = skb->data;
830 outb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), EWRK3_DATA);
831 outb ((char) (skb->len & 0xff), EWRK3_DATA);
832 outb ((char) ((skb->len >> 8) & 0xff), EWRK3_DATA);
833 outb ((char) 0x04, EWRK3_DATA);
834 for (i = 0; i < skb->len; i++) {
835 outb (*p++, EWRK3_DATA);
836 }
837 outb (page, EWRK3_TQ); /* Start sending pkt */
838 } else {
839 writeb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), buf); /* ctrl byte */
840 buf += 1;
841 writeb ((char) (skb->len & 0xff), buf); /* length (16 bit xfer) */
842 buf += 1;
843 if (lp->txc) {
844 writeb(((skb->len >> 8) & 0xff) | XCT, buf);
845 buf += 1;
846 writeb (0x04, buf); /* index byte */
847 buf += 1;
848 writeb (0x00, (buf + skb->len)); /* Write the XCT flag */
849 memcpy_toio (buf, skb->data, PRELOAD); /* Write PRELOAD bytes */
850 outb (page, EWRK3_TQ); /* Start sending pkt */
851 memcpy_toio (buf + PRELOAD,
852 skb->data + PRELOAD,
853 skb->len - PRELOAD);
854 writeb (0xff, (buf + skb->len)); /* Write the XCT flag */
855 } else {
856 writeb ((skb->len >> 8) & 0xff, buf);
857 buf += 1;
858 writeb (0x04, buf); /* index byte */
859 buf += 1;
860 memcpy_toio (buf, skb->data, skb->len); /* Write data bytes */
861 outb (page, EWRK3_TQ); /* Start sending pkt */
862 }
863 }
864
865 ENABLE_IRQs;
866 spin_unlock_irq (&lp->hw_lock);
867
868 lp->stats.tx_bytes += skb->len;
869 dev->trans_start = jiffies;
870 dev_kfree_skb (skb);
871
872 /* Check for free resources: stop Tx queue if there are none */
873 if (inb (EWRK3_FMQC) == 0)
874 netif_stop_queue (dev);
875
876 return 0;
877
878err_out:
879 ENABLE_IRQs;
880 spin_unlock_irq (&lp->hw_lock);
881 return 1;
882}
883
884/*
885 ** The EWRK3 interrupt handler.
886 */
7d12e780 887static irqreturn_t ewrk3_interrupt(int irq, void *dev_id)
1da177e4
LT		 888{
889 struct net_device *dev = dev_id;
890 struct ewrk3_private *lp;
891 u_long iobase;
892 u_char icr, cr, csr;
893
894 lp = netdev_priv(dev);
895 iobase = dev->base_addr;
896
897 /* get the interrupt information */
898 csr = inb(EWRK3_CSR);
899
900 /*
901 ** Mask the EWRK3 board interrupts and turn on the LED
902 */
903 spin_lock(&lp->hw_lock);
904 DISABLE_IRQs;
905
906 cr = inb(EWRK3_CR);
907 cr |= lp->led_mask;
908 outb(cr, EWRK3_CR);
909
910 if (csr & CSR_RNE) /* Rx interrupt (packet[s] arrived) */
911 ewrk3_rx(dev);
912
913 if (csr & CSR_TNE) /* Tx interrupt (packet sent) */
914 ewrk3_tx(dev);
915
916 /*
917 ** Now deal with the TX/RX disable flags. These are set when there
918 ** are no more resources. If resources free up then enable these
919 ** interrupts, otherwise mask them - failure to do this will result
920 ** in the system hanging in an interrupt loop.
921 */
922 if (inb(EWRK3_FMQC)) { /* any resources available? */
923 lp->irq_mask |= ICR_TXDM | ICR_RXDM; /* enable the interrupt source */
924 csr &= ~(CSR_TXD | CSR_RXD); /* ensure restart of a stalled TX or RX */
925 outb(csr, EWRK3_CSR);
926 netif_wake_queue(dev);
927 } else {
928 lp->irq_mask &= ~(ICR_TXDM | ICR_RXDM); /* disable the interrupt source */
929 }
930
931 /* Unmask the EWRK3 board interrupts and turn off the LED */
932 cr &= ~(lp->led_mask);
933 outb(cr, EWRK3_CR);
934 ENABLE_IRQs;
935 spin_unlock(&lp->hw_lock);
936 return IRQ_HANDLED;
937}
938
939/* Called with lp->hw_lock held */
940static int ewrk3_rx(struct net_device *dev)
941{
942 struct ewrk3_private *lp = netdev_priv(dev);
943 u_long iobase = dev->base_addr;
944 int i, status = 0;
945 u_char page;
946 void __iomem *buf = NULL;
947
948 while (inb(EWRK3_RQC) && !status) { /* Whilst there's incoming data */
949 if ((page = inb(EWRK3_RQ)) < lp->mPage) { /* Get next entry's buffer page */
950 /*
951 ** Set up shared memory window and pointer into the window
952 */
953 if (lp->shmem_length == IO_ONLY) {
954 outb(page, EWRK3_IOPR);
955 } else if (lp->shmem_length == SHMEM_2K) {
956 buf = lp->shmem;
957 outb(page, EWRK3_MPR);
958 } else if (lp->shmem_length == SHMEM_32K) {
959 buf = (((short) page << 11) & 0x7800) + lp->shmem;
960 outb((page >> 4), EWRK3_MPR);
961 } else if (lp->shmem_length == SHMEM_64K) {
962 buf = (((short) page << 11) & 0xf800) + lp->shmem;
963 outb((page >> 5), EWRK3_MPR);
964 } else {
965 status = -1;
966 printk("%s: Oops - your private data area is hosed!\n", dev->name);
967 }
968
969 if (!status) {
970 char rx_status;
971 int pkt_len;
972
973 if (lp->shmem_length == IO_ONLY) {
974 rx_status = inb(EWRK3_DATA);
975 pkt_len = inb(EWRK3_DATA);
976 pkt_len |= ((u_short) inb(EWRK3_DATA) << 8);
977 } else {
978 rx_status = readb(buf);
979 buf += 1;
980 pkt_len = readw(buf);
981 buf += 3;
982 }
983
984 if (!(rx_status & R_ROK)) { /* There was an error. */
985 lp->stats.rx_errors++; /* Update the error stats. */
986 if (rx_status & R_DBE)
987 lp->stats.rx_frame_errors++;
988 if (rx_status & R_CRC)
989 lp->stats.rx_crc_errors++;
990 if (rx_status & R_PLL)
991 lp->stats.rx_fifo_errors++;
992 } else {
993 struct sk_buff *skb;
994
995 if ((skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
996 unsigned char *p;
997 skb->dev = dev;
998 skb_reserve(skb, 2); /* Align to 16 bytes */
999 p = skb_put(skb, pkt_len);
1000
1001 if (lp->shmem_length == IO_ONLY) {
1002 *p = inb(EWRK3_DATA); /* dummy read */
1003 for (i = 0; i < pkt_len; i++) {
1004 *p++ = inb(EWRK3_DATA);
1005 }
1006 } else {
1007 memcpy_fromio(p, buf, pkt_len);
1008 }
1009
1010 for (i = 1; i < EWRK3_PKT_STAT_SZ - 1; i++) {
1011 if (pkt_len < i * EWRK3_PKT_BIN_SZ) {
1012 lp->pktStats.bins[i]++;
1013 i = EWRK3_PKT_STAT_SZ;
1014 }
1015 }
1016 p = skb->data; /* Look at the dest addr */
1017 if (p[0] & 0x01) { /* Multicast/Broadcast */
1018 if ((*(s16 *) & p[0] == -1) && (*(s16 *) & p[2] == -1) && (*(s16 *) & p[4] == -1)) {
1019 lp->pktStats.broadcast++;
1020 } else {
1021 lp->pktStats.multicast++;
1022 }
1023 } else if ((*(s16 *) & p[0] == *(s16 *) & dev->dev_addr[0]) &&
1024 (*(s16 *) & p[2] == *(s16 *) & dev->dev_addr[2]) &&
1025 (*(s16 *) & p[4] == *(s16 *) & dev->dev_addr[4])) {
1026 lp->pktStats.unicast++;
1027 }
1028 lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */
1029 if (lp->pktStats.bins[0] == 0) { /* Reset counters */
1030 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1031 }
1032 /*
1033 ** Notify the upper protocol layers that there is another
1034 ** packet to handle
1035 */
1036 skb->protocol = eth_type_trans(skb, dev);
1037 netif_rx(skb);
1038
1039 /*
1040 ** Update stats
1041 */
1042 dev->last_rx = jiffies;
1043 lp->stats.rx_packets++;
1044 lp->stats.rx_bytes += pkt_len;
1045 } else {
1046 printk("%s: Insufficient memory; nuking packet.\n", dev->name);
1047 lp->stats.rx_dropped++; /* Really, deferred. */
1048 break;
1049 }
1050 }
1051 }
1052 /*
1053 ** Return the received buffer to the free memory queue
1054 */
1055 outb(page, EWRK3_FMQ);
1056 } else {
1057 printk("ewrk3_rx(): Illegal page number, page %d\n", page);
1058 printk("ewrk3_rx(): CSR: %02x ICR: %02x FMQC: %02x\n", inb(EWRK3_CSR), inb(EWRK3_ICR), inb(EWRK3_FMQC));
1059 }
1060 }
1061 return status;
1062}
1063
1064/*
1065** Buffer sent - check for TX buffer errors.
1066** Called with lp->hw_lock held
1067*/
1068static int ewrk3_tx(struct net_device *dev)
1069{
1070 struct ewrk3_private *lp = netdev_priv(dev);
1071 u_long iobase = dev->base_addr;
1072 u_char tx_status;
1073
1074 while ((tx_status = inb(EWRK3_TDQ)) > 0) { /* Whilst there's old buffers */
1075 if (tx_status & T_VSTS) { /* The status is valid */
1076 if (tx_status & T_TXE) {
1077 lp->stats.tx_errors++;
1078 if (tx_status & T_NCL)
1079 lp->stats.tx_carrier_errors++;
1080 if (tx_status & T_LCL)
1081 lp->stats.tx_window_errors++;
1082 if (tx_status & T_CTU) {
1083 if ((tx_status & T_COLL) ^ T_XUR) {
1084 lp->pktStats.tx_underruns++;
1085 } else {
1086 lp->pktStats.excessive_underruns++;
1087 }
1088 } else if (tx_status & T_COLL) {
1089 if ((tx_status & T_COLL) ^ T_XCOLL) {
1090 lp->stats.collisions++;
1091 } else {
1092 lp->pktStats.excessive_collisions++;
1093 }
1094 }
1095 } else {
1096 lp->stats.tx_packets++;
1097 }
1098 }
1099 }
1100
1101 return 0;
1102}
1103
1104static int ewrk3_close(struct net_device *dev)
1105{
1106 struct ewrk3_private *lp = netdev_priv(dev);
1107 u_long iobase = dev->base_addr;
1108 u_char icr, csr;
1109
1110 netif_stop_queue(dev);
6aa20a22 1111
1da177e4
LT		 1112 if (ewrk3_debug > 1) {
1113 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1114 dev->name, inb(EWRK3_CSR));
1115 }
1116 /*
1117 ** We stop the EWRK3 here... mask interrupts and stop TX & RX
1118 */
1119 DISABLE_IRQs;
1120
1121 STOP_EWRK3;
1122
1123 /*
1124 ** Clean out the TX and RX queues here (note that one entry
1125 ** may get added to either the TXD or RX queues if the TX or RX
1126 ** just starts processing a packet before the STOP_EWRK3 command
1127 ** is received. This will be flushed in the ewrk3_open() call).
1128 */
1129 while (inb(EWRK3_TQ));
1130 while (inb(EWRK3_TDQ));
1131 while (inb(EWRK3_RQ));
1132
1133 if (!lp->hard_strapped) {
1134 free_irq(dev->irq, dev);
1135 }
1136 return 0;
1137}
1138
1139static struct net_device_stats *ewrk3_get_stats(struct net_device *dev)
1140{
1141 struct ewrk3_private *lp = netdev_priv(dev);
1142
1143 /* Null body since there is no framing error counter */
1144 return &lp->stats;
1145}
1146
1147/*
1148 ** Set or clear the multicast filter for this adapter.
1149 */
1150static void set_multicast_list(struct net_device *dev)
1151{
1152 struct ewrk3_private *lp = netdev_priv(dev);
1153 u_long iobase = dev->base_addr;
1154 u_char csr;
1155
1156 csr = inb(EWRK3_CSR);
1157
1158 if (lp->shmem_length == IO_ONLY) {
1159 lp->mctbl = NULL;
1160 } else {
1161 lp->mctbl = lp->shmem + PAGE0_HTE;
1162 }
1163
1164 csr &= ~(CSR_PME | CSR_MCE);
1165 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
1166 csr |= CSR_PME;
1167 outb(csr, EWRK3_CSR);
1168 } else {
1169 SetMulticastFilter(dev);
1170 csr |= CSR_MCE;
1171 outb(csr, EWRK3_CSR);
1172 }
1173}
1174
1175/*
1176 ** Calculate the hash code and update the logical address filter
1177 ** from a list of ethernet multicast addresses.
1178 ** Little endian crc one liner from Matt Thomas, DEC.
1179 **
1180 ** Note that when clearing the table, the broadcast bit must remain asserted
1181 ** to receive broadcast messages.
1182 */
1183static void SetMulticastFilter(struct net_device *dev)
1184{
1185 struct ewrk3_private *lp = netdev_priv(dev);
1186 struct dev_mc_list *dmi = dev->mc_list;
1187 u_long iobase = dev->base_addr;
1188 int i;
1189 char *addrs, bit, byte;
1190 short __iomem *p = lp->mctbl;
1191 u16 hashcode;
1192 u32 crc;
1193
1194 spin_lock_irq(&lp->hw_lock);
1195
1196 if (lp->shmem_length == IO_ONLY) {
1197 outb(0, EWRK3_IOPR);
1198 outw(PAGE0_HTE, EWRK3_PIR1);
1199 } else {
1200 outb(0, EWRK3_MPR);
1201 }
1202
1203 if (dev->flags & IFF_ALLMULTI) {
1204 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1205 if (lp->shmem_length == IO_ONLY) {
1206 outb(0xff, EWRK3_DATA);
1207 } else { /* memset didn't work here */
1208 writew(0xffff, p);
1209 p++;
1210 i++;
1211 }
1212 }
1213 } else {
1214 /* Clear table except for broadcast bit */
1215 if (lp->shmem_length == IO_ONLY) {
1216 for (i = 0; i < (HASH_TABLE_LEN >> 4) - 1; i++) {
1217 outb(0x00, EWRK3_DATA);
1218 }
1219 outb(0x80, EWRK3_DATA);
1220 i++; /* insert the broadcast bit */
1221 for (; i < (HASH_TABLE_LEN >> 3); i++) {
1222 outb(0x00, EWRK3_DATA);
1223 }
1224 } else {
1225 memset_io(lp->mctbl, 0, HASH_TABLE_LEN >> 3);
1226 writeb(0x80, lp->mctbl + (HASH_TABLE_LEN >> 4) - 1);
1227 }
1228
1229 /* Update table */
1230 for (i = 0; i < dev->mc_count; i++) { /* for each address in the list */
1231 addrs = dmi->dmi_addr;
1232 dmi = dmi->next;
1233 if ((*addrs & 0x01) == 1) { /* multicast address? */
1234 crc = ether_crc_le(ETH_ALEN, addrs);
1235 hashcode = crc & ((1 << 9) - 1); /* hashcode is 9 LSb of CRC */
1236
1237 byte = hashcode >> 3; /* bit[3-8] -> byte in filter */
1238 bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */
1239
1240 if (lp->shmem_length == IO_ONLY) {
1241 u_char tmp;
1242
1243 outw(PAGE0_HTE + byte, EWRK3_PIR1);
1244 tmp = inb(EWRK3_DATA);
1245 tmp |= bit;
1246 outw(PAGE0_HTE + byte, EWRK3_PIR1);
1247 outb(tmp, EWRK3_DATA);
1248 } else {
1249 writeb(readb(lp->mctbl + byte) | bit, lp->mctbl + byte);
1250 }
1251 }
1252 }
1253 }
1254
1255 spin_unlock_irq(&lp->hw_lock);
1256}
1257
1258/*
1259 ** ISA bus I/O device probe
1260 */
1261static int __init isa_probe(struct net_device *dev, u_long ioaddr)
1262{
1263 int i = num_ewrks3s, maxSlots;
1264 int ret = -ENODEV;
1265
1266 u_long iobase;
1267
1268 if (ioaddr >= 0x400)
1269 goto out;
1270
1271 if (ioaddr == 0) { /* Autoprobing */
1272 iobase = EWRK3_IO_BASE; /* Get the first slot address */
1273 maxSlots = 24;
1274 } else { /* Probe a specific location */
1275 iobase = ioaddr;
1276 maxSlots = i + 1;
1277 }
1278
1279 for (; (i < maxSlots) && (dev != NULL);
1280 iobase += EWRK3_IOP_INC, i++)
1281 {
1282 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME)) {
1283 if (DevicePresent(iobase) == 0) {
1284 int irq = dev->irq;
1285 ret = ewrk3_hw_init(dev, iobase);
1286 if (!ret)
1287 break;
1288 dev->irq = irq;
1289 }
1290 release_region(iobase, EWRK3_TOTAL_SIZE);
1291 }
1292 }
1293 out:
1294
1295 return ret;
1296}
1297
1298/*
1299 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1300 ** the motherboard.
1301 */
1302static int __init eisa_probe(struct net_device *dev, u_long ioaddr)
1303{
1304 int i, maxSlots;
1305 u_long iobase;
1306 int ret = -ENODEV;
1307
1308 if (ioaddr < 0x1000)
1309 goto out;
1310
6835d09a
AB		 1311 iobase = ioaddr;
1312 i = (ioaddr >> 12);
1313 maxSlots = i + 1;
1da177e4
LT		 1314
1315 for (i = 1; (i < maxSlots) && (dev != NULL); i++, iobase += EISA_SLOT_INC) {
1316 if (EISA_signature(name, EISA_ID) == 0) {
1317 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME) &&
1318 DevicePresent(iobase) == 0) {
1319 int irq = dev->irq;
1320 ret = ewrk3_hw_init(dev, iobase);
1321 if (!ret)
1322 break;
1323 dev->irq = irq;
1324 }
1325 release_region(iobase, EWRK3_TOTAL_SIZE);
1326 }
1327 }
1328
1329 out:
1330 return ret;
1331}
1332
1333
1334/*
1335 ** Read the EWRK3 EEPROM using this routine
1336 */
1337static int Read_EEPROM(u_long iobase, u_char eaddr)
1338{
1339 int i;
1340
1341 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1342 outb(EEPROM_RD, EWRK3_IOPR); /* issue read command */
1343 for (i = 0; i < 5000; i++)
1344 inb(EWRK3_CSR); /* wait 1msec */
1345
1346 return inw(EWRK3_EPROM1); /* 16 bits data return */
1347}
1348
1349/*
1350 ** Write the EWRK3 EEPROM using this routine
1351 */
1352static int Write_EEPROM(short data, u_long iobase, u_char eaddr)
1353{
1354 int i;
1355
1356 outb(EEPROM_WR_EN, EWRK3_IOPR); /* issue write enable command */
1357 for (i = 0; i < 5000; i++)
1358 inb(EWRK3_CSR); /* wait 1msec */
1359 outw(data, EWRK3_EPROM1); /* write data to register */
1360 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1361 outb(EEPROM_WR, EWRK3_IOPR); /* issue write command */
1362 for (i = 0; i < 75000; i++)
1363 inb(EWRK3_CSR); /* wait 15msec */
1364 outb(EEPROM_WR_DIS, EWRK3_IOPR); /* issue write disable command */
1365 for (i = 0; i < 5000; i++)
1366 inb(EWRK3_CSR); /* wait 1msec */
1367
1368 return 0;
1369}
1370
1371/*
1372 ** Look for a particular board name in the on-board EEPROM.
1373 */
1374static void __init EthwrkSignature(char *name, char *eeprom_image)
1375{
1376 int i;
1377 char *signatures[] = EWRK3_SIGNATURE;
1378
1379 for (i=0; *signatures[i] != '\0'; i++)
1380 if( !strncmp(eeprom_image+EEPROM_PNAME7, signatures[i], strlen(signatures[i])) )
1381 break;
1382
1383 if (*signatures[i] != '\0') {
1384 memcpy(name, eeprom_image+EEPROM_PNAME7, EWRK3_STRLEN);
1385 name[EWRK3_STRLEN] = '\0';
1386 } else
1387 name[0] = '\0';
1388
1389 return;
1390}
1391
1392/*
1393 ** Look for a special sequence in the Ethernet station address PROM that
1394 ** is common across all EWRK3 products.
1395 **
1396 ** Search the Ethernet address ROM for the signature. Since the ROM address
1397 ** counter can start at an arbitrary point, the search must include the entire
1398 ** probe sequence length plus the (length_of_the_signature - 1).
1399 ** Stop the search IMMEDIATELY after the signature is found so that the
1400 ** PROM address counter is correctly positioned at the start of the
1401 ** ethernet address for later read out.
1402 */
1403
1404static int __init DevicePresent(u_long iobase)
1405{
1406 union {
1407 struct {
1408 u32 a;
1409 u32 b;
1410 } llsig;
1411 char Sig[sizeof(u32) << 1];
1412 }
1413 dev;
1414 short sigLength;
1415 char data;
1416 int i, j, status = 0;
1417
1418 dev.llsig.a = ETH_PROM_SIG;
1419 dev.llsig.b = ETH_PROM_SIG;
1420 sigLength = sizeof(u32) << 1;
1421
1422 for (i = 0, j = 0; j < sigLength && i < PROBE_LENGTH + sigLength - 1; i++) {
1423 data = inb(EWRK3_APROM);
1424 if (dev.Sig[j] == data) { /* track signature */
1425 j++;
1426 } else { /* lost signature; begin search again */
1427 if (data == dev.Sig[0]) {
1428 j = 1;
1429 } else {
1430 j = 0;
1431 }
1432 }
1433 }
1434
1435 if (j != sigLength) {
1436 status = -ENODEV; /* search failed */
1437 }
1438 return status;
1439}
1440
1441static u_char __init get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType)
1442{
1443 int i, j, k;
1444 u_short chksum;
1445 u_char crc, lfsr, sd, status = 0;
1446 u_long iobase = dev->base_addr;
1447 u16 tmp;
1448
1449 if (chipType == LeMAC2) {
1450 for (crc = 0x6a, j = 0; j < ETH_ALEN; j++) {
1451 sd = dev->dev_addr[j] = eeprom_image[EEPROM_PADDR0 + j];
1452 outb(dev->dev_addr[j], EWRK3_PAR0 + j);
1453 for (k = 0; k < 8; k++, sd >>= 1) {
1454 lfsr = ((((crc & 0x02) >> 1) ^ (crc & 0x01)) ^ (sd & 0x01)) << 7;
1455 crc = (crc >> 1) + lfsr;
1456 }
1457 }
1458 if (crc != eeprom_image[EEPROM_PA_CRC])
1459 status = -1;
1460 } else {
1461 for (i = 0, k = 0; i < ETH_ALEN;) {
1462 k <<= 1;
1463 if (k > 0xffff)
1464 k -= 0xffff;
1465
1466 k += (u_char) (tmp = inb(EWRK3_APROM));
1467 dev->dev_addr[i] = (u_char) tmp;
1468 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1469 i++;
1470 k += (u_short) ((tmp = inb(EWRK3_APROM)) << 8);
1471 dev->dev_addr[i] = (u_char) tmp;
1472 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1473 i++;
1474
1475 if (k > 0xffff)
1476 k -= 0xffff;
1477 }
1478 if (k == 0xffff)
1479 k = 0;
1480 chksum = inb(EWRK3_APROM);
1481 chksum |= (inb(EWRK3_APROM) << 8);
1482 if (k != chksum)
1483 status = -1;
1484 }
1485
1486 return status;
1487}
1488
1489/*
1490 ** Look for a particular board name in the EISA configuration space
1491 */
1492static int __init EISA_signature(char *name, s32 eisa_id)
1493{
1494 u_long i;
1495 char *signatures[] = EWRK3_SIGNATURE;
1496 char ManCode[EWRK3_STRLEN];
1497 union {
1498 s32 ID;
1499 char Id[4];
1500 } Eisa;
1501 int status = 0;
1502
1503 *name = '\0';
1504 for (i = 0; i < 4; i++) {
1505 Eisa.Id[i] = inb(eisa_id + i);
1506 }
1507
1508 ManCode[0] = (((Eisa.Id[0] >> 2) & 0x1f) + 0x40);
1509 ManCode[1] = (((Eisa.Id[1] & 0xe0) >> 5) + ((Eisa.Id[0] & 0x03) << 3) + 0x40);
1510 ManCode[2] = (((Eisa.Id[2] >> 4) & 0x0f) + 0x30);
1511 ManCode[3] = ((Eisa.Id[2] & 0x0f) + 0x30);
1512 ManCode[4] = (((Eisa.Id[3] >> 4) & 0x0f) + 0x30);
1513 ManCode[5] = '\0';
1514
1515 for (i = 0; (*signatures[i] != '\0') && (*name == '\0'); i++) {
1516 if (strstr(ManCode, signatures[i]) != NULL) {
1517 strcpy(name, ManCode);
1518 status = 1;
1519 }
1520 }
1521
1522 return status; /* return the device name string */
1523}
1524
1525static void ewrk3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1526{
1527 int fwrev = Read_EEPROM(dev->base_addr, EEPROM_REVLVL);
1528
1529 strcpy(info->driver, DRV_NAME);
1530 strcpy(info->version, DRV_VERSION);
1531 sprintf(info->fw_version, "%d", fwrev);
1532 strcpy(info->bus_info, "N/A");
1533 info->eedump_len = EEPROM_MAX;
1534}
1535
1536static int ewrk3_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1537{
1538 struct ewrk3_private *lp = netdev_priv(dev);
1539 unsigned long iobase = dev->base_addr;
1540 u8 cr = inb(EWRK3_CR);
1541
1542 switch (lp->adapter_name[4]) {
1543 case '3': /* DE203 */
1544 ecmd->supported = SUPPORTED_BNC;
1545 ecmd->port = PORT_BNC;
1546 break;
1547
1548 case '4': /* DE204 */
1549 ecmd->supported = SUPPORTED_TP;
1550 ecmd->port = PORT_TP;
1551 break;
1552
1553 case '5': /* DE205 */
1554 ecmd->supported = SUPPORTED_TP | SUPPORTED_BNC | SUPPORTED_AUI;
1555 ecmd->autoneg = !(cr & CR_APD);
1556 /*
1557 ** Port is only valid if autoneg is disabled
1558 ** and even then we don't know if AUI is jumpered.
1559 */
1560 if (!ecmd->autoneg)
1561 ecmd->port = (cr & CR_PSEL) ? PORT_BNC : PORT_TP;
1562 break;
1563 }
1564
1565 ecmd->supported |= SUPPORTED_10baseT_Half;
1566 ecmd->speed = SPEED_10;
1567 ecmd->duplex = DUPLEX_HALF;
1568 return 0;
1569}
1570
1571static int ewrk3_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1572{
1573 struct ewrk3_private *lp = netdev_priv(dev);
1574 unsigned long iobase = dev->base_addr;
1575 unsigned long flags;
1576 u8 cr;
1577
1578 /* DE205 is the only card with anything to set */
1579 if (lp->adapter_name[4] != '5')
1580 return -EOPNOTSUPP;
1581
1582 /* Sanity-check parameters */
1583 if (ecmd->speed != SPEED_10)
1584 return -EINVAL;
1585 if (ecmd->port != PORT_TP && ecmd->port != PORT_BNC)
1586 return -EINVAL; /* AUI is not software-selectable */
1587 if (ecmd->transceiver != XCVR_INTERNAL)
1588 return -EINVAL;
1589 if (ecmd->duplex != DUPLEX_HALF)
1590 return -EINVAL;
1591 if (ecmd->phy_address != 0)
1592 return -EINVAL;
1593
1594 spin_lock_irqsave(&lp->hw_lock, flags);
1595 cr = inb(EWRK3_CR);
1596
1597 /* If Autoneg is set, change to Auto Port mode */
1598 /* Otherwise, disable Auto Port and set port explicitly */
1599 if (ecmd->autoneg) {
1600 cr &= ~CR_APD;
1601 } else {
1602 cr |= CR_APD;
1603 if (ecmd->port == PORT_TP)
1604 cr &= ~CR_PSEL; /* Force TP */
1605 else
1606 cr |= CR_PSEL; /* Force BNC */
1607 }
1608
1609 /* Commit the changes */
1610 outb(cr, EWRK3_CR);
1611 spin_unlock_irqrestore(&lp->hw_lock, flags);
1612 return 0;
1613}
1614
1615static u32 ewrk3_get_link(struct net_device *dev)
1616{
1617 unsigned long iobase = dev->base_addr;
1618 u8 cmr = inb(EWRK3_CMR);
1619 /* DE203 has BNC only and link status does not apply */
1620 /* On DE204 this is always valid since TP is the only port. */
1621 /* On DE205 this reflects TP status even if BNC or AUI is selected. */
1622 return !(cmr & CMR_LINK);
1623}
1624
1625static int ewrk3_phys_id(struct net_device *dev, u32 data)
1626{
1627 struct ewrk3_private *lp = netdev_priv(dev);
1628 unsigned long iobase = dev->base_addr;
1629 unsigned long flags;
1630 u8 cr;
1631 int count;
1632
1633 /* Toggle LED 4x per second */
1634 count = data << 2;
1635
1636 spin_lock_irqsave(&lp->hw_lock, flags);
1637
1638 /* Bail if a PHYS_ID is already in progress */
1639 if (lp->led_mask == 0) {
1640 spin_unlock_irqrestore(&lp->hw_lock, flags);
1641 return -EBUSY;
1642 }
1643
1644 /* Prevent ISR from twiddling the LED */
1645 lp->led_mask = 0;
1646
1647 while (count--) {
1648 /* Toggle the LED */
1649 cr = inb(EWRK3_CR);
1650 outb(cr ^ CR_LED, EWRK3_CR);
1651
1652 /* Wait a little while */
1653 spin_unlock_irqrestore(&lp->hw_lock, flags);
1654 msleep(250);
1655 spin_lock_irqsave(&lp->hw_lock, flags);
1656
1657 /* Exit if we got a signal */
1658 if (signal_pending(current))
1659 break;
1660 }
1661
1662 lp->led_mask = CR_LED;
1663 cr = inb(EWRK3_CR);
1664 outb(cr & ~CR_LED, EWRK3_CR);
1665 spin_unlock_irqrestore(&lp->hw_lock, flags);
1666 return signal_pending(current) ? -ERESTARTSYS : 0;
1667}
1668
7282d491 1669static const struct ethtool_ops ethtool_ops_203 = {
1da177e4
LT		 1670 .get_drvinfo = ewrk3_get_drvinfo,
1671 .get_settings = ewrk3_get_settings,
1672 .set_settings = ewrk3_set_settings,
1673 .phys_id = ewrk3_phys_id,
1674};
1675
7282d491 1676static const struct ethtool_ops ethtool_ops = {
1da177e4
LT		 1677 .get_drvinfo = ewrk3_get_drvinfo,
1678 .get_settings = ewrk3_get_settings,
1679 .set_settings = ewrk3_set_settings,
1680 .get_link = ewrk3_get_link,
1681 .phys_id = ewrk3_phys_id,
1682};
1683
1684/*
1685 ** Perform IOCTL call functions here. Some are privileged operations and the
1686 ** effective uid is checked in those cases.
1687 */
1688static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1689{
1690 struct ewrk3_private *lp = netdev_priv(dev);
1691 struct ewrk3_ioctl *ioc = (struct ewrk3_ioctl *) &rq->ifr_ifru;
1692 u_long iobase = dev->base_addr;
1693 int i, j, status = 0;
1694 u_char csr;
1695 unsigned long flags;
1696 union ewrk3_addr {
1697 u_char addr[HASH_TABLE_LEN * ETH_ALEN];
1698 u_short val[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1699 };
6aa20a22 1700
1da177e4
LT		 1701 union ewrk3_addr *tmp;
1702
1703 /* All we handle are private IOCTLs */
1704 if (cmd != EWRK3IOCTL)
1705 return -EOPNOTSUPP;
1706
1707 tmp = kmalloc(sizeof(union ewrk3_addr), GFP_KERNEL);
1708 if(tmp==NULL)
1709 return -ENOMEM;
1710
1711 switch (ioc->cmd) {
1712 case EWRK3_GET_HWADDR: /* Get the hardware address */
1713 for (i = 0; i < ETH_ALEN; i++) {
1714 tmp->addr[i] = dev->dev_addr[i];
1715 }
1716 ioc->len = ETH_ALEN;
1717 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1718 status = -EFAULT;
1719 break;
6aa20a22 1720
1da177e4
LT		 1721 case EWRK3_SET_HWADDR: /* Set the hardware address */
1722 if (capable(CAP_NET_ADMIN)) {
1723 spin_lock_irqsave(&lp->hw_lock, flags);
1724 csr = inb(EWRK3_CSR);
1725 csr |= (CSR_TXD | CSR_RXD);
1726 outb(csr, EWRK3_CSR); /* Disable the TX and RX */
1727 spin_unlock_irqrestore(&lp->hw_lock, flags);
1728
1729 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN)) {
1730 status = -EFAULT;
1731 break;
1732 }
1733 spin_lock_irqsave(&lp->hw_lock, flags);
1734 for (i = 0; i < ETH_ALEN; i++) {
1735 dev->dev_addr[i] = tmp->addr[i];
1736 outb(tmp->addr[i], EWRK3_PAR0 + i);
1737 }
1738
1739 csr = inb(EWRK3_CSR);
1740 csr &= ~(CSR_TXD | CSR_RXD); /* Enable the TX and RX */
1741 outb(csr, EWRK3_CSR);
1742 spin_unlock_irqrestore(&lp->hw_lock, flags);
1743 } else {
1744 status = -EPERM;
1745 }
1746
1747 break;
1748 case EWRK3_SET_PROM: /* Set Promiscuous Mode */
1749 if (capable(CAP_NET_ADMIN)) {
1750 spin_lock_irqsave(&lp->hw_lock, flags);
1751 csr = inb(EWRK3_CSR);
1752 csr |= CSR_PME;
1753 csr &= ~CSR_MCE;
1754 outb(csr, EWRK3_CSR);
1755 spin_unlock_irqrestore(&lp->hw_lock, flags);
1756 } else {
1757 status = -EPERM;
1758 }
1759
1760 break;
1761 case EWRK3_CLR_PROM: /* Clear Promiscuous Mode */
1762 if (capable(CAP_NET_ADMIN)) {
1763 spin_lock_irqsave(&lp->hw_lock, flags);
1764 csr = inb(EWRK3_CSR);
1765 csr &= ~CSR_PME;
1766 outb(csr, EWRK3_CSR);
1767 spin_unlock_irqrestore(&lp->hw_lock, flags);
1768 } else {
1769 status = -EPERM;
1770 }
1771
1772 break;
1773 case EWRK3_GET_MCA: /* Get the multicast address table */
1774 spin_lock_irqsave(&lp->hw_lock, flags);
1775 if (lp->shmem_length == IO_ONLY) {
1776 outb(0, EWRK3_IOPR);
1777 outw(PAGE0_HTE, EWRK3_PIR1);
1778 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1779 tmp->addr[i] = inb(EWRK3_DATA);
1780 }
1781 } else {
1782 outb(0, EWRK3_MPR);
1783 memcpy_fromio(tmp->addr, lp->shmem + PAGE0_HTE, (HASH_TABLE_LEN >> 3));
1784 }
1785 spin_unlock_irqrestore(&lp->hw_lock, flags);
1786
1787 ioc->len = (HASH_TABLE_LEN >> 3);
1788 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1789 status = -EFAULT;
1790
1791 break;
1792 case EWRK3_SET_MCA: /* Set a multicast address */
1793 if (capable(CAP_NET_ADMIN)) {
1794 if (ioc->len > 1024)
1795 {
1796 status = -EINVAL;
1797 break;
1798 }
1799 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN * ioc->len)) {
1800 status = -EFAULT;
1801 break;
1802 }
1803 set_multicast_list(dev);
1804 } else {
1805 status = -EPERM;
1806 }
1807
1808 break;
1809 case EWRK3_CLR_MCA: /* Clear all multicast addresses */
1810 if (capable(CAP_NET_ADMIN)) {
1811 set_multicast_list(dev);
1812 } else {
1813 status = -EPERM;
1814 }
1815
1816 break;
1817 case EWRK3_MCA_EN: /* Enable multicast addressing */
1818 if (capable(CAP_NET_ADMIN)) {
1819 spin_lock_irqsave(&lp->hw_lock, flags);
1820 csr = inb(EWRK3_CSR);
1821 csr |= CSR_MCE;
1822 csr &= ~CSR_PME;
1823 outb(csr, EWRK3_CSR);
1824 spin_unlock_irqrestore(&lp->hw_lock, flags);
1825 } else {
1826 status = -EPERM;
1827 }
1828
1829 break;
1830 case EWRK3_GET_STATS: { /* Get the driver statistics */
1831 struct ewrk3_stats *tmp_stats =
1832 kmalloc(sizeof(lp->pktStats), GFP_KERNEL);
1833 if (!tmp_stats) {
1834 status = -ENOMEM;
1835 break;
1836 }
1837
1838 spin_lock_irqsave(&lp->hw_lock, flags);
1839 memcpy(tmp_stats, &lp->pktStats, sizeof(lp->pktStats));
1840 spin_unlock_irqrestore(&lp->hw_lock, flags);
1841
1842 ioc->len = sizeof(lp->pktStats);
1843 if (copy_to_user(ioc->data, tmp_stats, sizeof(lp->pktStats)))
1844 status = -EFAULT;
1845 kfree(tmp_stats);
1846 break;
1847 }
1848 case EWRK3_CLR_STATS: /* Zero out the driver statistics */
1849 if (capable(CAP_NET_ADMIN)) {
1850 spin_lock_irqsave(&lp->hw_lock, flags);
1851 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1852 spin_unlock_irqrestore(&lp->hw_lock,flags);
1853 } else {
1854 status = -EPERM;
1855 }
1856
1857 break;
1858 case EWRK3_GET_CSR: /* Get the CSR Register contents */
1859 tmp->addr[0] = inb(EWRK3_CSR);
1860 ioc->len = 1;
1861 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1862 status = -EFAULT;
1863 break;
1864 case EWRK3_SET_CSR: /* Set the CSR Register contents */
1865 if (capable(CAP_NET_ADMIN)) {
1866 if (copy_from_user(tmp->addr, ioc->data, 1)) {
1867 status = -EFAULT;
1868 break;
1869 }
1870 outb(tmp->addr[0], EWRK3_CSR);
1871 } else {
1872 status = -EPERM;
1873 }
1874
1875 break;
1876 case EWRK3_GET_EEPROM: /* Get the EEPROM contents */
1877 if (capable(CAP_NET_ADMIN)) {
1878 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1879 tmp->val[i] = (short) Read_EEPROM(iobase, i);
1880 }
1881 i = EEPROM_MAX;
1882 tmp->addr[i++] = inb(EWRK3_CMR); /* Config/Management Reg. */
1883 for (j = 0; j < ETH_ALEN; j++) {
1884 tmp->addr[i++] = inb(EWRK3_PAR0 + j);
1885 }
1886 ioc->len = EEPROM_MAX + 1 + ETH_ALEN;
1887 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1888 status = -EFAULT;
1889 } else {
1890 status = -EPERM;
1891 }
1892
1893 break;
1894 case EWRK3_SET_EEPROM: /* Set the EEPROM contents */
1895 if (capable(CAP_NET_ADMIN)) {
1896 if (copy_from_user(tmp->addr, ioc->data, EEPROM_MAX)) {
1897 status = -EFAULT;
1898 break;
1899 }
1900 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1901 Write_EEPROM(tmp->val[i], iobase, i);
1902 }
1903 } else {
1904 status = -EPERM;
1905 }
1906
1907 break;
1908 case EWRK3_GET_CMR: /* Get the CMR Register contents */
1909 tmp->addr[0] = inb(EWRK3_CMR);
1910 ioc->len = 1;
1911 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1912 status = -EFAULT;
1913 break;
1914 case EWRK3_SET_TX_CUT_THRU: /* Set TX cut through mode */
1915 if (capable(CAP_NET_ADMIN)) {
1916 lp->txc = 1;
1917 } else {
1918 status = -EPERM;
1919 }
1920
1921 break;
1922 case EWRK3_CLR_TX_CUT_THRU: /* Clear TX cut through mode */
1923 if (capable(CAP_NET_ADMIN)) {
1924 lp->txc = 0;
1925 } else {
1926 status = -EPERM;
1927 }
1928
1929 break;
1930 default:
1931 status = -EOPNOTSUPP;
1932 }
1933 kfree(tmp);
1934 return status;
1935}
1936
1937#ifdef MODULE
1938static struct net_device *ewrk3_devs[MAX_NUM_EWRK3S];
1939static int ndevs;
1940static int io[MAX_NUM_EWRK3S+1] = { 0x300, 0, };
1941
1942/* '21' below should really be 'MAX_NUM_EWRK3S' */
1943module_param_array(io, int, NULL, 0);
1944module_param_array(irq, int, NULL, 0);
1945MODULE_PARM_DESC(io, "EtherWORKS 3 I/O base address(es)");
1946MODULE_PARM_DESC(irq, "EtherWORKS 3 IRQ number(s)");
1947
1948static __exit void ewrk3_exit_module(void)
1949{
1950 int i;
1951
1952 for( i=0; i<ndevs; i++ ) {
1953 struct net_device *dev = ewrk3_devs[i];
1954 struct ewrk3_private *lp = netdev_priv(dev);
1955 ewrk3_devs[i] = NULL;
1956 unregister_netdev(dev);
1957 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
1958 iounmap(lp->shmem);
1959 free_netdev(dev);
1960 }
1961}
1962
1963static __init int ewrk3_init_module(void)
1964{
1965 int i=0;
1966
1967 while( io[i] && irq[i] ) {
1968 struct net_device *dev
1969 = alloc_etherdev(sizeof(struct ewrk3_private));
1970
1971 if (!dev)
1972 break;
1973
1974 if (ewrk3_probe1(dev, io[i], irq[i]) != 0) {
1975 free_netdev(dev);
1976 break;
1977 }
1978
1979 ewrk3_devs[ndevs++] = dev;
1980 i++;
1981 }
1982
1983 return ndevs ? 0 : -EIO;
1984}
1985
1986
1987/* Hack for breakage in new module stuff */
1988module_exit(ewrk3_exit_module);
1989module_init(ewrk3_init_module);
1990#endif /* MODULE */
1991MODULE_LICENSE("GPL");
1992
6aa20a22 1993
1da177e4
LT		 1994
1995/*
1996 * Local variables:
1997 * compile-command: "gcc -D__KERNEL__ -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
1998 *
1999 * compile-command: "gcc -D__KERNEL__ -DMODULE -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
2000 * End:
2001 */
Clone of davem's net-next-2.6 tree