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1da177e4 1/* eth16i.c An ICL EtherTeam 16i and 32 EISA ethernet driver for Linux
6aa20a22 2
1da177e4 3 Written 1994-1999 by Mika Kuoppala
6aa20a22 4
1da177e4
LT		 5 Copyright (C) 1994-1999 by Mika Kuoppala
6 Based on skeleton.c and heavily on at1700.c by Donald Becker
7
8 This software may be used and distributed according to the terms
9 of the GNU General Public License, incorporated herein by reference.
10
11 The author may be reached as miku@iki.fi
12
13 This driver supports following cards :
14 - ICL EtherTeam 16i
6aa20a22 15 - ICL EtherTeam 32 EISA
1da177e4
LT		 16 (Uses true 32 bit transfers rather than 16i compability mode)
17
18 Example Module usage:
19 insmod eth16i.o io=0x2a0 mediatype=bnc
20
21 mediatype can be one of the following: bnc,tp,dix,auto,eprom
22
23 'auto' will try to autoprobe mediatype.
24 'eprom' will use whatever type defined in eprom.
25
26 I have benchmarked driver with PII/300Mhz as a ftp client
27 and 486/33Mhz as a ftp server. Top speed was 1128.37 kilobytes/sec.
6aa20a22 28
1da177e4
LT		 29 Sources:
30 - skeleton.c a sample network driver core for linux,
31 written by Donald Becker <becker@scyld.com>
6aa20a22 32 - at1700.c a driver for Allied Telesis AT1700, written
1da177e4
LT		 33 by Donald Becker.
34 - e16iSRV.asm a Netware 3.X Server Driver for ICL EtherTeam16i
35 written by Markku Viima
36 - The Fujitsu MB86965 databook.
6aa20a22
JG		 37
38 Author thanks following persons due to their valueble assistance:
1da177e4 39 Markku Viima (ICL)
6aa20a22 40 Ari Valve (ICL)
1da177e4
LT		 41 Donald Becker
42 Kurt Huwig <kurt@huwig.de>
43
44 Revision history:
45
46 Version Date Description
6aa20a22 47
1da177e4
LT		 48 0.01 15.12-94 Initial version (card detection)
49 0.02 23.01-95 Interrupt is now hooked correctly
50 0.03 01.02-95 Rewrote initialization part
51 0.04 07.02-95 Base skeleton done...
52 Made a few changes to signature checking
53 to make it a bit reliable.
54 - fixed bug in tx_buf mapping
55 - fixed bug in initialization (DLC_EN
56 wasn't enabled when initialization
57 was done.)
58 0.05 08.02-95 If there were more than one packet to send,
59 transmit was jammed due to invalid
60 register write...now fixed
6aa20a22 61 0.06 19.02-95 Rewrote interrupt handling
1da177e4
LT		 62 0.07 13.04-95 Wrote EEPROM read routines
63 Card configuration now set according to
64 data read from EEPROM
65 0.08 23.06-95 Wrote part that tries to probe used interface
66 port if AUTO is selected
67
68 0.09 01.09-95 Added module support
6aa20a22 69
1da177e4
LT		 70 0.10 04.09-95 Fixed receive packet allocation to work
71 with kernels > 1.3.x
1da177e4 72
6aa20a22
JG		 73 0.20 20.09-95 Added support for EtherTeam32 EISA
74
75 0.21 17.10-95 Removed the unnecessary extern
1da177e4
LT		 76 init_etherdev() declaration. Some
77 other cleanups.
6aa20a22 78
1da177e4
LT		 79 0.22 22.02-96 Receive buffer was not flushed
80 correctly when faulty packet was
81 received. Now fixed.
82
6aa20a22 83 0.23 26.02-96 Made resetting the adapter
1da177e4 84 more reliable.
6aa20a22 85
1da177e4
LT		 86 0.24 27.02-96 Rewrote faulty packet handling in eth16i_rx
87
88 0.25 22.05-96 kfree() was missing from cleanup_module.
89
6aa20a22 90 0.26 11.06-96 Sometimes card was not found by
1da177e4 91 check_signature(). Now made more reliable.
6aa20a22
JG		 92
93 0.27 23.06-96 Oops. 16 consecutive collisions halted
94 adapter. Now will try to retransmit
1da177e4 95 MAX_COL_16 times before finally giving up.
6aa20a22 96
1da177e4
LT		 97 0.28 28.10-97 Added dev_id parameter (NULL) for free_irq
98
99 0.29 29.10-97 Multiple card support for module users
100
101 0.30 30.10-97 Fixed irq allocation bug.
102 (request_irq moved from probe to open)
103
104 0.30a 21.08-98 Card detection made more relaxed. Driver
105 had problems with some TCP/IP-PROM boots
6aa20a22 106 to find the card. Suggested by
1da177e4
LT		 107 Kurt Huwig <kurt@huwig.de>
108
109 0.31 28.08-98 Media interface port can now be selected
110 with module parameters or kernel
6aa20a22 111 boot parameters.
1da177e4 112
6aa20a22 113 0.32 31.08-98 IRQ was never freed if open/close
1da177e4 114 pair wasn't called. Now fixed.
6aa20a22 115
1da177e4
LT		 116 0.33 10.09-98 When eth16i_open() was called after
117 eth16i_close() chip never recovered.
118 Now more shallow reset is made on
119 close.
120
121 0.34 29.06-99 Fixed one bad #ifdef.
122 Changed ioaddr -> io for consistency
123
124 0.35 01.07-99 transmit,-receive bytes were never
6aa20a22 125 updated in stats.
1da177e4
LT		 126
127 Bugs:
6aa20a22
JG		 128 In some cases the media interface autoprobing code doesn't find
129 the correct interface type. In this case you can
130 manually choose the interface type in DOS with E16IC.EXE which is
1da177e4
LT		 131 configuration software for EtherTeam16i and EtherTeam32 cards.
132 This is also true for IRQ setting. You cannot use module
6aa20a22 133 parameter to configure IRQ of the card (yet).
1da177e4
LT		 134
135 To do:
136 - Real multicast support
137 - Rewrite the media interface autoprobing code. Its _horrible_ !
138 - Possibly merge all the MB86965 specific code to external
139 module for use by eth16.c and Donald's at1700.c
140 - IRQ configuration with module parameter. I will do
141 this when i will get enough info about setting
142 irq without configuration utility.
143*/
144
6aa20a22 145static char *version =
1da177e4
LT		 146 "eth16i.c: v0.35 01-Jul-1999 Mika Kuoppala (miku@iki.fi)\n";
147
148#include <linux/module.h>
149#include <linux/kernel.h>
6aa20a22
JG		 150#include <linux/types.h>
151#include <linux/fcntl.h>
152#include <linux/interrupt.h>
153#include <linux/ioport.h>
154#include <linux/in.h>
155#include <linux/slab.h>
156#include <linux/string.h>
1da177e4
LT		 157#include <linux/errno.h>
158#include <linux/init.h>
159#include <linux/spinlock.h>
160#include <linux/netdevice.h>
161#include <linux/etherdevice.h>
162#include <linux/skbuff.h>
163#include <linux/bitops.h>
ff5688ae 164#include <linux/jiffies.h>
53d5ed62 165#include <linux/io.h>
1da177e4 166
6aa20a22 167#include <asm/system.h>
1da177e4
LT		 168#include <asm/dma.h>
169
170
171
172/* Few macros */
6aa20a22 173#define BITSET(ioaddr, bnum) ((outb(((inb(ioaddr)) | (bnum)), ioaddr)))
1da177e4
LT		 174#define BITCLR(ioaddr, bnum) ((outb(((inb(ioaddr)) & (~(bnum))), ioaddr)))
175
176/* This is the I/O address space for Etherteam 16i adapter. */
177#define ETH16I_IO_EXTENT 32
178
179/* Ticks before deciding that transmit has timed out */
180#define TX_TIMEOUT (400*HZ/1000)
181
182/* Maximum loop count when receiving packets */
183#define MAX_RX_LOOP 20
184
185/* Some interrupt masks */
186#define ETH16I_INTR_ON 0xef8a /* Higher is receive mask */
187#define ETH16I_INTR_OFF 0x0000
6aa20a22 188
1da177e4
LT		 189/* Buffers header status byte meanings */
190#define PKT_GOOD BIT(5)
191#define PKT_GOOD_RMT BIT(4)
192#define PKT_SHORT BIT(3)
193#define PKT_ALIGN_ERR BIT(2)
194#define PKT_CRC_ERR BIT(1)
195#define PKT_RX_BUF_OVERFLOW BIT(0)
196
197/* Transmit status register (DLCR0) */
198#define TX_STATUS_REG 0
199#define TX_DONE BIT(7)
200#define NET_BUSY BIT(6)
201#define TX_PKT_RCD BIT(5)
202#define CR_LOST BIT(4)
203#define TX_JABBER_ERR BIT(3)
204#define COLLISION BIT(2)
205#define COLLISIONS_16 BIT(1)
206
207/* Receive status register (DLCR1) */
208#define RX_STATUS_REG 1
209#define RX_PKT BIT(7) /* Packet received */
210#define BUS_RD_ERR BIT(6)
211#define SHORT_PKT_ERR BIT(3)
212#define ALIGN_ERR BIT(2)
213#define CRC_ERR BIT(1)
214#define RX_BUF_OVERFLOW BIT(0)
6aa20a22 215
1da177e4
LT		 216/* Transmit Interrupt Enable Register (DLCR2) */
217#define TX_INTR_REG 2
218#define TX_INTR_DONE BIT(7)
219#define TX_INTR_COL BIT(2)
220#define TX_INTR_16_COL BIT(1)
221
222/* Receive Interrupt Enable Register (DLCR3) */
223#define RX_INTR_REG 3
224#define RX_INTR_RECEIVE BIT(7)
225#define RX_INTR_SHORT_PKT BIT(3)
226#define RX_INTR_CRC_ERR BIT(1)
227#define RX_INTR_BUF_OVERFLOW BIT(0)
228
229/* Transmit Mode Register (DLCR4) */
230#define TRANSMIT_MODE_REG 4
231#define LOOPBACK_CONTROL BIT(1)
232#define CONTROL_OUTPUT BIT(2)
233
234/* Receive Mode Register (DLCR5) */
235#define RECEIVE_MODE_REG 5
236#define RX_BUFFER_EMPTY BIT(6)
237#define ACCEPT_BAD_PACKETS BIT(5)
238#define RECEIVE_SHORT_ADDR BIT(4)
239#define ACCEPT_SHORT_PACKETS BIT(3)
240#define REMOTE_RESET BIT(2)
241
242#define ADDRESS_FILTER_MODE BIT(1) | BIT(0)
243#define REJECT_ALL 0
244#define ACCEPT_ALL 3
245#define MODE_1 1 /* NODE ID, BC, MC, 2-24th bit */
246#define MODE_2 2 /* NODE ID, BC, MC, Hash Table */
247
248/* Configuration Register 0 (DLCR6) */
249#define CONFIG_REG_0 6
250#define DLC_EN BIT(7)
251#define SRAM_CYCLE_TIME_100NS BIT(6)
252#define SYSTEM_BUS_WIDTH_8 BIT(5) /* 1 = 8bit, 0 = 16bit */
253#define BUFFER_WIDTH_8 BIT(4) /* 1 = 8bit, 0 = 16bit */
6aa20a22 254#define TBS1 BIT(3)
1da177e4
LT		 255#define TBS0 BIT(2)
256#define SRAM_BS1 BIT(1) /* 00=8kb, 01=16kb */
257#define SRAM_BS0 BIT(0) /* 10=32kb, 11=64kb */
258
6aa20a22 259#ifndef ETH16I_TX_BUF_SIZE /* 0 = 2kb, 1 = 4kb */
1da177e4 260#define ETH16I_TX_BUF_SIZE 3 /* 2 = 8kb, 3 = 16kb */
6aa20a22 261#endif
1da177e4
LT		 262#define TX_BUF_1x2048 0
263#define TX_BUF_2x2048 1
264#define TX_BUF_2x4098 2
265#define TX_BUF_2x8192 3
266
267/* Configuration Register 1 (DLCR7) */
268#define CONFIG_REG_1 7
269#define POWERUP BIT(5)
270
271/* Transmit start register */
272#define TRANSMIT_START_REG 10
273#define TRANSMIT_START_RB 2
274#define TX_START BIT(7) /* Rest of register bit indicate*/
275 /* number of packets in tx buffer*/
276/* Node ID registers (DLCR8-13) */
277#define NODE_ID_0 8
278#define NODE_ID_RB 0
279
280/* Hash Table registers (HT8-15) */
281#define HASH_TABLE_0 8
282#define HASH_TABLE_RB 1
283
284/* Buffer memory ports */
285#define BUFFER_MEM_PORT_LB 8
286#define DATAPORT BUFFER_MEM_PORT_LB
287#define BUFFER_MEM_PORT_HB 9
288
289/* 16 Collision control register (BMPR11) */
290#define COL_16_REG 11
291#define HALT_ON_16 0x00
292#define RETRANS_AND_HALT_ON_16 0x02
293
294/* Maximum number of attempts to send after 16 concecutive collisions */
295#define MAX_COL_16 10
296
297/* DMA Burst and Transceiver Mode Register (BMPR13) */
298#define TRANSCEIVER_MODE_REG 13
6aa20a22 299#define TRANSCEIVER_MODE_RB 2
1da177e4
LT		 300#define IO_BASE_UNLOCK BIT(7)
301#define LOWER_SQUELCH_TRESH BIT(6)
302#define LINK_TEST_DISABLE BIT(5)
303#define AUI_SELECT BIT(4)
304#define DIS_AUTO_PORT_SEL BIT(3)
305
306/* Filter Self Receive Register (BMPR14) */
307#define FILTER_SELF_RX_REG 14
308#define SKIP_RX_PACKET BIT(2)
309#define FILTER_SELF_RECEIVE BIT(0)
310
311/* EEPROM Control Register (BMPR 16) */
312#define EEPROM_CTRL_REG 16
313
314/* EEPROM Data Register (BMPR 17) */
315#define EEPROM_DATA_REG 17
316
317/* NMC93CSx6 EEPROM Control Bits */
318#define CS_0 0x00
319#define CS_1 0x20
320#define SK_0 0x00
321#define SK_1 0x40
322#define DI_0 0x00
323#define DI_1 0x80
324
325/* NMC93CSx6 EEPROM Instructions */
326#define EEPROM_READ 0x80
327
328/* NMC93CSx6 EEPROM Addresses */
329#define E_NODEID_0 0x02
330#define E_NODEID_1 0x03
331#define E_NODEID_2 0x04
332#define E_PORT_SELECT 0x14
333 #define E_PORT_BNC 0x00
334 #define E_PORT_DIX 0x01
335 #define E_PORT_TP 0x02
336 #define E_PORT_AUTO 0x03
337 #define E_PORT_FROM_EPROM 0x04
338#define E_PRODUCT_CFG 0x30
6aa20a22 339
1da177e4
LT		 340
341/* Macro to slow down io between EEPROM clock transitions */
342#define eeprom_slow_io() do { int _i = 40; while(--_i > 0) { inb(0x80); }}while(0)
343
344/* Jumperless Configuration Register (BMPR19) */
345#define JUMPERLESS_CONFIG 19
346
347/* ID ROM registers, writing to them also resets some parts of chip */
348#define ID_ROM_0 24
349#define ID_ROM_7 31
350#define RESET ID_ROM_0
351
352/* This is the I/O address list to be probed when seeking the card */
353static unsigned int eth16i_portlist[] __initdata = {
6aa20a22 354 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300, 0
1da177e4
LT		 355};
356
6aa20a22 357static unsigned int eth32i_portlist[] __initdata = {
1da177e4 358 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000, 0x8000,
6aa20a22 359 0x9000, 0xA000, 0xB000, 0xC000, 0xD000, 0xE000, 0xF000, 0
1da177e4
LT		 360};
361
362/* This is the Interrupt lookup table for Eth16i card */
363static unsigned int eth16i_irqmap[] __initdata = { 9, 10, 5, 15, 0 };
364#define NUM_OF_ISA_IRQS 4
365
366/* This is the Interrupt lookup table for Eth32i card */
6aa20a22 367static unsigned int eth32i_irqmap[] __initdata = { 3, 5, 7, 9, 10, 11, 12, 15, 0 };
1da177e4
LT		 368#define EISA_IRQ_REG 0xc89
369#define NUM_OF_EISA_IRQS 8
370
371static unsigned int eth16i_tx_buf_map[] = { 2048, 2048, 4096, 8192 };
372
373/* Use 0 for production, 1 for verification, >2 for debug */
374#ifndef ETH16I_DEBUG
375#define ETH16I_DEBUG 0
376#endif
377static unsigned int eth16i_debug = ETH16I_DEBUG;
378
379/* Information for each board */
380
381struct eth16i_local {
1da177e4
LT		 382 unsigned char tx_started;
383 unsigned char tx_buf_busy;
384 unsigned short tx_queue; /* Number of packets in transmit buffer */
6aa20a22 385 unsigned short tx_queue_len;
1da177e4
LT		 386 unsigned int tx_buf_size;
387 unsigned long open_time;
388 unsigned long tx_buffered_packets;
389 unsigned long tx_buffered_bytes;
390 unsigned long col_16;
391 spinlock_t lock;
392};
393
394/* Function prototypes */
395
396static int eth16i_probe1(struct net_device *dev, int ioaddr);
397static int eth16i_check_signature(int ioaddr);
398static int eth16i_probe_port(int ioaddr);
399static void eth16i_set_port(int ioaddr, int porttype);
400static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l);
401static int eth16i_receive_probe_packet(int ioaddr);
402static int eth16i_get_irq(int ioaddr);
403static int eth16i_read_eeprom(int ioaddr, int offset);
404static int eth16i_read_eeprom_word(int ioaddr);
405static void eth16i_eeprom_cmd(int ioaddr, unsigned char command);
406static int eth16i_open(struct net_device *dev);
407static int eth16i_close(struct net_device *dev);
408static int eth16i_tx(struct sk_buff *skb, struct net_device *dev);
409static void eth16i_rx(struct net_device *dev);
410static void eth16i_timeout(struct net_device *dev);
7d12e780 411static irqreturn_t eth16i_interrupt(int irq, void *dev_id);
1da177e4
LT		 412static void eth16i_reset(struct net_device *dev);
413static void eth16i_timeout(struct net_device *dev);
414static void eth16i_skip_packet(struct net_device *dev);
6aa20a22 415static void eth16i_multicast(struct net_device *dev);
1da177e4
LT		 416static void eth16i_select_regbank(unsigned char regbank, int ioaddr);
417static void eth16i_initialize(struct net_device *dev, int boot);
418
419#if 0
420static int eth16i_set_irq(struct net_device *dev);
421#endif
422
423#ifdef MODULE
424static ushort eth16i_parse_mediatype(const char* s);
425#endif
426
1da177e4
LT		 427static char cardname[] __initdata = "ICL EtherTeam 16i/32";
428
429static int __init do_eth16i_probe(struct net_device *dev)
430{
431 int i;
432 int ioaddr;
433 int base_addr = dev->base_addr;
6aa20a22 434
6aa20a22 435 if(eth16i_debug > 4)
1da177e4
LT		 436 printk(KERN_DEBUG "Probing started for %s\n", cardname);
437
438 if(base_addr > 0x1ff) /* Check only single location */
439 return eth16i_probe1(dev, base_addr);
440 else if(base_addr != 0) /* Don't probe at all */
441 return -ENXIO;
442
443 /* Seek card from the ISA io address space */
444 for(i = 0; (ioaddr = eth16i_portlist[i]) ; i++)
445 if(eth16i_probe1(dev, ioaddr) == 0)
446 return 0;
447
448 /* Seek card from the EISA io address space */
449 for(i = 0; (ioaddr = eth32i_portlist[i]) ; i++)
450 if(eth16i_probe1(dev, ioaddr) == 0)
451 return 0;
452
453 return -ENODEV;
454}
455
456#ifndef MODULE
457struct net_device * __init eth16i_probe(int unit)
458{
459 struct net_device *dev = alloc_etherdev(sizeof(struct eth16i_local));
460 int err;
461
462 if (!dev)
463 return ERR_PTR(-ENOMEM);
464
465 sprintf(dev->name, "eth%d", unit);
466 netdev_boot_setup_check(dev);
467
468 err = do_eth16i_probe(dev);
469 if (err)
470 goto out;
1da177e4 471 return dev;
1da177e4
LT		 472out:
473 free_netdev(dev);
474 return ERR_PTR(err);
475}
476#endif
477
478static int __init eth16i_probe1(struct net_device *dev, int ioaddr)
479{
480 struct eth16i_local *lp = netdev_priv(dev);
481 static unsigned version_printed;
482 int retval;
483
484 /* Let's grab the region */
485 if (!request_region(ioaddr, ETH16I_IO_EXTENT, cardname))
486 return -EBUSY;
487
488 /*
6aa20a22 489 The MB86985 chip has on register which holds information in which
1da177e4
LT		 490 io address the chip lies. First read this register and compare
491 it to our current io address and if match then this could
492 be our chip.
493 */
494
495 if(ioaddr < 0x1000) {
6aa20a22 496 if(eth16i_portlist[(inb(ioaddr + JUMPERLESS_CONFIG) & 0x07)]
1da177e4
LT		 497 != ioaddr) {
498 retval = -ENODEV;
499 goto out;
500 }
501 }
502
503 /* Now we will go a bit deeper and try to find the chip's signature */
504
505 if(eth16i_check_signature(ioaddr) != 0) {
506 retval = -ENODEV;
507 goto out;
508 }
509
6aa20a22 510 /*
1da177e4 511 Now it seems that we have found a ethernet chip in this particular
6aa20a22 512 ioaddr. The MB86985 chip has this feature, that when you read a
1da177e4
LT		 513 certain register it will increase it's io base address to next
514 configurable slot. Now when we have found the chip, first thing is
515 to make sure that the chip's ioaddr will hold still here.
516 */
517
518 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
519 outb(0x00, ioaddr + TRANSCEIVER_MODE_REG);
520
521 outb(0x00, ioaddr + RESET); /* Reset some parts of chip */
522 BITSET(ioaddr + CONFIG_REG_0, BIT(7)); /* Disable the data link */
523
524 if( (eth16i_debug & version_printed++) == 0)
525 printk(KERN_INFO "%s", version);
526
527 dev->base_addr = ioaddr;
528 dev->irq = eth16i_get_irq(ioaddr);
529
530 /* Try to obtain interrupt vector */
531
532 if ((retval = request_irq(dev->irq, (void *)&eth16i_interrupt, 0, cardname, dev))) {
6aa20a22 533 printk(KERN_WARNING "%s at %#3x, but is unusable due to conflicting IRQ %d.\n",
1da177e4
LT		 534 cardname, ioaddr, dev->irq);
535 goto out;
536 }
537
538 printk(KERN_INFO "%s: %s at %#3x, IRQ %d, ",
539 dev->name, cardname, ioaddr, dev->irq);
540
541
542 /* Now we will have to lock the chip's io address */
543 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
6aa20a22 544 outb(0x38, ioaddr + TRANSCEIVER_MODE_REG);
1da177e4
LT		 545
546 eth16i_initialize(dev, 1); /* Initialize rest of the chip's registers */
547
548 /* Now let's same some energy by shutting down the chip ;) */
549 BITCLR(ioaddr + CONFIG_REG_1, POWERUP);
550
551 /* Initialize the device structure */
552 memset(lp, 0, sizeof(struct eth16i_local));
553 dev->open = eth16i_open;
554 dev->stop = eth16i_close;
555 dev->hard_start_xmit = eth16i_tx;
1da177e4
LT		 556 dev->set_multicast_list = eth16i_multicast;
557 dev->tx_timeout = eth16i_timeout;
558 dev->watchdog_timeo = TX_TIMEOUT;
559 spin_lock_init(&lp->lock);
b1fc5505
HX		 560
561 retval = register_netdev(dev);
562 if (retval)
563 goto out1;
1da177e4 564 return 0;
b1fc5505
HX		 565out1:
566 free_irq(dev->irq, dev);
1da177e4
LT		 567out:
568 release_region(ioaddr, ETH16I_IO_EXTENT);
569 return retval;
570}
571
572
573static void eth16i_initialize(struct net_device *dev, int boot)
574{
575 int ioaddr = dev->base_addr;
576 int i, node_w = 0;
577 unsigned char node_byte = 0;
578
579 /* Setup station address */
580 eth16i_select_regbank(NODE_ID_RB, ioaddr);
581 for(i = 0 ; i < 3 ; i++) {
582 unsigned short node_val = eth16i_read_eeprom(ioaddr, E_NODEID_0 + i);
583 ((unsigned short *)dev->dev_addr)[i] = ntohs(node_val);
584 }
585
6aa20a22 586 for(i = 0; i < 6; i++) {
1da177e4
LT		 587 outb( ((unsigned char *)dev->dev_addr)[i], ioaddr + NODE_ID_0 + i);
588 if(boot) {
589 printk("%02x", inb(ioaddr + NODE_ID_0 + i));
590 if(i != 5)
591 printk(":");
592 }
593 }
594
595 /* Now we will set multicast addresses to accept none */
596 eth16i_select_regbank(HASH_TABLE_RB, ioaddr);
6aa20a22 597 for(i = 0; i < 8; i++)
1da177e4
LT		 598 outb(0x00, ioaddr + HASH_TABLE_0 + i);
599
600 /*
6aa20a22 601 Now let's disable the transmitter and receiver, set the buffer ram
1da177e4
LT		 602 cycle time, bus width and buffer data path width. Also we shall
603 set transmit buffer size and total buffer size.
604 */
605
606 eth16i_select_regbank(2, ioaddr);
607
608 node_byte = 0;
609 node_w = eth16i_read_eeprom(ioaddr, E_PRODUCT_CFG);
610
611 if( (node_w & 0xFF00) == 0x0800)
612 node_byte |= BUFFER_WIDTH_8;
613
614 node_byte |= SRAM_BS1;
615
616 if( (node_w & 0x00FF) == 64)
617 node_byte |= SRAM_BS0;
618
619 node_byte |= DLC_EN | SRAM_CYCLE_TIME_100NS | (ETH16I_TX_BUF_SIZE << 2);
620
621 outb(node_byte, ioaddr + CONFIG_REG_0);
622
623 /* We shall halt the transmitting, if 16 collisions are detected */
624 outb(HALT_ON_16, ioaddr + COL_16_REG);
625
626#ifdef MODULE
627 /* if_port already set by init_module() */
628#else
6aa20a22 629 dev->if_port = (dev->mem_start < E_PORT_FROM_EPROM) ?
1da177e4
LT		 630 dev->mem_start : E_PORT_FROM_EPROM;
631#endif
632
633 /* Set interface port type */
634 if(boot) {
635 char *porttype[] = {"BNC", "DIX", "TP", "AUTO", "FROM_EPROM" };
636
637 switch(dev->if_port)
638 {
639
640 case E_PORT_FROM_EPROM:
641 dev->if_port = eth16i_read_eeprom(ioaddr, E_PORT_SELECT);
642 break;
643
644 case E_PORT_AUTO:
645 dev->if_port = eth16i_probe_port(ioaddr);
646 break;
6aa20a22 647
1da177e4
LT		 648 case E_PORT_BNC:
649 case E_PORT_TP:
650 case E_PORT_DIX:
651 break;
652 }
653
654 printk(" %s interface.\n", porttype[dev->if_port]);
655
656 eth16i_set_port(ioaddr, dev->if_port);
657 }
658
659 /* Set Receive Mode to normal operation */
660 outb(MODE_2, ioaddr + RECEIVE_MODE_REG);
661}
662
663static int eth16i_probe_port(int ioaddr)
664{
665 int i;
666 int retcode;
667 unsigned char dummy_packet[64];
668
669 /* Powerup the chip */
670 outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
671
672 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
673
674 eth16i_select_regbank(NODE_ID_RB, ioaddr);
675
676 for(i = 0; i < 6; i++) {
677 dummy_packet[i] = inb(ioaddr + NODE_ID_0 + i);
678 dummy_packet[i+6] = inb(ioaddr + NODE_ID_0 + i);
679 }
680
681 dummy_packet[12] = 0x00;
682 dummy_packet[13] = 0x04;
683 memset(dummy_packet + 14, 0, sizeof(dummy_packet) - 14);
684
685 eth16i_select_regbank(2, ioaddr);
686
687 for(i = 0; i < 3; i++) {
688 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
689 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
690 eth16i_set_port(ioaddr, i);
691
692 if(eth16i_debug > 1)
693 printk(KERN_DEBUG "Set port number %d\n", i);
694
695 retcode = eth16i_send_probe_packet(ioaddr, dummy_packet, 64);
696 if(retcode == 0) {
697 retcode = eth16i_receive_probe_packet(ioaddr);
698 if(retcode != -1) {
699 if(eth16i_debug > 1)
700 printk(KERN_DEBUG "Eth16i interface port found at %d\n", i);
701 return i;
702 }
703 }
704 else {
705 if(eth16i_debug > 1)
706 printk(KERN_DEBUG "TRANSMIT_DONE timeout when probing interface port\n");
707 }
708 }
709
710 if( eth16i_debug > 1)
711 printk(KERN_DEBUG "Using default port\n");
712
713 return E_PORT_BNC;
714}
715
716static void eth16i_set_port(int ioaddr, int porttype)
6aa20a22 717{
1da177e4
LT		 718 unsigned short temp = 0;
719
720 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
721 outb(LOOPBACK_CONTROL, ioaddr + TRANSMIT_MODE_REG);
722
723 temp |= DIS_AUTO_PORT_SEL;
724
725 switch(porttype) {
726
727 case E_PORT_BNC :
728 temp |= AUI_SELECT;
729 break;
730
731 case E_PORT_TP :
732 break;
733
734 case E_PORT_DIX :
735 temp |= AUI_SELECT;
736 BITSET(ioaddr + TRANSMIT_MODE_REG, CONTROL_OUTPUT);
737 break;
6aa20a22 738 }
1da177e4
LT		 739
740 outb(temp, ioaddr + TRANSCEIVER_MODE_REG);
741
742 if(eth16i_debug > 1) {
743 printk(KERN_DEBUG "TRANSMIT_MODE_REG = %x\n", inb(ioaddr + TRANSMIT_MODE_REG));
6aa20a22 744 printk(KERN_DEBUG "TRANSCEIVER_MODE_REG = %x\n",
1da177e4
LT		 745 inb(ioaddr+TRANSCEIVER_MODE_REG));
746 }
747}
748
749static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
750{
ff5688ae 751 unsigned long starttime;
1da177e4
LT		 752
753 outb(0xff, ioaddr + TX_STATUS_REG);
754
755 outw(l, ioaddr + DATAPORT);
6aa20a22 756 outsw(ioaddr + DATAPORT, (unsigned short *)b, (l + 1) >> 1);
1da177e4
LT		 757
758 starttime = jiffies;
6aa20a22 759 outb(TX_START | 1, ioaddr + TRANSMIT_START_REG);
1da177e4
LT		 760
761 while( (inb(ioaddr + TX_STATUS_REG) & 0x80) == 0) {
ff5688ae 762 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT		 763 return -1;
764 }
765 }
766
767 return 0;
768}
769
770static int eth16i_receive_probe_packet(int ioaddr)
771{
ff5688ae 772 unsigned long starttime;
1da177e4
LT		 773
774 starttime = jiffies;
775
776 while((inb(ioaddr + TX_STATUS_REG) & 0x20) == 0) {
ff5688ae 777 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT		 778
779 if(eth16i_debug > 1)
780 printk(KERN_DEBUG "Timeout occurred waiting transmit packet received\n");
781 starttime = jiffies;
782 while((inb(ioaddr + RX_STATUS_REG) & 0x80) == 0) {
ff5688ae 783 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT		 784 if(eth16i_debug > 1)
785 printk(KERN_DEBUG "Timeout occurred waiting receive packet\n");
786 return -1;
787 }
788 }
789
790 if(eth16i_debug > 1)
791 printk(KERN_DEBUG "RECEIVE_PACKET\n");
792 return(0); /* Found receive packet */
793 }
794 }
795
796 if(eth16i_debug > 1) {
797 printk(KERN_DEBUG "TRANSMIT_PACKET_RECEIVED %x\n", inb(ioaddr + TX_STATUS_REG));
798 printk(KERN_DEBUG "RX_STATUS_REG = %x\n", inb(ioaddr + RX_STATUS_REG));
799 }
800
801 return(0); /* Return success */
802}
803
804#if 0
805static int eth16i_set_irq(struct net_device* dev)
806{
807 const int ioaddr = dev->base_addr;
808 const int irq = dev->irq;
809 int i = 0;
810
6aa20a22 811 if(ioaddr < 0x1000) {
1da177e4
LT		 812 while(eth16i_irqmap[i] && eth16i_irqmap[i] != irq)
813 i++;
6aa20a22 814
1da177e4
LT		 815 if(i < NUM_OF_ISA_IRQS) {
816 u8 cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
817 cbyte = (cbyte & 0x3F) | (i << 6);
818 outb(cbyte, ioaddr + JUMPERLESS_CONFIG);
819 return 0;
820 }
821 }
822 else {
823 printk(KERN_NOTICE "%s: EISA Interrupt cannot be set. Use EISA Configuration utility.\n", dev->name);
824 }
6aa20a22 825
1da177e4
LT		 826 return -1;
827
828}
829#endif
830
831static int __init eth16i_get_irq(int ioaddr)
832{
833 unsigned char cbyte;
834
835 if( ioaddr < 0x1000) {
836 cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
837 return( eth16i_irqmap[ ((cbyte & 0xC0) >> 6) ] );
838 } else { /* Oh..the card is EISA so method getting IRQ different */
839 unsigned short index = 0;
840 cbyte = inb(ioaddr + EISA_IRQ_REG);
841 while( (cbyte & 0x01) == 0) {
842 cbyte = cbyte >> 1;
843 index++;
844 }
845 return( eth32i_irqmap[ index ] );
846 }
847}
848
849static int __init eth16i_check_signature(int ioaddr)
850{
851 int i;
852 unsigned char creg[4] = { 0 };
853
854 for(i = 0; i < 4 ; i++) {
855
856 creg[i] = inb(ioaddr + TRANSMIT_MODE_REG + i);
857
858 if(eth16i_debug > 1)
6aa20a22 859 printk("eth16i: read signature byte %x at %x\n",
1da177e4
LT		 860 creg[i],
861 ioaddr + TRANSMIT_MODE_REG + i);
862 }
863
864 creg[0] &= 0x0F; /* Mask collision cnr */
865 creg[2] &= 0x7F; /* Mask DCLEN bit */
866
867#if 0
6aa20a22 868 /*
1da177e4
LT		 869 This was removed because the card was sometimes left to state
870 from which it couldn't be find anymore. If there is need
871 to more strict check still this have to be fixed.
872 */
873 if( ! ((creg[0] == 0x06) && (creg[1] == 0x41)) ) {
874 if(creg[1] != 0x42)
875 return -1;
876 }
877#endif
878
879 if( !((creg[2] == 0x36) && (creg[3] == 0xE0)) ) {
880 creg[2] &= 0x40;
881 creg[3] &= 0x03;
6aa20a22 882
1da177e4
LT		 883 if( !((creg[2] == 0x40) && (creg[3] == 0x00)) )
884 return -1;
885 }
6aa20a22 886
1da177e4
LT		 887 if(eth16i_read_eeprom(ioaddr, E_NODEID_0) != 0)
888 return -1;
6aa20a22 889
1da177e4
LT		 890 if((eth16i_read_eeprom(ioaddr, E_NODEID_1) & 0xFF00) != 0x4B00)
891 return -1;
892
893 return 0;
894}
895
896static int eth16i_read_eeprom(int ioaddr, int offset)
897{
898 int data = 0;
899
900 eth16i_eeprom_cmd(ioaddr, EEPROM_READ | offset);
901 outb(CS_1, ioaddr + EEPROM_CTRL_REG);
902 data = eth16i_read_eeprom_word(ioaddr);
903 outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
904
6aa20a22 905 return(data);
1da177e4
LT		 906}
907
908static int eth16i_read_eeprom_word(int ioaddr)
909{
910 int i;
911 int data = 0;
6aa20a22 912
1da177e4
LT		 913 for(i = 16; i > 0; i--) {
914 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
915 eeprom_slow_io();
916 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
917 eeprom_slow_io();
6aa20a22 918 data = (data << 1) |
1da177e4 919 ((inb(ioaddr + EEPROM_DATA_REG) & DI_1) ? 1 : 0);
6aa20a22 920
1da177e4
LT		 921 eeprom_slow_io();
922 }
923
924 return(data);
925}
926
927static void eth16i_eeprom_cmd(int ioaddr, unsigned char command)
928{
929 int i;
930
931 outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
932 outb(DI_0, ioaddr + EEPROM_DATA_REG);
933 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
934 outb(DI_1, ioaddr + EEPROM_DATA_REG);
935 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
936
937 for(i = 7; i >= 0; i--) {
938 short cmd = ( (command & (1 << i)) ? DI_1 : DI_0 );
939 outb(cmd, ioaddr + EEPROM_DATA_REG);
940 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
941 eeprom_slow_io();
942 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
943 eeprom_slow_io();
6aa20a22 944 }
1da177e4
LT		 945}
946
947static int eth16i_open(struct net_device *dev)
948{
949 struct eth16i_local *lp = netdev_priv(dev);
950 int ioaddr = dev->base_addr;
6aa20a22 951
1da177e4
LT		 952 /* Powerup the chip */
953 outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
954
955 /* Initialize the chip */
6aa20a22 956 eth16i_initialize(dev, 0);
1da177e4
LT		 957
958 /* Set the transmit buffer size */
959 lp->tx_buf_size = eth16i_tx_buf_map[ETH16I_TX_BUF_SIZE & 0x03];
960
961 if(eth16i_debug > 0)
6aa20a22 962 printk(KERN_DEBUG "%s: transmit buffer size %d\n",
1da177e4
LT		 963 dev->name, lp->tx_buf_size);
964
965 /* Now enable Transmitter and Receiver sections */
966 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
967
968 /* Now switch to register bank 2, for run time operation */
969 eth16i_select_regbank(2, ioaddr);
970
971 lp->open_time = jiffies;
972 lp->tx_started = 0;
973 lp->tx_queue = 0;
974 lp->tx_queue_len = 0;
975
976 /* Turn on interrupts*/
6aa20a22 977 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1da177e4
LT		 978
979 netif_start_queue(dev);
980 return 0;
981}
982
983static int eth16i_close(struct net_device *dev)
984{
985 struct eth16i_local *lp = netdev_priv(dev);
986 int ioaddr = dev->base_addr;
987
988 eth16i_reset(dev);
989
990 /* Turn off interrupts*/
6aa20a22 991 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1da177e4
LT		 992
993 netif_stop_queue(dev);
6aa20a22 994
1da177e4
LT		 995 lp->open_time = 0;
996
997 /* Disable transmit and receive */
998 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
999
1000 /* Reset the chip */
1001 /* outb(0xff, ioaddr + RESET); */
1002 /* outw(0xffff, ioaddr + TX_STATUS_REG); */
6aa20a22 1003
1da177e4
LT		 1004 outb(0x00, ioaddr + CONFIG_REG_1);
1005
1006 return 0;
1007}
1008
1009static void eth16i_timeout(struct net_device *dev)
1010{
1011 struct eth16i_local *lp = netdev_priv(dev);
1012 int ioaddr = dev->base_addr;
6aa20a22
JG		 1013 /*
1014 If we get here, some higher level has decided that
1015 we are broken. There should really be a "kick me"
1016 function call instead.
1da177e4
LT		 1017 */
1018
1019 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
6aa20a22 1020 printk(KERN_WARNING "%s: transmit timed out with status %04x, %s ?\n",
1da177e4 1021 dev->name,
6aa20a22 1022 inw(ioaddr + TX_STATUS_REG), (inb(ioaddr + TX_STATUS_REG) & TX_DONE) ?
1da177e4
LT		 1023 "IRQ conflict" : "network cable problem");
1024
1025 dev->trans_start = jiffies;
1026
1027 /* Let's dump all registers */
6aa20a22 1028 if(eth16i_debug > 0) {
1da177e4 1029 printk(KERN_DEBUG "%s: timeout: %02x %02x %02x %02x %02x %02x %02x %02x.\n",
6aa20a22
JG		 1030 dev->name, inb(ioaddr + 0),
1031 inb(ioaddr + 1), inb(ioaddr + 2),
1032 inb(ioaddr + 3), inb(ioaddr + 4),
1da177e4
LT		 1033 inb(ioaddr + 5),
1034 inb(ioaddr + 6), inb(ioaddr + 7));
1035
1036 printk(KERN_DEBUG "%s: transmit start reg: %02x. collision reg %02x\n",
1037 dev->name, inb(ioaddr + TRANSMIT_START_REG),
1038 inb(ioaddr + COL_16_REG));
1039 printk(KERN_DEBUG "lp->tx_queue = %d\n", lp->tx_queue);
1040 printk(KERN_DEBUG "lp->tx_queue_len = %d\n", lp->tx_queue_len);
1041 printk(KERN_DEBUG "lp->tx_started = %d\n", lp->tx_started);
1042 }
09f75cd7 1043 dev->stats.tx_errors++;
1da177e4
LT		 1044 eth16i_reset(dev);
1045 dev->trans_start = jiffies;
1046 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1047 netif_wake_queue(dev);
1048}
1049
1050static int eth16i_tx(struct sk_buff *skb, struct net_device *dev)
1051{
1052 struct eth16i_local *lp = netdev_priv(dev);
1053 int ioaddr = dev->base_addr;
1054 int status = 0;
1055 ushort length = skb->len;
1056 unsigned char *buf;
1057 unsigned long flags;
1058
1059 if (length < ETH_ZLEN) {
5b057c6b 1060 if (skb_padto(skb, ETH_ZLEN))
1da177e4
LT		 1061 return 0;
1062 length = ETH_ZLEN;
1063 }
1064 buf = skb->data;
1065
1066 netif_stop_queue(dev);
6aa20a22 1067
1da177e4
LT		 1068 /* Turn off TX interrupts */
1069 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
6aa20a22 1070
1da177e4
LT		 1071 /* We would be better doing the disable_irq tricks the 3c509 does,
1072 that would make this suck a lot less */
6aa20a22 1073
1da177e4
LT		 1074 spin_lock_irqsave(&lp->lock, flags);
1075
1076 if( (length + 2) > (lp->tx_buf_size - lp->tx_queue_len)) {
6aa20a22
JG		 1077 if(eth16i_debug > 0)
1078 printk(KERN_WARNING "%s: Transmit buffer full.\n", dev->name);
1079 }
1da177e4
LT		 1080 else {
1081 outw(length, ioaddr + DATAPORT);
1082
6aa20a22 1083 if( ioaddr < 0x1000 )
1da177e4
LT		 1084 outsw(ioaddr + DATAPORT, buf, (length + 1) >> 1);
1085 else {
1086 unsigned char frag = length % 4;
1087 outsl(ioaddr + DATAPORT, buf, length >> 2);
1088 if( frag != 0 ) {
1089 outsw(ioaddr + DATAPORT, (buf + (length & 0xFFFC)), 1);
6aa20a22
JG		 1090 if( frag == 3 )
1091 outsw(ioaddr + DATAPORT,
1da177e4
LT		 1092 (buf + (length & 0xFFFC) + 2), 1);
1093 }
1094 }
1095 lp->tx_buffered_packets++;
1096 lp->tx_buffered_bytes = length;
1097 lp->tx_queue++;
1098 lp->tx_queue_len += length + 2;
1099 }
1100 lp->tx_buf_busy = 0;
1101
1102 if(lp->tx_started == 0) {
1103 /* If the transmitter is idle..always trigger a transmit */
1104 outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1105 lp->tx_queue = 0;
1106 lp->tx_queue_len = 0;
1107 dev->trans_start = jiffies;
1108 lp->tx_started = 1;
1109 netif_wake_queue(dev);
1110 }
1111 else if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1112 /* There is still more room for one more packet in tx buffer */
1113 netif_wake_queue(dev);
1114 }
6aa20a22 1115
1da177e4 1116 spin_unlock_irqrestore(&lp->lock, flags);
6aa20a22 1117
1da177e4
LT		 1118 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1119 /* Turn TX interrupts back on */
1120 /* outb(TX_INTR_DONE | TX_INTR_16_COL, ioaddr + TX_INTR_REG); */
1121 status = 0;
1122 dev_kfree_skb(skb);
1123 return 0;
1124}
1125
1126static void eth16i_rx(struct net_device *dev)
1127{
1da177e4
LT		 1128 int ioaddr = dev->base_addr;
1129 int boguscount = MAX_RX_LOOP;
1130
1131 /* Loop until all packets have been read */
1132 while( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) {
1133
6aa20a22 1134 /* Read status byte from receive buffer */
1da177e4
LT		 1135 ushort status = inw(ioaddr + DATAPORT);
1136
1137 /* Get the size of the packet from receive buffer */
1138 ushort pkt_len = inw(ioaddr + DATAPORT);
1139
1140 if(eth16i_debug > 4)
6aa20a22
JG		 1141 printk(KERN_DEBUG "%s: Receiving packet mode %02x status %04x.\n",
1142 dev->name,
1da177e4 1143 inb(ioaddr + RECEIVE_MODE_REG), status);
6aa20a22 1144
1da177e4 1145 if( !(status & PKT_GOOD) ) {
09f75cd7 1146 dev->stats.rx_errors++;
1da177e4
LT		 1147
1148 if( (pkt_len < ETH_ZLEN) || (pkt_len > ETH_FRAME_LEN) ) {
09f75cd7 1149 dev->stats.rx_length_errors++;
1da177e4 1150 eth16i_reset(dev);
6aa20a22 1151 return;
1da177e4 1152 }
6aa20a22 1153 else {
1da177e4 1154 eth16i_skip_packet(dev);
09f75cd7 1155 dev->stats.rx_dropped++;
6aa20a22 1156 }
1da177e4
LT		 1157 }
1158 else { /* Ok so now we should have a good packet */
1159 struct sk_buff *skb;
1160
1161 skb = dev_alloc_skb(pkt_len + 3);
1162 if( skb == NULL ) {
6aa20a22 1163 printk(KERN_WARNING "%s: Could'n allocate memory for packet (len %d)\n",
1da177e4
LT		 1164 dev->name, pkt_len);
1165 eth16i_skip_packet(dev);
09f75cd7 1166 dev->stats.rx_dropped++;
1da177e4
LT		 1167 break;
1168 }
1169
1da177e4 1170 skb_reserve(skb,2);
6aa20a22
JG		 1171
1172 /*
1da177e4
LT		 1173 Now let's get the packet out of buffer.
1174 size is (pkt_len + 1) >> 1, cause we are now reading words
1175 and it have to be even aligned.
6aa20a22
JG		 1176 */
1177
1178 if(ioaddr < 0x1000)
1179 insw(ioaddr + DATAPORT, skb_put(skb, pkt_len),
1da177e4 1180 (pkt_len + 1) >> 1);
6aa20a22 1181 else {
1da177e4
LT		 1182 unsigned char *buf = skb_put(skb, pkt_len);
1183 unsigned char frag = pkt_len % 4;
1184
1185 insl(ioaddr + DATAPORT, buf, pkt_len >> 2);
1186
1187 if(frag != 0) {
1188 unsigned short rest[2];
1189 rest[0] = inw( ioaddr + DATAPORT );
1190 if(frag == 3)
1191 rest[1] = inw( ioaddr + DATAPORT );
1192
1193 memcpy(buf + (pkt_len & 0xfffc), (char *)rest, frag);
1194 }
1195 }
1196
1197 skb->protocol=eth_type_trans(skb, dev);
1198
1199 if( eth16i_debug > 5 ) {
1200 int i;
6aa20a22 1201 printk(KERN_DEBUG "%s: Received packet of length %d.\n",
1da177e4 1202 dev->name, pkt_len);
6aa20a22 1203 for(i = 0; i < 14; i++)
1da177e4
LT		 1204 printk(KERN_DEBUG " %02x", skb->data[i]);
1205 printk(KERN_DEBUG ".\n");
1206 }
1207 netif_rx(skb);
09f75cd7
JG		 1208 dev->stats.rx_packets++;
1209 dev->stats.rx_bytes += pkt_len;
1da177e4
LT		 1210
1211 } /* else */
1212
1213 if(--boguscount <= 0)
1214 break;
1215
1216 } /* while */
1217}
1218
7d12e780 1219static irqreturn_t eth16i_interrupt(int irq, void *dev_id)
1da177e4
LT		 1220{
1221 struct net_device *dev = dev_id;
1222 struct eth16i_local *lp;
1223 int ioaddr = 0, status;
1224 int handled = 0;
1225
1226 ioaddr = dev->base_addr;
1227 lp = netdev_priv(dev);
1228
1229 /* Turn off all interrupts from adapter */
1230 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1231
1232 /* eth16i_tx won't be called */
1233 spin_lock(&lp->lock);
1234
1235 status = inw(ioaddr + TX_STATUS_REG); /* Get the status */
1236 outw(status, ioaddr + TX_STATUS_REG); /* Clear status bits */
1237
1238 if (status)
1239 handled = 1;
1240
1241 if(eth16i_debug > 3)
1242 printk(KERN_DEBUG "%s: Interrupt with status %04x.\n", dev->name, status);
1243
1244 if( status & 0x7f00 ) {
1245
09f75cd7 1246 dev->stats.rx_errors++;
1da177e4 1247
6aa20a22 1248 if(status & (BUS_RD_ERR << 8) )
1da177e4 1249 printk(KERN_WARNING "%s: Bus read error.\n",dev->name);
09f75cd7
JG		 1250 if(status & (SHORT_PKT_ERR << 8) ) dev->stats.rx_length_errors++;
1251 if(status & (ALIGN_ERR << 8) ) dev->stats.rx_frame_errors++;
1252 if(status & (CRC_ERR << 8) ) dev->stats.rx_crc_errors++;
1253 if(status & (RX_BUF_OVERFLOW << 8) ) dev->stats.rx_over_errors++;
1da177e4
LT		 1254 }
1255 if( status & 0x001a) {
1256
09f75cd7 1257 dev->stats.tx_errors++;
1da177e4 1258
09f75cd7
JG		 1259 if(status & CR_LOST) dev->stats.tx_carrier_errors++;
1260 if(status & TX_JABBER_ERR) dev->stats.tx_window_errors++;
1da177e4 1261
6aa20a22 1262#if 0
1da177e4 1263 if(status & COLLISION) {
09f75cd7 1264 dev->stats.collisions +=
1da177e4
LT		 1265 ((inb(ioaddr+TRANSMIT_MODE_REG) & 0xF0) >> 4);
1266 }
1267#endif
1268 if(status & COLLISIONS_16) {
6aa20a22 1269 if(lp->col_16 < MAX_COL_16) {
1da177e4 1270 lp->col_16++;
09f75cd7 1271 dev->stats.collisions++;
1da177e4
LT		 1272 /* Resume transmitting, skip failed packet */
1273 outb(0x02, ioaddr + COL_16_REG);
1274 }
1275 else {
1276 printk(KERN_WARNING "%s: bailing out due to many consecutive 16-in-a-row collisions. Network cable problem?\n", dev->name);
1277 }
1278 }
1279 }
1280
1281 if( status & 0x00ff ) { /* Let's check the transmit status reg */
1282
1283 if(status & TX_DONE) { /* The transmit has been done */
09f75cd7
JG		 1284 dev->stats.tx_packets = lp->tx_buffered_packets;
1285 dev->stats.tx_bytes += lp->tx_buffered_bytes;
6aa20a22 1286 lp->col_16 = 0;
1da177e4
LT		 1287
1288 if(lp->tx_queue) { /* Is there still packets ? */
1289 /* There was packet(s) so start transmitting and write also
1290 how many packets there is to be sended */
1291 outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1292 lp->tx_queue = 0;
1293 lp->tx_queue_len = 0;
1294 lp->tx_started = 1;
1295 }
1296 else {
1297 lp->tx_started = 0;
1298 }
1299 netif_wake_queue(dev);
1300 }
1301 }
1302
6aa20a22 1303 if( ( status & 0x8000 ) ||
1da177e4
LT		 1304 ( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) ) {
1305 eth16i_rx(dev); /* We have packet in receive buffer */
6aa20a22
JG		 1306 }
1307
1da177e4
LT		 1308 /* Turn interrupts back on */
1309 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
6aa20a22 1310
1da177e4
LT		 1311 if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1312 /* There is still more room for one more packet in tx buffer */
1313 netif_wake_queue(dev);
1314 }
6aa20a22 1315
1da177e4 1316 spin_unlock(&lp->lock);
6aa20a22 1317
1da177e4
LT		 1318 return IRQ_RETVAL(handled);
1319}
1320
1321static void eth16i_skip_packet(struct net_device *dev)
6aa20a22 1322{
1da177e4
LT		 1323 int ioaddr = dev->base_addr;
1324
1325 inw(ioaddr + DATAPORT);
1326 inw(ioaddr + DATAPORT);
1327 inw(ioaddr + DATAPORT);
1328
1329 outb(SKIP_RX_PACKET, ioaddr + FILTER_SELF_RX_REG);
1330 while( inb( ioaddr + FILTER_SELF_RX_REG ) != 0);
1331}
1332
1333static void eth16i_reset(struct net_device *dev)
1334{
1335 struct eth16i_local *lp = netdev_priv(dev);
1336 int ioaddr = dev->base_addr;
1337
6aa20a22 1338 if(eth16i_debug > 1)
1da177e4
LT		 1339 printk(KERN_DEBUG "%s: Resetting device.\n", dev->name);
1340
1341 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
6aa20a22 1342 outw(0xffff, ioaddr + TX_STATUS_REG);
1da177e4
LT		 1343 eth16i_select_regbank(2, ioaddr);
1344
1345 lp->tx_started = 0;
1346 lp->tx_buf_busy = 0;
1347 lp->tx_queue = 0;
6aa20a22 1348 lp->tx_queue_len = 0;
1da177e4
LT		 1349 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
1350}
1351
1352static void eth16i_multicast(struct net_device *dev)
1353{
1354 int ioaddr = dev->base_addr;
6aa20a22
JG		 1355
1356 if(dev->mc_count || dev->flags&(IFF_ALLMULTI|IFF_PROMISC))
1da177e4 1357 {
6aa20a22 1358 outb(3, ioaddr + RECEIVE_MODE_REG);
1da177e4
LT		 1359 } else {
1360 outb(2, ioaddr + RECEIVE_MODE_REG);
1361 }
1362}
1363
1da177e4
LT		 1364static void eth16i_select_regbank(unsigned char banknbr, int ioaddr)
1365{
1366 unsigned char data;
1367
1368 data = inb(ioaddr + CONFIG_REG_1);
6aa20a22 1369 outb( ((data & 0xF3) | ( (banknbr & 0x03) << 2)), ioaddr + CONFIG_REG_1);
1da177e4
LT		 1370}
1371
1372#ifdef MODULE
1373
1374static ushort eth16i_parse_mediatype(const char* s)
1375{
1376 if(!s)
1377 return E_PORT_FROM_EPROM;
6aa20a22 1378
1da177e4
LT		 1379 if (!strncmp(s, "bnc", 3))
1380 return E_PORT_BNC;
1381 else if (!strncmp(s, "tp", 2))
1382 return E_PORT_TP;
1383 else if (!strncmp(s, "dix", 3))
1384 return E_PORT_DIX;
1385 else if (!strncmp(s, "auto", 4))
1386 return E_PORT_AUTO;
1387 else
1388 return E_PORT_FROM_EPROM;
1389}
1390
1391#define MAX_ETH16I_CARDS 4 /* Max number of Eth16i cards per module */
1392
1393static struct net_device *dev_eth16i[MAX_ETH16I_CARDS];
1394static int io[MAX_ETH16I_CARDS];
1395#if 0
1396static int irq[MAX_ETH16I_CARDS];
1397#endif
1398static char* mediatype[MAX_ETH16I_CARDS];
1399static int debug = -1;
1400
1401MODULE_AUTHOR("Mika Kuoppala <miku@iki.fi>");
1402MODULE_DESCRIPTION("ICL EtherTeam 16i/32 driver");
1403MODULE_LICENSE("GPL");
1404
1405
1406module_param_array(io, int, NULL, 0);
1407MODULE_PARM_DESC(io, "eth16i I/O base address(es)");
1408
1409#if 0
1410module_param_array(irq, int, NULL, 0);
1411MODULE_PARM_DESC(irq, "eth16i interrupt request number");
1412#endif
1413
1414module_param_array(mediatype, charp, NULL, 0);
1415MODULE_PARM_DESC(mediatype, "eth16i media type of interface(s) (bnc,tp,dix,auto,eprom)");
1416
1417module_param(debug, int, 0);
1418MODULE_PARM_DESC(debug, "eth16i debug level (0-6)");
1419
58f149fc 1420int __init init_module(void)
1da177e4
LT		 1421{
1422 int this_dev, found = 0;
1423 struct net_device *dev;
1424
1425 for (this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1426 dev = alloc_etherdev(sizeof(struct eth16i_local));
1427 if (!dev)
1428 break;
1429
1430 dev->base_addr = io[this_dev];
1431
1432 if(debug != -1)
1433 eth16i_debug = debug;
1434
1435 if(eth16i_debug > 1)
1436 printk(KERN_NOTICE "eth16i(%d): interface type %s\n", this_dev, mediatype[this_dev] ? mediatype[this_dev] : "none" );
1437
1438 dev->if_port = eth16i_parse_mediatype(mediatype[this_dev]);
1439
1440 if(io[this_dev] == 0) {
1441 if(this_dev != 0) /* Only autoprobe 1st one */
1442 break;
1443
1444 printk(KERN_NOTICE "eth16i.c: Presently autoprobing (not recommended) for a single card.\n");
1445 }
1446
1447 if (do_eth16i_probe(dev) == 0) {
b1fc5505
HX		 1448 dev_eth16i[found++] = dev;
1449 continue;
1da177e4
LT		 1450 }
1451 printk(KERN_WARNING "eth16i.c No Eth16i card found (i/o = 0x%x).\n",
1452 io[this_dev]);
1453 free_netdev(dev);
1454 break;
1455 }
1456 if (found)
1457 return 0;
1458 return -ENXIO;
1459}
6aa20a22 1460
afc8eb46 1461void __exit cleanup_module(void)
1da177e4
LT		 1462{
1463 int this_dev;
1464
1465 for(this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1466 struct net_device *dev = dev_eth16i[this_dev];
6aa20a22 1467
4cf1653a 1468 if (netdev_priv(dev)) {
1da177e4
LT		 1469 unregister_netdev(dev);
1470 free_irq(dev->irq, dev);
1471 release_region(dev->base_addr, ETH16I_IO_EXTENT);
1472 free_netdev(dev);
1473 }
1474 }
1475}
1476#endif /* MODULE */
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