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cpmac: fix all checkpatch errors and warnings
[net-next-2.6.git] / drivers / net / enic / enic_main.c
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01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
26#include <linux/workqueue.h>
27#include <linux/pci.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/if_ether.h>
31#include <linux/if_vlan.h>
32#include <linux/ethtool.h>
33#include <linux/in.h>
34#include <linux/ip.h>
35#include <linux/ipv6.h>
36#include <linux/tcp.h>
29046f9b 37#include <linux/rtnetlink.h>
b7c6bfb7 38#include <net/ip6_checksum.h>
01f2e4ea
SF		 39
40#include "cq_enet_desc.h"
41#include "vnic_dev.h"
42#include "vnic_intr.h"
43#include "vnic_stats.h"
f8bd9091 44#include "vnic_vic.h"
01f2e4ea
SF		 45#include "enic_res.h"
46#include "enic.h"
47
48#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
ea0d7d91
SF		 49#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
50#define MAX_TSO (1 << 16)
51#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
52
53#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 54#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
01f2e4ea
SF		 55
56/* Supported devices */
a3aa1884 57static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 58 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 59 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
01f2e4ea
SF		 60 { 0, } /* end of table */
61};
62
63MODULE_DESCRIPTION(DRV_DESCRIPTION);
64MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
65MODULE_LICENSE("GPL");
66MODULE_VERSION(DRV_VERSION);
67MODULE_DEVICE_TABLE(pci, enic_id_table);
68
69struct enic_stat {
70 char name[ETH_GSTRING_LEN];
71 unsigned int offset;
72};
73
74#define ENIC_TX_STAT(stat) \
75 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
76#define ENIC_RX_STAT(stat) \
77 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
78
79static const struct enic_stat enic_tx_stats[] = {
80 ENIC_TX_STAT(tx_frames_ok),
81 ENIC_TX_STAT(tx_unicast_frames_ok),
82 ENIC_TX_STAT(tx_multicast_frames_ok),
83 ENIC_TX_STAT(tx_broadcast_frames_ok),
84 ENIC_TX_STAT(tx_bytes_ok),
85 ENIC_TX_STAT(tx_unicast_bytes_ok),
86 ENIC_TX_STAT(tx_multicast_bytes_ok),
87 ENIC_TX_STAT(tx_broadcast_bytes_ok),
88 ENIC_TX_STAT(tx_drops),
89 ENIC_TX_STAT(tx_errors),
90 ENIC_TX_STAT(tx_tso),
91};
92
93static const struct enic_stat enic_rx_stats[] = {
94 ENIC_RX_STAT(rx_frames_ok),
95 ENIC_RX_STAT(rx_frames_total),
96 ENIC_RX_STAT(rx_unicast_frames_ok),
97 ENIC_RX_STAT(rx_multicast_frames_ok),
98 ENIC_RX_STAT(rx_broadcast_frames_ok),
99 ENIC_RX_STAT(rx_bytes_ok),
100 ENIC_RX_STAT(rx_unicast_bytes_ok),
101 ENIC_RX_STAT(rx_multicast_bytes_ok),
102 ENIC_RX_STAT(rx_broadcast_bytes_ok),
103 ENIC_RX_STAT(rx_drop),
104 ENIC_RX_STAT(rx_no_bufs),
105 ENIC_RX_STAT(rx_errors),
106 ENIC_RX_STAT(rx_rss),
107 ENIC_RX_STAT(rx_crc_errors),
108 ENIC_RX_STAT(rx_frames_64),
109 ENIC_RX_STAT(rx_frames_127),
110 ENIC_RX_STAT(rx_frames_255),
111 ENIC_RX_STAT(rx_frames_511),
112 ENIC_RX_STAT(rx_frames_1023),
113 ENIC_RX_STAT(rx_frames_1518),
114 ENIC_RX_STAT(rx_frames_to_max),
115};
116
117static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
118static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
119
f8bd9091
SF		 120static int enic_is_dynamic(struct enic *enic)
121{
122 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
123}
124
01f2e4ea
SF		 125static int enic_get_settings(struct net_device *netdev,
126 struct ethtool_cmd *ecmd)
127{
128 struct enic *enic = netdev_priv(netdev);
129
130 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
131 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
132 ecmd->port = PORT_FIBRE;
133 ecmd->transceiver = XCVR_EXTERNAL;
134
135 if (netif_carrier_ok(netdev)) {
136 ecmd->speed = vnic_dev_port_speed(enic->vdev);
137 ecmd->duplex = DUPLEX_FULL;
138 } else {
139 ecmd->speed = -1;
140 ecmd->duplex = -1;
141 }
142
143 ecmd->autoneg = AUTONEG_DISABLE;
144
145 return 0;
146}
147
383ab92f
VK		 148static int enic_dev_fw_info(struct enic *enic,
149 struct vnic_devcmd_fw_info **fw_info)
150{
151 int err;
152
153 spin_lock(&enic->devcmd_lock);
154 err = vnic_dev_fw_info(enic->vdev, fw_info);
155 spin_unlock(&enic->devcmd_lock);
156
157 return err;
158}
159
01f2e4ea
SF		 160static void enic_get_drvinfo(struct net_device *netdev,
161 struct ethtool_drvinfo *drvinfo)
162{
163 struct enic *enic = netdev_priv(netdev);
164 struct vnic_devcmd_fw_info *fw_info;
165
383ab92f 166 enic_dev_fw_info(enic, &fw_info);
01f2e4ea
SF		 167
168 strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
169 strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
170 strncpy(drvinfo->fw_version, fw_info->fw_version,
171 sizeof(drvinfo->fw_version));
172 strncpy(drvinfo->bus_info, pci_name(enic->pdev),
173 sizeof(drvinfo->bus_info));
174}
175
176static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
177{
178 unsigned int i;
179
180 switch (stringset) {
181 case ETH_SS_STATS:
182 for (i = 0; i < enic_n_tx_stats; i++) {
183 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
184 data += ETH_GSTRING_LEN;
185 }
186 for (i = 0; i < enic_n_rx_stats; i++) {
187 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
188 data += ETH_GSTRING_LEN;
189 }
190 break;
191 }
192}
193
25f0a061 194static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 195{
25f0a061
SF		 196 switch (sset) {
197 case ETH_SS_STATS:
198 return enic_n_tx_stats + enic_n_rx_stats;
199 default:
200 return -EOPNOTSUPP;
201 }
01f2e4ea
SF		 202}
203
383ab92f
VK		 204static int enic_dev_stats_dump(struct enic *enic, struct vnic_stats **vstats)
205{
206 int err;
207
208 spin_lock(&enic->devcmd_lock);
209 err = vnic_dev_stats_dump(enic->vdev, vstats);
210 spin_unlock(&enic->devcmd_lock);
211
212 return err;
213}
214
01f2e4ea
SF		 215static void enic_get_ethtool_stats(struct net_device *netdev,
216 struct ethtool_stats *stats, u64 *data)
217{
218 struct enic *enic = netdev_priv(netdev);
219 struct vnic_stats *vstats;
220 unsigned int i;
221
383ab92f 222 enic_dev_stats_dump(enic, &vstats);
01f2e4ea
SF		 223
224 for (i = 0; i < enic_n_tx_stats; i++)
225 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
226 for (i = 0; i < enic_n_rx_stats; i++)
227 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
228}
229
230static u32 enic_get_rx_csum(struct net_device *netdev)
231{
232 struct enic *enic = netdev_priv(netdev);
233 return enic->csum_rx_enabled;
234}
235
236static int enic_set_rx_csum(struct net_device *netdev, u32 data)
237{
238 struct enic *enic = netdev_priv(netdev);
239
25f0a061
SF		 240 if (data && !ENIC_SETTING(enic, RXCSUM))
241 return -EINVAL;
242
243 enic->csum_rx_enabled = !!data;
01f2e4ea
SF		 244
245 return 0;
246}
247
248static int enic_set_tx_csum(struct net_device *netdev, u32 data)
249{
250 struct enic *enic = netdev_priv(netdev);
251
25f0a061
SF		 252 if (data && !ENIC_SETTING(enic, TXCSUM))
253 return -EINVAL;
254
255 if (data)
01f2e4ea
SF		 256 netdev->features |= NETIF_F_HW_CSUM;
257 else
258 netdev->features &= ~NETIF_F_HW_CSUM;
259
260 return 0;
261}
262
263static int enic_set_tso(struct net_device *netdev, u32 data)
264{
265 struct enic *enic = netdev_priv(netdev);
266
25f0a061
SF		 267 if (data && !ENIC_SETTING(enic, TSO))
268 return -EINVAL;
269
270 if (data)
01f2e4ea
SF		 271 netdev->features |=
272 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN;
273 else
274 netdev->features &=
275 ~(NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN);
276
277 return 0;
278}
279
280static u32 enic_get_msglevel(struct net_device *netdev)
281{
282 struct enic *enic = netdev_priv(netdev);
283 return enic->msg_enable;
284}
285
286static void enic_set_msglevel(struct net_device *netdev, u32 value)
287{
288 struct enic *enic = netdev_priv(netdev);
289 enic->msg_enable = value;
290}
291
7c844599
SF		 292static int enic_get_coalesce(struct net_device *netdev,
293 struct ethtool_coalesce *ecmd)
294{
295 struct enic *enic = netdev_priv(netdev);
296
297 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
298 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
299
300 return 0;
301}
302
303static int enic_set_coalesce(struct net_device *netdev,
304 struct ethtool_coalesce *ecmd)
305{
306 struct enic *enic = netdev_priv(netdev);
307 u32 tx_coalesce_usecs;
308 u32 rx_coalesce_usecs;
309
310 tx_coalesce_usecs = min_t(u32,
311 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
312 ecmd->tx_coalesce_usecs);
313 rx_coalesce_usecs = min_t(u32,
314 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
315 ecmd->rx_coalesce_usecs);
316
317 switch (vnic_dev_get_intr_mode(enic->vdev)) {
318 case VNIC_DEV_INTR_MODE_INTX:
319 if (tx_coalesce_usecs != rx_coalesce_usecs)
320 return -EINVAL;
321
322 vnic_intr_coalescing_timer_set(&enic->intr[ENIC_INTX_WQ_RQ],
323 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
324 break;
325 case VNIC_DEV_INTR_MODE_MSI:
326 if (tx_coalesce_usecs != rx_coalesce_usecs)
327 return -EINVAL;
328
329 vnic_intr_coalescing_timer_set(&enic->intr[0],
330 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
331 break;
332 case VNIC_DEV_INTR_MODE_MSIX:
333 vnic_intr_coalescing_timer_set(&enic->intr[ENIC_MSIX_WQ],
334 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
335 vnic_intr_coalescing_timer_set(&enic->intr[ENIC_MSIX_RQ],
336 INTR_COALESCE_USEC_TO_HW(rx_coalesce_usecs));
337 break;
338 default:
339 break;
340 }
341
342 enic->tx_coalesce_usecs = tx_coalesce_usecs;
343 enic->rx_coalesce_usecs = rx_coalesce_usecs;
344
345 return 0;
346}
347
0fc0b732 348static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
SF		 349 .get_settings = enic_get_settings,
350 .get_drvinfo = enic_get_drvinfo,
351 .get_msglevel = enic_get_msglevel,
352 .set_msglevel = enic_set_msglevel,
353 .get_link = ethtool_op_get_link,
354 .get_strings = enic_get_strings,
25f0a061 355 .get_sset_count = enic_get_sset_count,
01f2e4ea
SF		 356 .get_ethtool_stats = enic_get_ethtool_stats,
357 .get_rx_csum = enic_get_rx_csum,
358 .set_rx_csum = enic_set_rx_csum,
359 .get_tx_csum = ethtool_op_get_tx_csum,
360 .set_tx_csum = enic_set_tx_csum,
361 .get_sg = ethtool_op_get_sg,
362 .set_sg = ethtool_op_set_sg,
363 .get_tso = ethtool_op_get_tso,
364 .set_tso = enic_set_tso,
7c844599
SF		 365 .get_coalesce = enic_get_coalesce,
366 .set_coalesce = enic_set_coalesce,
86ca9db7 367 .get_flags = ethtool_op_get_flags,
01f2e4ea
SF		 368};
369
370static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
371{
372 struct enic *enic = vnic_dev_priv(wq->vdev);
373
374 if (buf->sop)
375 pci_unmap_single(enic->pdev, buf->dma_addr,
376 buf->len, PCI_DMA_TODEVICE);
377 else
378 pci_unmap_page(enic->pdev, buf->dma_addr,
379 buf->len, PCI_DMA_TODEVICE);
380
381 if (buf->os_buf)
382 dev_kfree_skb_any(buf->os_buf);
383}
384
385static void enic_wq_free_buf(struct vnic_wq *wq,
386 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
387{
388 enic_free_wq_buf(wq, buf);
389}
390
391static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
392 u8 type, u16 q_number, u16 completed_index, void *opaque)
393{
394 struct enic *enic = vnic_dev_priv(vdev);
395
396 spin_lock(&enic->wq_lock[q_number]);
397
398 vnic_wq_service(&enic->wq[q_number], cq_desc,
399 completed_index, enic_wq_free_buf,
400 opaque);
401
402 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF		 403 vnic_wq_desc_avail(&enic->wq[q_number]) >=
404 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
01f2e4ea
SF		 405 netif_wake_queue(enic->netdev);
406
407 spin_unlock(&enic->wq_lock[q_number]);
408
409 return 0;
410}
411
412static void enic_log_q_error(struct enic *enic)
413{
414 unsigned int i;
415 u32 error_status;
416
417 for (i = 0; i < enic->wq_count; i++) {
418 error_status = vnic_wq_error_status(&enic->wq[i]);
419 if (error_status)
a7a79deb
VK		 420 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
421 i, error_status);
01f2e4ea
SF		 422 }
423
424 for (i = 0; i < enic->rq_count; i++) {
425 error_status = vnic_rq_error_status(&enic->rq[i]);
426 if (error_status)
a7a79deb
VK		 427 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
428 i, error_status);
01f2e4ea
SF		 429 }
430}
431
383ab92f 432static void enic_msglvl_check(struct enic *enic)
01f2e4ea 433{
383ab92f 434 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 435
383ab92f 436 if (msg_enable != enic->msg_enable) {
a7a79deb
VK		 437 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
438 enic->msg_enable, msg_enable);
383ab92f 439 enic->msg_enable = msg_enable;
01f2e4ea
SF		 440 }
441}
442
443static void enic_mtu_check(struct enic *enic)
444{
445 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 446 struct net_device *netdev = enic->netdev;
01f2e4ea 447
491598a4 448 if (mtu && mtu != enic->port_mtu) {
7c844599 449 enic->port_mtu = mtu;
a7a79deb
VK		 450 if (mtu < netdev->mtu)
451 netdev_warn(netdev,
452 "interface MTU (%d) set higher "
01f2e4ea 453 "than switch port MTU (%d)\n",
a7a79deb 454 netdev->mtu, mtu);
01f2e4ea
SF		 455 }
456}
457
383ab92f 458static void enic_link_check(struct enic *enic)
01f2e4ea 459{
383ab92f
VK		 460 int link_status = vnic_dev_link_status(enic->vdev);
461 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 462
383ab92f 463 if (link_status && !carrier_ok) {
a7a79deb 464 netdev_info(enic->netdev, "Link UP\n");
383ab92f
VK		 465 netif_carrier_on(enic->netdev);
466 } else if (!link_status && carrier_ok) {
a7a79deb 467 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 468 netif_carrier_off(enic->netdev);
01f2e4ea
SF		 469 }
470}
471
472static void enic_notify_check(struct enic *enic)
473{
474 enic_msglvl_check(enic);
475 enic_mtu_check(enic);
476 enic_link_check(enic);
477}
478
479#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
480
481static irqreturn_t enic_isr_legacy(int irq, void *data)
482{
483 struct net_device *netdev = data;
484 struct enic *enic = netdev_priv(netdev);
485 u32 pba;
486
487 vnic_intr_mask(&enic->intr[ENIC_INTX_WQ_RQ]);
488
489 pba = vnic_intr_legacy_pba(enic->legacy_pba);
490 if (!pba) {
491 vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
492 return IRQ_NONE; /* not our interrupt */
493 }
494
ed8af6b2
SF		 495 if (ENIC_TEST_INTR(pba, ENIC_INTX_NOTIFY)) {
496 vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_NOTIFY]);
01f2e4ea 497 enic_notify_check(enic);
ed8af6b2 498 }
01f2e4ea
SF		 499
500 if (ENIC_TEST_INTR(pba, ENIC_INTX_ERR)) {
ed8af6b2 501 vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_ERR]);
01f2e4ea
SF		 502 enic_log_q_error(enic);
503 /* schedule recovery from WQ/RQ error */
504 schedule_work(&enic->reset);
505 return IRQ_HANDLED;
506 }
507
508 if (ENIC_TEST_INTR(pba, ENIC_INTX_WQ_RQ)) {
288379f0
BH		 509 if (napi_schedule_prep(&enic->napi))
510 __napi_schedule(&enic->napi);
01f2e4ea
SF		 511 } else {
512 vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
513 }
514
515 return IRQ_HANDLED;
516}
517
518static irqreturn_t enic_isr_msi(int irq, void *data)
519{
520 struct enic *enic = data;
521
522 /* With MSI, there is no sharing of interrupts, so this is
523 * our interrupt and there is no need to ack it. The device
524 * is not providing per-vector masking, so the OS will not
525 * write to PCI config space to mask/unmask the interrupt.
526 * We're using mask_on_assertion for MSI, so the device
527 * automatically masks the interrupt when the interrupt is
528 * generated. Later, when exiting polling, the interrupt
529 * will be unmasked (see enic_poll).
530 *
531 * Also, the device uses the same PCIe Traffic Class (TC)
532 * for Memory Write data and MSI, so there are no ordering
533 * issues; the MSI will always arrive at the Root Complex
534 * _after_ corresponding Memory Writes (i.e. descriptor
535 * writes).
536 */
537
288379f0 538 napi_schedule(&enic->napi);
01f2e4ea
SF		 539
540 return IRQ_HANDLED;
541}
542
543static irqreturn_t enic_isr_msix_rq(int irq, void *data)
544{
545 struct enic *enic = data;
546
547 /* schedule NAPI polling for RQ cleanup */
288379f0 548 napi_schedule(&enic->napi);
01f2e4ea
SF		 549
550 return IRQ_HANDLED;
551}
552
553static irqreturn_t enic_isr_msix_wq(int irq, void *data)
554{
555 struct enic *enic = data;
556 unsigned int wq_work_to_do = -1; /* no limit */
557 unsigned int wq_work_done;
558
559 wq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
560 wq_work_to_do, enic_wq_service, NULL);
561
562 vnic_intr_return_credits(&enic->intr[ENIC_MSIX_WQ],
563 wq_work_done,
564 1 /* unmask intr */,
565 1 /* reset intr timer */);
566
567 return IRQ_HANDLED;
568}
569
570static irqreturn_t enic_isr_msix_err(int irq, void *data)
571{
572 struct enic *enic = data;
573
ed8af6b2
SF		 574 vnic_intr_return_all_credits(&enic->intr[ENIC_MSIX_ERR]);
575
01f2e4ea
SF		 576 enic_log_q_error(enic);
577
578 /* schedule recovery from WQ/RQ error */
579 schedule_work(&enic->reset);
580
581 return IRQ_HANDLED;
582}
583
584static irqreturn_t enic_isr_msix_notify(int irq, void *data)
585{
586 struct enic *enic = data;
587
ed8af6b2 588 vnic_intr_return_all_credits(&enic->intr[ENIC_MSIX_NOTIFY]);
01f2e4ea 589 enic_notify_check(enic);
01f2e4ea
SF		 590
591 return IRQ_HANDLED;
592}
593
594static inline void enic_queue_wq_skb_cont(struct enic *enic,
595 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 596 unsigned int len_left, int loopback)
01f2e4ea
SF		 597{
598 skb_frag_t *frag;
599
600 /* Queue additional data fragments */
601 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
602 len_left -= frag->size;
603 enic_queue_wq_desc_cont(wq, skb,
604 pci_map_page(enic->pdev, frag->page,
605 frag->page_offset, frag->size,
606 PCI_DMA_TODEVICE),
607 frag->size,
1825aca6
VK		 608 (len_left == 0), /* EOP? */
609 loopback);
01f2e4ea
SF		 610 }
611}
612
613static inline void enic_queue_wq_skb_vlan(struct enic *enic,
614 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 615 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 616{
617 unsigned int head_len = skb_headlen(skb);
618 unsigned int len_left = skb->len - head_len;
619 int eop = (len_left == 0);
620
ea0d7d91
SF		 621 /* Queue the main skb fragment. The fragments are no larger
622 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
623 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
624 * per fragment is queued.
625 */
01f2e4ea
SF		 626 enic_queue_wq_desc(wq, skb,
627 pci_map_single(enic->pdev, skb->data,
628 head_len, PCI_DMA_TODEVICE),
629 head_len,
630 vlan_tag_insert, vlan_tag,
1825aca6 631 eop, loopback);
01f2e4ea
SF		 632
633 if (!eop)
1825aca6 634 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 635}
636
637static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
638 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 639 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 640{
641 unsigned int head_len = skb_headlen(skb);
642 unsigned int len_left = skb->len - head_len;
643 unsigned int hdr_len = skb_transport_offset(skb);
644 unsigned int csum_offset = hdr_len + skb->csum_offset;
645 int eop = (len_left == 0);
646
ea0d7d91
SF		 647 /* Queue the main skb fragment. The fragments are no larger
648 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
649 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
650 * per fragment is queued.
651 */
01f2e4ea
SF		 652 enic_queue_wq_desc_csum_l4(wq, skb,
653 pci_map_single(enic->pdev, skb->data,
654 head_len, PCI_DMA_TODEVICE),
655 head_len,
656 csum_offset,
657 hdr_len,
658 vlan_tag_insert, vlan_tag,
1825aca6 659 eop, loopback);
01f2e4ea
SF		 660
661 if (!eop)
1825aca6 662 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 663}
664
665static inline void enic_queue_wq_skb_tso(struct enic *enic,
666 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 667 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 668{
ea0d7d91
SF		 669 unsigned int frag_len_left = skb_headlen(skb);
670 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF		 671 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
672 int eop = (len_left == 0);
ea0d7d91
SF		 673 unsigned int len;
674 dma_addr_t dma_addr;
675 unsigned int offset = 0;
676 skb_frag_t *frag;
01f2e4ea
SF		 677
678 /* Preload TCP csum field with IP pseudo hdr calculated
679 * with IP length set to zero. HW will later add in length
680 * to each TCP segment resulting from the TSO.
681 */
682
09640e63 683 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF		 684 ip_hdr(skb)->check = 0;
685 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
686 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 687 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF		 688 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
689 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
690 }
691
ea0d7d91
SF		 692 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
693 * for the main skb fragment
694 */
695 while (frag_len_left) {
696 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
697 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
698 len, PCI_DMA_TODEVICE);
699 enic_queue_wq_desc_tso(wq, skb,
700 dma_addr,
701 len,
702 mss, hdr_len,
703 vlan_tag_insert, vlan_tag,
1825aca6 704 eop && (len == frag_len_left), loopback);
ea0d7d91
SF		 705 frag_len_left -= len;
706 offset += len;
707 }
01f2e4ea 708
ea0d7d91
SF		 709 if (eop)
710 return;
711
712 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
713 * for additional data fragments
714 */
715 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
716 len_left -= frag->size;
717 frag_len_left = frag->size;
718 offset = frag->page_offset;
719
720 while (frag_len_left) {
721 len = min(frag_len_left,
722 (unsigned int)WQ_ENET_MAX_DESC_LEN);
723 dma_addr = pci_map_page(enic->pdev, frag->page,
724 offset, len,
725 PCI_DMA_TODEVICE);
726 enic_queue_wq_desc_cont(wq, skb,
727 dma_addr,
728 len,
729 (len_left == 0) &&
1825aca6
VK		 730 (len == frag_len_left), /* EOP? */
731 loopback);
ea0d7d91
SF		 732 frag_len_left -= len;
733 offset += len;
734 }
735 }
01f2e4ea
SF		 736}
737
738static inline void enic_queue_wq_skb(struct enic *enic,
739 struct vnic_wq *wq, struct sk_buff *skb)
740{
741 unsigned int mss = skb_shinfo(skb)->gso_size;
742 unsigned int vlan_tag = 0;
743 int vlan_tag_insert = 0;
1825aca6 744 int loopback = 0;
01f2e4ea
SF		 745
746 if (enic->vlan_group && vlan_tx_tag_present(skb)) {
747 /* VLAN tag from trunking driver */
748 vlan_tag_insert = 1;
749 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK		 750 } else if (enic->loop_enable) {
751 vlan_tag = enic->loop_tag;
752 loopback = 1;
01f2e4ea
SF		 753 }
754
755 if (mss)
756 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 757 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 758 else if (skb->ip_summed == CHECKSUM_PARTIAL)
759 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 760 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 761 else
762 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 763 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 764}
765
ed8af6b2 766/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 767static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 768 struct net_device *netdev)
01f2e4ea
SF		 769{
770 struct enic *enic = netdev_priv(netdev);
771 struct vnic_wq *wq = &enic->wq[0];
772 unsigned long flags;
773
774 if (skb->len <= 0) {
775 dev_kfree_skb(skb);
776 return NETDEV_TX_OK;
777 }
778
779 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
780 * which is very likely. In the off chance it's going to take
781 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
782 */
783
784 if (skb_shinfo(skb)->gso_size == 0 &&
785 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
786 skb_linearize(skb)) {
787 dev_kfree_skb(skb);
788 return NETDEV_TX_OK;
789 }
790
791 spin_lock_irqsave(&enic->wq_lock[0], flags);
792
ea0d7d91
SF		 793 if (vnic_wq_desc_avail(wq) <
794 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF		 795 netif_stop_queue(netdev);
796 /* This is a hard error, log it */
a7a79deb 797 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF		 798 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
799 return NETDEV_TX_BUSY;
800 }
801
802 enic_queue_wq_skb(enic, wq, skb);
803
ea0d7d91 804 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF		 805 netif_stop_queue(netdev);
806
01f2e4ea
SF		 807 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
808
809 return NETDEV_TX_OK;
810}
811
812/* dev_base_lock rwlock held, nominally process context */
813static struct net_device_stats *enic_get_stats(struct net_device *netdev)
814{
815 struct enic *enic = netdev_priv(netdev);
25f0a061 816 struct net_device_stats *net_stats = &netdev->stats;
01f2e4ea
SF		 817 struct vnic_stats *stats;
818
383ab92f 819 enic_dev_stats_dump(enic, &stats);
01f2e4ea 820
25f0a061
SF		 821 net_stats->tx_packets = stats->tx.tx_frames_ok;
822 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
823 net_stats->tx_errors = stats->tx.tx_errors;
824 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 825
25f0a061
SF		 826 net_stats->rx_packets = stats->rx.rx_frames_ok;
827 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
828 net_stats->rx_errors = stats->rx.rx_errors;
829 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 830 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 831 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 832 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 833
25f0a061 834 return net_stats;
01f2e4ea
SF		 835}
836
99ef5639 837static void enic_reset_multicast_list(struct enic *enic)
01f2e4ea
SF		 838{
839 enic->mc_count = 0;
99ef5639 840 enic->flags = 0;
01f2e4ea
SF		 841}
842
843static int enic_set_mac_addr(struct net_device *netdev, char *addr)
844{
f8bd9091
SF		 845 struct enic *enic = netdev_priv(netdev);
846
847 if (enic_is_dynamic(enic)) {
848 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
849 return -EADDRNOTAVAIL;
850 } else {
851 if (!is_valid_ether_addr(addr))
852 return -EADDRNOTAVAIL;
853 }
01f2e4ea
SF		 854
855 memcpy(netdev->dev_addr, addr, netdev->addr_len);
856
857 return 0;
858}
859
f8bd9091
SF		 860static int enic_dev_add_station_addr(struct enic *enic)
861{
862 int err = 0;
863
864 if (is_valid_ether_addr(enic->netdev->dev_addr)) {
865 spin_lock(&enic->devcmd_lock);
866 err = vnic_dev_add_addr(enic->vdev, enic->netdev->dev_addr);
867 spin_unlock(&enic->devcmd_lock);
868 }
869
870 return err;
871}
872
873static int enic_dev_del_station_addr(struct enic *enic)
874{
875 int err = 0;
876
877 if (is_valid_ether_addr(enic->netdev->dev_addr)) {
878 spin_lock(&enic->devcmd_lock);
879 err = vnic_dev_del_addr(enic->vdev, enic->netdev->dev_addr);
880 spin_unlock(&enic->devcmd_lock);
881 }
882
883 return err;
884}
885
886static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
887{
888 struct enic *enic = netdev_priv(netdev);
889 struct sockaddr *saddr = p;
890 char *addr = saddr->sa_data;
891 int err;
892
893 if (netif_running(enic->netdev)) {
894 err = enic_dev_del_station_addr(enic);
895 if (err)
896 return err;
897 }
898
899 err = enic_set_mac_addr(netdev, addr);
900 if (err)
901 return err;
902
903 if (netif_running(enic->netdev)) {
904 err = enic_dev_add_station_addr(enic);
905 if (err)
906 return err;
907 }
908
909 return err;
910}
911
912static int enic_set_mac_address(struct net_device *netdev, void *p)
913{
914 return -EOPNOTSUPP;
915}
916
383ab92f
VK		 917static int enic_dev_packet_filter(struct enic *enic, int directed,
918 int multicast, int broadcast, int promisc, int allmulti)
919{
920 int err;
921
922 spin_lock(&enic->devcmd_lock);
923 err = vnic_dev_packet_filter(enic->vdev, directed,
924 multicast, broadcast, promisc, allmulti);
925 spin_unlock(&enic->devcmd_lock);
926
927 return err;
928}
929
930static int enic_dev_add_multicast_addr(struct enic *enic, u8 *addr)
931{
932 int err;
933
934 spin_lock(&enic->devcmd_lock);
935 err = vnic_dev_add_addr(enic->vdev, addr);
936 spin_unlock(&enic->devcmd_lock);
937
938 return err;
939}
940
941static int enic_dev_del_multicast_addr(struct enic *enic, u8 *addr)
942{
943 int err;
944
945 spin_lock(&enic->devcmd_lock);
946 err = vnic_dev_del_addr(enic->vdev, addr);
947 spin_unlock(&enic->devcmd_lock);
948
949 return err;
950}
951
01f2e4ea
SF		 952/* netif_tx_lock held, BHs disabled */
953static void enic_set_multicast_list(struct net_device *netdev)
954{
955 struct enic *enic = netdev_priv(netdev);
22bedad3 956 struct netdev_hw_addr *ha;
01f2e4ea
SF		 957 int directed = 1;
958 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
959 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
960 int promisc = (netdev->flags & IFF_PROMISC) ? 1 : 0;
4cd24eaf 961 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 962 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
641cb85e 963 mc_count > ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 964 unsigned int flags = netdev->flags | (allmulti ? IFF_ALLMULTI : 0);
01f2e4ea 965 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF		 966 unsigned int i, j;
967
968 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS)
969 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
970
9959a185
SF		 971 if (enic->flags != flags) {
972 enic->flags = flags;
383ab92f 973 enic_dev_packet_filter(enic, directed,
9959a185
SF		 974 multicast, broadcast, promisc, allmulti);
975 }
01f2e4ea
SF		 976
977 /* Is there an easier way? Trying to minimize to
978 * calls to add/del multicast addrs. We keep the
979 * addrs from the last call in enic->mc_addr and
980 * look for changes to add/del.
981 */
982
48e2f183 983 i = 0;
22bedad3 984 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP		 985 if (i == mc_count)
986 break;
22bedad3 987 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF		 988 }
989
990 for (i = 0; i < enic->mc_count; i++) {
991 for (j = 0; j < mc_count; j++)
992 if (compare_ether_addr(enic->mc_addr[i],
993 mc_addr[j]) == 0)
994 break;
995 if (j == mc_count)
383ab92f 996 enic_dev_del_multicast_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF		 997 }
998
999 for (i = 0; i < mc_count; i++) {
1000 for (j = 0; j < enic->mc_count; j++)
1001 if (compare_ether_addr(mc_addr[i],
1002 enic->mc_addr[j]) == 0)
1003 break;
1004 if (j == enic->mc_count)
383ab92f 1005 enic_dev_add_multicast_addr(enic, mc_addr[i]);
01f2e4ea
SF		 1006 }
1007
1008 /* Save the list to compare against next time
1009 */
1010
1011 for (i = 0; i < mc_count; i++)
1012 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
1013
1014 enic->mc_count = mc_count;
01f2e4ea
SF		 1015}
1016
1017/* rtnl lock is held */
1018static void enic_vlan_rx_register(struct net_device *netdev,
1019 struct vlan_group *vlan_group)
1020{
1021 struct enic *enic = netdev_priv(netdev);
1022 enic->vlan_group = vlan_group;
1023}
1024
1025/* rtnl lock is held */
1026static void enic_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1027{
1028 struct enic *enic = netdev_priv(netdev);
1029
1030 spin_lock(&enic->devcmd_lock);
1031 enic_add_vlan(enic, vid);
1032 spin_unlock(&enic->devcmd_lock);
1033}
1034
1035/* rtnl lock is held */
1036static void enic_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1037{
1038 struct enic *enic = netdev_priv(netdev);
1039
1040 spin_lock(&enic->devcmd_lock);
1041 enic_del_vlan(enic, vid);
1042 spin_unlock(&enic->devcmd_lock);
1043}
1044
1045/* netif_tx_lock held, BHs disabled */
1046static void enic_tx_timeout(struct net_device *netdev)
1047{
1048 struct enic *enic = netdev_priv(netdev);
1049 schedule_work(&enic->reset);
1050}
1051
f8bd9091
SF		 1052static int enic_vnic_dev_deinit(struct enic *enic)
1053{
1054 int err;
1055
1056 spin_lock(&enic->devcmd_lock);
1057 err = vnic_dev_deinit(enic->vdev);
1058 spin_unlock(&enic->devcmd_lock);
1059
1060 return err;
1061}
1062
1063static int enic_dev_init_prov(struct enic *enic, struct vic_provinfo *vp)
1064{
1065 int err;
1066
1067 spin_lock(&enic->devcmd_lock);
1068 err = vnic_dev_init_prov(enic->vdev,
1069 (u8 *)vp, vic_provinfo_size(vp));
1070 spin_unlock(&enic->devcmd_lock);
1071
1072 return err;
1073}
1074
1075static int enic_dev_init_done(struct enic *enic, int *done, int *error)
1076{
1077 int err;
1078
1079 spin_lock(&enic->devcmd_lock);
1080 err = vnic_dev_init_done(enic->vdev, done, error);
1081 spin_unlock(&enic->devcmd_lock);
1082
1083 return err;
1084}
1085
08f382eb 1086static int enic_set_port_profile(struct enic *enic, u8 *mac)
f8bd9091
SF		 1087{
1088 struct vic_provinfo *vp;
1089 u8 oui[3] = VIC_PROVINFO_CISCO_OUI;
f8bd9091 1090 char uuid_str[38];
f8bd9091
SF		 1091 int err;
1092
08f382eb
SF		 1093 err = enic_vnic_dev_deinit(enic);
1094 if (err)
1095 return err;
f8bd9091 1096
08f382eb 1097 switch (enic->pp.request) {
f8bd9091 1098
08f382eb 1099 case PORT_REQUEST_ASSOCIATE:
f8bd9091 1100
08f382eb
SF		 1101 if (!(enic->pp.set & ENIC_SET_NAME) || !strlen(enic->pp.name))
1102 return -EINVAL;
f8bd9091 1103
08f382eb
SF		 1104 if (!is_valid_ether_addr(mac))
1105 return -EADDRNOTAVAIL;
f8bd9091 1106
08f382eb
SF		 1107 vp = vic_provinfo_alloc(GFP_KERNEL, oui,
1108 VIC_PROVINFO_LINUX_TYPE);
1109 if (!vp)
1110 return -ENOMEM;
f8bd9091 1111
f8bd9091 1112 vic_provinfo_add_tlv(vp,
08f382eb
SF		 1113 VIC_LINUX_PROV_TLV_PORT_PROFILE_NAME_STR,
1114 strlen(enic->pp.name) + 1, enic->pp.name);
f8bd9091 1115
08f382eb
SF		 1116 vic_provinfo_add_tlv(vp,
1117 VIC_LINUX_PROV_TLV_CLIENT_MAC_ADDR,
1118 ETH_ALEN, mac);
1119
1120 if (enic->pp.set & ENIC_SET_INSTANCE) {
c33788b4 1121 sprintf(uuid_str, "%pUB", enic->pp.instance_uuid);
08f382eb
SF		 1122 vic_provinfo_add_tlv(vp,
1123 VIC_LINUX_PROV_TLV_CLIENT_UUID_STR,
1124 sizeof(uuid_str), uuid_str);
1125 }
f8bd9091 1126
08f382eb 1127 if (enic->pp.set & ENIC_SET_HOST) {
c33788b4 1128 sprintf(uuid_str, "%pUB", enic->pp.host_uuid);
08f382eb
SF		 1129 vic_provinfo_add_tlv(vp,
1130 VIC_LINUX_PROV_TLV_HOST_UUID_STR,
1131 sizeof(uuid_str), uuid_str);
1132 }
f8bd9091 1133
08f382eb
SF		 1134 err = enic_dev_init_prov(enic, vp);
1135 vic_provinfo_free(vp);
1136 if (err)
1137 return err;
1138 break;
f8bd9091 1139
08f382eb
SF		 1140 case PORT_REQUEST_DISASSOCIATE:
1141 break;
f8bd9091 1142
08f382eb
SF		 1143 default:
1144 return -EINVAL;
1145 }
f8bd9091 1146
08f382eb
SF		 1147 enic->pp.set |= ENIC_SET_APPLIED;
1148 return 0;
f8bd9091
SF		 1149}
1150
1151static int enic_set_vf_port(struct net_device *netdev, int vf,
1152 struct nlattr *port[])
1153{
1154 struct enic *enic = netdev_priv(netdev);
08f382eb
SF		 1155
1156 memset(&enic->pp, 0, sizeof(enic->pp));
1157
1158 if (port[IFLA_PORT_REQUEST]) {
1159 enic->pp.set |= ENIC_SET_REQUEST;
1160 enic->pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
1161 }
1162
1163 if (port[IFLA_PORT_PROFILE]) {
1164 enic->pp.set |= ENIC_SET_NAME;
1165 memcpy(enic->pp.name, nla_data(port[IFLA_PORT_PROFILE]),
1166 PORT_PROFILE_MAX);
1167 }
1168
1169 if (port[IFLA_PORT_INSTANCE_UUID]) {
1170 enic->pp.set |= ENIC_SET_INSTANCE;
1171 memcpy(enic->pp.instance_uuid,
1172 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1173 }
1174
1175 if (port[IFLA_PORT_HOST_UUID]) {
1176 enic->pp.set |= ENIC_SET_HOST;
1177 memcpy(enic->pp.host_uuid,
1178 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1179 }
f8bd9091
SF		 1180
1181 /* don't support VFs, yet */
1182 if (vf != PORT_SELF_VF)
1183 return -EOPNOTSUPP;
1184
08f382eb
SF		 1185 if (!(enic->pp.set & ENIC_SET_REQUEST))
1186 return -EOPNOTSUPP;
f8bd9091 1187
08f382eb 1188 if (enic->pp.request == PORT_REQUEST_ASSOCIATE) {
f8bd9091 1189
418c437d
SF		 1190 /* If the interface mac addr hasn't been assigned,
1191 * assign a random mac addr before setting port-
1192 * profile.
1193 */
1194
1195 if (is_zero_ether_addr(netdev->dev_addr))
1196 random_ether_addr(netdev->dev_addr);
f8bd9091
SF		 1197 }
1198
08f382eb 1199 return enic_set_port_profile(enic, netdev->dev_addr);
f8bd9091
SF		 1200}
1201
1202static int enic_get_vf_port(struct net_device *netdev, int vf,
1203 struct sk_buff *skb)
1204{
1205 struct enic *enic = netdev_priv(netdev);
1206 int err, error, done;
1207 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
1208
08f382eb
SF		 1209 if (!(enic->pp.set & ENIC_SET_APPLIED))
1210 return -ENODATA;
f8bd9091
SF		 1211
1212 err = enic_dev_init_done(enic, &done, &error);
f8bd9091 1213 if (err)
08f382eb 1214 error = err;
f8bd9091
SF		 1215
1216 switch (error) {
1217 case ERR_SUCCESS:
1218 if (!done)
1219 response = PORT_PROFILE_RESPONSE_INPROGRESS;
1220 break;
1221 case ERR_EINVAL:
1222 response = PORT_PROFILE_RESPONSE_INVALID;
1223 break;
1224 case ERR_EBADSTATE:
1225 response = PORT_PROFILE_RESPONSE_BADSTATE;
1226 break;
1227 case ERR_ENOMEM:
1228 response = PORT_PROFILE_RESPONSE_INSUFFICIENT_RESOURCES;
1229 break;
1230 default:
1231 response = PORT_PROFILE_RESPONSE_ERROR;
1232 break;
1233 }
1234
1235 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
1236 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
08f382eb
SF		 1237 if (enic->pp.set & ENIC_SET_NAME)
1238 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
1239 enic->pp.name);
1240 if (enic->pp.set & ENIC_SET_INSTANCE)
1241 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1242 enic->pp.instance_uuid);
1243 if (enic->pp.set & ENIC_SET_HOST)
1244 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
1245 enic->pp.host_uuid);
f8bd9091
SF		 1246
1247 return 0;
1248
1249nla_put_failure:
1250 return -EMSGSIZE;
1251}
1252
01f2e4ea
SF		 1253static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1254{
1255 struct enic *enic = vnic_dev_priv(rq->vdev);
1256
1257 if (!buf->os_buf)
1258 return;
1259
1260 pci_unmap_single(enic->pdev, buf->dma_addr,
1261 buf->len, PCI_DMA_FROMDEVICE);
1262 dev_kfree_skb_any(buf->os_buf);
1263}
1264
01f2e4ea
SF		 1265static int enic_rq_alloc_buf(struct vnic_rq *rq)
1266{
1267 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1268 struct net_device *netdev = enic->netdev;
01f2e4ea 1269 struct sk_buff *skb;
1825aca6 1270 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF		 1271 unsigned int os_buf_index = 0;
1272 dma_addr_t dma_addr;
1273
89d71a66 1274 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF		 1275 if (!skb)
1276 return -ENOMEM;
1277
1278 dma_addr = pci_map_single(enic->pdev, skb->data,
1279 len, PCI_DMA_FROMDEVICE);
1280
1281 enic_queue_rq_desc(rq, skb, os_buf_index,
1282 dma_addr, len);
1283
1284 return 0;
1285}
1286
4badc385
SF		 1287static int enic_rq_alloc_buf_a1(struct vnic_rq *rq)
1288{
1289 struct rq_enet_desc *desc = vnic_rq_next_desc(rq);
1290
1291 if (vnic_rq_posting_soon(rq)) {
1292
1293 /* SW workaround for A0 HW erratum: if we're just about
1294 * to write posted_index, insert a dummy desc
1295 * of type resvd
1296 */
1297
1298 rq_enet_desc_enc(desc, 0, RQ_ENET_TYPE_RESV2, 0);
1299 vnic_rq_post(rq, 0, 0, 0, 0);
1300 } else {
1301 return enic_rq_alloc_buf(rq);
1302 }
1303
1304 return 0;
1305}
1306
383ab92f
VK		 1307static int enic_dev_hw_version(struct enic *enic,
1308 enum vnic_dev_hw_version *hw_ver)
1309{
1310 int err;
1311
1312 spin_lock(&enic->devcmd_lock);
1313 err = vnic_dev_hw_version(enic->vdev, hw_ver);
1314 spin_unlock(&enic->devcmd_lock);
1315
1316 return err;
1317}
1318
4badc385
SF		 1319static int enic_set_rq_alloc_buf(struct enic *enic)
1320{
1321 enum vnic_dev_hw_version hw_ver;
1322 int err;
1323
383ab92f 1324 err = enic_dev_hw_version(enic, &hw_ver);
4badc385
SF		 1325 if (err)
1326 return err;
1327
1328 switch (hw_ver) {
1329 case VNIC_DEV_HW_VER_A1:
1330 enic->rq_alloc_buf = enic_rq_alloc_buf_a1;
1331 break;
1332 case VNIC_DEV_HW_VER_A2:
1333 case VNIC_DEV_HW_VER_UNKNOWN:
1334 enic->rq_alloc_buf = enic_rq_alloc_buf;
1335 break;
1336 default:
1337 return -ENODEV;
1338 }
1339
1340 return 0;
1341}
1342
01f2e4ea
SF		 1343static void enic_rq_indicate_buf(struct vnic_rq *rq,
1344 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1345 int skipped, void *opaque)
1346{
1347 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1348 struct net_device *netdev = enic->netdev;
01f2e4ea
SF		 1349 struct sk_buff *skb;
1350
1351 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1352 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1353 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1354 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1355 u8 packet_error;
f8cac14a 1356 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF		 1357 u32 rss_hash;
1358
1359 if (skipped)
1360 return;
1361
1362 skb = buf->os_buf;
1363 prefetch(skb->data - NET_IP_ALIGN);
1364 pci_unmap_single(enic->pdev, buf->dma_addr,
1365 buf->len, PCI_DMA_FROMDEVICE);
1366
1367 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1368 &type, &color, &q_number, &completed_index,
1369 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1370 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1371 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF		 1372 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1373 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1374 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1375 &fcs_ok);
1376
1377 if (packet_error) {
1378
350991e1
SF		 1379 if (!fcs_ok) {
1380 if (bytes_written > 0)
1381 enic->rq_bad_fcs++;
1382 else if (bytes_written == 0)
1383 enic->rq_truncated_pkts++;
1384 }
01f2e4ea
SF		 1385
1386 dev_kfree_skb_any(skb);
1387
1388 return;
1389 }
1390
1391 if (eop && bytes_written > 0) {
1392
1393 /* Good receive
1394 */
1395
1396 skb_put(skb, bytes_written);
86ca9db7 1397 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea
SF		 1398
1399 if (enic->csum_rx_enabled && !csum_not_calc) {
1400 skb->csum = htons(checksum);
1401 skb->ip_summed = CHECKSUM_COMPLETE;
1402 }
1403
86ca9db7 1404 skb->dev = netdev;
01f2e4ea 1405
f8cac14a
VK		 1406 if (enic->vlan_group && vlan_stripped &&
1407 (vlan_tci & CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK)) {
01f2e4ea 1408
88132f55
VK		 1409 if (netdev->features & NETIF_F_GRO)
1410 vlan_gro_receive(&enic->napi, enic->vlan_group,
f8cac14a 1411 vlan_tci, skb);
01f2e4ea
SF		 1412 else
1413 vlan_hwaccel_receive_skb(skb,
f8cac14a 1414 enic->vlan_group, vlan_tci);
01f2e4ea
SF		 1415
1416 } else {
1417
88132f55
VK		 1418 if (netdev->features & NETIF_F_GRO)
1419 napi_gro_receive(&enic->napi, skb);
01f2e4ea
SF		 1420 else
1421 netif_receive_skb(skb);
1422
1423 }
1424
1425 } else {
1426
1427 /* Buffer overflow
1428 */
1429
1430 dev_kfree_skb_any(skb);
1431 }
1432}
1433
1434static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1435 u8 type, u16 q_number, u16 completed_index, void *opaque)
1436{
1437 struct enic *enic = vnic_dev_priv(vdev);
1438
1439 vnic_rq_service(&enic->rq[q_number], cq_desc,
1440 completed_index, VNIC_RQ_RETURN_DESC,
1441 enic_rq_indicate_buf, opaque);
1442
1443 return 0;
1444}
1445
01f2e4ea
SF		 1446static int enic_poll(struct napi_struct *napi, int budget)
1447{
1448 struct enic *enic = container_of(napi, struct enic, napi);
01f2e4ea
SF		 1449 unsigned int rq_work_to_do = budget;
1450 unsigned int wq_work_to_do = -1; /* no limit */
1451 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1452 int err;
01f2e4ea
SF		 1453
1454 /* Service RQ (first) and WQ
1455 */
1456
1457 rq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
1458 rq_work_to_do, enic_rq_service, NULL);
1459
1460 wq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
1461 wq_work_to_do, enic_wq_service, NULL);
1462
1463 /* Accumulate intr event credits for this polling
1464 * cycle. An intr event is the completion of a
1465 * a WQ or RQ packet.
1466 */
1467
1468 work_done = rq_work_done + wq_work_done;
1469
1470 if (work_done > 0)
1471 vnic_intr_return_credits(&enic->intr[ENIC_INTX_WQ_RQ],
1472 work_done,
1473 0 /* don't unmask intr */,
1474 0 /* don't reset intr timer */);
1475
2d6ddced 1476 err = vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
01f2e4ea 1477
2d6ddced
SF		 1478 /* Buffer allocation failed. Stay in polling
1479 * mode so we can try to fill the ring again.
1480 */
01f2e4ea 1481
2d6ddced
SF		 1482 if (err)
1483 rq_work_done = rq_work_to_do;
01f2e4ea 1484
2d6ddced 1485 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1486
2d6ddced 1487 /* Some work done, but not enough to stay in polling,
88132f55 1488 * exit polling
01f2e4ea
SF		 1489 */
1490
288379f0 1491 napi_complete(napi);
ed8af6b2 1492 vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
01f2e4ea
SF		 1493 }
1494
1495 return rq_work_done;
1496}
1497
1498static int enic_poll_msix(struct napi_struct *napi, int budget)
1499{
1500 struct enic *enic = container_of(napi, struct enic, napi);
01f2e4ea
SF		 1501 unsigned int work_to_do = budget;
1502 unsigned int work_done;
2d6ddced 1503 int err;
01f2e4ea
SF		 1504
1505 /* Service RQ
1506 */
1507
1508 work_done = vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
1509 work_to_do, enic_rq_service, NULL);
1510
2d6ddced
SF		 1511 /* Return intr event credits for this polling
1512 * cycle. An intr event is the completion of a
1513 * RQ packet.
1514 */
01f2e4ea 1515
2d6ddced 1516 if (work_done > 0)
01f2e4ea
SF		 1517 vnic_intr_return_credits(&enic->intr[ENIC_MSIX_RQ],
1518 work_done,
1519 0 /* don't unmask intr */,
1520 0 /* don't reset intr timer */);
01f2e4ea 1521
2d6ddced
SF		 1522 err = vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
1523
1524 /* Buffer allocation failed. Stay in polling mode
1525 * so we can try to fill the ring again.
1526 */
1527
1528 if (err)
1529 work_done = work_to_do;
1530
1531 if (work_done < work_to_do) {
1532
1533 /* Some work done, but not enough to stay in polling,
88132f55 1534 * exit polling
01f2e4ea
SF		 1535 */
1536
288379f0 1537 napi_complete(napi);
01f2e4ea
SF		 1538 vnic_intr_unmask(&enic->intr[ENIC_MSIX_RQ]);
1539 }
1540
1541 return work_done;
1542}
1543
1544static void enic_notify_timer(unsigned long data)
1545{
1546 struct enic *enic = (struct enic *)data;
1547
1548 enic_notify_check(enic);
1549
25f0a061
SF		 1550 mod_timer(&enic->notify_timer,
1551 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF		 1552}
1553
1554static void enic_free_intr(struct enic *enic)
1555{
1556 struct net_device *netdev = enic->netdev;
1557 unsigned int i;
1558
1559 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1560 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF		 1561 free_irq(enic->pdev->irq, netdev);
1562 break;
8f4d248c
SF		 1563 case VNIC_DEV_INTR_MODE_MSI:
1564 free_irq(enic->pdev->irq, enic);
1565 break;
01f2e4ea
SF		 1566 case VNIC_DEV_INTR_MODE_MSIX:
1567 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1568 if (enic->msix[i].requested)
1569 free_irq(enic->msix_entry[i].vector,
1570 enic->msix[i].devid);
1571 break;
1572 default:
1573 break;
1574 }
1575}
1576
1577static int enic_request_intr(struct enic *enic)
1578{
1579 struct net_device *netdev = enic->netdev;
1580 unsigned int i;
1581 int err = 0;
1582
1583 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1584
1585 case VNIC_DEV_INTR_MODE_INTX:
1586
1587 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1588 IRQF_SHARED, netdev->name, netdev);
1589 break;
1590
1591 case VNIC_DEV_INTR_MODE_MSI:
1592
1593 err = request_irq(enic->pdev->irq, enic_isr_msi,
1594 0, netdev->name, enic);
1595 break;
1596
1597 case VNIC_DEV_INTR_MODE_MSIX:
1598
1599 sprintf(enic->msix[ENIC_MSIX_RQ].devname,
8f4d248c 1600 "%.11s-rx-0", netdev->name);
01f2e4ea
SF		 1601 enic->msix[ENIC_MSIX_RQ].isr = enic_isr_msix_rq;
1602 enic->msix[ENIC_MSIX_RQ].devid = enic;
1603
1604 sprintf(enic->msix[ENIC_MSIX_WQ].devname,
8f4d248c 1605 "%.11s-tx-0", netdev->name);
01f2e4ea
SF		 1606 enic->msix[ENIC_MSIX_WQ].isr = enic_isr_msix_wq;
1607 enic->msix[ENIC_MSIX_WQ].devid = enic;
1608
1609 sprintf(enic->msix[ENIC_MSIX_ERR].devname,
1610 "%.11s-err", netdev->name);
1611 enic->msix[ENIC_MSIX_ERR].isr = enic_isr_msix_err;
1612 enic->msix[ENIC_MSIX_ERR].devid = enic;
1613
1614 sprintf(enic->msix[ENIC_MSIX_NOTIFY].devname,
1615 "%.11s-notify", netdev->name);
1616 enic->msix[ENIC_MSIX_NOTIFY].isr = enic_isr_msix_notify;
1617 enic->msix[ENIC_MSIX_NOTIFY].devid = enic;
1618
1619 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) {
1620 err = request_irq(enic->msix_entry[i].vector,
1621 enic->msix[i].isr, 0,
1622 enic->msix[i].devname,
1623 enic->msix[i].devid);
1624 if (err) {
1625 enic_free_intr(enic);
1626 break;
1627 }
1628 enic->msix[i].requested = 1;
1629 }
1630
1631 break;
1632
1633 default:
1634 break;
1635 }
1636
1637 return err;
1638}
1639
b3d18d19
SF		 1640static void enic_synchronize_irqs(struct enic *enic)
1641{
1642 unsigned int i;
1643
1644 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1645 case VNIC_DEV_INTR_MODE_INTX:
1646 case VNIC_DEV_INTR_MODE_MSI:
1647 synchronize_irq(enic->pdev->irq);
1648 break;
1649 case VNIC_DEV_INTR_MODE_MSIX:
1650 for (i = 0; i < enic->intr_count; i++)
1651 synchronize_irq(enic->msix_entry[i].vector);
1652 break;
1653 default:
1654 break;
1655 }
1656}
1657
383ab92f 1658static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF		 1659{
1660 int err;
1661
56ac88b3 1662 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF		 1663 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1664 case VNIC_DEV_INTR_MODE_INTX:
1665 err = vnic_dev_notify_set(enic->vdev, ENIC_INTX_NOTIFY);
1666 break;
1667 case VNIC_DEV_INTR_MODE_MSIX:
1668 err = vnic_dev_notify_set(enic->vdev, ENIC_MSIX_NOTIFY);
1669 break;
1670 default:
1671 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1672 break;
1673 }
56ac88b3 1674 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF		 1675
1676 return err;
1677}
1678
383ab92f
VK		 1679static int enic_dev_notify_unset(struct enic *enic)
1680{
1681 int err;
1682
1683 spin_lock(&enic->devcmd_lock);
1684 err = vnic_dev_notify_unset(enic->vdev);
1685 spin_unlock(&enic->devcmd_lock);
1686
1687 return err;
1688}
1689
1690static int enic_dev_enable(struct enic *enic)
1691{
1692 int err;
1693
1694 spin_lock(&enic->devcmd_lock);
1695 err = vnic_dev_enable(enic->vdev);
1696 spin_unlock(&enic->devcmd_lock);
1697
1698 return err;
1699}
1700
1701static int enic_dev_disable(struct enic *enic)
1702{
1703 int err;
1704
1705 spin_lock(&enic->devcmd_lock);
1706 err = vnic_dev_disable(enic->vdev);
1707 spin_unlock(&enic->devcmd_lock);
1708
1709 return err;
1710}
1711
01f2e4ea
SF		 1712static void enic_notify_timer_start(struct enic *enic)
1713{
1714 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1715 case VNIC_DEV_INTR_MODE_MSI:
1716 mod_timer(&enic->notify_timer, jiffies);
1717 break;
1718 default:
1719 /* Using intr for notification for INTx/MSI-X */
1720 break;
1721 };
1722}
1723
1724/* rtnl lock is held, process context */
1725static int enic_open(struct net_device *netdev)
1726{
1727 struct enic *enic = netdev_priv(netdev);
1728 unsigned int i;
1729 int err;
1730
4b75a442
SF		 1731 err = enic_request_intr(enic);
1732 if (err) {
a7a79deb 1733 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF		 1734 return err;
1735 }
1736
383ab92f 1737 err = enic_dev_notify_set(enic);
4b75a442 1738 if (err) {
a7a79deb
VK		 1739 netdev_err(netdev,
1740 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF		 1741 goto err_out_free_intr;
1742 }
1743
01f2e4ea 1744 for (i = 0; i < enic->rq_count; i++) {
2d6ddced
SF		 1745 vnic_rq_fill(&enic->rq[i], enic->rq_alloc_buf);
1746 /* Need at least one buffer on ring to get going */
1747 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1748 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1749 err = -ENOMEM;
4b75a442 1750 goto err_out_notify_unset;
01f2e4ea
SF		 1751 }
1752 }
1753
1754 for (i = 0; i < enic->wq_count; i++)
1755 vnic_wq_enable(&enic->wq[i]);
1756 for (i = 0; i < enic->rq_count; i++)
1757 vnic_rq_enable(&enic->rq[i]);
1758
f8bd9091 1759 enic_dev_add_station_addr(enic);
01f2e4ea
SF		 1760 enic_set_multicast_list(netdev);
1761
1762 netif_wake_queue(netdev);
1763 napi_enable(&enic->napi);
383ab92f 1764 enic_dev_enable(enic);
01f2e4ea
SF		 1765
1766 for (i = 0; i < enic->intr_count; i++)
1767 vnic_intr_unmask(&enic->intr[i]);
1768
1769 enic_notify_timer_start(enic);
1770
1771 return 0;
4b75a442
SF		 1772
1773err_out_notify_unset:
383ab92f 1774 enic_dev_notify_unset(enic);
4b75a442
SF		 1775err_out_free_intr:
1776 enic_free_intr(enic);
1777
1778 return err;
01f2e4ea
SF		 1779}
1780
1781/* rtnl lock is held, process context */
1782static int enic_stop(struct net_device *netdev)
1783{
1784 struct enic *enic = netdev_priv(netdev);
1785 unsigned int i;
1786 int err;
1787
29046f9b 1788 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1789 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK		 1790 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1791 }
b3d18d19
SF		 1792
1793 enic_synchronize_irqs(enic);
1794
01f2e4ea
SF		 1795 del_timer_sync(&enic->notify_timer);
1796
383ab92f 1797 enic_dev_disable(enic);
01f2e4ea 1798 napi_disable(&enic->napi);
b3d18d19
SF		 1799 netif_carrier_off(netdev);
1800 netif_tx_disable(netdev);
f8bd9091
SF		 1801 enic_dev_del_station_addr(enic);
1802
01f2e4ea
SF		 1803 for (i = 0; i < enic->wq_count; i++) {
1804 err = vnic_wq_disable(&enic->wq[i]);
1805 if (err)
1806 return err;
1807 }
1808 for (i = 0; i < enic->rq_count; i++) {
1809 err = vnic_rq_disable(&enic->rq[i]);
1810 if (err)
1811 return err;
1812 }
1813
383ab92f 1814 enic_dev_notify_unset(enic);
4b75a442
SF		 1815 enic_free_intr(enic);
1816
01f2e4ea
SF		 1817 for (i = 0; i < enic->wq_count; i++)
1818 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1819 for (i = 0; i < enic->rq_count; i++)
1820 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1821 for (i = 0; i < enic->cq_count; i++)
1822 vnic_cq_clean(&enic->cq[i]);
1823 for (i = 0; i < enic->intr_count; i++)
1824 vnic_intr_clean(&enic->intr[i]);
1825
1826 return 0;
1827}
1828
1829static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1830{
1831 struct enic *enic = netdev_priv(netdev);
1832 int running = netif_running(netdev);
1833
25f0a061
SF		 1834 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1835 return -EINVAL;
1836
01f2e4ea
SF		 1837 if (running)
1838 enic_stop(netdev);
1839
01f2e4ea
SF		 1840 netdev->mtu = new_mtu;
1841
1842 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK		 1843 netdev_warn(netdev,
1844 "interface MTU (%d) set higher than port MTU (%d)\n",
1845 netdev->mtu, enic->port_mtu);
01f2e4ea
SF		 1846
1847 if (running)
1848 enic_open(netdev);
1849
1850 return 0;
1851}
1852
1853#ifdef CONFIG_NET_POLL_CONTROLLER
1854static void enic_poll_controller(struct net_device *netdev)
1855{
1856 struct enic *enic = netdev_priv(netdev);
1857 struct vnic_dev *vdev = enic->vdev;
1858
1859 switch (vnic_dev_get_intr_mode(vdev)) {
1860 case VNIC_DEV_INTR_MODE_MSIX:
1861 enic_isr_msix_rq(enic->pdev->irq, enic);
1862 enic_isr_msix_wq(enic->pdev->irq, enic);
1863 break;
1864 case VNIC_DEV_INTR_MODE_MSI:
1865 enic_isr_msi(enic->pdev->irq, enic);
1866 break;
1867 case VNIC_DEV_INTR_MODE_INTX:
1868 enic_isr_legacy(enic->pdev->irq, netdev);
1869 break;
1870 default:
1871 break;
1872 }
1873}
1874#endif
1875
1876static int enic_dev_wait(struct vnic_dev *vdev,
1877 int (*start)(struct vnic_dev *, int),
1878 int (*finished)(struct vnic_dev *, int *),
1879 int arg)
1880{
1881 unsigned long time;
1882 int done;
1883 int err;
1884
1885 BUG_ON(in_interrupt());
1886
1887 err = start(vdev, arg);
1888 if (err)
1889 return err;
1890
1891 /* Wait for func to complete...2 seconds max
1892 */
1893
1894 time = jiffies + (HZ * 2);
1895 do {
1896
1897 err = finished(vdev, &done);
1898 if (err)
1899 return err;
1900
1901 if (done)
1902 return 0;
1903
1904 schedule_timeout_uninterruptible(HZ / 10);
1905
1906 } while (time_after(time, jiffies));
1907
1908 return -ETIMEDOUT;
1909}
1910
1911static int enic_dev_open(struct enic *enic)
1912{
1913 int err;
1914
1915 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1916 vnic_dev_open_done, 0);
1917 if (err)
a7a79deb
VK		 1918 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1919 err);
01f2e4ea
SF		 1920
1921 return err;
1922}
1923
99ef5639 1924static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF		 1925{
1926 int err;
1927
99ef5639
VK		 1928 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1929 vnic_dev_hang_reset_done, 0);
01f2e4ea 1930 if (err)
a7a79deb
VK		 1931 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1932 err);
01f2e4ea
SF		 1933
1934 return err;
1935}
1936
68f71708
SF		 1937static int enic_set_niccfg(struct enic *enic)
1938{
1939 const u8 rss_default_cpu = 0;
1940 const u8 rss_hash_type = 0;
1941 const u8 rss_hash_bits = 0;
1942 const u8 rss_base_cpu = 0;
1943 const u8 rss_enable = 0;
1944 const u8 tso_ipid_split_en = 0;
1945 const u8 ig_vlan_strip_en = 1;
383ab92f 1946 int err;
68f71708
SF		 1947
1948 /* Enable VLAN tag stripping. RSS not enabled (yet).
6ba9cdc0 1949 */
68f71708 1950
383ab92f
VK		 1951 spin_lock(&enic->devcmd_lock);
1952 err = enic_set_nic_cfg(enic,
68f71708
SF		 1953 rss_default_cpu, rss_hash_type,
1954 rss_hash_bits, rss_base_cpu,
1955 rss_enable, tso_ipid_split_en,
1956 ig_vlan_strip_en);
383ab92f
VK		 1957 spin_unlock(&enic->devcmd_lock);
1958
1959 return err;
1960}
1961
1962static int enic_dev_hang_notify(struct enic *enic)
1963{
1964 int err;
1965
1966 spin_lock(&enic->devcmd_lock);
1967 err = vnic_dev_hang_notify(enic->vdev);
1968 spin_unlock(&enic->devcmd_lock);
1969
1970 return err;
68f71708
SF		 1971}
1972
f8cac14a
VK		 1973int enic_dev_set_ig_vlan_rewrite_mode(struct enic *enic)
1974{
1975 int err;
1976
1977 spin_lock(&enic->devcmd_lock);
1978 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
1979 IG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN);
1980 spin_unlock(&enic->devcmd_lock);
1981
1982 return err;
1983}
1984
01f2e4ea
SF		 1985static void enic_reset(struct work_struct *work)
1986{
1987 struct enic *enic = container_of(work, struct enic, reset);
1988
1989 if (!netif_running(enic->netdev))
1990 return;
1991
1992 rtnl_lock();
1993
383ab92f 1994 enic_dev_hang_notify(enic);
01f2e4ea 1995 enic_stop(enic->netdev);
99ef5639
VK		 1996 enic_dev_hang_reset(enic);
1997 enic_reset_multicast_list(enic);
01f2e4ea 1998 enic_init_vnic_resources(enic);
68f71708 1999 enic_set_niccfg(enic);
f8cac14a 2000 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF		 2001 enic_open(enic->netdev);
2002
2003 rtnl_unlock();
2004}
2005
2006static int enic_set_intr_mode(struct enic *enic)
2007{
6ba9cdc0
SF		 2008 unsigned int n = 1;
2009 unsigned int m = 1;
01f2e4ea
SF		 2010 unsigned int i;
2011
2012 /* Set interrupt mode (INTx, MSI, MSI-X) depending
2013 * system capabilities.
2014 *
2015 * Try MSI-X first
2016 *
2017 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2018 * (the second to last INTR is used for WQ/RQ errors)
2019 * (the last INTR is used for notifications)
2020 */
2021
2022 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2023 for (i = 0; i < n + m + 2; i++)
2024 enic->msix_entry[i].entry = i;
2025
2026 if (enic->config.intr_mode < 1 &&
2027 enic->rq_count >= n &&
2028 enic->wq_count >= m &&
2029 enic->cq_count >= n + m &&
2030 enic->intr_count >= n + m + 2 &&
2031 !pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
2032
2033 enic->rq_count = n;
2034 enic->wq_count = m;
2035 enic->cq_count = n + m;
2036 enic->intr_count = n + m + 2;
2037
2038 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSIX);
2039
2040 return 0;
2041 }
2042
2043 /* Next try MSI
2044 *
2045 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2046 */
2047
2048 if (enic->config.intr_mode < 2 &&
2049 enic->rq_count >= 1 &&
2050 enic->wq_count >= 1 &&
2051 enic->cq_count >= 2 &&
2052 enic->intr_count >= 1 &&
2053 !pci_enable_msi(enic->pdev)) {
2054
2055 enic->rq_count = 1;
2056 enic->wq_count = 1;
2057 enic->cq_count = 2;
2058 enic->intr_count = 1;
2059
2060 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2061
2062 return 0;
2063 }
2064
2065 /* Next try INTx
2066 *
2067 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2068 * (the first INTR is used for WQ/RQ)
2069 * (the second INTR is used for WQ/RQ errors)
2070 * (the last INTR is used for notifications)
2071 */
2072
2073 if (enic->config.intr_mode < 3 &&
2074 enic->rq_count >= 1 &&
2075 enic->wq_count >= 1 &&
2076 enic->cq_count >= 2 &&
2077 enic->intr_count >= 3) {
2078
2079 enic->rq_count = 1;
2080 enic->wq_count = 1;
2081 enic->cq_count = 2;
2082 enic->intr_count = 3;
2083
2084 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2085
2086 return 0;
2087 }
2088
2089 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2090
2091 return -EINVAL;
2092}
2093
2094static void enic_clear_intr_mode(struct enic *enic)
2095{
2096 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2097 case VNIC_DEV_INTR_MODE_MSIX:
2098 pci_disable_msix(enic->pdev);
2099 break;
2100 case VNIC_DEV_INTR_MODE_MSI:
2101 pci_disable_msi(enic->pdev);
2102 break;
2103 default:
2104 break;
2105 }
2106
2107 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2108}
2109
f8bd9091
SF		 2110static const struct net_device_ops enic_netdev_dynamic_ops = {
2111 .ndo_open = enic_open,
2112 .ndo_stop = enic_stop,
2113 .ndo_start_xmit = enic_hard_start_xmit,
2114 .ndo_get_stats = enic_get_stats,
2115 .ndo_validate_addr = eth_validate_addr,
2116 .ndo_set_multicast_list = enic_set_multicast_list,
2117 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2118 .ndo_change_mtu = enic_change_mtu,
2119 .ndo_vlan_rx_register = enic_vlan_rx_register,
2120 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2121 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2122 .ndo_tx_timeout = enic_tx_timeout,
2123 .ndo_set_vf_port = enic_set_vf_port,
2124 .ndo_get_vf_port = enic_get_vf_port,
2125#ifdef CONFIG_NET_POLL_CONTROLLER
2126 .ndo_poll_controller = enic_poll_controller,
2127#endif
2128};
2129
afe29f7a
SH		 2130static const struct net_device_ops enic_netdev_ops = {
2131 .ndo_open = enic_open,
2132 .ndo_stop = enic_stop,
00829823 2133 .ndo_start_xmit = enic_hard_start_xmit,
afe29f7a
SH		 2134 .ndo_get_stats = enic_get_stats,
2135 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2136 .ndo_set_mac_address = enic_set_mac_address,
383ab92f 2137 .ndo_set_multicast_list = enic_set_multicast_list,
afe29f7a
SH		 2138 .ndo_change_mtu = enic_change_mtu,
2139 .ndo_vlan_rx_register = enic_vlan_rx_register,
2140 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2141 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2142 .ndo_tx_timeout = enic_tx_timeout,
2143#ifdef CONFIG_NET_POLL_CONTROLLER
2144 .ndo_poll_controller = enic_poll_controller,
2145#endif
2146};
2147
6fdfa970
SF		 2148void enic_dev_deinit(struct enic *enic)
2149{
2150 netif_napi_del(&enic->napi);
2151 enic_free_vnic_resources(enic);
2152 enic_clear_intr_mode(enic);
2153}
2154
383ab92f
VK		 2155static int enic_dev_stats_clear(struct enic *enic)
2156{
2157 int err;
2158
2159 spin_lock(&enic->devcmd_lock);
2160 err = vnic_dev_stats_clear(enic->vdev);
2161 spin_unlock(&enic->devcmd_lock);
2162
2163 return err;
2164}
2165
6fdfa970
SF		 2166int enic_dev_init(struct enic *enic)
2167{
a7a79deb 2168 struct device *dev = enic_get_dev(enic);
6fdfa970
SF		 2169 struct net_device *netdev = enic->netdev;
2170 int err;
2171
2172 /* Get vNIC configuration
2173 */
2174
2175 err = enic_get_vnic_config(enic);
2176 if (err) {
a7a79deb 2177 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF		 2178 return err;
2179 }
2180
2181 /* Get available resource counts
2182 */
2183
2184 enic_get_res_counts(enic);
2185
2186 /* Set interrupt mode based on resource counts and system
2187 * capabilities
2188 */
2189
2190 err = enic_set_intr_mode(enic);
2191 if (err) {
a7a79deb
VK		 2192 dev_err(dev, "Failed to set intr mode based on resource "
2193 "counts and system capabilities, aborting\n");
6fdfa970
SF		 2194 return err;
2195 }
2196
2197 /* Allocate and configure vNIC resources
2198 */
2199
2200 err = enic_alloc_vnic_resources(enic);
2201 if (err) {
a7a79deb 2202 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF		 2203 goto err_out_free_vnic_resources;
2204 }
2205
2206 enic_init_vnic_resources(enic);
2207
383ab92f
VK		 2208 /* Clear LIF stats
2209 */
2210 enic_dev_stats_clear(enic);
2211
6fdfa970
SF		 2212 err = enic_set_rq_alloc_buf(enic);
2213 if (err) {
a7a79deb 2214 dev_err(dev, "Failed to set RQ buffer allocator, aborting\n");
6fdfa970
SF		 2215 goto err_out_free_vnic_resources;
2216 }
2217
2218 err = enic_set_niccfg(enic);
2219 if (err) {
a7a79deb 2220 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF		 2221 goto err_out_free_vnic_resources;
2222 }
2223
f8cac14a
VK		 2224 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2225 if (err) {
a7a79deb 2226 netdev_err(netdev,
f8cac14a
VK		 2227 "Failed to set ingress vlan rewrite mode, aborting.\n");
2228 goto err_out_free_vnic_resources;
2229 }
2230
6fdfa970
SF		 2231 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2232 default:
2233 netif_napi_add(netdev, &enic->napi, enic_poll, 64);
2234 break;
2235 case VNIC_DEV_INTR_MODE_MSIX:
2236 netif_napi_add(netdev, &enic->napi, enic_poll_msix, 64);
2237 break;
2238 }
2239
2240 return 0;
2241
2242err_out_free_vnic_resources:
2243 enic_clear_intr_mode(enic);
2244 enic_free_vnic_resources(enic);
2245
2246 return err;
2247}
2248
27e6c7d3
SF		 2249static void enic_iounmap(struct enic *enic)
2250{
2251 unsigned int i;
2252
2253 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2254 if (enic->bar[i].vaddr)
2255 iounmap(enic->bar[i].vaddr);
2256}
2257
01f2e4ea
SF		 2258static int __devinit enic_probe(struct pci_dev *pdev,
2259 const struct pci_device_id *ent)
2260{
a7a79deb 2261 struct device *dev = &pdev->dev;
01f2e4ea
SF		 2262 struct net_device *netdev;
2263 struct enic *enic;
2264 int using_dac = 0;
2265 unsigned int i;
2266 int err;
2267
01f2e4ea
SF		 2268 /* Allocate net device structure and initialize. Private
2269 * instance data is initialized to zero.
2270 */
2271
2272 netdev = alloc_etherdev(sizeof(struct enic));
2273 if (!netdev) {
a7a79deb 2274 pr_err("Etherdev alloc failed, aborting\n");
01f2e4ea
SF		 2275 return -ENOMEM;
2276 }
2277
01f2e4ea
SF		 2278 pci_set_drvdata(pdev, netdev);
2279
2280 SET_NETDEV_DEV(netdev, &pdev->dev);
2281
2282 enic = netdev_priv(netdev);
2283 enic->netdev = netdev;
2284 enic->pdev = pdev;
2285
2286 /* Setup PCI resources
2287 */
2288
29046f9b 2289 err = pci_enable_device_mem(pdev);
01f2e4ea 2290 if (err) {
a7a79deb 2291 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF		 2292 goto err_out_free_netdev;
2293 }
2294
2295 err = pci_request_regions(pdev, DRV_NAME);
2296 if (err) {
a7a79deb 2297 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF		 2298 goto err_out_disable_device;
2299 }
2300
2301 pci_set_master(pdev);
2302
2303 /* Query PCI controller on system for DMA addressing
2304 * limitation for the device. Try 40-bit first, and
2305 * fail to 32-bit.
2306 */
2307
50cf156a 2308 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2309 if (err) {
284901a9 2310 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2311 if (err) {
a7a79deb 2312 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF		 2313 goto err_out_release_regions;
2314 }
284901a9 2315 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2316 if (err) {
a7a79deb
VK		 2317 dev_err(dev, "Unable to obtain %u-bit DMA "
2318 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF		 2319 goto err_out_release_regions;
2320 }
2321 } else {
50cf156a 2322 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2323 if (err) {
a7a79deb
VK		 2324 dev_err(dev, "Unable to obtain %u-bit DMA "
2325 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF		 2326 goto err_out_release_regions;
2327 }
2328 using_dac = 1;
2329 }
2330
27e6c7d3 2331 /* Map vNIC resources from BAR0-5
01f2e4ea
SF		 2332 */
2333
27e6c7d3
SF		 2334 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2335 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2336 continue;
2337 enic->bar[i].len = pci_resource_len(pdev, i);
2338 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2339 if (!enic->bar[i].vaddr) {
a7a79deb 2340 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF		 2341 err = -ENODEV;
2342 goto err_out_iounmap;
2343 }
2344 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF		 2345 }
2346
2347 /* Register vNIC device
2348 */
2349
27e6c7d3
SF		 2350 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2351 ARRAY_SIZE(enic->bar));
01f2e4ea 2352 if (!enic->vdev) {
a7a79deb 2353 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF		 2354 err = -ENODEV;
2355 goto err_out_iounmap;
2356 }
2357
2358 /* Issue device open to get device in known state
2359 */
2360
2361 err = enic_dev_open(enic);
2362 if (err) {
a7a79deb 2363 dev_err(dev, "vNIC dev open failed, aborting\n");
01f2e4ea
SF		 2364 goto err_out_vnic_unregister;
2365 }
2366
2367 /* Issue device init to initialize the vnic-to-switch link.
2368 * We'll start with carrier off and wait for link UP
2369 * notification later to turn on carrier. We don't need
2370 * to wait here for the vnic-to-switch link initialization
2371 * to complete; link UP notification is the indication that
2372 * the process is complete.
2373 */
2374
2375 netif_carrier_off(netdev);
2376
a7a79deb
VK		 2377 /* Do not call dev_init for a dynamic vnic.
2378 * For a dynamic vnic, init_prov_info will be
2379 * called later by an upper layer.
2380 */
2381
f8bd9091
SF		 2382 if (!enic_is_dynamic(enic)) {
2383 err = vnic_dev_init(enic->vdev, 0);
2384 if (err) {
a7a79deb 2385 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF		 2386 goto err_out_dev_close;
2387 }
01f2e4ea
SF		 2388 }
2389
383ab92f
VK		 2390 /* Setup devcmd lock
2391 */
2392
2393 spin_lock_init(&enic->devcmd_lock);
2394
6fdfa970 2395 err = enic_dev_init(enic);
01f2e4ea 2396 if (err) {
a7a79deb 2397 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF		 2398 goto err_out_dev_close;
2399 }
2400
383ab92f 2401 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF		 2402 */
2403
2404 init_timer(&enic->notify_timer);
2405 enic->notify_timer.function = enic_notify_timer;
2406 enic->notify_timer.data = (unsigned long)enic;
2407
2408 INIT_WORK(&enic->reset, enic_reset);
2409
2410 for (i = 0; i < enic->wq_count; i++)
2411 spin_lock_init(&enic->wq_lock[i]);
2412
01f2e4ea
SF		 2413 /* Register net device
2414 */
2415
2416 enic->port_mtu = enic->config.mtu;
2417 (void)enic_change_mtu(netdev, enic->port_mtu);
2418
2419 err = enic_set_mac_addr(netdev, enic->mac_addr);
2420 if (err) {
a7a79deb 2421 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2422 goto err_out_dev_deinit;
01f2e4ea
SF		 2423 }
2424
7c844599
SF		 2425 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2426 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2427
f8bd9091
SF		 2428 if (enic_is_dynamic(enic))
2429 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2430 else
2431 netdev->netdev_ops = &enic_netdev_ops;
2432
01f2e4ea
SF		 2433 netdev->watchdog_timeo = 2 * HZ;
2434 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2435
73c1ea9b 2436 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK		 2437 if (ENIC_SETTING(enic, LOOP)) {
2438 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2439 enic->loop_enable = 1;
2440 enic->loop_tag = enic->config.loop_tag;
2441 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2442 }
01f2e4ea
SF		 2443 if (ENIC_SETTING(enic, TXCSUM))
2444 netdev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2445 if (ENIC_SETTING(enic, TSO))
2446 netdev->features |= NETIF_F_TSO |
2447 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
86ca9db7 2448 if (ENIC_SETTING(enic, LRO))
88132f55 2449 netdev->features |= NETIF_F_GRO;
01f2e4ea
SF		 2450 if (using_dac)
2451 netdev->features |= NETIF_F_HIGHDMA;
2452
01f2e4ea
SF		 2453 enic->csum_rx_enabled = ENIC_SETTING(enic, RXCSUM);
2454
01f2e4ea
SF		 2455 err = register_netdev(netdev);
2456 if (err) {
a7a79deb 2457 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2458 goto err_out_dev_deinit;
01f2e4ea
SF		 2459 }
2460
2461 return 0;
2462
6fdfa970
SF		 2463err_out_dev_deinit:
2464 enic_dev_deinit(enic);
01f2e4ea
SF		 2465err_out_dev_close:
2466 vnic_dev_close(enic->vdev);
2467err_out_vnic_unregister:
01f2e4ea
SF		 2468 vnic_dev_unregister(enic->vdev);
2469err_out_iounmap:
2470 enic_iounmap(enic);
2471err_out_release_regions:
2472 pci_release_regions(pdev);
2473err_out_disable_device:
2474 pci_disable_device(pdev);
2475err_out_free_netdev:
2476 pci_set_drvdata(pdev, NULL);
2477 free_netdev(netdev);
2478
2479 return err;
2480}
2481
2482static void __devexit enic_remove(struct pci_dev *pdev)
2483{
2484 struct net_device *netdev = pci_get_drvdata(pdev);
2485
2486 if (netdev) {
2487 struct enic *enic = netdev_priv(netdev);
2488
2489 flush_scheduled_work();
2490 unregister_netdev(netdev);
6fdfa970 2491 enic_dev_deinit(enic);
01f2e4ea 2492 vnic_dev_close(enic->vdev);
01f2e4ea
SF		 2493 vnic_dev_unregister(enic->vdev);
2494 enic_iounmap(enic);
2495 pci_release_regions(pdev);
2496 pci_disable_device(pdev);
2497 pci_set_drvdata(pdev, NULL);
2498 free_netdev(netdev);
2499 }
2500}
2501
2502static struct pci_driver enic_driver = {
2503 .name = DRV_NAME,
2504 .id_table = enic_id_table,
2505 .probe = enic_probe,
2506 .remove = __devexit_p(enic_remove),
2507};
2508
2509static int __init enic_init_module(void)
2510{
a7a79deb 2511 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF		 2512
2513 return pci_register_driver(&enic_driver);
2514}
2515
2516static void __exit enic_cleanup_module(void)
2517{
2518 pci_unregister_driver(&enic_driver);
2519}
2520
2521module_init(enic_init_module);
2522module_exit(enic_cleanup_module);
Clone of davem's net-next-2.6 tree