[net-next-2.6.git] / drivers / net / eexpress.h

/*
 * eexpress.h: Intel EtherExpress16 defines
 */

/*
 * EtherExpress card register addresses
 * as offsets from the base IO region (dev->base_addr)
 */

#define DATAPORT      0x0000
#define WRITE_PTR     0x0002
#define READ_PTR      0x0004
#define SIGNAL_CA     0x0006
#define SET_IRQ       0x0007
#define SM_PTR        0x0008
#define	MEM_Dec	      0x000a
#define MEM_Ctrl      0x000b
#define MEM_Page_Ctrl 0x000c
#define Config        0x000d
#define EEPROM_Ctrl   0x000e
#define ID_PORT       0x000f
#define	MEM_ECtrl     0x000f

/*
 * card register defines
 */

/* SET_IRQ */
#define SIRQ_en       0x08
#define SIRQ_dis      0x00

/* EEPROM_Ctrl */
#define EC_Clk        0x01
#define EC_CS         0x02
#define EC_Wr         0x04
#define EC_Rd         0x08
#define ASIC_RST      0x40
#define i586_RST      0x80

#define eeprom_delay() { udelay(40); }

/*
 * i82586 Memory Configuration
 */

/* (System Configuration Pointer) System start up block, read after 586_RST */
#define SCP_START 0xfff6

/* Intermediate System Configuration Pointer */
#define ISCP_START 0x0000

/* System Command Block */
#define SCB_START 0x0008

/* Start of buffer region.  Everything before this is used for control
 * structures and the CU configuration program.  The memory layout is
 * determined in eexp_hw_probe(), once we know how much memory is
 * available on the card.
 */

#define TX_BUF_START 0x0100

#define TX_BUF_SIZE ((24+ETH_FRAME_LEN+31)&~0x1f)
#define RX_BUF_SIZE ((32+ETH_FRAME_LEN+31)&~0x1f)

/*
 * SCB defines
 */

/* these functions take the SCB status word and test the relevant status bit */
#define SCB_complete(s) (((s) & 0x8000) != 0)
#define SCB_rxdframe(s) (((s) & 0x4000) != 0)
#define SCB_CUdead(s)   (((s) & 0x2000) != 0)
#define SCB_RUdead(s)   (((s) & 0x1000) != 0)
#define SCB_ack(s)      ((s) & 0xf000)

/* Command unit status: 0=idle, 1=suspended, 2=active */
#define SCB_CUstat(s)   (((s)&0x0300)>>8)

/* Receive unit status: 0=idle, 1=suspended, 2=out of resources, 4=ready */
#define SCB_RUstat(s)   (((s)&0x0070)>>4)

/* SCB commands */
#define SCB_CUnop       0x0000
#define SCB_CUstart     0x0100
#define SCB_CUresume    0x0200
#define SCB_CUsuspend   0x0300
#define SCB_CUabort     0x0400
#define SCB_resetchip   0x0080

#define SCB_RUnop       0x0000
#define SCB_RUstart     0x0010
#define SCB_RUresume    0x0020
#define SCB_RUsuspend   0x0030
#define SCB_RUabort     0x0040

/*
 * Command block defines
 */

#define Stat_Done(s)    (((s) & 0x8000) != 0)
#define Stat_Busy(s)    (((s) & 0x4000) != 0)
#define Stat_OK(s)      (((s) & 0x2000) != 0)
#define Stat_Abort(s)   (((s) & 0x1000) != 0)
#define Stat_STFail     (((s) & 0x0800) != 0)
#define Stat_TNoCar(s)  (((s) & 0x0400) != 0)
#define Stat_TNoCTS(s)  (((s) & 0x0200) != 0)
#define Stat_TNoDMA(s)  (((s) & 0x0100) != 0)
#define Stat_TDefer(s)  (((s) & 0x0080) != 0)
#define Stat_TColl(s)   (((s) & 0x0040) != 0)
#define Stat_TXColl(s)  (((s) & 0x0020) != 0)
#define Stat_NoColl(s)  ((s) & 0x000f)

/* Cmd_END will end AFTER the command if this is the first
 * command block after an SCB_CUstart, but BEFORE the command
 * for all subsequent commands. Best strategy is to place
 * Cmd_INT on the last command in the sequence, followed by a
 * dummy Cmd_Nop with Cmd_END after this.
 */

#define Cmd_END     0x8000
#define Cmd_SUS     0x4000
#define Cmd_INT     0x2000

#define Cmd_Nop     0x0000
#define Cmd_SetAddr 0x0001
#define Cmd_Config  0x0002
#define Cmd_MCast   0x0003
#define Cmd_Xmit    0x0004
#define Cmd_TDR     0x0005
#define Cmd_Dump    0x0006
#define Cmd_Diag    0x0007


/*
 * Frame Descriptor (Receive block) defines
 */

#define FD_Done(s)  (((s) & 0x8000) != 0)
#define FD_Busy(s)  (((s) & 0x4000) != 0)
#define FD_OK(s)    (((s) & 0x2000) != 0)

#define FD_CRC(s)   (((s) & 0x0800) != 0)
#define FD_Align(s) (((s) & 0x0400) != 0)
#define FD_Resrc(s) (((s) & 0x0200) != 0)
#define FD_DMA(s)   (((s) & 0x0100) != 0)
#define FD_Short(s) (((s) & 0x0080) != 0)
#define FD_NoEOF(s) (((s) & 0x0040) != 0)

struct rfd_header {
	volatile unsigned long flags;
	volatile unsigned short link;
	volatile unsigned short rbd_offset;
	volatile unsigned short dstaddr1;
	volatile unsigned short dstaddr2;
	volatile unsigned short dstaddr3;
	volatile unsigned short srcaddr1;
	volatile unsigned short srcaddr2;
	volatile unsigned short srcaddr3;
	volatile unsigned short length;

	/* This is actually a Receive Buffer Descriptor.  The way we
	 * arrange memory means that an RBD always follows the RFD that
	 * points to it, so they might as well be in the same structure.
	 */
	volatile unsigned short actual_count;
	volatile unsigned short next_rbd;
	volatile unsigned short buf_addr1;
	volatile unsigned short buf_addr2;
	volatile unsigned short size;
};

/* Returned data from the Time Domain Reflectometer */

#define TDR_LINKOK       (1<<15)
#define TDR_XCVRPROBLEM  (1<<14)
#define TDR_OPEN         (1<<13)
#define TDR_SHORT        (1<<12)
#define TDR_TIME         0x7ff
Commit	Line	Data
1da177e4 LT	1	/*
	2	* eexpress.h: Intel EtherExpress16 defines
	3	*/
	4
	5	/*
	6	* EtherExpress card register addresses
	7	* as offsets from the base IO region (dev->base_addr)
	8	*/
	9
	10	#define DATAPORT 0x0000
	11	#define WRITE_PTR 0x0002
	12	#define READ_PTR 0x0004
	13	#define SIGNAL_CA 0x0006
	14	#define SET_IRQ 0x0007
	15	#define SM_PTR 0x0008
	16	#define MEM_Dec 0x000a
	17	#define MEM_Ctrl 0x000b
	18	#define MEM_Page_Ctrl 0x000c
	19	#define Config 0x000d
	20	#define EEPROM_Ctrl 0x000e
	21	#define ID_PORT 0x000f
	22	#define MEM_ECtrl 0x000f
	23
	24	/*
	25	* card register defines
	26	*/
	27
	28	/* SET_IRQ */
	29	#define SIRQ_en 0x08
	30	#define SIRQ_dis 0x00
	31
	32	/* EEPROM_Ctrl */
	33	#define EC_Clk 0x01
	34	#define EC_CS 0x02
	35	#define EC_Wr 0x04
	36	#define EC_Rd 0x08
	37	#define ASIC_RST 0x40
	38	#define i586_RST 0x80
	39
	40	#define eeprom_delay() { udelay(40); }
	41
	42	/*
	43	* i82586 Memory Configuration
	44	*/
	45
	46	/* (System Configuration Pointer) System start up block, read after 586_RST */
	47	#define SCP_START 0xfff6
	48
	49	/* Intermediate System Configuration Pointer */
	50	#define ISCP_START 0x0000
	51
	52	/* System Command Block */
	53	#define SCB_START 0x0008
	54
	55	/* Start of buffer region. Everything before this is used for control
6aa20a22 JG	56	* structures and the CU configuration program. The memory layout is
6aa20a22 JG	57	* determined in eexp_hw_probe(), once we know how much memory is
1da177e4 LT	58	* available on the card.
	59	*/
	60
	61	#define TX_BUF_START 0x0100
	62
	63	#define TX_BUF_SIZE ((24+ETH_FRAME_LEN+31)&~0x1f)
	64	#define RX_BUF_SIZE ((32+ETH_FRAME_LEN+31)&~0x1f)
	65
	66	/*
6aa20a22	67	* SCB defines
1da177e4 LT	68	*/
	69
	70	/* these functions take the SCB status word and test the relevant status bit */
684f4a4c RK	71	#define SCB_complete(s) (((s) & 0x8000) != 0)
	72	#define SCB_rxdframe(s) (((s) & 0x4000) != 0)
	73	#define SCB_CUdead(s) (((s) & 0x2000) != 0)
	74	#define SCB_RUdead(s) (((s) & 0x1000) != 0)
	75	#define SCB_ack(s) ((s) & 0xf000)
1da177e4 LT	76
1da177e4 LT	77	/* Command unit status: 0=idle, 1=suspended, 2=active */
684f4a4c	78	#define SCB_CUstat(s) (((s)&0x0300)>>8)
1da177e4 LT	79
1da177e4 LT	80	/* Receive unit status: 0=idle, 1=suspended, 2=out of resources, 4=ready */
684f4a4c	81	#define SCB_RUstat(s) (((s)&0x0070)>>4)
1da177e4 LT	82
	83	/* SCB commands */
	84	#define SCB_CUnop 0x0000
	85	#define SCB_CUstart 0x0100
	86	#define SCB_CUresume 0x0200
	87	#define SCB_CUsuspend 0x0300
	88	#define SCB_CUabort 0x0400
	89	#define SCB_resetchip 0x0080
	90
	91	#define SCB_RUnop 0x0000
	92	#define SCB_RUstart 0x0010
	93	#define SCB_RUresume 0x0020
	94	#define SCB_RUsuspend 0x0030
	95	#define SCB_RUabort 0x0040
	96
	97	/*
6aa20a22	98	* Command block defines
1da177e4 LT	99	*/
1da177e4 LT	100
684f4a4c RK	101	#define Stat_Done(s) (((s) & 0x8000) != 0)
	102	#define Stat_Busy(s) (((s) & 0x4000) != 0)
	103	#define Stat_OK(s) (((s) & 0x2000) != 0)
	104	#define Stat_Abort(s) (((s) & 0x1000) != 0)
	105	#define Stat_STFail (((s) & 0x0800) != 0)
	106	#define Stat_TNoCar(s) (((s) & 0x0400) != 0)
	107	#define Stat_TNoCTS(s) (((s) & 0x0200) != 0)
	108	#define Stat_TNoDMA(s) (((s) & 0x0100) != 0)
	109	#define Stat_TDefer(s) (((s) & 0x0080) != 0)
	110	#define Stat_TColl(s) (((s) & 0x0040) != 0)
	111	#define Stat_TXColl(s) (((s) & 0x0020) != 0)
	112	#define Stat_NoColl(s) ((s) & 0x000f)
1da177e4 LT	113
	114	/* Cmd_END will end AFTER the command if this is the first
	115	* command block after an SCB_CUstart, but BEFORE the command
	116	* for all subsequent commands. Best strategy is to place
	117	* Cmd_INT on the last command in the sequence, followed by a
	118	* dummy Cmd_Nop with Cmd_END after this.
	119	*/
	120
	121	#define Cmd_END 0x8000
	122	#define Cmd_SUS 0x4000
	123	#define Cmd_INT 0x2000
	124
	125	#define Cmd_Nop 0x0000
	126	#define Cmd_SetAddr 0x0001
	127	#define Cmd_Config 0x0002
	128	#define Cmd_MCast 0x0003
	129	#define Cmd_Xmit 0x0004
	130	#define Cmd_TDR 0x0005
	131	#define Cmd_Dump 0x0006
	132	#define Cmd_Diag 0x0007
	133
	134
	135	/*
	136	* Frame Descriptor (Receive block) defines
	137	*/
	138
684f4a4c RK	139	#define FD_Done(s) (((s) & 0x8000) != 0)
	140	#define FD_Busy(s) (((s) & 0x4000) != 0)
	141	#define FD_OK(s) (((s) & 0x2000) != 0)
1da177e4	142
684f4a4c RK	143	#define FD_CRC(s) (((s) & 0x0800) != 0)
	144	#define FD_Align(s) (((s) & 0x0400) != 0)
	145	#define FD_Resrc(s) (((s) & 0x0200) != 0)
	146	#define FD_DMA(s) (((s) & 0x0100) != 0)
	147	#define FD_Short(s) (((s) & 0x0080) != 0)
	148	#define FD_NoEOF(s) (((s) & 0x0040) != 0)
1da177e4 LT	149
	150	struct rfd_header {
	151	volatile unsigned long flags;
	152	volatile unsigned short link;
	153	volatile unsigned short rbd_offset;
	154	volatile unsigned short dstaddr1;
	155	volatile unsigned short dstaddr2;
	156	volatile unsigned short dstaddr3;
	157	volatile unsigned short srcaddr1;
	158	volatile unsigned short srcaddr2;
	159	volatile unsigned short srcaddr3;
	160	volatile unsigned short length;
6aa20a22 JG	161
	162	/* This is actually a Receive Buffer Descriptor. The way we
	163	* arrange memory means that an RBD always follows the RFD that
1da177e4 LT	164	* points to it, so they might as well be in the same structure.
	165	*/
	166	volatile unsigned short actual_count;
	167	volatile unsigned short next_rbd;
	168	volatile unsigned short buf_addr1;
	169	volatile unsigned short buf_addr2;
	170	volatile unsigned short size;
	171	};
	172
	173	/* Returned data from the Time Domain Reflectometer */
	174
	175	#define TDR_LINKOK (1<<15)
	176	#define TDR_XCVRPROBLEM (1<<14)
	177	#define TDR_OPEN (1<<13)
	178	#define TDR_SHORT (1<<12)
	179	#define TDR_TIME 0x7ff