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e1000e: fix drv load issues
[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
ad68076e 4 Copyright(c) 1999 - 2008 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
bc7f75fa
AK		 47
48#include "e1000.h"
49
97ac8cae 50#define DRV_VERSION "0.3.3.3-k2"
bc7f75fa
AK		 51char e1000e_driver_name[] = "e1000e";
52const char e1000e_driver_version[] = DRV_VERSION;
53
54static const struct e1000_info *e1000_info_tbl[] = {
55 [board_82571] = &e1000_82571_info,
56 [board_82572] = &e1000_82572_info,
57 [board_82573] = &e1000_82573_info,
58 [board_80003es2lan] = &e1000_es2_info,
59 [board_ich8lan] = &e1000_ich8_info,
60 [board_ich9lan] = &e1000_ich9_info,
61};
62
63#ifdef DEBUG
64/**
65 * e1000_get_hw_dev_name - return device name string
66 * used by hardware layer to print debugging information
67 **/
68char *e1000e_get_hw_dev_name(struct e1000_hw *hw)
69{
589c085f 70 return hw->adapter->netdev->name;
bc7f75fa
AK		 71}
72#endif
73
74/**
75 * e1000_desc_unused - calculate if we have unused descriptors
76 **/
77static int e1000_desc_unused(struct e1000_ring *ring)
78{
79 if (ring->next_to_clean > ring->next_to_use)
80 return ring->next_to_clean - ring->next_to_use - 1;
81
82 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
83}
84
85/**
ad68076e 86 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 87 * @adapter: board private structure
88 * @status: descriptor status field as written by hardware
89 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
90 * @skb: pointer to sk_buff to be indicated to stack
91 **/
92static void e1000_receive_skb(struct e1000_adapter *adapter,
93 struct net_device *netdev,
94 struct sk_buff *skb,
a39fe742 95 u8 status, __le16 vlan)
bc7f75fa
AK		 96{
97 skb->protocol = eth_type_trans(skb, netdev);
98
99 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
100 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
38b22195 101 le16_to_cpu(vlan));
bc7f75fa
AK		 102 else
103 netif_receive_skb(skb);
104
105 netdev->last_rx = jiffies;
106}
107
108/**
109 * e1000_rx_checksum - Receive Checksum Offload for 82543
110 * @adapter: board private structure
111 * @status_err: receive descriptor status and error fields
112 * @csum: receive descriptor csum field
113 * @sk_buff: socket buffer with received data
114 **/
115static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
116 u32 csum, struct sk_buff *skb)
117{
118 u16 status = (u16)status_err;
119 u8 errors = (u8)(status_err >> 24);
120 skb->ip_summed = CHECKSUM_NONE;
121
122 /* Ignore Checksum bit is set */
123 if (status & E1000_RXD_STAT_IXSM)
124 return;
125 /* TCP/UDP checksum error bit is set */
126 if (errors & E1000_RXD_ERR_TCPE) {
127 /* let the stack verify checksum errors */
128 adapter->hw_csum_err++;
129 return;
130 }
131
132 /* TCP/UDP Checksum has not been calculated */
133 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
134 return;
135
136 /* It must be a TCP or UDP packet with a valid checksum */
137 if (status & E1000_RXD_STAT_TCPCS) {
138 /* TCP checksum is good */
139 skb->ip_summed = CHECKSUM_UNNECESSARY;
140 } else {
ad68076e
BA		 141 /*
142 * IP fragment with UDP payload
143 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 144 * and then put the value in host order for further stack use.
145 */
a39fe742
AV		 146 __sum16 sum = (__force __sum16)htons(csum);
147 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 148 skb->ip_summed = CHECKSUM_COMPLETE;
149 }
150 adapter->hw_csum_good++;
151}
152
153/**
154 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
155 * @adapter: address of board private structure
156 **/
157static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
158 int cleaned_count)
159{
160 struct net_device *netdev = adapter->netdev;
161 struct pci_dev *pdev = adapter->pdev;
162 struct e1000_ring *rx_ring = adapter->rx_ring;
163 struct e1000_rx_desc *rx_desc;
164 struct e1000_buffer *buffer_info;
165 struct sk_buff *skb;
166 unsigned int i;
167 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
168
169 i = rx_ring->next_to_use;
170 buffer_info = &rx_ring->buffer_info[i];
171
172 while (cleaned_count--) {
173 skb = buffer_info->skb;
174 if (skb) {
175 skb_trim(skb, 0);
176 goto map_skb;
177 }
178
179 skb = netdev_alloc_skb(netdev, bufsz);
180 if (!skb) {
181 /* Better luck next round */
182 adapter->alloc_rx_buff_failed++;
183 break;
184 }
185
ad68076e
BA		 186 /*
187 * Make buffer alignment 2 beyond a 16 byte boundary
bc7f75fa
AK		 188 * this will result in a 16 byte aligned IP header after
189 * the 14 byte MAC header is removed
190 */
191 skb_reserve(skb, NET_IP_ALIGN);
192
193 buffer_info->skb = skb;
194map_skb:
195 buffer_info->dma = pci_map_single(pdev, skb->data,
196 adapter->rx_buffer_len,
197 PCI_DMA_FROMDEVICE);
8d8bb39b 198 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 199 dev_err(&pdev->dev, "RX DMA map failed\n");
200 adapter->rx_dma_failed++;
201 break;
202 }
203
204 rx_desc = E1000_RX_DESC(*rx_ring, i);
205 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
206
207 i++;
208 if (i == rx_ring->count)
209 i = 0;
210 buffer_info = &rx_ring->buffer_info[i];
211 }
212
213 if (rx_ring->next_to_use != i) {
214 rx_ring->next_to_use = i;
215 if (i-- == 0)
216 i = (rx_ring->count - 1);
217
ad68076e
BA		 218 /*
219 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 220 * know there are new descriptors to fetch. (Only
221 * applicable for weak-ordered memory model archs,
ad68076e
BA		 222 * such as IA-64).
223 */
bc7f75fa
AK		 224 wmb();
225 writel(i, adapter->hw.hw_addr + rx_ring->tail);
226 }
227}
228
229/**
230 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
231 * @adapter: address of board private structure
232 **/
233static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
234 int cleaned_count)
235{
236 struct net_device *netdev = adapter->netdev;
237 struct pci_dev *pdev = adapter->pdev;
238 union e1000_rx_desc_packet_split *rx_desc;
239 struct e1000_ring *rx_ring = adapter->rx_ring;
240 struct e1000_buffer *buffer_info;
241 struct e1000_ps_page *ps_page;
242 struct sk_buff *skb;
243 unsigned int i, j;
244
245 i = rx_ring->next_to_use;
246 buffer_info = &rx_ring->buffer_info[i];
247
248 while (cleaned_count--) {
249 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
250
251 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 252 ps_page = &buffer_info->ps_pages[j];
253 if (j >= adapter->rx_ps_pages) {
254 /* all unused desc entries get hw null ptr */
a39fe742 255 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 256 continue;
257 }
258 if (!ps_page->page) {
259 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 260 if (!ps_page->page) {
47f44e40
AK		 261 adapter->alloc_rx_buff_failed++;
262 goto no_buffers;
263 }
264 ps_page->dma = pci_map_page(pdev,
265 ps_page->page,
266 0, PAGE_SIZE,
267 PCI_DMA_FROMDEVICE);
8d8bb39b 268 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 269 dev_err(&adapter->pdev->dev,
270 "RX DMA page map failed\n");
271 adapter->rx_dma_failed++;
272 goto no_buffers;
bc7f75fa 273 }
bc7f75fa 274 }
47f44e40
AK		 275 /*
276 * Refresh the desc even if buffer_addrs
277 * didn't change because each write-back
278 * erases this info.
279 */
280 rx_desc->read.buffer_addr[j+1] =
281 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 282 }
283
284 skb = netdev_alloc_skb(netdev,
285 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
286
287 if (!skb) {
288 adapter->alloc_rx_buff_failed++;
289 break;
290 }
291
ad68076e
BA		 292 /*
293 * Make buffer alignment 2 beyond a 16 byte boundary
bc7f75fa
AK		 294 * this will result in a 16 byte aligned IP header after
295 * the 14 byte MAC header is removed
296 */
297 skb_reserve(skb, NET_IP_ALIGN);
298
299 buffer_info->skb = skb;
300 buffer_info->dma = pci_map_single(pdev, skb->data,
301 adapter->rx_ps_bsize0,
302 PCI_DMA_FROMDEVICE);
8d8bb39b 303 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 304 dev_err(&pdev->dev, "RX DMA map failed\n");
305 adapter->rx_dma_failed++;
306 /* cleanup skb */
307 dev_kfree_skb_any(skb);
308 buffer_info->skb = NULL;
309 break;
310 }
311
312 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
313
314 i++;
315 if (i == rx_ring->count)
316 i = 0;
317 buffer_info = &rx_ring->buffer_info[i];
318 }
319
320no_buffers:
321 if (rx_ring->next_to_use != i) {
322 rx_ring->next_to_use = i;
323
324 if (!(i--))
325 i = (rx_ring->count - 1);
326
ad68076e
BA		 327 /*
328 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 329 * know there are new descriptors to fetch. (Only
330 * applicable for weak-ordered memory model archs,
ad68076e
BA		 331 * such as IA-64).
332 */
bc7f75fa 333 wmb();
ad68076e
BA		 334 /*
335 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 336 * descriptors are 32 bytes...so we increment tail
337 * twice as much.
338 */
339 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
340 }
341}
342
97ac8cae
BA		 343/**
344 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
345 * @adapter: address of board private structure
346 * @rx_ring: pointer to receive ring structure
347 * @cleaned_count: number of buffers to allocate this pass
348 **/
349
350static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
351 int cleaned_count)
352{
353 struct net_device *netdev = adapter->netdev;
354 struct pci_dev *pdev = adapter->pdev;
355 struct e1000_rx_desc *rx_desc;
356 struct e1000_ring *rx_ring = adapter->rx_ring;
357 struct e1000_buffer *buffer_info;
358 struct sk_buff *skb;
359 unsigned int i;
360 unsigned int bufsz = 256 -
361 16 /* for skb_reserve */ -
362 NET_IP_ALIGN;
363
364 i = rx_ring->next_to_use;
365 buffer_info = &rx_ring->buffer_info[i];
366
367 while (cleaned_count--) {
368 skb = buffer_info->skb;
369 if (skb) {
370 skb_trim(skb, 0);
371 goto check_page;
372 }
373
374 skb = netdev_alloc_skb(netdev, bufsz);
375 if (unlikely(!skb)) {
376 /* Better luck next round */
377 adapter->alloc_rx_buff_failed++;
378 break;
379 }
380
381 /* Make buffer alignment 2 beyond a 16 byte boundary
382 * this will result in a 16 byte aligned IP header after
383 * the 14 byte MAC header is removed
384 */
385 skb_reserve(skb, NET_IP_ALIGN);
386
387 buffer_info->skb = skb;
388check_page:
389 /* allocate a new page if necessary */
390 if (!buffer_info->page) {
391 buffer_info->page = alloc_page(GFP_ATOMIC);
392 if (unlikely(!buffer_info->page)) {
393 adapter->alloc_rx_buff_failed++;
394 break;
395 }
396 }
397
398 if (!buffer_info->dma)
399 buffer_info->dma = pci_map_page(pdev,
400 buffer_info->page, 0,
401 PAGE_SIZE,
402 PCI_DMA_FROMDEVICE);
403
404 rx_desc = E1000_RX_DESC(*rx_ring, i);
405 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
406
407 if (unlikely(++i == rx_ring->count))
408 i = 0;
409 buffer_info = &rx_ring->buffer_info[i];
410 }
411
412 if (likely(rx_ring->next_to_use != i)) {
413 rx_ring->next_to_use = i;
414 if (unlikely(i-- == 0))
415 i = (rx_ring->count - 1);
416
417 /* Force memory writes to complete before letting h/w
418 * know there are new descriptors to fetch. (Only
419 * applicable for weak-ordered memory model archs,
420 * such as IA-64). */
421 wmb();
422 writel(i, adapter->hw.hw_addr + rx_ring->tail);
423 }
424}
425
bc7f75fa
AK		 426/**
427 * e1000_clean_rx_irq - Send received data up the network stack; legacy
428 * @adapter: board private structure
429 *
430 * the return value indicates whether actual cleaning was done, there
431 * is no guarantee that everything was cleaned
432 **/
433static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
434 int *work_done, int work_to_do)
435{
436 struct net_device *netdev = adapter->netdev;
437 struct pci_dev *pdev = adapter->pdev;
438 struct e1000_ring *rx_ring = adapter->rx_ring;
439 struct e1000_rx_desc *rx_desc, *next_rxd;
440 struct e1000_buffer *buffer_info, *next_buffer;
441 u32 length;
442 unsigned int i;
443 int cleaned_count = 0;
444 bool cleaned = 0;
445 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
446
447 i = rx_ring->next_to_clean;
448 rx_desc = E1000_RX_DESC(*rx_ring, i);
449 buffer_info = &rx_ring->buffer_info[i];
450
451 while (rx_desc->status & E1000_RXD_STAT_DD) {
452 struct sk_buff *skb;
453 u8 status;
454
455 if (*work_done >= work_to_do)
456 break;
457 (*work_done)++;
458
459 status = rx_desc->status;
460 skb = buffer_info->skb;
461 buffer_info->skb = NULL;
462
463 prefetch(skb->data - NET_IP_ALIGN);
464
465 i++;
466 if (i == rx_ring->count)
467 i = 0;
468 next_rxd = E1000_RX_DESC(*rx_ring, i);
469 prefetch(next_rxd);
470
471 next_buffer = &rx_ring->buffer_info[i];
472
473 cleaned = 1;
474 cleaned_count++;
475 pci_unmap_single(pdev,
476 buffer_info->dma,
477 adapter->rx_buffer_len,
478 PCI_DMA_FROMDEVICE);
479 buffer_info->dma = 0;
480
481 length = le16_to_cpu(rx_desc->length);
482
483 /* !EOP means multiple descriptors were used to store a single
484 * packet, also make sure the frame isn't just CRC only */
485 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
486 /* All receives must fit into a single buffer */
44defeb3
JK		 487 e_dbg("%s: Receive packet consumed multiple buffers\n",
488 netdev->name);
bc7f75fa
AK		 489 /* recycle */
490 buffer_info->skb = skb;
491 goto next_desc;
492 }
493
494 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
495 /* recycle */
496 buffer_info->skb = skb;
497 goto next_desc;
498 }
499
bc7f75fa
AK		 500 total_rx_bytes += length;
501 total_rx_packets++;
502
ad68076e
BA		 503 /*
504 * code added for copybreak, this should improve
bc7f75fa 505 * performance for small packets with large amounts
ad68076e
BA		 506 * of reassembly being done in the stack
507 */
bc7f75fa
AK		 508 if (length < copybreak) {
509 struct sk_buff *new_skb =
510 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
511 if (new_skb) {
512 skb_reserve(new_skb, NET_IP_ALIGN);
513 memcpy(new_skb->data - NET_IP_ALIGN,
514 skb->data - NET_IP_ALIGN,
515 length + NET_IP_ALIGN);
516 /* save the skb in buffer_info as good */
517 buffer_info->skb = skb;
518 skb = new_skb;
519 }
520 /* else just continue with the old one */
521 }
522 /* end copybreak code */
523 skb_put(skb, length);
524
525 /* Receive Checksum Offload */
526 e1000_rx_checksum(adapter,
527 (u32)(status) |
528 ((u32)(rx_desc->errors) << 24),
529 le16_to_cpu(rx_desc->csum), skb);
530
531 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
532
533next_desc:
534 rx_desc->status = 0;
535
536 /* return some buffers to hardware, one at a time is too slow */
537 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
538 adapter->alloc_rx_buf(adapter, cleaned_count);
539 cleaned_count = 0;
540 }
541
542 /* use prefetched values */
543 rx_desc = next_rxd;
544 buffer_info = next_buffer;
545 }
546 rx_ring->next_to_clean = i;
547
548 cleaned_count = e1000_desc_unused(rx_ring);
549 if (cleaned_count)
550 adapter->alloc_rx_buf(adapter, cleaned_count);
551
bc7f75fa 552 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 553 adapter->total_rx_packets += total_rx_packets;
41988692 554 adapter->net_stats.rx_bytes += total_rx_bytes;
7c25769f 555 adapter->net_stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 556 return cleaned;
557}
558
bc7f75fa
AK		 559static void e1000_put_txbuf(struct e1000_adapter *adapter,
560 struct e1000_buffer *buffer_info)
561{
562 if (buffer_info->dma) {
563 pci_unmap_page(adapter->pdev, buffer_info->dma,
564 buffer_info->length, PCI_DMA_TODEVICE);
565 buffer_info->dma = 0;
566 }
567 if (buffer_info->skb) {
568 dev_kfree_skb_any(buffer_info->skb);
569 buffer_info->skb = NULL;
570 }
571}
572
573static void e1000_print_tx_hang(struct e1000_adapter *adapter)
574{
575 struct e1000_ring *tx_ring = adapter->tx_ring;
576 unsigned int i = tx_ring->next_to_clean;
577 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
578 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 579
580 /* detected Tx unit hang */
44defeb3
JK		 581 e_err("Detected Tx Unit Hang:\n"
582 " TDH <%x>\n"
583 " TDT <%x>\n"
584 " next_to_use <%x>\n"
585 " next_to_clean <%x>\n"
586 "buffer_info[next_to_clean]:\n"
587 " time_stamp <%lx>\n"
588 " next_to_watch <%x>\n"
589 " jiffies <%lx>\n"
590 " next_to_watch.status <%x>\n",
591 readl(adapter->hw.hw_addr + tx_ring->head),
592 readl(adapter->hw.hw_addr + tx_ring->tail),
593 tx_ring->next_to_use,
594 tx_ring->next_to_clean,
595 tx_ring->buffer_info[eop].time_stamp,
596 eop,
597 jiffies,
598 eop_desc->upper.fields.status);
bc7f75fa
AK		 599}
600
601/**
602 * e1000_clean_tx_irq - Reclaim resources after transmit completes
603 * @adapter: board private structure
604 *
605 * the return value indicates whether actual cleaning was done, there
606 * is no guarantee that everything was cleaned
607 **/
608static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
609{
610 struct net_device *netdev = adapter->netdev;
611 struct e1000_hw *hw = &adapter->hw;
612 struct e1000_ring *tx_ring = adapter->tx_ring;
613 struct e1000_tx_desc *tx_desc, *eop_desc;
614 struct e1000_buffer *buffer_info;
615 unsigned int i, eop;
616 unsigned int count = 0;
617 bool cleaned = 0;
618 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
619
620 i = tx_ring->next_to_clean;
621 eop = tx_ring->buffer_info[i].next_to_watch;
622 eop_desc = E1000_TX_DESC(*tx_ring, eop);
623
624 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
625 for (cleaned = 0; !cleaned; ) {
626 tx_desc = E1000_TX_DESC(*tx_ring, i);
627 buffer_info = &tx_ring->buffer_info[i];
628 cleaned = (i == eop);
629
630 if (cleaned) {
631 struct sk_buff *skb = buffer_info->skb;
632 unsigned int segs, bytecount;
633 segs = skb_shinfo(skb)->gso_segs ?: 1;
634 /* multiply data chunks by size of headers */
635 bytecount = ((segs - 1) * skb_headlen(skb)) +
636 skb->len;
637 total_tx_packets += segs;
638 total_tx_bytes += bytecount;
639 }
640
641 e1000_put_txbuf(adapter, buffer_info);
642 tx_desc->upper.data = 0;
643
644 i++;
645 if (i == tx_ring->count)
646 i = 0;
647 }
648
649 eop = tx_ring->buffer_info[i].next_to_watch;
650 eop_desc = E1000_TX_DESC(*tx_ring, eop);
651#define E1000_TX_WEIGHT 64
652 /* weight of a sort for tx, to avoid endless transmit cleanup */
653 if (count++ == E1000_TX_WEIGHT)
654 break;
655 }
656
657 tx_ring->next_to_clean = i;
658
659#define TX_WAKE_THRESHOLD 32
660 if (cleaned && netif_carrier_ok(netdev) &&
661 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
662 /* Make sure that anybody stopping the queue after this
663 * sees the new next_to_clean.
664 */
665 smp_mb();
666
667 if (netif_queue_stopped(netdev) &&
668 !(test_bit(__E1000_DOWN, &adapter->state))) {
669 netif_wake_queue(netdev);
670 ++adapter->restart_queue;
671 }
672 }
673
674 if (adapter->detect_tx_hung) {
ad68076e
BA		 675 /*
676 * Detect a transmit hang in hardware, this serializes the
677 * check with the clearing of time_stamp and movement of i
678 */
bc7f75fa
AK		 679 adapter->detect_tx_hung = 0;
680 if (tx_ring->buffer_info[eop].dma &&
681 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp
682 + (adapter->tx_timeout_factor * HZ))
ad68076e 683 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
bc7f75fa
AK		 684 e1000_print_tx_hang(adapter);
685 netif_stop_queue(netdev);
686 }
687 }
688 adapter->total_tx_bytes += total_tx_bytes;
689 adapter->total_tx_packets += total_tx_packets;
41988692 690 adapter->net_stats.tx_bytes += total_tx_bytes;
7c25769f 691 adapter->net_stats.tx_packets += total_tx_packets;
bc7f75fa
AK		 692 return cleaned;
693}
694
bc7f75fa
AK		 695/**
696 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
697 * @adapter: board private structure
698 *
699 * the return value indicates whether actual cleaning was done, there
700 * is no guarantee that everything was cleaned
701 **/
702static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
703 int *work_done, int work_to_do)
704{
705 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
706 struct net_device *netdev = adapter->netdev;
707 struct pci_dev *pdev = adapter->pdev;
708 struct e1000_ring *rx_ring = adapter->rx_ring;
709 struct e1000_buffer *buffer_info, *next_buffer;
710 struct e1000_ps_page *ps_page;
711 struct sk_buff *skb;
712 unsigned int i, j;
713 u32 length, staterr;
714 int cleaned_count = 0;
715 bool cleaned = 0;
716 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
717
718 i = rx_ring->next_to_clean;
719 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
720 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
721 buffer_info = &rx_ring->buffer_info[i];
722
723 while (staterr & E1000_RXD_STAT_DD) {
724 if (*work_done >= work_to_do)
725 break;
726 (*work_done)++;
727 skb = buffer_info->skb;
728
729 /* in the packet split case this is header only */
730 prefetch(skb->data - NET_IP_ALIGN);
731
732 i++;
733 if (i == rx_ring->count)
734 i = 0;
735 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
736 prefetch(next_rxd);
737
738 next_buffer = &rx_ring->buffer_info[i];
739
740 cleaned = 1;
741 cleaned_count++;
742 pci_unmap_single(pdev, buffer_info->dma,
743 adapter->rx_ps_bsize0,
744 PCI_DMA_FROMDEVICE);
745 buffer_info->dma = 0;
746
747 if (!(staterr & E1000_RXD_STAT_EOP)) {
44defeb3
JK		 748 e_dbg("%s: Packet Split buffers didn't pick up the "
749 "full packet\n", netdev->name);
bc7f75fa
AK		 750 dev_kfree_skb_irq(skb);
751 goto next_desc;
752 }
753
754 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
755 dev_kfree_skb_irq(skb);
756 goto next_desc;
757 }
758
759 length = le16_to_cpu(rx_desc->wb.middle.length0);
760
761 if (!length) {
44defeb3
JK		 762 e_dbg("%s: Last part of the packet spanning multiple "
763 "descriptors\n", netdev->name);
bc7f75fa
AK		 764 dev_kfree_skb_irq(skb);
765 goto next_desc;
766 }
767
768 /* Good Receive */
769 skb_put(skb, length);
770
771 {
ad68076e
BA		 772 /*
773 * this looks ugly, but it seems compiler issues make it
774 * more efficient than reusing j
775 */
bc7f75fa
AK		 776 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
777
ad68076e
BA		 778 /*
779 * page alloc/put takes too long and effects small packet
780 * throughput, so unsplit small packets and save the alloc/put
781 * only valid in softirq (napi) context to call kmap_*
782 */
bc7f75fa
AK		 783 if (l1 && (l1 <= copybreak) &&
784 ((length + l1) <= adapter->rx_ps_bsize0)) {
785 u8 *vaddr;
786
47f44e40 787 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 788
ad68076e
BA		 789 /*
790 * there is no documentation about how to call
bc7f75fa 791 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 792 * very long
793 */
bc7f75fa
AK		 794 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
795 PAGE_SIZE, PCI_DMA_FROMDEVICE);
796 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
797 memcpy(skb_tail_pointer(skb), vaddr, l1);
798 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
799 pci_dma_sync_single_for_device(pdev, ps_page->dma,
800 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 801
bc7f75fa
AK		 802 skb_put(skb, l1);
803 goto copydone;
804 } /* if */
805 }
806
807 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
808 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
809 if (!length)
810 break;
811
47f44e40 812 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 813 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
814 PCI_DMA_FROMDEVICE);
815 ps_page->dma = 0;
816 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
817 ps_page->page = NULL;
818 skb->len += length;
819 skb->data_len += length;
820 skb->truesize += length;
821 }
822
bc7f75fa
AK		 823copydone:
824 total_rx_bytes += skb->len;
825 total_rx_packets++;
826
827 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
828 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
829
830 if (rx_desc->wb.upper.header_status &
831 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
832 adapter->rx_hdr_split++;
833
834 e1000_receive_skb(adapter, netdev, skb,
835 staterr, rx_desc->wb.middle.vlan);
836
837next_desc:
838 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
839 buffer_info->skb = NULL;
840
841 /* return some buffers to hardware, one at a time is too slow */
842 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
843 adapter->alloc_rx_buf(adapter, cleaned_count);
844 cleaned_count = 0;
845 }
846
847 /* use prefetched values */
848 rx_desc = next_rxd;
849 buffer_info = next_buffer;
850
851 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
852 }
853 rx_ring->next_to_clean = i;
854
855 cleaned_count = e1000_desc_unused(rx_ring);
856 if (cleaned_count)
857 adapter->alloc_rx_buf(adapter, cleaned_count);
858
bc7f75fa 859 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 860 adapter->total_rx_packets += total_rx_packets;
41988692 861 adapter->net_stats.rx_bytes += total_rx_bytes;
7c25769f 862 adapter->net_stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 863 return cleaned;
864}
865
97ac8cae
BA		 866/**
867 * e1000_consume_page - helper function
868 **/
869static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
870 u16 length)
871{
872 bi->page = NULL;
873 skb->len += length;
874 skb->data_len += length;
875 skb->truesize += length;
876}
877
878/**
879 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
880 * @adapter: board private structure
881 *
882 * the return value indicates whether actual cleaning was done, there
883 * is no guarantee that everything was cleaned
884 **/
885
886static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
887 int *work_done, int work_to_do)
888{
889 struct net_device *netdev = adapter->netdev;
890 struct pci_dev *pdev = adapter->pdev;
891 struct e1000_ring *rx_ring = adapter->rx_ring;
892 struct e1000_rx_desc *rx_desc, *next_rxd;
893 struct e1000_buffer *buffer_info, *next_buffer;
894 u32 length;
895 unsigned int i;
896 int cleaned_count = 0;
897 bool cleaned = false;
898 unsigned int total_rx_bytes=0, total_rx_packets=0;
899
900 i = rx_ring->next_to_clean;
901 rx_desc = E1000_RX_DESC(*rx_ring, i);
902 buffer_info = &rx_ring->buffer_info[i];
903
904 while (rx_desc->status & E1000_RXD_STAT_DD) {
905 struct sk_buff *skb;
906 u8 status;
907
908 if (*work_done >= work_to_do)
909 break;
910 (*work_done)++;
911
912 status = rx_desc->status;
913 skb = buffer_info->skb;
914 buffer_info->skb = NULL;
915
916 ++i;
917 if (i == rx_ring->count)
918 i = 0;
919 next_rxd = E1000_RX_DESC(*rx_ring, i);
920 prefetch(next_rxd);
921
922 next_buffer = &rx_ring->buffer_info[i];
923
924 cleaned = true;
925 cleaned_count++;
926 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
927 PCI_DMA_FROMDEVICE);
928 buffer_info->dma = 0;
929
930 length = le16_to_cpu(rx_desc->length);
931
932 /* errors is only valid for DD + EOP descriptors */
933 if (unlikely((status & E1000_RXD_STAT_EOP) &&
934 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
935 /* recycle both page and skb */
936 buffer_info->skb = skb;
937 /* an error means any chain goes out the window
938 * too */
939 if (rx_ring->rx_skb_top)
940 dev_kfree_skb(rx_ring->rx_skb_top);
941 rx_ring->rx_skb_top = NULL;
942 goto next_desc;
943 }
944
945#define rxtop rx_ring->rx_skb_top
946 if (!(status & E1000_RXD_STAT_EOP)) {
947 /* this descriptor is only the beginning (or middle) */
948 if (!rxtop) {
949 /* this is the beginning of a chain */
950 rxtop = skb;
951 skb_fill_page_desc(rxtop, 0, buffer_info->page,
952 0, length);
953 } else {
954 /* this is the middle of a chain */
955 skb_fill_page_desc(rxtop,
956 skb_shinfo(rxtop)->nr_frags,
957 buffer_info->page, 0, length);
958 /* re-use the skb, only consumed the page */
959 buffer_info->skb = skb;
960 }
961 e1000_consume_page(buffer_info, rxtop, length);
962 goto next_desc;
963 } else {
964 if (rxtop) {
965 /* end of the chain */
966 skb_fill_page_desc(rxtop,
967 skb_shinfo(rxtop)->nr_frags,
968 buffer_info->page, 0, length);
969 /* re-use the current skb, we only consumed the
970 * page */
971 buffer_info->skb = skb;
972 skb = rxtop;
973 rxtop = NULL;
974 e1000_consume_page(buffer_info, skb, length);
975 } else {
976 /* no chain, got EOP, this buf is the packet
977 * copybreak to save the put_page/alloc_page */
978 if (length <= copybreak &&
979 skb_tailroom(skb) >= length) {
980 u8 *vaddr;
981 vaddr = kmap_atomic(buffer_info->page,
982 KM_SKB_DATA_SOFTIRQ);
983 memcpy(skb_tail_pointer(skb), vaddr,
984 length);
985 kunmap_atomic(vaddr,
986 KM_SKB_DATA_SOFTIRQ);
987 /* re-use the page, so don't erase
988 * buffer_info->page */
989 skb_put(skb, length);
990 } else {
991 skb_fill_page_desc(skb, 0,
992 buffer_info->page, 0,
993 length);
994 e1000_consume_page(buffer_info, skb,
995 length);
996 }
997 }
998 }
999
1000 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1001 e1000_rx_checksum(adapter,
1002 (u32)(status) |
1003 ((u32)(rx_desc->errors) << 24),
1004 le16_to_cpu(rx_desc->csum), skb);
1005
1006 /* probably a little skewed due to removing CRC */
1007 total_rx_bytes += skb->len;
1008 total_rx_packets++;
1009
1010 /* eth type trans needs skb->data to point to something */
1011 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1012 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1013 dev_kfree_skb(skb);
1014 goto next_desc;
1015 }
1016
1017 e1000_receive_skb(adapter, netdev, skb, status,
1018 rx_desc->special);
1019
1020next_desc:
1021 rx_desc->status = 0;
1022
1023 /* return some buffers to hardware, one at a time is too slow */
1024 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1025 adapter->alloc_rx_buf(adapter, cleaned_count);
1026 cleaned_count = 0;
1027 }
1028
1029 /* use prefetched values */
1030 rx_desc = next_rxd;
1031 buffer_info = next_buffer;
1032 }
1033 rx_ring->next_to_clean = i;
1034
1035 cleaned_count = e1000_desc_unused(rx_ring);
1036 if (cleaned_count)
1037 adapter->alloc_rx_buf(adapter, cleaned_count);
1038
1039 adapter->total_rx_bytes += total_rx_bytes;
1040 adapter->total_rx_packets += total_rx_packets;
1041 adapter->net_stats.rx_bytes += total_rx_bytes;
1042 adapter->net_stats.rx_packets += total_rx_packets;
1043 return cleaned;
1044}
1045
bc7f75fa
AK		 1046/**
1047 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1048 * @adapter: board private structure
1049 **/
1050static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1051{
1052 struct e1000_ring *rx_ring = adapter->rx_ring;
1053 struct e1000_buffer *buffer_info;
1054 struct e1000_ps_page *ps_page;
1055 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1056 unsigned int i, j;
1057
1058 /* Free all the Rx ring sk_buffs */
1059 for (i = 0; i < rx_ring->count; i++) {
1060 buffer_info = &rx_ring->buffer_info[i];
1061 if (buffer_info->dma) {
1062 if (adapter->clean_rx == e1000_clean_rx_irq)
1063 pci_unmap_single(pdev, buffer_info->dma,
1064 adapter->rx_buffer_len,
1065 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1066 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1067 pci_unmap_page(pdev, buffer_info->dma,
1068 PAGE_SIZE,
1069 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1070 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1071 pci_unmap_single(pdev, buffer_info->dma,
1072 adapter->rx_ps_bsize0,
1073 PCI_DMA_FROMDEVICE);
1074 buffer_info->dma = 0;
1075 }
1076
97ac8cae
BA		 1077 if (buffer_info->page) {
1078 put_page(buffer_info->page);
1079 buffer_info->page = NULL;
1080 }
1081
bc7f75fa
AK		 1082 if (buffer_info->skb) {
1083 dev_kfree_skb(buffer_info->skb);
1084 buffer_info->skb = NULL;
1085 }
1086
1087 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1088 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1089 if (!ps_page->page)
1090 break;
1091 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1092 PCI_DMA_FROMDEVICE);
1093 ps_page->dma = 0;
1094 put_page(ps_page->page);
1095 ps_page->page = NULL;
1096 }
1097 }
1098
1099 /* there also may be some cached data from a chained receive */
1100 if (rx_ring->rx_skb_top) {
1101 dev_kfree_skb(rx_ring->rx_skb_top);
1102 rx_ring->rx_skb_top = NULL;
1103 }
1104
bc7f75fa
AK		 1105 /* Zero out the descriptor ring */
1106 memset(rx_ring->desc, 0, rx_ring->size);
1107
1108 rx_ring->next_to_clean = 0;
1109 rx_ring->next_to_use = 0;
1110
1111 writel(0, adapter->hw.hw_addr + rx_ring->head);
1112 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1113}
1114
1115/**
1116 * e1000_intr_msi - Interrupt Handler
1117 * @irq: interrupt number
1118 * @data: pointer to a network interface device structure
1119 **/
1120static irqreturn_t e1000_intr_msi(int irq, void *data)
1121{
1122 struct net_device *netdev = data;
1123 struct e1000_adapter *adapter = netdev_priv(netdev);
1124 struct e1000_hw *hw = &adapter->hw;
1125 u32 icr = er32(ICR);
1126
ad68076e
BA		 1127 /*
1128 * read ICR disables interrupts using IAM
1129 */
bc7f75fa
AK		 1130
1131 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1132 hw->mac.get_link_status = 1;
ad68076e
BA		 1133 /*
1134 * ICH8 workaround-- Call gig speed drop workaround on cable
1135 * disconnect (LSC) before accessing any PHY registers
1136 */
bc7f75fa
AK		 1137 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1138 (!(er32(STATUS) & E1000_STATUS_LU)))
1139 e1000e_gig_downshift_workaround_ich8lan(hw);
1140
ad68076e
BA		 1141 /*
1142 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1143 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1144 * adapter in watchdog
1145 */
bc7f75fa
AK		 1146 if (netif_carrier_ok(netdev) &&
1147 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1148 /* disable receives */
1149 u32 rctl = er32(RCTL);
1150 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1151 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1152 }
1153 /* guard against interrupt when we're going down */
1154 if (!test_bit(__E1000_DOWN, &adapter->state))
1155 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1156 }
1157
1158 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1159 adapter->total_tx_bytes = 0;
1160 adapter->total_tx_packets = 0;
1161 adapter->total_rx_bytes = 0;
1162 adapter->total_rx_packets = 0;
1163 __netif_rx_schedule(netdev, &adapter->napi);
bc7f75fa
AK		 1164 }
1165
1166 return IRQ_HANDLED;
1167}
1168
1169/**
1170 * e1000_intr - Interrupt Handler
1171 * @irq: interrupt number
1172 * @data: pointer to a network interface device structure
1173 **/
1174static irqreturn_t e1000_intr(int irq, void *data)
1175{
1176 struct net_device *netdev = data;
1177 struct e1000_adapter *adapter = netdev_priv(netdev);
1178 struct e1000_hw *hw = &adapter->hw;
1179
1180 u32 rctl, icr = er32(ICR);
1181 if (!icr)
1182 return IRQ_NONE; /* Not our interrupt */
1183
ad68076e
BA		 1184 /*
1185 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1186 * not set, then the adapter didn't send an interrupt
1187 */
bc7f75fa
AK		 1188 if (!(icr & E1000_ICR_INT_ASSERTED))
1189 return IRQ_NONE;
1190
ad68076e
BA		 1191 /*
1192 * Interrupt Auto-Mask...upon reading ICR,
1193 * interrupts are masked. No need for the
1194 * IMC write
1195 */
bc7f75fa
AK		 1196
1197 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1198 hw->mac.get_link_status = 1;
ad68076e
BA		 1199 /*
1200 * ICH8 workaround-- Call gig speed drop workaround on cable
1201 * disconnect (LSC) before accessing any PHY registers
1202 */
bc7f75fa
AK		 1203 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1204 (!(er32(STATUS) & E1000_STATUS_LU)))
1205 e1000e_gig_downshift_workaround_ich8lan(hw);
1206
ad68076e
BA		 1207 /*
1208 * 80003ES2LAN workaround--
bc7f75fa
AK		 1209 * For packet buffer work-around on link down event;
1210 * disable receives here in the ISR and
1211 * reset adapter in watchdog
1212 */
1213 if (netif_carrier_ok(netdev) &&
1214 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1215 /* disable receives */
1216 rctl = er32(RCTL);
1217 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1218 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1219 }
1220 /* guard against interrupt when we're going down */
1221 if (!test_bit(__E1000_DOWN, &adapter->state))
1222 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1223 }
1224
1225 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1226 adapter->total_tx_bytes = 0;
1227 adapter->total_tx_packets = 0;
1228 adapter->total_rx_bytes = 0;
1229 adapter->total_rx_packets = 0;
1230 __netif_rx_schedule(netdev, &adapter->napi);
bc7f75fa
AK		 1231 }
1232
1233 return IRQ_HANDLED;
1234}
1235
1236static int e1000_request_irq(struct e1000_adapter *adapter)
1237{
1238 struct net_device *netdev = adapter->netdev;
a39fe742 1239 irq_handler_t handler = e1000_intr;
bc7f75fa
AK		 1240 int irq_flags = IRQF_SHARED;
1241 int err;
1242
9b71c5e0 1243 if (!pci_enable_msi(adapter->pdev)) {
bc7f75fa 1244 adapter->flags |= FLAG_MSI_ENABLED;
a39fe742 1245 handler = e1000_intr_msi;
bc7f75fa
AK		 1246 irq_flags = 0;
1247 }
1248
1249 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
1250 netdev);
1251 if (err) {
44defeb3
JK		 1252 e_err("Unable to allocate %s interrupt (return: %d)\n",
1253 adapter->flags & FLAG_MSI_ENABLED ? "MSI":"INTx", err);
bc7f75fa
AK		 1254 if (adapter->flags & FLAG_MSI_ENABLED)
1255 pci_disable_msi(adapter->pdev);
bc7f75fa
AK		 1256 }
1257
1258 return err;
1259}
1260
1261static void e1000_free_irq(struct e1000_adapter *adapter)
1262{
1263 struct net_device *netdev = adapter->netdev;
1264
1265 free_irq(adapter->pdev->irq, netdev);
1266 if (adapter->flags & FLAG_MSI_ENABLED) {
1267 pci_disable_msi(adapter->pdev);
1268 adapter->flags &= ~FLAG_MSI_ENABLED;
1269 }
1270}
1271
1272/**
1273 * e1000_irq_disable - Mask off interrupt generation on the NIC
1274 **/
1275static void e1000_irq_disable(struct e1000_adapter *adapter)
1276{
1277 struct e1000_hw *hw = &adapter->hw;
1278
bc7f75fa
AK		 1279 ew32(IMC, ~0);
1280 e1e_flush();
1281 synchronize_irq(adapter->pdev->irq);
1282}
1283
1284/**
1285 * e1000_irq_enable - Enable default interrupt generation settings
1286 **/
1287static void e1000_irq_enable(struct e1000_adapter *adapter)
1288{
1289 struct e1000_hw *hw = &adapter->hw;
1290
74ef9c39
JB		 1291 ew32(IMS, IMS_ENABLE_MASK);
1292 e1e_flush();
bc7f75fa
AK		 1293}
1294
1295/**
1296 * e1000_get_hw_control - get control of the h/w from f/w
1297 * @adapter: address of board private structure
1298 *
489815ce 1299 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1300 * For ASF and Pass Through versions of f/w this means that
1301 * the driver is loaded. For AMT version (only with 82573)
1302 * of the f/w this means that the network i/f is open.
1303 **/
1304static void e1000_get_hw_control(struct e1000_adapter *adapter)
1305{
1306 struct e1000_hw *hw = &adapter->hw;
1307 u32 ctrl_ext;
1308 u32 swsm;
1309
1310 /* Let firmware know the driver has taken over */
1311 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1312 swsm = er32(SWSM);
1313 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1314 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1315 ctrl_ext = er32(CTRL_EXT);
ad68076e 1316 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1317 }
1318}
1319
1320/**
1321 * e1000_release_hw_control - release control of the h/w to f/w
1322 * @adapter: address of board private structure
1323 *
489815ce 1324 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1325 * For ASF and Pass Through versions of f/w this means that the
1326 * driver is no longer loaded. For AMT version (only with 82573) i
1327 * of the f/w this means that the network i/f is closed.
1328 *
1329 **/
1330static void e1000_release_hw_control(struct e1000_adapter *adapter)
1331{
1332 struct e1000_hw *hw = &adapter->hw;
1333 u32 ctrl_ext;
1334 u32 swsm;
1335
1336 /* Let firmware taken over control of h/w */
1337 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1338 swsm = er32(SWSM);
1339 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1340 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1341 ctrl_ext = er32(CTRL_EXT);
ad68076e 1342 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1343 }
1344}
1345
bc7f75fa
AK		 1346/**
1347 * @e1000_alloc_ring - allocate memory for a ring structure
1348 **/
1349static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1350 struct e1000_ring *ring)
1351{
1352 struct pci_dev *pdev = adapter->pdev;
1353
1354 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1355 GFP_KERNEL);
1356 if (!ring->desc)
1357 return -ENOMEM;
1358
1359 return 0;
1360}
1361
1362/**
1363 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1364 * @adapter: board private structure
1365 *
1366 * Return 0 on success, negative on failure
1367 **/
1368int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1369{
1370 struct e1000_ring *tx_ring = adapter->tx_ring;
1371 int err = -ENOMEM, size;
1372
1373 size = sizeof(struct e1000_buffer) * tx_ring->count;
1374 tx_ring->buffer_info = vmalloc(size);
1375 if (!tx_ring->buffer_info)
1376 goto err;
1377 memset(tx_ring->buffer_info, 0, size);
1378
1379 /* round up to nearest 4K */
1380 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1381 tx_ring->size = ALIGN(tx_ring->size, 4096);
1382
1383 err = e1000_alloc_ring_dma(adapter, tx_ring);
1384 if (err)
1385 goto err;
1386
1387 tx_ring->next_to_use = 0;
1388 tx_ring->next_to_clean = 0;
1389 spin_lock_init(&adapter->tx_queue_lock);
1390
1391 return 0;
1392err:
1393 vfree(tx_ring->buffer_info);
44defeb3 1394 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1395 return err;
1396}
1397
1398/**
1399 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1400 * @adapter: board private structure
1401 *
1402 * Returns 0 on success, negative on failure
1403 **/
1404int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1405{
1406 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1407 struct e1000_buffer *buffer_info;
1408 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1409
1410 size = sizeof(struct e1000_buffer) * rx_ring->count;
1411 rx_ring->buffer_info = vmalloc(size);
1412 if (!rx_ring->buffer_info)
1413 goto err;
1414 memset(rx_ring->buffer_info, 0, size);
1415
47f44e40
AK		 1416 for (i = 0; i < rx_ring->count; i++) {
1417 buffer_info = &rx_ring->buffer_info[i];
1418 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1419 sizeof(struct e1000_ps_page),
1420 GFP_KERNEL);
1421 if (!buffer_info->ps_pages)
1422 goto err_pages;
1423 }
bc7f75fa
AK		 1424
1425 desc_len = sizeof(union e1000_rx_desc_packet_split);
1426
1427 /* Round up to nearest 4K */
1428 rx_ring->size = rx_ring->count * desc_len;
1429 rx_ring->size = ALIGN(rx_ring->size, 4096);
1430
1431 err = e1000_alloc_ring_dma(adapter, rx_ring);
1432 if (err)
47f44e40 1433 goto err_pages;
bc7f75fa
AK		 1434
1435 rx_ring->next_to_clean = 0;
1436 rx_ring->next_to_use = 0;
1437 rx_ring->rx_skb_top = NULL;
1438
1439 return 0;
47f44e40
AK		 1440
1441err_pages:
1442 for (i = 0; i < rx_ring->count; i++) {
1443 buffer_info = &rx_ring->buffer_info[i];
1444 kfree(buffer_info->ps_pages);
1445 }
bc7f75fa
AK		 1446err:
1447 vfree(rx_ring->buffer_info);
44defeb3 1448 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1449 return err;
1450}
1451
1452/**
1453 * e1000_clean_tx_ring - Free Tx Buffers
1454 * @adapter: board private structure
1455 **/
1456static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1457{
1458 struct e1000_ring *tx_ring = adapter->tx_ring;
1459 struct e1000_buffer *buffer_info;
1460 unsigned long size;
1461 unsigned int i;
1462
1463 for (i = 0; i < tx_ring->count; i++) {
1464 buffer_info = &tx_ring->buffer_info[i];
1465 e1000_put_txbuf(adapter, buffer_info);
1466 }
1467
1468 size = sizeof(struct e1000_buffer) * tx_ring->count;
1469 memset(tx_ring->buffer_info, 0, size);
1470
1471 memset(tx_ring->desc, 0, tx_ring->size);
1472
1473 tx_ring->next_to_use = 0;
1474 tx_ring->next_to_clean = 0;
1475
1476 writel(0, adapter->hw.hw_addr + tx_ring->head);
1477 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1478}
1479
1480/**
1481 * e1000e_free_tx_resources - Free Tx Resources per Queue
1482 * @adapter: board private structure
1483 *
1484 * Free all transmit software resources
1485 **/
1486void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1487{
1488 struct pci_dev *pdev = adapter->pdev;
1489 struct e1000_ring *tx_ring = adapter->tx_ring;
1490
1491 e1000_clean_tx_ring(adapter);
1492
1493 vfree(tx_ring->buffer_info);
1494 tx_ring->buffer_info = NULL;
1495
1496 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1497 tx_ring->dma);
1498 tx_ring->desc = NULL;
1499}
1500
1501/**
1502 * e1000e_free_rx_resources - Free Rx Resources
1503 * @adapter: board private structure
1504 *
1505 * Free all receive software resources
1506 **/
1507
1508void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1509{
1510 struct pci_dev *pdev = adapter->pdev;
1511 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1512 int i;
bc7f75fa
AK		 1513
1514 e1000_clean_rx_ring(adapter);
1515
47f44e40
AK		 1516 for (i = 0; i < rx_ring->count; i++) {
1517 kfree(rx_ring->buffer_info[i].ps_pages);
1518 }
1519
bc7f75fa
AK		 1520 vfree(rx_ring->buffer_info);
1521 rx_ring->buffer_info = NULL;
1522
bc7f75fa
AK		 1523 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1524 rx_ring->dma);
1525 rx_ring->desc = NULL;
1526}
1527
1528/**
1529 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1530 * @adapter: pointer to adapter
1531 * @itr_setting: current adapter->itr
1532 * @packets: the number of packets during this measurement interval
1533 * @bytes: the number of bytes during this measurement interval
1534 *
bc7f75fa
AK		 1535 * Stores a new ITR value based on packets and byte
1536 * counts during the last interrupt. The advantage of per interrupt
1537 * computation is faster updates and more accurate ITR for the current
1538 * traffic pattern. Constants in this function were computed
1539 * based on theoretical maximum wire speed and thresholds were set based
1540 * on testing data as well as attempting to minimize response time
1541 * while increasing bulk throughput.
1542 * this functionality is controlled by the InterruptThrottleRate module
1543 * parameter (see e1000_param.c)
bc7f75fa
AK		 1544 **/
1545static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1546 u16 itr_setting, int packets,
1547 int bytes)
1548{
1549 unsigned int retval = itr_setting;
1550
1551 if (packets == 0)
1552 goto update_itr_done;
1553
1554 switch (itr_setting) {
1555 case lowest_latency:
1556 /* handle TSO and jumbo frames */
1557 if (bytes/packets > 8000)
1558 retval = bulk_latency;
1559 else if ((packets < 5) && (bytes > 512)) {
1560 retval = low_latency;
1561 }
1562 break;
1563 case low_latency: /* 50 usec aka 20000 ints/s */
1564 if (bytes > 10000) {
1565 /* this if handles the TSO accounting */
1566 if (bytes/packets > 8000) {
1567 retval = bulk_latency;
1568 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1569 retval = bulk_latency;
1570 } else if ((packets > 35)) {
1571 retval = lowest_latency;
1572 }
1573 } else if (bytes/packets > 2000) {
1574 retval = bulk_latency;
1575 } else if (packets <= 2 && bytes < 512) {
1576 retval = lowest_latency;
1577 }
1578 break;
1579 case bulk_latency: /* 250 usec aka 4000 ints/s */
1580 if (bytes > 25000) {
1581 if (packets > 35) {
1582 retval = low_latency;
1583 }
1584 } else if (bytes < 6000) {
1585 retval = low_latency;
1586 }
1587 break;
1588 }
1589
1590update_itr_done:
1591 return retval;
1592}
1593
1594static void e1000_set_itr(struct e1000_adapter *adapter)
1595{
1596 struct e1000_hw *hw = &adapter->hw;
1597 u16 current_itr;
1598 u32 new_itr = adapter->itr;
1599
1600 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1601 if (adapter->link_speed != SPEED_1000) {
1602 current_itr = 0;
1603 new_itr = 4000;
1604 goto set_itr_now;
1605 }
1606
1607 adapter->tx_itr = e1000_update_itr(adapter,
1608 adapter->tx_itr,
1609 adapter->total_tx_packets,
1610 adapter->total_tx_bytes);
1611 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1612 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1613 adapter->tx_itr = low_latency;
1614
1615 adapter->rx_itr = e1000_update_itr(adapter,
1616 adapter->rx_itr,
1617 adapter->total_rx_packets,
1618 adapter->total_rx_bytes);
1619 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1620 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1621 adapter->rx_itr = low_latency;
1622
1623 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1624
1625 switch (current_itr) {
1626 /* counts and packets in update_itr are dependent on these numbers */
1627 case lowest_latency:
1628 new_itr = 70000;
1629 break;
1630 case low_latency:
1631 new_itr = 20000; /* aka hwitr = ~200 */
1632 break;
1633 case bulk_latency:
1634 new_itr = 4000;
1635 break;
1636 default:
1637 break;
1638 }
1639
1640set_itr_now:
1641 if (new_itr != adapter->itr) {
ad68076e
BA		 1642 /*
1643 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1644 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1645 * increasing
1646 */
bc7f75fa
AK		 1647 new_itr = new_itr > adapter->itr ?
1648 min(adapter->itr + (new_itr >> 2), new_itr) :
1649 new_itr;
1650 adapter->itr = new_itr;
1651 ew32(ITR, 1000000000 / (new_itr * 256));
1652 }
1653}
1654
1655/**
1656 * e1000_clean - NAPI Rx polling callback
ad68076e 1657 * @napi: struct associated with this polling callback
489815ce 1658 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 1659 **/
1660static int e1000_clean(struct napi_struct *napi, int budget)
1661{
1662 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
1663 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 1664 int tx_cleaned = 0, work_done = 0;
bc7f75fa
AK		 1665
1666 /* Must NOT use netdev_priv macro here. */
1667 adapter = poll_dev->priv;
1668
ad68076e
BA		 1669 /*
1670 * e1000_clean is called per-cpu. This lock protects
bc7f75fa
AK		 1671 * tx_ring from being cleaned by multiple cpus
1672 * simultaneously. A failure obtaining the lock means
ad68076e
BA		 1673 * tx_ring is currently being cleaned anyway.
1674 */
bc7f75fa 1675 if (spin_trylock(&adapter->tx_queue_lock)) {
d2c7ddd6 1676 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa
AK		 1677 spin_unlock(&adapter->tx_queue_lock);
1678 }
1679
1680 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6
DM		 1681
1682 if (tx_cleaned)
1683 work_done = budget;
bc7f75fa 1684
53e52c72
DM		 1685 /* If budget not fully consumed, exit the polling mode */
1686 if (work_done < budget) {
bc7f75fa
AK		 1687 if (adapter->itr_setting & 3)
1688 e1000_set_itr(adapter);
1689 netif_rx_complete(poll_dev, napi);
1690 e1000_irq_enable(adapter);
1691 }
1692
1693 return work_done;
1694}
1695
1696static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1697{
1698 struct e1000_adapter *adapter = netdev_priv(netdev);
1699 struct e1000_hw *hw = &adapter->hw;
1700 u32 vfta, index;
1701
1702 /* don't update vlan cookie if already programmed */
1703 if ((adapter->hw.mng_cookie.status &
1704 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1705 (vid == adapter->mng_vlan_id))
1706 return;
1707 /* add VID to filter table */
1708 index = (vid >> 5) & 0x7F;
1709 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
1710 vfta |= (1 << (vid & 0x1F));
1711 e1000e_write_vfta(hw, index, vfta);
1712}
1713
1714static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1715{
1716 struct e1000_adapter *adapter = netdev_priv(netdev);
1717 struct e1000_hw *hw = &adapter->hw;
1718 u32 vfta, index;
1719
74ef9c39
JB		 1720 if (!test_bit(__E1000_DOWN, &adapter->state))
1721 e1000_irq_disable(adapter);
bc7f75fa 1722 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 1723
1724 if (!test_bit(__E1000_DOWN, &adapter->state))
1725 e1000_irq_enable(adapter);
bc7f75fa
AK		 1726
1727 if ((adapter->hw.mng_cookie.status &
1728 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1729 (vid == adapter->mng_vlan_id)) {
1730 /* release control to f/w */
1731 e1000_release_hw_control(adapter);
1732 return;
1733 }
1734
1735 /* remove VID from filter table */
1736 index = (vid >> 5) & 0x7F;
1737 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
1738 vfta &= ~(1 << (vid & 0x1F));
1739 e1000e_write_vfta(hw, index, vfta);
1740}
1741
1742static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
1743{
1744 struct net_device *netdev = adapter->netdev;
1745 u16 vid = adapter->hw.mng_cookie.vlan_id;
1746 u16 old_vid = adapter->mng_vlan_id;
1747
1748 if (!adapter->vlgrp)
1749 return;
1750
1751 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1752 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1753 if (adapter->hw.mng_cookie.status &
1754 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1755 e1000_vlan_rx_add_vid(netdev, vid);
1756 adapter->mng_vlan_id = vid;
1757 }
1758
1759 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
1760 (vid != old_vid) &&
1761 !vlan_group_get_device(adapter->vlgrp, old_vid))
1762 e1000_vlan_rx_kill_vid(netdev, old_vid);
1763 } else {
1764 adapter->mng_vlan_id = vid;
1765 }
1766}
1767
1768
1769static void e1000_vlan_rx_register(struct net_device *netdev,
1770 struct vlan_group *grp)
1771{
1772 struct e1000_adapter *adapter = netdev_priv(netdev);
1773 struct e1000_hw *hw = &adapter->hw;
1774 u32 ctrl, rctl;
1775
74ef9c39
JB		 1776 if (!test_bit(__E1000_DOWN, &adapter->state))
1777 e1000_irq_disable(adapter);
bc7f75fa
AK		 1778 adapter->vlgrp = grp;
1779
1780 if (grp) {
1781 /* enable VLAN tag insert/strip */
1782 ctrl = er32(CTRL);
1783 ctrl |= E1000_CTRL_VME;
1784 ew32(CTRL, ctrl);
1785
1786 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
1787 /* enable VLAN receive filtering */
1788 rctl = er32(RCTL);
bc7f75fa
AK		 1789 rctl &= ~E1000_RCTL_CFIEN;
1790 ew32(RCTL, rctl);
1791 e1000_update_mng_vlan(adapter);
1792 }
1793 } else {
1794 /* disable VLAN tag insert/strip */
1795 ctrl = er32(CTRL);
1796 ctrl &= ~E1000_CTRL_VME;
1797 ew32(CTRL, ctrl);
1798
1799 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 1800 if (adapter->mng_vlan_id !=
1801 (u16)E1000_MNG_VLAN_NONE) {
1802 e1000_vlan_rx_kill_vid(netdev,
1803 adapter->mng_vlan_id);
1804 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1805 }
1806 }
1807 }
1808
74ef9c39
JB		 1809 if (!test_bit(__E1000_DOWN, &adapter->state))
1810 e1000_irq_enable(adapter);
bc7f75fa
AK		 1811}
1812
1813static void e1000_restore_vlan(struct e1000_adapter *adapter)
1814{
1815 u16 vid;
1816
1817 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1818
1819 if (!adapter->vlgrp)
1820 return;
1821
1822 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1823 if (!vlan_group_get_device(adapter->vlgrp, vid))
1824 continue;
1825 e1000_vlan_rx_add_vid(adapter->netdev, vid);
1826 }
1827}
1828
1829static void e1000_init_manageability(struct e1000_adapter *adapter)
1830{
1831 struct e1000_hw *hw = &adapter->hw;
1832 u32 manc, manc2h;
1833
1834 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
1835 return;
1836
1837 manc = er32(MANC);
1838
ad68076e
BA		 1839 /*
1840 * enable receiving management packets to the host. this will probably
bc7f75fa 1841 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 1842 * the packets will be handled on SMBUS
1843 */
bc7f75fa
AK		 1844 manc |= E1000_MANC_EN_MNG2HOST;
1845 manc2h = er32(MANC2H);
1846#define E1000_MNG2HOST_PORT_623 (1 << 5)
1847#define E1000_MNG2HOST_PORT_664 (1 << 6)
1848 manc2h |= E1000_MNG2HOST_PORT_623;
1849 manc2h |= E1000_MNG2HOST_PORT_664;
1850 ew32(MANC2H, manc2h);
1851 ew32(MANC, manc);
1852}
1853
1854/**
1855 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1856 * @adapter: board private structure
1857 *
1858 * Configure the Tx unit of the MAC after a reset.
1859 **/
1860static void e1000_configure_tx(struct e1000_adapter *adapter)
1861{
1862 struct e1000_hw *hw = &adapter->hw;
1863 struct e1000_ring *tx_ring = adapter->tx_ring;
1864 u64 tdba;
1865 u32 tdlen, tctl, tipg, tarc;
1866 u32 ipgr1, ipgr2;
1867
1868 /* Setup the HW Tx Head and Tail descriptor pointers */
1869 tdba = tx_ring->dma;
1870 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
1871 ew32(TDBAL, (tdba & DMA_32BIT_MASK));
1872 ew32(TDBAH, (tdba >> 32));
1873 ew32(TDLEN, tdlen);
1874 ew32(TDH, 0);
1875 ew32(TDT, 0);
1876 tx_ring->head = E1000_TDH;
1877 tx_ring->tail = E1000_TDT;
1878
1879 /* Set the default values for the Tx Inter Packet Gap timer */
1880 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
1881 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
1882 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
1883
1884 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
1885 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
1886
1887 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1888 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1889 ew32(TIPG, tipg);
1890
1891 /* Set the Tx Interrupt Delay register */
1892 ew32(TIDV, adapter->tx_int_delay);
ad68076e 1893 /* Tx irq moderation */
bc7f75fa
AK		 1894 ew32(TADV, adapter->tx_abs_int_delay);
1895
1896 /* Program the Transmit Control Register */
1897 tctl = er32(TCTL);
1898 tctl &= ~E1000_TCTL_CT;
1899 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1900 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1901
1902 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 1903 tarc = er32(TARC(0));
ad68076e
BA		 1904 /*
1905 * set the speed mode bit, we'll clear it if we're not at
1906 * gigabit link later
1907 */
bc7f75fa
AK		 1908#define SPEED_MODE_BIT (1 << 21)
1909 tarc |= SPEED_MODE_BIT;
e9ec2c0f 1910 ew32(TARC(0), tarc);
bc7f75fa
AK		 1911 }
1912
1913 /* errata: program both queues to unweighted RR */
1914 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 1915 tarc = er32(TARC(0));
bc7f75fa 1916 tarc |= 1;
e9ec2c0f
JK		 1917 ew32(TARC(0), tarc);
1918 tarc = er32(TARC(1));
bc7f75fa 1919 tarc |= 1;
e9ec2c0f 1920 ew32(TARC(1), tarc);
bc7f75fa
AK		 1921 }
1922
1923 e1000e_config_collision_dist(hw);
1924
1925 /* Setup Transmit Descriptor Settings for eop descriptor */
1926 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1927
1928 /* only set IDE if we are delaying interrupts using the timers */
1929 if (adapter->tx_int_delay)
1930 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1931
1932 /* enable Report Status bit */
1933 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1934
1935 ew32(TCTL, tctl);
1936
1937 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
1938}
1939
1940/**
1941 * e1000_setup_rctl - configure the receive control registers
1942 * @adapter: Board private structure
1943 **/
1944#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1945 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1946static void e1000_setup_rctl(struct e1000_adapter *adapter)
1947{
1948 struct e1000_hw *hw = &adapter->hw;
1949 u32 rctl, rfctl;
1950 u32 psrctl = 0;
1951 u32 pages = 0;
1952
1953 /* Program MC offset vector base */
1954 rctl = er32(RCTL);
1955 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1956 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1957 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1958 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1959
1960 /* Do not Store bad packets */
1961 rctl &= ~E1000_RCTL_SBP;
1962
1963 /* Enable Long Packet receive */
1964 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1965 rctl &= ~E1000_RCTL_LPE;
1966 else
1967 rctl |= E1000_RCTL_LPE;
1968
5918bd88
AK		 1969 /* Enable hardware CRC frame stripping */
1970 rctl |= E1000_RCTL_SECRC;
1971
bc7f75fa
AK		 1972 /* Setup buffer sizes */
1973 rctl &= ~E1000_RCTL_SZ_4096;
1974 rctl |= E1000_RCTL_BSEX;
1975 switch (adapter->rx_buffer_len) {
1976 case 256:
1977 rctl |= E1000_RCTL_SZ_256;
1978 rctl &= ~E1000_RCTL_BSEX;
1979 break;
1980 case 512:
1981 rctl |= E1000_RCTL_SZ_512;
1982 rctl &= ~E1000_RCTL_BSEX;
1983 break;
1984 case 1024:
1985 rctl |= E1000_RCTL_SZ_1024;
1986 rctl &= ~E1000_RCTL_BSEX;
1987 break;
1988 case 2048:
1989 default:
1990 rctl |= E1000_RCTL_SZ_2048;
1991 rctl &= ~E1000_RCTL_BSEX;
1992 break;
1993 case 4096:
1994 rctl |= E1000_RCTL_SZ_4096;
1995 break;
1996 case 8192:
1997 rctl |= E1000_RCTL_SZ_8192;
1998 break;
1999 case 16384:
2000 rctl |= E1000_RCTL_SZ_16384;
2001 break;
2002 }
2003
2004 /*
2005 * 82571 and greater support packet-split where the protocol
2006 * header is placed in skb->data and the packet data is
2007 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2008 * In the case of a non-split, skb->data is linearly filled,
2009 * followed by the page buffers. Therefore, skb->data is
2010 * sized to hold the largest protocol header.
2011 *
2012 * allocations using alloc_page take too long for regular MTU
2013 * so only enable packet split for jumbo frames
2014 *
2015 * Using pages when the page size is greater than 16k wastes
2016 * a lot of memory, since we allocate 3 pages at all times
2017 * per packet.
2018 */
bc7f75fa 2019 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2020 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2021 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2022 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2023 else
2024 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2025
2026 if (adapter->rx_ps_pages) {
2027 /* Configure extra packet-split registers */
2028 rfctl = er32(RFCTL);
2029 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2030 /*
2031 * disable packet split support for IPv6 extension headers,
2032 * because some malformed IPv6 headers can hang the Rx
2033 */
bc7f75fa
AK		 2034 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2035 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2036
2037 ew32(RFCTL, rfctl);
2038
140a7480
AK		 2039 /* Enable Packet split descriptors */
2040 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2041
2042 psrctl |= adapter->rx_ps_bsize0 >>
2043 E1000_PSRCTL_BSIZE0_SHIFT;
2044
2045 switch (adapter->rx_ps_pages) {
2046 case 3:
2047 psrctl |= PAGE_SIZE <<
2048 E1000_PSRCTL_BSIZE3_SHIFT;
2049 case 2:
2050 psrctl |= PAGE_SIZE <<
2051 E1000_PSRCTL_BSIZE2_SHIFT;
2052 case 1:
2053 psrctl |= PAGE_SIZE >>
2054 E1000_PSRCTL_BSIZE1_SHIFT;
2055 break;
2056 }
2057
2058 ew32(PSRCTL, psrctl);
2059 }
2060
2061 ew32(RCTL, rctl);
318a94d6
JK		 2062 /* just started the receive unit, no need to restart */
2063 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2064}
2065
2066/**
2067 * e1000_configure_rx - Configure Receive Unit after Reset
2068 * @adapter: board private structure
2069 *
2070 * Configure the Rx unit of the MAC after a reset.
2071 **/
2072static void e1000_configure_rx(struct e1000_adapter *adapter)
2073{
2074 struct e1000_hw *hw = &adapter->hw;
2075 struct e1000_ring *rx_ring = adapter->rx_ring;
2076 u64 rdba;
2077 u32 rdlen, rctl, rxcsum, ctrl_ext;
2078
2079 if (adapter->rx_ps_pages) {
2080 /* this is a 32 byte descriptor */
2081 rdlen = rx_ring->count *
2082 sizeof(union e1000_rx_desc_packet_split);
2083 adapter->clean_rx = e1000_clean_rx_irq_ps;
2084 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2085 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2086 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2087 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2088 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2089 } else {
97ac8cae 2090 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2091 adapter->clean_rx = e1000_clean_rx_irq;
2092 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2093 }
2094
2095 /* disable receives while setting up the descriptors */
2096 rctl = er32(RCTL);
2097 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2098 e1e_flush();
2099 msleep(10);
2100
2101 /* set the Receive Delay Timer Register */
2102 ew32(RDTR, adapter->rx_int_delay);
2103
2104 /* irq moderation */
2105 ew32(RADV, adapter->rx_abs_int_delay);
2106 if (adapter->itr_setting != 0)
ad68076e 2107 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2108
2109 ctrl_ext = er32(CTRL_EXT);
2110 /* Reset delay timers after every interrupt */
2111 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2112 /* Auto-Mask interrupts upon ICR access */
2113 ctrl_ext |= E1000_CTRL_EXT_IAME;
2114 ew32(IAM, 0xffffffff);
2115 ew32(CTRL_EXT, ctrl_ext);
2116 e1e_flush();
2117
ad68076e
BA		 2118 /*
2119 * Setup the HW Rx Head and Tail Descriptor Pointers and
2120 * the Base and Length of the Rx Descriptor Ring
2121 */
bc7f75fa
AK		 2122 rdba = rx_ring->dma;
2123 ew32(RDBAL, (rdba & DMA_32BIT_MASK));
2124 ew32(RDBAH, (rdba >> 32));
2125 ew32(RDLEN, rdlen);
2126 ew32(RDH, 0);
2127 ew32(RDT, 0);
2128 rx_ring->head = E1000_RDH;
2129 rx_ring->tail = E1000_RDT;
2130
2131 /* Enable Receive Checksum Offload for TCP and UDP */
2132 rxcsum = er32(RXCSUM);
2133 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2134 rxcsum |= E1000_RXCSUM_TUOFL;
2135
ad68076e
BA		 2136 /*
2137 * IPv4 payload checksum for UDP fragments must be
2138 * used in conjunction with packet-split.
2139 */
bc7f75fa
AK		 2140 if (adapter->rx_ps_pages)
2141 rxcsum |= E1000_RXCSUM_IPPCSE;
2142 } else {
2143 rxcsum &= ~E1000_RXCSUM_TUOFL;
2144 /* no need to clear IPPCSE as it defaults to 0 */
2145 }
2146 ew32(RXCSUM, rxcsum);
2147
ad68076e
BA		 2148 /*
2149 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2150 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2151 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2152 */
bc7f75fa 2153 if ((adapter->flags & FLAG_HAS_ERT) &&
97ac8cae
BA		 2154 (adapter->netdev->mtu > ETH_DATA_LEN)) {
2155 u32 rxdctl = er32(RXDCTL(0));
2156 ew32(RXDCTL(0), rxdctl | 0x3);
2157 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2158 /*
2159 * With jumbo frames and early-receive enabled, excessive
2160 * C4->C2 latencies result in dropped transactions.
2161 */
2162 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2163 e1000e_driver_name, 55);
2164 } else {
2165 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2166 e1000e_driver_name,
2167 PM_QOS_DEFAULT_VALUE);
2168 }
bc7f75fa
AK		 2169
2170 /* Enable Receives */
2171 ew32(RCTL, rctl);
2172}
2173
2174/**
e2de3eb6 2175 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2176 * @hw: pointer to the HW structure
2177 * @mc_addr_list: array of multicast addresses to program
2178 * @mc_addr_count: number of multicast addresses to program
2179 * @rar_used_count: the first RAR register free to program
2180 * @rar_count: total number of supported Receive Address Registers
2181 *
2182 * Updates the Receive Address Registers and Multicast Table Array.
2183 * The caller must have a packed mc_addr_list of multicast addresses.
2184 * The parameter rar_count will usually be hw->mac.rar_entry_count
2185 * unless there are workarounds that change this. Currently no func pointer
2186 * exists and all implementations are handled in the generic version of this
2187 * function.
2188 **/
e2de3eb6
JK		 2189static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2190 u32 mc_addr_count, u32 rar_used_count,
2191 u32 rar_count)
bc7f75fa 2192{
e2de3eb6 2193 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
bc7f75fa
AK		 2194 rar_used_count, rar_count);
2195}
2196
2197/**
2198 * e1000_set_multi - Multicast and Promiscuous mode set
2199 * @netdev: network interface device structure
2200 *
2201 * The set_multi entry point is called whenever the multicast address
2202 * list or the network interface flags are updated. This routine is
2203 * responsible for configuring the hardware for proper multicast,
2204 * promiscuous mode, and all-multi behavior.
2205 **/
2206static void e1000_set_multi(struct net_device *netdev)
2207{
2208 struct e1000_adapter *adapter = netdev_priv(netdev);
2209 struct e1000_hw *hw = &adapter->hw;
2210 struct e1000_mac_info *mac = &hw->mac;
2211 struct dev_mc_list *mc_ptr;
2212 u8 *mta_list;
2213 u32 rctl;
2214 int i;
2215
2216 /* Check for Promiscuous and All Multicast modes */
2217
2218 rctl = er32(RCTL);
2219
2220 if (netdev->flags & IFF_PROMISC) {
2221 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2222 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2223 } else {
746b9f02
PM		 2224 if (netdev->flags & IFF_ALLMULTI) {
2225 rctl |= E1000_RCTL_MPE;
2226 rctl &= ~E1000_RCTL_UPE;
2227 } else {
2228 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2229 }
78ed11a5 2230 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2231 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2232 }
2233
2234 ew32(RCTL, rctl);
2235
2236 if (netdev->mc_count) {
2237 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2238 if (!mta_list)
2239 return;
2240
2241 /* prepare a packed array of only addresses. */
2242 mc_ptr = netdev->mc_list;
2243
2244 for (i = 0; i < netdev->mc_count; i++) {
2245 if (!mc_ptr)
2246 break;
2247 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2248 ETH_ALEN);
2249 mc_ptr = mc_ptr->next;
2250 }
2251
e2de3eb6 2252 e1000_update_mc_addr_list(hw, mta_list, i, 1,
bc7f75fa
AK		 2253 mac->rar_entry_count);
2254 kfree(mta_list);
2255 } else {
2256 /*
2257 * if we're called from probe, we might not have
2258 * anything to do here, so clear out the list
2259 */
e2de3eb6 2260 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
bc7f75fa
AK		 2261 }
2262}
2263
2264/**
ad68076e 2265 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2266 * @adapter: private board structure
2267 **/
2268static void e1000_configure(struct e1000_adapter *adapter)
2269{
2270 e1000_set_multi(adapter->netdev);
2271
2272 e1000_restore_vlan(adapter);
2273 e1000_init_manageability(adapter);
2274
2275 e1000_configure_tx(adapter);
2276 e1000_setup_rctl(adapter);
2277 e1000_configure_rx(adapter);
ad68076e 2278 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2279}
2280
2281/**
2282 * e1000e_power_up_phy - restore link in case the phy was powered down
2283 * @adapter: address of board private structure
2284 *
2285 * The phy may be powered down to save power and turn off link when the
2286 * driver is unloaded and wake on lan is not enabled (among others)
2287 * *** this routine MUST be followed by a call to e1000e_reset ***
2288 **/
2289void e1000e_power_up_phy(struct e1000_adapter *adapter)
2290{
2291 u16 mii_reg = 0;
2292
2293 /* Just clear the power down bit to wake the phy back up */
318a94d6 2294 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
ad68076e
BA		 2295 /*
2296 * According to the manual, the phy will retain its
2297 * settings across a power-down/up cycle
2298 */
bc7f75fa
AK		 2299 e1e_rphy(&adapter->hw, PHY_CONTROL, &mii_reg);
2300 mii_reg &= ~MII_CR_POWER_DOWN;
2301 e1e_wphy(&adapter->hw, PHY_CONTROL, mii_reg);
2302 }
2303
2304 adapter->hw.mac.ops.setup_link(&adapter->hw);
2305}
2306
2307/**
2308 * e1000_power_down_phy - Power down the PHY
2309 *
2310 * Power down the PHY so no link is implied when interface is down
2311 * The PHY cannot be powered down is management or WoL is active
2312 */
2313static void e1000_power_down_phy(struct e1000_adapter *adapter)
2314{
2315 struct e1000_hw *hw = &adapter->hw;
2316 u16 mii_reg;
2317
2318 /* WoL is enabled */
23b66e2b 2319 if (adapter->wol)
bc7f75fa
AK		 2320 return;
2321
2322 /* non-copper PHY? */
318a94d6 2323 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 2324 return;
2325
2326 /* reset is blocked because of a SoL/IDER session */
ad68076e 2327 if (e1000e_check_mng_mode(hw) || e1000_check_reset_block(hw))
bc7f75fa
AK		 2328 return;
2329
489815ce 2330 /* manageability (AMT) is enabled */
bc7f75fa
AK		 2331 if (er32(MANC) & E1000_MANC_SMBUS_EN)
2332 return;
2333
2334 /* power down the PHY */
2335 e1e_rphy(hw, PHY_CONTROL, &mii_reg);
2336 mii_reg |= MII_CR_POWER_DOWN;
2337 e1e_wphy(hw, PHY_CONTROL, mii_reg);
2338 mdelay(1);
2339}
2340
2341/**
2342 * e1000e_reset - bring the hardware into a known good state
2343 *
2344 * This function boots the hardware and enables some settings that
2345 * require a configuration cycle of the hardware - those cannot be
2346 * set/changed during runtime. After reset the device needs to be
ad68076e 2347 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2348 */
2349void e1000e_reset(struct e1000_adapter *adapter)
2350{
2351 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2352 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2353 struct e1000_hw *hw = &adapter->hw;
2354 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2355 u32 pba = adapter->pba;
bc7f75fa
AK		 2356 u16 hwm;
2357
ad68076e 2358 /* reset Packet Buffer Allocation to default */
318a94d6 2359 ew32(PBA, pba);
df762464 2360
318a94d6 2361 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2362 /*
2363 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2364 * large enough to accommodate two full transmit packets,
2365 * rounded up to the next 1KB and expressed in KB. Likewise,
2366 * the Rx FIFO should be large enough to accommodate at least
2367 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2368 * expressed in KB.
2369 */
df762464 2370 pba = er32(PBA);
bc7f75fa 2371 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2372 tx_space = pba >> 16;
bc7f75fa 2373 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2374 pba &= 0xffff;
ad68076e
BA		 2375 /*
2376 * the Tx fifo also stores 16 bytes of information about the tx
2377 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2378 */
2379 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2380 sizeof(struct e1000_tx_desc) -
2381 ETH_FCS_LEN) * 2;
2382 min_tx_space = ALIGN(min_tx_space, 1024);
2383 min_tx_space >>= 10;
2384 /* software strips receive CRC, so leave room for it */
318a94d6 2385 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2386 min_rx_space = ALIGN(min_rx_space, 1024);
2387 min_rx_space >>= 10;
2388
ad68076e
BA		 2389 /*
2390 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2391 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2392 * allocation, take space away from current Rx allocation
2393 */
df762464
AK		 2394 if ((tx_space < min_tx_space) &&
2395 ((min_tx_space - tx_space) < pba)) {
2396 pba -= min_tx_space - tx_space;
bc7f75fa 2397
ad68076e
BA		 2398 /*
2399 * if short on Rx space, Rx wins and must trump tx
2400 * adjustment or use Early Receive if available
2401 */
df762464 2402 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2403 (!(adapter->flags & FLAG_HAS_ERT)))
2404 /* ERT enabled in e1000_configure_rx */
df762464 2405 pba = min_rx_space;
bc7f75fa 2406 }
df762464
AK		 2407
2408 ew32(PBA, pba);
bc7f75fa
AK		 2409 }
2410
bc7f75fa 2411
ad68076e
BA		 2412 /*
2413 * flow control settings
2414 *
2415 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 2416 * (or the size used for early receive) above it in the Rx FIFO.
2417 * Set it to the lower of:
2418 * - 90% of the Rx FIFO size, and
2419 * - the full Rx FIFO size minus the early receive size (for parts
2420 * with ERT support assuming ERT set to E1000_ERT_2048), or
ad68076e
BA		 2421 * - the full Rx FIFO size minus one full frame
2422 */
bc7f75fa 2423 if (adapter->flags & FLAG_HAS_ERT)
318a94d6
JK		 2424 hwm = min(((pba << 10) * 9 / 10),
2425 ((pba << 10) - (E1000_ERT_2048 << 3)));
bc7f75fa 2426 else
318a94d6
JK		 2427 hwm = min(((pba << 10) * 9 / 10),
2428 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2429
318a94d6
JK		 2430 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
2431 fc->low_water = fc->high_water - 8;
bc7f75fa
AK		 2432
2433 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2434 fc->pause_time = 0xFFFF;
bc7f75fa 2435 else
318a94d6
JK		 2436 fc->pause_time = E1000_FC_PAUSE_TIME;
2437 fc->send_xon = 1;
2438 fc->type = fc->original_type;
bc7f75fa
AK		 2439
2440 /* Allow time for pending master requests to run */
2441 mac->ops.reset_hw(hw);
97ac8cae
BA		 2442
2443 /*
2444 * For parts with AMT enabled, let the firmware know
2445 * that the network interface is in control
2446 */
c43bc57e 2447 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2448 e1000_get_hw_control(adapter);
2449
bc7f75fa
AK		 2450 ew32(WUC, 0);
2451
2452 if (mac->ops.init_hw(hw))
44defeb3 2453 e_err("Hardware Error\n");
bc7f75fa
AK		 2454
2455 e1000_update_mng_vlan(adapter);
2456
2457 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2458 ew32(VET, ETH_P_8021Q);
2459
2460 e1000e_reset_adaptive(hw);
2461 e1000_get_phy_info(hw);
2462
2463 if (!(adapter->flags & FLAG_SMART_POWER_DOWN)) {
2464 u16 phy_data = 0;
ad68076e
BA		 2465 /*
2466 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2467 * the return value of this function because there is nothing
ad68076e
BA		 2468 * different we would do if it failed
2469 */
bc7f75fa
AK		 2470 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2471 phy_data &= ~IGP02E1000_PM_SPD;
2472 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2473 }
bc7f75fa
AK		 2474}
2475
2476int e1000e_up(struct e1000_adapter *adapter)
2477{
2478 struct e1000_hw *hw = &adapter->hw;
2479
2480 /* hardware has been reset, we need to reload some things */
2481 e1000_configure(adapter);
2482
2483 clear_bit(__E1000_DOWN, &adapter->state);
2484
2485 napi_enable(&adapter->napi);
2486 e1000_irq_enable(adapter);
2487
2488 /* fire a link change interrupt to start the watchdog */
2489 ew32(ICS, E1000_ICS_LSC);
2490 return 0;
2491}
2492
2493void e1000e_down(struct e1000_adapter *adapter)
2494{
2495 struct net_device *netdev = adapter->netdev;
2496 struct e1000_hw *hw = &adapter->hw;
2497 u32 tctl, rctl;
2498
ad68076e
BA		 2499 /*
2500 * signal that we're down so the interrupt handler does not
2501 * reschedule our watchdog timer
2502 */
bc7f75fa
AK		 2503 set_bit(__E1000_DOWN, &adapter->state);
2504
2505 /* disable receives in the hardware */
2506 rctl = er32(RCTL);
2507 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2508 /* flush and sleep below */
2509
d55b53ff 2510 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK		 2511
2512 /* disable transmits in the hardware */
2513 tctl = er32(TCTL);
2514 tctl &= ~E1000_TCTL_EN;
2515 ew32(TCTL, tctl);
2516 /* flush both disables and wait for them to finish */
2517 e1e_flush();
2518 msleep(10);
2519
2520 napi_disable(&adapter->napi);
2521 e1000_irq_disable(adapter);
2522
2523 del_timer_sync(&adapter->watchdog_timer);
2524 del_timer_sync(&adapter->phy_info_timer);
2525
2526 netdev->tx_queue_len = adapter->tx_queue_len;
2527 netif_carrier_off(netdev);
2528 adapter->link_speed = 0;
2529 adapter->link_duplex = 0;
2530
52cc3086
JK		 2531 if (!pci_channel_offline(adapter->pdev))
2532 e1000e_reset(adapter);
bc7f75fa
AK		 2533 e1000_clean_tx_ring(adapter);
2534 e1000_clean_rx_ring(adapter);
2535
2536 /*
2537 * TODO: for power management, we could drop the link and
2538 * pci_disable_device here.
2539 */
2540}
2541
2542void e1000e_reinit_locked(struct e1000_adapter *adapter)
2543{
2544 might_sleep();
2545 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2546 msleep(1);
2547 e1000e_down(adapter);
2548 e1000e_up(adapter);
2549 clear_bit(__E1000_RESETTING, &adapter->state);
2550}
2551
2552/**
2553 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2554 * @adapter: board private structure to initialize
2555 *
2556 * e1000_sw_init initializes the Adapter private data structure.
2557 * Fields are initialized based on PCI device information and
2558 * OS network device settings (MTU size).
2559 **/
2560static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2561{
bc7f75fa
AK		 2562 struct net_device *netdev = adapter->netdev;
2563
2564 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2565 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2566 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2567 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa
AK		 2568
2569 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2570 if (!adapter->tx_ring)
2571 goto err;
2572
2573 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2574 if (!adapter->rx_ring)
2575 goto err;
2576
2577 spin_lock_init(&adapter->tx_queue_lock);
2578
2579 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2580 e1000_irq_disable(adapter);
2581
2582 spin_lock_init(&adapter->stats_lock);
2583
2584 set_bit(__E1000_DOWN, &adapter->state);
2585 return 0;
2586
2587err:
44defeb3 2588 e_err("Unable to allocate memory for queues\n");
bc7f75fa
AK		 2589 kfree(adapter->rx_ring);
2590 kfree(adapter->tx_ring);
2591 return -ENOMEM;
2592}
2593
2594/**
2595 * e1000_open - Called when a network interface is made active
2596 * @netdev: network interface device structure
2597 *
2598 * Returns 0 on success, negative value on failure
2599 *
2600 * The open entry point is called when a network interface is made
2601 * active by the system (IFF_UP). At this point all resources needed
2602 * for transmit and receive operations are allocated, the interrupt
2603 * handler is registered with the OS, the watchdog timer is started,
2604 * and the stack is notified that the interface is ready.
2605 **/
2606static int e1000_open(struct net_device *netdev)
2607{
2608 struct e1000_adapter *adapter = netdev_priv(netdev);
2609 struct e1000_hw *hw = &adapter->hw;
2610 int err;
2611
2612 /* disallow open during test */
2613 if (test_bit(__E1000_TESTING, &adapter->state))
2614 return -EBUSY;
2615
2616 /* allocate transmit descriptors */
2617 err = e1000e_setup_tx_resources(adapter);
2618 if (err)
2619 goto err_setup_tx;
2620
2621 /* allocate receive descriptors */
2622 err = e1000e_setup_rx_resources(adapter);
2623 if (err)
2624 goto err_setup_rx;
2625
2626 e1000e_power_up_phy(adapter);
2627
2628 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2629 if ((adapter->hw.mng_cookie.status &
2630 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
2631 e1000_update_mng_vlan(adapter);
2632
ad68076e
BA		 2633 /*
2634 * If AMT is enabled, let the firmware know that the network
2635 * interface is now open
2636 */
c43bc57e 2637 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 2638 e1000_get_hw_control(adapter);
2639
ad68076e
BA		 2640 /*
2641 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 2642 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2643 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 2644 * clean_rx handler before we do so.
2645 */
bc7f75fa
AK		 2646 e1000_configure(adapter);
2647
2648 err = e1000_request_irq(adapter);
2649 if (err)
2650 goto err_req_irq;
2651
2652 /* From here on the code is the same as e1000e_up() */
2653 clear_bit(__E1000_DOWN, &adapter->state);
2654
2655 napi_enable(&adapter->napi);
2656
2657 e1000_irq_enable(adapter);
2658
d55b53ff
JK		 2659 netif_tx_start_all_queues(netdev);
2660
bc7f75fa
AK		 2661 /* fire a link status change interrupt to start the watchdog */
2662 ew32(ICS, E1000_ICS_LSC);
2663
2664 return 0;
2665
2666err_req_irq:
2667 e1000_release_hw_control(adapter);
2668 e1000_power_down_phy(adapter);
2669 e1000e_free_rx_resources(adapter);
2670err_setup_rx:
2671 e1000e_free_tx_resources(adapter);
2672err_setup_tx:
2673 e1000e_reset(adapter);
2674
2675 return err;
2676}
2677
2678/**
2679 * e1000_close - Disables a network interface
2680 * @netdev: network interface device structure
2681 *
2682 * Returns 0, this is not allowed to fail
2683 *
2684 * The close entry point is called when an interface is de-activated
2685 * by the OS. The hardware is still under the drivers control, but
2686 * needs to be disabled. A global MAC reset is issued to stop the
2687 * hardware, and all transmit and receive resources are freed.
2688 **/
2689static int e1000_close(struct net_device *netdev)
2690{
2691 struct e1000_adapter *adapter = netdev_priv(netdev);
2692
2693 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
2694 e1000e_down(adapter);
2695 e1000_power_down_phy(adapter);
2696 e1000_free_irq(adapter);
2697
2698 e1000e_free_tx_resources(adapter);
2699 e1000e_free_rx_resources(adapter);
2700
ad68076e
BA		 2701 /*
2702 * kill manageability vlan ID if supported, but not if a vlan with
2703 * the same ID is registered on the host OS (let 8021q kill it)
2704 */
bc7f75fa
AK		 2705 if ((adapter->hw.mng_cookie.status &
2706 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2707 !(adapter->vlgrp &&
2708 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
2709 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
2710
ad68076e
BA		 2711 /*
2712 * If AMT is enabled, let the firmware know that the network
2713 * interface is now closed
2714 */
c43bc57e 2715 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 2716 e1000_release_hw_control(adapter);
2717
2718 return 0;
2719}
2720/**
2721 * e1000_set_mac - Change the Ethernet Address of the NIC
2722 * @netdev: network interface device structure
2723 * @p: pointer to an address structure
2724 *
2725 * Returns 0 on success, negative on failure
2726 **/
2727static int e1000_set_mac(struct net_device *netdev, void *p)
2728{
2729 struct e1000_adapter *adapter = netdev_priv(netdev);
2730 struct sockaddr *addr = p;
2731
2732 if (!is_valid_ether_addr(addr->sa_data))
2733 return -EADDRNOTAVAIL;
2734
2735 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2736 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2737
2738 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2739
2740 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
2741 /* activate the work around */
2742 e1000e_set_laa_state_82571(&adapter->hw, 1);
2743
ad68076e
BA		 2744 /*
2745 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 2746 * between the time RAR[0] gets clobbered and the time it
2747 * gets fixed (in e1000_watchdog), the actual LAA is in one
2748 * of the RARs and no incoming packets directed to this port
2749 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 2750 * RAR[14]
2751 */
bc7f75fa
AK		 2752 e1000e_rar_set(&adapter->hw,
2753 adapter->hw.mac.addr,
2754 adapter->hw.mac.rar_entry_count - 1);
2755 }
2756
2757 return 0;
2758}
2759
ad68076e
BA		 2760/*
2761 * Need to wait a few seconds after link up to get diagnostic information from
2762 * the phy
2763 */
bc7f75fa
AK		 2764static void e1000_update_phy_info(unsigned long data)
2765{
2766 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2767 e1000_get_phy_info(&adapter->hw);
2768}
2769
2770/**
2771 * e1000e_update_stats - Update the board statistics counters
2772 * @adapter: board private structure
2773 **/
2774void e1000e_update_stats(struct e1000_adapter *adapter)
2775{
2776 struct e1000_hw *hw = &adapter->hw;
2777 struct pci_dev *pdev = adapter->pdev;
2778 unsigned long irq_flags;
2779 u16 phy_tmp;
2780
2781#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2782
2783 /*
2784 * Prevent stats update while adapter is being reset, or if the pci
2785 * connection is down.
2786 */
2787 if (adapter->link_speed == 0)
2788 return;
2789 if (pci_channel_offline(pdev))
2790 return;
2791
2792 spin_lock_irqsave(&adapter->stats_lock, irq_flags);
2793
ad68076e
BA		 2794 /*
2795 * these counters are modified from e1000_adjust_tbi_stats,
bc7f75fa
AK		 2796 * called from the interrupt context, so they must only
2797 * be written while holding adapter->stats_lock
2798 */
2799
2800 adapter->stats.crcerrs += er32(CRCERRS);
2801 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 2802 adapter->stats.gorc += er32(GORCL);
2803 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 2804 adapter->stats.bprc += er32(BPRC);
2805 adapter->stats.mprc += er32(MPRC);
2806 adapter->stats.roc += er32(ROC);
2807
bc7f75fa
AK		 2808 adapter->stats.mpc += er32(MPC);
2809 adapter->stats.scc += er32(SCC);
2810 adapter->stats.ecol += er32(ECOL);
2811 adapter->stats.mcc += er32(MCC);
2812 adapter->stats.latecol += er32(LATECOL);
2813 adapter->stats.dc += er32(DC);
bc7f75fa
AK		 2814 adapter->stats.xonrxc += er32(XONRXC);
2815 adapter->stats.xontxc += er32(XONTXC);
2816 adapter->stats.xoffrxc += er32(XOFFRXC);
2817 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 2818 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 2819 adapter->stats.gotc += er32(GOTCL);
2820 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 2821 adapter->stats.rnbc += er32(RNBC);
2822 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 2823
2824 adapter->stats.mptc += er32(MPTC);
2825 adapter->stats.bptc += er32(BPTC);
2826
2827 /* used for adaptive IFS */
2828
2829 hw->mac.tx_packet_delta = er32(TPT);
2830 adapter->stats.tpt += hw->mac.tx_packet_delta;
2831 hw->mac.collision_delta = er32(COLC);
2832 adapter->stats.colc += hw->mac.collision_delta;
2833
2834 adapter->stats.algnerrc += er32(ALGNERRC);
2835 adapter->stats.rxerrc += er32(RXERRC);
2836 adapter->stats.tncrs += er32(TNCRS);
2837 adapter->stats.cexterr += er32(CEXTERR);
2838 adapter->stats.tsctc += er32(TSCTC);
2839 adapter->stats.tsctfc += er32(TSCTFC);
2840
bc7f75fa 2841 /* Fill out the OS statistics structure */
bc7f75fa
AK		 2842 adapter->net_stats.multicast = adapter->stats.mprc;
2843 adapter->net_stats.collisions = adapter->stats.colc;
2844
2845 /* Rx Errors */
2846
ad68076e
BA		 2847 /*
2848 * RLEC on some newer hardware can be incorrect so build
2849 * our own version based on RUC and ROC
2850 */
bc7f75fa
AK		 2851 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
2852 adapter->stats.crcerrs + adapter->stats.algnerrc +
2853 adapter->stats.ruc + adapter->stats.roc +
2854 adapter->stats.cexterr;
2855 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
2856 adapter->stats.roc;
2857 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2858 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
2859 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
2860
2861 /* Tx Errors */
2862 adapter->net_stats.tx_errors = adapter->stats.ecol +
2863 adapter->stats.latecol;
2864 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
2865 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
2866 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
2867
2868 /* Tx Dropped needs to be maintained elsewhere */
2869
2870 /* Phy Stats */
318a94d6 2871 if (hw->phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 2872 if ((adapter->link_speed == SPEED_1000) &&
2873 (!e1e_rphy(hw, PHY_1000T_STATUS, &phy_tmp))) {
2874 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
2875 adapter->phy_stats.idle_errors += phy_tmp;
2876 }
2877 }
2878
2879 /* Management Stats */
2880 adapter->stats.mgptc += er32(MGTPTC);
2881 adapter->stats.mgprc += er32(MGTPRC);
2882 adapter->stats.mgpdc += er32(MGTPDC);
2883
2884 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
2885}
2886
7c25769f
BA		 2887/**
2888 * e1000_phy_read_status - Update the PHY register status snapshot
2889 * @adapter: board private structure
2890 **/
2891static void e1000_phy_read_status(struct e1000_adapter *adapter)
2892{
2893 struct e1000_hw *hw = &adapter->hw;
2894 struct e1000_phy_regs *phy = &adapter->phy_regs;
2895 int ret_val;
2896 unsigned long irq_flags;
2897
2898
2899 spin_lock_irqsave(&adapter->stats_lock, irq_flags);
2900
2901 if ((er32(STATUS) & E1000_STATUS_LU) &&
2902 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
2903 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
2904 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
2905 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
2906 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
2907 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
2908 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
2909 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
2910 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
2911 if (ret_val)
44defeb3 2912 e_warn("Error reading PHY register\n");
7c25769f
BA		 2913 } else {
2914 /*
2915 * Do not read PHY registers if link is not up
2916 * Set values to typical power-on defaults
2917 */
2918 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
2919 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
2920 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
2921 BMSR_ERCAP);
2922 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
2923 ADVERTISE_ALL | ADVERTISE_CSMA);
2924 phy->lpa = 0;
2925 phy->expansion = EXPANSION_ENABLENPAGE;
2926 phy->ctrl1000 = ADVERTISE_1000FULL;
2927 phy->stat1000 = 0;
2928 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
2929 }
2930
2931 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
2932}
2933
bc7f75fa
AK		 2934static void e1000_print_link_info(struct e1000_adapter *adapter)
2935{
bc7f75fa
AK		 2936 struct e1000_hw *hw = &adapter->hw;
2937 u32 ctrl = er32(CTRL);
2938
44defeb3
JK		 2939 e_info("Link is Up %d Mbps %s, Flow Control: %s\n",
2940 adapter->link_speed,
2941 (adapter->link_duplex == FULL_DUPLEX) ?
2942 "Full Duplex" : "Half Duplex",
2943 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
2944 "RX/TX" :
2945 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
2946 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 2947}
2948
318a94d6
JK		 2949static bool e1000_has_link(struct e1000_adapter *adapter)
2950{
2951 struct e1000_hw *hw = &adapter->hw;
2952 bool link_active = 0;
2953 s32 ret_val = 0;
2954
2955 /*
2956 * get_link_status is set on LSC (link status) interrupt or
2957 * Rx sequence error interrupt. get_link_status will stay
2958 * false until the check_for_link establishes link
2959 * for copper adapters ONLY
2960 */
2961 switch (hw->phy.media_type) {
2962 case e1000_media_type_copper:
2963 if (hw->mac.get_link_status) {
2964 ret_val = hw->mac.ops.check_for_link(hw);
2965 link_active = !hw->mac.get_link_status;
2966 } else {
2967 link_active = 1;
2968 }
2969 break;
2970 case e1000_media_type_fiber:
2971 ret_val = hw->mac.ops.check_for_link(hw);
2972 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2973 break;
2974 case e1000_media_type_internal_serdes:
2975 ret_val = hw->mac.ops.check_for_link(hw);
2976 link_active = adapter->hw.mac.serdes_has_link;
2977 break;
2978 default:
2979 case e1000_media_type_unknown:
2980 break;
2981 }
2982
2983 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
2984 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2985 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 2986 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 2987 }
2988
2989 return link_active;
2990}
2991
2992static void e1000e_enable_receives(struct e1000_adapter *adapter)
2993{
2994 /* make sure the receive unit is started */
2995 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
2996 (adapter->flags & FLAG_RX_RESTART_NOW)) {
2997 struct e1000_hw *hw = &adapter->hw;
2998 u32 rctl = er32(RCTL);
2999 ew32(RCTL, rctl | E1000_RCTL_EN);
3000 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3001 }
3002}
3003
bc7f75fa
AK		 3004/**
3005 * e1000_watchdog - Timer Call-back
3006 * @data: pointer to adapter cast into an unsigned long
3007 **/
3008static void e1000_watchdog(unsigned long data)
3009{
3010 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3011
3012 /* Do the rest outside of interrupt context */
3013 schedule_work(&adapter->watchdog_task);
3014
3015 /* TODO: make this use queue_delayed_work() */
3016}
3017
3018static void e1000_watchdog_task(struct work_struct *work)
3019{
3020 struct e1000_adapter *adapter = container_of(work,
3021 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3022 struct net_device *netdev = adapter->netdev;
3023 struct e1000_mac_info *mac = &adapter->hw.mac;
3024 struct e1000_ring *tx_ring = adapter->tx_ring;
3025 struct e1000_hw *hw = &adapter->hw;
3026 u32 link, tctl;
bc7f75fa
AK		 3027 int tx_pending = 0;
3028
318a94d6
JK		 3029 link = e1000_has_link(adapter);
3030 if ((netif_carrier_ok(netdev)) && link) {
3031 e1000e_enable_receives(adapter);
bc7f75fa 3032 goto link_up;
bc7f75fa
AK		 3033 }
3034
3035 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3036 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3037 e1000_update_mng_vlan(adapter);
3038
bc7f75fa
AK		 3039 if (link) {
3040 if (!netif_carrier_ok(netdev)) {
3041 bool txb2b = 1;
318a94d6 3042 /* update snapshot of PHY registers on LSC */
7c25769f 3043 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3044 mac->ops.get_link_up_info(&adapter->hw,
3045 &adapter->link_speed,
3046 &adapter->link_duplex);
3047 e1000_print_link_info(adapter);
ad68076e
BA		 3048 /*
3049 * tweak tx_queue_len according to speed/duplex
3050 * and adjust the timeout factor
3051 */
bc7f75fa
AK		 3052 netdev->tx_queue_len = adapter->tx_queue_len;
3053 adapter->tx_timeout_factor = 1;
3054 switch (adapter->link_speed) {
3055 case SPEED_10:
3056 txb2b = 0;
3057 netdev->tx_queue_len = 10;
3058 adapter->tx_timeout_factor = 14;
3059 break;
3060 case SPEED_100:
3061 txb2b = 0;
3062 netdev->tx_queue_len = 100;
3063 /* maybe add some timeout factor ? */
3064 break;
3065 }
3066
ad68076e
BA		 3067 /*
3068 * workaround: re-program speed mode bit after
3069 * link-up event
3070 */
bc7f75fa
AK		 3071 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3072 !txb2b) {
3073 u32 tarc0;
e9ec2c0f 3074 tarc0 = er32(TARC(0));
bc7f75fa 3075 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3076 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3077 }
3078
ad68076e
BA		 3079 /*
3080 * disable TSO for pcie and 10/100 speeds, to avoid
3081 * some hardware issues
3082 */
bc7f75fa
AK		 3083 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3084 switch (adapter->link_speed) {
3085 case SPEED_10:
3086 case SPEED_100:
44defeb3 3087 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3088 netdev->features &= ~NETIF_F_TSO;
3089 netdev->features &= ~NETIF_F_TSO6;
3090 break;
3091 case SPEED_1000:
3092 netdev->features |= NETIF_F_TSO;
3093 netdev->features |= NETIF_F_TSO6;
3094 break;
3095 default:
3096 /* oops */
3097 break;
3098 }
3099 }
3100
ad68076e
BA		 3101 /*
3102 * enable transmits in the hardware, need to do this
3103 * after setting TARC(0)
3104 */
bc7f75fa
AK		 3105 tctl = er32(TCTL);
3106 tctl |= E1000_TCTL_EN;
3107 ew32(TCTL, tctl);
3108
3109 netif_carrier_on(netdev);
d55b53ff 3110 netif_tx_wake_all_queues(netdev);
bc7f75fa
AK		 3111
3112 if (!test_bit(__E1000_DOWN, &adapter->state))
3113 mod_timer(&adapter->phy_info_timer,
3114 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3115 }
3116 } else {
3117 if (netif_carrier_ok(netdev)) {
3118 adapter->link_speed = 0;
3119 adapter->link_duplex = 0;
44defeb3 3120 e_info("Link is Down\n");
bc7f75fa 3121 netif_carrier_off(netdev);
d55b53ff 3122 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK		 3123 if (!test_bit(__E1000_DOWN, &adapter->state))
3124 mod_timer(&adapter->phy_info_timer,
3125 round_jiffies(jiffies + 2 * HZ));
3126
3127 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3128 schedule_work(&adapter->reset_task);
3129 }
3130 }
3131
3132link_up:
3133 e1000e_update_stats(adapter);
3134
3135 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3136 adapter->tpt_old = adapter->stats.tpt;
3137 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3138 adapter->colc_old = adapter->stats.colc;
3139
7c25769f
BA		 3140 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3141 adapter->gorc_old = adapter->stats.gorc;
3142 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3143 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3144
3145 e1000e_update_adaptive(&adapter->hw);
3146
3147 if (!netif_carrier_ok(netdev)) {
3148 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3149 tx_ring->count);
3150 if (tx_pending) {
ad68076e
BA		 3151 /*
3152 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3153 * but we've got queued Tx work that's never going
3154 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3155 * (Do the reset outside of interrupt context).
3156 */
bc7f75fa
AK		 3157 adapter->tx_timeout_count++;
3158 schedule_work(&adapter->reset_task);
3159 }
3160 }
3161
ad68076e 3162 /* Cause software interrupt to ensure Rx ring is cleaned */
bc7f75fa
AK		 3163 ew32(ICS, E1000_ICS_RXDMT0);
3164
3165 /* Force detection of hung controller every watchdog period */
3166 adapter->detect_tx_hung = 1;
3167
ad68076e
BA		 3168 /*
3169 * With 82571 controllers, LAA may be overwritten due to controller
3170 * reset from the other port. Set the appropriate LAA in RAR[0]
3171 */
bc7f75fa
AK		 3172 if (e1000e_get_laa_state_82571(hw))
3173 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3174
3175 /* Reset the timer */
3176 if (!test_bit(__E1000_DOWN, &adapter->state))
3177 mod_timer(&adapter->watchdog_timer,
3178 round_jiffies(jiffies + 2 * HZ));
3179}
3180
3181#define E1000_TX_FLAGS_CSUM 0x00000001
3182#define E1000_TX_FLAGS_VLAN 0x00000002
3183#define E1000_TX_FLAGS_TSO 0x00000004
3184#define E1000_TX_FLAGS_IPV4 0x00000008
3185#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3186#define E1000_TX_FLAGS_VLAN_SHIFT 16
3187
3188static int e1000_tso(struct e1000_adapter *adapter,
3189 struct sk_buff *skb)
3190{
3191 struct e1000_ring *tx_ring = adapter->tx_ring;
3192 struct e1000_context_desc *context_desc;
3193 struct e1000_buffer *buffer_info;
3194 unsigned int i;
3195 u32 cmd_length = 0;
3196 u16 ipcse = 0, tucse, mss;
3197 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3198 int err;
3199
3200 if (skb_is_gso(skb)) {
3201 if (skb_header_cloned(skb)) {
3202 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3203 if (err)
3204 return err;
3205 }
3206
3207 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3208 mss = skb_shinfo(skb)->gso_size;
3209 if (skb->protocol == htons(ETH_P_IP)) {
3210 struct iphdr *iph = ip_hdr(skb);
3211 iph->tot_len = 0;
3212 iph->check = 0;
3213 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3214 iph->daddr, 0,
3215 IPPROTO_TCP,
3216 0);
3217 cmd_length = E1000_TXD_CMD_IP;
3218 ipcse = skb_transport_offset(skb) - 1;
3219 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3220 ipv6_hdr(skb)->payload_len = 0;
3221 tcp_hdr(skb)->check =
3222 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3223 &ipv6_hdr(skb)->daddr,
3224 0, IPPROTO_TCP, 0);
3225 ipcse = 0;
3226 }
3227 ipcss = skb_network_offset(skb);
3228 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3229 tucss = skb_transport_offset(skb);
3230 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3231 tucse = 0;
3232
3233 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3234 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3235
3236 i = tx_ring->next_to_use;
3237 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3238 buffer_info = &tx_ring->buffer_info[i];
3239
3240 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3241 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3242 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3243 context_desc->upper_setup.tcp_fields.tucss = tucss;
3244 context_desc->upper_setup.tcp_fields.tucso = tucso;
3245 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3246 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3247 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3248 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3249
3250 buffer_info->time_stamp = jiffies;
3251 buffer_info->next_to_watch = i;
3252
3253 i++;
3254 if (i == tx_ring->count)
3255 i = 0;
3256 tx_ring->next_to_use = i;
3257
3258 return 1;
3259 }
3260
3261 return 0;
3262}
3263
3264static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3265{
3266 struct e1000_ring *tx_ring = adapter->tx_ring;
3267 struct e1000_context_desc *context_desc;
3268 struct e1000_buffer *buffer_info;
3269 unsigned int i;
3270 u8 css;
3271
3272 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3273 css = skb_transport_offset(skb);
3274
3275 i = tx_ring->next_to_use;
3276 buffer_info = &tx_ring->buffer_info[i];
3277 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3278
3279 context_desc->lower_setup.ip_config = 0;
3280 context_desc->upper_setup.tcp_fields.tucss = css;
3281 context_desc->upper_setup.tcp_fields.tucso =
3282 css + skb->csum_offset;
3283 context_desc->upper_setup.tcp_fields.tucse = 0;
3284 context_desc->tcp_seg_setup.data = 0;
3285 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
3286
3287 buffer_info->time_stamp = jiffies;
3288 buffer_info->next_to_watch = i;
3289
3290 i++;
3291 if (i == tx_ring->count)
3292 i = 0;
3293 tx_ring->next_to_use = i;
3294
3295 return 1;
3296 }
3297
3298 return 0;
3299}
3300
3301#define E1000_MAX_PER_TXD 8192
3302#define E1000_MAX_TXD_PWR 12
3303
3304static int e1000_tx_map(struct e1000_adapter *adapter,
3305 struct sk_buff *skb, unsigned int first,
3306 unsigned int max_per_txd, unsigned int nr_frags,
3307 unsigned int mss)
3308{
3309 struct e1000_ring *tx_ring = adapter->tx_ring;
3310 struct e1000_buffer *buffer_info;
3311 unsigned int len = skb->len - skb->data_len;
3312 unsigned int offset = 0, size, count = 0, i;
3313 unsigned int f;
3314
3315 i = tx_ring->next_to_use;
3316
3317 while (len) {
3318 buffer_info = &tx_ring->buffer_info[i];
3319 size = min(len, max_per_txd);
3320
3321 /* Workaround for premature desc write-backs
3322 * in TSO mode. Append 4-byte sentinel desc */
3323 if (mss && !nr_frags && size == len && size > 8)
3324 size -= 4;
3325
3326 buffer_info->length = size;
3327 /* set time_stamp *before* dma to help avoid a possible race */
3328 buffer_info->time_stamp = jiffies;
3329 buffer_info->dma =
3330 pci_map_single(adapter->pdev,
3331 skb->data + offset,
3332 size,
3333 PCI_DMA_TODEVICE);
8d8bb39b 3334 if (pci_dma_mapping_error(adapter->pdev, buffer_info->dma)) {
bc7f75fa
AK		 3335 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
3336 adapter->tx_dma_failed++;
3337 return -1;
3338 }
3339 buffer_info->next_to_watch = i;
3340
3341 len -= size;
3342 offset += size;
3343 count++;
3344 i++;
3345 if (i == tx_ring->count)
3346 i = 0;
3347 }
3348
3349 for (f = 0; f < nr_frags; f++) {
3350 struct skb_frag_struct *frag;
3351
3352 frag = &skb_shinfo(skb)->frags[f];
3353 len = frag->size;
3354 offset = frag->page_offset;
3355
3356 while (len) {
3357 buffer_info = &tx_ring->buffer_info[i];
3358 size = min(len, max_per_txd);
3359 /* Workaround for premature desc write-backs
3360 * in TSO mode. Append 4-byte sentinel desc */
3361 if (mss && f == (nr_frags-1) && size == len && size > 8)
3362 size -= 4;
3363
3364 buffer_info->length = size;
3365 buffer_info->time_stamp = jiffies;
3366 buffer_info->dma =
3367 pci_map_page(adapter->pdev,
3368 frag->page,
3369 offset,
3370 size,
3371 PCI_DMA_TODEVICE);
8d8bb39b
FT		 3372 if (pci_dma_mapping_error(adapter->pdev,
3373 buffer_info->dma)) {
bc7f75fa
AK		 3374 dev_err(&adapter->pdev->dev,
3375 "TX DMA page map failed\n");
3376 adapter->tx_dma_failed++;
3377 return -1;
3378 }
3379
3380 buffer_info->next_to_watch = i;
3381
3382 len -= size;
3383 offset += size;
3384 count++;
3385
3386 i++;
3387 if (i == tx_ring->count)
3388 i = 0;
3389 }
3390 }
3391
3392 if (i == 0)
3393 i = tx_ring->count - 1;
3394 else
3395 i--;
3396
3397 tx_ring->buffer_info[i].skb = skb;
3398 tx_ring->buffer_info[first].next_to_watch = i;
3399
3400 return count;
3401}
3402
3403static void e1000_tx_queue(struct e1000_adapter *adapter,
3404 int tx_flags, int count)
3405{
3406 struct e1000_ring *tx_ring = adapter->tx_ring;
3407 struct e1000_tx_desc *tx_desc = NULL;
3408 struct e1000_buffer *buffer_info;
3409 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3410 unsigned int i;
3411
3412 if (tx_flags & E1000_TX_FLAGS_TSO) {
3413 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3414 E1000_TXD_CMD_TSE;
3415 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3416
3417 if (tx_flags & E1000_TX_FLAGS_IPV4)
3418 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3419 }
3420
3421 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3422 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3423 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3424 }
3425
3426 if (tx_flags & E1000_TX_FLAGS_VLAN) {
3427 txd_lower |= E1000_TXD_CMD_VLE;
3428 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3429 }
3430
3431 i = tx_ring->next_to_use;
3432
3433 while (count--) {
3434 buffer_info = &tx_ring->buffer_info[i];
3435 tx_desc = E1000_TX_DESC(*tx_ring, i);
3436 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3437 tx_desc->lower.data =
3438 cpu_to_le32(txd_lower | buffer_info->length);
3439 tx_desc->upper.data = cpu_to_le32(txd_upper);
3440
3441 i++;
3442 if (i == tx_ring->count)
3443 i = 0;
3444 }
3445
3446 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3447
ad68076e
BA		 3448 /*
3449 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 3450 * know there are new descriptors to fetch. (Only
3451 * applicable for weak-ordered memory model archs,
ad68076e
BA		 3452 * such as IA-64).
3453 */
bc7f75fa
AK		 3454 wmb();
3455
3456 tx_ring->next_to_use = i;
3457 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 3458 /*
3459 * we need this if more than one processor can write to our tail
3460 * at a time, it synchronizes IO on IA64/Altix systems
3461 */
bc7f75fa
AK		 3462 mmiowb();
3463}
3464
3465#define MINIMUM_DHCP_PACKET_SIZE 282
3466static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3467 struct sk_buff *skb)
3468{
3469 struct e1000_hw *hw = &adapter->hw;
3470 u16 length, offset;
3471
3472 if (vlan_tx_tag_present(skb)) {
3473 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id)
3474 && (adapter->hw.mng_cookie.status &
3475 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
3476 return 0;
3477 }
3478
3479 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
3480 return 0;
3481
3482 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
3483 return 0;
3484
3485 {
3486 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
3487 struct udphdr *udp;
3488
3489 if (ip->protocol != IPPROTO_UDP)
3490 return 0;
3491
3492 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
3493 if (ntohs(udp->dest) != 67)
3494 return 0;
3495
3496 offset = (u8 *)udp + 8 - skb->data;
3497 length = skb->len - offset;
3498 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
3499 }
3500
3501 return 0;
3502}
3503
3504static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3505{
3506 struct e1000_adapter *adapter = netdev_priv(netdev);
3507
3508 netif_stop_queue(netdev);
ad68076e
BA		 3509 /*
3510 * Herbert's original patch had:
bc7f75fa 3511 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 3512 * but since that doesn't exist yet, just open code it.
3513 */
bc7f75fa
AK		 3514 smp_mb();
3515
ad68076e
BA		 3516 /*
3517 * We need to check again in a case another CPU has just
3518 * made room available.
3519 */
bc7f75fa
AK		 3520 if (e1000_desc_unused(adapter->tx_ring) < size)
3521 return -EBUSY;
3522
3523 /* A reprieve! */
3524 netif_start_queue(netdev);
3525 ++adapter->restart_queue;
3526 return 0;
3527}
3528
3529static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
3530{
3531 struct e1000_adapter *adapter = netdev_priv(netdev);
3532
3533 if (e1000_desc_unused(adapter->tx_ring) >= size)
3534 return 0;
3535 return __e1000_maybe_stop_tx(netdev, size);
3536}
3537
3538#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3539static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3540{
3541 struct e1000_adapter *adapter = netdev_priv(netdev);
3542 struct e1000_ring *tx_ring = adapter->tx_ring;
3543 unsigned int first;
3544 unsigned int max_per_txd = E1000_MAX_PER_TXD;
3545 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3546 unsigned int tx_flags = 0;
4e6c709c 3547 unsigned int len = skb->len - skb->data_len;
bc7f75fa 3548 unsigned long irq_flags;
4e6c709c
AK		 3549 unsigned int nr_frags;
3550 unsigned int mss;
bc7f75fa
AK		 3551 int count = 0;
3552 int tso;
3553 unsigned int f;
bc7f75fa
AK		 3554
3555 if (test_bit(__E1000_DOWN, &adapter->state)) {
3556 dev_kfree_skb_any(skb);
3557 return NETDEV_TX_OK;
3558 }
3559
3560 if (skb->len <= 0) {
3561 dev_kfree_skb_any(skb);
3562 return NETDEV_TX_OK;
3563 }
3564
3565 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 3566 /*
3567 * The controller does a simple calculation to
bc7f75fa
AK		 3568 * make sure there is enough room in the FIFO before
3569 * initiating the DMA for each buffer. The calc is:
3570 * 4 = ceil(buffer len/mss). To make sure we don't
3571 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 3572 * drops.
3573 */
bc7f75fa
AK		 3574 if (mss) {
3575 u8 hdr_len;
3576 max_per_txd = min(mss << 2, max_per_txd);
3577 max_txd_pwr = fls(max_per_txd) - 1;
3578
ad68076e
BA		 3579 /*
3580 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
3581 * points to just header, pull a few bytes of payload from
3582 * frags into skb->data
3583 */
bc7f75fa 3584 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 3585 /*
3586 * we do this workaround for ES2LAN, but it is un-necessary,
3587 * avoiding it could save a lot of cycles
3588 */
4e6c709c 3589 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 3590 unsigned int pull_size;
3591
3592 pull_size = min((unsigned int)4, skb->data_len);
3593 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 3594 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 3595 dev_kfree_skb_any(skb);
3596 return NETDEV_TX_OK;
3597 }
3598 len = skb->len - skb->data_len;
3599 }
3600 }
3601
3602 /* reserve a descriptor for the offload context */
3603 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3604 count++;
3605 count++;
3606
3607 count += TXD_USE_COUNT(len, max_txd_pwr);
3608
3609 nr_frags = skb_shinfo(skb)->nr_frags;
3610 for (f = 0; f < nr_frags; f++)
3611 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3612 max_txd_pwr);
3613
3614 if (adapter->hw.mac.tx_pkt_filtering)
3615 e1000_transfer_dhcp_info(adapter, skb);
3616
3617 if (!spin_trylock_irqsave(&adapter->tx_queue_lock, irq_flags))
3618 /* Collision - tell upper layer to requeue */
3619 return NETDEV_TX_LOCKED;
3620
ad68076e
BA		 3621 /*
3622 * need: count + 2 desc gap to keep tail from touching
3623 * head, otherwise try next time
3624 */
bc7f75fa
AK		 3625 if (e1000_maybe_stop_tx(netdev, count + 2)) {
3626 spin_unlock_irqrestore(&adapter->tx_queue_lock, irq_flags);
3627 return NETDEV_TX_BUSY;
3628 }
3629
3630 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3631 tx_flags |= E1000_TX_FLAGS_VLAN;
3632 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3633 }
3634
3635 first = tx_ring->next_to_use;
3636
3637 tso = e1000_tso(adapter, skb);
3638 if (tso < 0) {
3639 dev_kfree_skb_any(skb);
3640 spin_unlock_irqrestore(&adapter->tx_queue_lock, irq_flags);
3641 return NETDEV_TX_OK;
3642 }
3643
3644 if (tso)
3645 tx_flags |= E1000_TX_FLAGS_TSO;
3646 else if (e1000_tx_csum(adapter, skb))
3647 tx_flags |= E1000_TX_FLAGS_CSUM;
3648
ad68076e
BA		 3649 /*
3650 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 3651 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 3652 * no longer assume, we must.
3653 */
bc7f75fa
AK		 3654 if (skb->protocol == htons(ETH_P_IP))
3655 tx_flags |= E1000_TX_FLAGS_IPV4;
3656
3657 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
3658 if (count < 0) {
3659 /* handle pci_map_single() error in e1000_tx_map */
3660 dev_kfree_skb_any(skb);
3661 spin_unlock_irqrestore(&adapter->tx_queue_lock, irq_flags);
7b5dfe1a 3662 return NETDEV_TX_OK;
bc7f75fa
AK		 3663 }
3664
3665 e1000_tx_queue(adapter, tx_flags, count);
3666
3667 netdev->trans_start = jiffies;
3668
3669 /* Make sure there is space in the ring for the next send. */
3670 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
3671
3672 spin_unlock_irqrestore(&adapter->tx_queue_lock, irq_flags);
3673 return NETDEV_TX_OK;
3674}
3675
3676/**
3677 * e1000_tx_timeout - Respond to a Tx Hang
3678 * @netdev: network interface device structure
3679 **/
3680static void e1000_tx_timeout(struct net_device *netdev)
3681{
3682 struct e1000_adapter *adapter = netdev_priv(netdev);
3683
3684 /* Do the reset outside of interrupt context */
3685 adapter->tx_timeout_count++;
3686 schedule_work(&adapter->reset_task);
3687}
3688
3689static void e1000_reset_task(struct work_struct *work)
3690{
3691 struct e1000_adapter *adapter;
3692 adapter = container_of(work, struct e1000_adapter, reset_task);
3693
3694 e1000e_reinit_locked(adapter);
3695}
3696
3697/**
3698 * e1000_get_stats - Get System Network Statistics
3699 * @netdev: network interface device structure
3700 *
3701 * Returns the address of the device statistics structure.
3702 * The statistics are actually updated from the timer callback.
3703 **/
3704static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
3705{
3706 struct e1000_adapter *adapter = netdev_priv(netdev);
3707
3708 /* only return the current stats */
3709 return &adapter->net_stats;
3710}
3711
3712/**
3713 * e1000_change_mtu - Change the Maximum Transfer Unit
3714 * @netdev: network interface device structure
3715 * @new_mtu: new value for maximum frame size
3716 *
3717 * Returns 0 on success, negative on failure
3718 **/
3719static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
3720{
3721 struct e1000_adapter *adapter = netdev_priv(netdev);
3722 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3723
3724 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3725 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
44defeb3 3726 e_err("Invalid MTU setting\n");
bc7f75fa
AK		 3727 return -EINVAL;
3728 }
3729
3730 /* Jumbo frame size limits */
3731 if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) {
3732 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
44defeb3 3733 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 3734 return -EINVAL;
3735 }
3736 if (adapter->hw.phy.type == e1000_phy_ife) {
44defeb3 3737 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 3738 return -EINVAL;
3739 }
3740 }
3741
3742#define MAX_STD_JUMBO_FRAME_SIZE 9234
3743 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
44defeb3 3744 e_err("MTU > 9216 not supported.\n");
bc7f75fa
AK		 3745 return -EINVAL;
3746 }
3747
3748 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3749 msleep(1);
3750 /* e1000e_down has a dependency on max_frame_size */
318a94d6 3751 adapter->max_frame_size = max_frame;
bc7f75fa
AK		 3752 if (netif_running(netdev))
3753 e1000e_down(adapter);
3754
ad68076e
BA		 3755 /*
3756 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 3757 * means we reserve 2 more, this pushes us to allocate from the next
3758 * larger slab size.
ad68076e 3759 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 3760 * However with the new *_jumbo_rx* routines, jumbo receives will use
3761 * fragmented skbs
ad68076e 3762 */
bc7f75fa
AK		 3763
3764 if (max_frame <= 256)
3765 adapter->rx_buffer_len = 256;
3766 else if (max_frame <= 512)
3767 adapter->rx_buffer_len = 512;
3768 else if (max_frame <= 1024)
3769 adapter->rx_buffer_len = 1024;
3770 else if (max_frame <= 2048)
3771 adapter->rx_buffer_len = 2048;
3772 else
3773 adapter->rx_buffer_len = 4096;
3774
3775 /* adjust allocation if LPE protects us, and we aren't using SBP */
3776 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3777 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
3778 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 3779 + ETH_FCS_LEN;
bc7f75fa 3780
44defeb3 3781 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
bc7f75fa
AK		 3782 netdev->mtu = new_mtu;
3783
3784 if (netif_running(netdev))
3785 e1000e_up(adapter);
3786 else
3787 e1000e_reset(adapter);
3788
3789 clear_bit(__E1000_RESETTING, &adapter->state);
3790
3791 return 0;
3792}
3793
3794static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
3795 int cmd)
3796{
3797 struct e1000_adapter *adapter = netdev_priv(netdev);
3798 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 3799
318a94d6 3800 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 3801 return -EOPNOTSUPP;
3802
3803 switch (cmd) {
3804 case SIOCGMIIPHY:
3805 data->phy_id = adapter->hw.phy.addr;
3806 break;
3807 case SIOCGMIIREG:
3808 if (!capable(CAP_NET_ADMIN))
3809 return -EPERM;
7c25769f
BA		 3810 switch (data->reg_num & 0x1F) {
3811 case MII_BMCR:
3812 data->val_out = adapter->phy_regs.bmcr;
3813 break;
3814 case MII_BMSR:
3815 data->val_out = adapter->phy_regs.bmsr;
3816 break;
3817 case MII_PHYSID1:
3818 data->val_out = (adapter->hw.phy.id >> 16);
3819 break;
3820 case MII_PHYSID2:
3821 data->val_out = (adapter->hw.phy.id & 0xFFFF);
3822 break;
3823 case MII_ADVERTISE:
3824 data->val_out = adapter->phy_regs.advertise;
3825 break;
3826 case MII_LPA:
3827 data->val_out = adapter->phy_regs.lpa;
3828 break;
3829 case MII_EXPANSION:
3830 data->val_out = adapter->phy_regs.expansion;
3831 break;
3832 case MII_CTRL1000:
3833 data->val_out = adapter->phy_regs.ctrl1000;
3834 break;
3835 case MII_STAT1000:
3836 data->val_out = adapter->phy_regs.stat1000;
3837 break;
3838 case MII_ESTATUS:
3839 data->val_out = adapter->phy_regs.estatus;
3840 break;
3841 default:
bc7f75fa
AK		 3842 return -EIO;
3843 }
bc7f75fa
AK		 3844 break;
3845 case SIOCSMIIREG:
3846 default:
3847 return -EOPNOTSUPP;
3848 }
3849 return 0;
3850}
3851
3852static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3853{
3854 switch (cmd) {
3855 case SIOCGMIIPHY:
3856 case SIOCGMIIREG:
3857 case SIOCSMIIREG:
3858 return e1000_mii_ioctl(netdev, ifr, cmd);
3859 default:
3860 return -EOPNOTSUPP;
3861 }
3862}
3863
3864static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
3865{
3866 struct net_device *netdev = pci_get_drvdata(pdev);
3867 struct e1000_adapter *adapter = netdev_priv(netdev);
3868 struct e1000_hw *hw = &adapter->hw;
3869 u32 ctrl, ctrl_ext, rctl, status;
3870 u32 wufc = adapter->wol;
3871 int retval = 0;
3872
3873 netif_device_detach(netdev);
3874
3875 if (netif_running(netdev)) {
3876 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3877 e1000e_down(adapter);
3878 e1000_free_irq(adapter);
3879 }
3880
3881 retval = pci_save_state(pdev);
3882 if (retval)
3883 return retval;
3884
3885 status = er32(STATUS);
3886 if (status & E1000_STATUS_LU)
3887 wufc &= ~E1000_WUFC_LNKC;
3888
3889 if (wufc) {
3890 e1000_setup_rctl(adapter);
3891 e1000_set_multi(netdev);
3892
3893 /* turn on all-multi mode if wake on multicast is enabled */
3894 if (wufc & E1000_WUFC_MC) {
3895 rctl = er32(RCTL);
3896 rctl |= E1000_RCTL_MPE;
3897 ew32(RCTL, rctl);
3898 }
3899
3900 ctrl = er32(CTRL);
3901 /* advertise wake from D3Cold */
3902 #define E1000_CTRL_ADVD3WUC 0x00100000
3903 /* phy power management enable */
3904 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
3905 ctrl |= E1000_CTRL_ADVD3WUC |
3906 E1000_CTRL_EN_PHY_PWR_MGMT;
3907 ew32(CTRL, ctrl);
3908
318a94d6
JK		 3909 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
3910 adapter->hw.phy.media_type ==
3911 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 3912 /* keep the laser running in D3 */
3913 ctrl_ext = er32(CTRL_EXT);
3914 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
3915 ew32(CTRL_EXT, ctrl_ext);
3916 }
3917
97ac8cae
BA		 3918 if (adapter->flags & FLAG_IS_ICH)
3919 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
3920
bc7f75fa
AK		 3921 /* Allow time for pending master requests to run */
3922 e1000e_disable_pcie_master(&adapter->hw);
3923
3924 ew32(WUC, E1000_WUC_PME_EN);
3925 ew32(WUFC, wufc);
3926 pci_enable_wake(pdev, PCI_D3hot, 1);
3927 pci_enable_wake(pdev, PCI_D3cold, 1);
3928 } else {
3929 ew32(WUC, 0);
3930 ew32(WUFC, 0);
3931 pci_enable_wake(pdev, PCI_D3hot, 0);
3932 pci_enable_wake(pdev, PCI_D3cold, 0);
3933 }
3934
bc7f75fa
AK		 3935 /* make sure adapter isn't asleep if manageability is enabled */
3936 if (adapter->flags & FLAG_MNG_PT_ENABLED) {
3937 pci_enable_wake(pdev, PCI_D3hot, 1);
3938 pci_enable_wake(pdev, PCI_D3cold, 1);
3939 }
3940
3941 if (adapter->hw.phy.type == e1000_phy_igp_3)
3942 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
3943
ad68076e
BA		 3944 /*
3945 * Release control of h/w to f/w. If f/w is AMT enabled, this
3946 * would have already happened in close and is redundant.
3947 */
bc7f75fa
AK		 3948 e1000_release_hw_control(adapter);
3949
3950 pci_disable_device(pdev);
3951
3952 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3953
3954 return 0;
3955}
3956
1eae4eb2
AK		 3957static void e1000e_disable_l1aspm(struct pci_dev *pdev)
3958{
3959 int pos;
1eae4eb2
AK		 3960 u16 val;
3961
3962 /*
3963 * 82573 workaround - disable L1 ASPM on mobile chipsets
3964 *
3965 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
3966 * resulting in lost data or garbage information on the pci-e link
3967 * level. This could result in (false) bad EEPROM checksum errors,
3968 * long ping times (up to 2s) or even a system freeze/hang.
3969 *
3970 * Unfortunately this feature saves about 1W power consumption when
3971 * active.
3972 */
3973 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 3974 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
3975 if (val & 0x2) {
3976 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
3977 val &= ~0x2;
3978 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
3979 }
3980}
3981
bc7f75fa
AK		 3982#ifdef CONFIG_PM
3983static int e1000_resume(struct pci_dev *pdev)
3984{
3985 struct net_device *netdev = pci_get_drvdata(pdev);
3986 struct e1000_adapter *adapter = netdev_priv(netdev);
3987 struct e1000_hw *hw = &adapter->hw;
3988 u32 err;
3989
3990 pci_set_power_state(pdev, PCI_D0);
3991 pci_restore_state(pdev);
1eae4eb2 3992 e1000e_disable_l1aspm(pdev);
6e4f6f6b
TI		 3993
3994 if (adapter->need_ioport)
3995 err = pci_enable_device(pdev);
3996 else
3997 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 3998 if (err) {
3999 dev_err(&pdev->dev,
4000 "Cannot enable PCI device from suspend\n");
4001 return err;
4002 }
4003
4004 pci_set_master(pdev);
4005
4006 pci_enable_wake(pdev, PCI_D3hot, 0);
4007 pci_enable_wake(pdev, PCI_D3cold, 0);
4008
4009 if (netif_running(netdev)) {
4010 err = e1000_request_irq(adapter);
4011 if (err)
4012 return err;
4013 }
4014
4015 e1000e_power_up_phy(adapter);
4016 e1000e_reset(adapter);
4017 ew32(WUS, ~0);
4018
4019 e1000_init_manageability(adapter);
4020
4021 if (netif_running(netdev))
4022 e1000e_up(adapter);
4023
4024 netif_device_attach(netdev);
4025
ad68076e
BA		 4026 /*
4027 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4028 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4029 * under the control of the driver.
4030 */
c43bc57e 4031 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4032 e1000_get_hw_control(adapter);
4033
4034 return 0;
4035}
4036#endif
4037
4038static void e1000_shutdown(struct pci_dev *pdev)
4039{
4040 e1000_suspend(pdev, PMSG_SUSPEND);
4041}
4042
4043#ifdef CONFIG_NET_POLL_CONTROLLER
4044/*
4045 * Polling 'interrupt' - used by things like netconsole to send skbs
4046 * without having to re-enable interrupts. It's not called while
4047 * the interrupt routine is executing.
4048 */
4049static void e1000_netpoll(struct net_device *netdev)
4050{
4051 struct e1000_adapter *adapter = netdev_priv(netdev);
4052
4053 disable_irq(adapter->pdev->irq);
4054 e1000_intr(adapter->pdev->irq, netdev);
4055
bc7f75fa
AK		 4056 enable_irq(adapter->pdev->irq);
4057}
4058#endif
4059
4060/**
4061 * e1000_io_error_detected - called when PCI error is detected
4062 * @pdev: Pointer to PCI device
4063 * @state: The current pci connection state
4064 *
4065 * This function is called after a PCI bus error affecting
4066 * this device has been detected.
4067 */
4068static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4069 pci_channel_state_t state)
4070{
4071 struct net_device *netdev = pci_get_drvdata(pdev);
4072 struct e1000_adapter *adapter = netdev_priv(netdev);
4073
4074 netif_device_detach(netdev);
4075
4076 if (netif_running(netdev))
4077 e1000e_down(adapter);
4078 pci_disable_device(pdev);
4079
4080 /* Request a slot slot reset. */
4081 return PCI_ERS_RESULT_NEED_RESET;
4082}
4083
4084/**
4085 * e1000_io_slot_reset - called after the pci bus has been reset.
4086 * @pdev: Pointer to PCI device
4087 *
4088 * Restart the card from scratch, as if from a cold-boot. Implementation
4089 * resembles the first-half of the e1000_resume routine.
4090 */
4091static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4092{
4093 struct net_device *netdev = pci_get_drvdata(pdev);
4094 struct e1000_adapter *adapter = netdev_priv(netdev);
4095 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4096 int err;
bc7f75fa 4097
1eae4eb2 4098 e1000e_disable_l1aspm(pdev);
6e4f6f6b
TI		 4099 if (adapter->need_ioport)
4100 err = pci_enable_device(pdev);
4101 else
4102 err = pci_enable_device_mem(pdev);
4103 if (err) {
bc7f75fa
AK		 4104 dev_err(&pdev->dev,
4105 "Cannot re-enable PCI device after reset.\n");
4106 return PCI_ERS_RESULT_DISCONNECT;
4107 }
4108 pci_set_master(pdev);
aad32739 4109 pci_restore_state(pdev);
bc7f75fa
AK		 4110
4111 pci_enable_wake(pdev, PCI_D3hot, 0);
4112 pci_enable_wake(pdev, PCI_D3cold, 0);
4113
4114 e1000e_reset(adapter);
4115 ew32(WUS, ~0);
4116
4117 return PCI_ERS_RESULT_RECOVERED;
4118}
4119
4120/**
4121 * e1000_io_resume - called when traffic can start flowing again.
4122 * @pdev: Pointer to PCI device
4123 *
4124 * This callback is called when the error recovery driver tells us that
4125 * its OK to resume normal operation. Implementation resembles the
4126 * second-half of the e1000_resume routine.
4127 */
4128static void e1000_io_resume(struct pci_dev *pdev)
4129{
4130 struct net_device *netdev = pci_get_drvdata(pdev);
4131 struct e1000_adapter *adapter = netdev_priv(netdev);
4132
4133 e1000_init_manageability(adapter);
4134
4135 if (netif_running(netdev)) {
4136 if (e1000e_up(adapter)) {
4137 dev_err(&pdev->dev,
4138 "can't bring device back up after reset\n");
4139 return;
4140 }
4141 }
4142
4143 netif_device_attach(netdev);
4144
ad68076e
BA		 4145 /*
4146 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4147 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4148 * under the control of the driver.
4149 */
c43bc57e 4150 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4151 e1000_get_hw_control(adapter);
4152
4153}
4154
4155static void e1000_print_device_info(struct e1000_adapter *adapter)
4156{
4157 struct e1000_hw *hw = &adapter->hw;
4158 struct net_device *netdev = adapter->netdev;
69e3fd8c 4159 u32 pba_num;
bc7f75fa
AK		 4160
4161 /* print bus type/speed/width info */
44defeb3
JK		 4162 e_info("(PCI Express:2.5GB/s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
4163 /* bus width */
4164 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4165 "Width x1"),
4166 /* MAC address */
4167 netdev->dev_addr[0], netdev->dev_addr[1],
4168 netdev->dev_addr[2], netdev->dev_addr[3],
4169 netdev->dev_addr[4], netdev->dev_addr[5]);
4170 e_info("Intel(R) PRO/%s Network Connection\n",
4171 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4172 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4173 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4174 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4175}
4176
10aa4c04
AK		 4177static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4178{
4179 struct e1000_hw *hw = &adapter->hw;
4180 int ret_val;
4181 u16 buf = 0;
4182
4183 if (hw->mac.type != e1000_82573)
4184 return;
4185
4186 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
4187 if (!(le16_to_cpu(buf) & (1 << 0))) {
4188 /* Deep Smart Power Down (DSPD) */
4189 e_warn("Warning: detected DSPD enabled in EEPROM\n");
4190 }
4191
4192 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
4193 if (le16_to_cpu(buf) & (3 << 2)) {
4194 /* ASPM enable */
4195 e_warn("Warning: detected ASPM enabled in EEPROM\n");
4196 }
4197}
4198
6e4f6f6b
TI		 4199/**
4200 * e1000e_is_need_ioport - determine if an adapter needs ioport resources or not
4201 * @pdev: PCI device information struct
4202 *
4203 * Returns true if an adapters needs ioport resources
4204 **/
4205static int e1000e_is_need_ioport(struct pci_dev *pdev)
4206{
4207 switch (pdev->device) {
4208 /* Currently there are no adapters that need ioport resources */
4209 default:
4210 return false;
4211 }
4212}
4213
bc7f75fa
AK		 4214/**
4215 * e1000_probe - Device Initialization Routine
4216 * @pdev: PCI device information struct
4217 * @ent: entry in e1000_pci_tbl
4218 *
4219 * Returns 0 on success, negative on failure
4220 *
4221 * e1000_probe initializes an adapter identified by a pci_dev structure.
4222 * The OS initialization, configuring of the adapter private structure,
4223 * and a hardware reset occur.
4224 **/
4225static int __devinit e1000_probe(struct pci_dev *pdev,
4226 const struct pci_device_id *ent)
4227{
4228 struct net_device *netdev;
4229 struct e1000_adapter *adapter;
4230 struct e1000_hw *hw;
4231 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 4232 resource_size_t mmio_start, mmio_len;
4233 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 4234
4235 static int cards_found;
4236 int i, err, pci_using_dac;
4237 u16 eeprom_data = 0;
4238 u16 eeprom_apme_mask = E1000_EEPROM_APME;
6e4f6f6b 4239 int bars, need_ioport;
bc7f75fa 4240
1eae4eb2 4241 e1000e_disable_l1aspm(pdev);
6e4f6f6b
TI		 4242
4243 /* do not allocate ioport bars when not needed */
4244 need_ioport = e1000e_is_need_ioport(pdev);
4245 if (need_ioport) {
4246 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
4247 err = pci_enable_device(pdev);
4248 } else {
4249 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4250 err = pci_enable_device_mem(pdev);
4251 }
bc7f75fa
AK		 4252 if (err)
4253 return err;
4254
4255 pci_using_dac = 0;
4256 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
4257 if (!err) {
4258 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4259 if (!err)
4260 pci_using_dac = 1;
4261 } else {
4262 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4263 if (err) {
4264 err = pci_set_consistent_dma_mask(pdev,
4265 DMA_32BIT_MASK);
4266 if (err) {
4267 dev_err(&pdev->dev, "No usable DMA "
4268 "configuration, aborting\n");
4269 goto err_dma;
4270 }
4271 }
4272 }
4273
6e4f6f6b 4274 err = pci_request_selected_regions(pdev, bars, e1000e_driver_name);
bc7f75fa
AK		 4275 if (err)
4276 goto err_pci_reg;
4277
4278 pci_set_master(pdev);
aad32739 4279 pci_save_state(pdev);
bc7f75fa
AK		 4280
4281 err = -ENOMEM;
4282 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
4283 if (!netdev)
4284 goto err_alloc_etherdev;
4285
bc7f75fa
AK		 4286 SET_NETDEV_DEV(netdev, &pdev->dev);
4287
4288 pci_set_drvdata(pdev, netdev);
4289 adapter = netdev_priv(netdev);
4290 hw = &adapter->hw;
4291 adapter->netdev = netdev;
4292 adapter->pdev = pdev;
4293 adapter->ei = ei;
4294 adapter->pba = ei->pba;
4295 adapter->flags = ei->flags;
4296 adapter->hw.adapter = adapter;
4297 adapter->hw.mac.type = ei->mac;
4298 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
6e4f6f6b
TI		 4299 adapter->bars = bars;
4300 adapter->need_ioport = need_ioport;
bc7f75fa
AK		 4301
4302 mmio_start = pci_resource_start(pdev, 0);
4303 mmio_len = pci_resource_len(pdev, 0);
4304
4305 err = -EIO;
4306 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
4307 if (!adapter->hw.hw_addr)
4308 goto err_ioremap;
4309
4310 if ((adapter->flags & FLAG_HAS_FLASH) &&
4311 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
4312 flash_start = pci_resource_start(pdev, 1);
4313 flash_len = pci_resource_len(pdev, 1);
4314 adapter->hw.flash_address = ioremap(flash_start, flash_len);
4315 if (!adapter->hw.flash_address)
4316 goto err_flashmap;
4317 }
4318
4319 /* construct the net_device struct */
4320 netdev->open = &e1000_open;
4321 netdev->stop = &e1000_close;
4322 netdev->hard_start_xmit = &e1000_xmit_frame;
4323 netdev->get_stats = &e1000_get_stats;
4324 netdev->set_multicast_list = &e1000_set_multi;
4325 netdev->set_mac_address = &e1000_set_mac;
4326 netdev->change_mtu = &e1000_change_mtu;
4327 netdev->do_ioctl = &e1000_ioctl;
4328 e1000e_set_ethtool_ops(netdev);
4329 netdev->tx_timeout = &e1000_tx_timeout;
4330 netdev->watchdog_timeo = 5 * HZ;
4331 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
4332 netdev->vlan_rx_register = e1000_vlan_rx_register;
4333 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
4334 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
4335#ifdef CONFIG_NET_POLL_CONTROLLER
4336 netdev->poll_controller = e1000_netpoll;
4337#endif
4338 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
4339
4340 netdev->mem_start = mmio_start;
4341 netdev->mem_end = mmio_start + mmio_len;
4342
4343 adapter->bd_number = cards_found++;
4344
4345 /* setup adapter struct */
4346 err = e1000_sw_init(adapter);
4347 if (err)
4348 goto err_sw_init;
4349
4350 err = -EIO;
4351
4352 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
4353 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
4354 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
4355
69e3fd8c 4356 err = ei->get_variants(adapter);
bc7f75fa
AK		 4357 if (err)
4358 goto err_hw_init;
4359
4360 hw->mac.ops.get_bus_info(&adapter->hw);
4361
318a94d6 4362 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 4363
4364 /* Copper options */
318a94d6 4365 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 4366 adapter->hw.phy.mdix = AUTO_ALL_MODES;
4367 adapter->hw.phy.disable_polarity_correction = 0;
4368 adapter->hw.phy.ms_type = e1000_ms_hw_default;
4369 }
4370
4371 if (e1000_check_reset_block(&adapter->hw))
44defeb3 4372 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 4373
4374 netdev->features = NETIF_F_SG |
4375 NETIF_F_HW_CSUM |
4376 NETIF_F_HW_VLAN_TX |
4377 NETIF_F_HW_VLAN_RX;
4378
4379 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
4380 netdev->features |= NETIF_F_HW_VLAN_FILTER;
4381
4382 netdev->features |= NETIF_F_TSO;
4383 netdev->features |= NETIF_F_TSO6;
4384
a5136e23
JK		 4385 netdev->vlan_features |= NETIF_F_TSO;
4386 netdev->vlan_features |= NETIF_F_TSO6;
4387 netdev->vlan_features |= NETIF_F_HW_CSUM;
4388 netdev->vlan_features |= NETIF_F_SG;
4389
bc7f75fa
AK		 4390 if (pci_using_dac)
4391 netdev->features |= NETIF_F_HIGHDMA;
4392
ad68076e
BA		 4393 /*
4394 * We should not be using LLTX anymore, but we are still Tx faster with
4395 * it.
4396 */
bc7f75fa
AK		 4397 netdev->features |= NETIF_F_LLTX;
4398
4399 if (e1000e_enable_mng_pass_thru(&adapter->hw))
4400 adapter->flags |= FLAG_MNG_PT_ENABLED;
4401
ad68076e
BA		 4402 /*
4403 * before reading the NVM, reset the controller to
4404 * put the device in a known good starting state
4405 */
bc7f75fa
AK		 4406 adapter->hw.mac.ops.reset_hw(&adapter->hw);
4407
4408 /*
4409 * systems with ASPM and others may see the checksum fail on the first
4410 * attempt. Let's give it a few tries
4411 */
4412 for (i = 0;; i++) {
4413 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
4414 break;
4415 if (i == 2) {
44defeb3 4416 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 4417 err = -EIO;
4418 goto err_eeprom;
4419 }
4420 }
4421
10aa4c04
AK		 4422 e1000_eeprom_checks(adapter);
4423
bc7f75fa
AK		 4424 /* copy the MAC address out of the NVM */
4425 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 4426 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 4427
4428 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
4429 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
4430
4431 if (!is_valid_ether_addr(netdev->perm_addr)) {
44defeb3
JK		 4432 e_err("Invalid MAC Address: %02x:%02x:%02x:%02x:%02x:%02x\n",
4433 netdev->perm_addr[0], netdev->perm_addr[1],
4434 netdev->perm_addr[2], netdev->perm_addr[3],
4435 netdev->perm_addr[4], netdev->perm_addr[5]);
bc7f75fa
AK		 4436 err = -EIO;
4437 goto err_eeprom;
4438 }
4439
4440 init_timer(&adapter->watchdog_timer);
4441 adapter->watchdog_timer.function = &e1000_watchdog;
4442 adapter->watchdog_timer.data = (unsigned long) adapter;
4443
4444 init_timer(&adapter->phy_info_timer);
4445 adapter->phy_info_timer.function = &e1000_update_phy_info;
4446 adapter->phy_info_timer.data = (unsigned long) adapter;
4447
4448 INIT_WORK(&adapter->reset_task, e1000_reset_task);
4449 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
4450
4451 e1000e_check_options(adapter);
4452
4453 /* Initialize link parameters. User can change them with ethtool */
4454 adapter->hw.mac.autoneg = 1;
309af40b 4455 adapter->fc_autoneg = 1;
318a94d6
JK		 4456 adapter->hw.fc.original_type = e1000_fc_default;
4457 adapter->hw.fc.type = e1000_fc_default;
bc7f75fa
AK		 4458 adapter->hw.phy.autoneg_advertised = 0x2f;
4459
4460 /* ring size defaults */
4461 adapter->rx_ring->count = 256;
4462 adapter->tx_ring->count = 256;
4463
4464 /*
4465 * Initial Wake on LAN setting - If APM wake is enabled in
4466 * the EEPROM, enable the ACPI Magic Packet filter
4467 */
4468 if (adapter->flags & FLAG_APME_IN_WUC) {
4469 /* APME bit in EEPROM is mapped to WUC.APME */
4470 eeprom_data = er32(WUC);
4471 eeprom_apme_mask = E1000_WUC_APME;
4472 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
4473 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
4474 (adapter->hw.bus.func == 1))
4475 e1000_read_nvm(&adapter->hw,
4476 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
4477 else
4478 e1000_read_nvm(&adapter->hw,
4479 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
4480 }
4481
4482 /* fetch WoL from EEPROM */
4483 if (eeprom_data & eeprom_apme_mask)
4484 adapter->eeprom_wol |= E1000_WUFC_MAG;
4485
4486 /*
4487 * now that we have the eeprom settings, apply the special cases
4488 * where the eeprom may be wrong or the board simply won't support
4489 * wake on lan on a particular port
4490 */
4491 if (!(adapter->flags & FLAG_HAS_WOL))
4492 adapter->eeprom_wol = 0;
4493
4494 /* initialize the wol settings based on the eeprom settings */
4495 adapter->wol = adapter->eeprom_wol;
4496
4497 /* reset the hardware with the new settings */
4498 e1000e_reset(adapter);
4499
ad68076e
BA		 4500 /*
4501 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4502 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4503 * under the control of the driver.
4504 */
c43bc57e 4505 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4506 e1000_get_hw_control(adapter);
4507
4508 /* tell the stack to leave us alone until e1000_open() is called */
4509 netif_carrier_off(netdev);
d55b53ff 4510 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK		 4511
4512 strcpy(netdev->name, "eth%d");
4513 err = register_netdev(netdev);
4514 if (err)
4515 goto err_register;
4516
4517 e1000_print_device_info(adapter);
4518
4519 return 0;
4520
4521err_register:
c43bc57e
JB		 4522 if (!(adapter->flags & FLAG_HAS_AMT))
4523 e1000_release_hw_control(adapter);
bc7f75fa
AK		 4524err_eeprom:
4525 if (!e1000_check_reset_block(&adapter->hw))
4526 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 4527err_hw_init:
bc7f75fa 4528
bc7f75fa
AK		 4529 kfree(adapter->tx_ring);
4530 kfree(adapter->rx_ring);
4531err_sw_init:
c43bc57e
JB		 4532 if (adapter->hw.flash_address)
4533 iounmap(adapter->hw.flash_address);
4534err_flashmap:
bc7f75fa
AK		 4535 iounmap(adapter->hw.hw_addr);
4536err_ioremap:
4537 free_netdev(netdev);
4538err_alloc_etherdev:
6e4f6f6b 4539 pci_release_selected_regions(pdev, bars);
bc7f75fa
AK		 4540err_pci_reg:
4541err_dma:
4542 pci_disable_device(pdev);
4543 return err;
4544}
4545
4546/**
4547 * e1000_remove - Device Removal Routine
4548 * @pdev: PCI device information struct
4549 *
4550 * e1000_remove is called by the PCI subsystem to alert the driver
4551 * that it should release a PCI device. The could be caused by a
4552 * Hot-Plug event, or because the driver is going to be removed from
4553 * memory.
4554 **/
4555static void __devexit e1000_remove(struct pci_dev *pdev)
4556{
4557 struct net_device *netdev = pci_get_drvdata(pdev);
4558 struct e1000_adapter *adapter = netdev_priv(netdev);
4559
ad68076e
BA		 4560 /*
4561 * flush_scheduled work may reschedule our watchdog task, so
4562 * explicitly disable watchdog tasks from being rescheduled
4563 */
bc7f75fa
AK		 4564 set_bit(__E1000_DOWN, &adapter->state);
4565 del_timer_sync(&adapter->watchdog_timer);
4566 del_timer_sync(&adapter->phy_info_timer);
4567
4568 flush_scheduled_work();
4569
ad68076e
BA		 4570 /*
4571 * Release control of h/w to f/w. If f/w is AMT enabled, this
4572 * would have already happened in close and is redundant.
4573 */
bc7f75fa
AK		 4574 e1000_release_hw_control(adapter);
4575
4576 unregister_netdev(netdev);
4577
4578 if (!e1000_check_reset_block(&adapter->hw))
4579 e1000_phy_hw_reset(&adapter->hw);
4580
4581 kfree(adapter->tx_ring);
4582 kfree(adapter->rx_ring);
4583
4584 iounmap(adapter->hw.hw_addr);
4585 if (adapter->hw.flash_address)
4586 iounmap(adapter->hw.flash_address);
6e4f6f6b 4587 pci_release_selected_regions(pdev, adapter->bars);
bc7f75fa
AK		 4588
4589 free_netdev(netdev);
4590
4591 pci_disable_device(pdev);
4592}
4593
4594/* PCI Error Recovery (ERS) */
4595static struct pci_error_handlers e1000_err_handler = {
4596 .error_detected = e1000_io_error_detected,
4597 .slot_reset = e1000_io_slot_reset,
4598 .resume = e1000_io_resume,
4599};
4600
4601static struct pci_device_id e1000_pci_tbl[] = {
bc7f75fa
AK		 4602 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
4603 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
4604 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
4605 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
4606 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
4607 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 4608 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
4609 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
4610 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 4611
bc7f75fa
AK		 4612 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
4613 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
4614 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
4615 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 4616
bc7f75fa
AK		 4617 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
4618 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
4619 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 4620
bc7f75fa
AK		 4621 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
4622 board_80003es2lan },
4623 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
4624 board_80003es2lan },
4625 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
4626 board_80003es2lan },
4627 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
4628 board_80003es2lan },
ad68076e 4629
bc7f75fa
AK		 4630 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
4631 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
4632 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
4633 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
4634 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
4635 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
4636 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
ad68076e 4637
bc7f75fa
AK		 4638 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
4639 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
4640 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
4641 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
4642 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
97ac8cae
BA		 4643 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
4644 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
4645 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
4646
4647 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
4648 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
4649 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa
AK		 4650
4651 { } /* terminate list */
4652};
4653MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
4654
4655/* PCI Device API Driver */
4656static struct pci_driver e1000_driver = {
4657 .name = e1000e_driver_name,
4658 .id_table = e1000_pci_tbl,
4659 .probe = e1000_probe,
4660 .remove = __devexit_p(e1000_remove),
4661#ifdef CONFIG_PM
ad68076e 4662 /* Power Management Hooks */
bc7f75fa
AK		 4663 .suspend = e1000_suspend,
4664 .resume = e1000_resume,
4665#endif
4666 .shutdown = e1000_shutdown,
4667 .err_handler = &e1000_err_handler
4668};
4669
4670/**
4671 * e1000_init_module - Driver Registration Routine
4672 *
4673 * e1000_init_module is the first routine called when the driver is
4674 * loaded. All it does is register with the PCI subsystem.
4675 **/
4676static int __init e1000_init_module(void)
4677{
4678 int ret;
4679 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
4680 e1000e_driver_name, e1000e_driver_version);
ad68076e 4681 printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n",
bc7f75fa
AK		 4682 e1000e_driver_name);
4683 ret = pci_register_driver(&e1000_driver);
97ac8cae
BA		 4684 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name,
4685 PM_QOS_DEFAULT_VALUE);
4686
bc7f75fa
AK		 4687 return ret;
4688}
4689module_init(e1000_init_module);
4690
4691/**
4692 * e1000_exit_module - Driver Exit Cleanup Routine
4693 *
4694 * e1000_exit_module is called just before the driver is removed
4695 * from memory.
4696 **/
4697static void __exit e1000_exit_module(void)
4698{
4699 pci_unregister_driver(&e1000_driver);
97ac8cae 4700 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name);
bc7f75fa
AK		 4701}
4702module_exit(e1000_exit_module);
4703
4704
4705MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
4706MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
4707MODULE_LICENSE("GPL");
4708MODULE_VERSION(DRV_VERSION);
4709
4710/* e1000_main.c */
Clone of davem's net-next-2.6 tree