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e1000e: register pm_qos request on hardware activation
[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
451152d9 4 Copyright(c) 1999 - 2010 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
c14c643b
BA		 55#define DRV_EXTRAVERSION "-k2"
56
57#define DRV_VERSION "1.2.7" DRV_EXTRAVERSION
bc7f75fa
AK		 58char e1000e_driver_name[] = "e1000e";
59const char e1000e_driver_version[] = DRV_VERSION;
60
61static const struct e1000_info *e1000_info_tbl[] = {
62 [board_82571] = &e1000_82571_info,
63 [board_82572] = &e1000_82572_info,
64 [board_82573] = &e1000_82573_info,
4662e82b 65 [board_82574] = &e1000_82574_info,
8c81c9c3 66 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 67 [board_80003es2lan] = &e1000_es2_info,
68 [board_ich8lan] = &e1000_ich8_info,
69 [board_ich9lan] = &e1000_ich9_info,
f4187b56 70 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 71 [board_pchlan] = &e1000_pch_info,
d3738bb8 72 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 73};
74
84f4ee90
TI		 75struct e1000_reg_info {
76 u32 ofs;
77 char *name;
78};
79
80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
85
86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
91
92static const struct e1000_reg_info e1000_reg_info_tbl[] = {
93
94 /* General Registers */
95 {E1000_CTRL, "CTRL"},
96 {E1000_STATUS, "STATUS"},
97 {E1000_CTRL_EXT, "CTRL_EXT"},
98
99 /* Interrupt Registers */
100 {E1000_ICR, "ICR"},
101
102 /* RX Registers */
103 {E1000_RCTL, "RCTL"},
104 {E1000_RDLEN, "RDLEN"},
105 {E1000_RDH, "RDH"},
106 {E1000_RDT, "RDT"},
107 {E1000_RDTR, "RDTR"},
108 {E1000_RXDCTL(0), "RXDCTL"},
109 {E1000_ERT, "ERT"},
110 {E1000_RDBAL, "RDBAL"},
111 {E1000_RDBAH, "RDBAH"},
112 {E1000_RDFH, "RDFH"},
113 {E1000_RDFT, "RDFT"},
114 {E1000_RDFHS, "RDFHS"},
115 {E1000_RDFTS, "RDFTS"},
116 {E1000_RDFPC, "RDFPC"},
117
118 /* TX Registers */
119 {E1000_TCTL, "TCTL"},
120 {E1000_TDBAL, "TDBAL"},
121 {E1000_TDBAH, "TDBAH"},
122 {E1000_TDLEN, "TDLEN"},
123 {E1000_TDH, "TDH"},
124 {E1000_TDT, "TDT"},
125 {E1000_TIDV, "TIDV"},
126 {E1000_TXDCTL(0), "TXDCTL"},
127 {E1000_TADV, "TADV"},
128 {E1000_TARC(0), "TARC"},
129 {E1000_TDFH, "TDFH"},
130 {E1000_TDFT, "TDFT"},
131 {E1000_TDFHS, "TDFHS"},
132 {E1000_TDFTS, "TDFTS"},
133 {E1000_TDFPC, "TDFPC"},
134
135 /* List Terminator */
136 {}
137};
138
139/*
140 * e1000_regdump - register printout routine
141 */
142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
143{
144 int n = 0;
145 char rname[16];
146 u32 regs[8];
147
148 switch (reginfo->ofs) {
149 case E1000_RXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_RXDCTL(n));
152 break;
153 case E1000_TXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TXDCTL(n));
156 break;
157 case E1000_TARC(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TARC(n));
160 break;
161 default:
162 printk(KERN_INFO "%-15s %08x\n",
163 reginfo->name, __er32(hw, reginfo->ofs));
164 return;
165 }
166
167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
168 printk(KERN_INFO "%-15s ", rname);
169 for (n = 0; n < 2; n++)
170 printk(KERN_CONT "%08x ", regs[n]);
171 printk(KERN_CONT "\n");
172}
173
174
175/*
176 * e1000e_dump - Print registers, tx-ring and rx-ring
177 */
178static void e1000e_dump(struct e1000_adapter *adapter)
179{
180 struct net_device *netdev = adapter->netdev;
181 struct e1000_hw *hw = &adapter->hw;
182 struct e1000_reg_info *reginfo;
183 struct e1000_ring *tx_ring = adapter->tx_ring;
184 struct e1000_tx_desc *tx_desc;
185 struct my_u0 { u64 a; u64 b; } *u0;
186 struct e1000_buffer *buffer_info;
187 struct e1000_ring *rx_ring = adapter->rx_ring;
188 union e1000_rx_desc_packet_split *rx_desc_ps;
189 struct e1000_rx_desc *rx_desc;
190 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
191 u32 staterr;
192 int i = 0;
193
194 if (!netif_msg_hw(adapter))
195 return;
196
197 /* Print netdevice Info */
198 if (netdev) {
199 dev_info(&adapter->pdev->dev, "Net device Info\n");
200 printk(KERN_INFO "Device Name state "
201 "trans_start last_rx\n");
202 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
203 netdev->name,
204 netdev->state,
205 netdev->trans_start,
206 netdev->last_rx);
207 }
208
209 /* Print Registers */
210 dev_info(&adapter->pdev->dev, "Register Dump\n");
211 printk(KERN_INFO " Register Name Value\n");
212 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
213 reginfo->name; reginfo++) {
214 e1000_regdump(hw, reginfo);
215 }
216
217 /* Print TX Ring Summary */
218 if (!netdev || !netif_running(netdev))
219 goto exit;
220
221 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
222 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
223 " leng ntw timestamp\n");
224 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
225 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
226 0, tx_ring->next_to_use, tx_ring->next_to_clean,
8eb64e6b 227 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 228 buffer_info->length,
229 buffer_info->next_to_watch,
8eb64e6b 230 (unsigned long long)buffer_info->time_stamp);
84f4ee90
TI		 231
232 /* Print TX Rings */
233 if (!netif_msg_tx_done(adapter))
234 goto rx_ring_summary;
235
236 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
237
238 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
239 *
240 * Legacy Transmit Descriptor
241 * +--------------------------------------------------------------+
242 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
243 * +--------------------------------------------------------------+
244 * 8 | Special | CSS | Status | CMD | CSO | Length |
245 * +--------------------------------------------------------------+
246 * 63 48 47 36 35 32 31 24 23 16 15 0
247 *
248 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
249 * 63 48 47 40 39 32 31 16 15 8 7 0
250 * +----------------------------------------------------------------+
251 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
252 * +----------------------------------------------------------------+
253 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
254 * +----------------------------------------------------------------+
255 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
256 *
257 * Extended Data Descriptor (DTYP=0x1)
258 * +----------------------------------------------------------------+
259 * 0 | Buffer Address [63:0] |
260 * +----------------------------------------------------------------+
261 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
262 * +----------------------------------------------------------------+
263 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
264 */
265 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Legacy format\n");
268 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Context format\n");
271 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
272 " [bi->dma ] leng ntw timestamp bi->skb "
273 "<-- Ext Data format\n");
274 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
275 tx_desc = E1000_TX_DESC(*tx_ring, i);
276 buffer_info = &tx_ring->buffer_info[i];
277 u0 = (struct my_u0 *)tx_desc;
278 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
279 "%04X %3X %016llX %p",
280 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
281 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
8eb64e6b
BA		 282 (unsigned long long)le64_to_cpu(u0->a),
283 (unsigned long long)le64_to_cpu(u0->b),
284 (unsigned long long)buffer_info->dma,
285 buffer_info->length, buffer_info->next_to_watch,
286 (unsigned long long)buffer_info->time_stamp,
84f4ee90
TI		 287 buffer_info->skb);
288 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
289 printk(KERN_CONT " NTC/U\n");
290 else if (i == tx_ring->next_to_use)
291 printk(KERN_CONT " NTU\n");
292 else if (i == tx_ring->next_to_clean)
293 printk(KERN_CONT " NTC\n");
294 else
295 printk(KERN_CONT "\n");
296
297 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
298 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
299 16, 1, phys_to_virt(buffer_info->dma),
300 buffer_info->length, true);
301 }
302
303 /* Print RX Rings Summary */
304rx_ring_summary:
305 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
306 printk(KERN_INFO "Queue [NTU] [NTC]\n");
307 printk(KERN_INFO " %5d %5X %5X\n", 0,
308 rx_ring->next_to_use, rx_ring->next_to_clean);
309
310 /* Print RX Rings */
311 if (!netif_msg_rx_status(adapter))
312 goto exit;
313
314 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
315 switch (adapter->rx_ps_pages) {
316 case 1:
317 case 2:
318 case 3:
319 /* [Extended] Packet Split Receive Descriptor Format
320 *
321 * +-----------------------------------------------------+
322 * 0 | Buffer Address 0 [63:0] |
323 * +-----------------------------------------------------+
324 * 8 | Buffer Address 1 [63:0] |
325 * +-----------------------------------------------------+
326 * 16 | Buffer Address 2 [63:0] |
327 * +-----------------------------------------------------+
328 * 24 | Buffer Address 3 [63:0] |
329 * +-----------------------------------------------------+
330 */
331 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
332 "[buffer 1 63:0 ] "
333 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
334 "[bi->skb] <-- Ext Pkt Split format\n");
335 /* [Extended] Receive Descriptor (Write-Back) Format
336 *
337 * 63 48 47 32 31 13 12 8 7 4 3 0
338 * +------------------------------------------------------+
339 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
340 * | Checksum | Ident | | Queue | | Type |
341 * +------------------------------------------------------+
342 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
343 * +------------------------------------------------------+
344 * 63 48 47 32 31 20 19 0
345 */
346 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
347 "[vl l0 ee es] "
348 "[ l3 l2 l1 hs] [reserved ] ---------------- "
349 "[bi->skb] <-- Ext Rx Write-Back format\n");
350 for (i = 0; i < rx_ring->count; i++) {
351 buffer_info = &rx_ring->buffer_info[i];
352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
353 u1 = (struct my_u1 *)rx_desc_ps;
354 staterr =
355 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
356 if (staterr & E1000_RXD_STAT_DD) {
357 /* Descriptor Done */
358 printk(KERN_INFO "RWB[0x%03X] %016llX "
359 "%016llX %016llX %016llX "
360 "---------------- %p", i,
8eb64e6b
BA		 361 (unsigned long long)le64_to_cpu(u1->a),
362 (unsigned long long)le64_to_cpu(u1->b),
363 (unsigned long long)le64_to_cpu(u1->c),
364 (unsigned long long)le64_to_cpu(u1->d),
84f4ee90
TI		 365 buffer_info->skb);
366 } else {
367 printk(KERN_INFO "R [0x%03X] %016llX "
368 "%016llX %016llX %016llX %016llX %p", i,
8eb64e6b
BA		 369 (unsigned long long)le64_to_cpu(u1->a),
370 (unsigned long long)le64_to_cpu(u1->b),
371 (unsigned long long)le64_to_cpu(u1->c),
372 (unsigned long long)le64_to_cpu(u1->d),
373 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 374 buffer_info->skb);
375
376 if (netif_msg_pktdata(adapter))
377 print_hex_dump(KERN_INFO, "",
378 DUMP_PREFIX_ADDRESS, 16, 1,
379 phys_to_virt(buffer_info->dma),
380 adapter->rx_ps_bsize0, true);
381 }
382
383 if (i == rx_ring->next_to_use)
384 printk(KERN_CONT " NTU\n");
385 else if (i == rx_ring->next_to_clean)
386 printk(KERN_CONT " NTC\n");
387 else
388 printk(KERN_CONT "\n");
389 }
390 break;
391 default:
392 case 0:
393 /* Legacy Receive Descriptor Format
394 *
395 * +-----------------------------------------------------+
396 * | Buffer Address [63:0] |
397 * +-----------------------------------------------------+
398 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
399 * +-----------------------------------------------------+
400 * 63 48 47 40 39 32 31 16 15 0
401 */
402 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
403 "[vl er S cks ln] [bi->dma ] [bi->skb] "
404 "<-- Legacy format\n");
405 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
406 rx_desc = E1000_RX_DESC(*rx_ring, i);
407 buffer_info = &rx_ring->buffer_info[i];
408 u0 = (struct my_u0 *)rx_desc;
409 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
8eb64e6b
BA		 410 "%016llX %p", i,
411 (unsigned long long)le64_to_cpu(u0->a),
412 (unsigned long long)le64_to_cpu(u0->b),
413 (unsigned long long)buffer_info->dma,
414 buffer_info->skb);
84f4ee90
TI		 415 if (i == rx_ring->next_to_use)
416 printk(KERN_CONT " NTU\n");
417 else if (i == rx_ring->next_to_clean)
418 printk(KERN_CONT " NTC\n");
419 else
420 printk(KERN_CONT "\n");
421
422 if (netif_msg_pktdata(adapter))
423 print_hex_dump(KERN_INFO, "",
424 DUMP_PREFIX_ADDRESS,
425 16, 1, phys_to_virt(buffer_info->dma),
426 adapter->rx_buffer_len, true);
427 }
428 }
429
430exit:
431 return;
432}
433
bc7f75fa
AK		 434/**
435 * e1000_desc_unused - calculate if we have unused descriptors
436 **/
437static int e1000_desc_unused(struct e1000_ring *ring)
438{
439 if (ring->next_to_clean > ring->next_to_use)
440 return ring->next_to_clean - ring->next_to_use - 1;
441
442 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
443}
444
445/**
ad68076e 446 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 447 * @adapter: board private structure
448 * @status: descriptor status field as written by hardware
449 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
450 * @skb: pointer to sk_buff to be indicated to stack
451 **/
452static void e1000_receive_skb(struct e1000_adapter *adapter,
453 struct net_device *netdev,
454 struct sk_buff *skb,
a39fe742 455 u8 status, __le16 vlan)
bc7f75fa
AK		 456{
457 skb->protocol = eth_type_trans(skb, netdev);
458
459 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 460 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
461 le16_to_cpu(vlan), skb);
bc7f75fa 462 else
89c88b16 463 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 464}
465
466/**
467 * e1000_rx_checksum - Receive Checksum Offload for 82543
468 * @adapter: board private structure
469 * @status_err: receive descriptor status and error fields
470 * @csum: receive descriptor csum field
471 * @sk_buff: socket buffer with received data
472 **/
473static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
474 u32 csum, struct sk_buff *skb)
475{
476 u16 status = (u16)status_err;
477 u8 errors = (u8)(status_err >> 24);
478 skb->ip_summed = CHECKSUM_NONE;
479
480 /* Ignore Checksum bit is set */
481 if (status & E1000_RXD_STAT_IXSM)
482 return;
483 /* TCP/UDP checksum error bit is set */
484 if (errors & E1000_RXD_ERR_TCPE) {
485 /* let the stack verify checksum errors */
486 adapter->hw_csum_err++;
487 return;
488 }
489
490 /* TCP/UDP Checksum has not been calculated */
491 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
492 return;
493
494 /* It must be a TCP or UDP packet with a valid checksum */
495 if (status & E1000_RXD_STAT_TCPCS) {
496 /* TCP checksum is good */
497 skb->ip_summed = CHECKSUM_UNNECESSARY;
498 } else {
ad68076e
BA		 499 /*
500 * IP fragment with UDP payload
501 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 502 * and then put the value in host order for further stack use.
503 */
a39fe742
AV		 504 __sum16 sum = (__force __sum16)htons(csum);
505 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 506 skb->ip_summed = CHECKSUM_COMPLETE;
507 }
508 adapter->hw_csum_good++;
509}
510
511/**
512 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
513 * @adapter: address of board private structure
514 **/
515static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
516 int cleaned_count)
517{
518 struct net_device *netdev = adapter->netdev;
519 struct pci_dev *pdev = adapter->pdev;
520 struct e1000_ring *rx_ring = adapter->rx_ring;
521 struct e1000_rx_desc *rx_desc;
522 struct e1000_buffer *buffer_info;
523 struct sk_buff *skb;
524 unsigned int i;
89d71a66 525 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 526
527 i = rx_ring->next_to_use;
528 buffer_info = &rx_ring->buffer_info[i];
529
530 while (cleaned_count--) {
531 skb = buffer_info->skb;
532 if (skb) {
533 skb_trim(skb, 0);
534 goto map_skb;
535 }
536
89d71a66 537 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 538 if (!skb) {
539 /* Better luck next round */
540 adapter->alloc_rx_buff_failed++;
541 break;
542 }
543
bc7f75fa
AK		 544 buffer_info->skb = skb;
545map_skb:
0be3f55f 546 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 547 adapter->rx_buffer_len,
0be3f55f
NN		 548 DMA_FROM_DEVICE);
549 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 550 dev_err(&pdev->dev, "RX DMA map failed\n");
551 adapter->rx_dma_failed++;
552 break;
553 }
554
555 rx_desc = E1000_RX_DESC(*rx_ring, i);
556 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
557
50849d79
TH		 558 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
559 /*
560 * Force memory writes to complete before letting h/w
561 * know there are new descriptors to fetch. (Only
562 * applicable for weak-ordered memory model archs,
563 * such as IA-64).
564 */
565 wmb();
566 writel(i, adapter->hw.hw_addr + rx_ring->tail);
567 }
bc7f75fa
AK		 568 i++;
569 if (i == rx_ring->count)
570 i = 0;
571 buffer_info = &rx_ring->buffer_info[i];
572 }
573
50849d79 574 rx_ring->next_to_use = i;
bc7f75fa
AK		 575}
576
577/**
578 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
579 * @adapter: address of board private structure
580 **/
581static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
582 int cleaned_count)
583{
584 struct net_device *netdev = adapter->netdev;
585 struct pci_dev *pdev = adapter->pdev;
586 union e1000_rx_desc_packet_split *rx_desc;
587 struct e1000_ring *rx_ring = adapter->rx_ring;
588 struct e1000_buffer *buffer_info;
589 struct e1000_ps_page *ps_page;
590 struct sk_buff *skb;
591 unsigned int i, j;
592
593 i = rx_ring->next_to_use;
594 buffer_info = &rx_ring->buffer_info[i];
595
596 while (cleaned_count--) {
597 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
598
599 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 600 ps_page = &buffer_info->ps_pages[j];
601 if (j >= adapter->rx_ps_pages) {
602 /* all unused desc entries get hw null ptr */
a39fe742 603 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 604 continue;
605 }
606 if (!ps_page->page) {
607 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 608 if (!ps_page->page) {
47f44e40
AK		 609 adapter->alloc_rx_buff_failed++;
610 goto no_buffers;
611 }
0be3f55f
NN		 612 ps_page->dma = dma_map_page(&pdev->dev,
613 ps_page->page,
614 0, PAGE_SIZE,
615 DMA_FROM_DEVICE);
616 if (dma_mapping_error(&pdev->dev,
617 ps_page->dma)) {
47f44e40
AK		 618 dev_err(&adapter->pdev->dev,
619 "RX DMA page map failed\n");
620 adapter->rx_dma_failed++;
621 goto no_buffers;
bc7f75fa 622 }
bc7f75fa 623 }
47f44e40
AK		 624 /*
625 * Refresh the desc even if buffer_addrs
626 * didn't change because each write-back
627 * erases this info.
628 */
629 rx_desc->read.buffer_addr[j+1] =
630 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 631 }
632
89d71a66
ED		 633 skb = netdev_alloc_skb_ip_align(netdev,
634 adapter->rx_ps_bsize0);
bc7f75fa
AK		 635
636 if (!skb) {
637 adapter->alloc_rx_buff_failed++;
638 break;
639 }
640
bc7f75fa 641 buffer_info->skb = skb;
0be3f55f 642 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 643 adapter->rx_ps_bsize0,
0be3f55f
NN		 644 DMA_FROM_DEVICE);
645 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 646 dev_err(&pdev->dev, "RX DMA map failed\n");
647 adapter->rx_dma_failed++;
648 /* cleanup skb */
649 dev_kfree_skb_any(skb);
650 buffer_info->skb = NULL;
651 break;
652 }
653
654 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
655
50849d79
TH		 656 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
657 /*
658 * Force memory writes to complete before letting h/w
659 * know there are new descriptors to fetch. (Only
660 * applicable for weak-ordered memory model archs,
661 * such as IA-64).
662 */
663 wmb();
664 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
665 }
666
bc7f75fa
AK		 667 i++;
668 if (i == rx_ring->count)
669 i = 0;
670 buffer_info = &rx_ring->buffer_info[i];
671 }
672
673no_buffers:
50849d79 674 rx_ring->next_to_use = i;
bc7f75fa
AK		 675}
676
97ac8cae
BA		 677/**
678 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
679 * @adapter: address of board private structure
97ac8cae
BA		 680 * @cleaned_count: number of buffers to allocate this pass
681 **/
682
683static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
684 int cleaned_count)
685{
686 struct net_device *netdev = adapter->netdev;
687 struct pci_dev *pdev = adapter->pdev;
688 struct e1000_rx_desc *rx_desc;
689 struct e1000_ring *rx_ring = adapter->rx_ring;
690 struct e1000_buffer *buffer_info;
691 struct sk_buff *skb;
692 unsigned int i;
89d71a66 693 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 694
695 i = rx_ring->next_to_use;
696 buffer_info = &rx_ring->buffer_info[i];
697
698 while (cleaned_count--) {
699 skb = buffer_info->skb;
700 if (skb) {
701 skb_trim(skb, 0);
702 goto check_page;
703 }
704
89d71a66 705 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 706 if (unlikely(!skb)) {
707 /* Better luck next round */
708 adapter->alloc_rx_buff_failed++;
709 break;
710 }
711
97ac8cae
BA		 712 buffer_info->skb = skb;
713check_page:
714 /* allocate a new page if necessary */
715 if (!buffer_info->page) {
716 buffer_info->page = alloc_page(GFP_ATOMIC);
717 if (unlikely(!buffer_info->page)) {
718 adapter->alloc_rx_buff_failed++;
719 break;
720 }
721 }
722
723 if (!buffer_info->dma)
0be3f55f 724 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 725 buffer_info->page, 0,
726 PAGE_SIZE,
0be3f55f 727 DMA_FROM_DEVICE);
97ac8cae
BA		 728
729 rx_desc = E1000_RX_DESC(*rx_ring, i);
730 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
731
732 if (unlikely(++i == rx_ring->count))
733 i = 0;
734 buffer_info = &rx_ring->buffer_info[i];
735 }
736
737 if (likely(rx_ring->next_to_use != i)) {
738 rx_ring->next_to_use = i;
739 if (unlikely(i-- == 0))
740 i = (rx_ring->count - 1);
741
742 /* Force memory writes to complete before letting h/w
743 * know there are new descriptors to fetch. (Only
744 * applicable for weak-ordered memory model archs,
745 * such as IA-64). */
746 wmb();
747 writel(i, adapter->hw.hw_addr + rx_ring->tail);
748 }
749}
750
bc7f75fa
AK		 751/**
752 * e1000_clean_rx_irq - Send received data up the network stack; legacy
753 * @adapter: board private structure
754 *
755 * the return value indicates whether actual cleaning was done, there
756 * is no guarantee that everything was cleaned
757 **/
758static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
759 int *work_done, int work_to_do)
760{
761 struct net_device *netdev = adapter->netdev;
762 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 763 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 764 struct e1000_ring *rx_ring = adapter->rx_ring;
765 struct e1000_rx_desc *rx_desc, *next_rxd;
766 struct e1000_buffer *buffer_info, *next_buffer;
767 u32 length;
768 unsigned int i;
769 int cleaned_count = 0;
770 bool cleaned = 0;
771 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
772
773 i = rx_ring->next_to_clean;
774 rx_desc = E1000_RX_DESC(*rx_ring, i);
775 buffer_info = &rx_ring->buffer_info[i];
776
777 while (rx_desc->status & E1000_RXD_STAT_DD) {
778 struct sk_buff *skb;
779 u8 status;
780
781 if (*work_done >= work_to_do)
782 break;
783 (*work_done)++;
784
785 status = rx_desc->status;
786 skb = buffer_info->skb;
787 buffer_info->skb = NULL;
788
789 prefetch(skb->data - NET_IP_ALIGN);
790
791 i++;
792 if (i == rx_ring->count)
793 i = 0;
794 next_rxd = E1000_RX_DESC(*rx_ring, i);
795 prefetch(next_rxd);
796
797 next_buffer = &rx_ring->buffer_info[i];
798
799 cleaned = 1;
800 cleaned_count++;
0be3f55f 801 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 802 buffer_info->dma,
803 adapter->rx_buffer_len,
0be3f55f 804 DMA_FROM_DEVICE);
bc7f75fa
AK		 805 buffer_info->dma = 0;
806
807 length = le16_to_cpu(rx_desc->length);
808
b94b5028
JB		 809 /*
810 * !EOP means multiple descriptors were used to store a single
811 * packet, if that's the case we need to toss it. In fact, we
812 * need to toss every packet with the EOP bit clear and the
813 * next frame that _does_ have the EOP bit set, as it is by
814 * definition only a frame fragment
815 */
816 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
817 adapter->flags2 |= FLAG2_IS_DISCARDING;
818
819 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 820 /* All receives must fit into a single buffer */
3bb99fe2 821 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 822 /* recycle */
823 buffer_info->skb = skb;
b94b5028
JB		 824 if (status & E1000_RXD_STAT_EOP)
825 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 826 goto next_desc;
827 }
828
829 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
830 /* recycle */
831 buffer_info->skb = skb;
832 goto next_desc;
833 }
834
eb7c3adb
JK		 835 /* adjust length to remove Ethernet CRC */
836 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
837 length -= 4;
838
bc7f75fa
AK		 839 total_rx_bytes += length;
840 total_rx_packets++;
841
ad68076e
BA		 842 /*
843 * code added for copybreak, this should improve
bc7f75fa 844 * performance for small packets with large amounts
ad68076e
BA		 845 * of reassembly being done in the stack
846 */
bc7f75fa
AK		 847 if (length < copybreak) {
848 struct sk_buff *new_skb =
89d71a66 849 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 850 if (new_skb) {
808ff676
BA		 851 skb_copy_to_linear_data_offset(new_skb,
852 -NET_IP_ALIGN,
853 (skb->data -
854 NET_IP_ALIGN),
855 (length +
856 NET_IP_ALIGN));
bc7f75fa
AK		 857 /* save the skb in buffer_info as good */
858 buffer_info->skb = skb;
859 skb = new_skb;
860 }
861 /* else just continue with the old one */
862 }
863 /* end copybreak code */
864 skb_put(skb, length);
865
866 /* Receive Checksum Offload */
867 e1000_rx_checksum(adapter,
868 (u32)(status) |
869 ((u32)(rx_desc->errors) << 24),
870 le16_to_cpu(rx_desc->csum), skb);
871
872 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
873
874next_desc:
875 rx_desc->status = 0;
876
877 /* return some buffers to hardware, one at a time is too slow */
878 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
879 adapter->alloc_rx_buf(adapter, cleaned_count);
880 cleaned_count = 0;
881 }
882
883 /* use prefetched values */
884 rx_desc = next_rxd;
885 buffer_info = next_buffer;
886 }
887 rx_ring->next_to_clean = i;
888
889 cleaned_count = e1000_desc_unused(rx_ring);
890 if (cleaned_count)
891 adapter->alloc_rx_buf(adapter, cleaned_count);
892
bc7f75fa 893 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 894 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 895 netdev->stats.rx_bytes += total_rx_bytes;
896 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 897 return cleaned;
898}
899
bc7f75fa
AK		 900static void e1000_put_txbuf(struct e1000_adapter *adapter,
901 struct e1000_buffer *buffer_info)
902{
03b1320d
AD		 903 if (buffer_info->dma) {
904 if (buffer_info->mapped_as_page)
0be3f55f
NN		 905 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
906 buffer_info->length, DMA_TO_DEVICE);
03b1320d 907 else
0be3f55f
NN		 908 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
909 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 910 buffer_info->dma = 0;
911 }
bc7f75fa
AK		 912 if (buffer_info->skb) {
913 dev_kfree_skb_any(buffer_info->skb);
914 buffer_info->skb = NULL;
915 }
1b7719c4 916 buffer_info->time_stamp = 0;
bc7f75fa
AK		 917}
918
41cec6f1 919static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 920{
41cec6f1
BA		 921 struct e1000_adapter *adapter = container_of(work,
922 struct e1000_adapter,
923 print_hang_task);
bc7f75fa
AK		 924 struct e1000_ring *tx_ring = adapter->tx_ring;
925 unsigned int i = tx_ring->next_to_clean;
926 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
927 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 928 struct e1000_hw *hw = &adapter->hw;
929 u16 phy_status, phy_1000t_status, phy_ext_status;
930 u16 pci_status;
931
932 e1e_rphy(hw, PHY_STATUS, &phy_status);
933 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
934 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 935
41cec6f1
BA		 936 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
937
938 /* detected Hardware unit hang */
939 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 940 " TDH <%x>\n"
941 " TDT <%x>\n"
942 " next_to_use <%x>\n"
943 " next_to_clean <%x>\n"
944 "buffer_info[next_to_clean]:\n"
945 " time_stamp <%lx>\n"
946 " next_to_watch <%x>\n"
947 " jiffies <%lx>\n"
41cec6f1
BA		 948 " next_to_watch.status <%x>\n"
949 "MAC Status <%x>\n"
950 "PHY Status <%x>\n"
951 "PHY 1000BASE-T Status <%x>\n"
952 "PHY Extended Status <%x>\n"
953 "PCI Status <%x>\n",
44defeb3
JK		 954 readl(adapter->hw.hw_addr + tx_ring->head),
955 readl(adapter->hw.hw_addr + tx_ring->tail),
956 tx_ring->next_to_use,
957 tx_ring->next_to_clean,
958 tx_ring->buffer_info[eop].time_stamp,
959 eop,
960 jiffies,
41cec6f1
BA		 961 eop_desc->upper.fields.status,
962 er32(STATUS),
963 phy_status,
964 phy_1000t_status,
965 phy_ext_status,
966 pci_status);
bc7f75fa
AK		 967}
968
969/**
970 * e1000_clean_tx_irq - Reclaim resources after transmit completes
971 * @adapter: board private structure
972 *
973 * the return value indicates whether actual cleaning was done, there
974 * is no guarantee that everything was cleaned
975 **/
976static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
977{
978 struct net_device *netdev = adapter->netdev;
979 struct e1000_hw *hw = &adapter->hw;
980 struct e1000_ring *tx_ring = adapter->tx_ring;
981 struct e1000_tx_desc *tx_desc, *eop_desc;
982 struct e1000_buffer *buffer_info;
983 unsigned int i, eop;
984 unsigned int count = 0;
bc7f75fa
AK		 985 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
986
987 i = tx_ring->next_to_clean;
988 eop = tx_ring->buffer_info[i].next_to_watch;
989 eop_desc = E1000_TX_DESC(*tx_ring, eop);
990
12d04a3c
AD		 991 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
992 (count < tx_ring->count)) {
a86043c2
JB		 993 bool cleaned = false;
994 for (; !cleaned; count++) {
bc7f75fa
AK		 995 tx_desc = E1000_TX_DESC(*tx_ring, i);
996 buffer_info = &tx_ring->buffer_info[i];
997 cleaned = (i == eop);
998
999 if (cleaned) {
9ed318d5
TH		 1000 total_tx_packets += buffer_info->segs;
1001 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 1002 }
1003
1004 e1000_put_txbuf(adapter, buffer_info);
1005 tx_desc->upper.data = 0;
1006
1007 i++;
1008 if (i == tx_ring->count)
1009 i = 0;
1010 }
1011
dac87619
TL		 1012 if (i == tx_ring->next_to_use)
1013 break;
bc7f75fa
AK		 1014 eop = tx_ring->buffer_info[i].next_to_watch;
1015 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1016 }
1017
1018 tx_ring->next_to_clean = i;
1019
1020#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1021 if (count && netif_carrier_ok(netdev) &&
1022 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1023 /* Make sure that anybody stopping the queue after this
1024 * sees the new next_to_clean.
1025 */
1026 smp_mb();
1027
1028 if (netif_queue_stopped(netdev) &&
1029 !(test_bit(__E1000_DOWN, &adapter->state))) {
1030 netif_wake_queue(netdev);
1031 ++adapter->restart_queue;
1032 }
1033 }
1034
1035 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1036 /*
1037 * Detect a transmit hang in hardware, this serializes the
1038 * check with the clearing of time_stamp and movement of i
1039 */
bc7f75fa 1040 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1041 if (tx_ring->buffer_info[i].time_stamp &&
1042 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1043 + (adapter->tx_timeout_factor * HZ)) &&
1044 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1045 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1046 netif_stop_queue(netdev);
1047 }
1048 }
1049 adapter->total_tx_bytes += total_tx_bytes;
1050 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 1051 netdev->stats.tx_bytes += total_tx_bytes;
1052 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 1053 return (count < tx_ring->count);
bc7f75fa
AK		 1054}
1055
bc7f75fa
AK		 1056/**
1057 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1058 * @adapter: board private structure
1059 *
1060 * the return value indicates whether actual cleaning was done, there
1061 * is no guarantee that everything was cleaned
1062 **/
1063static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1064 int *work_done, int work_to_do)
1065{
3bb99fe2 1066 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1067 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1068 struct net_device *netdev = adapter->netdev;
1069 struct pci_dev *pdev = adapter->pdev;
1070 struct e1000_ring *rx_ring = adapter->rx_ring;
1071 struct e1000_buffer *buffer_info, *next_buffer;
1072 struct e1000_ps_page *ps_page;
1073 struct sk_buff *skb;
1074 unsigned int i, j;
1075 u32 length, staterr;
1076 int cleaned_count = 0;
1077 bool cleaned = 0;
1078 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1079
1080 i = rx_ring->next_to_clean;
1081 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1082 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1083 buffer_info = &rx_ring->buffer_info[i];
1084
1085 while (staterr & E1000_RXD_STAT_DD) {
1086 if (*work_done >= work_to_do)
1087 break;
1088 (*work_done)++;
1089 skb = buffer_info->skb;
1090
1091 /* in the packet split case this is header only */
1092 prefetch(skb->data - NET_IP_ALIGN);
1093
1094 i++;
1095 if (i == rx_ring->count)
1096 i = 0;
1097 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1098 prefetch(next_rxd);
1099
1100 next_buffer = &rx_ring->buffer_info[i];
1101
1102 cleaned = 1;
1103 cleaned_count++;
0be3f55f 1104 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1105 adapter->rx_ps_bsize0,
0be3f55f 1106 DMA_FROM_DEVICE);
bc7f75fa
AK		 1107 buffer_info->dma = 0;
1108
b94b5028
JB		 1109 /* see !EOP comment in other rx routine */
1110 if (!(staterr & E1000_RXD_STAT_EOP))
1111 adapter->flags2 |= FLAG2_IS_DISCARDING;
1112
1113 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1114 e_dbg("Packet Split buffers didn't pick up the full "
1115 "packet\n");
bc7f75fa 1116 dev_kfree_skb_irq(skb);
b94b5028
JB		 1117 if (staterr & E1000_RXD_STAT_EOP)
1118 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1119 goto next_desc;
1120 }
1121
1122 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1123 dev_kfree_skb_irq(skb);
1124 goto next_desc;
1125 }
1126
1127 length = le16_to_cpu(rx_desc->wb.middle.length0);
1128
1129 if (!length) {
3bb99fe2
BA		 1130 e_dbg("Last part of the packet spanning multiple "
1131 "descriptors\n");
bc7f75fa
AK		 1132 dev_kfree_skb_irq(skb);
1133 goto next_desc;
1134 }
1135
1136 /* Good Receive */
1137 skb_put(skb, length);
1138
1139 {
ad68076e
BA		 1140 /*
1141 * this looks ugly, but it seems compiler issues make it
1142 * more efficient than reusing j
1143 */
bc7f75fa
AK		 1144 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1145
ad68076e
BA		 1146 /*
1147 * page alloc/put takes too long and effects small packet
1148 * throughput, so unsplit small packets and save the alloc/put
1149 * only valid in softirq (napi) context to call kmap_*
1150 */
bc7f75fa
AK		 1151 if (l1 && (l1 <= copybreak) &&
1152 ((length + l1) <= adapter->rx_ps_bsize0)) {
1153 u8 *vaddr;
1154
47f44e40 1155 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1156
ad68076e
BA		 1157 /*
1158 * there is no documentation about how to call
bc7f75fa 1159 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1160 * very long
1161 */
0be3f55f
NN		 1162 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1163 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1164 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1165 memcpy(skb_tail_pointer(skb), vaddr, l1);
1166 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1167 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1168 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1169
eb7c3adb
JK		 1170 /* remove the CRC */
1171 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1172 l1 -= 4;
1173
bc7f75fa
AK		 1174 skb_put(skb, l1);
1175 goto copydone;
1176 } /* if */
1177 }
1178
1179 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1180 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1181 if (!length)
1182 break;
1183
47f44e40 1184 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1185 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1186 DMA_FROM_DEVICE);
bc7f75fa
AK		 1187 ps_page->dma = 0;
1188 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1189 ps_page->page = NULL;
1190 skb->len += length;
1191 skb->data_len += length;
1192 skb->truesize += length;
1193 }
1194
eb7c3adb
JK		 1195 /* strip the ethernet crc, problem is we're using pages now so
1196 * this whole operation can get a little cpu intensive
1197 */
1198 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1199 pskb_trim(skb, skb->len - 4);
1200
bc7f75fa
AK		 1201copydone:
1202 total_rx_bytes += skb->len;
1203 total_rx_packets++;
1204
1205 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1206 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1207
1208 if (rx_desc->wb.upper.header_status &
1209 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1210 adapter->rx_hdr_split++;
1211
1212 e1000_receive_skb(adapter, netdev, skb,
1213 staterr, rx_desc->wb.middle.vlan);
1214
1215next_desc:
1216 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1217 buffer_info->skb = NULL;
1218
1219 /* return some buffers to hardware, one at a time is too slow */
1220 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1221 adapter->alloc_rx_buf(adapter, cleaned_count);
1222 cleaned_count = 0;
1223 }
1224
1225 /* use prefetched values */
1226 rx_desc = next_rxd;
1227 buffer_info = next_buffer;
1228
1229 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1230 }
1231 rx_ring->next_to_clean = i;
1232
1233 cleaned_count = e1000_desc_unused(rx_ring);
1234 if (cleaned_count)
1235 adapter->alloc_rx_buf(adapter, cleaned_count);
1236
bc7f75fa 1237 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1238 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1239 netdev->stats.rx_bytes += total_rx_bytes;
1240 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 1241 return cleaned;
1242}
1243
97ac8cae
BA		 1244/**
1245 * e1000_consume_page - helper function
1246 **/
1247static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1248 u16 length)
1249{
1250 bi->page = NULL;
1251 skb->len += length;
1252 skb->data_len += length;
1253 skb->truesize += length;
1254}
1255
1256/**
1257 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1258 * @adapter: board private structure
1259 *
1260 * the return value indicates whether actual cleaning was done, there
1261 * is no guarantee that everything was cleaned
1262 **/
1263
1264static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1265 int *work_done, int work_to_do)
1266{
1267 struct net_device *netdev = adapter->netdev;
1268 struct pci_dev *pdev = adapter->pdev;
1269 struct e1000_ring *rx_ring = adapter->rx_ring;
1270 struct e1000_rx_desc *rx_desc, *next_rxd;
1271 struct e1000_buffer *buffer_info, *next_buffer;
1272 u32 length;
1273 unsigned int i;
1274 int cleaned_count = 0;
1275 bool cleaned = false;
1276 unsigned int total_rx_bytes=0, total_rx_packets=0;
1277
1278 i = rx_ring->next_to_clean;
1279 rx_desc = E1000_RX_DESC(*rx_ring, i);
1280 buffer_info = &rx_ring->buffer_info[i];
1281
1282 while (rx_desc->status & E1000_RXD_STAT_DD) {
1283 struct sk_buff *skb;
1284 u8 status;
1285
1286 if (*work_done >= work_to_do)
1287 break;
1288 (*work_done)++;
1289
1290 status = rx_desc->status;
1291 skb = buffer_info->skb;
1292 buffer_info->skb = NULL;
1293
1294 ++i;
1295 if (i == rx_ring->count)
1296 i = 0;
1297 next_rxd = E1000_RX_DESC(*rx_ring, i);
1298 prefetch(next_rxd);
1299
1300 next_buffer = &rx_ring->buffer_info[i];
1301
1302 cleaned = true;
1303 cleaned_count++;
0be3f55f
NN		 1304 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1305 DMA_FROM_DEVICE);
97ac8cae
BA		 1306 buffer_info->dma = 0;
1307
1308 length = le16_to_cpu(rx_desc->length);
1309
1310 /* errors is only valid for DD + EOP descriptors */
1311 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1312 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1313 /* recycle both page and skb */
1314 buffer_info->skb = skb;
1315 /* an error means any chain goes out the window
1316 * too */
1317 if (rx_ring->rx_skb_top)
1318 dev_kfree_skb(rx_ring->rx_skb_top);
1319 rx_ring->rx_skb_top = NULL;
1320 goto next_desc;
1321 }
1322
1323#define rxtop rx_ring->rx_skb_top
1324 if (!(status & E1000_RXD_STAT_EOP)) {
1325 /* this descriptor is only the beginning (or middle) */
1326 if (!rxtop) {
1327 /* this is the beginning of a chain */
1328 rxtop = skb;
1329 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1330 0, length);
1331 } else {
1332 /* this is the middle of a chain */
1333 skb_fill_page_desc(rxtop,
1334 skb_shinfo(rxtop)->nr_frags,
1335 buffer_info->page, 0, length);
1336 /* re-use the skb, only consumed the page */
1337 buffer_info->skb = skb;
1338 }
1339 e1000_consume_page(buffer_info, rxtop, length);
1340 goto next_desc;
1341 } else {
1342 if (rxtop) {
1343 /* end of the chain */
1344 skb_fill_page_desc(rxtop,
1345 skb_shinfo(rxtop)->nr_frags,
1346 buffer_info->page, 0, length);
1347 /* re-use the current skb, we only consumed the
1348 * page */
1349 buffer_info->skb = skb;
1350 skb = rxtop;
1351 rxtop = NULL;
1352 e1000_consume_page(buffer_info, skb, length);
1353 } else {
1354 /* no chain, got EOP, this buf is the packet
1355 * copybreak to save the put_page/alloc_page */
1356 if (length <= copybreak &&
1357 skb_tailroom(skb) >= length) {
1358 u8 *vaddr;
1359 vaddr = kmap_atomic(buffer_info->page,
1360 KM_SKB_DATA_SOFTIRQ);
1361 memcpy(skb_tail_pointer(skb), vaddr,
1362 length);
1363 kunmap_atomic(vaddr,
1364 KM_SKB_DATA_SOFTIRQ);
1365 /* re-use the page, so don't erase
1366 * buffer_info->page */
1367 skb_put(skb, length);
1368 } else {
1369 skb_fill_page_desc(skb, 0,
1370 buffer_info->page, 0,
1371 length);
1372 e1000_consume_page(buffer_info, skb,
1373 length);
1374 }
1375 }
1376 }
1377
1378 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1379 e1000_rx_checksum(adapter,
1380 (u32)(status) |
1381 ((u32)(rx_desc->errors) << 24),
1382 le16_to_cpu(rx_desc->csum), skb);
1383
1384 /* probably a little skewed due to removing CRC */
1385 total_rx_bytes += skb->len;
1386 total_rx_packets++;
1387
1388 /* eth type trans needs skb->data to point to something */
1389 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1390 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1391 dev_kfree_skb(skb);
1392 goto next_desc;
1393 }
1394
1395 e1000_receive_skb(adapter, netdev, skb, status,
1396 rx_desc->special);
1397
1398next_desc:
1399 rx_desc->status = 0;
1400
1401 /* return some buffers to hardware, one at a time is too slow */
1402 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1403 adapter->alloc_rx_buf(adapter, cleaned_count);
1404 cleaned_count = 0;
1405 }
1406
1407 /* use prefetched values */
1408 rx_desc = next_rxd;
1409 buffer_info = next_buffer;
1410 }
1411 rx_ring->next_to_clean = i;
1412
1413 cleaned_count = e1000_desc_unused(rx_ring);
1414 if (cleaned_count)
1415 adapter->alloc_rx_buf(adapter, cleaned_count);
1416
1417 adapter->total_rx_bytes += total_rx_bytes;
1418 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1419 netdev->stats.rx_bytes += total_rx_bytes;
1420 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1421 return cleaned;
1422}
1423
bc7f75fa
AK		 1424/**
1425 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1426 * @adapter: board private structure
1427 **/
1428static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1429{
1430 struct e1000_ring *rx_ring = adapter->rx_ring;
1431 struct e1000_buffer *buffer_info;
1432 struct e1000_ps_page *ps_page;
1433 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1434 unsigned int i, j;
1435
1436 /* Free all the Rx ring sk_buffs */
1437 for (i = 0; i < rx_ring->count; i++) {
1438 buffer_info = &rx_ring->buffer_info[i];
1439 if (buffer_info->dma) {
1440 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1441 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1442 adapter->rx_buffer_len,
0be3f55f 1443 DMA_FROM_DEVICE);
97ac8cae 1444 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1445 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1446 PAGE_SIZE,
0be3f55f 1447 DMA_FROM_DEVICE);
bc7f75fa 1448 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1449 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1450 adapter->rx_ps_bsize0,
0be3f55f 1451 DMA_FROM_DEVICE);
bc7f75fa
AK		 1452 buffer_info->dma = 0;
1453 }
1454
97ac8cae
BA		 1455 if (buffer_info->page) {
1456 put_page(buffer_info->page);
1457 buffer_info->page = NULL;
1458 }
1459
bc7f75fa
AK		 1460 if (buffer_info->skb) {
1461 dev_kfree_skb(buffer_info->skb);
1462 buffer_info->skb = NULL;
1463 }
1464
1465 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1466 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1467 if (!ps_page->page)
1468 break;
0be3f55f
NN		 1469 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1470 DMA_FROM_DEVICE);
bc7f75fa
AK		 1471 ps_page->dma = 0;
1472 put_page(ps_page->page);
1473 ps_page->page = NULL;
1474 }
1475 }
1476
1477 /* there also may be some cached data from a chained receive */
1478 if (rx_ring->rx_skb_top) {
1479 dev_kfree_skb(rx_ring->rx_skb_top);
1480 rx_ring->rx_skb_top = NULL;
1481 }
1482
bc7f75fa
AK		 1483 /* Zero out the descriptor ring */
1484 memset(rx_ring->desc, 0, rx_ring->size);
1485
1486 rx_ring->next_to_clean = 0;
1487 rx_ring->next_to_use = 0;
b94b5028 1488 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1489
1490 writel(0, adapter->hw.hw_addr + rx_ring->head);
1491 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1492}
1493
a8f88ff5
JB		 1494static void e1000e_downshift_workaround(struct work_struct *work)
1495{
1496 struct e1000_adapter *adapter = container_of(work,
1497 struct e1000_adapter, downshift_task);
1498
1499 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1500}
1501
bc7f75fa
AK		 1502/**
1503 * e1000_intr_msi - Interrupt Handler
1504 * @irq: interrupt number
1505 * @data: pointer to a network interface device structure
1506 **/
1507static irqreturn_t e1000_intr_msi(int irq, void *data)
1508{
1509 struct net_device *netdev = data;
1510 struct e1000_adapter *adapter = netdev_priv(netdev);
1511 struct e1000_hw *hw = &adapter->hw;
1512 u32 icr = er32(ICR);
1513
ad68076e
BA		 1514 /*
1515 * read ICR disables interrupts using IAM
1516 */
bc7f75fa 1517
573cca8c 1518 if (icr & E1000_ICR_LSC) {
bc7f75fa 1519 hw->mac.get_link_status = 1;
ad68076e
BA		 1520 /*
1521 * ICH8 workaround-- Call gig speed drop workaround on cable
1522 * disconnect (LSC) before accessing any PHY registers
1523 */
bc7f75fa
AK		 1524 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1525 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1526 schedule_work(&adapter->downshift_task);
bc7f75fa 1527
ad68076e
BA		 1528 /*
1529 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1530 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1531 * adapter in watchdog
1532 */
bc7f75fa
AK		 1533 if (netif_carrier_ok(netdev) &&
1534 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1535 /* disable receives */
1536 u32 rctl = er32(RCTL);
1537 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1538 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1539 }
1540 /* guard against interrupt when we're going down */
1541 if (!test_bit(__E1000_DOWN, &adapter->state))
1542 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1543 }
1544
288379f0 1545 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1546 adapter->total_tx_bytes = 0;
1547 adapter->total_tx_packets = 0;
1548 adapter->total_rx_bytes = 0;
1549 adapter->total_rx_packets = 0;
288379f0 1550 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1551 }
1552
1553 return IRQ_HANDLED;
1554}
1555
1556/**
1557 * e1000_intr - Interrupt Handler
1558 * @irq: interrupt number
1559 * @data: pointer to a network interface device structure
1560 **/
1561static irqreturn_t e1000_intr(int irq, void *data)
1562{
1563 struct net_device *netdev = data;
1564 struct e1000_adapter *adapter = netdev_priv(netdev);
1565 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1566 u32 rctl, icr = er32(ICR);
4662e82b 1567
a68ea775 1568 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1569 return IRQ_NONE; /* Not our interrupt */
1570
ad68076e
BA		 1571 /*
1572 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1573 * not set, then the adapter didn't send an interrupt
1574 */
bc7f75fa
AK		 1575 if (!(icr & E1000_ICR_INT_ASSERTED))
1576 return IRQ_NONE;
1577
ad68076e
BA		 1578 /*
1579 * Interrupt Auto-Mask...upon reading ICR,
1580 * interrupts are masked. No need for the
1581 * IMC write
1582 */
bc7f75fa 1583
573cca8c 1584 if (icr & E1000_ICR_LSC) {
bc7f75fa 1585 hw->mac.get_link_status = 1;
ad68076e
BA		 1586 /*
1587 * ICH8 workaround-- Call gig speed drop workaround on cable
1588 * disconnect (LSC) before accessing any PHY registers
1589 */
bc7f75fa
AK		 1590 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1591 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1592 schedule_work(&adapter->downshift_task);
bc7f75fa 1593
ad68076e
BA		 1594 /*
1595 * 80003ES2LAN workaround--
bc7f75fa
AK		 1596 * For packet buffer work-around on link down event;
1597 * disable receives here in the ISR and
1598 * reset adapter in watchdog
1599 */
1600 if (netif_carrier_ok(netdev) &&
1601 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1602 /* disable receives */
1603 rctl = er32(RCTL);
1604 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1605 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1606 }
1607 /* guard against interrupt when we're going down */
1608 if (!test_bit(__E1000_DOWN, &adapter->state))
1609 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1610 }
1611
288379f0 1612 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1613 adapter->total_tx_bytes = 0;
1614 adapter->total_tx_packets = 0;
1615 adapter->total_rx_bytes = 0;
1616 adapter->total_rx_packets = 0;
288379f0 1617 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1618 }
1619
1620 return IRQ_HANDLED;
1621}
1622
4662e82b
BA		 1623static irqreturn_t e1000_msix_other(int irq, void *data)
1624{
1625 struct net_device *netdev = data;
1626 struct e1000_adapter *adapter = netdev_priv(netdev);
1627 struct e1000_hw *hw = &adapter->hw;
1628 u32 icr = er32(ICR);
1629
1630 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1631 if (!test_bit(__E1000_DOWN, &adapter->state))
1632 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1633 return IRQ_NONE;
1634 }
1635
1636 if (icr & adapter->eiac_mask)
1637 ew32(ICS, (icr & adapter->eiac_mask));
1638
1639 if (icr & E1000_ICR_OTHER) {
1640 if (!(icr & E1000_ICR_LSC))
1641 goto no_link_interrupt;
1642 hw->mac.get_link_status = 1;
1643 /* guard against interrupt when we're going down */
1644 if (!test_bit(__E1000_DOWN, &adapter->state))
1645 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1646 }
1647
1648no_link_interrupt:
a3c69fef
JB		 1649 if (!test_bit(__E1000_DOWN, &adapter->state))
1650 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1651
1652 return IRQ_HANDLED;
1653}
1654
1655
1656static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1657{
1658 struct net_device *netdev = data;
1659 struct e1000_adapter *adapter = netdev_priv(netdev);
1660 struct e1000_hw *hw = &adapter->hw;
1661 struct e1000_ring *tx_ring = adapter->tx_ring;
1662
1663
1664 adapter->total_tx_bytes = 0;
1665 adapter->total_tx_packets = 0;
1666
1667 if (!e1000_clean_tx_irq(adapter))
1668 /* Ring was not completely cleaned, so fire another interrupt */
1669 ew32(ICS, tx_ring->ims_val);
1670
1671 return IRQ_HANDLED;
1672}
1673
1674static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1675{
1676 struct net_device *netdev = data;
1677 struct e1000_adapter *adapter = netdev_priv(netdev);
1678
1679 /* Write the ITR value calculated at the end of the
1680 * previous interrupt.
1681 */
1682 if (adapter->rx_ring->set_itr) {
1683 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1684 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1685 adapter->rx_ring->set_itr = 0;
1686 }
1687
288379f0 1688 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1689 adapter->total_rx_bytes = 0;
1690 adapter->total_rx_packets = 0;
288379f0 1691 __napi_schedule(&adapter->napi);
4662e82b
BA		 1692 }
1693 return IRQ_HANDLED;
1694}
1695
1696/**
1697 * e1000_configure_msix - Configure MSI-X hardware
1698 *
1699 * e1000_configure_msix sets up the hardware to properly
1700 * generate MSI-X interrupts.
1701 **/
1702static void e1000_configure_msix(struct e1000_adapter *adapter)
1703{
1704 struct e1000_hw *hw = &adapter->hw;
1705 struct e1000_ring *rx_ring = adapter->rx_ring;
1706 struct e1000_ring *tx_ring = adapter->tx_ring;
1707 int vector = 0;
1708 u32 ctrl_ext, ivar = 0;
1709
1710 adapter->eiac_mask = 0;
1711
1712 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1713 if (hw->mac.type == e1000_82574) {
1714 u32 rfctl = er32(RFCTL);
1715 rfctl |= E1000_RFCTL_ACK_DIS;
1716 ew32(RFCTL, rfctl);
1717 }
1718
1719#define E1000_IVAR_INT_ALLOC_VALID 0x8
1720 /* Configure Rx vector */
1721 rx_ring->ims_val = E1000_IMS_RXQ0;
1722 adapter->eiac_mask |= rx_ring->ims_val;
1723 if (rx_ring->itr_val)
1724 writel(1000000000 / (rx_ring->itr_val * 256),
1725 hw->hw_addr + rx_ring->itr_register);
1726 else
1727 writel(1, hw->hw_addr + rx_ring->itr_register);
1728 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1729
1730 /* Configure Tx vector */
1731 tx_ring->ims_val = E1000_IMS_TXQ0;
1732 vector++;
1733 if (tx_ring->itr_val)
1734 writel(1000000000 / (tx_ring->itr_val * 256),
1735 hw->hw_addr + tx_ring->itr_register);
1736 else
1737 writel(1, hw->hw_addr + tx_ring->itr_register);
1738 adapter->eiac_mask |= tx_ring->ims_val;
1739 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1740
1741 /* set vector for Other Causes, e.g. link changes */
1742 vector++;
1743 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1744 if (rx_ring->itr_val)
1745 writel(1000000000 / (rx_ring->itr_val * 256),
1746 hw->hw_addr + E1000_EITR_82574(vector));
1747 else
1748 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1749
1750 /* Cause Tx interrupts on every write back */
1751 ivar |= (1 << 31);
1752
1753 ew32(IVAR, ivar);
1754
1755 /* enable MSI-X PBA support */
1756 ctrl_ext = er32(CTRL_EXT);
1757 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1758
1759 /* Auto-Mask Other interrupts upon ICR read */
1760#define E1000_EIAC_MASK_82574 0x01F00000
1761 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1762 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1763 ew32(CTRL_EXT, ctrl_ext);
1764 e1e_flush();
1765}
1766
1767void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1768{
1769 if (adapter->msix_entries) {
1770 pci_disable_msix(adapter->pdev);
1771 kfree(adapter->msix_entries);
1772 adapter->msix_entries = NULL;
1773 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1774 pci_disable_msi(adapter->pdev);
1775 adapter->flags &= ~FLAG_MSI_ENABLED;
1776 }
4662e82b
BA		 1777}
1778
1779/**
1780 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1781 *
1782 * Attempt to configure interrupts using the best available
1783 * capabilities of the hardware and kernel.
1784 **/
1785void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1786{
1787 int err;
1788 int numvecs, i;
1789
1790
1791 switch (adapter->int_mode) {
1792 case E1000E_INT_MODE_MSIX:
1793 if (adapter->flags & FLAG_HAS_MSIX) {
1794 numvecs = 3; /* RxQ0, TxQ0 and other */
1795 adapter->msix_entries = kcalloc(numvecs,
1796 sizeof(struct msix_entry),
1797 GFP_KERNEL);
1798 if (adapter->msix_entries) {
1799 for (i = 0; i < numvecs; i++)
1800 adapter->msix_entries[i].entry = i;
1801
1802 err = pci_enable_msix(adapter->pdev,
1803 adapter->msix_entries,
1804 numvecs);
1805 if (err == 0)
1806 return;
1807 }
1808 /* MSI-X failed, so fall through and try MSI */
1809 e_err("Failed to initialize MSI-X interrupts. "
1810 "Falling back to MSI interrupts.\n");
1811 e1000e_reset_interrupt_capability(adapter);
1812 }
1813 adapter->int_mode = E1000E_INT_MODE_MSI;
1814 /* Fall through */
1815 case E1000E_INT_MODE_MSI:
1816 if (!pci_enable_msi(adapter->pdev)) {
1817 adapter->flags |= FLAG_MSI_ENABLED;
1818 } else {
1819 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1820 e_err("Failed to initialize MSI interrupts. Falling "
1821 "back to legacy interrupts.\n");
1822 }
1823 /* Fall through */
1824 case E1000E_INT_MODE_LEGACY:
1825 /* Don't do anything; this is the system default */
1826 break;
1827 }
4662e82b
BA		 1828}
1829
1830/**
1831 * e1000_request_msix - Initialize MSI-X interrupts
1832 *
1833 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1834 * kernel.
1835 **/
1836static int e1000_request_msix(struct e1000_adapter *adapter)
1837{
1838 struct net_device *netdev = adapter->netdev;
1839 int err = 0, vector = 0;
1840
1841 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1842 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1843 else
1844 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1845 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1846 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1847 netdev);
1848 if (err)
1849 goto out;
1850 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1851 adapter->rx_ring->itr_val = adapter->itr;
1852 vector++;
1853
1854 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1855 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1856 else
1857 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1858 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1859 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1860 netdev);
1861 if (err)
1862 goto out;
1863 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1864 adapter->tx_ring->itr_val = adapter->itr;
1865 vector++;
1866
1867 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1868 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1869 if (err)
1870 goto out;
1871
1872 e1000_configure_msix(adapter);
1873 return 0;
1874out:
1875 return err;
1876}
1877
f8d59f78
BA		 1878/**
1879 * e1000_request_irq - initialize interrupts
1880 *
1881 * Attempts to configure interrupts using the best available
1882 * capabilities of the hardware and kernel.
1883 **/
bc7f75fa
AK		 1884static int e1000_request_irq(struct e1000_adapter *adapter)
1885{
1886 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1887 int err;
1888
4662e82b
BA		 1889 if (adapter->msix_entries) {
1890 err = e1000_request_msix(adapter);
1891 if (!err)
1892 return err;
1893 /* fall back to MSI */
1894 e1000e_reset_interrupt_capability(adapter);
1895 adapter->int_mode = E1000E_INT_MODE_MSI;
1896 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1897 }
4662e82b 1898 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1899 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1900 netdev->name, netdev);
1901 if (!err)
1902 return err;
bc7f75fa 1903
4662e82b
BA		 1904 /* fall back to legacy interrupt */
1905 e1000e_reset_interrupt_capability(adapter);
1906 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1907 }
1908
a0607fd3 1909 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1910 netdev->name, netdev);
1911 if (err)
1912 e_err("Unable to allocate interrupt, Error: %d\n", err);
1913
bc7f75fa
AK		 1914 return err;
1915}
1916
1917static void e1000_free_irq(struct e1000_adapter *adapter)
1918{
1919 struct net_device *netdev = adapter->netdev;
1920
4662e82b
BA		 1921 if (adapter->msix_entries) {
1922 int vector = 0;
1923
1924 free_irq(adapter->msix_entries[vector].vector, netdev);
1925 vector++;
1926
1927 free_irq(adapter->msix_entries[vector].vector, netdev);
1928 vector++;
1929
1930 /* Other Causes interrupt vector */
1931 free_irq(adapter->msix_entries[vector].vector, netdev);
1932 return;
bc7f75fa 1933 }
4662e82b
BA		 1934
1935 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1936}
1937
1938/**
1939 * e1000_irq_disable - Mask off interrupt generation on the NIC
1940 **/
1941static void e1000_irq_disable(struct e1000_adapter *adapter)
1942{
1943 struct e1000_hw *hw = &adapter->hw;
1944
bc7f75fa 1945 ew32(IMC, ~0);
4662e82b
BA		 1946 if (adapter->msix_entries)
1947 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1948 e1e_flush();
1949 synchronize_irq(adapter->pdev->irq);
1950}
1951
1952/**
1953 * e1000_irq_enable - Enable default interrupt generation settings
1954 **/
1955static void e1000_irq_enable(struct e1000_adapter *adapter)
1956{
1957 struct e1000_hw *hw = &adapter->hw;
1958
4662e82b
BA		 1959 if (adapter->msix_entries) {
1960 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1961 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1962 } else {
1963 ew32(IMS, IMS_ENABLE_MASK);
1964 }
74ef9c39 1965 e1e_flush();
bc7f75fa
AK		 1966}
1967
1968/**
1969 * e1000_get_hw_control - get control of the h/w from f/w
1970 * @adapter: address of board private structure
1971 *
489815ce 1972 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1973 * For ASF and Pass Through versions of f/w this means that
1974 * the driver is loaded. For AMT version (only with 82573)
1975 * of the f/w this means that the network i/f is open.
1976 **/
1977static void e1000_get_hw_control(struct e1000_adapter *adapter)
1978{
1979 struct e1000_hw *hw = &adapter->hw;
1980 u32 ctrl_ext;
1981 u32 swsm;
1982
1983 /* Let firmware know the driver has taken over */
1984 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1985 swsm = er32(SWSM);
1986 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1987 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1988 ctrl_ext = er32(CTRL_EXT);
ad68076e 1989 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1990 }
1991}
1992
1993/**
1994 * e1000_release_hw_control - release control of the h/w to f/w
1995 * @adapter: address of board private structure
1996 *
489815ce 1997 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1998 * For ASF and Pass Through versions of f/w this means that the
1999 * driver is no longer loaded. For AMT version (only with 82573) i
2000 * of the f/w this means that the network i/f is closed.
2001 *
2002 **/
2003static void e1000_release_hw_control(struct e1000_adapter *adapter)
2004{
2005 struct e1000_hw *hw = &adapter->hw;
2006 u32 ctrl_ext;
2007 u32 swsm;
2008
2009 /* Let firmware taken over control of h/w */
2010 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2011 swsm = er32(SWSM);
2012 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2013 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2014 ctrl_ext = er32(CTRL_EXT);
ad68076e 2015 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2016 }
2017}
2018
bc7f75fa
AK		 2019/**
2020 * @e1000_alloc_ring - allocate memory for a ring structure
2021 **/
2022static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2023 struct e1000_ring *ring)
2024{
2025 struct pci_dev *pdev = adapter->pdev;
2026
2027 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2028 GFP_KERNEL);
2029 if (!ring->desc)
2030 return -ENOMEM;
2031
2032 return 0;
2033}
2034
2035/**
2036 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2037 * @adapter: board private structure
2038 *
2039 * Return 0 on success, negative on failure
2040 **/
2041int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2042{
2043 struct e1000_ring *tx_ring = adapter->tx_ring;
2044 int err = -ENOMEM, size;
2045
2046 size = sizeof(struct e1000_buffer) * tx_ring->count;
2047 tx_ring->buffer_info = vmalloc(size);
2048 if (!tx_ring->buffer_info)
2049 goto err;
2050 memset(tx_ring->buffer_info, 0, size);
2051
2052 /* round up to nearest 4K */
2053 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2054 tx_ring->size = ALIGN(tx_ring->size, 4096);
2055
2056 err = e1000_alloc_ring_dma(adapter, tx_ring);
2057 if (err)
2058 goto err;
2059
2060 tx_ring->next_to_use = 0;
2061 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2062
2063 return 0;
2064err:
2065 vfree(tx_ring->buffer_info);
44defeb3 2066 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2067 return err;
2068}
2069
2070/**
2071 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2072 * @adapter: board private structure
2073 *
2074 * Returns 0 on success, negative on failure
2075 **/
2076int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2077{
2078 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2079 struct e1000_buffer *buffer_info;
2080 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2081
2082 size = sizeof(struct e1000_buffer) * rx_ring->count;
2083 rx_ring->buffer_info = vmalloc(size);
2084 if (!rx_ring->buffer_info)
2085 goto err;
2086 memset(rx_ring->buffer_info, 0, size);
2087
47f44e40
AK		 2088 for (i = 0; i < rx_ring->count; i++) {
2089 buffer_info = &rx_ring->buffer_info[i];
2090 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2091 sizeof(struct e1000_ps_page),
2092 GFP_KERNEL);
2093 if (!buffer_info->ps_pages)
2094 goto err_pages;
2095 }
bc7f75fa
AK		 2096
2097 desc_len = sizeof(union e1000_rx_desc_packet_split);
2098
2099 /* Round up to nearest 4K */
2100 rx_ring->size = rx_ring->count * desc_len;
2101 rx_ring->size = ALIGN(rx_ring->size, 4096);
2102
2103 err = e1000_alloc_ring_dma(adapter, rx_ring);
2104 if (err)
47f44e40 2105 goto err_pages;
bc7f75fa
AK		 2106
2107 rx_ring->next_to_clean = 0;
2108 rx_ring->next_to_use = 0;
2109 rx_ring->rx_skb_top = NULL;
2110
2111 return 0;
47f44e40
AK		 2112
2113err_pages:
2114 for (i = 0; i < rx_ring->count; i++) {
2115 buffer_info = &rx_ring->buffer_info[i];
2116 kfree(buffer_info->ps_pages);
2117 }
bc7f75fa
AK		 2118err:
2119 vfree(rx_ring->buffer_info);
44defeb3 2120 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2121 return err;
2122}
2123
2124/**
2125 * e1000_clean_tx_ring - Free Tx Buffers
2126 * @adapter: board private structure
2127 **/
2128static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2129{
2130 struct e1000_ring *tx_ring = adapter->tx_ring;
2131 struct e1000_buffer *buffer_info;
2132 unsigned long size;
2133 unsigned int i;
2134
2135 for (i = 0; i < tx_ring->count; i++) {
2136 buffer_info = &tx_ring->buffer_info[i];
2137 e1000_put_txbuf(adapter, buffer_info);
2138 }
2139
2140 size = sizeof(struct e1000_buffer) * tx_ring->count;
2141 memset(tx_ring->buffer_info, 0, size);
2142
2143 memset(tx_ring->desc, 0, tx_ring->size);
2144
2145 tx_ring->next_to_use = 0;
2146 tx_ring->next_to_clean = 0;
2147
2148 writel(0, adapter->hw.hw_addr + tx_ring->head);
2149 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2150}
2151
2152/**
2153 * e1000e_free_tx_resources - Free Tx Resources per Queue
2154 * @adapter: board private structure
2155 *
2156 * Free all transmit software resources
2157 **/
2158void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2159{
2160 struct pci_dev *pdev = adapter->pdev;
2161 struct e1000_ring *tx_ring = adapter->tx_ring;
2162
2163 e1000_clean_tx_ring(adapter);
2164
2165 vfree(tx_ring->buffer_info);
2166 tx_ring->buffer_info = NULL;
2167
2168 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2169 tx_ring->dma);
2170 tx_ring->desc = NULL;
2171}
2172
2173/**
2174 * e1000e_free_rx_resources - Free Rx Resources
2175 * @adapter: board private structure
2176 *
2177 * Free all receive software resources
2178 **/
2179
2180void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2181{
2182 struct pci_dev *pdev = adapter->pdev;
2183 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2184 int i;
bc7f75fa
AK		 2185
2186 e1000_clean_rx_ring(adapter);
2187
47f44e40
AK		 2188 for (i = 0; i < rx_ring->count; i++) {
2189 kfree(rx_ring->buffer_info[i].ps_pages);
2190 }
2191
bc7f75fa
AK		 2192 vfree(rx_ring->buffer_info);
2193 rx_ring->buffer_info = NULL;
2194
bc7f75fa
AK		 2195 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2196 rx_ring->dma);
2197 rx_ring->desc = NULL;
2198}
2199
2200/**
2201 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2202 * @adapter: pointer to adapter
2203 * @itr_setting: current adapter->itr
2204 * @packets: the number of packets during this measurement interval
2205 * @bytes: the number of bytes during this measurement interval
2206 *
bc7f75fa
AK		 2207 * Stores a new ITR value based on packets and byte
2208 * counts during the last interrupt. The advantage of per interrupt
2209 * computation is faster updates and more accurate ITR for the current
2210 * traffic pattern. Constants in this function were computed
2211 * based on theoretical maximum wire speed and thresholds were set based
2212 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2213 * while increasing bulk throughput. This functionality is controlled
2214 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2215 **/
2216static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2217 u16 itr_setting, int packets,
2218 int bytes)
2219{
2220 unsigned int retval = itr_setting;
2221
2222 if (packets == 0)
2223 goto update_itr_done;
2224
2225 switch (itr_setting) {
2226 case lowest_latency:
2227 /* handle TSO and jumbo frames */
2228 if (bytes/packets > 8000)
2229 retval = bulk_latency;
2230 else if ((packets < 5) && (bytes > 512)) {
2231 retval = low_latency;
2232 }
2233 break;
2234 case low_latency: /* 50 usec aka 20000 ints/s */
2235 if (bytes > 10000) {
2236 /* this if handles the TSO accounting */
2237 if (bytes/packets > 8000) {
2238 retval = bulk_latency;
2239 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2240 retval = bulk_latency;
2241 } else if ((packets > 35)) {
2242 retval = lowest_latency;
2243 }
2244 } else if (bytes/packets > 2000) {
2245 retval = bulk_latency;
2246 } else if (packets <= 2 && bytes < 512) {
2247 retval = lowest_latency;
2248 }
2249 break;
2250 case bulk_latency: /* 250 usec aka 4000 ints/s */
2251 if (bytes > 25000) {
2252 if (packets > 35) {
2253 retval = low_latency;
2254 }
2255 } else if (bytes < 6000) {
2256 retval = low_latency;
2257 }
2258 break;
2259 }
2260
2261update_itr_done:
2262 return retval;
2263}
2264
2265static void e1000_set_itr(struct e1000_adapter *adapter)
2266{
2267 struct e1000_hw *hw = &adapter->hw;
2268 u16 current_itr;
2269 u32 new_itr = adapter->itr;
2270
2271 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2272 if (adapter->link_speed != SPEED_1000) {
2273 current_itr = 0;
2274 new_itr = 4000;
2275 goto set_itr_now;
2276 }
2277
2278 adapter->tx_itr = e1000_update_itr(adapter,
2279 adapter->tx_itr,
2280 adapter->total_tx_packets,
2281 adapter->total_tx_bytes);
2282 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2283 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2284 adapter->tx_itr = low_latency;
2285
2286 adapter->rx_itr = e1000_update_itr(adapter,
2287 adapter->rx_itr,
2288 adapter->total_rx_packets,
2289 adapter->total_rx_bytes);
2290 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2291 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2292 adapter->rx_itr = low_latency;
2293
2294 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2295
2296 switch (current_itr) {
2297 /* counts and packets in update_itr are dependent on these numbers */
2298 case lowest_latency:
2299 new_itr = 70000;
2300 break;
2301 case low_latency:
2302 new_itr = 20000; /* aka hwitr = ~200 */
2303 break;
2304 case bulk_latency:
2305 new_itr = 4000;
2306 break;
2307 default:
2308 break;
2309 }
2310
2311set_itr_now:
2312 if (new_itr != adapter->itr) {
ad68076e
BA		 2313 /*
2314 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2315 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2316 * increasing
2317 */
bc7f75fa
AK		 2318 new_itr = new_itr > adapter->itr ?
2319 min(adapter->itr + (new_itr >> 2), new_itr) :
2320 new_itr;
2321 adapter->itr = new_itr;
4662e82b
BA		 2322 adapter->rx_ring->itr_val = new_itr;
2323 if (adapter->msix_entries)
2324 adapter->rx_ring->set_itr = 1;
2325 else
2326 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 2327 }
2328}
2329
4662e82b
BA		 2330/**
2331 * e1000_alloc_queues - Allocate memory for all rings
2332 * @adapter: board private structure to initialize
2333 **/
2334static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2335{
2336 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2337 if (!adapter->tx_ring)
2338 goto err;
2339
2340 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2341 if (!adapter->rx_ring)
2342 goto err;
2343
2344 return 0;
2345err:
2346 e_err("Unable to allocate memory for queues\n");
2347 kfree(adapter->rx_ring);
2348 kfree(adapter->tx_ring);
2349 return -ENOMEM;
2350}
2351
bc7f75fa
AK		 2352/**
2353 * e1000_clean - NAPI Rx polling callback
ad68076e 2354 * @napi: struct associated with this polling callback
489815ce 2355 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2356 **/
2357static int e1000_clean(struct napi_struct *napi, int budget)
2358{
2359 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2360 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2361 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2362 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2363
4cf1653a 2364 adapter = netdev_priv(poll_dev);
bc7f75fa 2365
4662e82b
BA		 2366 if (adapter->msix_entries &&
2367 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2368 goto clean_rx;
2369
92af3e95 2370 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2371
4662e82b 2372clean_rx:
bc7f75fa 2373 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2374
12d04a3c 2375 if (!tx_cleaned)
d2c7ddd6 2376 work_done = budget;
bc7f75fa 2377
53e52c72
DM		 2378 /* If budget not fully consumed, exit the polling mode */
2379 if (work_done < budget) {
bc7f75fa
AK		 2380 if (adapter->itr_setting & 3)
2381 e1000_set_itr(adapter);
288379f0 2382 napi_complete(napi);
a3c69fef
JB		 2383 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2384 if (adapter->msix_entries)
2385 ew32(IMS, adapter->rx_ring->ims_val);
2386 else
2387 e1000_irq_enable(adapter);
2388 }
bc7f75fa
AK		 2389 }
2390
2391 return work_done;
2392}
2393
2394static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2395{
2396 struct e1000_adapter *adapter = netdev_priv(netdev);
2397 struct e1000_hw *hw = &adapter->hw;
2398 u32 vfta, index;
2399
2400 /* don't update vlan cookie if already programmed */
2401 if ((adapter->hw.mng_cookie.status &
2402 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2403 (vid == adapter->mng_vlan_id))
2404 return;
caaddaf8 2405
bc7f75fa 2406 /* add VID to filter table */
caaddaf8
BA		 2407 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2408 index = (vid >> 5) & 0x7F;
2409 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2410 vfta |= (1 << (vid & 0x1F));
2411 hw->mac.ops.write_vfta(hw, index, vfta);
2412 }
bc7f75fa
AK		 2413}
2414
2415static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2416{
2417 struct e1000_adapter *adapter = netdev_priv(netdev);
2418 struct e1000_hw *hw = &adapter->hw;
2419 u32 vfta, index;
2420
74ef9c39
JB		 2421 if (!test_bit(__E1000_DOWN, &adapter->state))
2422 e1000_irq_disable(adapter);
bc7f75fa 2423 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2424
2425 if (!test_bit(__E1000_DOWN, &adapter->state))
2426 e1000_irq_enable(adapter);
bc7f75fa
AK		 2427
2428 if ((adapter->hw.mng_cookie.status &
2429 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2430 (vid == adapter->mng_vlan_id)) {
2431 /* release control to f/w */
2432 e1000_release_hw_control(adapter);
2433 return;
2434 }
2435
2436 /* remove VID from filter table */
caaddaf8
BA		 2437 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2438 index = (vid >> 5) & 0x7F;
2439 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2440 vfta &= ~(1 << (vid & 0x1F));
2441 hw->mac.ops.write_vfta(hw, index, vfta);
2442 }
bc7f75fa
AK		 2443}
2444
2445static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2446{
2447 struct net_device *netdev = adapter->netdev;
2448 u16 vid = adapter->hw.mng_cookie.vlan_id;
2449 u16 old_vid = adapter->mng_vlan_id;
2450
2451 if (!adapter->vlgrp)
2452 return;
2453
2454 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2455 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2456 if (adapter->hw.mng_cookie.status &
2457 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2458 e1000_vlan_rx_add_vid(netdev, vid);
2459 adapter->mng_vlan_id = vid;
2460 }
2461
2462 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2463 (vid != old_vid) &&
2464 !vlan_group_get_device(adapter->vlgrp, old_vid))
2465 e1000_vlan_rx_kill_vid(netdev, old_vid);
2466 } else {
2467 adapter->mng_vlan_id = vid;
2468 }
2469}
2470
2471
2472static void e1000_vlan_rx_register(struct net_device *netdev,
2473 struct vlan_group *grp)
2474{
2475 struct e1000_adapter *adapter = netdev_priv(netdev);
2476 struct e1000_hw *hw = &adapter->hw;
2477 u32 ctrl, rctl;
2478
74ef9c39
JB		 2479 if (!test_bit(__E1000_DOWN, &adapter->state))
2480 e1000_irq_disable(adapter);
bc7f75fa
AK		 2481 adapter->vlgrp = grp;
2482
2483 if (grp) {
2484 /* enable VLAN tag insert/strip */
2485 ctrl = er32(CTRL);
2486 ctrl |= E1000_CTRL_VME;
2487 ew32(CTRL, ctrl);
2488
2489 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2490 /* enable VLAN receive filtering */
2491 rctl = er32(RCTL);
bc7f75fa
AK		 2492 rctl &= ~E1000_RCTL_CFIEN;
2493 ew32(RCTL, rctl);
2494 e1000_update_mng_vlan(adapter);
2495 }
2496 } else {
2497 /* disable VLAN tag insert/strip */
2498 ctrl = er32(CTRL);
2499 ctrl &= ~E1000_CTRL_VME;
2500 ew32(CTRL, ctrl);
2501
2502 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2503 if (adapter->mng_vlan_id !=
2504 (u16)E1000_MNG_VLAN_NONE) {
2505 e1000_vlan_rx_kill_vid(netdev,
2506 adapter->mng_vlan_id);
2507 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2508 }
2509 }
2510 }
2511
74ef9c39
JB		 2512 if (!test_bit(__E1000_DOWN, &adapter->state))
2513 e1000_irq_enable(adapter);
bc7f75fa
AK		 2514}
2515
2516static void e1000_restore_vlan(struct e1000_adapter *adapter)
2517{
2518 u16 vid;
2519
2520 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2521
2522 if (!adapter->vlgrp)
2523 return;
2524
2525 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2526 if (!vlan_group_get_device(adapter->vlgrp, vid))
2527 continue;
2528 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2529 }
2530}
2531
cd791618 2532static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2533{
2534 struct e1000_hw *hw = &adapter->hw;
cd791618 2535 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2536
2537 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2538 return;
2539
2540 manc = er32(MANC);
2541
ad68076e
BA		 2542 /*
2543 * enable receiving management packets to the host. this will probably
bc7f75fa 2544 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2545 * the packets will be handled on SMBUS
2546 */
bc7f75fa
AK		 2547 manc |= E1000_MANC_EN_MNG2HOST;
2548 manc2h = er32(MANC2H);
cd791618
BA		 2549
2550 switch (hw->mac.type) {
2551 default:
2552 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2553 break;
2554 case e1000_82574:
2555 case e1000_82583:
2556 /*
2557 * Check if IPMI pass-through decision filter already exists;
2558 * if so, enable it.
2559 */
2560 for (i = 0, j = 0; i < 8; i++) {
2561 mdef = er32(MDEF(i));
2562
2563 /* Ignore filters with anything other than IPMI ports */
3b21b508 2564 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2565 continue;
2566
2567 /* Enable this decision filter in MANC2H */
2568 if (mdef)
2569 manc2h |= (1 << i);
2570
2571 j |= mdef;
2572 }
2573
2574 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2575 break;
2576
2577 /* Create new decision filter in an empty filter */
2578 for (i = 0, j = 0; i < 8; i++)
2579 if (er32(MDEF(i)) == 0) {
2580 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2581 E1000_MDEF_PORT_664));
2582 manc2h |= (1 << 1);
2583 j++;
2584 break;
2585 }
2586
2587 if (!j)
2588 e_warn("Unable to create IPMI pass-through filter\n");
2589 break;
2590 }
2591
bc7f75fa
AK		 2592 ew32(MANC2H, manc2h);
2593 ew32(MANC, manc);
2594}
2595
2596/**
2597 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2598 * @adapter: board private structure
2599 *
2600 * Configure the Tx unit of the MAC after a reset.
2601 **/
2602static void e1000_configure_tx(struct e1000_adapter *adapter)
2603{
2604 struct e1000_hw *hw = &adapter->hw;
2605 struct e1000_ring *tx_ring = adapter->tx_ring;
2606 u64 tdba;
2607 u32 tdlen, tctl, tipg, tarc;
2608 u32 ipgr1, ipgr2;
2609
2610 /* Setup the HW Tx Head and Tail descriptor pointers */
2611 tdba = tx_ring->dma;
2612 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2613 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2614 ew32(TDBAH, (tdba >> 32));
2615 ew32(TDLEN, tdlen);
2616 ew32(TDH, 0);
2617 ew32(TDT, 0);
2618 tx_ring->head = E1000_TDH;
2619 tx_ring->tail = E1000_TDT;
2620
2621 /* Set the default values for the Tx Inter Packet Gap timer */
2622 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2623 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2624 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2625
2626 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2627 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2628
2629 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2630 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2631 ew32(TIPG, tipg);
2632
2633 /* Set the Tx Interrupt Delay register */
2634 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2635 /* Tx irq moderation */
bc7f75fa
AK		 2636 ew32(TADV, adapter->tx_abs_int_delay);
2637
2638 /* Program the Transmit Control Register */
2639 tctl = er32(TCTL);
2640 tctl &= ~E1000_TCTL_CT;
2641 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2642 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2643
2644 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2645 tarc = er32(TARC(0));
ad68076e
BA		 2646 /*
2647 * set the speed mode bit, we'll clear it if we're not at
2648 * gigabit link later
2649 */
bc7f75fa
AK		 2650#define SPEED_MODE_BIT (1 << 21)
2651 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2652 ew32(TARC(0), tarc);
bc7f75fa
AK		 2653 }
2654
2655 /* errata: program both queues to unweighted RR */
2656 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2657 tarc = er32(TARC(0));
bc7f75fa 2658 tarc |= 1;
e9ec2c0f
JK		 2659 ew32(TARC(0), tarc);
2660 tarc = er32(TARC(1));
bc7f75fa 2661 tarc |= 1;
e9ec2c0f 2662 ew32(TARC(1), tarc);
bc7f75fa
AK		 2663 }
2664
bc7f75fa
AK		 2665 /* Setup Transmit Descriptor Settings for eop descriptor */
2666 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2667
2668 /* only set IDE if we are delaying interrupts using the timers */
2669 if (adapter->tx_int_delay)
2670 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2671
2672 /* enable Report Status bit */
2673 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2674
2675 ew32(TCTL, tctl);
2676
edfea6e6 2677 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2678}
2679
2680/**
2681 * e1000_setup_rctl - configure the receive control registers
2682 * @adapter: Board private structure
2683 **/
2684#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2685 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2686static void e1000_setup_rctl(struct e1000_adapter *adapter)
2687{
2688 struct e1000_hw *hw = &adapter->hw;
2689 u32 rctl, rfctl;
2690 u32 psrctl = 0;
2691 u32 pages = 0;
2692
2693 /* Program MC offset vector base */
2694 rctl = er32(RCTL);
2695 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2696 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2697 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2698 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2699
2700 /* Do not Store bad packets */
2701 rctl &= ~E1000_RCTL_SBP;
2702
2703 /* Enable Long Packet receive */
2704 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2705 rctl &= ~E1000_RCTL_LPE;
2706 else
2707 rctl |= E1000_RCTL_LPE;
2708
eb7c3adb
JK		 2709 /* Some systems expect that the CRC is included in SMBUS traffic. The
2710 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2711 * host memory when this is enabled
2712 */
2713 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2714 rctl |= E1000_RCTL_SECRC;
5918bd88 2715
a4f58f54
BA		 2716 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2717 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2718 u16 phy_data;
2719
2720 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2721 phy_data &= 0xfff8;
2722 phy_data |= (1 << 2);
2723 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2724
2725 e1e_rphy(hw, 22, &phy_data);
2726 phy_data &= 0x0fff;
2727 phy_data |= (1 << 14);
2728 e1e_wphy(hw, 0x10, 0x2823);
2729 e1e_wphy(hw, 0x11, 0x0003);
2730 e1e_wphy(hw, 22, phy_data);
2731 }
2732
d3738bb8
BA		 2733 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2734 if (hw->mac.type == e1000_pch2lan) {
2735 s32 ret_val;
2736
2737 if (rctl & E1000_RCTL_LPE)
2738 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2739 else
2740 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2741 }
2742
bc7f75fa
AK		 2743 /* Setup buffer sizes */
2744 rctl &= ~E1000_RCTL_SZ_4096;
2745 rctl |= E1000_RCTL_BSEX;
2746 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2747 case 2048:
2748 default:
2749 rctl |= E1000_RCTL_SZ_2048;
2750 rctl &= ~E1000_RCTL_BSEX;
2751 break;
2752 case 4096:
2753 rctl |= E1000_RCTL_SZ_4096;
2754 break;
2755 case 8192:
2756 rctl |= E1000_RCTL_SZ_8192;
2757 break;
2758 case 16384:
2759 rctl |= E1000_RCTL_SZ_16384;
2760 break;
2761 }
2762
2763 /*
2764 * 82571 and greater support packet-split where the protocol
2765 * header is placed in skb->data and the packet data is
2766 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2767 * In the case of a non-split, skb->data is linearly filled,
2768 * followed by the page buffers. Therefore, skb->data is
2769 * sized to hold the largest protocol header.
2770 *
2771 * allocations using alloc_page take too long for regular MTU
2772 * so only enable packet split for jumbo frames
2773 *
2774 * Using pages when the page size is greater than 16k wastes
2775 * a lot of memory, since we allocate 3 pages at all times
2776 * per packet.
2777 */
bc7f75fa 2778 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2779 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2780 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2781 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2782 else
2783 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2784
2785 if (adapter->rx_ps_pages) {
2786 /* Configure extra packet-split registers */
2787 rfctl = er32(RFCTL);
2788 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2789 /*
2790 * disable packet split support for IPv6 extension headers,
2791 * because some malformed IPv6 headers can hang the Rx
2792 */
bc7f75fa
AK		 2793 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2794 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2795
2796 ew32(RFCTL, rfctl);
2797
140a7480
AK		 2798 /* Enable Packet split descriptors */
2799 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2800
2801 psrctl |= adapter->rx_ps_bsize0 >>
2802 E1000_PSRCTL_BSIZE0_SHIFT;
2803
2804 switch (adapter->rx_ps_pages) {
2805 case 3:
2806 psrctl |= PAGE_SIZE <<
2807 E1000_PSRCTL_BSIZE3_SHIFT;
2808 case 2:
2809 psrctl |= PAGE_SIZE <<
2810 E1000_PSRCTL_BSIZE2_SHIFT;
2811 case 1:
2812 psrctl |= PAGE_SIZE >>
2813 E1000_PSRCTL_BSIZE1_SHIFT;
2814 break;
2815 }
2816
2817 ew32(PSRCTL, psrctl);
2818 }
2819
2820 ew32(RCTL, rctl);
318a94d6
JK		 2821 /* just started the receive unit, no need to restart */
2822 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2823}
2824
2825/**
2826 * e1000_configure_rx - Configure Receive Unit after Reset
2827 * @adapter: board private structure
2828 *
2829 * Configure the Rx unit of the MAC after a reset.
2830 **/
2831static void e1000_configure_rx(struct e1000_adapter *adapter)
2832{
2833 struct e1000_hw *hw = &adapter->hw;
2834 struct e1000_ring *rx_ring = adapter->rx_ring;
2835 u64 rdba;
2836 u32 rdlen, rctl, rxcsum, ctrl_ext;
2837
2838 if (adapter->rx_ps_pages) {
2839 /* this is a 32 byte descriptor */
2840 rdlen = rx_ring->count *
2841 sizeof(union e1000_rx_desc_packet_split);
2842 adapter->clean_rx = e1000_clean_rx_irq_ps;
2843 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2844 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2845 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2846 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2847 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2848 } else {
97ac8cae 2849 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2850 adapter->clean_rx = e1000_clean_rx_irq;
2851 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2852 }
2853
2854 /* disable receives while setting up the descriptors */
2855 rctl = er32(RCTL);
2856 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2857 e1e_flush();
2858 msleep(10);
2859
2860 /* set the Receive Delay Timer Register */
2861 ew32(RDTR, adapter->rx_int_delay);
2862
2863 /* irq moderation */
2864 ew32(RADV, adapter->rx_abs_int_delay);
2865 if (adapter->itr_setting != 0)
ad68076e 2866 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2867
2868 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2869 /* Auto-Mask interrupts upon ICR access */
2870 ctrl_ext |= E1000_CTRL_EXT_IAME;
2871 ew32(IAM, 0xffffffff);
2872 ew32(CTRL_EXT, ctrl_ext);
2873 e1e_flush();
2874
ad68076e
BA		 2875 /*
2876 * Setup the HW Rx Head and Tail Descriptor Pointers and
2877 * the Base and Length of the Rx Descriptor Ring
2878 */
bc7f75fa 2879 rdba = rx_ring->dma;
284901a9 2880 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2881 ew32(RDBAH, (rdba >> 32));
2882 ew32(RDLEN, rdlen);
2883 ew32(RDH, 0);
2884 ew32(RDT, 0);
2885 rx_ring->head = E1000_RDH;
2886 rx_ring->tail = E1000_RDT;
2887
2888 /* Enable Receive Checksum Offload for TCP and UDP */
2889 rxcsum = er32(RXCSUM);
2890 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2891 rxcsum |= E1000_RXCSUM_TUOFL;
2892
ad68076e
BA		 2893 /*
2894 * IPv4 payload checksum for UDP fragments must be
2895 * used in conjunction with packet-split.
2896 */
bc7f75fa
AK		 2897 if (adapter->rx_ps_pages)
2898 rxcsum |= E1000_RXCSUM_IPPCSE;
2899 } else {
2900 rxcsum &= ~E1000_RXCSUM_TUOFL;
2901 /* no need to clear IPPCSE as it defaults to 0 */
2902 }
2903 ew32(RXCSUM, rxcsum);
2904
ad68076e
BA		 2905 /*
2906 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2907 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2908 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2909 */
53ec5498
BA		 2910 if (adapter->flags & FLAG_HAS_ERT) {
2911 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2912 u32 rxdctl = er32(RXDCTL(0));
2913 ew32(RXDCTL(0), rxdctl | 0x3);
2914 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2915 /*
2916 * With jumbo frames and early-receive enabled,
2917 * excessive C-state transition latencies result in
2918 * dropped transactions.
2919 */
ed77134b
MG		 2920 pm_qos_update_request(
2921 adapter->netdev->pm_qos_req, 55);
53ec5498 2922 } else {
ed77134b
MG		 2923 pm_qos_update_request(
2924 adapter->netdev->pm_qos_req,
2925 PM_QOS_DEFAULT_VALUE);
53ec5498 2926 }
97ac8cae 2927 }
bc7f75fa
AK		 2928
2929 /* Enable Receives */
2930 ew32(RCTL, rctl);
2931}
2932
2933/**
e2de3eb6 2934 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2935 * @hw: pointer to the HW structure
2936 * @mc_addr_list: array of multicast addresses to program
2937 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2938 *
ab8932f3 2939 * Updates the Multicast Table Array.
bc7f75fa 2940 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2941 **/
e2de3eb6 2942static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2943 u32 mc_addr_count)
bc7f75fa 2944{
ab8932f3 2945 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 2946}
2947
2948/**
2949 * e1000_set_multi - Multicast and Promiscuous mode set
2950 * @netdev: network interface device structure
2951 *
2952 * The set_multi entry point is called whenever the multicast address
2953 * list or the network interface flags are updated. This routine is
2954 * responsible for configuring the hardware for proper multicast,
2955 * promiscuous mode, and all-multi behavior.
2956 **/
2957static void e1000_set_multi(struct net_device *netdev)
2958{
2959 struct e1000_adapter *adapter = netdev_priv(netdev);
2960 struct e1000_hw *hw = &adapter->hw;
22bedad3 2961 struct netdev_hw_addr *ha;
bc7f75fa
AK		 2962 u8 *mta_list;
2963 u32 rctl;
2964 int i;
2965
2966 /* Check for Promiscuous and All Multicast modes */
2967
2968 rctl = er32(RCTL);
2969
2970 if (netdev->flags & IFF_PROMISC) {
2971 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2972 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2973 } else {
746b9f02
PM		 2974 if (netdev->flags & IFF_ALLMULTI) {
2975 rctl |= E1000_RCTL_MPE;
2976 rctl &= ~E1000_RCTL_UPE;
2977 } else {
2978 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2979 }
78ed11a5 2980 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2981 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2982 }
2983
2984 ew32(RCTL, rctl);
2985
7aeef972
JP		 2986 if (!netdev_mc_empty(netdev)) {
2987 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 2988 if (!mta_list)
2989 return;
2990
2991 /* prepare a packed array of only addresses. */
7aeef972 2992 i = 0;
22bedad3
JP		 2993 netdev_for_each_mc_addr(ha, netdev)
2994 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 2995
ab8932f3 2996 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 2997 kfree(mta_list);
2998 } else {
2999 /*
3000 * if we're called from probe, we might not have
3001 * anything to do here, so clear out the list
3002 */
ab8932f3 3003 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 3004 }
3005}
3006
3007/**
ad68076e 3008 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3009 * @adapter: private board structure
3010 **/
3011static void e1000_configure(struct e1000_adapter *adapter)
3012{
3013 e1000_set_multi(adapter->netdev);
3014
3015 e1000_restore_vlan(adapter);
cd791618 3016 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3017
3018 e1000_configure_tx(adapter);
3019 e1000_setup_rctl(adapter);
3020 e1000_configure_rx(adapter);
ad68076e 3021 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3022}
3023
3024/**
3025 * e1000e_power_up_phy - restore link in case the phy was powered down
3026 * @adapter: address of board private structure
3027 *
3028 * The phy may be powered down to save power and turn off link when the
3029 * driver is unloaded and wake on lan is not enabled (among others)
3030 * *** this routine MUST be followed by a call to e1000e_reset ***
3031 **/
3032void e1000e_power_up_phy(struct e1000_adapter *adapter)
3033{
17f208de
BA		 3034 if (adapter->hw.phy.ops.power_up)
3035 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3036
3037 adapter->hw.mac.ops.setup_link(&adapter->hw);
3038}
3039
3040/**
3041 * e1000_power_down_phy - Power down the PHY
3042 *
17f208de
BA		 3043 * Power down the PHY so no link is implied when interface is down.
3044 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3045 */
3046static void e1000_power_down_phy(struct e1000_adapter *adapter)
3047{
bc7f75fa 3048 /* WoL is enabled */
23b66e2b 3049 if (adapter->wol)
bc7f75fa
AK		 3050 return;
3051
17f208de
BA		 3052 if (adapter->hw.phy.ops.power_down)
3053 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3054}
3055
3056/**
3057 * e1000e_reset - bring the hardware into a known good state
3058 *
3059 * This function boots the hardware and enables some settings that
3060 * require a configuration cycle of the hardware - those cannot be
3061 * set/changed during runtime. After reset the device needs to be
ad68076e 3062 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3063 */
3064void e1000e_reset(struct e1000_adapter *adapter)
3065{
3066 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3067 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3068 struct e1000_hw *hw = &adapter->hw;
3069 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3070 u32 pba = adapter->pba;
bc7f75fa
AK		 3071 u16 hwm;
3072
ad68076e 3073 /* reset Packet Buffer Allocation to default */
318a94d6 3074 ew32(PBA, pba);
df762464 3075
318a94d6 3076 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3077 /*
3078 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3079 * large enough to accommodate two full transmit packets,
3080 * rounded up to the next 1KB and expressed in KB. Likewise,
3081 * the Rx FIFO should be large enough to accommodate at least
3082 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3083 * expressed in KB.
3084 */
df762464 3085 pba = er32(PBA);
bc7f75fa 3086 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3087 tx_space = pba >> 16;
bc7f75fa 3088 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3089 pba &= 0xffff;
ad68076e
BA		 3090 /*
3091 * the Tx fifo also stores 16 bytes of information about the tx
3092 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3093 */
3094 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3095 sizeof(struct e1000_tx_desc) -
3096 ETH_FCS_LEN) * 2;
3097 min_tx_space = ALIGN(min_tx_space, 1024);
3098 min_tx_space >>= 10;
3099 /* software strips receive CRC, so leave room for it */
318a94d6 3100 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3101 min_rx_space = ALIGN(min_rx_space, 1024);
3102 min_rx_space >>= 10;
3103
ad68076e
BA		 3104 /*
3105 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3106 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3107 * allocation, take space away from current Rx allocation
3108 */
df762464
AK		 3109 if ((tx_space < min_tx_space) &&
3110 ((min_tx_space - tx_space) < pba)) {
3111 pba -= min_tx_space - tx_space;
bc7f75fa 3112
ad68076e
BA		 3113 /*
3114 * if short on Rx space, Rx wins and must trump tx
3115 * adjustment or use Early Receive if available
3116 */
df762464 3117 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3118 (!(adapter->flags & FLAG_HAS_ERT)))
3119 /* ERT enabled in e1000_configure_rx */
df762464 3120 pba = min_rx_space;
bc7f75fa 3121 }
df762464
AK		 3122
3123 ew32(PBA, pba);
bc7f75fa
AK		 3124 }
3125
bc7f75fa 3126
ad68076e
BA		 3127 /*
3128 * flow control settings
3129 *
38eb394e 3130 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3131 * (or the size used for early receive) above it in the Rx FIFO.
3132 * Set it to the lower of:
3133 * - 90% of the Rx FIFO size, and
3134 * - the full Rx FIFO size minus the early receive size (for parts
3135 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3136 * - the full Rx FIFO size minus one full frame
ad68076e 3137 */
d3738bb8
BA		 3138 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3139 fc->pause_time = 0xFFFF;
3140 else
3141 fc->pause_time = E1000_FC_PAUSE_TIME;
3142 fc->send_xon = 1;
3143 fc->current_mode = fc->requested_mode;
3144
3145 switch (hw->mac.type) {
3146 default:
3147 if ((adapter->flags & FLAG_HAS_ERT) &&
3148 (adapter->netdev->mtu > ETH_DATA_LEN))
3149 hwm = min(((pba << 10) * 9 / 10),
3150 ((pba << 10) - (E1000_ERT_2048 << 3)));
3151 else
3152 hwm = min(((pba << 10) * 9 / 10),
3153 ((pba << 10) - adapter->max_frame_size));
3154
3155 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3156 fc->low_water = fc->high_water - 8;
3157 break;
3158 case e1000_pchlan:
38eb394e
BA		 3159 /*
3160 * Workaround PCH LOM adapter hangs with certain network
3161 * loads. If hangs persist, try disabling Tx flow control.
3162 */
3163 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3164 fc->high_water = 0x3500;
3165 fc->low_water = 0x1500;
3166 } else {
3167 fc->high_water = 0x5000;
3168 fc->low_water = 0x3000;
3169 }
a305595b 3170 fc->refresh_time = 0x1000;
d3738bb8
BA		 3171 break;
3172 case e1000_pch2lan:
3173 fc->high_water = 0x05C20;
3174 fc->low_water = 0x05048;
3175 fc->pause_time = 0x0650;
3176 fc->refresh_time = 0x0400;
3177 break;
38eb394e 3178 }
bc7f75fa 3179
bc7f75fa
AK		 3180 /* Allow time for pending master requests to run */
3181 mac->ops.reset_hw(hw);
97ac8cae
BA		 3182
3183 /*
3184 * For parts with AMT enabled, let the firmware know
3185 * that the network interface is in control
3186 */
c43bc57e 3187 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 3188 e1000_get_hw_control(adapter);
3189
bc7f75fa
AK		 3190 ew32(WUC, 0);
3191
3192 if (mac->ops.init_hw(hw))
44defeb3 3193 e_err("Hardware Error\n");
bc7f75fa
AK		 3194
3195 e1000_update_mng_vlan(adapter);
3196
3197 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3198 ew32(VET, ETH_P_8021Q);
3199
3200 e1000e_reset_adaptive(hw);
3201 e1000_get_phy_info(hw);
3202
918d7197
BA		 3203 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3204 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3205 u16 phy_data = 0;
ad68076e
BA		 3206 /*
3207 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3208 * the return value of this function because there is nothing
ad68076e
BA		 3209 * different we would do if it failed
3210 */
bc7f75fa
AK		 3211 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3212 phy_data &= ~IGP02E1000_PM_SPD;
3213 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3214 }
bc7f75fa
AK		 3215}
3216
3217int e1000e_up(struct e1000_adapter *adapter)
3218{
3219 struct e1000_hw *hw = &adapter->hw;
3220
3221 /* hardware has been reset, we need to reload some things */
3222 e1000_configure(adapter);
3223
3224 clear_bit(__E1000_DOWN, &adapter->state);
3225
3226 napi_enable(&adapter->napi);
4662e82b
BA		 3227 if (adapter->msix_entries)
3228 e1000_configure_msix(adapter);
bc7f75fa
AK		 3229 e1000_irq_enable(adapter);
3230
4cb9be7a
JB		 3231 netif_wake_queue(adapter->netdev);
3232
bc7f75fa 3233 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3234 if (adapter->msix_entries)
3235 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3236 else
3237 ew32(ICS, E1000_ICS_LSC);
3238
bc7f75fa
AK		 3239 return 0;
3240}
3241
3242void e1000e_down(struct e1000_adapter *adapter)
3243{
3244 struct net_device *netdev = adapter->netdev;
3245 struct e1000_hw *hw = &adapter->hw;
3246 u32 tctl, rctl;
3247
ad68076e
BA		 3248 /*
3249 * signal that we're down so the interrupt handler does not
3250 * reschedule our watchdog timer
3251 */
bc7f75fa
AK		 3252 set_bit(__E1000_DOWN, &adapter->state);
3253
3254 /* disable receives in the hardware */
3255 rctl = er32(RCTL);
3256 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3257 /* flush and sleep below */
3258
4cb9be7a 3259 netif_stop_queue(netdev);
bc7f75fa
AK		 3260
3261 /* disable transmits in the hardware */
3262 tctl = er32(TCTL);
3263 tctl &= ~E1000_TCTL_EN;
3264 ew32(TCTL, tctl);
3265 /* flush both disables and wait for them to finish */
3266 e1e_flush();
3267 msleep(10);
3268
3269 napi_disable(&adapter->napi);
3270 e1000_irq_disable(adapter);
3271
3272 del_timer_sync(&adapter->watchdog_timer);
3273 del_timer_sync(&adapter->phy_info_timer);
3274
bc7f75fa
AK		 3275 netif_carrier_off(netdev);
3276 adapter->link_speed = 0;
3277 adapter->link_duplex = 0;
3278
52cc3086
JK		 3279 if (!pci_channel_offline(adapter->pdev))
3280 e1000e_reset(adapter);
bc7f75fa
AK		 3281 e1000_clean_tx_ring(adapter);
3282 e1000_clean_rx_ring(adapter);
3283
3284 /*
3285 * TODO: for power management, we could drop the link and
3286 * pci_disable_device here.
3287 */
3288}
3289
3290void e1000e_reinit_locked(struct e1000_adapter *adapter)
3291{
3292 might_sleep();
3293 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3294 msleep(1);
3295 e1000e_down(adapter);
3296 e1000e_up(adapter);
3297 clear_bit(__E1000_RESETTING, &adapter->state);
3298}
3299
3300/**
3301 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3302 * @adapter: board private structure to initialize
3303 *
3304 * e1000_sw_init initializes the Adapter private data structure.
3305 * Fields are initialized based on PCI device information and
3306 * OS network device settings (MTU size).
3307 **/
3308static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3309{
bc7f75fa
AK		 3310 struct net_device *netdev = adapter->netdev;
3311
3312 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3313 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3314 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3315 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3316
4662e82b 3317 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3318
4662e82b
BA		 3319 if (e1000_alloc_queues(adapter))
3320 return -ENOMEM;
bc7f75fa 3321
bc7f75fa 3322 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3323 e1000_irq_disable(adapter);
3324
bc7f75fa
AK		 3325 set_bit(__E1000_DOWN, &adapter->state);
3326 return 0;
bc7f75fa
AK		 3327}
3328
f8d59f78
BA		 3329/**
3330 * e1000_intr_msi_test - Interrupt Handler
3331 * @irq: interrupt number
3332 * @data: pointer to a network interface device structure
3333 **/
3334static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3335{
3336 struct net_device *netdev = data;
3337 struct e1000_adapter *adapter = netdev_priv(netdev);
3338 struct e1000_hw *hw = &adapter->hw;
3339 u32 icr = er32(ICR);
3340
3bb99fe2 3341 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3342 if (icr & E1000_ICR_RXSEQ) {
3343 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3344 wmb();
3345 }
3346
3347 return IRQ_HANDLED;
3348}
3349
3350/**
3351 * e1000_test_msi_interrupt - Returns 0 for successful test
3352 * @adapter: board private struct
3353 *
3354 * code flow taken from tg3.c
3355 **/
3356static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3357{
3358 struct net_device *netdev = adapter->netdev;
3359 struct e1000_hw *hw = &adapter->hw;
3360 int err;
3361
3362 /* poll_enable hasn't been called yet, so don't need disable */
3363 /* clear any pending events */
3364 er32(ICR);
3365
3366 /* free the real vector and request a test handler */
3367 e1000_free_irq(adapter);
4662e82b 3368 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3369
3370 /* Assume that the test fails, if it succeeds then the test
3371 * MSI irq handler will unset this flag */
3372 adapter->flags |= FLAG_MSI_TEST_FAILED;
3373
3374 err = pci_enable_msi(adapter->pdev);
3375 if (err)
3376 goto msi_test_failed;
3377
a0607fd3 3378 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3379 netdev->name, netdev);
3380 if (err) {
3381 pci_disable_msi(adapter->pdev);
3382 goto msi_test_failed;
3383 }
3384
3385 wmb();
3386
3387 e1000_irq_enable(adapter);
3388
3389 /* fire an unusual interrupt on the test handler */
3390 ew32(ICS, E1000_ICS_RXSEQ);
3391 e1e_flush();
3392 msleep(50);
3393
3394 e1000_irq_disable(adapter);
3395
3396 rmb();
3397
3398 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3399 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3400 err = -EIO;
3401 e_info("MSI interrupt test failed!\n");
3402 }
3403
3404 free_irq(adapter->pdev->irq, netdev);
3405 pci_disable_msi(adapter->pdev);
3406
3407 if (err == -EIO)
3408 goto msi_test_failed;
3409
3410 /* okay so the test worked, restore settings */
3bb99fe2 3411 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3412msi_test_failed:
4662e82b 3413 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3414 e1000_request_irq(adapter);
3415 return err;
3416}
3417
3418/**
3419 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3420 * @adapter: board private struct
3421 *
3422 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3423 **/
3424static int e1000_test_msi(struct e1000_adapter *adapter)
3425{
3426 int err;
3427 u16 pci_cmd;
3428
3429 if (!(adapter->flags & FLAG_MSI_ENABLED))
3430 return 0;
3431
3432 /* disable SERR in case the MSI write causes a master abort */
3433 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3434 if (pci_cmd & PCI_COMMAND_SERR)
3435 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3436 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3437
3438 err = e1000_test_msi_interrupt(adapter);
3439
36f2407f
DN		 3440 /* re-enable SERR */
3441 if (pci_cmd & PCI_COMMAND_SERR) {
3442 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3443 pci_cmd |= PCI_COMMAND_SERR;
3444 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3445 }
f8d59f78
BA		 3446
3447 /* success ! */
3448 if (!err)
3449 return 0;
3450
3451 /* EIO means MSI test failed */
3452 if (err != -EIO)
3453 return err;
3454
3455 /* back to INTx mode */
3456 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3457
3458 e1000_free_irq(adapter);
3459
3460 err = e1000_request_irq(adapter);
3461
3462 return err;
3463}
3464
bc7f75fa
AK		 3465/**
3466 * e1000_open - Called when a network interface is made active
3467 * @netdev: network interface device structure
3468 *
3469 * Returns 0 on success, negative value on failure
3470 *
3471 * The open entry point is called when a network interface is made
3472 * active by the system (IFF_UP). At this point all resources needed
3473 * for transmit and receive operations are allocated, the interrupt
3474 * handler is registered with the OS, the watchdog timer is started,
3475 * and the stack is notified that the interface is ready.
3476 **/
3477static int e1000_open(struct net_device *netdev)
3478{
3479 struct e1000_adapter *adapter = netdev_priv(netdev);
3480 struct e1000_hw *hw = &adapter->hw;
23606cf5 3481 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3482 int err;
3483
3484 /* disallow open during test */
3485 if (test_bit(__E1000_TESTING, &adapter->state))
3486 return -EBUSY;
3487
23606cf5
RW		 3488 pm_runtime_get_sync(&pdev->dev);
3489
9c563d20
JB		 3490 netif_carrier_off(netdev);
3491
bc7f75fa
AK		 3492 /* allocate transmit descriptors */
3493 err = e1000e_setup_tx_resources(adapter);
3494 if (err)
3495 goto err_setup_tx;
3496
3497 /* allocate receive descriptors */
3498 err = e1000e_setup_rx_resources(adapter);
3499 if (err)
3500 goto err_setup_rx;
3501
11b08be8
BA		 3502 /*
3503 * If AMT is enabled, let the firmware know that the network
3504 * interface is now open and reset the part to a known state.
3505 */
3506 if (adapter->flags & FLAG_HAS_AMT) {
3507 e1000_get_hw_control(adapter);
3508 e1000e_reset(adapter);
3509 }
3510
bc7f75fa
AK		 3511 e1000e_power_up_phy(adapter);
3512
3513 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3514 if ((adapter->hw.mng_cookie.status &
3515 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3516 e1000_update_mng_vlan(adapter);
3517
c128ec29
FM		 3518 /* DMA latency requirement to workaround early-receive/jumbo issue */
3519 if (adapter->flags & FLAG_HAS_ERT)
3520 adapter->netdev->pm_qos_req =
3521 pm_qos_add_request(PM_QOS_CPU_DMA_LATENCY,
3522 PM_QOS_DEFAULT_VALUE);
3523
ad68076e
BA		 3524 /*
3525 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3526 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3527 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3528 * clean_rx handler before we do so.
3529 */
bc7f75fa
AK		 3530 e1000_configure(adapter);
3531
3532 err = e1000_request_irq(adapter);
3533 if (err)
3534 goto err_req_irq;
3535
f8d59f78
BA		 3536 /*
3537 * Work around PCIe errata with MSI interrupts causing some chipsets to
3538 * ignore e1000e MSI messages, which means we need to test our MSI
3539 * interrupt now
3540 */
4662e82b 3541 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3542 err = e1000_test_msi(adapter);
3543 if (err) {
3544 e_err("Interrupt allocation failed\n");
3545 goto err_req_irq;
3546 }
3547 }
3548
bc7f75fa
AK		 3549 /* From here on the code is the same as e1000e_up() */
3550 clear_bit(__E1000_DOWN, &adapter->state);
3551
3552 napi_enable(&adapter->napi);
3553
3554 e1000_irq_enable(adapter);
3555
4cb9be7a 3556 netif_start_queue(netdev);
d55b53ff 3557
23606cf5
RW		 3558 adapter->idle_check = true;
3559 pm_runtime_put(&pdev->dev);
3560
bc7f75fa 3561 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3562 if (adapter->msix_entries)
3563 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3564 else
3565 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3566
3567 return 0;
3568
3569err_req_irq:
3570 e1000_release_hw_control(adapter);
3571 e1000_power_down_phy(adapter);
3572 e1000e_free_rx_resources(adapter);
3573err_setup_rx:
3574 e1000e_free_tx_resources(adapter);
3575err_setup_tx:
3576 e1000e_reset(adapter);
23606cf5 3577 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3578
3579 return err;
3580}
3581
3582/**
3583 * e1000_close - Disables a network interface
3584 * @netdev: network interface device structure
3585 *
3586 * Returns 0, this is not allowed to fail
3587 *
3588 * The close entry point is called when an interface is de-activated
3589 * by the OS. The hardware is still under the drivers control, but
3590 * needs to be disabled. A global MAC reset is issued to stop the
3591 * hardware, and all transmit and receive resources are freed.
3592 **/
3593static int e1000_close(struct net_device *netdev)
3594{
3595 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3596 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3597
3598 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3599
3600 pm_runtime_get_sync(&pdev->dev);
3601
3602 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3603 e1000e_down(adapter);
3604 e1000_free_irq(adapter);
3605 }
bc7f75fa 3606 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3607
3608 e1000e_free_tx_resources(adapter);
3609 e1000e_free_rx_resources(adapter);
3610
ad68076e
BA		 3611 /*
3612 * kill manageability vlan ID if supported, but not if a vlan with
3613 * the same ID is registered on the host OS (let 8021q kill it)
3614 */
bc7f75fa
AK		 3615 if ((adapter->hw.mng_cookie.status &
3616 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3617 !(adapter->vlgrp &&
3618 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3619 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3620
ad68076e
BA		 3621 /*
3622 * If AMT is enabled, let the firmware know that the network
3623 * interface is now closed
3624 */
c43bc57e 3625 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3626 e1000_release_hw_control(adapter);
3627
c128ec29
FM		 3628 if (adapter->flags & FLAG_HAS_ERT) {
3629 pm_qos_remove_request(adapter->netdev->pm_qos_req);
3630 adapter->netdev->pm_qos_req = NULL;
3631 }
3632
23606cf5
RW		 3633 pm_runtime_put_sync(&pdev->dev);
3634
bc7f75fa
AK		 3635 return 0;
3636}
3637/**
3638 * e1000_set_mac - Change the Ethernet Address of the NIC
3639 * @netdev: network interface device structure
3640 * @p: pointer to an address structure
3641 *
3642 * Returns 0 on success, negative on failure
3643 **/
3644static int e1000_set_mac(struct net_device *netdev, void *p)
3645{
3646 struct e1000_adapter *adapter = netdev_priv(netdev);
3647 struct sockaddr *addr = p;
3648
3649 if (!is_valid_ether_addr(addr->sa_data))
3650 return -EADDRNOTAVAIL;
3651
3652 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3653 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3654
3655 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3656
3657 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3658 /* activate the work around */
3659 e1000e_set_laa_state_82571(&adapter->hw, 1);
3660
ad68076e
BA		 3661 /*
3662 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3663 * between the time RAR[0] gets clobbered and the time it
3664 * gets fixed (in e1000_watchdog), the actual LAA is in one
3665 * of the RARs and no incoming packets directed to this port
3666 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3667 * RAR[14]
3668 */
bc7f75fa
AK		 3669 e1000e_rar_set(&adapter->hw,
3670 adapter->hw.mac.addr,
3671 adapter->hw.mac.rar_entry_count - 1);
3672 }
3673
3674 return 0;
3675}
3676
a8f88ff5
JB		 3677/**
3678 * e1000e_update_phy_task - work thread to update phy
3679 * @work: pointer to our work struct
3680 *
3681 * this worker thread exists because we must acquire a
3682 * semaphore to read the phy, which we could msleep while
3683 * waiting for it, and we can't msleep in a timer.
3684 **/
3685static void e1000e_update_phy_task(struct work_struct *work)
3686{
3687 struct e1000_adapter *adapter = container_of(work,
3688 struct e1000_adapter, update_phy_task);
3689 e1000_get_phy_info(&adapter->hw);
3690}
3691
ad68076e
BA		 3692/*
3693 * Need to wait a few seconds after link up to get diagnostic information from
3694 * the phy
3695 */
bc7f75fa
AK		 3696static void e1000_update_phy_info(unsigned long data)
3697{
3698 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3699 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3700}
3701
8c7bbb92
BA		 3702/**
3703 * e1000e_update_phy_stats - Update the PHY statistics counters
3704 * @adapter: board private structure
3705 **/
3706static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3707{
3708 struct e1000_hw *hw = &adapter->hw;
3709 s32 ret_val;
3710 u16 phy_data;
3711
3712 ret_val = hw->phy.ops.acquire(hw);
3713 if (ret_val)
3714 return;
3715
3716 hw->phy.addr = 1;
3717
3718#define HV_PHY_STATS_PAGE 778
3719 /*
3720 * A page set is expensive so check if already on desired page.
3721 * If not, set to the page with the PHY status registers.
3722 */
3723 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3724 &phy_data);
3725 if (ret_val)
3726 goto release;
3727 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3728 ret_val = e1000e_write_phy_reg_mdic(hw,
3729 IGP01E1000_PHY_PAGE_SELECT,
3730 (HV_PHY_STATS_PAGE <<
3731 IGP_PAGE_SHIFT));
3732 if (ret_val)
3733 goto release;
3734 }
3735
3736 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3737
3738 /* Single Collision Count */
3739 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3740 &phy_data);
3741 ret_val = e1000e_read_phy_reg_mdic(hw,
3742 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3743 &phy_data);
3744 if (!ret_val)
3745 adapter->stats.scc += phy_data;
3746
3747 /* Excessive Collision Count */
3748 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3749 &phy_data);
3750 ret_val = e1000e_read_phy_reg_mdic(hw,
3751 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3752 &phy_data);
3753 if (!ret_val)
3754 adapter->stats.ecol += phy_data;
3755
3756 /* Multiple Collision Count */
3757 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3758 &phy_data);
3759 ret_val = e1000e_read_phy_reg_mdic(hw,
3760 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3761 &phy_data);
3762 if (!ret_val)
3763 adapter->stats.mcc += phy_data;
3764
3765 /* Late Collision Count */
3766 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3767 &phy_data);
3768 ret_val = e1000e_read_phy_reg_mdic(hw,
3769 HV_LATECOL_LOWER &
3770 MAX_PHY_REG_ADDRESS,
3771 &phy_data);
3772 if (!ret_val)
3773 adapter->stats.latecol += phy_data;
3774
3775 /* Collision Count - also used for adaptive IFS */
3776 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3777 &phy_data);
3778 ret_val = e1000e_read_phy_reg_mdic(hw,
3779 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3780 &phy_data);
3781 if (!ret_val)
3782 hw->mac.collision_delta = phy_data;
3783
3784 /* Defer Count */
3785 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3786 &phy_data);
3787 ret_val = e1000e_read_phy_reg_mdic(hw,
3788 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3789 &phy_data);
3790 if (!ret_val)
3791 adapter->stats.dc += phy_data;
3792
3793 /* Transmit with no CRS */
3794 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3795 &phy_data);
3796 ret_val = e1000e_read_phy_reg_mdic(hw,
3797 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3798 &phy_data);
3799 if (!ret_val)
3800 adapter->stats.tncrs += phy_data;
3801
3802release:
3803 hw->phy.ops.release(hw);
3804}
3805
bc7f75fa
AK		 3806/**
3807 * e1000e_update_stats - Update the board statistics counters
3808 * @adapter: board private structure
3809 **/
3810void e1000e_update_stats(struct e1000_adapter *adapter)
3811{
7274c20f 3812 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3813 struct e1000_hw *hw = &adapter->hw;
3814 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3815
3816 /*
3817 * Prevent stats update while adapter is being reset, or if the pci
3818 * connection is down.
3819 */
3820 if (adapter->link_speed == 0)
3821 return;
3822 if (pci_channel_offline(pdev))
3823 return;
3824
bc7f75fa
AK		 3825 adapter->stats.crcerrs += er32(CRCERRS);
3826 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3827 adapter->stats.gorc += er32(GORCL);
3828 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3829 adapter->stats.bprc += er32(BPRC);
3830 adapter->stats.mprc += er32(MPRC);
3831 adapter->stats.roc += er32(ROC);
3832
bc7f75fa 3833 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3834
3835 /* Half-duplex statistics */
3836 if (adapter->link_duplex == HALF_DUPLEX) {
3837 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3838 e1000e_update_phy_stats(adapter);
3839 } else {
3840 adapter->stats.scc += er32(SCC);
3841 adapter->stats.ecol += er32(ECOL);
3842 adapter->stats.mcc += er32(MCC);
3843 adapter->stats.latecol += er32(LATECOL);
3844 adapter->stats.dc += er32(DC);
3845
3846 hw->mac.collision_delta = er32(COLC);
3847
3848 if ((hw->mac.type != e1000_82574) &&
3849 (hw->mac.type != e1000_82583))
3850 adapter->stats.tncrs += er32(TNCRS);
3851 }
3852 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3853 }
8c7bbb92 3854
bc7f75fa
AK		 3855 adapter->stats.xonrxc += er32(XONRXC);
3856 adapter->stats.xontxc += er32(XONTXC);
3857 adapter->stats.xoffrxc += er32(XOFFRXC);
3858 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3859 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3860 adapter->stats.gotc += er32(GOTCL);
3861 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3862 adapter->stats.rnbc += er32(RNBC);
3863 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3864
3865 adapter->stats.mptc += er32(MPTC);
3866 adapter->stats.bptc += er32(BPTC);
3867
3868 /* used for adaptive IFS */
3869
3870 hw->mac.tx_packet_delta = er32(TPT);
3871 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3872
3873 adapter->stats.algnerrc += er32(ALGNERRC);
3874 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3875 adapter->stats.cexterr += er32(CEXTERR);
3876 adapter->stats.tsctc += er32(TSCTC);
3877 adapter->stats.tsctfc += er32(TSCTFC);
3878
bc7f75fa 3879 /* Fill out the OS statistics structure */
7274c20f
AK		 3880 netdev->stats.multicast = adapter->stats.mprc;
3881 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3882
3883 /* Rx Errors */
3884
ad68076e
BA		 3885 /*
3886 * RLEC on some newer hardware can be incorrect so build
3887 * our own version based on RUC and ROC
3888 */
7274c20f 3889 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3890 adapter->stats.crcerrs + adapter->stats.algnerrc +
3891 adapter->stats.ruc + adapter->stats.roc +
3892 adapter->stats.cexterr;
7274c20f 3893 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3894 adapter->stats.roc;
7274c20f
AK		 3895 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3896 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3897 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3898
3899 /* Tx Errors */
7274c20f 3900 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3901 adapter->stats.latecol;
7274c20f
AK		 3902 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3903 netdev->stats.tx_window_errors = adapter->stats.latecol;
3904 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3905
3906 /* Tx Dropped needs to be maintained elsewhere */
3907
bc7f75fa
AK		 3908 /* Management Stats */
3909 adapter->stats.mgptc += er32(MGTPTC);
3910 adapter->stats.mgprc += er32(MGTPRC);
3911 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3912}
3913
7c25769f
BA		 3914/**
3915 * e1000_phy_read_status - Update the PHY register status snapshot
3916 * @adapter: board private structure
3917 **/
3918static void e1000_phy_read_status(struct e1000_adapter *adapter)
3919{
3920 struct e1000_hw *hw = &adapter->hw;
3921 struct e1000_phy_regs *phy = &adapter->phy_regs;
3922 int ret_val;
7c25769f
BA		 3923
3924 if ((er32(STATUS) & E1000_STATUS_LU) &&
3925 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3926 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3927 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3928 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3929 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3930 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3931 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3932 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3933 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3934 if (ret_val)
44defeb3 3935 e_warn("Error reading PHY register\n");
7c25769f
BA		 3936 } else {
3937 /*
3938 * Do not read PHY registers if link is not up
3939 * Set values to typical power-on defaults
3940 */
3941 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3942 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3943 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3944 BMSR_ERCAP);
3945 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3946 ADVERTISE_ALL | ADVERTISE_CSMA);
3947 phy->lpa = 0;
3948 phy->expansion = EXPANSION_ENABLENPAGE;
3949 phy->ctrl1000 = ADVERTISE_1000FULL;
3950 phy->stat1000 = 0;
3951 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3952 }
7c25769f
BA		 3953}
3954
bc7f75fa
AK		 3955static void e1000_print_link_info(struct e1000_adapter *adapter)
3956{
bc7f75fa
AK		 3957 struct e1000_hw *hw = &adapter->hw;
3958 u32 ctrl = er32(CTRL);
3959
8f12fe86
BA		 3960 /* Link status message must follow this format for user tools */
3961 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3962 "Flow Control: %s\n",
3963 adapter->netdev->name,
44defeb3
JK		 3964 adapter->link_speed,
3965 (adapter->link_duplex == FULL_DUPLEX) ?
3966 "Full Duplex" : "Half Duplex",
3967 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3968 "RX/TX" :
3969 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3970 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3971}
3972
0c6bdb30 3973static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3974{
3975 struct e1000_hw *hw = &adapter->hw;
3976 bool link_active = 0;
3977 s32 ret_val = 0;
3978
3979 /*
3980 * get_link_status is set on LSC (link status) interrupt or
3981 * Rx sequence error interrupt. get_link_status will stay
3982 * false until the check_for_link establishes link
3983 * for copper adapters ONLY
3984 */
3985 switch (hw->phy.media_type) {
3986 case e1000_media_type_copper:
3987 if (hw->mac.get_link_status) {
3988 ret_val = hw->mac.ops.check_for_link(hw);
3989 link_active = !hw->mac.get_link_status;
3990 } else {
3991 link_active = 1;
3992 }
3993 break;
3994 case e1000_media_type_fiber:
3995 ret_val = hw->mac.ops.check_for_link(hw);
3996 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3997 break;
3998 case e1000_media_type_internal_serdes:
3999 ret_val = hw->mac.ops.check_for_link(hw);
4000 link_active = adapter->hw.mac.serdes_has_link;
4001 break;
4002 default:
4003 case e1000_media_type_unknown:
4004 break;
4005 }
4006
4007 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4008 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4009 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4010 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4011 }
4012
4013 return link_active;
4014}
4015
4016static void e1000e_enable_receives(struct e1000_adapter *adapter)
4017{
4018 /* make sure the receive unit is started */
4019 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4020 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4021 struct e1000_hw *hw = &adapter->hw;
4022 u32 rctl = er32(RCTL);
4023 ew32(RCTL, rctl | E1000_RCTL_EN);
4024 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4025 }
4026}
4027
bc7f75fa
AK		 4028/**
4029 * e1000_watchdog - Timer Call-back
4030 * @data: pointer to adapter cast into an unsigned long
4031 **/
4032static void e1000_watchdog(unsigned long data)
4033{
4034 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4035
4036 /* Do the rest outside of interrupt context */
4037 schedule_work(&adapter->watchdog_task);
4038
4039 /* TODO: make this use queue_delayed_work() */
4040}
4041
4042static void e1000_watchdog_task(struct work_struct *work)
4043{
4044 struct e1000_adapter *adapter = container_of(work,
4045 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4046 struct net_device *netdev = adapter->netdev;
4047 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4048 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4049 struct e1000_ring *tx_ring = adapter->tx_ring;
4050 struct e1000_hw *hw = &adapter->hw;
4051 u32 link, tctl;
bc7f75fa
AK		 4052 int tx_pending = 0;
4053
b405e8df 4054 link = e1000e_has_link(adapter);
318a94d6 4055 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4056 /* Cancel scheduled suspend requests. */
4057 pm_runtime_resume(netdev->dev.parent);
4058
318a94d6 4059 e1000e_enable_receives(adapter);
bc7f75fa 4060 goto link_up;
bc7f75fa
AK		 4061 }
4062
4063 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4064 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4065 e1000_update_mng_vlan(adapter);
4066
bc7f75fa
AK		 4067 if (link) {
4068 if (!netif_carrier_ok(netdev)) {
4069 bool txb2b = 1;
23606cf5
RW		 4070
4071 /* Cancel scheduled suspend requests. */
4072 pm_runtime_resume(netdev->dev.parent);
4073
318a94d6 4074 /* update snapshot of PHY registers on LSC */
7c25769f 4075 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4076 mac->ops.get_link_up_info(&adapter->hw,
4077 &adapter->link_speed,
4078 &adapter->link_duplex);
4079 e1000_print_link_info(adapter);
f4187b56
BA		 4080 /*
4081 * On supported PHYs, check for duplex mismatch only
4082 * if link has autonegotiated at 10/100 half
4083 */
4084 if ((hw->phy.type == e1000_phy_igp_3 ||
4085 hw->phy.type == e1000_phy_bm) &&
4086 (hw->mac.autoneg == true) &&
4087 (adapter->link_speed == SPEED_10 ||
4088 adapter->link_speed == SPEED_100) &&
4089 (adapter->link_duplex == HALF_DUPLEX)) {
4090 u16 autoneg_exp;
4091
4092 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4093
4094 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4095 e_info("Autonegotiated half duplex but"
4096 " link partner cannot autoneg. "
4097 " Try forcing full duplex if "
4098 "link gets many collisions.\n");
4099 }
4100
f49c57e1 4101 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4102 adapter->tx_timeout_factor = 1;
4103 switch (adapter->link_speed) {
4104 case SPEED_10:
4105 txb2b = 0;
10f1b492 4106 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4107 break;
4108 case SPEED_100:
4109 txb2b = 0;
4c86e0b9 4110 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4111 break;
4112 }
4113
ad68076e
BA		 4114 /*
4115 * workaround: re-program speed mode bit after
4116 * link-up event
4117 */
bc7f75fa
AK		 4118 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4119 !txb2b) {
4120 u32 tarc0;
e9ec2c0f 4121 tarc0 = er32(TARC(0));
bc7f75fa 4122 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4123 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4124 }
4125
ad68076e
BA		 4126 /*
4127 * disable TSO for pcie and 10/100 speeds, to avoid
4128 * some hardware issues
4129 */
bc7f75fa
AK		 4130 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4131 switch (adapter->link_speed) {
4132 case SPEED_10:
4133 case SPEED_100:
44defeb3 4134 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4135 netdev->features &= ~NETIF_F_TSO;
4136 netdev->features &= ~NETIF_F_TSO6;
4137 break;
4138 case SPEED_1000:
4139 netdev->features |= NETIF_F_TSO;
4140 netdev->features |= NETIF_F_TSO6;
4141 break;
4142 default:
4143 /* oops */
4144 break;
4145 }
4146 }
4147
ad68076e
BA		 4148 /*
4149 * enable transmits in the hardware, need to do this
4150 * after setting TARC(0)
4151 */
bc7f75fa
AK		 4152 tctl = er32(TCTL);
4153 tctl |= E1000_TCTL_EN;
4154 ew32(TCTL, tctl);
4155
75eb0fad
BA		 4156 /*
4157 * Perform any post-link-up configuration before
4158 * reporting link up.
4159 */
4160 if (phy->ops.cfg_on_link_up)
4161 phy->ops.cfg_on_link_up(hw);
4162
bc7f75fa 4163 netif_carrier_on(netdev);
bc7f75fa
AK		 4164
4165 if (!test_bit(__E1000_DOWN, &adapter->state))
4166 mod_timer(&adapter->phy_info_timer,
4167 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4168 }
4169 } else {
4170 if (netif_carrier_ok(netdev)) {
4171 adapter->link_speed = 0;
4172 adapter->link_duplex = 0;
8f12fe86
BA		 4173 /* Link status message must follow this format */
4174 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4175 adapter->netdev->name);
bc7f75fa 4176 netif_carrier_off(netdev);
bc7f75fa
AK		 4177 if (!test_bit(__E1000_DOWN, &adapter->state))
4178 mod_timer(&adapter->phy_info_timer,
4179 round_jiffies(jiffies + 2 * HZ));
4180
4181 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4182 schedule_work(&adapter->reset_task);
23606cf5
RW		 4183 else
4184 pm_schedule_suspend(netdev->dev.parent,
4185 LINK_TIMEOUT);
bc7f75fa
AK		 4186 }
4187 }
4188
4189link_up:
4190 e1000e_update_stats(adapter);
4191
4192 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4193 adapter->tpt_old = adapter->stats.tpt;
4194 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4195 adapter->colc_old = adapter->stats.colc;
4196
7c25769f
BA		 4197 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4198 adapter->gorc_old = adapter->stats.gorc;
4199 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4200 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4201
4202 e1000e_update_adaptive(&adapter->hw);
4203
4204 if (!netif_carrier_ok(netdev)) {
4205 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4206 tx_ring->count);
4207 if (tx_pending) {
ad68076e
BA		 4208 /*
4209 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4210 * but we've got queued Tx work that's never going
4211 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4212 * (Do the reset outside of interrupt context).
4213 */
bc7f75fa
AK		 4214 adapter->tx_timeout_count++;
4215 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4216 /* return immediately since reset is imminent */
4217 return;
bc7f75fa
AK		 4218 }
4219 }
4220
eab2abf5
JB		 4221 /* Simple mode for Interrupt Throttle Rate (ITR) */
4222 if (adapter->itr_setting == 4) {
4223 /*
4224 * Symmetric Tx/Rx gets a reduced ITR=2000;
4225 * Total asymmetrical Tx or Rx gets ITR=8000;
4226 * everyone else is between 2000-8000.
4227 */
4228 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4229 u32 dif = (adapter->gotc > adapter->gorc ?
4230 adapter->gotc - adapter->gorc :
4231 adapter->gorc - adapter->gotc) / 10000;
4232 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4233
4234 ew32(ITR, 1000000000 / (itr * 256));
4235 }
4236
ad68076e 4237 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4238 if (adapter->msix_entries)
4239 ew32(ICS, adapter->rx_ring->ims_val);
4240 else
4241 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4242
4243 /* Force detection of hung controller every watchdog period */
4244 adapter->detect_tx_hung = 1;
4245
ad68076e
BA		 4246 /*
4247 * With 82571 controllers, LAA may be overwritten due to controller
4248 * reset from the other port. Set the appropriate LAA in RAR[0]
4249 */
bc7f75fa
AK		 4250 if (e1000e_get_laa_state_82571(hw))
4251 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4252
4253 /* Reset the timer */
4254 if (!test_bit(__E1000_DOWN, &adapter->state))
4255 mod_timer(&adapter->watchdog_timer,
4256 round_jiffies(jiffies + 2 * HZ));
4257}
4258
4259#define E1000_TX_FLAGS_CSUM 0x00000001
4260#define E1000_TX_FLAGS_VLAN 0x00000002
4261#define E1000_TX_FLAGS_TSO 0x00000004
4262#define E1000_TX_FLAGS_IPV4 0x00000008
4263#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4264#define E1000_TX_FLAGS_VLAN_SHIFT 16
4265
4266static int e1000_tso(struct e1000_adapter *adapter,
4267 struct sk_buff *skb)
4268{
4269 struct e1000_ring *tx_ring = adapter->tx_ring;
4270 struct e1000_context_desc *context_desc;
4271 struct e1000_buffer *buffer_info;
4272 unsigned int i;
4273 u32 cmd_length = 0;
4274 u16 ipcse = 0, tucse, mss;
4275 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4276 int err;
4277
3d5e33c9
BA		 4278 if (!skb_is_gso(skb))
4279 return 0;
bc7f75fa 4280
3d5e33c9
BA		 4281 if (skb_header_cloned(skb)) {
4282 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4283 if (err)
4284 return err;
bc7f75fa
AK		 4285 }
4286
3d5e33c9
BA		 4287 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4288 mss = skb_shinfo(skb)->gso_size;
4289 if (skb->protocol == htons(ETH_P_IP)) {
4290 struct iphdr *iph = ip_hdr(skb);
4291 iph->tot_len = 0;
4292 iph->check = 0;
4293 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4294 0, IPPROTO_TCP, 0);
4295 cmd_length = E1000_TXD_CMD_IP;
4296 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4297 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4298 ipv6_hdr(skb)->payload_len = 0;
4299 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4300 &ipv6_hdr(skb)->daddr,
4301 0, IPPROTO_TCP, 0);
4302 ipcse = 0;
4303 }
4304 ipcss = skb_network_offset(skb);
4305 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4306 tucss = skb_transport_offset(skb);
4307 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4308 tucse = 0;
4309
4310 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4311 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4312
4313 i = tx_ring->next_to_use;
4314 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4315 buffer_info = &tx_ring->buffer_info[i];
4316
4317 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4318 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4319 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4320 context_desc->upper_setup.tcp_fields.tucss = tucss;
4321 context_desc->upper_setup.tcp_fields.tucso = tucso;
4322 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4323 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4324 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4325 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4326
4327 buffer_info->time_stamp = jiffies;
4328 buffer_info->next_to_watch = i;
4329
4330 i++;
4331 if (i == tx_ring->count)
4332 i = 0;
4333 tx_ring->next_to_use = i;
4334
4335 return 1;
bc7f75fa
AK		 4336}
4337
4338static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4339{
4340 struct e1000_ring *tx_ring = adapter->tx_ring;
4341 struct e1000_context_desc *context_desc;
4342 struct e1000_buffer *buffer_info;
4343 unsigned int i;
4344 u8 css;
af807c82 4345 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4346 __be16 protocol;
bc7f75fa 4347
af807c82
DG		 4348 if (skb->ip_summed != CHECKSUM_PARTIAL)
4349 return 0;
bc7f75fa 4350
5f66f208
AJ		 4351 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4352 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4353 else
4354 protocol = skb->protocol;
4355
3f518390 4356 switch (protocol) {
09640e63 4357 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4358 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4359 cmd_len |= E1000_TXD_CMD_TCP;
4360 break;
09640e63 4361 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4362 /* XXX not handling all IPV6 headers */
4363 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4364 cmd_len |= E1000_TXD_CMD_TCP;
4365 break;
4366 default:
4367 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4368 e_warn("checksum_partial proto=%x!\n",
4369 be16_to_cpu(protocol));
af807c82 4370 break;
bc7f75fa
AK		 4371 }
4372
af807c82
DG		 4373 css = skb_transport_offset(skb);
4374
4375 i = tx_ring->next_to_use;
4376 buffer_info = &tx_ring->buffer_info[i];
4377 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4378
4379 context_desc->lower_setup.ip_config = 0;
4380 context_desc->upper_setup.tcp_fields.tucss = css;
4381 context_desc->upper_setup.tcp_fields.tucso =
4382 css + skb->csum_offset;
4383 context_desc->upper_setup.tcp_fields.tucse = 0;
4384 context_desc->tcp_seg_setup.data = 0;
4385 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4386
4387 buffer_info->time_stamp = jiffies;
4388 buffer_info->next_to_watch = i;
4389
4390 i++;
4391 if (i == tx_ring->count)
4392 i = 0;
4393 tx_ring->next_to_use = i;
4394
4395 return 1;
bc7f75fa
AK		 4396}
4397
4398#define E1000_MAX_PER_TXD 8192
4399#define E1000_MAX_TXD_PWR 12
4400
4401static int e1000_tx_map(struct e1000_adapter *adapter,
4402 struct sk_buff *skb, unsigned int first,
4403 unsigned int max_per_txd, unsigned int nr_frags,
4404 unsigned int mss)
4405{
4406 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4407 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4408 struct e1000_buffer *buffer_info;
8ddc951c 4409 unsigned int len = skb_headlen(skb);
03b1320d 4410 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4411 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4412
4413 i = tx_ring->next_to_use;
4414
4415 while (len) {
1b7719c4 4416 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4417 size = min(len, max_per_txd);
4418
bc7f75fa 4419 buffer_info->length = size;
bc7f75fa 4420 buffer_info->time_stamp = jiffies;
bc7f75fa 4421 buffer_info->next_to_watch = i;
0be3f55f
NN		 4422 buffer_info->dma = dma_map_single(&pdev->dev,
4423 skb->data + offset,
4424 size, DMA_TO_DEVICE);
03b1320d 4425 buffer_info->mapped_as_page = false;
0be3f55f 4426 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4427 goto dma_error;
bc7f75fa
AK		 4428
4429 len -= size;
4430 offset += size;
03b1320d 4431 count++;
1b7719c4
AD		 4432
4433 if (len) {
4434 i++;
4435 if (i == tx_ring->count)
4436 i = 0;
4437 }
bc7f75fa
AK		 4438 }
4439
4440 for (f = 0; f < nr_frags; f++) {
4441 struct skb_frag_struct *frag;
4442
4443 frag = &skb_shinfo(skb)->frags[f];
4444 len = frag->size;
03b1320d 4445 offset = frag->page_offset;
bc7f75fa
AK		 4446
4447 while (len) {
1b7719c4
AD		 4448 i++;
4449 if (i == tx_ring->count)
4450 i = 0;
4451
bc7f75fa
AK		 4452 buffer_info = &tx_ring->buffer_info[i];
4453 size = min(len, max_per_txd);
bc7f75fa
AK		 4454
4455 buffer_info->length = size;
4456 buffer_info->time_stamp = jiffies;
bc7f75fa 4457 buffer_info->next_to_watch = i;
0be3f55f 4458 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4459 offset, size,
0be3f55f 4460 DMA_TO_DEVICE);
03b1320d 4461 buffer_info->mapped_as_page = true;
0be3f55f 4462 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4463 goto dma_error;
bc7f75fa
AK		 4464
4465 len -= size;
4466 offset += size;
4467 count++;
bc7f75fa
AK		 4468 }
4469 }
4470
9ed318d5
TH		 4471 segs = skb_shinfo(skb)->gso_segs ?: 1;
4472 /* multiply data chunks by size of headers */
4473 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4474
bc7f75fa 4475 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4476 tx_ring->buffer_info[i].segs = segs;
4477 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4478 tx_ring->buffer_info[first].next_to_watch = i;
4479
4480 return count;
03b1320d
AD		 4481
4482dma_error:
4483 dev_err(&pdev->dev, "TX DMA map failed\n");
4484 buffer_info->dma = 0;
c1fa347f 4485 if (count)
03b1320d 4486 count--;
c1fa347f
RK		 4487
4488 while (count--) {
4489 if (i==0)
03b1320d 4490 i += tx_ring->count;
c1fa347f 4491 i--;
03b1320d
AD		 4492 buffer_info = &tx_ring->buffer_info[i];
4493 e1000_put_txbuf(adapter, buffer_info);;
4494 }
4495
4496 return 0;
bc7f75fa
AK		 4497}
4498
4499static void e1000_tx_queue(struct e1000_adapter *adapter,
4500 int tx_flags, int count)
4501{
4502 struct e1000_ring *tx_ring = adapter->tx_ring;
4503 struct e1000_tx_desc *tx_desc = NULL;
4504 struct e1000_buffer *buffer_info;
4505 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4506 unsigned int i;
4507
4508 if (tx_flags & E1000_TX_FLAGS_TSO) {
4509 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4510 E1000_TXD_CMD_TSE;
4511 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4512
4513 if (tx_flags & E1000_TX_FLAGS_IPV4)
4514 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4515 }
4516
4517 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4518 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4519 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4520 }
4521
4522 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4523 txd_lower |= E1000_TXD_CMD_VLE;
4524 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4525 }
4526
4527 i = tx_ring->next_to_use;
4528
4529 while (count--) {
4530 buffer_info = &tx_ring->buffer_info[i];
4531 tx_desc = E1000_TX_DESC(*tx_ring, i);
4532 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4533 tx_desc->lower.data =
4534 cpu_to_le32(txd_lower | buffer_info->length);
4535 tx_desc->upper.data = cpu_to_le32(txd_upper);
4536
4537 i++;
4538 if (i == tx_ring->count)
4539 i = 0;
4540 }
4541
4542 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4543
ad68076e
BA		 4544 /*
4545 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4546 * know there are new descriptors to fetch. (Only
4547 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4548 * such as IA-64).
4549 */
bc7f75fa
AK		 4550 wmb();
4551
4552 tx_ring->next_to_use = i;
4553 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4554 /*
4555 * we need this if more than one processor can write to our tail
4556 * at a time, it synchronizes IO on IA64/Altix systems
4557 */
bc7f75fa
AK		 4558 mmiowb();
4559}
4560
4561#define MINIMUM_DHCP_PACKET_SIZE 282
4562static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4563 struct sk_buff *skb)
4564{
4565 struct e1000_hw *hw = &adapter->hw;
4566 u16 length, offset;
4567
4568 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4569 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4570 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4571 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4572 return 0;
4573 }
4574
4575 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4576 return 0;
4577
4578 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4579 return 0;
4580
4581 {
4582 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4583 struct udphdr *udp;
4584
4585 if (ip->protocol != IPPROTO_UDP)
4586 return 0;
4587
4588 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4589 if (ntohs(udp->dest) != 67)
4590 return 0;
4591
4592 offset = (u8 *)udp + 8 - skb->data;
4593 length = skb->len - offset;
4594 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4595 }
4596
4597 return 0;
4598}
4599
4600static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4601{
4602 struct e1000_adapter *adapter = netdev_priv(netdev);
4603
4604 netif_stop_queue(netdev);
ad68076e
BA		 4605 /*
4606 * Herbert's original patch had:
bc7f75fa 4607 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4608 * but since that doesn't exist yet, just open code it.
4609 */
bc7f75fa
AK		 4610 smp_mb();
4611
ad68076e
BA		 4612 /*
4613 * We need to check again in a case another CPU has just
4614 * made room available.
4615 */
bc7f75fa
AK		 4616 if (e1000_desc_unused(adapter->tx_ring) < size)
4617 return -EBUSY;
4618
4619 /* A reprieve! */
4620 netif_start_queue(netdev);
4621 ++adapter->restart_queue;
4622 return 0;
4623}
4624
4625static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4626{
4627 struct e1000_adapter *adapter = netdev_priv(netdev);
4628
4629 if (e1000_desc_unused(adapter->tx_ring) >= size)
4630 return 0;
4631 return __e1000_maybe_stop_tx(netdev, size);
4632}
4633
4634#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4635static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4636 struct net_device *netdev)
bc7f75fa
AK		 4637{
4638 struct e1000_adapter *adapter = netdev_priv(netdev);
4639 struct e1000_ring *tx_ring = adapter->tx_ring;
4640 unsigned int first;
4641 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4642 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4643 unsigned int tx_flags = 0;
e743d313 4644 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4645 unsigned int nr_frags;
4646 unsigned int mss;
bc7f75fa
AK		 4647 int count = 0;
4648 int tso;
4649 unsigned int f;
bc7f75fa
AK		 4650
4651 if (test_bit(__E1000_DOWN, &adapter->state)) {
4652 dev_kfree_skb_any(skb);
4653 return NETDEV_TX_OK;
4654 }
4655
4656 if (skb->len <= 0) {
4657 dev_kfree_skb_any(skb);
4658 return NETDEV_TX_OK;
4659 }
4660
4661 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4662 /*
4663 * The controller does a simple calculation to
bc7f75fa
AK		 4664 * make sure there is enough room in the FIFO before
4665 * initiating the DMA for each buffer. The calc is:
4666 * 4 = ceil(buffer len/mss). To make sure we don't
4667 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4668 * drops.
4669 */
bc7f75fa
AK		 4670 if (mss) {
4671 u8 hdr_len;
4672 max_per_txd = min(mss << 2, max_per_txd);
4673 max_txd_pwr = fls(max_per_txd) - 1;
4674
ad68076e
BA		 4675 /*
4676 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4677 * points to just header, pull a few bytes of payload from
4678 * frags into skb->data
4679 */
bc7f75fa 4680 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4681 /*
4682 * we do this workaround for ES2LAN, but it is un-necessary,
4683 * avoiding it could save a lot of cycles
4684 */
4e6c709c 4685 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4686 unsigned int pull_size;
4687
4688 pull_size = min((unsigned int)4, skb->data_len);
4689 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4690 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4691 dev_kfree_skb_any(skb);
4692 return NETDEV_TX_OK;
4693 }
e743d313 4694 len = skb_headlen(skb);
bc7f75fa
AK		 4695 }
4696 }
4697
4698 /* reserve a descriptor for the offload context */
4699 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4700 count++;
4701 count++;
4702
4703 count += TXD_USE_COUNT(len, max_txd_pwr);
4704
4705 nr_frags = skb_shinfo(skb)->nr_frags;
4706 for (f = 0; f < nr_frags; f++)
4707 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4708 max_txd_pwr);
4709
4710 if (adapter->hw.mac.tx_pkt_filtering)
4711 e1000_transfer_dhcp_info(adapter, skb);
4712
ad68076e
BA		 4713 /*
4714 * need: count + 2 desc gap to keep tail from touching
4715 * head, otherwise try next time
4716 */
92af3e95 4717 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4718 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4719
4720 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4721 tx_flags |= E1000_TX_FLAGS_VLAN;
4722 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4723 }
4724
4725 first = tx_ring->next_to_use;
4726
4727 tso = e1000_tso(adapter, skb);
4728 if (tso < 0) {
4729 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4730 return NETDEV_TX_OK;
4731 }
4732
4733 if (tso)
4734 tx_flags |= E1000_TX_FLAGS_TSO;
4735 else if (e1000_tx_csum(adapter, skb))
4736 tx_flags |= E1000_TX_FLAGS_CSUM;
4737
ad68076e
BA		 4738 /*
4739 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4740 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4741 * no longer assume, we must.
4742 */
bc7f75fa
AK		 4743 if (skb->protocol == htons(ETH_P_IP))
4744 tx_flags |= E1000_TX_FLAGS_IPV4;
4745
1b7719c4 4746 /* if count is 0 then mapping error has occured */
bc7f75fa 4747 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4748 if (count) {
4749 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4750 /* Make sure there is space in the ring for the next send. */
4751 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4752
4753 } else {
bc7f75fa 4754 dev_kfree_skb_any(skb);
1b7719c4
AD		 4755 tx_ring->buffer_info[first].time_stamp = 0;
4756 tx_ring->next_to_use = first;
bc7f75fa
AK		 4757 }
4758
bc7f75fa
AK		 4759 return NETDEV_TX_OK;
4760}
4761
4762/**
4763 * e1000_tx_timeout - Respond to a Tx Hang
4764 * @netdev: network interface device structure
4765 **/
4766static void e1000_tx_timeout(struct net_device *netdev)
4767{
4768 struct e1000_adapter *adapter = netdev_priv(netdev);
4769
4770 /* Do the reset outside of interrupt context */
4771 adapter->tx_timeout_count++;
4772 schedule_work(&adapter->reset_task);
4773}
4774
4775static void e1000_reset_task(struct work_struct *work)
4776{
4777 struct e1000_adapter *adapter;
4778 adapter = container_of(work, struct e1000_adapter, reset_task);
4779
84f4ee90
TI		 4780 e1000e_dump(adapter);
4781 e_err("Reset adapter\n");
bc7f75fa
AK		 4782 e1000e_reinit_locked(adapter);
4783}
4784
4785/**
4786 * e1000_get_stats - Get System Network Statistics
4787 * @netdev: network interface device structure
4788 *
4789 * Returns the address of the device statistics structure.
4790 * The statistics are actually updated from the timer callback.
4791 **/
4792static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4793{
bc7f75fa 4794 /* only return the current stats */
7274c20f 4795 return &netdev->stats;
bc7f75fa
AK		 4796}
4797
4798/**
4799 * e1000_change_mtu - Change the Maximum Transfer Unit
4800 * @netdev: network interface device structure
4801 * @new_mtu: new value for maximum frame size
4802 *
4803 * Returns 0 on success, negative on failure
4804 **/
4805static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4806{
4807 struct e1000_adapter *adapter = netdev_priv(netdev);
4808 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4809
2adc55c9
BA		 4810 /* Jumbo frame support */
4811 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4812 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4813 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4814 return -EINVAL;
4815 }
4816
2adc55c9
BA		 4817 /* Supported frame sizes */
4818 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4819 (max_frame > adapter->max_hw_frame_size)) {
4820 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4821 return -EINVAL;
4822 }
4823
6f461f6c
BA		 4824 /* 82573 Errata 17 */
4825 if (((adapter->hw.mac.type == e1000_82573) ||
4826 (adapter->hw.mac.type == e1000_82574)) &&
4827 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4828 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4829 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4830 }
4831
bc7f75fa
AK		 4832 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4833 msleep(1);
610c9928 4834 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4835 adapter->max_frame_size = max_frame;
610c9928
BA		 4836 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4837 netdev->mtu = new_mtu;
bc7f75fa
AK		 4838 if (netif_running(netdev))
4839 e1000e_down(adapter);
4840
ad68076e
BA		 4841 /*
4842 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4843 * means we reserve 2 more, this pushes us to allocate from the next
4844 * larger slab size.
ad68076e 4845 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4846 * However with the new *_jumbo_rx* routines, jumbo receives will use
4847 * fragmented skbs
ad68076e 4848 */
bc7f75fa 4849
9926146b 4850 if (max_frame <= 2048)
bc7f75fa
AK		 4851 adapter->rx_buffer_len = 2048;
4852 else
4853 adapter->rx_buffer_len = 4096;
4854
4855 /* adjust allocation if LPE protects us, and we aren't using SBP */
4856 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4857 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4858 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4859 + ETH_FCS_LEN;
bc7f75fa 4860
bc7f75fa
AK		 4861 if (netif_running(netdev))
4862 e1000e_up(adapter);
4863 else
4864 e1000e_reset(adapter);
4865
4866 clear_bit(__E1000_RESETTING, &adapter->state);
4867
4868 return 0;
4869}
4870
4871static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4872 int cmd)
4873{
4874 struct e1000_adapter *adapter = netdev_priv(netdev);
4875 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4876
318a94d6 4877 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4878 return -EOPNOTSUPP;
4879
4880 switch (cmd) {
4881 case SIOCGMIIPHY:
4882 data->phy_id = adapter->hw.phy.addr;
4883 break;
4884 case SIOCGMIIREG:
b16a002e
BA		 4885 e1000_phy_read_status(adapter);
4886
7c25769f
BA		 4887 switch (data->reg_num & 0x1F) {
4888 case MII_BMCR:
4889 data->val_out = adapter->phy_regs.bmcr;
4890 break;
4891 case MII_BMSR:
4892 data->val_out = adapter->phy_regs.bmsr;
4893 break;
4894 case MII_PHYSID1:
4895 data->val_out = (adapter->hw.phy.id >> 16);
4896 break;
4897 case MII_PHYSID2:
4898 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4899 break;
4900 case MII_ADVERTISE:
4901 data->val_out = adapter->phy_regs.advertise;
4902 break;
4903 case MII_LPA:
4904 data->val_out = adapter->phy_regs.lpa;
4905 break;
4906 case MII_EXPANSION:
4907 data->val_out = adapter->phy_regs.expansion;
4908 break;
4909 case MII_CTRL1000:
4910 data->val_out = adapter->phy_regs.ctrl1000;
4911 break;
4912 case MII_STAT1000:
4913 data->val_out = adapter->phy_regs.stat1000;
4914 break;
4915 case MII_ESTATUS:
4916 data->val_out = adapter->phy_regs.estatus;
4917 break;
4918 default:
bc7f75fa
AK		 4919 return -EIO;
4920 }
bc7f75fa
AK		 4921 break;
4922 case SIOCSMIIREG:
4923 default:
4924 return -EOPNOTSUPP;
4925 }
4926 return 0;
4927}
4928
4929static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4930{
4931 switch (cmd) {
4932 case SIOCGMIIPHY:
4933 case SIOCGMIIREG:
4934 case SIOCSMIIREG:
4935 return e1000_mii_ioctl(netdev, ifr, cmd);
4936 default:
4937 return -EOPNOTSUPP;
4938 }
4939}
4940
a4f58f54
BA		 4941static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4942{
4943 struct e1000_hw *hw = &adapter->hw;
4944 u32 i, mac_reg;
4945 u16 phy_reg;
4946 int retval = 0;
4947
4948 /* copy MAC RARs to PHY RARs */
d3738bb8 4949 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54
BA		 4950
4951 /* copy MAC MTA to PHY MTA */
4952 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4953 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4954 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4955 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4956 }
4957
4958 /* configure PHY Rx Control register */
4959 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4960 mac_reg = er32(RCTL);
4961 if (mac_reg & E1000_RCTL_UPE)
4962 phy_reg |= BM_RCTL_UPE;
4963 if (mac_reg & E1000_RCTL_MPE)
4964 phy_reg |= BM_RCTL_MPE;
4965 phy_reg &= ~(BM_RCTL_MO_MASK);
4966 if (mac_reg & E1000_RCTL_MO_3)
4967 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4968 << BM_RCTL_MO_SHIFT);
4969 if (mac_reg & E1000_RCTL_BAM)
4970 phy_reg |= BM_RCTL_BAM;
4971 if (mac_reg & E1000_RCTL_PMCF)
4972 phy_reg |= BM_RCTL_PMCF;
4973 mac_reg = er32(CTRL);
4974 if (mac_reg & E1000_CTRL_RFCE)
4975 phy_reg |= BM_RCTL_RFCE;
4976 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4977
4978 /* enable PHY wakeup in MAC register */
4979 ew32(WUFC, wufc);
4980 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4981
4982 /* configure and enable PHY wakeup in PHY registers */
4983 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4984 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4985
4986 /* activate PHY wakeup */
94d8186a 4987 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4988 if (retval) {
4989 e_err("Could not acquire PHY\n");
4990 return retval;
4991 }
4992 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4993 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4994 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4995 if (retval) {
4996 e_err("Could not read PHY page 769\n");
4997 goto out;
4998 }
4999 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5000 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
5001 if (retval)
5002 e_err("Could not set PHY Host Wakeup bit\n");
5003out:
94d8186a 5004 hw->phy.ops.release(hw);
a4f58f54
BA		 5005
5006 return retval;
5007}
5008
23606cf5
RW		 5009static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5010 bool runtime)
bc7f75fa
AK		 5011{
5012 struct net_device *netdev = pci_get_drvdata(pdev);
5013 struct e1000_adapter *adapter = netdev_priv(netdev);
5014 struct e1000_hw *hw = &adapter->hw;
5015 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5016 /* Runtime suspend should only enable wakeup for link changes */
5017 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5018 int retval = 0;
5019
5020 netif_device_detach(netdev);
5021
5022 if (netif_running(netdev)) {
5023 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5024 e1000e_down(adapter);
5025 e1000_free_irq(adapter);
5026 }
4662e82b 5027 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5028
5029 retval = pci_save_state(pdev);
5030 if (retval)
5031 return retval;
5032
5033 status = er32(STATUS);
5034 if (status & E1000_STATUS_LU)
5035 wufc &= ~E1000_WUFC_LNKC;
5036
5037 if (wufc) {
5038 e1000_setup_rctl(adapter);
5039 e1000_set_multi(netdev);
5040
5041 /* turn on all-multi mode if wake on multicast is enabled */
5042 if (wufc & E1000_WUFC_MC) {
5043 rctl = er32(RCTL);
5044 rctl |= E1000_RCTL_MPE;
5045 ew32(RCTL, rctl);
5046 }
5047
5048 ctrl = er32(CTRL);
5049 /* advertise wake from D3Cold */
5050 #define E1000_CTRL_ADVD3WUC 0x00100000
5051 /* phy power management enable */
5052 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5053 ctrl |= E1000_CTRL_ADVD3WUC;
5054 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5055 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5056 ew32(CTRL, ctrl);
5057
318a94d6
JK		 5058 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5059 adapter->hw.phy.media_type ==
5060 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5061 /* keep the laser running in D3 */
5062 ctrl_ext = er32(CTRL_EXT);
93a23f48 5063 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5064 ew32(CTRL_EXT, ctrl_ext);
5065 }
5066
97ac8cae
BA		 5067 if (adapter->flags & FLAG_IS_ICH)
5068 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5069
bc7f75fa
AK		 5070 /* Allow time for pending master requests to run */
5071 e1000e_disable_pcie_master(&adapter->hw);
5072
82776a4b 5073 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5074 /* enable wakeup by the PHY */
5075 retval = e1000_init_phy_wakeup(adapter, wufc);
5076 if (retval)
5077 return retval;
5078 } else {
5079 /* enable wakeup by the MAC */
5080 ew32(WUFC, wufc);
5081 ew32(WUC, E1000_WUC_PME_EN);
5082 }
bc7f75fa
AK		 5083 } else {
5084 ew32(WUC, 0);
5085 ew32(WUFC, 0);
bc7f75fa
AK		 5086 }
5087
4f9de721
RW		 5088 *enable_wake = !!wufc;
5089
bc7f75fa 5090 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5091 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5092 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5093 *enable_wake = true;
bc7f75fa
AK		 5094
5095 if (adapter->hw.phy.type == e1000_phy_igp_3)
5096 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5097
ad68076e
BA		 5098 /*
5099 * Release control of h/w to f/w. If f/w is AMT enabled, this
5100 * would have already happened in close and is redundant.
5101 */
bc7f75fa
AK		 5102 e1000_release_hw_control(adapter);
5103
5104 pci_disable_device(pdev);
5105
4f9de721
RW		 5106 return 0;
5107}
5108
5109static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5110{
5111 if (sleep && wake) {
5112 pci_prepare_to_sleep(pdev);
5113 return;
5114 }
5115
5116 pci_wake_from_d3(pdev, wake);
5117 pci_set_power_state(pdev, PCI_D3hot);
5118}
5119
5120static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5121 bool wake)
5122{
5123 struct net_device *netdev = pci_get_drvdata(pdev);
5124 struct e1000_adapter *adapter = netdev_priv(netdev);
5125
005cbdfc
AD		 5126 /*
5127 * The pci-e switch on some quad port adapters will report a
5128 * correctable error when the MAC transitions from D0 to D3. To
5129 * prevent this we need to mask off the correctable errors on the
5130 * downstream port of the pci-e switch.
5131 */
5132 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5133 struct pci_dev *us_dev = pdev->bus->self;
5134 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5135 u16 devctl;
5136
5137 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5138 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5139 (devctl & ~PCI_EXP_DEVCTL_CERE));
5140
4f9de721 5141 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5142
5143 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5144 } else {
4f9de721 5145 e1000_power_off(pdev, sleep, wake);
005cbdfc 5146 }
bc7f75fa
AK		 5147}
5148
6f461f6c
BA		 5149#ifdef CONFIG_PCIEASPM
5150static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5151{
5152 pci_disable_link_state(pdev, state);
5153}
5154#else
5155static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5156{
5157 int pos;
6f461f6c 5158 u16 reg16;
1eae4eb2
AK		 5159
5160 /*
6f461f6c
BA		 5161 * Both device and parent should have the same ASPM setting.
5162 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5163 */
6f461f6c
BA		 5164 pos = pci_pcie_cap(pdev);
5165 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5166 reg16 &= ~state;
5167 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5168
0c75ba22
AB		 5169 if (!pdev->bus->self)
5170 return;
5171
6f461f6c
BA		 5172 pos = pci_pcie_cap(pdev->bus->self);
5173 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5174 reg16 &= ~state;
5175 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5176}
5177#endif
5178void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5179{
5180 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5181 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5182 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5183
5184 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5185}
5186
a0340162 5187#ifdef CONFIG_PM_OPS
23606cf5 5188static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5189{
23606cf5 5190 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5191}
5192
23606cf5 5193static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5194{
5195 struct net_device *netdev = pci_get_drvdata(pdev);
5196 struct e1000_adapter *adapter = netdev_priv(netdev);
5197 struct e1000_hw *hw = &adapter->hw;
5198 u32 err;
5199
5200 pci_set_power_state(pdev, PCI_D0);
5201 pci_restore_state(pdev);
28b8f04a 5202 pci_save_state(pdev);
6f461f6c
BA		 5203 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5204 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5205
4662e82b 5206 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5207 if (netif_running(netdev)) {
5208 err = e1000_request_irq(adapter);
5209 if (err)
5210 return err;
5211 }
5212
5213 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5214
5215 /* report the system wakeup cause from S3/S4 */
5216 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5217 u16 phy_data;
5218
5219 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5220 if (phy_data) {
5221 e_info("PHY Wakeup cause - %s\n",
5222 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5223 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5224 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5225 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5226 phy_data & E1000_WUS_LNKC ? "Link Status "
5227 " Change" : "other");
5228 }
5229 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5230 } else {
5231 u32 wus = er32(WUS);
5232 if (wus) {
5233 e_info("MAC Wakeup cause - %s\n",
5234 wus & E1000_WUS_EX ? "Unicast Packet" :
5235 wus & E1000_WUS_MC ? "Multicast Packet" :
5236 wus & E1000_WUS_BC ? "Broadcast Packet" :
5237 wus & E1000_WUS_MAG ? "Magic Packet" :
5238 wus & E1000_WUS_LNKC ? "Link Status Change" :
5239 "other");
5240 }
5241 ew32(WUS, ~0);
5242 }
5243
bc7f75fa 5244 e1000e_reset(adapter);
bc7f75fa 5245
cd791618 5246 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5247
5248 if (netif_running(netdev))
5249 e1000e_up(adapter);
5250
5251 netif_device_attach(netdev);
5252
ad68076e
BA		 5253 /*
5254 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5255 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5256 * under the control of the driver.
5257 */
c43bc57e 5258 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5259 e1000_get_hw_control(adapter);
5260
5261 return 0;
5262}
23606cf5 5263
a0340162
RW		 5264#ifdef CONFIG_PM_SLEEP
5265static int e1000_suspend(struct device *dev)
5266{
5267 struct pci_dev *pdev = to_pci_dev(dev);
5268 int retval;
5269 bool wake;
5270
5271 retval = __e1000_shutdown(pdev, &wake, false);
5272 if (!retval)
5273 e1000_complete_shutdown(pdev, true, wake);
5274
5275 return retval;
5276}
5277
23606cf5
RW		 5278static int e1000_resume(struct device *dev)
5279{
5280 struct pci_dev *pdev = to_pci_dev(dev);
5281 struct net_device *netdev = pci_get_drvdata(pdev);
5282 struct e1000_adapter *adapter = netdev_priv(netdev);
5283
5284 if (e1000e_pm_ready(adapter))
5285 adapter->idle_check = true;
5286
5287 return __e1000_resume(pdev);
5288}
a0340162
RW		 5289#endif /* CONFIG_PM_SLEEP */
5290
5291#ifdef CONFIG_PM_RUNTIME
5292static int e1000_runtime_suspend(struct device *dev)
5293{
5294 struct pci_dev *pdev = to_pci_dev(dev);
5295 struct net_device *netdev = pci_get_drvdata(pdev);
5296 struct e1000_adapter *adapter = netdev_priv(netdev);
5297
5298 if (e1000e_pm_ready(adapter)) {
5299 bool wake;
5300
5301 __e1000_shutdown(pdev, &wake, true);
5302 }
5303
5304 return 0;
5305}
5306
5307static int e1000_idle(struct device *dev)
5308{
5309 struct pci_dev *pdev = to_pci_dev(dev);
5310 struct net_device *netdev = pci_get_drvdata(pdev);
5311 struct e1000_adapter *adapter = netdev_priv(netdev);
5312
5313 if (!e1000e_pm_ready(adapter))
5314 return 0;
5315
5316 if (adapter->idle_check) {
5317 adapter->idle_check = false;
5318 if (!e1000e_has_link(adapter))
5319 pm_schedule_suspend(dev, MSEC_PER_SEC);
5320 }
5321
5322 return -EBUSY;
5323}
23606cf5
RW		 5324
5325static int e1000_runtime_resume(struct device *dev)
5326{
5327 struct pci_dev *pdev = to_pci_dev(dev);
5328 struct net_device *netdev = pci_get_drvdata(pdev);
5329 struct e1000_adapter *adapter = netdev_priv(netdev);
5330
5331 if (!e1000e_pm_ready(adapter))
5332 return 0;
5333
5334 adapter->idle_check = !dev->power.runtime_auto;
5335 return __e1000_resume(pdev);
5336}
a0340162
RW		 5337#endif /* CONFIG_PM_RUNTIME */
5338#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5339
5340static void e1000_shutdown(struct pci_dev *pdev)
5341{
4f9de721
RW		 5342 bool wake = false;
5343
23606cf5 5344 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5345
5346 if (system_state == SYSTEM_POWER_OFF)
5347 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5348}
5349
5350#ifdef CONFIG_NET_POLL_CONTROLLER
5351/*
5352 * Polling 'interrupt' - used by things like netconsole to send skbs
5353 * without having to re-enable interrupts. It's not called while
5354 * the interrupt routine is executing.
5355 */
5356static void e1000_netpoll(struct net_device *netdev)
5357{
5358 struct e1000_adapter *adapter = netdev_priv(netdev);
5359
5360 disable_irq(adapter->pdev->irq);
5361 e1000_intr(adapter->pdev->irq, netdev);
5362
bc7f75fa
AK		 5363 enable_irq(adapter->pdev->irq);
5364}
5365#endif
5366
5367/**
5368 * e1000_io_error_detected - called when PCI error is detected
5369 * @pdev: Pointer to PCI device
5370 * @state: The current pci connection state
5371 *
5372 * This function is called after a PCI bus error affecting
5373 * this device has been detected.
5374 */
5375static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5376 pci_channel_state_t state)
5377{
5378 struct net_device *netdev = pci_get_drvdata(pdev);
5379 struct e1000_adapter *adapter = netdev_priv(netdev);
5380
5381 netif_device_detach(netdev);
5382
c93b5a76
MM		 5383 if (state == pci_channel_io_perm_failure)
5384 return PCI_ERS_RESULT_DISCONNECT;
5385
bc7f75fa
AK		 5386 if (netif_running(netdev))
5387 e1000e_down(adapter);
5388 pci_disable_device(pdev);
5389
5390 /* Request a slot slot reset. */
5391 return PCI_ERS_RESULT_NEED_RESET;
5392}
5393
5394/**
5395 * e1000_io_slot_reset - called after the pci bus has been reset.
5396 * @pdev: Pointer to PCI device
5397 *
5398 * Restart the card from scratch, as if from a cold-boot. Implementation
5399 * resembles the first-half of the e1000_resume routine.
5400 */
5401static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5402{
5403 struct net_device *netdev = pci_get_drvdata(pdev);
5404 struct e1000_adapter *adapter = netdev_priv(netdev);
5405 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5406 int err;
111b9dc5 5407 pci_ers_result_t result;
bc7f75fa 5408
6f461f6c
BA		 5409 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5410 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5411 err = pci_enable_device_mem(pdev);
6e4f6f6b 5412 if (err) {
bc7f75fa
AK		 5413 dev_err(&pdev->dev,
5414 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5415 result = PCI_ERS_RESULT_DISCONNECT;
5416 } else {
5417 pci_set_master(pdev);
23606cf5 5418 pdev->state_saved = true;
111b9dc5 5419 pci_restore_state(pdev);
bc7f75fa 5420
111b9dc5
JB		 5421 pci_enable_wake(pdev, PCI_D3hot, 0);
5422 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5423
111b9dc5
JB		 5424 e1000e_reset(adapter);
5425 ew32(WUS, ~0);
5426 result = PCI_ERS_RESULT_RECOVERED;
5427 }
bc7f75fa 5428
111b9dc5
JB		 5429 pci_cleanup_aer_uncorrect_error_status(pdev);
5430
5431 return result;
bc7f75fa
AK		 5432}
5433
5434/**
5435 * e1000_io_resume - called when traffic can start flowing again.
5436 * @pdev: Pointer to PCI device
5437 *
5438 * This callback is called when the error recovery driver tells us that
5439 * its OK to resume normal operation. Implementation resembles the
5440 * second-half of the e1000_resume routine.
5441 */
5442static void e1000_io_resume(struct pci_dev *pdev)
5443{
5444 struct net_device *netdev = pci_get_drvdata(pdev);
5445 struct e1000_adapter *adapter = netdev_priv(netdev);
5446
cd791618 5447 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5448
5449 if (netif_running(netdev)) {
5450 if (e1000e_up(adapter)) {
5451 dev_err(&pdev->dev,
5452 "can't bring device back up after reset\n");
5453 return;
5454 }
5455 }
5456
5457 netif_device_attach(netdev);
5458
ad68076e
BA		 5459 /*
5460 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5461 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5462 * under the control of the driver.
5463 */
c43bc57e 5464 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5465 e1000_get_hw_control(adapter);
5466
5467}
5468
5469static void e1000_print_device_info(struct e1000_adapter *adapter)
5470{
5471 struct e1000_hw *hw = &adapter->hw;
5472 struct net_device *netdev = adapter->netdev;
69e3fd8c 5473 u32 pba_num;
bc7f75fa
AK		 5474
5475 /* print bus type/speed/width info */
7c510e4b 5476 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5477 /* bus width */
5478 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5479 "Width x1"),
5480 /* MAC address */
7c510e4b 5481 netdev->dev_addr);
44defeb3
JK		 5482 e_info("Intel(R) PRO/%s Network Connection\n",
5483 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 5484 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 5485 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5486 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 5487}
5488
10aa4c04
AK		 5489static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5490{
5491 struct e1000_hw *hw = &adapter->hw;
5492 int ret_val;
5493 u16 buf = 0;
5494
5495 if (hw->mac.type != e1000_82573)
5496 return;
5497
5498 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5499 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5500 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5501 dev_warn(&adapter->pdev->dev,
5502 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5503 }
10aa4c04
AK		 5504}
5505
651c2466
SH		 5506static const struct net_device_ops e1000e_netdev_ops = {
5507 .ndo_open = e1000_open,
5508 .ndo_stop = e1000_close,
00829823 5509 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 5510 .ndo_get_stats = e1000_get_stats,
5511 .ndo_set_multicast_list = e1000_set_multi,
5512 .ndo_set_mac_address = e1000_set_mac,
5513 .ndo_change_mtu = e1000_change_mtu,
5514 .ndo_do_ioctl = e1000_ioctl,
5515 .ndo_tx_timeout = e1000_tx_timeout,
5516 .ndo_validate_addr = eth_validate_addr,
5517
5518 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5519 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5520 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5521#ifdef CONFIG_NET_POLL_CONTROLLER
5522 .ndo_poll_controller = e1000_netpoll,
5523#endif
5524};
5525
bc7f75fa
AK		 5526/**
5527 * e1000_probe - Device Initialization Routine
5528 * @pdev: PCI device information struct
5529 * @ent: entry in e1000_pci_tbl
5530 *
5531 * Returns 0 on success, negative on failure
5532 *
5533 * e1000_probe initializes an adapter identified by a pci_dev structure.
5534 * The OS initialization, configuring of the adapter private structure,
5535 * and a hardware reset occur.
5536 **/
5537static int __devinit e1000_probe(struct pci_dev *pdev,
5538 const struct pci_device_id *ent)
5539{
5540 struct net_device *netdev;
5541 struct e1000_adapter *adapter;
5542 struct e1000_hw *hw;
5543 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5544 resource_size_t mmio_start, mmio_len;
5545 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5546
5547 static int cards_found;
5548 int i, err, pci_using_dac;
5549 u16 eeprom_data = 0;
5550 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5551
6f461f6c
BA		 5552 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5553 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5554
f0f422e5 5555 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5556 if (err)
5557 return err;
5558
5559 pci_using_dac = 0;
0be3f55f 5560 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5561 if (!err) {
0be3f55f 5562 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5563 if (!err)
5564 pci_using_dac = 1;
5565 } else {
0be3f55f 5566 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5567 if (err) {
0be3f55f
NN		 5568 err = dma_set_coherent_mask(&pdev->dev,
5569 DMA_BIT_MASK(32));
bc7f75fa
AK		 5570 if (err) {
5571 dev_err(&pdev->dev, "No usable DMA "
5572 "configuration, aborting\n");
5573 goto err_dma;
5574 }
5575 }
5576 }
5577
e8de1481 5578 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5579 pci_select_bars(pdev, IORESOURCE_MEM),
5580 e1000e_driver_name);
bc7f75fa
AK		 5581 if (err)
5582 goto err_pci_reg;
5583
68eac460 5584 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5585 pci_enable_pcie_error_reporting(pdev);
68eac460 5586
bc7f75fa 5587 pci_set_master(pdev);
438b365a
BA		 5588 /* PCI config space info */
5589 err = pci_save_state(pdev);
5590 if (err)
5591 goto err_alloc_etherdev;
bc7f75fa
AK		 5592
5593 err = -ENOMEM;
5594 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5595 if (!netdev)
5596 goto err_alloc_etherdev;
5597
bc7f75fa
AK		 5598 SET_NETDEV_DEV(netdev, &pdev->dev);
5599
f85e4dfa
TH		 5600 netdev->irq = pdev->irq;
5601
bc7f75fa
AK		 5602 pci_set_drvdata(pdev, netdev);
5603 adapter = netdev_priv(netdev);
5604 hw = &adapter->hw;
5605 adapter->netdev = netdev;
5606 adapter->pdev = pdev;
5607 adapter->ei = ei;
5608 adapter->pba = ei->pba;
5609 adapter->flags = ei->flags;
eb7c3adb 5610 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5611 adapter->hw.adapter = adapter;
5612 adapter->hw.mac.type = ei->mac;
2adc55c9 5613 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5614 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5615
5616 mmio_start = pci_resource_start(pdev, 0);
5617 mmio_len = pci_resource_len(pdev, 0);
5618
5619 err = -EIO;
5620 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5621 if (!adapter->hw.hw_addr)
5622 goto err_ioremap;
5623
5624 if ((adapter->flags & FLAG_HAS_FLASH) &&
5625 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5626 flash_start = pci_resource_start(pdev, 1);
5627 flash_len = pci_resource_len(pdev, 1);
5628 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5629 if (!adapter->hw.flash_address)
5630 goto err_flashmap;
5631 }
5632
5633 /* construct the net_device struct */
651c2466 5634 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5635 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5636 netdev->watchdog_timeo = 5 * HZ;
5637 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5638 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5639
5640 netdev->mem_start = mmio_start;
5641 netdev->mem_end = mmio_start + mmio_len;
5642
5643 adapter->bd_number = cards_found++;
5644
4662e82b
BA		 5645 e1000e_check_options(adapter);
5646
bc7f75fa
AK		 5647 /* setup adapter struct */
5648 err = e1000_sw_init(adapter);
5649 if (err)
5650 goto err_sw_init;
5651
bc7f75fa
AK		 5652 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5653 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5654 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5655
69e3fd8c 5656 err = ei->get_variants(adapter);
bc7f75fa
AK		 5657 if (err)
5658 goto err_hw_init;
5659
4a770358
BA		 5660 if ((adapter->flags & FLAG_IS_ICH) &&
5661 (adapter->flags & FLAG_READ_ONLY_NVM))
5662 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5663
bc7f75fa
AK		 5664 hw->mac.ops.get_bus_info(&adapter->hw);
5665
318a94d6 5666 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5667
5668 /* Copper options */
318a94d6 5669 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5670 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5671 adapter->hw.phy.disable_polarity_correction = 0;
5672 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5673 }
5674
5675 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5676 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5677
5678 netdev->features = NETIF_F_SG |
5679 NETIF_F_HW_CSUM |
5680 NETIF_F_HW_VLAN_TX |
5681 NETIF_F_HW_VLAN_RX;
5682
5683 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5684 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5685
5686 netdev->features |= NETIF_F_TSO;
5687 netdev->features |= NETIF_F_TSO6;
5688
a5136e23
JK		 5689 netdev->vlan_features |= NETIF_F_TSO;
5690 netdev->vlan_features |= NETIF_F_TSO6;
5691 netdev->vlan_features |= NETIF_F_HW_CSUM;
5692 netdev->vlan_features |= NETIF_F_SG;
5693
bc7f75fa
AK		 5694 if (pci_using_dac)
5695 netdev->features |= NETIF_F_HIGHDMA;
5696
bc7f75fa
AK		 5697 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5698 adapter->flags |= FLAG_MNG_PT_ENABLED;
5699
ad68076e
BA		 5700 /*
5701 * before reading the NVM, reset the controller to
5702 * put the device in a known good starting state
5703 */
bc7f75fa
AK		 5704 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5705
5706 /*
5707 * systems with ASPM and others may see the checksum fail on the first
5708 * attempt. Let's give it a few tries
5709 */
5710 for (i = 0;; i++) {
5711 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5712 break;
5713 if (i == 2) {
44defeb3 5714 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5715 err = -EIO;
5716 goto err_eeprom;
5717 }
5718 }
5719
10aa4c04
AK		 5720 e1000_eeprom_checks(adapter);
5721
608f8a0d 5722 /* copy the MAC address */
bc7f75fa 5723 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5724 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5725
5726 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5727 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5728
5729 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5730 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5731 err = -EIO;
5732 goto err_eeprom;
5733 }
5734
5735 init_timer(&adapter->watchdog_timer);
5736 adapter->watchdog_timer.function = &e1000_watchdog;
5737 adapter->watchdog_timer.data = (unsigned long) adapter;
5738
5739 init_timer(&adapter->phy_info_timer);
5740 adapter->phy_info_timer.function = &e1000_update_phy_info;
5741 adapter->phy_info_timer.data = (unsigned long) adapter;
5742
5743 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5744 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5745 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5746 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5747 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5748
bc7f75fa
AK		 5749 /* Initialize link parameters. User can change them with ethtool */
5750 adapter->hw.mac.autoneg = 1;
309af40b 5751 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5752 adapter->hw.fc.requested_mode = e1000_fc_default;
5753 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5754 adapter->hw.phy.autoneg_advertised = 0x2f;
5755
5756 /* ring size defaults */
5757 adapter->rx_ring->count = 256;
5758 adapter->tx_ring->count = 256;
5759
5760 /*
5761 * Initial Wake on LAN setting - If APM wake is enabled in
5762 * the EEPROM, enable the ACPI Magic Packet filter
5763 */
5764 if (adapter->flags & FLAG_APME_IN_WUC) {
5765 /* APME bit in EEPROM is mapped to WUC.APME */
5766 eeprom_data = er32(WUC);
5767 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5768 if (eeprom_data & E1000_WUC_PHY_WAKE)
5769 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5770 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5771 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5772 (adapter->hw.bus.func == 1))
5773 e1000_read_nvm(&adapter->hw,
5774 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5775 else
5776 e1000_read_nvm(&adapter->hw,
5777 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5778 }
5779
5780 /* fetch WoL from EEPROM */
5781 if (eeprom_data & eeprom_apme_mask)
5782 adapter->eeprom_wol |= E1000_WUFC_MAG;
5783
5784 /*
5785 * now that we have the eeprom settings, apply the special cases
5786 * where the eeprom may be wrong or the board simply won't support
5787 * wake on lan on a particular port
5788 */
5789 if (!(adapter->flags & FLAG_HAS_WOL))
5790 adapter->eeprom_wol = 0;
5791
5792 /* initialize the wol settings based on the eeprom settings */
5793 adapter->wol = adapter->eeprom_wol;
6ff68026 5794 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5795
84527590
BA		 5796 /* save off EEPROM version number */
5797 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5798
bc7f75fa
AK		 5799 /* reset the hardware with the new settings */
5800 e1000e_reset(adapter);
5801
ad68076e
BA		 5802 /*
5803 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5804 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5805 * under the control of the driver.
5806 */
c43bc57e 5807 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5808 e1000_get_hw_control(adapter);
5809
bc7f75fa
AK		 5810 strcpy(netdev->name, "eth%d");
5811 err = register_netdev(netdev);
5812 if (err)
5813 goto err_register;
5814
9c563d20
JB		 5815 /* carrier off reporting is important to ethtool even BEFORE open */
5816 netif_carrier_off(netdev);
5817
bc7f75fa
AK		 5818 e1000_print_device_info(adapter);
5819
23606cf5
RW		 5820 if (pci_dev_run_wake(pdev)) {
5821 pm_runtime_set_active(&pdev->dev);
5822 pm_runtime_enable(&pdev->dev);
5823 }
5824 pm_schedule_suspend(&pdev->dev, MSEC_PER_SEC);
5825
bc7f75fa
AK		 5826 return 0;
5827
5828err_register:
c43bc57e
JB		 5829 if (!(adapter->flags & FLAG_HAS_AMT))
5830 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5831err_eeprom:
5832 if (!e1000_check_reset_block(&adapter->hw))
5833 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5834err_hw_init:
bc7f75fa 5835
bc7f75fa
AK		 5836 kfree(adapter->tx_ring);
5837 kfree(adapter->rx_ring);
5838err_sw_init:
c43bc57e
JB		 5839 if (adapter->hw.flash_address)
5840 iounmap(adapter->hw.flash_address);
e82f54ba 5841 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5842err_flashmap:
bc7f75fa
AK		 5843 iounmap(adapter->hw.hw_addr);
5844err_ioremap:
5845 free_netdev(netdev);
5846err_alloc_etherdev:
f0f422e5
BA		 5847 pci_release_selected_regions(pdev,
5848 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5849err_pci_reg:
5850err_dma:
5851 pci_disable_device(pdev);
5852 return err;
5853}
5854
5855/**
5856 * e1000_remove - Device Removal Routine
5857 * @pdev: PCI device information struct
5858 *
5859 * e1000_remove is called by the PCI subsystem to alert the driver
5860 * that it should release a PCI device. The could be caused by a
5861 * Hot-Plug event, or because the driver is going to be removed from
5862 * memory.
5863 **/
5864static void __devexit e1000_remove(struct pci_dev *pdev)
5865{
5866 struct net_device *netdev = pci_get_drvdata(pdev);
5867 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 5868 bool down = test_bit(__E1000_DOWN, &adapter->state);
5869
5870 pm_runtime_get_sync(&pdev->dev);
bc7f75fa 5871
ad68076e
BA		 5872 /*
5873 * flush_scheduled work may reschedule our watchdog task, so
5874 * explicitly disable watchdog tasks from being rescheduled
5875 */
23606cf5
RW		 5876 if (!down)
5877 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 5878 del_timer_sync(&adapter->watchdog_timer);
5879 del_timer_sync(&adapter->phy_info_timer);
5880
41cec6f1
BA		 5881 cancel_work_sync(&adapter->reset_task);
5882 cancel_work_sync(&adapter->watchdog_task);
5883 cancel_work_sync(&adapter->downshift_task);
5884 cancel_work_sync(&adapter->update_phy_task);
5885 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5886 flush_scheduled_work();
5887
17f208de
BA		 5888 if (!(netdev->flags & IFF_UP))
5889 e1000_power_down_phy(adapter);
5890
23606cf5
RW		 5891 /* Don't lie to e1000_close() down the road. */
5892 if (!down)
5893 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 5894 unregister_netdev(netdev);
5895
23606cf5
RW		 5896 if (pci_dev_run_wake(pdev)) {
5897 pm_runtime_disable(&pdev->dev);
5898 pm_runtime_set_suspended(&pdev->dev);
5899 }
5900 pm_runtime_put_noidle(&pdev->dev);
5901
ad68076e
BA		 5902 /*
5903 * Release control of h/w to f/w. If f/w is AMT enabled, this
5904 * would have already happened in close and is redundant.
5905 */
bc7f75fa
AK		 5906 e1000_release_hw_control(adapter);
5907
4662e82b 5908 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5909 kfree(adapter->tx_ring);
5910 kfree(adapter->rx_ring);
5911
5912 iounmap(adapter->hw.hw_addr);
5913 if (adapter->hw.flash_address)
5914 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5915 pci_release_selected_regions(pdev,
5916 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5917
5918 free_netdev(netdev);
5919
111b9dc5 5920 /* AER disable */
19d5afd4 5921 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5922
bc7f75fa
AK		 5923 pci_disable_device(pdev);
5924}
5925
5926/* PCI Error Recovery (ERS) */
5927static struct pci_error_handlers e1000_err_handler = {
5928 .error_detected = e1000_io_error_detected,
5929 .slot_reset = e1000_io_slot_reset,
5930 .resume = e1000_io_resume,
5931};
5932
a3aa1884 5933static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 5934 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5935 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5936 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5937 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5938 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5939 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5940 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5941 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5942 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5943
bc7f75fa
AK		 5944 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5945 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5946 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5947 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5948
bc7f75fa
AK		 5949 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5950 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5951 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5952
4662e82b 5953 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5954 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5955 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5956
bc7f75fa
AK		 5957 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5958 board_80003es2lan },
5959 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5960 board_80003es2lan },
5961 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5962 board_80003es2lan },
5963 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5964 board_80003es2lan },
ad68076e 5965
bc7f75fa
AK		 5966 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5967 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5968 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5969 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5970 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5971 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5972 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5973 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5974
bc7f75fa
AK		 5975 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5976 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5977 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5978 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5979 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5980 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5981 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5982 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5983 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5984
5985 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5986 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5987 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5988
f4187b56
BA		 5989 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5990 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 5991 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 5992
a4f58f54
BA		 5993 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5994 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5995 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5996 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5997
d3738bb8
BA		 5998 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
5999 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6000
bc7f75fa
AK		 6001 { } /* terminate list */
6002};
6003MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6004
a0340162 6005#ifdef CONFIG_PM_OPS
23606cf5 6006static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6007 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6008 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6009 e1000_runtime_resume, e1000_idle)
23606cf5 6010};
e50208a0 6011#endif
23606cf5 6012
bc7f75fa
AK		 6013/* PCI Device API Driver */
6014static struct pci_driver e1000_driver = {
6015 .name = e1000e_driver_name,
6016 .id_table = e1000_pci_tbl,
6017 .probe = e1000_probe,
6018 .remove = __devexit_p(e1000_remove),
a0340162 6019#ifdef CONFIG_PM_OPS
23606cf5 6020 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6021#endif
6022 .shutdown = e1000_shutdown,
6023 .err_handler = &e1000_err_handler
6024};
6025
6026/**
6027 * e1000_init_module - Driver Registration Routine
6028 *
6029 * e1000_init_module is the first routine called when the driver is
6030 * loaded. All it does is register with the PCI subsystem.
6031 **/
6032static int __init e1000_init_module(void)
6033{
6034 int ret;
8544b9f7
BA		 6035 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6036 e1000e_driver_version);
451152d9 6037 pr_info("Copyright (c) 1999 - 2010 Intel Corporation.\n");
bc7f75fa 6038 ret = pci_register_driver(&e1000_driver);
53ec5498 6039
bc7f75fa
AK		 6040 return ret;
6041}
6042module_init(e1000_init_module);
6043
6044/**
6045 * e1000_exit_module - Driver Exit Cleanup Routine
6046 *
6047 * e1000_exit_module is called just before the driver is removed
6048 * from memory.
6049 **/
6050static void __exit e1000_exit_module(void)
6051{
6052 pci_unregister_driver(&e1000_driver);
6053}
6054module_exit(e1000_exit_module);
6055
6056
6057MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6058MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6059MODULE_LICENSE("GPL");
6060MODULE_VERSION(DRV_VERSION);
6061
6062/* e1000_main.c */
Clone of davem's net-next-2.6 tree