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sb1250-mac: duplicate setting of bit V_MAC_RX_PL_THRSH(4) in sbmac_channel_start()
[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
ad68076e 4 Copyright(c) 1999 - 2008 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
111b9dc5 47#include <linux/aer.h>
bc7f75fa
AK		 48
49#include "e1000.h"
50
3be8c940 51#define DRV_VERSION "1.0.2-k2"
bc7f75fa
AK		 52char e1000e_driver_name[] = "e1000e";
53const char e1000e_driver_version[] = DRV_VERSION;
54
55static const struct e1000_info *e1000_info_tbl[] = {
56 [board_82571] = &e1000_82571_info,
57 [board_82572] = &e1000_82572_info,
58 [board_82573] = &e1000_82573_info,
4662e82b 59 [board_82574] = &e1000_82574_info,
8c81c9c3 60 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 61 [board_80003es2lan] = &e1000_es2_info,
62 [board_ich8lan] = &e1000_ich8_info,
63 [board_ich9lan] = &e1000_ich9_info,
f4187b56 64 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 65 [board_pchlan] = &e1000_pch_info,
bc7f75fa
AK		 66};
67
68#ifdef DEBUG
69/**
70 * e1000_get_hw_dev_name - return device name string
71 * used by hardware layer to print debugging information
72 **/
73char *e1000e_get_hw_dev_name(struct e1000_hw *hw)
74{
589c085f 75 return hw->adapter->netdev->name;
bc7f75fa
AK		 76}
77#endif
78
79/**
80 * e1000_desc_unused - calculate if we have unused descriptors
81 **/
82static int e1000_desc_unused(struct e1000_ring *ring)
83{
84 if (ring->next_to_clean > ring->next_to_use)
85 return ring->next_to_clean - ring->next_to_use - 1;
86
87 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
88}
89
90/**
ad68076e 91 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 92 * @adapter: board private structure
93 * @status: descriptor status field as written by hardware
94 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
95 * @skb: pointer to sk_buff to be indicated to stack
96 **/
97static void e1000_receive_skb(struct e1000_adapter *adapter,
98 struct net_device *netdev,
99 struct sk_buff *skb,
a39fe742 100 u8 status, __le16 vlan)
bc7f75fa
AK		 101{
102 skb->protocol = eth_type_trans(skb, netdev);
103
104 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 105 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
106 le16_to_cpu(vlan), skb);
bc7f75fa 107 else
89c88b16 108 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 109}
110
111/**
112 * e1000_rx_checksum - Receive Checksum Offload for 82543
113 * @adapter: board private structure
114 * @status_err: receive descriptor status and error fields
115 * @csum: receive descriptor csum field
116 * @sk_buff: socket buffer with received data
117 **/
118static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
119 u32 csum, struct sk_buff *skb)
120{
121 u16 status = (u16)status_err;
122 u8 errors = (u8)(status_err >> 24);
123 skb->ip_summed = CHECKSUM_NONE;
124
125 /* Ignore Checksum bit is set */
126 if (status & E1000_RXD_STAT_IXSM)
127 return;
128 /* TCP/UDP checksum error bit is set */
129 if (errors & E1000_RXD_ERR_TCPE) {
130 /* let the stack verify checksum errors */
131 adapter->hw_csum_err++;
132 return;
133 }
134
135 /* TCP/UDP Checksum has not been calculated */
136 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
137 return;
138
139 /* It must be a TCP or UDP packet with a valid checksum */
140 if (status & E1000_RXD_STAT_TCPCS) {
141 /* TCP checksum is good */
142 skb->ip_summed = CHECKSUM_UNNECESSARY;
143 } else {
ad68076e
BA		 144 /*
145 * IP fragment with UDP payload
146 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 147 * and then put the value in host order for further stack use.
148 */
a39fe742
AV		 149 __sum16 sum = (__force __sum16)htons(csum);
150 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 151 skb->ip_summed = CHECKSUM_COMPLETE;
152 }
153 adapter->hw_csum_good++;
154}
155
156/**
157 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
158 * @adapter: address of board private structure
159 **/
160static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
161 int cleaned_count)
162{
163 struct net_device *netdev = adapter->netdev;
164 struct pci_dev *pdev = adapter->pdev;
165 struct e1000_ring *rx_ring = adapter->rx_ring;
166 struct e1000_rx_desc *rx_desc;
167 struct e1000_buffer *buffer_info;
168 struct sk_buff *skb;
169 unsigned int i;
170 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
171
172 i = rx_ring->next_to_use;
173 buffer_info = &rx_ring->buffer_info[i];
174
175 while (cleaned_count--) {
176 skb = buffer_info->skb;
177 if (skb) {
178 skb_trim(skb, 0);
179 goto map_skb;
180 }
181
182 skb = netdev_alloc_skb(netdev, bufsz);
183 if (!skb) {
184 /* Better luck next round */
185 adapter->alloc_rx_buff_failed++;
186 break;
187 }
188
ad68076e
BA		 189 /*
190 * Make buffer alignment 2 beyond a 16 byte boundary
bc7f75fa
AK		 191 * this will result in a 16 byte aligned IP header after
192 * the 14 byte MAC header is removed
193 */
194 skb_reserve(skb, NET_IP_ALIGN);
195
196 buffer_info->skb = skb;
197map_skb:
198 buffer_info->dma = pci_map_single(pdev, skb->data,
199 adapter->rx_buffer_len,
200 PCI_DMA_FROMDEVICE);
8d8bb39b 201 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 202 dev_err(&pdev->dev, "RX DMA map failed\n");
203 adapter->rx_dma_failed++;
204 break;
205 }
206
207 rx_desc = E1000_RX_DESC(*rx_ring, i);
208 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
209
210 i++;
211 if (i == rx_ring->count)
212 i = 0;
213 buffer_info = &rx_ring->buffer_info[i];
214 }
215
216 if (rx_ring->next_to_use != i) {
217 rx_ring->next_to_use = i;
218 if (i-- == 0)
219 i = (rx_ring->count - 1);
220
ad68076e
BA		 221 /*
222 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 223 * know there are new descriptors to fetch. (Only
224 * applicable for weak-ordered memory model archs,
ad68076e
BA		 225 * such as IA-64).
226 */
bc7f75fa
AK		 227 wmb();
228 writel(i, adapter->hw.hw_addr + rx_ring->tail);
229 }
230}
231
232/**
233 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
234 * @adapter: address of board private structure
235 **/
236static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
237 int cleaned_count)
238{
239 struct net_device *netdev = adapter->netdev;
240 struct pci_dev *pdev = adapter->pdev;
241 union e1000_rx_desc_packet_split *rx_desc;
242 struct e1000_ring *rx_ring = adapter->rx_ring;
243 struct e1000_buffer *buffer_info;
244 struct e1000_ps_page *ps_page;
245 struct sk_buff *skb;
246 unsigned int i, j;
247
248 i = rx_ring->next_to_use;
249 buffer_info = &rx_ring->buffer_info[i];
250
251 while (cleaned_count--) {
252 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
253
254 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 255 ps_page = &buffer_info->ps_pages[j];
256 if (j >= adapter->rx_ps_pages) {
257 /* all unused desc entries get hw null ptr */
a39fe742 258 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 259 continue;
260 }
261 if (!ps_page->page) {
262 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 263 if (!ps_page->page) {
47f44e40
AK		 264 adapter->alloc_rx_buff_failed++;
265 goto no_buffers;
266 }
267 ps_page->dma = pci_map_page(pdev,
268 ps_page->page,
269 0, PAGE_SIZE,
270 PCI_DMA_FROMDEVICE);
8d8bb39b 271 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 272 dev_err(&adapter->pdev->dev,
273 "RX DMA page map failed\n");
274 adapter->rx_dma_failed++;
275 goto no_buffers;
bc7f75fa 276 }
bc7f75fa 277 }
47f44e40
AK		 278 /*
279 * Refresh the desc even if buffer_addrs
280 * didn't change because each write-back
281 * erases this info.
282 */
283 rx_desc->read.buffer_addr[j+1] =
284 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 285 }
286
287 skb = netdev_alloc_skb(netdev,
288 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
289
290 if (!skb) {
291 adapter->alloc_rx_buff_failed++;
292 break;
293 }
294
ad68076e
BA		 295 /*
296 * Make buffer alignment 2 beyond a 16 byte boundary
bc7f75fa
AK		 297 * this will result in a 16 byte aligned IP header after
298 * the 14 byte MAC header is removed
299 */
300 skb_reserve(skb, NET_IP_ALIGN);
301
302 buffer_info->skb = skb;
303 buffer_info->dma = pci_map_single(pdev, skb->data,
304 adapter->rx_ps_bsize0,
305 PCI_DMA_FROMDEVICE);
8d8bb39b 306 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 307 dev_err(&pdev->dev, "RX DMA map failed\n");
308 adapter->rx_dma_failed++;
309 /* cleanup skb */
310 dev_kfree_skb_any(skb);
311 buffer_info->skb = NULL;
312 break;
313 }
314
315 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
316
317 i++;
318 if (i == rx_ring->count)
319 i = 0;
320 buffer_info = &rx_ring->buffer_info[i];
321 }
322
323no_buffers:
324 if (rx_ring->next_to_use != i) {
325 rx_ring->next_to_use = i;
326
327 if (!(i--))
328 i = (rx_ring->count - 1);
329
ad68076e
BA		 330 /*
331 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 332 * know there are new descriptors to fetch. (Only
333 * applicable for weak-ordered memory model archs,
ad68076e
BA		 334 * such as IA-64).
335 */
bc7f75fa 336 wmb();
ad68076e
BA		 337 /*
338 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 339 * descriptors are 32 bytes...so we increment tail
340 * twice as much.
341 */
342 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
343 }
344}
345
97ac8cae
BA		 346/**
347 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
348 * @adapter: address of board private structure
97ac8cae
BA		 349 * @cleaned_count: number of buffers to allocate this pass
350 **/
351
352static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
353 int cleaned_count)
354{
355 struct net_device *netdev = adapter->netdev;
356 struct pci_dev *pdev = adapter->pdev;
357 struct e1000_rx_desc *rx_desc;
358 struct e1000_ring *rx_ring = adapter->rx_ring;
359 struct e1000_buffer *buffer_info;
360 struct sk_buff *skb;
361 unsigned int i;
362 unsigned int bufsz = 256 -
363 16 /* for skb_reserve */ -
364 NET_IP_ALIGN;
365
366 i = rx_ring->next_to_use;
367 buffer_info = &rx_ring->buffer_info[i];
368
369 while (cleaned_count--) {
370 skb = buffer_info->skb;
371 if (skb) {
372 skb_trim(skb, 0);
373 goto check_page;
374 }
375
376 skb = netdev_alloc_skb(netdev, bufsz);
377 if (unlikely(!skb)) {
378 /* Better luck next round */
379 adapter->alloc_rx_buff_failed++;
380 break;
381 }
382
383 /* Make buffer alignment 2 beyond a 16 byte boundary
384 * this will result in a 16 byte aligned IP header after
385 * the 14 byte MAC header is removed
386 */
387 skb_reserve(skb, NET_IP_ALIGN);
388
389 buffer_info->skb = skb;
390check_page:
391 /* allocate a new page if necessary */
392 if (!buffer_info->page) {
393 buffer_info->page = alloc_page(GFP_ATOMIC);
394 if (unlikely(!buffer_info->page)) {
395 adapter->alloc_rx_buff_failed++;
396 break;
397 }
398 }
399
400 if (!buffer_info->dma)
401 buffer_info->dma = pci_map_page(pdev,
402 buffer_info->page, 0,
403 PAGE_SIZE,
404 PCI_DMA_FROMDEVICE);
405
406 rx_desc = E1000_RX_DESC(*rx_ring, i);
407 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
408
409 if (unlikely(++i == rx_ring->count))
410 i = 0;
411 buffer_info = &rx_ring->buffer_info[i];
412 }
413
414 if (likely(rx_ring->next_to_use != i)) {
415 rx_ring->next_to_use = i;
416 if (unlikely(i-- == 0))
417 i = (rx_ring->count - 1);
418
419 /* Force memory writes to complete before letting h/w
420 * know there are new descriptors to fetch. (Only
421 * applicable for weak-ordered memory model archs,
422 * such as IA-64). */
423 wmb();
424 writel(i, adapter->hw.hw_addr + rx_ring->tail);
425 }
426}
427
bc7f75fa
AK		 428/**
429 * e1000_clean_rx_irq - Send received data up the network stack; legacy
430 * @adapter: board private structure
431 *
432 * the return value indicates whether actual cleaning was done, there
433 * is no guarantee that everything was cleaned
434 **/
435static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
436 int *work_done, int work_to_do)
437{
438 struct net_device *netdev = adapter->netdev;
439 struct pci_dev *pdev = adapter->pdev;
440 struct e1000_ring *rx_ring = adapter->rx_ring;
441 struct e1000_rx_desc *rx_desc, *next_rxd;
442 struct e1000_buffer *buffer_info, *next_buffer;
443 u32 length;
444 unsigned int i;
445 int cleaned_count = 0;
446 bool cleaned = 0;
447 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
448
449 i = rx_ring->next_to_clean;
450 rx_desc = E1000_RX_DESC(*rx_ring, i);
451 buffer_info = &rx_ring->buffer_info[i];
452
453 while (rx_desc->status & E1000_RXD_STAT_DD) {
454 struct sk_buff *skb;
455 u8 status;
456
457 if (*work_done >= work_to_do)
458 break;
459 (*work_done)++;
460
461 status = rx_desc->status;
462 skb = buffer_info->skb;
463 buffer_info->skb = NULL;
464
465 prefetch(skb->data - NET_IP_ALIGN);
466
467 i++;
468 if (i == rx_ring->count)
469 i = 0;
470 next_rxd = E1000_RX_DESC(*rx_ring, i);
471 prefetch(next_rxd);
472
473 next_buffer = &rx_ring->buffer_info[i];
474
475 cleaned = 1;
476 cleaned_count++;
477 pci_unmap_single(pdev,
478 buffer_info->dma,
479 adapter->rx_buffer_len,
480 PCI_DMA_FROMDEVICE);
481 buffer_info->dma = 0;
482
483 length = le16_to_cpu(rx_desc->length);
484
485 /* !EOP means multiple descriptors were used to store a single
486 * packet, also make sure the frame isn't just CRC only */
487 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
488 /* All receives must fit into a single buffer */
44defeb3
JK		 489 e_dbg("%s: Receive packet consumed multiple buffers\n",
490 netdev->name);
bc7f75fa
AK		 491 /* recycle */
492 buffer_info->skb = skb;
493 goto next_desc;
494 }
495
496 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
497 /* recycle */
498 buffer_info->skb = skb;
499 goto next_desc;
500 }
501
eb7c3adb
JK		 502 /* adjust length to remove Ethernet CRC */
503 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
504 length -= 4;
505
bc7f75fa
AK		 506 total_rx_bytes += length;
507 total_rx_packets++;
508
ad68076e
BA		 509 /*
510 * code added for copybreak, this should improve
bc7f75fa 511 * performance for small packets with large amounts
ad68076e
BA		 512 * of reassembly being done in the stack
513 */
bc7f75fa
AK		 514 if (length < copybreak) {
515 struct sk_buff *new_skb =
516 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
517 if (new_skb) {
518 skb_reserve(new_skb, NET_IP_ALIGN);
808ff676
BA		 519 skb_copy_to_linear_data_offset(new_skb,
520 -NET_IP_ALIGN,
521 (skb->data -
522 NET_IP_ALIGN),
523 (length +
524 NET_IP_ALIGN));
bc7f75fa
AK		 525 /* save the skb in buffer_info as good */
526 buffer_info->skb = skb;
527 skb = new_skb;
528 }
529 /* else just continue with the old one */
530 }
531 /* end copybreak code */
532 skb_put(skb, length);
533
534 /* Receive Checksum Offload */
535 e1000_rx_checksum(adapter,
536 (u32)(status) |
537 ((u32)(rx_desc->errors) << 24),
538 le16_to_cpu(rx_desc->csum), skb);
539
540 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
541
542next_desc:
543 rx_desc->status = 0;
544
545 /* return some buffers to hardware, one at a time is too slow */
546 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
547 adapter->alloc_rx_buf(adapter, cleaned_count);
548 cleaned_count = 0;
549 }
550
551 /* use prefetched values */
552 rx_desc = next_rxd;
553 buffer_info = next_buffer;
554 }
555 rx_ring->next_to_clean = i;
556
557 cleaned_count = e1000_desc_unused(rx_ring);
558 if (cleaned_count)
559 adapter->alloc_rx_buf(adapter, cleaned_count);
560
bc7f75fa 561 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 562 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 563 netdev->stats.rx_bytes += total_rx_bytes;
564 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 565 return cleaned;
566}
567
bc7f75fa
AK		 568static void e1000_put_txbuf(struct e1000_adapter *adapter,
569 struct e1000_buffer *buffer_info)
570{
8ddc951c 571 buffer_info->dma = 0;
bc7f75fa 572 if (buffer_info->skb) {
8ddc951c
JB		 573 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
574 DMA_TO_DEVICE);
bc7f75fa
AK		 575 dev_kfree_skb_any(buffer_info->skb);
576 buffer_info->skb = NULL;
577 }
1b7719c4 578 buffer_info->time_stamp = 0;
bc7f75fa
AK		 579}
580
581static void e1000_print_tx_hang(struct e1000_adapter *adapter)
582{
583 struct e1000_ring *tx_ring = adapter->tx_ring;
584 unsigned int i = tx_ring->next_to_clean;
585 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
586 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 587
588 /* detected Tx unit hang */
44defeb3
JK		 589 e_err("Detected Tx Unit Hang:\n"
590 " TDH <%x>\n"
591 " TDT <%x>\n"
592 " next_to_use <%x>\n"
593 " next_to_clean <%x>\n"
594 "buffer_info[next_to_clean]:\n"
595 " time_stamp <%lx>\n"
596 " next_to_watch <%x>\n"
597 " jiffies <%lx>\n"
598 " next_to_watch.status <%x>\n",
599 readl(adapter->hw.hw_addr + tx_ring->head),
600 readl(adapter->hw.hw_addr + tx_ring->tail),
601 tx_ring->next_to_use,
602 tx_ring->next_to_clean,
603 tx_ring->buffer_info[eop].time_stamp,
604 eop,
605 jiffies,
606 eop_desc->upper.fields.status);
bc7f75fa
AK		 607}
608
609/**
610 * e1000_clean_tx_irq - Reclaim resources after transmit completes
611 * @adapter: board private structure
612 *
613 * the return value indicates whether actual cleaning was done, there
614 * is no guarantee that everything was cleaned
615 **/
616static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
617{
618 struct net_device *netdev = adapter->netdev;
619 struct e1000_hw *hw = &adapter->hw;
620 struct e1000_ring *tx_ring = adapter->tx_ring;
621 struct e1000_tx_desc *tx_desc, *eop_desc;
622 struct e1000_buffer *buffer_info;
623 unsigned int i, eop;
624 unsigned int count = 0;
bc7f75fa
AK		 625 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
626
627 i = tx_ring->next_to_clean;
628 eop = tx_ring->buffer_info[i].next_to_watch;
629 eop_desc = E1000_TX_DESC(*tx_ring, eop);
630
12d04a3c
AD		 631 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
632 (count < tx_ring->count)) {
a86043c2
JB		 633 bool cleaned = false;
634 for (; !cleaned; count++) {
bc7f75fa
AK		 635 tx_desc = E1000_TX_DESC(*tx_ring, i);
636 buffer_info = &tx_ring->buffer_info[i];
637 cleaned = (i == eop);
638
639 if (cleaned) {
640 struct sk_buff *skb = buffer_info->skb;
641 unsigned int segs, bytecount;
642 segs = skb_shinfo(skb)->gso_segs ?: 1;
643 /* multiply data chunks by size of headers */
644 bytecount = ((segs - 1) * skb_headlen(skb)) +
645 skb->len;
646 total_tx_packets += segs;
647 total_tx_bytes += bytecount;
648 }
649
650 e1000_put_txbuf(adapter, buffer_info);
651 tx_desc->upper.data = 0;
652
653 i++;
654 if (i == tx_ring->count)
655 i = 0;
656 }
657
658 eop = tx_ring->buffer_info[i].next_to_watch;
659 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 660 }
661
662 tx_ring->next_to_clean = i;
663
664#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 665 if (count && netif_carrier_ok(netdev) &&
666 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 667 /* Make sure that anybody stopping the queue after this
668 * sees the new next_to_clean.
669 */
670 smp_mb();
671
672 if (netif_queue_stopped(netdev) &&
673 !(test_bit(__E1000_DOWN, &adapter->state))) {
674 netif_wake_queue(netdev);
675 ++adapter->restart_queue;
676 }
677 }
678
679 if (adapter->detect_tx_hung) {
1b7719c4
AD		 680 /* Detect a transmit hang in hardware, this serializes the
681 * check with the clearing of time_stamp and movement of i */
bc7f75fa 682 adapter->detect_tx_hung = 0;
12d04a3c
AD		 683 if (tx_ring->buffer_info[i].time_stamp &&
684 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
bc7f75fa 685 + (adapter->tx_timeout_factor * HZ))
ad68076e 686 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
bc7f75fa
AK		 687 e1000_print_tx_hang(adapter);
688 netif_stop_queue(netdev);
689 }
690 }
691 adapter->total_tx_bytes += total_tx_bytes;
692 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 693 netdev->stats.tx_bytes += total_tx_bytes;
694 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 695 return (count < tx_ring->count);
bc7f75fa
AK		 696}
697
bc7f75fa
AK		 698/**
699 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
700 * @adapter: board private structure
701 *
702 * the return value indicates whether actual cleaning was done, there
703 * is no guarantee that everything was cleaned
704 **/
705static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
706 int *work_done, int work_to_do)
707{
708 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
709 struct net_device *netdev = adapter->netdev;
710 struct pci_dev *pdev = adapter->pdev;
711 struct e1000_ring *rx_ring = adapter->rx_ring;
712 struct e1000_buffer *buffer_info, *next_buffer;
713 struct e1000_ps_page *ps_page;
714 struct sk_buff *skb;
715 unsigned int i, j;
716 u32 length, staterr;
717 int cleaned_count = 0;
718 bool cleaned = 0;
719 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
720
721 i = rx_ring->next_to_clean;
722 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
723 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
724 buffer_info = &rx_ring->buffer_info[i];
725
726 while (staterr & E1000_RXD_STAT_DD) {
727 if (*work_done >= work_to_do)
728 break;
729 (*work_done)++;
730 skb = buffer_info->skb;
731
732 /* in the packet split case this is header only */
733 prefetch(skb->data - NET_IP_ALIGN);
734
735 i++;
736 if (i == rx_ring->count)
737 i = 0;
738 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
739 prefetch(next_rxd);
740
741 next_buffer = &rx_ring->buffer_info[i];
742
743 cleaned = 1;
744 cleaned_count++;
745 pci_unmap_single(pdev, buffer_info->dma,
746 adapter->rx_ps_bsize0,
747 PCI_DMA_FROMDEVICE);
748 buffer_info->dma = 0;
749
750 if (!(staterr & E1000_RXD_STAT_EOP)) {
44defeb3
JK		 751 e_dbg("%s: Packet Split buffers didn't pick up the "
752 "full packet\n", netdev->name);
bc7f75fa
AK		 753 dev_kfree_skb_irq(skb);
754 goto next_desc;
755 }
756
757 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
758 dev_kfree_skb_irq(skb);
759 goto next_desc;
760 }
761
762 length = le16_to_cpu(rx_desc->wb.middle.length0);
763
764 if (!length) {
44defeb3
JK		 765 e_dbg("%s: Last part of the packet spanning multiple "
766 "descriptors\n", netdev->name);
bc7f75fa
AK		 767 dev_kfree_skb_irq(skb);
768 goto next_desc;
769 }
770
771 /* Good Receive */
772 skb_put(skb, length);
773
774 {
ad68076e
BA		 775 /*
776 * this looks ugly, but it seems compiler issues make it
777 * more efficient than reusing j
778 */
bc7f75fa
AK		 779 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
780
ad68076e
BA		 781 /*
782 * page alloc/put takes too long and effects small packet
783 * throughput, so unsplit small packets and save the alloc/put
784 * only valid in softirq (napi) context to call kmap_*
785 */
bc7f75fa
AK		 786 if (l1 && (l1 <= copybreak) &&
787 ((length + l1) <= adapter->rx_ps_bsize0)) {
788 u8 *vaddr;
789
47f44e40 790 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 791
ad68076e
BA		 792 /*
793 * there is no documentation about how to call
bc7f75fa 794 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 795 * very long
796 */
bc7f75fa
AK		 797 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
798 PAGE_SIZE, PCI_DMA_FROMDEVICE);
799 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
800 memcpy(skb_tail_pointer(skb), vaddr, l1);
801 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
802 pci_dma_sync_single_for_device(pdev, ps_page->dma,
803 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 804
eb7c3adb
JK		 805 /* remove the CRC */
806 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
807 l1 -= 4;
808
bc7f75fa
AK		 809 skb_put(skb, l1);
810 goto copydone;
811 } /* if */
812 }
813
814 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
815 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
816 if (!length)
817 break;
818
47f44e40 819 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 820 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
821 PCI_DMA_FROMDEVICE);
822 ps_page->dma = 0;
823 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
824 ps_page->page = NULL;
825 skb->len += length;
826 skb->data_len += length;
827 skb->truesize += length;
828 }
829
eb7c3adb
JK		 830 /* strip the ethernet crc, problem is we're using pages now so
831 * this whole operation can get a little cpu intensive
832 */
833 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
834 pskb_trim(skb, skb->len - 4);
835
bc7f75fa
AK		 836copydone:
837 total_rx_bytes += skb->len;
838 total_rx_packets++;
839
840 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
841 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
842
843 if (rx_desc->wb.upper.header_status &
844 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
845 adapter->rx_hdr_split++;
846
847 e1000_receive_skb(adapter, netdev, skb,
848 staterr, rx_desc->wb.middle.vlan);
849
850next_desc:
851 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
852 buffer_info->skb = NULL;
853
854 /* return some buffers to hardware, one at a time is too slow */
855 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
856 adapter->alloc_rx_buf(adapter, cleaned_count);
857 cleaned_count = 0;
858 }
859
860 /* use prefetched values */
861 rx_desc = next_rxd;
862 buffer_info = next_buffer;
863
864 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
865 }
866 rx_ring->next_to_clean = i;
867
868 cleaned_count = e1000_desc_unused(rx_ring);
869 if (cleaned_count)
870 adapter->alloc_rx_buf(adapter, cleaned_count);
871
bc7f75fa 872 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 873 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 874 netdev->stats.rx_bytes += total_rx_bytes;
875 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 876 return cleaned;
877}
878
97ac8cae
BA		 879/**
880 * e1000_consume_page - helper function
881 **/
882static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
883 u16 length)
884{
885 bi->page = NULL;
886 skb->len += length;
887 skb->data_len += length;
888 skb->truesize += length;
889}
890
891/**
892 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
893 * @adapter: board private structure
894 *
895 * the return value indicates whether actual cleaning was done, there
896 * is no guarantee that everything was cleaned
897 **/
898
899static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
900 int *work_done, int work_to_do)
901{
902 struct net_device *netdev = adapter->netdev;
903 struct pci_dev *pdev = adapter->pdev;
904 struct e1000_ring *rx_ring = adapter->rx_ring;
905 struct e1000_rx_desc *rx_desc, *next_rxd;
906 struct e1000_buffer *buffer_info, *next_buffer;
907 u32 length;
908 unsigned int i;
909 int cleaned_count = 0;
910 bool cleaned = false;
911 unsigned int total_rx_bytes=0, total_rx_packets=0;
912
913 i = rx_ring->next_to_clean;
914 rx_desc = E1000_RX_DESC(*rx_ring, i);
915 buffer_info = &rx_ring->buffer_info[i];
916
917 while (rx_desc->status & E1000_RXD_STAT_DD) {
918 struct sk_buff *skb;
919 u8 status;
920
921 if (*work_done >= work_to_do)
922 break;
923 (*work_done)++;
924
925 status = rx_desc->status;
926 skb = buffer_info->skb;
927 buffer_info->skb = NULL;
928
929 ++i;
930 if (i == rx_ring->count)
931 i = 0;
932 next_rxd = E1000_RX_DESC(*rx_ring, i);
933 prefetch(next_rxd);
934
935 next_buffer = &rx_ring->buffer_info[i];
936
937 cleaned = true;
938 cleaned_count++;
939 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
940 PCI_DMA_FROMDEVICE);
941 buffer_info->dma = 0;
942
943 length = le16_to_cpu(rx_desc->length);
944
945 /* errors is only valid for DD + EOP descriptors */
946 if (unlikely((status & E1000_RXD_STAT_EOP) &&
947 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
948 /* recycle both page and skb */
949 buffer_info->skb = skb;
950 /* an error means any chain goes out the window
951 * too */
952 if (rx_ring->rx_skb_top)
953 dev_kfree_skb(rx_ring->rx_skb_top);
954 rx_ring->rx_skb_top = NULL;
955 goto next_desc;
956 }
957
958#define rxtop rx_ring->rx_skb_top
959 if (!(status & E1000_RXD_STAT_EOP)) {
960 /* this descriptor is only the beginning (or middle) */
961 if (!rxtop) {
962 /* this is the beginning of a chain */
963 rxtop = skb;
964 skb_fill_page_desc(rxtop, 0, buffer_info->page,
965 0, length);
966 } else {
967 /* this is the middle of a chain */
968 skb_fill_page_desc(rxtop,
969 skb_shinfo(rxtop)->nr_frags,
970 buffer_info->page, 0, length);
971 /* re-use the skb, only consumed the page */
972 buffer_info->skb = skb;
973 }
974 e1000_consume_page(buffer_info, rxtop, length);
975 goto next_desc;
976 } else {
977 if (rxtop) {
978 /* end of the chain */
979 skb_fill_page_desc(rxtop,
980 skb_shinfo(rxtop)->nr_frags,
981 buffer_info->page, 0, length);
982 /* re-use the current skb, we only consumed the
983 * page */
984 buffer_info->skb = skb;
985 skb = rxtop;
986 rxtop = NULL;
987 e1000_consume_page(buffer_info, skb, length);
988 } else {
989 /* no chain, got EOP, this buf is the packet
990 * copybreak to save the put_page/alloc_page */
991 if (length <= copybreak &&
992 skb_tailroom(skb) >= length) {
993 u8 *vaddr;
994 vaddr = kmap_atomic(buffer_info->page,
995 KM_SKB_DATA_SOFTIRQ);
996 memcpy(skb_tail_pointer(skb), vaddr,
997 length);
998 kunmap_atomic(vaddr,
999 KM_SKB_DATA_SOFTIRQ);
1000 /* re-use the page, so don't erase
1001 * buffer_info->page */
1002 skb_put(skb, length);
1003 } else {
1004 skb_fill_page_desc(skb, 0,
1005 buffer_info->page, 0,
1006 length);
1007 e1000_consume_page(buffer_info, skb,
1008 length);
1009 }
1010 }
1011 }
1012
1013 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1014 e1000_rx_checksum(adapter,
1015 (u32)(status) |
1016 ((u32)(rx_desc->errors) << 24),
1017 le16_to_cpu(rx_desc->csum), skb);
1018
1019 /* probably a little skewed due to removing CRC */
1020 total_rx_bytes += skb->len;
1021 total_rx_packets++;
1022
1023 /* eth type trans needs skb->data to point to something */
1024 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1025 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1026 dev_kfree_skb(skb);
1027 goto next_desc;
1028 }
1029
1030 e1000_receive_skb(adapter, netdev, skb, status,
1031 rx_desc->special);
1032
1033next_desc:
1034 rx_desc->status = 0;
1035
1036 /* return some buffers to hardware, one at a time is too slow */
1037 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1038 adapter->alloc_rx_buf(adapter, cleaned_count);
1039 cleaned_count = 0;
1040 }
1041
1042 /* use prefetched values */
1043 rx_desc = next_rxd;
1044 buffer_info = next_buffer;
1045 }
1046 rx_ring->next_to_clean = i;
1047
1048 cleaned_count = e1000_desc_unused(rx_ring);
1049 if (cleaned_count)
1050 adapter->alloc_rx_buf(adapter, cleaned_count);
1051
1052 adapter->total_rx_bytes += total_rx_bytes;
1053 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1054 netdev->stats.rx_bytes += total_rx_bytes;
1055 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1056 return cleaned;
1057}
1058
bc7f75fa
AK		 1059/**
1060 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1061 * @adapter: board private structure
1062 **/
1063static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1064{
1065 struct e1000_ring *rx_ring = adapter->rx_ring;
1066 struct e1000_buffer *buffer_info;
1067 struct e1000_ps_page *ps_page;
1068 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1069 unsigned int i, j;
1070
1071 /* Free all the Rx ring sk_buffs */
1072 for (i = 0; i < rx_ring->count; i++) {
1073 buffer_info = &rx_ring->buffer_info[i];
1074 if (buffer_info->dma) {
1075 if (adapter->clean_rx == e1000_clean_rx_irq)
1076 pci_unmap_single(pdev, buffer_info->dma,
1077 adapter->rx_buffer_len,
1078 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1079 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1080 pci_unmap_page(pdev, buffer_info->dma,
1081 PAGE_SIZE,
1082 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1083 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1084 pci_unmap_single(pdev, buffer_info->dma,
1085 adapter->rx_ps_bsize0,
1086 PCI_DMA_FROMDEVICE);
1087 buffer_info->dma = 0;
1088 }
1089
97ac8cae
BA		 1090 if (buffer_info->page) {
1091 put_page(buffer_info->page);
1092 buffer_info->page = NULL;
1093 }
1094
bc7f75fa
AK		 1095 if (buffer_info->skb) {
1096 dev_kfree_skb(buffer_info->skb);
1097 buffer_info->skb = NULL;
1098 }
1099
1100 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1101 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1102 if (!ps_page->page)
1103 break;
1104 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1105 PCI_DMA_FROMDEVICE);
1106 ps_page->dma = 0;
1107 put_page(ps_page->page);
1108 ps_page->page = NULL;
1109 }
1110 }
1111
1112 /* there also may be some cached data from a chained receive */
1113 if (rx_ring->rx_skb_top) {
1114 dev_kfree_skb(rx_ring->rx_skb_top);
1115 rx_ring->rx_skb_top = NULL;
1116 }
1117
bc7f75fa
AK		 1118 /* Zero out the descriptor ring */
1119 memset(rx_ring->desc, 0, rx_ring->size);
1120
1121 rx_ring->next_to_clean = 0;
1122 rx_ring->next_to_use = 0;
1123
1124 writel(0, adapter->hw.hw_addr + rx_ring->head);
1125 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1126}
1127
a8f88ff5
JB		 1128static void e1000e_downshift_workaround(struct work_struct *work)
1129{
1130 struct e1000_adapter *adapter = container_of(work,
1131 struct e1000_adapter, downshift_task);
1132
1133 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1134}
1135
bc7f75fa
AK		 1136/**
1137 * e1000_intr_msi - Interrupt Handler
1138 * @irq: interrupt number
1139 * @data: pointer to a network interface device structure
1140 **/
1141static irqreturn_t e1000_intr_msi(int irq, void *data)
1142{
1143 struct net_device *netdev = data;
1144 struct e1000_adapter *adapter = netdev_priv(netdev);
1145 struct e1000_hw *hw = &adapter->hw;
1146 u32 icr = er32(ICR);
1147
ad68076e
BA		 1148 /*
1149 * read ICR disables interrupts using IAM
1150 */
bc7f75fa 1151
573cca8c 1152 if (icr & E1000_ICR_LSC) {
bc7f75fa 1153 hw->mac.get_link_status = 1;
ad68076e
BA		 1154 /*
1155 * ICH8 workaround-- Call gig speed drop workaround on cable
1156 * disconnect (LSC) before accessing any PHY registers
1157 */
bc7f75fa
AK		 1158 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1159 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1160 schedule_work(&adapter->downshift_task);
bc7f75fa 1161
ad68076e
BA		 1162 /*
1163 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1164 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1165 * adapter in watchdog
1166 */
bc7f75fa
AK		 1167 if (netif_carrier_ok(netdev) &&
1168 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1169 /* disable receives */
1170 u32 rctl = er32(RCTL);
1171 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1172 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1173 }
1174 /* guard against interrupt when we're going down */
1175 if (!test_bit(__E1000_DOWN, &adapter->state))
1176 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1177 }
1178
288379f0 1179 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1180 adapter->total_tx_bytes = 0;
1181 adapter->total_tx_packets = 0;
1182 adapter->total_rx_bytes = 0;
1183 adapter->total_rx_packets = 0;
288379f0 1184 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1185 }
1186
1187 return IRQ_HANDLED;
1188}
1189
1190/**
1191 * e1000_intr - Interrupt Handler
1192 * @irq: interrupt number
1193 * @data: pointer to a network interface device structure
1194 **/
1195static irqreturn_t e1000_intr(int irq, void *data)
1196{
1197 struct net_device *netdev = data;
1198 struct e1000_adapter *adapter = netdev_priv(netdev);
1199 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1200 u32 rctl, icr = er32(ICR);
4662e82b 1201
bc7f75fa
AK		 1202 if (!icr)
1203 return IRQ_NONE; /* Not our interrupt */
1204
ad68076e
BA		 1205 /*
1206 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1207 * not set, then the adapter didn't send an interrupt
1208 */
bc7f75fa
AK		 1209 if (!(icr & E1000_ICR_INT_ASSERTED))
1210 return IRQ_NONE;
1211
ad68076e
BA		 1212 /*
1213 * Interrupt Auto-Mask...upon reading ICR,
1214 * interrupts are masked. No need for the
1215 * IMC write
1216 */
bc7f75fa 1217
573cca8c 1218 if (icr & E1000_ICR_LSC) {
bc7f75fa 1219 hw->mac.get_link_status = 1;
ad68076e
BA		 1220 /*
1221 * ICH8 workaround-- Call gig speed drop workaround on cable
1222 * disconnect (LSC) before accessing any PHY registers
1223 */
bc7f75fa
AK		 1224 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1225 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1226 schedule_work(&adapter->downshift_task);
bc7f75fa 1227
ad68076e
BA		 1228 /*
1229 * 80003ES2LAN workaround--
bc7f75fa
AK		 1230 * For packet buffer work-around on link down event;
1231 * disable receives here in the ISR and
1232 * reset adapter in watchdog
1233 */
1234 if (netif_carrier_ok(netdev) &&
1235 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1236 /* disable receives */
1237 rctl = er32(RCTL);
1238 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1239 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1240 }
1241 /* guard against interrupt when we're going down */
1242 if (!test_bit(__E1000_DOWN, &adapter->state))
1243 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1244 }
1245
288379f0 1246 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1247 adapter->total_tx_bytes = 0;
1248 adapter->total_tx_packets = 0;
1249 adapter->total_rx_bytes = 0;
1250 adapter->total_rx_packets = 0;
288379f0 1251 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1252 }
1253
1254 return IRQ_HANDLED;
1255}
1256
4662e82b
BA		 1257static irqreturn_t e1000_msix_other(int irq, void *data)
1258{
1259 struct net_device *netdev = data;
1260 struct e1000_adapter *adapter = netdev_priv(netdev);
1261 struct e1000_hw *hw = &adapter->hw;
1262 u32 icr = er32(ICR);
1263
1264 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1265 if (!test_bit(__E1000_DOWN, &adapter->state))
1266 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1267 return IRQ_NONE;
1268 }
1269
1270 if (icr & adapter->eiac_mask)
1271 ew32(ICS, (icr & adapter->eiac_mask));
1272
1273 if (icr & E1000_ICR_OTHER) {
1274 if (!(icr & E1000_ICR_LSC))
1275 goto no_link_interrupt;
1276 hw->mac.get_link_status = 1;
1277 /* guard against interrupt when we're going down */
1278 if (!test_bit(__E1000_DOWN, &adapter->state))
1279 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1280 }
1281
1282no_link_interrupt:
a3c69fef
JB		 1283 if (!test_bit(__E1000_DOWN, &adapter->state))
1284 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1285
1286 return IRQ_HANDLED;
1287}
1288
1289
1290static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1291{
1292 struct net_device *netdev = data;
1293 struct e1000_adapter *adapter = netdev_priv(netdev);
1294 struct e1000_hw *hw = &adapter->hw;
1295 struct e1000_ring *tx_ring = adapter->tx_ring;
1296
1297
1298 adapter->total_tx_bytes = 0;
1299 adapter->total_tx_packets = 0;
1300
1301 if (!e1000_clean_tx_irq(adapter))
1302 /* Ring was not completely cleaned, so fire another interrupt */
1303 ew32(ICS, tx_ring->ims_val);
1304
1305 return IRQ_HANDLED;
1306}
1307
1308static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1309{
1310 struct net_device *netdev = data;
1311 struct e1000_adapter *adapter = netdev_priv(netdev);
1312
1313 /* Write the ITR value calculated at the end of the
1314 * previous interrupt.
1315 */
1316 if (adapter->rx_ring->set_itr) {
1317 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1318 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1319 adapter->rx_ring->set_itr = 0;
1320 }
1321
288379f0 1322 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1323 adapter->total_rx_bytes = 0;
1324 adapter->total_rx_packets = 0;
288379f0 1325 __napi_schedule(&adapter->napi);
4662e82b
BA		 1326 }
1327 return IRQ_HANDLED;
1328}
1329
1330/**
1331 * e1000_configure_msix - Configure MSI-X hardware
1332 *
1333 * e1000_configure_msix sets up the hardware to properly
1334 * generate MSI-X interrupts.
1335 **/
1336static void e1000_configure_msix(struct e1000_adapter *adapter)
1337{
1338 struct e1000_hw *hw = &adapter->hw;
1339 struct e1000_ring *rx_ring = adapter->rx_ring;
1340 struct e1000_ring *tx_ring = adapter->tx_ring;
1341 int vector = 0;
1342 u32 ctrl_ext, ivar = 0;
1343
1344 adapter->eiac_mask = 0;
1345
1346 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1347 if (hw->mac.type == e1000_82574) {
1348 u32 rfctl = er32(RFCTL);
1349 rfctl |= E1000_RFCTL_ACK_DIS;
1350 ew32(RFCTL, rfctl);
1351 }
1352
1353#define E1000_IVAR_INT_ALLOC_VALID 0x8
1354 /* Configure Rx vector */
1355 rx_ring->ims_val = E1000_IMS_RXQ0;
1356 adapter->eiac_mask |= rx_ring->ims_val;
1357 if (rx_ring->itr_val)
1358 writel(1000000000 / (rx_ring->itr_val * 256),
1359 hw->hw_addr + rx_ring->itr_register);
1360 else
1361 writel(1, hw->hw_addr + rx_ring->itr_register);
1362 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1363
1364 /* Configure Tx vector */
1365 tx_ring->ims_val = E1000_IMS_TXQ0;
1366 vector++;
1367 if (tx_ring->itr_val)
1368 writel(1000000000 / (tx_ring->itr_val * 256),
1369 hw->hw_addr + tx_ring->itr_register);
1370 else
1371 writel(1, hw->hw_addr + tx_ring->itr_register);
1372 adapter->eiac_mask |= tx_ring->ims_val;
1373 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1374
1375 /* set vector for Other Causes, e.g. link changes */
1376 vector++;
1377 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1378 if (rx_ring->itr_val)
1379 writel(1000000000 / (rx_ring->itr_val * 256),
1380 hw->hw_addr + E1000_EITR_82574(vector));
1381 else
1382 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1383
1384 /* Cause Tx interrupts on every write back */
1385 ivar |= (1 << 31);
1386
1387 ew32(IVAR, ivar);
1388
1389 /* enable MSI-X PBA support */
1390 ctrl_ext = er32(CTRL_EXT);
1391 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1392
1393 /* Auto-Mask Other interrupts upon ICR read */
1394#define E1000_EIAC_MASK_82574 0x01F00000
1395 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1396 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1397 ew32(CTRL_EXT, ctrl_ext);
1398 e1e_flush();
1399}
1400
1401void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1402{
1403 if (adapter->msix_entries) {
1404 pci_disable_msix(adapter->pdev);
1405 kfree(adapter->msix_entries);
1406 adapter->msix_entries = NULL;
1407 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1408 pci_disable_msi(adapter->pdev);
1409 adapter->flags &= ~FLAG_MSI_ENABLED;
1410 }
1411
1412 return;
1413}
1414
1415/**
1416 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1417 *
1418 * Attempt to configure interrupts using the best available
1419 * capabilities of the hardware and kernel.
1420 **/
1421void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1422{
1423 int err;
1424 int numvecs, i;
1425
1426
1427 switch (adapter->int_mode) {
1428 case E1000E_INT_MODE_MSIX:
1429 if (adapter->flags & FLAG_HAS_MSIX) {
1430 numvecs = 3; /* RxQ0, TxQ0 and other */
1431 adapter->msix_entries = kcalloc(numvecs,
1432 sizeof(struct msix_entry),
1433 GFP_KERNEL);
1434 if (adapter->msix_entries) {
1435 for (i = 0; i < numvecs; i++)
1436 adapter->msix_entries[i].entry = i;
1437
1438 err = pci_enable_msix(adapter->pdev,
1439 adapter->msix_entries,
1440 numvecs);
1441 if (err == 0)
1442 return;
1443 }
1444 /* MSI-X failed, so fall through and try MSI */
1445 e_err("Failed to initialize MSI-X interrupts. "
1446 "Falling back to MSI interrupts.\n");
1447 e1000e_reset_interrupt_capability(adapter);
1448 }
1449 adapter->int_mode = E1000E_INT_MODE_MSI;
1450 /* Fall through */
1451 case E1000E_INT_MODE_MSI:
1452 if (!pci_enable_msi(adapter->pdev)) {
1453 adapter->flags |= FLAG_MSI_ENABLED;
1454 } else {
1455 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1456 e_err("Failed to initialize MSI interrupts. Falling "
1457 "back to legacy interrupts.\n");
1458 }
1459 /* Fall through */
1460 case E1000E_INT_MODE_LEGACY:
1461 /* Don't do anything; this is the system default */
1462 break;
1463 }
1464
1465 return;
1466}
1467
1468/**
1469 * e1000_request_msix - Initialize MSI-X interrupts
1470 *
1471 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1472 * kernel.
1473 **/
1474static int e1000_request_msix(struct e1000_adapter *adapter)
1475{
1476 struct net_device *netdev = adapter->netdev;
1477 int err = 0, vector = 0;
1478
1479 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1480 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1481 else
1482 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1483 err = request_irq(adapter->msix_entries[vector].vector,
1484 &e1000_intr_msix_rx, 0, adapter->rx_ring->name,
1485 netdev);
1486 if (err)
1487 goto out;
1488 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1489 adapter->rx_ring->itr_val = adapter->itr;
1490 vector++;
1491
1492 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1493 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1494 else
1495 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1496 err = request_irq(adapter->msix_entries[vector].vector,
1497 &e1000_intr_msix_tx, 0, adapter->tx_ring->name,
1498 netdev);
1499 if (err)
1500 goto out;
1501 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1502 adapter->tx_ring->itr_val = adapter->itr;
1503 vector++;
1504
1505 err = request_irq(adapter->msix_entries[vector].vector,
1506 &e1000_msix_other, 0, netdev->name, netdev);
1507 if (err)
1508 goto out;
1509
1510 e1000_configure_msix(adapter);
1511 return 0;
1512out:
1513 return err;
1514}
1515
f8d59f78
BA		 1516/**
1517 * e1000_request_irq - initialize interrupts
1518 *
1519 * Attempts to configure interrupts using the best available
1520 * capabilities of the hardware and kernel.
1521 **/
bc7f75fa
AK		 1522static int e1000_request_irq(struct e1000_adapter *adapter)
1523{
1524 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1525 int err;
1526
4662e82b
BA		 1527 if (adapter->msix_entries) {
1528 err = e1000_request_msix(adapter);
1529 if (!err)
1530 return err;
1531 /* fall back to MSI */
1532 e1000e_reset_interrupt_capability(adapter);
1533 adapter->int_mode = E1000E_INT_MODE_MSI;
1534 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1535 }
4662e82b
BA		 1536 if (adapter->flags & FLAG_MSI_ENABLED) {
1537 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, 0,
1538 netdev->name, netdev);
1539 if (!err)
1540 return err;
bc7f75fa 1541
4662e82b
BA		 1542 /* fall back to legacy interrupt */
1543 e1000e_reset_interrupt_capability(adapter);
1544 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1545 }
1546
4662e82b
BA		 1547 err = request_irq(adapter->pdev->irq, &e1000_intr, IRQF_SHARED,
1548 netdev->name, netdev);
1549 if (err)
1550 e_err("Unable to allocate interrupt, Error: %d\n", err);
1551
bc7f75fa
AK		 1552 return err;
1553}
1554
1555static void e1000_free_irq(struct e1000_adapter *adapter)
1556{
1557 struct net_device *netdev = adapter->netdev;
1558
4662e82b
BA		 1559 if (adapter->msix_entries) {
1560 int vector = 0;
1561
1562 free_irq(adapter->msix_entries[vector].vector, netdev);
1563 vector++;
1564
1565 free_irq(adapter->msix_entries[vector].vector, netdev);
1566 vector++;
1567
1568 /* Other Causes interrupt vector */
1569 free_irq(adapter->msix_entries[vector].vector, netdev);
1570 return;
bc7f75fa 1571 }
4662e82b
BA		 1572
1573 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1574}
1575
1576/**
1577 * e1000_irq_disable - Mask off interrupt generation on the NIC
1578 **/
1579static void e1000_irq_disable(struct e1000_adapter *adapter)
1580{
1581 struct e1000_hw *hw = &adapter->hw;
1582
bc7f75fa 1583 ew32(IMC, ~0);
4662e82b
BA		 1584 if (adapter->msix_entries)
1585 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1586 e1e_flush();
1587 synchronize_irq(adapter->pdev->irq);
1588}
1589
1590/**
1591 * e1000_irq_enable - Enable default interrupt generation settings
1592 **/
1593static void e1000_irq_enable(struct e1000_adapter *adapter)
1594{
1595 struct e1000_hw *hw = &adapter->hw;
1596
4662e82b
BA		 1597 if (adapter->msix_entries) {
1598 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1599 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1600 } else {
1601 ew32(IMS, IMS_ENABLE_MASK);
1602 }
74ef9c39 1603 e1e_flush();
bc7f75fa
AK		 1604}
1605
1606/**
1607 * e1000_get_hw_control - get control of the h/w from f/w
1608 * @adapter: address of board private structure
1609 *
489815ce 1610 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1611 * For ASF and Pass Through versions of f/w this means that
1612 * the driver is loaded. For AMT version (only with 82573)
1613 * of the f/w this means that the network i/f is open.
1614 **/
1615static void e1000_get_hw_control(struct e1000_adapter *adapter)
1616{
1617 struct e1000_hw *hw = &adapter->hw;
1618 u32 ctrl_ext;
1619 u32 swsm;
1620
1621 /* Let firmware know the driver has taken over */
1622 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1623 swsm = er32(SWSM);
1624 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1625 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1626 ctrl_ext = er32(CTRL_EXT);
ad68076e 1627 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1628 }
1629}
1630
1631/**
1632 * e1000_release_hw_control - release control of the h/w to f/w
1633 * @adapter: address of board private structure
1634 *
489815ce 1635 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1636 * For ASF and Pass Through versions of f/w this means that the
1637 * driver is no longer loaded. For AMT version (only with 82573) i
1638 * of the f/w this means that the network i/f is closed.
1639 *
1640 **/
1641static void e1000_release_hw_control(struct e1000_adapter *adapter)
1642{
1643 struct e1000_hw *hw = &adapter->hw;
1644 u32 ctrl_ext;
1645 u32 swsm;
1646
1647 /* Let firmware taken over control of h/w */
1648 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1649 swsm = er32(SWSM);
1650 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1651 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1652 ctrl_ext = er32(CTRL_EXT);
ad68076e 1653 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1654 }
1655}
1656
bc7f75fa
AK		 1657/**
1658 * @e1000_alloc_ring - allocate memory for a ring structure
1659 **/
1660static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1661 struct e1000_ring *ring)
1662{
1663 struct pci_dev *pdev = adapter->pdev;
1664
1665 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1666 GFP_KERNEL);
1667 if (!ring->desc)
1668 return -ENOMEM;
1669
1670 return 0;
1671}
1672
1673/**
1674 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1675 * @adapter: board private structure
1676 *
1677 * Return 0 on success, negative on failure
1678 **/
1679int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1680{
1681 struct e1000_ring *tx_ring = adapter->tx_ring;
1682 int err = -ENOMEM, size;
1683
1684 size = sizeof(struct e1000_buffer) * tx_ring->count;
1685 tx_ring->buffer_info = vmalloc(size);
1686 if (!tx_ring->buffer_info)
1687 goto err;
1688 memset(tx_ring->buffer_info, 0, size);
1689
1690 /* round up to nearest 4K */
1691 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1692 tx_ring->size = ALIGN(tx_ring->size, 4096);
1693
1694 err = e1000_alloc_ring_dma(adapter, tx_ring);
1695 if (err)
1696 goto err;
1697
1698 tx_ring->next_to_use = 0;
1699 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 1700
1701 return 0;
1702err:
1703 vfree(tx_ring->buffer_info);
44defeb3 1704 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1705 return err;
1706}
1707
1708/**
1709 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1710 * @adapter: board private structure
1711 *
1712 * Returns 0 on success, negative on failure
1713 **/
1714int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1715{
1716 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1717 struct e1000_buffer *buffer_info;
1718 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1719
1720 size = sizeof(struct e1000_buffer) * rx_ring->count;
1721 rx_ring->buffer_info = vmalloc(size);
1722 if (!rx_ring->buffer_info)
1723 goto err;
1724 memset(rx_ring->buffer_info, 0, size);
1725
47f44e40
AK		 1726 for (i = 0; i < rx_ring->count; i++) {
1727 buffer_info = &rx_ring->buffer_info[i];
1728 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1729 sizeof(struct e1000_ps_page),
1730 GFP_KERNEL);
1731 if (!buffer_info->ps_pages)
1732 goto err_pages;
1733 }
bc7f75fa
AK		 1734
1735 desc_len = sizeof(union e1000_rx_desc_packet_split);
1736
1737 /* Round up to nearest 4K */
1738 rx_ring->size = rx_ring->count * desc_len;
1739 rx_ring->size = ALIGN(rx_ring->size, 4096);
1740
1741 err = e1000_alloc_ring_dma(adapter, rx_ring);
1742 if (err)
47f44e40 1743 goto err_pages;
bc7f75fa
AK		 1744
1745 rx_ring->next_to_clean = 0;
1746 rx_ring->next_to_use = 0;
1747 rx_ring->rx_skb_top = NULL;
1748
1749 return 0;
47f44e40
AK		 1750
1751err_pages:
1752 for (i = 0; i < rx_ring->count; i++) {
1753 buffer_info = &rx_ring->buffer_info[i];
1754 kfree(buffer_info->ps_pages);
1755 }
bc7f75fa
AK		 1756err:
1757 vfree(rx_ring->buffer_info);
44defeb3 1758 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1759 return err;
1760}
1761
1762/**
1763 * e1000_clean_tx_ring - Free Tx Buffers
1764 * @adapter: board private structure
1765 **/
1766static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1767{
1768 struct e1000_ring *tx_ring = adapter->tx_ring;
1769 struct e1000_buffer *buffer_info;
1770 unsigned long size;
1771 unsigned int i;
1772
1773 for (i = 0; i < tx_ring->count; i++) {
1774 buffer_info = &tx_ring->buffer_info[i];
1775 e1000_put_txbuf(adapter, buffer_info);
1776 }
1777
1778 size = sizeof(struct e1000_buffer) * tx_ring->count;
1779 memset(tx_ring->buffer_info, 0, size);
1780
1781 memset(tx_ring->desc, 0, tx_ring->size);
1782
1783 tx_ring->next_to_use = 0;
1784 tx_ring->next_to_clean = 0;
1785
1786 writel(0, adapter->hw.hw_addr + tx_ring->head);
1787 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1788}
1789
1790/**
1791 * e1000e_free_tx_resources - Free Tx Resources per Queue
1792 * @adapter: board private structure
1793 *
1794 * Free all transmit software resources
1795 **/
1796void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1797{
1798 struct pci_dev *pdev = adapter->pdev;
1799 struct e1000_ring *tx_ring = adapter->tx_ring;
1800
1801 e1000_clean_tx_ring(adapter);
1802
1803 vfree(tx_ring->buffer_info);
1804 tx_ring->buffer_info = NULL;
1805
1806 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1807 tx_ring->dma);
1808 tx_ring->desc = NULL;
1809}
1810
1811/**
1812 * e1000e_free_rx_resources - Free Rx Resources
1813 * @adapter: board private structure
1814 *
1815 * Free all receive software resources
1816 **/
1817
1818void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1819{
1820 struct pci_dev *pdev = adapter->pdev;
1821 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1822 int i;
bc7f75fa
AK		 1823
1824 e1000_clean_rx_ring(adapter);
1825
47f44e40
AK		 1826 for (i = 0; i < rx_ring->count; i++) {
1827 kfree(rx_ring->buffer_info[i].ps_pages);
1828 }
1829
bc7f75fa
AK		 1830 vfree(rx_ring->buffer_info);
1831 rx_ring->buffer_info = NULL;
1832
bc7f75fa
AK		 1833 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1834 rx_ring->dma);
1835 rx_ring->desc = NULL;
1836}
1837
1838/**
1839 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1840 * @adapter: pointer to adapter
1841 * @itr_setting: current adapter->itr
1842 * @packets: the number of packets during this measurement interval
1843 * @bytes: the number of bytes during this measurement interval
1844 *
bc7f75fa
AK		 1845 * Stores a new ITR value based on packets and byte
1846 * counts during the last interrupt. The advantage of per interrupt
1847 * computation is faster updates and more accurate ITR for the current
1848 * traffic pattern. Constants in this function were computed
1849 * based on theoretical maximum wire speed and thresholds were set based
1850 * on testing data as well as attempting to minimize response time
4662e82b
BA		 1851 * while increasing bulk throughput. This functionality is controlled
1852 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 1853 **/
1854static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1855 u16 itr_setting, int packets,
1856 int bytes)
1857{
1858 unsigned int retval = itr_setting;
1859
1860 if (packets == 0)
1861 goto update_itr_done;
1862
1863 switch (itr_setting) {
1864 case lowest_latency:
1865 /* handle TSO and jumbo frames */
1866 if (bytes/packets > 8000)
1867 retval = bulk_latency;
1868 else if ((packets < 5) && (bytes > 512)) {
1869 retval = low_latency;
1870 }
1871 break;
1872 case low_latency: /* 50 usec aka 20000 ints/s */
1873 if (bytes > 10000) {
1874 /* this if handles the TSO accounting */
1875 if (bytes/packets > 8000) {
1876 retval = bulk_latency;
1877 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1878 retval = bulk_latency;
1879 } else if ((packets > 35)) {
1880 retval = lowest_latency;
1881 }
1882 } else if (bytes/packets > 2000) {
1883 retval = bulk_latency;
1884 } else if (packets <= 2 && bytes < 512) {
1885 retval = lowest_latency;
1886 }
1887 break;
1888 case bulk_latency: /* 250 usec aka 4000 ints/s */
1889 if (bytes > 25000) {
1890 if (packets > 35) {
1891 retval = low_latency;
1892 }
1893 } else if (bytes < 6000) {
1894 retval = low_latency;
1895 }
1896 break;
1897 }
1898
1899update_itr_done:
1900 return retval;
1901}
1902
1903static void e1000_set_itr(struct e1000_adapter *adapter)
1904{
1905 struct e1000_hw *hw = &adapter->hw;
1906 u16 current_itr;
1907 u32 new_itr = adapter->itr;
1908
1909 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1910 if (adapter->link_speed != SPEED_1000) {
1911 current_itr = 0;
1912 new_itr = 4000;
1913 goto set_itr_now;
1914 }
1915
1916 adapter->tx_itr = e1000_update_itr(adapter,
1917 adapter->tx_itr,
1918 adapter->total_tx_packets,
1919 adapter->total_tx_bytes);
1920 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1921 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1922 adapter->tx_itr = low_latency;
1923
1924 adapter->rx_itr = e1000_update_itr(adapter,
1925 adapter->rx_itr,
1926 adapter->total_rx_packets,
1927 adapter->total_rx_bytes);
1928 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1929 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1930 adapter->rx_itr = low_latency;
1931
1932 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1933
1934 switch (current_itr) {
1935 /* counts and packets in update_itr are dependent on these numbers */
1936 case lowest_latency:
1937 new_itr = 70000;
1938 break;
1939 case low_latency:
1940 new_itr = 20000; /* aka hwitr = ~200 */
1941 break;
1942 case bulk_latency:
1943 new_itr = 4000;
1944 break;
1945 default:
1946 break;
1947 }
1948
1949set_itr_now:
1950 if (new_itr != adapter->itr) {
ad68076e
BA		 1951 /*
1952 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1953 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1954 * increasing
1955 */
bc7f75fa
AK		 1956 new_itr = new_itr > adapter->itr ?
1957 min(adapter->itr + (new_itr >> 2), new_itr) :
1958 new_itr;
1959 adapter->itr = new_itr;
4662e82b
BA		 1960 adapter->rx_ring->itr_val = new_itr;
1961 if (adapter->msix_entries)
1962 adapter->rx_ring->set_itr = 1;
1963 else
1964 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 1965 }
1966}
1967
4662e82b
BA		 1968/**
1969 * e1000_alloc_queues - Allocate memory for all rings
1970 * @adapter: board private structure to initialize
1971 **/
1972static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1973{
1974 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1975 if (!adapter->tx_ring)
1976 goto err;
1977
1978 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1979 if (!adapter->rx_ring)
1980 goto err;
1981
1982 return 0;
1983err:
1984 e_err("Unable to allocate memory for queues\n");
1985 kfree(adapter->rx_ring);
1986 kfree(adapter->tx_ring);
1987 return -ENOMEM;
1988}
1989
bc7f75fa
AK		 1990/**
1991 * e1000_clean - NAPI Rx polling callback
ad68076e 1992 * @napi: struct associated with this polling callback
489815ce 1993 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 1994 **/
1995static int e1000_clean(struct napi_struct *napi, int budget)
1996{
1997 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 1998 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1999 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2000 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2001
4cf1653a 2002 adapter = netdev_priv(poll_dev);
bc7f75fa 2003
4662e82b
BA		 2004 if (adapter->msix_entries &&
2005 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2006 goto clean_rx;
2007
92af3e95 2008 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2009
4662e82b 2010clean_rx:
bc7f75fa 2011 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2012
12d04a3c 2013 if (!tx_cleaned)
d2c7ddd6 2014 work_done = budget;
bc7f75fa 2015
53e52c72
DM		 2016 /* If budget not fully consumed, exit the polling mode */
2017 if (work_done < budget) {
bc7f75fa
AK		 2018 if (adapter->itr_setting & 3)
2019 e1000_set_itr(adapter);
288379f0 2020 napi_complete(napi);
a3c69fef
JB		 2021 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2022 if (adapter->msix_entries)
2023 ew32(IMS, adapter->rx_ring->ims_val);
2024 else
2025 e1000_irq_enable(adapter);
2026 }
bc7f75fa
AK		 2027 }
2028
2029 return work_done;
2030}
2031
2032static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2033{
2034 struct e1000_adapter *adapter = netdev_priv(netdev);
2035 struct e1000_hw *hw = &adapter->hw;
2036 u32 vfta, index;
2037
2038 /* don't update vlan cookie if already programmed */
2039 if ((adapter->hw.mng_cookie.status &
2040 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2041 (vid == adapter->mng_vlan_id))
2042 return;
2043 /* add VID to filter table */
2044 index = (vid >> 5) & 0x7F;
2045 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2046 vfta |= (1 << (vid & 0x1F));
2047 e1000e_write_vfta(hw, index, vfta);
2048}
2049
2050static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2051{
2052 struct e1000_adapter *adapter = netdev_priv(netdev);
2053 struct e1000_hw *hw = &adapter->hw;
2054 u32 vfta, index;
2055
74ef9c39
JB		 2056 if (!test_bit(__E1000_DOWN, &adapter->state))
2057 e1000_irq_disable(adapter);
bc7f75fa 2058 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2059
2060 if (!test_bit(__E1000_DOWN, &adapter->state))
2061 e1000_irq_enable(adapter);
bc7f75fa
AK		 2062
2063 if ((adapter->hw.mng_cookie.status &
2064 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2065 (vid == adapter->mng_vlan_id)) {
2066 /* release control to f/w */
2067 e1000_release_hw_control(adapter);
2068 return;
2069 }
2070
2071 /* remove VID from filter table */
2072 index = (vid >> 5) & 0x7F;
2073 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2074 vfta &= ~(1 << (vid & 0x1F));
2075 e1000e_write_vfta(hw, index, vfta);
2076}
2077
2078static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2079{
2080 struct net_device *netdev = adapter->netdev;
2081 u16 vid = adapter->hw.mng_cookie.vlan_id;
2082 u16 old_vid = adapter->mng_vlan_id;
2083
2084 if (!adapter->vlgrp)
2085 return;
2086
2087 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2088 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2089 if (adapter->hw.mng_cookie.status &
2090 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2091 e1000_vlan_rx_add_vid(netdev, vid);
2092 adapter->mng_vlan_id = vid;
2093 }
2094
2095 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2096 (vid != old_vid) &&
2097 !vlan_group_get_device(adapter->vlgrp, old_vid))
2098 e1000_vlan_rx_kill_vid(netdev, old_vid);
2099 } else {
2100 adapter->mng_vlan_id = vid;
2101 }
2102}
2103
2104
2105static void e1000_vlan_rx_register(struct net_device *netdev,
2106 struct vlan_group *grp)
2107{
2108 struct e1000_adapter *adapter = netdev_priv(netdev);
2109 struct e1000_hw *hw = &adapter->hw;
2110 u32 ctrl, rctl;
2111
74ef9c39
JB		 2112 if (!test_bit(__E1000_DOWN, &adapter->state))
2113 e1000_irq_disable(adapter);
bc7f75fa
AK		 2114 adapter->vlgrp = grp;
2115
2116 if (grp) {
2117 /* enable VLAN tag insert/strip */
2118 ctrl = er32(CTRL);
2119 ctrl |= E1000_CTRL_VME;
2120 ew32(CTRL, ctrl);
2121
2122 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2123 /* enable VLAN receive filtering */
2124 rctl = er32(RCTL);
bc7f75fa
AK		 2125 rctl &= ~E1000_RCTL_CFIEN;
2126 ew32(RCTL, rctl);
2127 e1000_update_mng_vlan(adapter);
2128 }
2129 } else {
2130 /* disable VLAN tag insert/strip */
2131 ctrl = er32(CTRL);
2132 ctrl &= ~E1000_CTRL_VME;
2133 ew32(CTRL, ctrl);
2134
2135 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2136 if (adapter->mng_vlan_id !=
2137 (u16)E1000_MNG_VLAN_NONE) {
2138 e1000_vlan_rx_kill_vid(netdev,
2139 adapter->mng_vlan_id);
2140 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2141 }
2142 }
2143 }
2144
74ef9c39
JB		 2145 if (!test_bit(__E1000_DOWN, &adapter->state))
2146 e1000_irq_enable(adapter);
bc7f75fa
AK		 2147}
2148
2149static void e1000_restore_vlan(struct e1000_adapter *adapter)
2150{
2151 u16 vid;
2152
2153 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2154
2155 if (!adapter->vlgrp)
2156 return;
2157
2158 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2159 if (!vlan_group_get_device(adapter->vlgrp, vid))
2160 continue;
2161 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2162 }
2163}
2164
2165static void e1000_init_manageability(struct e1000_adapter *adapter)
2166{
2167 struct e1000_hw *hw = &adapter->hw;
2168 u32 manc, manc2h;
2169
2170 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2171 return;
2172
2173 manc = er32(MANC);
2174
ad68076e
BA		 2175 /*
2176 * enable receiving management packets to the host. this will probably
bc7f75fa 2177 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2178 * the packets will be handled on SMBUS
2179 */
bc7f75fa
AK		 2180 manc |= E1000_MANC_EN_MNG2HOST;
2181 manc2h = er32(MANC2H);
2182#define E1000_MNG2HOST_PORT_623 (1 << 5)
2183#define E1000_MNG2HOST_PORT_664 (1 << 6)
2184 manc2h |= E1000_MNG2HOST_PORT_623;
2185 manc2h |= E1000_MNG2HOST_PORT_664;
2186 ew32(MANC2H, manc2h);
2187 ew32(MANC, manc);
2188}
2189
2190/**
2191 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2192 * @adapter: board private structure
2193 *
2194 * Configure the Tx unit of the MAC after a reset.
2195 **/
2196static void e1000_configure_tx(struct e1000_adapter *adapter)
2197{
2198 struct e1000_hw *hw = &adapter->hw;
2199 struct e1000_ring *tx_ring = adapter->tx_ring;
2200 u64 tdba;
2201 u32 tdlen, tctl, tipg, tarc;
2202 u32 ipgr1, ipgr2;
2203
2204 /* Setup the HW Tx Head and Tail descriptor pointers */
2205 tdba = tx_ring->dma;
2206 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2207 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2208 ew32(TDBAH, (tdba >> 32));
2209 ew32(TDLEN, tdlen);
2210 ew32(TDH, 0);
2211 ew32(TDT, 0);
2212 tx_ring->head = E1000_TDH;
2213 tx_ring->tail = E1000_TDT;
2214
2215 /* Set the default values for the Tx Inter Packet Gap timer */
2216 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2217 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2218 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2219
2220 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2221 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2222
2223 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2224 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2225 ew32(TIPG, tipg);
2226
2227 /* Set the Tx Interrupt Delay register */
2228 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2229 /* Tx irq moderation */
bc7f75fa
AK		 2230 ew32(TADV, adapter->tx_abs_int_delay);
2231
2232 /* Program the Transmit Control Register */
2233 tctl = er32(TCTL);
2234 tctl &= ~E1000_TCTL_CT;
2235 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2236 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2237
2238 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2239 tarc = er32(TARC(0));
ad68076e
BA		 2240 /*
2241 * set the speed mode bit, we'll clear it if we're not at
2242 * gigabit link later
2243 */
bc7f75fa
AK		 2244#define SPEED_MODE_BIT (1 << 21)
2245 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2246 ew32(TARC(0), tarc);
bc7f75fa
AK		 2247 }
2248
2249 /* errata: program both queues to unweighted RR */
2250 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2251 tarc = er32(TARC(0));
bc7f75fa 2252 tarc |= 1;
e9ec2c0f
JK		 2253 ew32(TARC(0), tarc);
2254 tarc = er32(TARC(1));
bc7f75fa 2255 tarc |= 1;
e9ec2c0f 2256 ew32(TARC(1), tarc);
bc7f75fa
AK		 2257 }
2258
bc7f75fa
AK		 2259 /* Setup Transmit Descriptor Settings for eop descriptor */
2260 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2261
2262 /* only set IDE if we are delaying interrupts using the timers */
2263 if (adapter->tx_int_delay)
2264 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2265
2266 /* enable Report Status bit */
2267 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2268
2269 ew32(TCTL, tctl);
2270
edfea6e6
SH		 2271 e1000e_config_collision_dist(hw);
2272
bc7f75fa
AK		 2273 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2274}
2275
2276/**
2277 * e1000_setup_rctl - configure the receive control registers
2278 * @adapter: Board private structure
2279 **/
2280#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2281 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2282static void e1000_setup_rctl(struct e1000_adapter *adapter)
2283{
2284 struct e1000_hw *hw = &adapter->hw;
2285 u32 rctl, rfctl;
2286 u32 psrctl = 0;
2287 u32 pages = 0;
2288
2289 /* Program MC offset vector base */
2290 rctl = er32(RCTL);
2291 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2292 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2293 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2294 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2295
2296 /* Do not Store bad packets */
2297 rctl &= ~E1000_RCTL_SBP;
2298
2299 /* Enable Long Packet receive */
2300 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2301 rctl &= ~E1000_RCTL_LPE;
2302 else
2303 rctl |= E1000_RCTL_LPE;
2304
eb7c3adb
JK		 2305 /* Some systems expect that the CRC is included in SMBUS traffic. The
2306 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2307 * host memory when this is enabled
2308 */
2309 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2310 rctl |= E1000_RCTL_SECRC;
5918bd88 2311
a4f58f54
BA		 2312 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2313 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2314 u16 phy_data;
2315
2316 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2317 phy_data &= 0xfff8;
2318 phy_data |= (1 << 2);
2319 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2320
2321 e1e_rphy(hw, 22, &phy_data);
2322 phy_data &= 0x0fff;
2323 phy_data |= (1 << 14);
2324 e1e_wphy(hw, 0x10, 0x2823);
2325 e1e_wphy(hw, 0x11, 0x0003);
2326 e1e_wphy(hw, 22, phy_data);
2327 }
2328
bc7f75fa
AK		 2329 /* Setup buffer sizes */
2330 rctl &= ~E1000_RCTL_SZ_4096;
2331 rctl |= E1000_RCTL_BSEX;
2332 switch (adapter->rx_buffer_len) {
2333 case 256:
2334 rctl |= E1000_RCTL_SZ_256;
2335 rctl &= ~E1000_RCTL_BSEX;
2336 break;
2337 case 512:
2338 rctl |= E1000_RCTL_SZ_512;
2339 rctl &= ~E1000_RCTL_BSEX;
2340 break;
2341 case 1024:
2342 rctl |= E1000_RCTL_SZ_1024;
2343 rctl &= ~E1000_RCTL_BSEX;
2344 break;
2345 case 2048:
2346 default:
2347 rctl |= E1000_RCTL_SZ_2048;
2348 rctl &= ~E1000_RCTL_BSEX;
2349 break;
2350 case 4096:
2351 rctl |= E1000_RCTL_SZ_4096;
2352 break;
2353 case 8192:
2354 rctl |= E1000_RCTL_SZ_8192;
2355 break;
2356 case 16384:
2357 rctl |= E1000_RCTL_SZ_16384;
2358 break;
2359 }
2360
2361 /*
2362 * 82571 and greater support packet-split where the protocol
2363 * header is placed in skb->data and the packet data is
2364 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2365 * In the case of a non-split, skb->data is linearly filled,
2366 * followed by the page buffers. Therefore, skb->data is
2367 * sized to hold the largest protocol header.
2368 *
2369 * allocations using alloc_page take too long for regular MTU
2370 * so only enable packet split for jumbo frames
2371 *
2372 * Using pages when the page size is greater than 16k wastes
2373 * a lot of memory, since we allocate 3 pages at all times
2374 * per packet.
2375 */
bc7f75fa 2376 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2377 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2378 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2379 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2380 else
2381 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2382
2383 if (adapter->rx_ps_pages) {
2384 /* Configure extra packet-split registers */
2385 rfctl = er32(RFCTL);
2386 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2387 /*
2388 * disable packet split support for IPv6 extension headers,
2389 * because some malformed IPv6 headers can hang the Rx
2390 */
bc7f75fa
AK		 2391 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2392 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2393
2394 ew32(RFCTL, rfctl);
2395
140a7480
AK		 2396 /* Enable Packet split descriptors */
2397 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2398
2399 psrctl |= adapter->rx_ps_bsize0 >>
2400 E1000_PSRCTL_BSIZE0_SHIFT;
2401
2402 switch (adapter->rx_ps_pages) {
2403 case 3:
2404 psrctl |= PAGE_SIZE <<
2405 E1000_PSRCTL_BSIZE3_SHIFT;
2406 case 2:
2407 psrctl |= PAGE_SIZE <<
2408 E1000_PSRCTL_BSIZE2_SHIFT;
2409 case 1:
2410 psrctl |= PAGE_SIZE >>
2411 E1000_PSRCTL_BSIZE1_SHIFT;
2412 break;
2413 }
2414
2415 ew32(PSRCTL, psrctl);
2416 }
2417
2418 ew32(RCTL, rctl);
318a94d6
JK		 2419 /* just started the receive unit, no need to restart */
2420 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2421}
2422
2423/**
2424 * e1000_configure_rx - Configure Receive Unit after Reset
2425 * @adapter: board private structure
2426 *
2427 * Configure the Rx unit of the MAC after a reset.
2428 **/
2429static void e1000_configure_rx(struct e1000_adapter *adapter)
2430{
2431 struct e1000_hw *hw = &adapter->hw;
2432 struct e1000_ring *rx_ring = adapter->rx_ring;
2433 u64 rdba;
2434 u32 rdlen, rctl, rxcsum, ctrl_ext;
2435
2436 if (adapter->rx_ps_pages) {
2437 /* this is a 32 byte descriptor */
2438 rdlen = rx_ring->count *
2439 sizeof(union e1000_rx_desc_packet_split);
2440 adapter->clean_rx = e1000_clean_rx_irq_ps;
2441 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2442 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2443 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2444 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2445 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2446 } else {
97ac8cae 2447 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2448 adapter->clean_rx = e1000_clean_rx_irq;
2449 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2450 }
2451
2452 /* disable receives while setting up the descriptors */
2453 rctl = er32(RCTL);
2454 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2455 e1e_flush();
2456 msleep(10);
2457
2458 /* set the Receive Delay Timer Register */
2459 ew32(RDTR, adapter->rx_int_delay);
2460
2461 /* irq moderation */
2462 ew32(RADV, adapter->rx_abs_int_delay);
2463 if (adapter->itr_setting != 0)
ad68076e 2464 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2465
2466 ctrl_ext = er32(CTRL_EXT);
2467 /* Reset delay timers after every interrupt */
2468 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2469 /* Auto-Mask interrupts upon ICR access */
2470 ctrl_ext |= E1000_CTRL_EXT_IAME;
2471 ew32(IAM, 0xffffffff);
2472 ew32(CTRL_EXT, ctrl_ext);
2473 e1e_flush();
2474
ad68076e
BA		 2475 /*
2476 * Setup the HW Rx Head and Tail Descriptor Pointers and
2477 * the Base and Length of the Rx Descriptor Ring
2478 */
bc7f75fa 2479 rdba = rx_ring->dma;
284901a9 2480 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2481 ew32(RDBAH, (rdba >> 32));
2482 ew32(RDLEN, rdlen);
2483 ew32(RDH, 0);
2484 ew32(RDT, 0);
2485 rx_ring->head = E1000_RDH;
2486 rx_ring->tail = E1000_RDT;
2487
2488 /* Enable Receive Checksum Offload for TCP and UDP */
2489 rxcsum = er32(RXCSUM);
2490 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2491 rxcsum |= E1000_RXCSUM_TUOFL;
2492
ad68076e
BA		 2493 /*
2494 * IPv4 payload checksum for UDP fragments must be
2495 * used in conjunction with packet-split.
2496 */
bc7f75fa
AK		 2497 if (adapter->rx_ps_pages)
2498 rxcsum |= E1000_RXCSUM_IPPCSE;
2499 } else {
2500 rxcsum &= ~E1000_RXCSUM_TUOFL;
2501 /* no need to clear IPPCSE as it defaults to 0 */
2502 }
2503 ew32(RXCSUM, rxcsum);
2504
ad68076e
BA		 2505 /*
2506 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2507 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2508 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2509 */
bc7f75fa 2510 if ((adapter->flags & FLAG_HAS_ERT) &&
97ac8cae
BA		 2511 (adapter->netdev->mtu > ETH_DATA_LEN)) {
2512 u32 rxdctl = er32(RXDCTL(0));
2513 ew32(RXDCTL(0), rxdctl | 0x3);
2514 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2515 /*
2516 * With jumbo frames and early-receive enabled, excessive
2517 * C4->C2 latencies result in dropped transactions.
2518 */
2519 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2520 e1000e_driver_name, 55);
2521 } else {
2522 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2523 e1000e_driver_name,
2524 PM_QOS_DEFAULT_VALUE);
2525 }
bc7f75fa
AK		 2526
2527 /* Enable Receives */
2528 ew32(RCTL, rctl);
2529}
2530
2531/**
e2de3eb6 2532 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2533 * @hw: pointer to the HW structure
2534 * @mc_addr_list: array of multicast addresses to program
2535 * @mc_addr_count: number of multicast addresses to program
2536 * @rar_used_count: the first RAR register free to program
2537 * @rar_count: total number of supported Receive Address Registers
2538 *
2539 * Updates the Receive Address Registers and Multicast Table Array.
2540 * The caller must have a packed mc_addr_list of multicast addresses.
2541 * The parameter rar_count will usually be hw->mac.rar_entry_count
2542 * unless there are workarounds that change this. Currently no func pointer
2543 * exists and all implementations are handled in the generic version of this
2544 * function.
2545 **/
e2de3eb6
JK		 2546static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2547 u32 mc_addr_count, u32 rar_used_count,
2548 u32 rar_count)
bc7f75fa 2549{
e2de3eb6 2550 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
bc7f75fa
AK		 2551 rar_used_count, rar_count);
2552}
2553
2554/**
2555 * e1000_set_multi - Multicast and Promiscuous mode set
2556 * @netdev: network interface device structure
2557 *
2558 * The set_multi entry point is called whenever the multicast address
2559 * list or the network interface flags are updated. This routine is
2560 * responsible for configuring the hardware for proper multicast,
2561 * promiscuous mode, and all-multi behavior.
2562 **/
2563static void e1000_set_multi(struct net_device *netdev)
2564{
2565 struct e1000_adapter *adapter = netdev_priv(netdev);
2566 struct e1000_hw *hw = &adapter->hw;
2567 struct e1000_mac_info *mac = &hw->mac;
2568 struct dev_mc_list *mc_ptr;
2569 u8 *mta_list;
2570 u32 rctl;
2571 int i;
2572
2573 /* Check for Promiscuous and All Multicast modes */
2574
2575 rctl = er32(RCTL);
2576
2577 if (netdev->flags & IFF_PROMISC) {
2578 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2579 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2580 } else {
746b9f02
PM		 2581 if (netdev->flags & IFF_ALLMULTI) {
2582 rctl |= E1000_RCTL_MPE;
2583 rctl &= ~E1000_RCTL_UPE;
2584 } else {
2585 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2586 }
78ed11a5 2587 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2588 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2589 }
2590
2591 ew32(RCTL, rctl);
2592
2593 if (netdev->mc_count) {
2594 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2595 if (!mta_list)
2596 return;
2597
2598 /* prepare a packed array of only addresses. */
2599 mc_ptr = netdev->mc_list;
2600
2601 for (i = 0; i < netdev->mc_count; i++) {
2602 if (!mc_ptr)
2603 break;
2604 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2605 ETH_ALEN);
2606 mc_ptr = mc_ptr->next;
2607 }
2608
e2de3eb6 2609 e1000_update_mc_addr_list(hw, mta_list, i, 1,
bc7f75fa
AK		 2610 mac->rar_entry_count);
2611 kfree(mta_list);
2612 } else {
2613 /*
2614 * if we're called from probe, we might not have
2615 * anything to do here, so clear out the list
2616 */
e2de3eb6 2617 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
bc7f75fa
AK		 2618 }
2619}
2620
2621/**
ad68076e 2622 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2623 * @adapter: private board structure
2624 **/
2625static void e1000_configure(struct e1000_adapter *adapter)
2626{
2627 e1000_set_multi(adapter->netdev);
2628
2629 e1000_restore_vlan(adapter);
2630 e1000_init_manageability(adapter);
2631
2632 e1000_configure_tx(adapter);
2633 e1000_setup_rctl(adapter);
2634 e1000_configure_rx(adapter);
ad68076e 2635 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2636}
2637
2638/**
2639 * e1000e_power_up_phy - restore link in case the phy was powered down
2640 * @adapter: address of board private structure
2641 *
2642 * The phy may be powered down to save power and turn off link when the
2643 * driver is unloaded and wake on lan is not enabled (among others)
2644 * *** this routine MUST be followed by a call to e1000e_reset ***
2645 **/
2646void e1000e_power_up_phy(struct e1000_adapter *adapter)
2647{
2648 u16 mii_reg = 0;
2649
2650 /* Just clear the power down bit to wake the phy back up */
318a94d6 2651 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
ad68076e
BA		 2652 /*
2653 * According to the manual, the phy will retain its
2654 * settings across a power-down/up cycle
2655 */
bc7f75fa
AK		 2656 e1e_rphy(&adapter->hw, PHY_CONTROL, &mii_reg);
2657 mii_reg &= ~MII_CR_POWER_DOWN;
2658 e1e_wphy(&adapter->hw, PHY_CONTROL, mii_reg);
2659 }
2660
2661 adapter->hw.mac.ops.setup_link(&adapter->hw);
2662}
2663
2664/**
2665 * e1000_power_down_phy - Power down the PHY
2666 *
2667 * Power down the PHY so no link is implied when interface is down
2668 * The PHY cannot be powered down is management or WoL is active
2669 */
2670static void e1000_power_down_phy(struct e1000_adapter *adapter)
2671{
2672 struct e1000_hw *hw = &adapter->hw;
2673 u16 mii_reg;
2674
2675 /* WoL is enabled */
23b66e2b 2676 if (adapter->wol)
bc7f75fa
AK		 2677 return;
2678
2679 /* non-copper PHY? */
318a94d6 2680 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 2681 return;
2682
2683 /* reset is blocked because of a SoL/IDER session */
ad68076e 2684 if (e1000e_check_mng_mode(hw) || e1000_check_reset_block(hw))
bc7f75fa
AK		 2685 return;
2686
489815ce 2687 /* manageability (AMT) is enabled */
bc7f75fa
AK		 2688 if (er32(MANC) & E1000_MANC_SMBUS_EN)
2689 return;
2690
2691 /* power down the PHY */
2692 e1e_rphy(hw, PHY_CONTROL, &mii_reg);
2693 mii_reg |= MII_CR_POWER_DOWN;
2694 e1e_wphy(hw, PHY_CONTROL, mii_reg);
2695 mdelay(1);
2696}
2697
2698/**
2699 * e1000e_reset - bring the hardware into a known good state
2700 *
2701 * This function boots the hardware and enables some settings that
2702 * require a configuration cycle of the hardware - those cannot be
2703 * set/changed during runtime. After reset the device needs to be
ad68076e 2704 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2705 */
2706void e1000e_reset(struct e1000_adapter *adapter)
2707{
2708 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2709 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2710 struct e1000_hw *hw = &adapter->hw;
2711 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2712 u32 pba = adapter->pba;
bc7f75fa
AK		 2713 u16 hwm;
2714
ad68076e 2715 /* reset Packet Buffer Allocation to default */
318a94d6 2716 ew32(PBA, pba);
df762464 2717
318a94d6 2718 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2719 /*
2720 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2721 * large enough to accommodate two full transmit packets,
2722 * rounded up to the next 1KB and expressed in KB. Likewise,
2723 * the Rx FIFO should be large enough to accommodate at least
2724 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2725 * expressed in KB.
2726 */
df762464 2727 pba = er32(PBA);
bc7f75fa 2728 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2729 tx_space = pba >> 16;
bc7f75fa 2730 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2731 pba &= 0xffff;
ad68076e
BA		 2732 /*
2733 * the Tx fifo also stores 16 bytes of information about the tx
2734 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2735 */
2736 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2737 sizeof(struct e1000_tx_desc) -
2738 ETH_FCS_LEN) * 2;
2739 min_tx_space = ALIGN(min_tx_space, 1024);
2740 min_tx_space >>= 10;
2741 /* software strips receive CRC, so leave room for it */
318a94d6 2742 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2743 min_rx_space = ALIGN(min_rx_space, 1024);
2744 min_rx_space >>= 10;
2745
ad68076e
BA		 2746 /*
2747 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2748 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2749 * allocation, take space away from current Rx allocation
2750 */
df762464
AK		 2751 if ((tx_space < min_tx_space) &&
2752 ((min_tx_space - tx_space) < pba)) {
2753 pba -= min_tx_space - tx_space;
bc7f75fa 2754
ad68076e
BA		 2755 /*
2756 * if short on Rx space, Rx wins and must trump tx
2757 * adjustment or use Early Receive if available
2758 */
df762464 2759 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2760 (!(adapter->flags & FLAG_HAS_ERT)))
2761 /* ERT enabled in e1000_configure_rx */
df762464 2762 pba = min_rx_space;
bc7f75fa 2763 }
df762464
AK		 2764
2765 ew32(PBA, pba);
bc7f75fa
AK		 2766 }
2767
bc7f75fa 2768
ad68076e
BA		 2769 /*
2770 * flow control settings
2771 *
3ec2a2b8 2772 * The high water mark must be low enough to fit two full frame
bc7f75fa
AK		 2773 * (or the size used for early receive) above it in the Rx FIFO.
2774 * Set it to the lower of:
2775 * - 90% of the Rx FIFO size, and
2776 * - the full Rx FIFO size minus the early receive size (for parts
2777 * with ERT support assuming ERT set to E1000_ERT_2048), or
3ec2a2b8 2778 * - the full Rx FIFO size minus two full frames
ad68076e 2779 */
3ec2a2b8
BA		 2780 if ((adapter->flags & FLAG_HAS_ERT) &&
2781 (adapter->netdev->mtu > ETH_DATA_LEN))
318a94d6
JK		 2782 hwm = min(((pba << 10) * 9 / 10),
2783 ((pba << 10) - (E1000_ERT_2048 << 3)));
bc7f75fa 2784 else
318a94d6 2785 hwm = min(((pba << 10) * 9 / 10),
3ec2a2b8 2786 ((pba << 10) - (2 * adapter->max_frame_size)));
bc7f75fa 2787
3ec2a2b8
BA		 2788 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
2789 fc->low_water = (fc->high_water - (2 * adapter->max_frame_size));
2790 fc->low_water &= E1000_FCRTL_RTL; /* 8-byte granularity */
bc7f75fa
AK		 2791
2792 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2793 fc->pause_time = 0xFFFF;
bc7f75fa 2794 else
318a94d6
JK		 2795 fc->pause_time = E1000_FC_PAUSE_TIME;
2796 fc->send_xon = 1;
5c48ef3e 2797 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 2798
2799 /* Allow time for pending master requests to run */
2800 mac->ops.reset_hw(hw);
97ac8cae
BA		 2801
2802 /*
2803 * For parts with AMT enabled, let the firmware know
2804 * that the network interface is in control
2805 */
c43bc57e 2806 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2807 e1000_get_hw_control(adapter);
2808
bc7f75fa 2809 ew32(WUC, 0);
a4f58f54
BA		 2810 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
2811 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK		 2812
2813 if (mac->ops.init_hw(hw))
44defeb3 2814 e_err("Hardware Error\n");
bc7f75fa
AK		 2815
2816 e1000_update_mng_vlan(adapter);
2817
2818 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2819 ew32(VET, ETH_P_8021Q);
2820
2821 e1000e_reset_adaptive(hw);
2822 e1000_get_phy_info(hw);
2823
918d7197
BA		 2824 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
2825 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 2826 u16 phy_data = 0;
ad68076e
BA		 2827 /*
2828 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2829 * the return value of this function because there is nothing
ad68076e
BA		 2830 * different we would do if it failed
2831 */
bc7f75fa
AK		 2832 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2833 phy_data &= ~IGP02E1000_PM_SPD;
2834 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2835 }
bc7f75fa
AK		 2836}
2837
2838int e1000e_up(struct e1000_adapter *adapter)
2839{
2840 struct e1000_hw *hw = &adapter->hw;
2841
2842 /* hardware has been reset, we need to reload some things */
2843 e1000_configure(adapter);
2844
2845 clear_bit(__E1000_DOWN, &adapter->state);
2846
2847 napi_enable(&adapter->napi);
4662e82b
BA		 2848 if (adapter->msix_entries)
2849 e1000_configure_msix(adapter);
bc7f75fa
AK		 2850 e1000_irq_enable(adapter);
2851
4cb9be7a
JB		 2852 netif_wake_queue(adapter->netdev);
2853
bc7f75fa
AK		 2854 /* fire a link change interrupt to start the watchdog */
2855 ew32(ICS, E1000_ICS_LSC);
2856 return 0;
2857}
2858
2859void e1000e_down(struct e1000_adapter *adapter)
2860{
2861 struct net_device *netdev = adapter->netdev;
2862 struct e1000_hw *hw = &adapter->hw;
2863 u32 tctl, rctl;
2864
ad68076e
BA		 2865 /*
2866 * signal that we're down so the interrupt handler does not
2867 * reschedule our watchdog timer
2868 */
bc7f75fa
AK		 2869 set_bit(__E1000_DOWN, &adapter->state);
2870
2871 /* disable receives in the hardware */
2872 rctl = er32(RCTL);
2873 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2874 /* flush and sleep below */
2875
4cb9be7a 2876 netif_stop_queue(netdev);
bc7f75fa
AK		 2877
2878 /* disable transmits in the hardware */
2879 tctl = er32(TCTL);
2880 tctl &= ~E1000_TCTL_EN;
2881 ew32(TCTL, tctl);
2882 /* flush both disables and wait for them to finish */
2883 e1e_flush();
2884 msleep(10);
2885
2886 napi_disable(&adapter->napi);
2887 e1000_irq_disable(adapter);
2888
2889 del_timer_sync(&adapter->watchdog_timer);
2890 del_timer_sync(&adapter->phy_info_timer);
2891
2892 netdev->tx_queue_len = adapter->tx_queue_len;
2893 netif_carrier_off(netdev);
2894 adapter->link_speed = 0;
2895 adapter->link_duplex = 0;
2896
52cc3086
JK		 2897 if (!pci_channel_offline(adapter->pdev))
2898 e1000e_reset(adapter);
bc7f75fa
AK		 2899 e1000_clean_tx_ring(adapter);
2900 e1000_clean_rx_ring(adapter);
2901
2902 /*
2903 * TODO: for power management, we could drop the link and
2904 * pci_disable_device here.
2905 */
2906}
2907
2908void e1000e_reinit_locked(struct e1000_adapter *adapter)
2909{
2910 might_sleep();
2911 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2912 msleep(1);
2913 e1000e_down(adapter);
2914 e1000e_up(adapter);
2915 clear_bit(__E1000_RESETTING, &adapter->state);
2916}
2917
2918/**
2919 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2920 * @adapter: board private structure to initialize
2921 *
2922 * e1000_sw_init initializes the Adapter private data structure.
2923 * Fields are initialized based on PCI device information and
2924 * OS network device settings (MTU size).
2925 **/
2926static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2927{
bc7f75fa
AK		 2928 struct net_device *netdev = adapter->netdev;
2929
2930 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2931 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2932 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2933 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2934
4662e82b 2935 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2936
4662e82b
BA		 2937 if (e1000_alloc_queues(adapter))
2938 return -ENOMEM;
bc7f75fa 2939
bc7f75fa 2940 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2941 e1000_irq_disable(adapter);
2942
bc7f75fa
AK		 2943 set_bit(__E1000_DOWN, &adapter->state);
2944 return 0;
bc7f75fa
AK		 2945}
2946
f8d59f78
BA		 2947/**
2948 * e1000_intr_msi_test - Interrupt Handler
2949 * @irq: interrupt number
2950 * @data: pointer to a network interface device structure
2951 **/
2952static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2953{
2954 struct net_device *netdev = data;
2955 struct e1000_adapter *adapter = netdev_priv(netdev);
2956 struct e1000_hw *hw = &adapter->hw;
2957 u32 icr = er32(ICR);
2958
2959 e_dbg("%s: icr is %08X\n", netdev->name, icr);
2960 if (icr & E1000_ICR_RXSEQ) {
2961 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2962 wmb();
2963 }
2964
2965 return IRQ_HANDLED;
2966}
2967
2968/**
2969 * e1000_test_msi_interrupt - Returns 0 for successful test
2970 * @adapter: board private struct
2971 *
2972 * code flow taken from tg3.c
2973 **/
2974static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2975{
2976 struct net_device *netdev = adapter->netdev;
2977 struct e1000_hw *hw = &adapter->hw;
2978 int err;
2979
2980 /* poll_enable hasn't been called yet, so don't need disable */
2981 /* clear any pending events */
2982 er32(ICR);
2983
2984 /* free the real vector and request a test handler */
2985 e1000_free_irq(adapter);
4662e82b 2986 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 2987
2988 /* Assume that the test fails, if it succeeds then the test
2989 * MSI irq handler will unset this flag */
2990 adapter->flags |= FLAG_MSI_TEST_FAILED;
2991
2992 err = pci_enable_msi(adapter->pdev);
2993 if (err)
2994 goto msi_test_failed;
2995
2996 err = request_irq(adapter->pdev->irq, &e1000_intr_msi_test, 0,
2997 netdev->name, netdev);
2998 if (err) {
2999 pci_disable_msi(adapter->pdev);
3000 goto msi_test_failed;
3001 }
3002
3003 wmb();
3004
3005 e1000_irq_enable(adapter);
3006
3007 /* fire an unusual interrupt on the test handler */
3008 ew32(ICS, E1000_ICS_RXSEQ);
3009 e1e_flush();
3010 msleep(50);
3011
3012 e1000_irq_disable(adapter);
3013
3014 rmb();
3015
3016 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3017 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3018 err = -EIO;
3019 e_info("MSI interrupt test failed!\n");
3020 }
3021
3022 free_irq(adapter->pdev->irq, netdev);
3023 pci_disable_msi(adapter->pdev);
3024
3025 if (err == -EIO)
3026 goto msi_test_failed;
3027
3028 /* okay so the test worked, restore settings */
3029 e_dbg("%s: MSI interrupt test succeeded!\n", netdev->name);
3030msi_test_failed:
4662e82b 3031 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3032 e1000_request_irq(adapter);
3033 return err;
3034}
3035
3036/**
3037 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3038 * @adapter: board private struct
3039 *
3040 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3041 **/
3042static int e1000_test_msi(struct e1000_adapter *adapter)
3043{
3044 int err;
3045 u16 pci_cmd;
3046
3047 if (!(adapter->flags & FLAG_MSI_ENABLED))
3048 return 0;
3049
3050 /* disable SERR in case the MSI write causes a master abort */
3051 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3052 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3053 pci_cmd & ~PCI_COMMAND_SERR);
3054
3055 err = e1000_test_msi_interrupt(adapter);
3056
3057 /* restore previous setting of command word */
3058 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3059
3060 /* success ! */
3061 if (!err)
3062 return 0;
3063
3064 /* EIO means MSI test failed */
3065 if (err != -EIO)
3066 return err;
3067
3068 /* back to INTx mode */
3069 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3070
3071 e1000_free_irq(adapter);
3072
3073 err = e1000_request_irq(adapter);
3074
3075 return err;
3076}
3077
bc7f75fa
AK		 3078/**
3079 * e1000_open - Called when a network interface is made active
3080 * @netdev: network interface device structure
3081 *
3082 * Returns 0 on success, negative value on failure
3083 *
3084 * The open entry point is called when a network interface is made
3085 * active by the system (IFF_UP). At this point all resources needed
3086 * for transmit and receive operations are allocated, the interrupt
3087 * handler is registered with the OS, the watchdog timer is started,
3088 * and the stack is notified that the interface is ready.
3089 **/
3090static int e1000_open(struct net_device *netdev)
3091{
3092 struct e1000_adapter *adapter = netdev_priv(netdev);
3093 struct e1000_hw *hw = &adapter->hw;
3094 int err;
3095
3096 /* disallow open during test */
3097 if (test_bit(__E1000_TESTING, &adapter->state))
3098 return -EBUSY;
3099
9c563d20
JB		 3100 netif_carrier_off(netdev);
3101
bc7f75fa
AK		 3102 /* allocate transmit descriptors */
3103 err = e1000e_setup_tx_resources(adapter);
3104 if (err)
3105 goto err_setup_tx;
3106
3107 /* allocate receive descriptors */
3108 err = e1000e_setup_rx_resources(adapter);
3109 if (err)
3110 goto err_setup_rx;
3111
3112 e1000e_power_up_phy(adapter);
3113
3114 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3115 if ((adapter->hw.mng_cookie.status &
3116 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3117 e1000_update_mng_vlan(adapter);
3118
ad68076e
BA		 3119 /*
3120 * If AMT is enabled, let the firmware know that the network
3121 * interface is now open
3122 */
c43bc57e 3123 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3124 e1000_get_hw_control(adapter);
3125
ad68076e
BA		 3126 /*
3127 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3128 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3129 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3130 * clean_rx handler before we do so.
3131 */
bc7f75fa
AK		 3132 e1000_configure(adapter);
3133
3134 err = e1000_request_irq(adapter);
3135 if (err)
3136 goto err_req_irq;
3137
f8d59f78
BA		 3138 /*
3139 * Work around PCIe errata with MSI interrupts causing some chipsets to
3140 * ignore e1000e MSI messages, which means we need to test our MSI
3141 * interrupt now
3142 */
4662e82b 3143 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3144 err = e1000_test_msi(adapter);
3145 if (err) {
3146 e_err("Interrupt allocation failed\n");
3147 goto err_req_irq;
3148 }
3149 }
3150
bc7f75fa
AK		 3151 /* From here on the code is the same as e1000e_up() */
3152 clear_bit(__E1000_DOWN, &adapter->state);
3153
3154 napi_enable(&adapter->napi);
3155
3156 e1000_irq_enable(adapter);
3157
4cb9be7a 3158 netif_start_queue(netdev);
d55b53ff 3159
bc7f75fa
AK		 3160 /* fire a link status change interrupt to start the watchdog */
3161 ew32(ICS, E1000_ICS_LSC);
3162
3163 return 0;
3164
3165err_req_irq:
3166 e1000_release_hw_control(adapter);
3167 e1000_power_down_phy(adapter);
3168 e1000e_free_rx_resources(adapter);
3169err_setup_rx:
3170 e1000e_free_tx_resources(adapter);
3171err_setup_tx:
3172 e1000e_reset(adapter);
3173
3174 return err;
3175}
3176
3177/**
3178 * e1000_close - Disables a network interface
3179 * @netdev: network interface device structure
3180 *
3181 * Returns 0, this is not allowed to fail
3182 *
3183 * The close entry point is called when an interface is de-activated
3184 * by the OS. The hardware is still under the drivers control, but
3185 * needs to be disabled. A global MAC reset is issued to stop the
3186 * hardware, and all transmit and receive resources are freed.
3187 **/
3188static int e1000_close(struct net_device *netdev)
3189{
3190 struct e1000_adapter *adapter = netdev_priv(netdev);
3191
3192 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3193 e1000e_down(adapter);
3194 e1000_power_down_phy(adapter);
3195 e1000_free_irq(adapter);
3196
3197 e1000e_free_tx_resources(adapter);
3198 e1000e_free_rx_resources(adapter);
3199
ad68076e
BA		 3200 /*
3201 * kill manageability vlan ID if supported, but not if a vlan with
3202 * the same ID is registered on the host OS (let 8021q kill it)
3203 */
bc7f75fa
AK		 3204 if ((adapter->hw.mng_cookie.status &
3205 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3206 !(adapter->vlgrp &&
3207 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3208 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3209
ad68076e
BA		 3210 /*
3211 * If AMT is enabled, let the firmware know that the network
3212 * interface is now closed
3213 */
c43bc57e 3214 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3215 e1000_release_hw_control(adapter);
3216
3217 return 0;
3218}
3219/**
3220 * e1000_set_mac - Change the Ethernet Address of the NIC
3221 * @netdev: network interface device structure
3222 * @p: pointer to an address structure
3223 *
3224 * Returns 0 on success, negative on failure
3225 **/
3226static int e1000_set_mac(struct net_device *netdev, void *p)
3227{
3228 struct e1000_adapter *adapter = netdev_priv(netdev);
3229 struct sockaddr *addr = p;
3230
3231 if (!is_valid_ether_addr(addr->sa_data))
3232 return -EADDRNOTAVAIL;
3233
3234 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3235 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3236
3237 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3238
3239 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3240 /* activate the work around */
3241 e1000e_set_laa_state_82571(&adapter->hw, 1);
3242
ad68076e
BA		 3243 /*
3244 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3245 * between the time RAR[0] gets clobbered and the time it
3246 * gets fixed (in e1000_watchdog), the actual LAA is in one
3247 * of the RARs and no incoming packets directed to this port
3248 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3249 * RAR[14]
3250 */
bc7f75fa
AK		 3251 e1000e_rar_set(&adapter->hw,
3252 adapter->hw.mac.addr,
3253 adapter->hw.mac.rar_entry_count - 1);
3254 }
3255
3256 return 0;
3257}
3258
a8f88ff5
JB		 3259/**
3260 * e1000e_update_phy_task - work thread to update phy
3261 * @work: pointer to our work struct
3262 *
3263 * this worker thread exists because we must acquire a
3264 * semaphore to read the phy, which we could msleep while
3265 * waiting for it, and we can't msleep in a timer.
3266 **/
3267static void e1000e_update_phy_task(struct work_struct *work)
3268{
3269 struct e1000_adapter *adapter = container_of(work,
3270 struct e1000_adapter, update_phy_task);
3271 e1000_get_phy_info(&adapter->hw);
3272}
3273
ad68076e
BA		 3274/*
3275 * Need to wait a few seconds after link up to get diagnostic information from
3276 * the phy
3277 */
bc7f75fa
AK		 3278static void e1000_update_phy_info(unsigned long data)
3279{
3280 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3281 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3282}
3283
3284/**
3285 * e1000e_update_stats - Update the board statistics counters
3286 * @adapter: board private structure
3287 **/
3288void e1000e_update_stats(struct e1000_adapter *adapter)
3289{
7274c20f 3290 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3291 struct e1000_hw *hw = &adapter->hw;
3292 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3293 u16 phy_data;
bc7f75fa
AK		 3294
3295 /*
3296 * Prevent stats update while adapter is being reset, or if the pci
3297 * connection is down.
3298 */
3299 if (adapter->link_speed == 0)
3300 return;
3301 if (pci_channel_offline(pdev))
3302 return;
3303
bc7f75fa
AK		 3304 adapter->stats.crcerrs += er32(CRCERRS);
3305 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3306 adapter->stats.gorc += er32(GORCL);
3307 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3308 adapter->stats.bprc += er32(BPRC);
3309 adapter->stats.mprc += er32(MPRC);
3310 adapter->stats.roc += er32(ROC);
3311
bc7f75fa 3312 adapter->stats.mpc += er32(MPC);
a4f58f54
BA		 3313 if ((hw->phy.type == e1000_phy_82578) ||
3314 (hw->phy.type == e1000_phy_82577)) {
3315 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
3316 e1e_rphy(hw, HV_SCC_LOWER, &phy_data);
3317 adapter->stats.scc += phy_data;
3318
3319 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
3320 e1e_rphy(hw, HV_ECOL_LOWER, &phy_data);
3321 adapter->stats.ecol += phy_data;
3322
3323 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
3324 e1e_rphy(hw, HV_MCC_LOWER, &phy_data);
3325 adapter->stats.mcc += phy_data;
3326
3327 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
3328 e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data);
3329 adapter->stats.latecol += phy_data;
3330
3331 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
3332 e1e_rphy(hw, HV_DC_LOWER, &phy_data);
3333 adapter->stats.dc += phy_data;
3334 } else {
3335 adapter->stats.scc += er32(SCC);
3336 adapter->stats.ecol += er32(ECOL);
3337 adapter->stats.mcc += er32(MCC);
3338 adapter->stats.latecol += er32(LATECOL);
3339 adapter->stats.dc += er32(DC);
3340 }
bc7f75fa
AK		 3341 adapter->stats.xonrxc += er32(XONRXC);
3342 adapter->stats.xontxc += er32(XONTXC);
3343 adapter->stats.xoffrxc += er32(XOFFRXC);
3344 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3345 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3346 adapter->stats.gotc += er32(GOTCL);
3347 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3348 adapter->stats.rnbc += er32(RNBC);
3349 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3350
3351 adapter->stats.mptc += er32(MPTC);
3352 adapter->stats.bptc += er32(BPTC);
3353
3354 /* used for adaptive IFS */
3355
3356 hw->mac.tx_packet_delta = er32(TPT);
3357 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA		 3358 if ((hw->phy.type == e1000_phy_82578) ||
3359 (hw->phy.type == e1000_phy_82577)) {
3360 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
3361 e1e_rphy(hw, HV_COLC_LOWER, &phy_data);
3362 hw->mac.collision_delta = phy_data;
3363 } else {
3364 hw->mac.collision_delta = er32(COLC);
3365 }
bc7f75fa
AK		 3366 adapter->stats.colc += hw->mac.collision_delta;
3367
3368 adapter->stats.algnerrc += er32(ALGNERRC);
3369 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA		 3370 if ((hw->phy.type == e1000_phy_82578) ||
3371 (hw->phy.type == e1000_phy_82577)) {
3372 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
3373 e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data);
3374 adapter->stats.tncrs += phy_data;
3375 } else {
3376 if ((hw->mac.type != e1000_82574) &&
3377 (hw->mac.type != e1000_82583))
3378 adapter->stats.tncrs += er32(TNCRS);
3379 }
bc7f75fa
AK		 3380 adapter->stats.cexterr += er32(CEXTERR);
3381 adapter->stats.tsctc += er32(TSCTC);
3382 adapter->stats.tsctfc += er32(TSCTFC);
3383
bc7f75fa 3384 /* Fill out the OS statistics structure */
7274c20f
AK		 3385 netdev->stats.multicast = adapter->stats.mprc;
3386 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3387
3388 /* Rx Errors */
3389
ad68076e
BA		 3390 /*
3391 * RLEC on some newer hardware can be incorrect so build
3392 * our own version based on RUC and ROC
3393 */
7274c20f 3394 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3395 adapter->stats.crcerrs + adapter->stats.algnerrc +
3396 adapter->stats.ruc + adapter->stats.roc +
3397 adapter->stats.cexterr;
7274c20f 3398 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3399 adapter->stats.roc;
7274c20f
AK		 3400 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3401 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3402 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3403
3404 /* Tx Errors */
7274c20f 3405 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3406 adapter->stats.latecol;
7274c20f
AK		 3407 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3408 netdev->stats.tx_window_errors = adapter->stats.latecol;
3409 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3410
3411 /* Tx Dropped needs to be maintained elsewhere */
3412
bc7f75fa
AK		 3413 /* Management Stats */
3414 adapter->stats.mgptc += er32(MGTPTC);
3415 adapter->stats.mgprc += er32(MGTPRC);
3416 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3417}
3418
7c25769f
BA		 3419/**
3420 * e1000_phy_read_status - Update the PHY register status snapshot
3421 * @adapter: board private structure
3422 **/
3423static void e1000_phy_read_status(struct e1000_adapter *adapter)
3424{
3425 struct e1000_hw *hw = &adapter->hw;
3426 struct e1000_phy_regs *phy = &adapter->phy_regs;
3427 int ret_val;
7c25769f
BA		 3428
3429 if ((er32(STATUS) & E1000_STATUS_LU) &&
3430 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3431 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3432 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3433 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3434 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3435 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3436 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3437 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3438 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3439 if (ret_val)
44defeb3 3440 e_warn("Error reading PHY register\n");
7c25769f
BA		 3441 } else {
3442 /*
3443 * Do not read PHY registers if link is not up
3444 * Set values to typical power-on defaults
3445 */
3446 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3447 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3448 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3449 BMSR_ERCAP);
3450 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3451 ADVERTISE_ALL | ADVERTISE_CSMA);
3452 phy->lpa = 0;
3453 phy->expansion = EXPANSION_ENABLENPAGE;
3454 phy->ctrl1000 = ADVERTISE_1000FULL;
3455 phy->stat1000 = 0;
3456 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3457 }
7c25769f
BA		 3458}
3459
bc7f75fa
AK		 3460static void e1000_print_link_info(struct e1000_adapter *adapter)
3461{
bc7f75fa
AK		 3462 struct e1000_hw *hw = &adapter->hw;
3463 u32 ctrl = er32(CTRL);
3464
8f12fe86
BA		 3465 /* Link status message must follow this format for user tools */
3466 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3467 "Flow Control: %s\n",
3468 adapter->netdev->name,
44defeb3
JK		 3469 adapter->link_speed,
3470 (adapter->link_duplex == FULL_DUPLEX) ?
3471 "Full Duplex" : "Half Duplex",
3472 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3473 "RX/TX" :
3474 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3475 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3476}
3477
a20e4cf9 3478bool e1000_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3479{
3480 struct e1000_hw *hw = &adapter->hw;
3481 bool link_active = 0;
3482 s32 ret_val = 0;
3483
3484 /*
3485 * get_link_status is set on LSC (link status) interrupt or
3486 * Rx sequence error interrupt. get_link_status will stay
3487 * false until the check_for_link establishes link
3488 * for copper adapters ONLY
3489 */
3490 switch (hw->phy.media_type) {
3491 case e1000_media_type_copper:
3492 if (hw->mac.get_link_status) {
3493 ret_val = hw->mac.ops.check_for_link(hw);
3494 link_active = !hw->mac.get_link_status;
3495 } else {
3496 link_active = 1;
3497 }
3498 break;
3499 case e1000_media_type_fiber:
3500 ret_val = hw->mac.ops.check_for_link(hw);
3501 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3502 break;
3503 case e1000_media_type_internal_serdes:
3504 ret_val = hw->mac.ops.check_for_link(hw);
3505 link_active = adapter->hw.mac.serdes_has_link;
3506 break;
3507 default:
3508 case e1000_media_type_unknown:
3509 break;
3510 }
3511
3512 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3513 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3514 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3515 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3516 }
3517
3518 return link_active;
3519}
3520
3521static void e1000e_enable_receives(struct e1000_adapter *adapter)
3522{
3523 /* make sure the receive unit is started */
3524 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3525 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3526 struct e1000_hw *hw = &adapter->hw;
3527 u32 rctl = er32(RCTL);
3528 ew32(RCTL, rctl | E1000_RCTL_EN);
3529 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3530 }
3531}
3532
bc7f75fa
AK		 3533/**
3534 * e1000_watchdog - Timer Call-back
3535 * @data: pointer to adapter cast into an unsigned long
3536 **/
3537static void e1000_watchdog(unsigned long data)
3538{
3539 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3540
3541 /* Do the rest outside of interrupt context */
3542 schedule_work(&adapter->watchdog_task);
3543
3544 /* TODO: make this use queue_delayed_work() */
3545}
3546
3547static void e1000_watchdog_task(struct work_struct *work)
3548{
3549 struct e1000_adapter *adapter = container_of(work,
3550 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3551 struct net_device *netdev = adapter->netdev;
3552 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3553 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3554 struct e1000_ring *tx_ring = adapter->tx_ring;
3555 struct e1000_hw *hw = &adapter->hw;
3556 u32 link, tctl;
bc7f75fa
AK		 3557 int tx_pending = 0;
3558
318a94d6
JK		 3559 link = e1000_has_link(adapter);
3560 if ((netif_carrier_ok(netdev)) && link) {
3561 e1000e_enable_receives(adapter);
bc7f75fa 3562 goto link_up;
bc7f75fa
AK		 3563 }
3564
3565 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3566 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3567 e1000_update_mng_vlan(adapter);
3568
bc7f75fa
AK		 3569 if (link) {
3570 if (!netif_carrier_ok(netdev)) {
3571 bool txb2b = 1;
318a94d6 3572 /* update snapshot of PHY registers on LSC */
7c25769f 3573 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3574 mac->ops.get_link_up_info(&adapter->hw,
3575 &adapter->link_speed,
3576 &adapter->link_duplex);
3577 e1000_print_link_info(adapter);
f4187b56
BA		 3578 /*
3579 * On supported PHYs, check for duplex mismatch only
3580 * if link has autonegotiated at 10/100 half
3581 */
3582 if ((hw->phy.type == e1000_phy_igp_3 ||
3583 hw->phy.type == e1000_phy_bm) &&
3584 (hw->mac.autoneg == true) &&
3585 (adapter->link_speed == SPEED_10 ||
3586 adapter->link_speed == SPEED_100) &&
3587 (adapter->link_duplex == HALF_DUPLEX)) {
3588 u16 autoneg_exp;
3589
3590 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3591
3592 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3593 e_info("Autonegotiated half duplex but"
3594 " link partner cannot autoneg. "
3595 " Try forcing full duplex if "
3596 "link gets many collisions.\n");
3597 }
3598
ad68076e
BA		 3599 /*
3600 * tweak tx_queue_len according to speed/duplex
3601 * and adjust the timeout factor
3602 */
bc7f75fa
AK		 3603 netdev->tx_queue_len = adapter->tx_queue_len;
3604 adapter->tx_timeout_factor = 1;
3605 switch (adapter->link_speed) {
3606 case SPEED_10:
3607 txb2b = 0;
3608 netdev->tx_queue_len = 10;
10f1b492 3609 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3610 break;
3611 case SPEED_100:
3612 txb2b = 0;
3613 netdev->tx_queue_len = 100;
3614 /* maybe add some timeout factor ? */
3615 break;
3616 }
3617
ad68076e
BA		 3618 /*
3619 * workaround: re-program speed mode bit after
3620 * link-up event
3621 */
bc7f75fa
AK		 3622 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3623 !txb2b) {
3624 u32 tarc0;
e9ec2c0f 3625 tarc0 = er32(TARC(0));
bc7f75fa 3626 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3627 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3628 }
3629
ad68076e
BA		 3630 /*
3631 * disable TSO for pcie and 10/100 speeds, to avoid
3632 * some hardware issues
3633 */
bc7f75fa
AK		 3634 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3635 switch (adapter->link_speed) {
3636 case SPEED_10:
3637 case SPEED_100:
44defeb3 3638 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3639 netdev->features &= ~NETIF_F_TSO;
3640 netdev->features &= ~NETIF_F_TSO6;
3641 break;
3642 case SPEED_1000:
3643 netdev->features |= NETIF_F_TSO;
3644 netdev->features |= NETIF_F_TSO6;
3645 break;
3646 default:
3647 /* oops */
3648 break;
3649 }
3650 }
3651
ad68076e
BA		 3652 /*
3653 * enable transmits in the hardware, need to do this
3654 * after setting TARC(0)
3655 */
bc7f75fa
AK		 3656 tctl = er32(TCTL);
3657 tctl |= E1000_TCTL_EN;
3658 ew32(TCTL, tctl);
3659
75eb0fad
BA		 3660 /*
3661 * Perform any post-link-up configuration before
3662 * reporting link up.
3663 */
3664 if (phy->ops.cfg_on_link_up)
3665 phy->ops.cfg_on_link_up(hw);
3666
bc7f75fa 3667 netif_carrier_on(netdev);
bc7f75fa
AK		 3668
3669 if (!test_bit(__E1000_DOWN, &adapter->state))
3670 mod_timer(&adapter->phy_info_timer,
3671 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3672 }
3673 } else {
3674 if (netif_carrier_ok(netdev)) {
3675 adapter->link_speed = 0;
3676 adapter->link_duplex = 0;
8f12fe86
BA		 3677 /* Link status message must follow this format */
3678 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3679 adapter->netdev->name);
bc7f75fa 3680 netif_carrier_off(netdev);
bc7f75fa
AK		 3681 if (!test_bit(__E1000_DOWN, &adapter->state))
3682 mod_timer(&adapter->phy_info_timer,
3683 round_jiffies(jiffies + 2 * HZ));
3684
3685 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3686 schedule_work(&adapter->reset_task);
3687 }
3688 }
3689
3690link_up:
3691 e1000e_update_stats(adapter);
3692
3693 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3694 adapter->tpt_old = adapter->stats.tpt;
3695 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3696 adapter->colc_old = adapter->stats.colc;
3697
7c25769f
BA		 3698 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3699 adapter->gorc_old = adapter->stats.gorc;
3700 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3701 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3702
3703 e1000e_update_adaptive(&adapter->hw);
3704
3705 if (!netif_carrier_ok(netdev)) {
3706 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3707 tx_ring->count);
3708 if (tx_pending) {
ad68076e
BA		 3709 /*
3710 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3711 * but we've got queued Tx work that's never going
3712 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3713 * (Do the reset outside of interrupt context).
3714 */
bc7f75fa
AK		 3715 adapter->tx_timeout_count++;
3716 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 3717 /* return immediately since reset is imminent */
3718 return;
bc7f75fa
AK		 3719 }
3720 }
3721
ad68076e 3722 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 3723 if (adapter->msix_entries)
3724 ew32(ICS, adapter->rx_ring->ims_val);
3725 else
3726 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 3727
3728 /* Force detection of hung controller every watchdog period */
3729 adapter->detect_tx_hung = 1;
3730
ad68076e
BA		 3731 /*
3732 * With 82571 controllers, LAA may be overwritten due to controller
3733 * reset from the other port. Set the appropriate LAA in RAR[0]
3734 */
bc7f75fa
AK		 3735 if (e1000e_get_laa_state_82571(hw))
3736 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3737
3738 /* Reset the timer */
3739 if (!test_bit(__E1000_DOWN, &adapter->state))
3740 mod_timer(&adapter->watchdog_timer,
3741 round_jiffies(jiffies + 2 * HZ));
3742}
3743
3744#define E1000_TX_FLAGS_CSUM 0x00000001
3745#define E1000_TX_FLAGS_VLAN 0x00000002
3746#define E1000_TX_FLAGS_TSO 0x00000004
3747#define E1000_TX_FLAGS_IPV4 0x00000008
3748#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3749#define E1000_TX_FLAGS_VLAN_SHIFT 16
3750
3751static int e1000_tso(struct e1000_adapter *adapter,
3752 struct sk_buff *skb)
3753{
3754 struct e1000_ring *tx_ring = adapter->tx_ring;
3755 struct e1000_context_desc *context_desc;
3756 struct e1000_buffer *buffer_info;
3757 unsigned int i;
3758 u32 cmd_length = 0;
3759 u16 ipcse = 0, tucse, mss;
3760 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3761 int err;
3762
3763 if (skb_is_gso(skb)) {
3764 if (skb_header_cloned(skb)) {
3765 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3766 if (err)
3767 return err;
3768 }
3769
3770 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3771 mss = skb_shinfo(skb)->gso_size;
3772 if (skb->protocol == htons(ETH_P_IP)) {
3773 struct iphdr *iph = ip_hdr(skb);
3774 iph->tot_len = 0;
3775 iph->check = 0;
3776 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3777 iph->daddr, 0,
3778 IPPROTO_TCP,
3779 0);
3780 cmd_length = E1000_TXD_CMD_IP;
3781 ipcse = skb_transport_offset(skb) - 1;
3782 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3783 ipv6_hdr(skb)->payload_len = 0;
3784 tcp_hdr(skb)->check =
3785 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3786 &ipv6_hdr(skb)->daddr,
3787 0, IPPROTO_TCP, 0);
3788 ipcse = 0;
3789 }
3790 ipcss = skb_network_offset(skb);
3791 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3792 tucss = skb_transport_offset(skb);
3793 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3794 tucse = 0;
3795
3796 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3797 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3798
3799 i = tx_ring->next_to_use;
3800 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3801 buffer_info = &tx_ring->buffer_info[i];
3802
3803 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3804 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3805 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3806 context_desc->upper_setup.tcp_fields.tucss = tucss;
3807 context_desc->upper_setup.tcp_fields.tucso = tucso;
3808 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3809 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3810 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3811 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3812
3813 buffer_info->time_stamp = jiffies;
3814 buffer_info->next_to_watch = i;
3815
3816 i++;
3817 if (i == tx_ring->count)
3818 i = 0;
3819 tx_ring->next_to_use = i;
3820
3821 return 1;
3822 }
3823
3824 return 0;
3825}
3826
3827static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3828{
3829 struct e1000_ring *tx_ring = adapter->tx_ring;
3830 struct e1000_context_desc *context_desc;
3831 struct e1000_buffer *buffer_info;
3832 unsigned int i;
3833 u8 css;
af807c82 3834 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 3835 __be16 protocol;
bc7f75fa 3836
af807c82
DG		 3837 if (skb->ip_summed != CHECKSUM_PARTIAL)
3838 return 0;
bc7f75fa 3839
5f66f208
AJ		 3840 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3841 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3842 else
3843 protocol = skb->protocol;
3844
3f518390 3845 switch (protocol) {
09640e63 3846 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 3847 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3848 cmd_len |= E1000_TXD_CMD_TCP;
3849 break;
09640e63 3850 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 3851 /* XXX not handling all IPV6 headers */
3852 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3853 cmd_len |= E1000_TXD_CMD_TCP;
3854 break;
3855 default:
3856 if (unlikely(net_ratelimit()))
5f66f208
AJ		 3857 e_warn("checksum_partial proto=%x!\n",
3858 be16_to_cpu(protocol));
af807c82 3859 break;
bc7f75fa
AK		 3860 }
3861
af807c82
DG		 3862 css = skb_transport_offset(skb);
3863
3864 i = tx_ring->next_to_use;
3865 buffer_info = &tx_ring->buffer_info[i];
3866 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3867
3868 context_desc->lower_setup.ip_config = 0;
3869 context_desc->upper_setup.tcp_fields.tucss = css;
3870 context_desc->upper_setup.tcp_fields.tucso =
3871 css + skb->csum_offset;
3872 context_desc->upper_setup.tcp_fields.tucse = 0;
3873 context_desc->tcp_seg_setup.data = 0;
3874 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3875
3876 buffer_info->time_stamp = jiffies;
3877 buffer_info->next_to_watch = i;
3878
3879 i++;
3880 if (i == tx_ring->count)
3881 i = 0;
3882 tx_ring->next_to_use = i;
3883
3884 return 1;
bc7f75fa
AK		 3885}
3886
3887#define E1000_MAX_PER_TXD 8192
3888#define E1000_MAX_TXD_PWR 12
3889
3890static int e1000_tx_map(struct e1000_adapter *adapter,
3891 struct sk_buff *skb, unsigned int first,
3892 unsigned int max_per_txd, unsigned int nr_frags,
3893 unsigned int mss)
3894{
3895 struct e1000_ring *tx_ring = adapter->tx_ring;
1b7719c4 3896 struct e1000_buffer *buffer_info;
8ddc951c
JB		 3897 unsigned int len = skb_headlen(skb);
3898 unsigned int offset, size, count = 0, i;
bc7f75fa 3899 unsigned int f;
1b7719c4 3900 dma_addr_t *map;
bc7f75fa
AK		 3901
3902 i = tx_ring->next_to_use;
3903
8ddc951c
JB		 3904 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
3905 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
3906 adapter->tx_dma_failed++;
1b7719c4 3907 return 0;
8ddc951c
JB		 3908 }
3909
1b7719c4 3910 map = skb_shinfo(skb)->dma_maps;
8ddc951c
JB		 3911 offset = 0;
3912
bc7f75fa 3913 while (len) {
1b7719c4 3914 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 3915 size = min(len, max_per_txd);
3916
bc7f75fa 3917 buffer_info->length = size;
bc7f75fa 3918 buffer_info->time_stamp = jiffies;
bc7f75fa 3919 buffer_info->next_to_watch = i;
042a53a9 3920 buffer_info->dma = skb_shinfo(skb)->dma_head + offset;
1b7719c4 3921 count++;
bc7f75fa
AK		 3922
3923 len -= size;
3924 offset += size;
1b7719c4
AD		 3925
3926 if (len) {
3927 i++;
3928 if (i == tx_ring->count)
3929 i = 0;
3930 }
bc7f75fa
AK		 3931 }
3932
3933 for (f = 0; f < nr_frags; f++) {
3934 struct skb_frag_struct *frag;
3935
3936 frag = &skb_shinfo(skb)->frags[f];
3937 len = frag->size;
8ddc951c 3938 offset = 0;
bc7f75fa
AK		 3939
3940 while (len) {
1b7719c4
AD		 3941 i++;
3942 if (i == tx_ring->count)
3943 i = 0;
3944
bc7f75fa
AK		 3945 buffer_info = &tx_ring->buffer_info[i];
3946 size = min(len, max_per_txd);
bc7f75fa
AK		 3947
3948 buffer_info->length = size;
3949 buffer_info->time_stamp = jiffies;
bc7f75fa 3950 buffer_info->next_to_watch = i;
042a53a9 3951 buffer_info->dma = map[f] + offset;
bc7f75fa
AK		 3952
3953 len -= size;
3954 offset += size;
3955 count++;
bc7f75fa
AK		 3956 }
3957 }
3958
bc7f75fa
AK		 3959 tx_ring->buffer_info[i].skb = skb;
3960 tx_ring->buffer_info[first].next_to_watch = i;
3961
3962 return count;
3963}
3964
3965static void e1000_tx_queue(struct e1000_adapter *adapter,
3966 int tx_flags, int count)
3967{
3968 struct e1000_ring *tx_ring = adapter->tx_ring;
3969 struct e1000_tx_desc *tx_desc = NULL;
3970 struct e1000_buffer *buffer_info;
3971 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3972 unsigned int i;
3973
3974 if (tx_flags & E1000_TX_FLAGS_TSO) {
3975 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3976 E1000_TXD_CMD_TSE;
3977 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3978
3979 if (tx_flags & E1000_TX_FLAGS_IPV4)
3980 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3981 }
3982
3983 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3984 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3985 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3986 }
3987
3988 if (tx_flags & E1000_TX_FLAGS_VLAN) {
3989 txd_lower |= E1000_TXD_CMD_VLE;
3990 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3991 }
3992
3993 i = tx_ring->next_to_use;
3994
3995 while (count--) {
3996 buffer_info = &tx_ring->buffer_info[i];
3997 tx_desc = E1000_TX_DESC(*tx_ring, i);
3998 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3999 tx_desc->lower.data =
4000 cpu_to_le32(txd_lower | buffer_info->length);
4001 tx_desc->upper.data = cpu_to_le32(txd_upper);
4002
4003 i++;
4004 if (i == tx_ring->count)
4005 i = 0;
4006 }
4007
4008 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4009
ad68076e
BA		 4010 /*
4011 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4012 * know there are new descriptors to fetch. (Only
4013 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4014 * such as IA-64).
4015 */
bc7f75fa
AK		 4016 wmb();
4017
4018 tx_ring->next_to_use = i;
4019 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4020 /*
4021 * we need this if more than one processor can write to our tail
4022 * at a time, it synchronizes IO on IA64/Altix systems
4023 */
bc7f75fa
AK		 4024 mmiowb();
4025}
4026
4027#define MINIMUM_DHCP_PACKET_SIZE 282
4028static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4029 struct sk_buff *skb)
4030{
4031 struct e1000_hw *hw = &adapter->hw;
4032 u16 length, offset;
4033
4034 if (vlan_tx_tag_present(skb)) {
4035 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id)
4036 && (adapter->hw.mng_cookie.status &
4037 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4038 return 0;
4039 }
4040
4041 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4042 return 0;
4043
4044 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4045 return 0;
4046
4047 {
4048 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4049 struct udphdr *udp;
4050
4051 if (ip->protocol != IPPROTO_UDP)
4052 return 0;
4053
4054 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4055 if (ntohs(udp->dest) != 67)
4056 return 0;
4057
4058 offset = (u8 *)udp + 8 - skb->data;
4059 length = skb->len - offset;
4060 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4061 }
4062
4063 return 0;
4064}
4065
4066static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4067{
4068 struct e1000_adapter *adapter = netdev_priv(netdev);
4069
4070 netif_stop_queue(netdev);
ad68076e
BA		 4071 /*
4072 * Herbert's original patch had:
bc7f75fa 4073 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4074 * but since that doesn't exist yet, just open code it.
4075 */
bc7f75fa
AK		 4076 smp_mb();
4077
ad68076e
BA		 4078 /*
4079 * We need to check again in a case another CPU has just
4080 * made room available.
4081 */
bc7f75fa
AK		 4082 if (e1000_desc_unused(adapter->tx_ring) < size)
4083 return -EBUSY;
4084
4085 /* A reprieve! */
4086 netif_start_queue(netdev);
4087 ++adapter->restart_queue;
4088 return 0;
4089}
4090
4091static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4092{
4093 struct e1000_adapter *adapter = netdev_priv(netdev);
4094
4095 if (e1000_desc_unused(adapter->tx_ring) >= size)
4096 return 0;
4097 return __e1000_maybe_stop_tx(netdev, size);
4098}
4099
4100#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4101static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4102 struct net_device *netdev)
bc7f75fa
AK		 4103{
4104 struct e1000_adapter *adapter = netdev_priv(netdev);
4105 struct e1000_ring *tx_ring = adapter->tx_ring;
4106 unsigned int first;
4107 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4108 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4109 unsigned int tx_flags = 0;
4e6c709c 4110 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK		 4111 unsigned int nr_frags;
4112 unsigned int mss;
bc7f75fa
AK		 4113 int count = 0;
4114 int tso;
4115 unsigned int f;
bc7f75fa
AK		 4116
4117 if (test_bit(__E1000_DOWN, &adapter->state)) {
4118 dev_kfree_skb_any(skb);
4119 return NETDEV_TX_OK;
4120 }
4121
4122 if (skb->len <= 0) {
4123 dev_kfree_skb_any(skb);
4124 return NETDEV_TX_OK;
4125 }
4126
4127 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4128 /*
4129 * The controller does a simple calculation to
bc7f75fa
AK		 4130 * make sure there is enough room in the FIFO before
4131 * initiating the DMA for each buffer. The calc is:
4132 * 4 = ceil(buffer len/mss). To make sure we don't
4133 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4134 * drops.
4135 */
bc7f75fa
AK		 4136 if (mss) {
4137 u8 hdr_len;
4138 max_per_txd = min(mss << 2, max_per_txd);
4139 max_txd_pwr = fls(max_per_txd) - 1;
4140
ad68076e
BA		 4141 /*
4142 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4143 * points to just header, pull a few bytes of payload from
4144 * frags into skb->data
4145 */
bc7f75fa 4146 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4147 /*
4148 * we do this workaround for ES2LAN, but it is un-necessary,
4149 * avoiding it could save a lot of cycles
4150 */
4e6c709c 4151 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4152 unsigned int pull_size;
4153
4154 pull_size = min((unsigned int)4, skb->data_len);
4155 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4156 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4157 dev_kfree_skb_any(skb);
4158 return NETDEV_TX_OK;
4159 }
4160 len = skb->len - skb->data_len;
4161 }
4162 }
4163
4164 /* reserve a descriptor for the offload context */
4165 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4166 count++;
4167 count++;
4168
4169 count += TXD_USE_COUNT(len, max_txd_pwr);
4170
4171 nr_frags = skb_shinfo(skb)->nr_frags;
4172 for (f = 0; f < nr_frags; f++)
4173 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4174 max_txd_pwr);
4175
4176 if (adapter->hw.mac.tx_pkt_filtering)
4177 e1000_transfer_dhcp_info(adapter, skb);
4178
ad68076e
BA		 4179 /*
4180 * need: count + 2 desc gap to keep tail from touching
4181 * head, otherwise try next time
4182 */
92af3e95 4183 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4184 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4185
4186 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4187 tx_flags |= E1000_TX_FLAGS_VLAN;
4188 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4189 }
4190
4191 first = tx_ring->next_to_use;
4192
4193 tso = e1000_tso(adapter, skb);
4194 if (tso < 0) {
4195 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4196 return NETDEV_TX_OK;
4197 }
4198
4199 if (tso)
4200 tx_flags |= E1000_TX_FLAGS_TSO;
4201 else if (e1000_tx_csum(adapter, skb))
4202 tx_flags |= E1000_TX_FLAGS_CSUM;
4203
ad68076e
BA		 4204 /*
4205 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4206 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4207 * no longer assume, we must.
4208 */
bc7f75fa
AK		 4209 if (skb->protocol == htons(ETH_P_IP))
4210 tx_flags |= E1000_TX_FLAGS_IPV4;
4211
1b7719c4 4212 /* if count is 0 then mapping error has occured */
bc7f75fa 4213 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4214 if (count) {
4215 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4216 /* Make sure there is space in the ring for the next send. */
4217 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4218
4219 } else {
bc7f75fa 4220 dev_kfree_skb_any(skb);
1b7719c4
AD		 4221 tx_ring->buffer_info[first].time_stamp = 0;
4222 tx_ring->next_to_use = first;
bc7f75fa
AK		 4223 }
4224
bc7f75fa
AK		 4225 return NETDEV_TX_OK;
4226}
4227
4228/**
4229 * e1000_tx_timeout - Respond to a Tx Hang
4230 * @netdev: network interface device structure
4231 **/
4232static void e1000_tx_timeout(struct net_device *netdev)
4233{
4234 struct e1000_adapter *adapter = netdev_priv(netdev);
4235
4236 /* Do the reset outside of interrupt context */
4237 adapter->tx_timeout_count++;
4238 schedule_work(&adapter->reset_task);
4239}
4240
4241static void e1000_reset_task(struct work_struct *work)
4242{
4243 struct e1000_adapter *adapter;
4244 adapter = container_of(work, struct e1000_adapter, reset_task);
4245
4246 e1000e_reinit_locked(adapter);
4247}
4248
4249/**
4250 * e1000_get_stats - Get System Network Statistics
4251 * @netdev: network interface device structure
4252 *
4253 * Returns the address of the device statistics structure.
4254 * The statistics are actually updated from the timer callback.
4255 **/
4256static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4257{
bc7f75fa 4258 /* only return the current stats */
7274c20f 4259 return &netdev->stats;
bc7f75fa
AK		 4260}
4261
4262/**
4263 * e1000_change_mtu - Change the Maximum Transfer Unit
4264 * @netdev: network interface device structure
4265 * @new_mtu: new value for maximum frame size
4266 *
4267 * Returns 0 on success, negative on failure
4268 **/
4269static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4270{
4271 struct e1000_adapter *adapter = netdev_priv(netdev);
4272 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4273
2adc55c9
BA		 4274 /* Jumbo frame support */
4275 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4276 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4277 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4278 return -EINVAL;
4279 }
4280
2adc55c9
BA		 4281 /* Supported frame sizes */
4282 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4283 (max_frame > adapter->max_hw_frame_size)) {
4284 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4285 return -EINVAL;
4286 }
4287
4288 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4289 msleep(1);
4290 /* e1000e_down has a dependency on max_frame_size */
318a94d6 4291 adapter->max_frame_size = max_frame;
bc7f75fa
AK		 4292 if (netif_running(netdev))
4293 e1000e_down(adapter);
4294
ad68076e
BA		 4295 /*
4296 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4297 * means we reserve 2 more, this pushes us to allocate from the next
4298 * larger slab size.
ad68076e 4299 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4300 * However with the new *_jumbo_rx* routines, jumbo receives will use
4301 * fragmented skbs
ad68076e 4302 */
bc7f75fa
AK		 4303
4304 if (max_frame <= 256)
4305 adapter->rx_buffer_len = 256;
4306 else if (max_frame <= 512)
4307 adapter->rx_buffer_len = 512;
4308 else if (max_frame <= 1024)
4309 adapter->rx_buffer_len = 1024;
4310 else if (max_frame <= 2048)
4311 adapter->rx_buffer_len = 2048;
4312 else
4313 adapter->rx_buffer_len = 4096;
4314
4315 /* adjust allocation if LPE protects us, and we aren't using SBP */
4316 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4317 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4318 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4319 + ETH_FCS_LEN;
bc7f75fa 4320
44defeb3 4321 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
bc7f75fa
AK		 4322 netdev->mtu = new_mtu;
4323
4324 if (netif_running(netdev))
4325 e1000e_up(adapter);
4326 else
4327 e1000e_reset(adapter);
4328
4329 clear_bit(__E1000_RESETTING, &adapter->state);
4330
4331 return 0;
4332}
4333
4334static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4335 int cmd)
4336{
4337 struct e1000_adapter *adapter = netdev_priv(netdev);
4338 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4339
318a94d6 4340 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4341 return -EOPNOTSUPP;
4342
4343 switch (cmd) {
4344 case SIOCGMIIPHY:
4345 data->phy_id = adapter->hw.phy.addr;
4346 break;
4347 case SIOCGMIIREG:
7c25769f
BA		 4348 switch (data->reg_num & 0x1F) {
4349 case MII_BMCR:
4350 data->val_out = adapter->phy_regs.bmcr;
4351 break;
4352 case MII_BMSR:
4353 data->val_out = adapter->phy_regs.bmsr;
4354 break;
4355 case MII_PHYSID1:
4356 data->val_out = (adapter->hw.phy.id >> 16);
4357 break;
4358 case MII_PHYSID2:
4359 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4360 break;
4361 case MII_ADVERTISE:
4362 data->val_out = adapter->phy_regs.advertise;
4363 break;
4364 case MII_LPA:
4365 data->val_out = adapter->phy_regs.lpa;
4366 break;
4367 case MII_EXPANSION:
4368 data->val_out = adapter->phy_regs.expansion;
4369 break;
4370 case MII_CTRL1000:
4371 data->val_out = adapter->phy_regs.ctrl1000;
4372 break;
4373 case MII_STAT1000:
4374 data->val_out = adapter->phy_regs.stat1000;
4375 break;
4376 case MII_ESTATUS:
4377 data->val_out = adapter->phy_regs.estatus;
4378 break;
4379 default:
bc7f75fa
AK		 4380 return -EIO;
4381 }
bc7f75fa
AK		 4382 break;
4383 case SIOCSMIIREG:
4384 default:
4385 return -EOPNOTSUPP;
4386 }
4387 return 0;
4388}
4389
4390static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4391{
4392 switch (cmd) {
4393 case SIOCGMIIPHY:
4394 case SIOCGMIIREG:
4395 case SIOCSMIIREG:
4396 return e1000_mii_ioctl(netdev, ifr, cmd);
4397 default:
4398 return -EOPNOTSUPP;
4399 }
4400}
4401
a4f58f54
BA		 4402static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4403{
4404 struct e1000_hw *hw = &adapter->hw;
4405 u32 i, mac_reg;
4406 u16 phy_reg;
4407 int retval = 0;
4408
4409 /* copy MAC RARs to PHY RARs */
4410 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4411 mac_reg = er32(RAL(i));
4412 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4413 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4414 mac_reg = er32(RAH(i));
4415 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4416 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4417 }
4418
4419 /* copy MAC MTA to PHY MTA */
4420 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4421 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4422 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4423 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4424 }
4425
4426 /* configure PHY Rx Control register */
4427 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4428 mac_reg = er32(RCTL);
4429 if (mac_reg & E1000_RCTL_UPE)
4430 phy_reg |= BM_RCTL_UPE;
4431 if (mac_reg & E1000_RCTL_MPE)
4432 phy_reg |= BM_RCTL_MPE;
4433 phy_reg &= ~(BM_RCTL_MO_MASK);
4434 if (mac_reg & E1000_RCTL_MO_3)
4435 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4436 << BM_RCTL_MO_SHIFT);
4437 if (mac_reg & E1000_RCTL_BAM)
4438 phy_reg |= BM_RCTL_BAM;
4439 if (mac_reg & E1000_RCTL_PMCF)
4440 phy_reg |= BM_RCTL_PMCF;
4441 mac_reg = er32(CTRL);
4442 if (mac_reg & E1000_CTRL_RFCE)
4443 phy_reg |= BM_RCTL_RFCE;
4444 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4445
4446 /* enable PHY wakeup in MAC register */
4447 ew32(WUFC, wufc);
4448 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4449
4450 /* configure and enable PHY wakeup in PHY registers */
4451 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4452 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4453
4454 /* activate PHY wakeup */
4455 retval = hw->phy.ops.acquire_phy(hw);
4456 if (retval) {
4457 e_err("Could not acquire PHY\n");
4458 return retval;
4459 }
4460 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4461 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4462 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4463 if (retval) {
4464 e_err("Could not read PHY page 769\n");
4465 goto out;
4466 }
4467 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4468 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4469 if (retval)
4470 e_err("Could not set PHY Host Wakeup bit\n");
4471out:
4472 hw->phy.ops.release_phy(hw);
4473
4474 return retval;
4475}
4476
4f9de721 4477static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
bc7f75fa
AK		 4478{
4479 struct net_device *netdev = pci_get_drvdata(pdev);
4480 struct e1000_adapter *adapter = netdev_priv(netdev);
4481 struct e1000_hw *hw = &adapter->hw;
4482 u32 ctrl, ctrl_ext, rctl, status;
4483 u32 wufc = adapter->wol;
4484 int retval = 0;
4485
4486 netif_device_detach(netdev);
4487
4488 if (netif_running(netdev)) {
4489 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4490 e1000e_down(adapter);
4491 e1000_free_irq(adapter);
4492 }
4662e82b 4493 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4494
4495 retval = pci_save_state(pdev);
4496 if (retval)
4497 return retval;
4498
4499 status = er32(STATUS);
4500 if (status & E1000_STATUS_LU)
4501 wufc &= ~E1000_WUFC_LNKC;
4502
4503 if (wufc) {
4504 e1000_setup_rctl(adapter);
4505 e1000_set_multi(netdev);
4506
4507 /* turn on all-multi mode if wake on multicast is enabled */
4508 if (wufc & E1000_WUFC_MC) {
4509 rctl = er32(RCTL);
4510 rctl |= E1000_RCTL_MPE;
4511 ew32(RCTL, rctl);
4512 }
4513
4514 ctrl = er32(CTRL);
4515 /* advertise wake from D3Cold */
4516 #define E1000_CTRL_ADVD3WUC 0x00100000
4517 /* phy power management enable */
4518 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 4519 ctrl |= E1000_CTRL_ADVD3WUC;
4520 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4521 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 4522 ew32(CTRL, ctrl);
4523
318a94d6
JK		 4524 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4525 adapter->hw.phy.media_type ==
4526 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4527 /* keep the laser running in D3 */
4528 ctrl_ext = er32(CTRL_EXT);
4529 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4530 ew32(CTRL_EXT, ctrl_ext);
4531 }
4532
97ac8cae
BA		 4533 if (adapter->flags & FLAG_IS_ICH)
4534 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4535
bc7f75fa
AK		 4536 /* Allow time for pending master requests to run */
4537 e1000e_disable_pcie_master(&adapter->hw);
4538
82776a4b 4539 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 4540 /* enable wakeup by the PHY */
4541 retval = e1000_init_phy_wakeup(adapter, wufc);
4542 if (retval)
4543 return retval;
4544 } else {
4545 /* enable wakeup by the MAC */
4546 ew32(WUFC, wufc);
4547 ew32(WUC, E1000_WUC_PME_EN);
4548 }
bc7f75fa
AK		 4549 } else {
4550 ew32(WUC, 0);
4551 ew32(WUFC, 0);
bc7f75fa
AK		 4552 }
4553
4f9de721
RW		 4554 *enable_wake = !!wufc;
4555
bc7f75fa 4556 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 4557 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4558 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4559 *enable_wake = true;
bc7f75fa
AK		 4560
4561 if (adapter->hw.phy.type == e1000_phy_igp_3)
4562 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4563
ad68076e
BA		 4564 /*
4565 * Release control of h/w to f/w. If f/w is AMT enabled, this
4566 * would have already happened in close and is redundant.
4567 */
bc7f75fa
AK		 4568 e1000_release_hw_control(adapter);
4569
4570 pci_disable_device(pdev);
4571
4f9de721
RW		 4572 return 0;
4573}
4574
4575static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4576{
4577 if (sleep && wake) {
4578 pci_prepare_to_sleep(pdev);
4579 return;
4580 }
4581
4582 pci_wake_from_d3(pdev, wake);
4583 pci_set_power_state(pdev, PCI_D3hot);
4584}
4585
4586static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4587 bool wake)
4588{
4589 struct net_device *netdev = pci_get_drvdata(pdev);
4590 struct e1000_adapter *adapter = netdev_priv(netdev);
4591
005cbdfc
AD		 4592 /*
4593 * The pci-e switch on some quad port adapters will report a
4594 * correctable error when the MAC transitions from D0 to D3. To
4595 * prevent this we need to mask off the correctable errors on the
4596 * downstream port of the pci-e switch.
4597 */
4598 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4599 struct pci_dev *us_dev = pdev->bus->self;
4600 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4601 u16 devctl;
4602
4603 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4604 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4605 (devctl & ~PCI_EXP_DEVCTL_CERE));
4606
4f9de721 4607 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 4608
4609 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4610 } else {
4f9de721 4611 e1000_power_off(pdev, sleep, wake);
005cbdfc 4612 }
bc7f75fa
AK		 4613}
4614
1eae4eb2
AK		 4615static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4616{
4617 int pos;
1eae4eb2
AK		 4618 u16 val;
4619
4620 /*
4621 * 82573 workaround - disable L1 ASPM on mobile chipsets
4622 *
4623 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4624 * resulting in lost data or garbage information on the pci-e link
4625 * level. This could result in (false) bad EEPROM checksum errors,
4626 * long ping times (up to 2s) or even a system freeze/hang.
4627 *
4628 * Unfortunately this feature saves about 1W power consumption when
4629 * active.
4630 */
4631 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 4632 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4633 if (val & 0x2) {
4634 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4635 val &= ~0x2;
4636 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4637 }
4638}
4639
bc7f75fa 4640#ifdef CONFIG_PM
4f9de721
RW		 4641static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4642{
4643 int retval;
4644 bool wake;
4645
4646 retval = __e1000_shutdown(pdev, &wake);
4647 if (!retval)
4648 e1000_complete_shutdown(pdev, true, wake);
4649
4650 return retval;
4651}
4652
bc7f75fa
AK		 4653static int e1000_resume(struct pci_dev *pdev)
4654{
4655 struct net_device *netdev = pci_get_drvdata(pdev);
4656 struct e1000_adapter *adapter = netdev_priv(netdev);
4657 struct e1000_hw *hw = &adapter->hw;
4658 u32 err;
4659
4660 pci_set_power_state(pdev, PCI_D0);
4661 pci_restore_state(pdev);
1eae4eb2 4662 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4663
f0f422e5 4664 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4665 if (err) {
4666 dev_err(&pdev->dev,
4667 "Cannot enable PCI device from suspend\n");
4668 return err;
4669 }
4670
4671 pci_set_master(pdev);
4672
4673 pci_enable_wake(pdev, PCI_D3hot, 0);
4674 pci_enable_wake(pdev, PCI_D3cold, 0);
4675
4662e82b 4676 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 4677 if (netif_running(netdev)) {
4678 err = e1000_request_irq(adapter);
4679 if (err)
4680 return err;
4681 }
4682
4683 e1000e_power_up_phy(adapter);
a4f58f54
BA		 4684
4685 /* report the system wakeup cause from S3/S4 */
4686 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4687 u16 phy_data;
4688
4689 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
4690 if (phy_data) {
4691 e_info("PHY Wakeup cause - %s\n",
4692 phy_data & E1000_WUS_EX ? "Unicast Packet" :
4693 phy_data & E1000_WUS_MC ? "Multicast Packet" :
4694 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
4695 phy_data & E1000_WUS_MAG ? "Magic Packet" :
4696 phy_data & E1000_WUS_LNKC ? "Link Status "
4697 " Change" : "other");
4698 }
4699 e1e_wphy(&adapter->hw, BM_WUS, ~0);
4700 } else {
4701 u32 wus = er32(WUS);
4702 if (wus) {
4703 e_info("MAC Wakeup cause - %s\n",
4704 wus & E1000_WUS_EX ? "Unicast Packet" :
4705 wus & E1000_WUS_MC ? "Multicast Packet" :
4706 wus & E1000_WUS_BC ? "Broadcast Packet" :
4707 wus & E1000_WUS_MAG ? "Magic Packet" :
4708 wus & E1000_WUS_LNKC ? "Link Status Change" :
4709 "other");
4710 }
4711 ew32(WUS, ~0);
4712 }
4713
bc7f75fa 4714 e1000e_reset(adapter);
bc7f75fa
AK		 4715
4716 e1000_init_manageability(adapter);
4717
4718 if (netif_running(netdev))
4719 e1000e_up(adapter);
4720
4721 netif_device_attach(netdev);
4722
ad68076e
BA		 4723 /*
4724 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4725 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4726 * under the control of the driver.
4727 */
c43bc57e 4728 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4729 e1000_get_hw_control(adapter);
4730
4731 return 0;
4732}
4733#endif
4734
4735static void e1000_shutdown(struct pci_dev *pdev)
4736{
4f9de721
RW		 4737 bool wake = false;
4738
4739 __e1000_shutdown(pdev, &wake);
4740
4741 if (system_state == SYSTEM_POWER_OFF)
4742 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 4743}
4744
4745#ifdef CONFIG_NET_POLL_CONTROLLER
4746/*
4747 * Polling 'interrupt' - used by things like netconsole to send skbs
4748 * without having to re-enable interrupts. It's not called while
4749 * the interrupt routine is executing.
4750 */
4751static void e1000_netpoll(struct net_device *netdev)
4752{
4753 struct e1000_adapter *adapter = netdev_priv(netdev);
4754
4755 disable_irq(adapter->pdev->irq);
4756 e1000_intr(adapter->pdev->irq, netdev);
4757
bc7f75fa
AK		 4758 enable_irq(adapter->pdev->irq);
4759}
4760#endif
4761
4762/**
4763 * e1000_io_error_detected - called when PCI error is detected
4764 * @pdev: Pointer to PCI device
4765 * @state: The current pci connection state
4766 *
4767 * This function is called after a PCI bus error affecting
4768 * this device has been detected.
4769 */
4770static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4771 pci_channel_state_t state)
4772{
4773 struct net_device *netdev = pci_get_drvdata(pdev);
4774 struct e1000_adapter *adapter = netdev_priv(netdev);
4775
4776 netif_device_detach(netdev);
4777
c93b5a76
MM		 4778 if (state == pci_channel_io_perm_failure)
4779 return PCI_ERS_RESULT_DISCONNECT;
4780
bc7f75fa
AK		 4781 if (netif_running(netdev))
4782 e1000e_down(adapter);
4783 pci_disable_device(pdev);
4784
4785 /* Request a slot slot reset. */
4786 return PCI_ERS_RESULT_NEED_RESET;
4787}
4788
4789/**
4790 * e1000_io_slot_reset - called after the pci bus has been reset.
4791 * @pdev: Pointer to PCI device
4792 *
4793 * Restart the card from scratch, as if from a cold-boot. Implementation
4794 * resembles the first-half of the e1000_resume routine.
4795 */
4796static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4797{
4798 struct net_device *netdev = pci_get_drvdata(pdev);
4799 struct e1000_adapter *adapter = netdev_priv(netdev);
4800 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4801 int err;
111b9dc5 4802 pci_ers_result_t result;
bc7f75fa 4803
1eae4eb2 4804 e1000e_disable_l1aspm(pdev);
f0f422e5 4805 err = pci_enable_device_mem(pdev);
6e4f6f6b 4806 if (err) {
bc7f75fa
AK		 4807 dev_err(&pdev->dev,
4808 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 4809 result = PCI_ERS_RESULT_DISCONNECT;
4810 } else {
4811 pci_set_master(pdev);
4812 pci_restore_state(pdev);
bc7f75fa 4813
111b9dc5
JB		 4814 pci_enable_wake(pdev, PCI_D3hot, 0);
4815 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4816
111b9dc5
JB		 4817 e1000e_reset(adapter);
4818 ew32(WUS, ~0);
4819 result = PCI_ERS_RESULT_RECOVERED;
4820 }
bc7f75fa 4821
111b9dc5
JB		 4822 pci_cleanup_aer_uncorrect_error_status(pdev);
4823
4824 return result;
bc7f75fa
AK		 4825}
4826
4827/**
4828 * e1000_io_resume - called when traffic can start flowing again.
4829 * @pdev: Pointer to PCI device
4830 *
4831 * This callback is called when the error recovery driver tells us that
4832 * its OK to resume normal operation. Implementation resembles the
4833 * second-half of the e1000_resume routine.
4834 */
4835static void e1000_io_resume(struct pci_dev *pdev)
4836{
4837 struct net_device *netdev = pci_get_drvdata(pdev);
4838 struct e1000_adapter *adapter = netdev_priv(netdev);
4839
4840 e1000_init_manageability(adapter);
4841
4842 if (netif_running(netdev)) {
4843 if (e1000e_up(adapter)) {
4844 dev_err(&pdev->dev,
4845 "can't bring device back up after reset\n");
4846 return;
4847 }
4848 }
4849
4850 netif_device_attach(netdev);
4851
ad68076e
BA		 4852 /*
4853 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4854 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4855 * under the control of the driver.
4856 */
c43bc57e 4857 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4858 e1000_get_hw_control(adapter);
4859
4860}
4861
4862static void e1000_print_device_info(struct e1000_adapter *adapter)
4863{
4864 struct e1000_hw *hw = &adapter->hw;
4865 struct net_device *netdev = adapter->netdev;
69e3fd8c 4866 u32 pba_num;
bc7f75fa
AK		 4867
4868 /* print bus type/speed/width info */
7c510e4b 4869 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 4870 /* bus width */
4871 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4872 "Width x1"),
4873 /* MAC address */
7c510e4b 4874 netdev->dev_addr);
44defeb3
JK		 4875 e_info("Intel(R) PRO/%s Network Connection\n",
4876 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4877 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4878 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4879 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4880}
4881
10aa4c04
AK		 4882static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4883{
4884 struct e1000_hw *hw = &adapter->hw;
4885 int ret_val;
4886 u16 buf = 0;
4887
4888 if (hw->mac.type != e1000_82573)
4889 return;
4890
4891 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4892 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4893 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 4894 dev_warn(&adapter->pdev->dev,
4895 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK		 4896 }
4897
4898 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4899 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4900 /* ASPM enable */
6c2a9efa
FP		 4901 dev_warn(&adapter->pdev->dev,
4902 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK		 4903 }
4904}
4905
651c2466
SH		 4906static const struct net_device_ops e1000e_netdev_ops = {
4907 .ndo_open = e1000_open,
4908 .ndo_stop = e1000_close,
00829823 4909 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 4910 .ndo_get_stats = e1000_get_stats,
4911 .ndo_set_multicast_list = e1000_set_multi,
4912 .ndo_set_mac_address = e1000_set_mac,
4913 .ndo_change_mtu = e1000_change_mtu,
4914 .ndo_do_ioctl = e1000_ioctl,
4915 .ndo_tx_timeout = e1000_tx_timeout,
4916 .ndo_validate_addr = eth_validate_addr,
4917
4918 .ndo_vlan_rx_register = e1000_vlan_rx_register,
4919 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
4920 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
4921#ifdef CONFIG_NET_POLL_CONTROLLER
4922 .ndo_poll_controller = e1000_netpoll,
4923#endif
4924};
4925
bc7f75fa
AK		 4926/**
4927 * e1000_probe - Device Initialization Routine
4928 * @pdev: PCI device information struct
4929 * @ent: entry in e1000_pci_tbl
4930 *
4931 * Returns 0 on success, negative on failure
4932 *
4933 * e1000_probe initializes an adapter identified by a pci_dev structure.
4934 * The OS initialization, configuring of the adapter private structure,
4935 * and a hardware reset occur.
4936 **/
4937static int __devinit e1000_probe(struct pci_dev *pdev,
4938 const struct pci_device_id *ent)
4939{
4940 struct net_device *netdev;
4941 struct e1000_adapter *adapter;
4942 struct e1000_hw *hw;
4943 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 4944 resource_size_t mmio_start, mmio_len;
4945 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 4946
4947 static int cards_found;
4948 int i, err, pci_using_dac;
4949 u16 eeprom_data = 0;
4950 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4951
1eae4eb2 4952 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4953
f0f422e5 4954 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4955 if (err)
4956 return err;
4957
4958 pci_using_dac = 0;
6a35528a 4959 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa 4960 if (!err) {
6a35528a 4961 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa
AK		 4962 if (!err)
4963 pci_using_dac = 1;
4964 } else {
284901a9 4965 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
bc7f75fa
AK		 4966 if (err) {
4967 err = pci_set_consistent_dma_mask(pdev,
284901a9 4968 DMA_BIT_MASK(32));
bc7f75fa
AK		 4969 if (err) {
4970 dev_err(&pdev->dev, "No usable DMA "
4971 "configuration, aborting\n");
4972 goto err_dma;
4973 }
4974 }
4975 }
4976
e8de1481 4977 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 4978 pci_select_bars(pdev, IORESOURCE_MEM),
4979 e1000e_driver_name);
bc7f75fa
AK		 4980 if (err)
4981 goto err_pci_reg;
4982
68eac460 4983 /* AER (Advanced Error Reporting) hooks */
19d5afd4 4984 pci_enable_pcie_error_reporting(pdev);
68eac460 4985
bc7f75fa 4986 pci_set_master(pdev);
438b365a
BA		 4987 /* PCI config space info */
4988 err = pci_save_state(pdev);
4989 if (err)
4990 goto err_alloc_etherdev;
bc7f75fa
AK		 4991
4992 err = -ENOMEM;
4993 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
4994 if (!netdev)
4995 goto err_alloc_etherdev;
4996
bc7f75fa
AK		 4997 SET_NETDEV_DEV(netdev, &pdev->dev);
4998
4999 pci_set_drvdata(pdev, netdev);
5000 adapter = netdev_priv(netdev);
5001 hw = &adapter->hw;
5002 adapter->netdev = netdev;
5003 adapter->pdev = pdev;
5004 adapter->ei = ei;
5005 adapter->pba = ei->pba;
5006 adapter->flags = ei->flags;
eb7c3adb 5007 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5008 adapter->hw.adapter = adapter;
5009 adapter->hw.mac.type = ei->mac;
2adc55c9 5010 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5011 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5012
5013 mmio_start = pci_resource_start(pdev, 0);
5014 mmio_len = pci_resource_len(pdev, 0);
5015
5016 err = -EIO;
5017 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5018 if (!adapter->hw.hw_addr)
5019 goto err_ioremap;
5020
5021 if ((adapter->flags & FLAG_HAS_FLASH) &&
5022 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5023 flash_start = pci_resource_start(pdev, 1);
5024 flash_len = pci_resource_len(pdev, 1);
5025 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5026 if (!adapter->hw.flash_address)
5027 goto err_flashmap;
5028 }
5029
5030 /* construct the net_device struct */
651c2466 5031 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5032 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5033 netdev->watchdog_timeo = 5 * HZ;
5034 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5035 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5036
5037 netdev->mem_start = mmio_start;
5038 netdev->mem_end = mmio_start + mmio_len;
5039
5040 adapter->bd_number = cards_found++;
5041
4662e82b
BA		 5042 e1000e_check_options(adapter);
5043
bc7f75fa
AK		 5044 /* setup adapter struct */
5045 err = e1000_sw_init(adapter);
5046 if (err)
5047 goto err_sw_init;
5048
5049 err = -EIO;
5050
5051 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5052 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5053 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5054
69e3fd8c 5055 err = ei->get_variants(adapter);
bc7f75fa
AK		 5056 if (err)
5057 goto err_hw_init;
5058
4a770358
BA		 5059 if ((adapter->flags & FLAG_IS_ICH) &&
5060 (adapter->flags & FLAG_READ_ONLY_NVM))
5061 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5062
bc7f75fa
AK		 5063 hw->mac.ops.get_bus_info(&adapter->hw);
5064
318a94d6 5065 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5066
5067 /* Copper options */
318a94d6 5068 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5069 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5070 adapter->hw.phy.disable_polarity_correction = 0;
5071 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5072 }
5073
5074 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5075 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5076
5077 netdev->features = NETIF_F_SG |
5078 NETIF_F_HW_CSUM |
5079 NETIF_F_HW_VLAN_TX |
5080 NETIF_F_HW_VLAN_RX;
5081
5082 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5083 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5084
5085 netdev->features |= NETIF_F_TSO;
5086 netdev->features |= NETIF_F_TSO6;
5087
a5136e23
JK		 5088 netdev->vlan_features |= NETIF_F_TSO;
5089 netdev->vlan_features |= NETIF_F_TSO6;
5090 netdev->vlan_features |= NETIF_F_HW_CSUM;
5091 netdev->vlan_features |= NETIF_F_SG;
5092
bc7f75fa
AK		 5093 if (pci_using_dac)
5094 netdev->features |= NETIF_F_HIGHDMA;
5095
bc7f75fa
AK		 5096 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5097 adapter->flags |= FLAG_MNG_PT_ENABLED;
5098
ad68076e
BA		 5099 /*
5100 * before reading the NVM, reset the controller to
5101 * put the device in a known good starting state
5102 */
bc7f75fa
AK		 5103 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5104
5105 /*
5106 * systems with ASPM and others may see the checksum fail on the first
5107 * attempt. Let's give it a few tries
5108 */
5109 for (i = 0;; i++) {
5110 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5111 break;
5112 if (i == 2) {
44defeb3 5113 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5114 err = -EIO;
5115 goto err_eeprom;
5116 }
5117 }
5118
10aa4c04
AK		 5119 e1000_eeprom_checks(adapter);
5120
bc7f75fa
AK		 5121 /* copy the MAC address out of the NVM */
5122 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5123 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5124
5125 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5126 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5127
5128 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5129 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5130 err = -EIO;
5131 goto err_eeprom;
5132 }
5133
5134 init_timer(&adapter->watchdog_timer);
5135 adapter->watchdog_timer.function = &e1000_watchdog;
5136 adapter->watchdog_timer.data = (unsigned long) adapter;
5137
5138 init_timer(&adapter->phy_info_timer);
5139 adapter->phy_info_timer.function = &e1000_update_phy_info;
5140 adapter->phy_info_timer.data = (unsigned long) adapter;
5141
5142 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5143 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5144 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5145 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
bc7f75fa 5146
bc7f75fa
AK		 5147 /* Initialize link parameters. User can change them with ethtool */
5148 adapter->hw.mac.autoneg = 1;
309af40b 5149 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5150 adapter->hw.fc.requested_mode = e1000_fc_default;
5151 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5152 adapter->hw.phy.autoneg_advertised = 0x2f;
5153
5154 /* ring size defaults */
5155 adapter->rx_ring->count = 256;
5156 adapter->tx_ring->count = 256;
5157
5158 /*
5159 * Initial Wake on LAN setting - If APM wake is enabled in
5160 * the EEPROM, enable the ACPI Magic Packet filter
5161 */
5162 if (adapter->flags & FLAG_APME_IN_WUC) {
5163 /* APME bit in EEPROM is mapped to WUC.APME */
5164 eeprom_data = er32(WUC);
5165 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5166 if (eeprom_data & E1000_WUC_PHY_WAKE)
5167 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5168 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5169 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5170 (adapter->hw.bus.func == 1))
5171 e1000_read_nvm(&adapter->hw,
5172 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5173 else
5174 e1000_read_nvm(&adapter->hw,
5175 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5176 }
5177
5178 /* fetch WoL from EEPROM */
5179 if (eeprom_data & eeprom_apme_mask)
5180 adapter->eeprom_wol |= E1000_WUFC_MAG;
5181
5182 /*
5183 * now that we have the eeprom settings, apply the special cases
5184 * where the eeprom may be wrong or the board simply won't support
5185 * wake on lan on a particular port
5186 */
5187 if (!(adapter->flags & FLAG_HAS_WOL))
5188 adapter->eeprom_wol = 0;
5189
5190 /* initialize the wol settings based on the eeprom settings */
5191 adapter->wol = adapter->eeprom_wol;
6ff68026 5192 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5193
84527590
BA		 5194 /* save off EEPROM version number */
5195 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5196
bc7f75fa
AK		 5197 /* reset the hardware with the new settings */
5198 e1000e_reset(adapter);
5199
ad68076e
BA		 5200 /*
5201 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5202 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5203 * under the control of the driver.
5204 */
c43bc57e 5205 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5206 e1000_get_hw_control(adapter);
5207
bc7f75fa
AK		 5208 strcpy(netdev->name, "eth%d");
5209 err = register_netdev(netdev);
5210 if (err)
5211 goto err_register;
5212
9c563d20
JB		 5213 /* carrier off reporting is important to ethtool even BEFORE open */
5214 netif_carrier_off(netdev);
5215
bc7f75fa
AK		 5216 e1000_print_device_info(adapter);
5217
5218 return 0;
5219
5220err_register:
c43bc57e
JB		 5221 if (!(adapter->flags & FLAG_HAS_AMT))
5222 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5223err_eeprom:
5224 if (!e1000_check_reset_block(&adapter->hw))
5225 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5226err_hw_init:
bc7f75fa 5227
bc7f75fa
AK		 5228 kfree(adapter->tx_ring);
5229 kfree(adapter->rx_ring);
5230err_sw_init:
c43bc57e
JB		 5231 if (adapter->hw.flash_address)
5232 iounmap(adapter->hw.flash_address);
e82f54ba 5233 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5234err_flashmap:
bc7f75fa
AK		 5235 iounmap(adapter->hw.hw_addr);
5236err_ioremap:
5237 free_netdev(netdev);
5238err_alloc_etherdev:
f0f422e5
BA		 5239 pci_release_selected_regions(pdev,
5240 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5241err_pci_reg:
5242err_dma:
5243 pci_disable_device(pdev);
5244 return err;
5245}
5246
5247/**
5248 * e1000_remove - Device Removal Routine
5249 * @pdev: PCI device information struct
5250 *
5251 * e1000_remove is called by the PCI subsystem to alert the driver
5252 * that it should release a PCI device. The could be caused by a
5253 * Hot-Plug event, or because the driver is going to be removed from
5254 * memory.
5255 **/
5256static void __devexit e1000_remove(struct pci_dev *pdev)
5257{
5258 struct net_device *netdev = pci_get_drvdata(pdev);
5259 struct e1000_adapter *adapter = netdev_priv(netdev);
5260
ad68076e
BA		 5261 /*
5262 * flush_scheduled work may reschedule our watchdog task, so
5263 * explicitly disable watchdog tasks from being rescheduled
5264 */
bc7f75fa
AK		 5265 set_bit(__E1000_DOWN, &adapter->state);
5266 del_timer_sync(&adapter->watchdog_timer);
5267 del_timer_sync(&adapter->phy_info_timer);
5268
5269 flush_scheduled_work();
5270
ad68076e
BA		 5271 /*
5272 * Release control of h/w to f/w. If f/w is AMT enabled, this
5273 * would have already happened in close and is redundant.
5274 */
bc7f75fa
AK		 5275 e1000_release_hw_control(adapter);
5276
5277 unregister_netdev(netdev);
5278
5279 if (!e1000_check_reset_block(&adapter->hw))
5280 e1000_phy_hw_reset(&adapter->hw);
5281
4662e82b 5282 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5283 kfree(adapter->tx_ring);
5284 kfree(adapter->rx_ring);
5285
5286 iounmap(adapter->hw.hw_addr);
5287 if (adapter->hw.flash_address)
5288 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5289 pci_release_selected_regions(pdev,
5290 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5291
5292 free_netdev(netdev);
5293
111b9dc5 5294 /* AER disable */
19d5afd4 5295 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5296
bc7f75fa
AK		 5297 pci_disable_device(pdev);
5298}
5299
5300/* PCI Error Recovery (ERS) */
5301static struct pci_error_handlers e1000_err_handler = {
5302 .error_detected = e1000_io_error_detected,
5303 .slot_reset = e1000_io_slot_reset,
5304 .resume = e1000_io_resume,
5305};
5306
5307static struct pci_device_id e1000_pci_tbl[] = {
bc7f75fa
AK		 5308 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5309 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5310 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5311 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5312 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5313 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5314 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5315 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5316 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5317
bc7f75fa
AK		 5318 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5319 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5320 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5321 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5322
bc7f75fa
AK		 5323 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5324 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5325 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5326
4662e82b 5327 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5328 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5329 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5330
bc7f75fa
AK		 5331 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5332 board_80003es2lan },
5333 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5334 board_80003es2lan },
5335 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5336 board_80003es2lan },
5337 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5338 board_80003es2lan },
ad68076e 5339
bc7f75fa
AK		 5340 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5341 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5342 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5343 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5344 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5345 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5346 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
ad68076e 5347
bc7f75fa
AK		 5348 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5349 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5350 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5351 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5352 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5353 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5354 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5355 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5356 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5357
5358 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5359 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5360 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5361
f4187b56
BA		 5362 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5363 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5364
a4f58f54
BA		 5365 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5366 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5367 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5368 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5369
bc7f75fa
AK		 5370 { } /* terminate list */
5371};
5372MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5373
5374/* PCI Device API Driver */
5375static struct pci_driver e1000_driver = {
5376 .name = e1000e_driver_name,
5377 .id_table = e1000_pci_tbl,
5378 .probe = e1000_probe,
5379 .remove = __devexit_p(e1000_remove),
5380#ifdef CONFIG_PM
ad68076e 5381 /* Power Management Hooks */
bc7f75fa
AK		 5382 .suspend = e1000_suspend,
5383 .resume = e1000_resume,
5384#endif
5385 .shutdown = e1000_shutdown,
5386 .err_handler = &e1000_err_handler
5387};
5388
5389/**
5390 * e1000_init_module - Driver Registration Routine
5391 *
5392 * e1000_init_module is the first routine called when the driver is
5393 * loaded. All it does is register with the PCI subsystem.
5394 **/
5395static int __init e1000_init_module(void)
5396{
5397 int ret;
5398 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5399 e1000e_driver_name, e1000e_driver_version);
ad68076e 5400 printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n",
bc7f75fa
AK		 5401 e1000e_driver_name);
5402 ret = pci_register_driver(&e1000_driver);
97ac8cae
BA		 5403 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name,
5404 PM_QOS_DEFAULT_VALUE);
5405
bc7f75fa
AK		 5406 return ret;
5407}
5408module_init(e1000_init_module);
5409
5410/**
5411 * e1000_exit_module - Driver Exit Cleanup Routine
5412 *
5413 * e1000_exit_module is called just before the driver is removed
5414 * from memory.
5415 **/
5416static void __exit e1000_exit_module(void)
5417{
5418 pci_unregister_driver(&e1000_driver);
97ac8cae 5419 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name);
bc7f75fa
AK		 5420}
5421module_exit(e1000_exit_module);
5422
5423
5424MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5425MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5426MODULE_LICENSE("GPL");
5427MODULE_VERSION(DRV_VERSION);
5428
5429/* e1000_main.c */
Clone of davem's net-next-2.6 tree