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dma-mapping: replace all DMA_64BIT_MASK macro with DMA_BIT_MASK(64)
[net-next-2.6.git] / drivers / net / e1000e / netdev.c
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1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
ad68076e 4 Copyright(c) 1999 - 2008 Intel Corporation.
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5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
111b9dc5 47#include <linux/aer.h>
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48
49#include "e1000.h"
50
73afa537 51#define DRV_VERSION "0.3.3.4-k4"
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52char e1000e_driver_name[] = "e1000e";
53const char e1000e_driver_version[] = DRV_VERSION;
54
55static const struct e1000_info *e1000_info_tbl[] = {
56 [board_82571] = &e1000_82571_info,
57 [board_82572] = &e1000_82572_info,
58 [board_82573] = &e1000_82573_info,
4662e82b 59 [board_82574] = &e1000_82574_info,
8c81c9c3 60 [board_82583] = &e1000_82583_info,
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61 [board_80003es2lan] = &e1000_es2_info,
62 [board_ich8lan] = &e1000_ich8_info,
63 [board_ich9lan] = &e1000_ich9_info,
f4187b56 64 [board_ich10lan] = &e1000_ich10_info,
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65};
66
67#ifdef DEBUG
68/**
69 * e1000_get_hw_dev_name - return device name string
70 * used by hardware layer to print debugging information
71 **/
72char *e1000e_get_hw_dev_name(struct e1000_hw *hw)
73{
589c085f 74 return hw->adapter->netdev->name;
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75}
76#endif
77
78/**
79 * e1000_desc_unused - calculate if we have unused descriptors
80 **/
81static int e1000_desc_unused(struct e1000_ring *ring)
82{
83 if (ring->next_to_clean > ring->next_to_use)
84 return ring->next_to_clean - ring->next_to_use - 1;
85
86 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
87}
88
89/**
ad68076e 90 * e1000_receive_skb - helper function to handle Rx indications
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91 * @adapter: board private structure
92 * @status: descriptor status field as written by hardware
93 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
94 * @skb: pointer to sk_buff to be indicated to stack
95 **/
96static void e1000_receive_skb(struct e1000_adapter *adapter,
97 struct net_device *netdev,
98 struct sk_buff *skb,
a39fe742 99 u8 status, __le16 vlan)
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100{
101 skb->protocol = eth_type_trans(skb, netdev);
102
103 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
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104 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
105 le16_to_cpu(vlan), skb);
bc7f75fa 106 else
89c88b16 107 napi_gro_receive(&adapter->napi, skb);
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108}
109
110/**
111 * e1000_rx_checksum - Receive Checksum Offload for 82543
112 * @adapter: board private structure
113 * @status_err: receive descriptor status and error fields
114 * @csum: receive descriptor csum field
115 * @sk_buff: socket buffer with received data
116 **/
117static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
118 u32 csum, struct sk_buff *skb)
119{
120 u16 status = (u16)status_err;
121 u8 errors = (u8)(status_err >> 24);
122 skb->ip_summed = CHECKSUM_NONE;
123
124 /* Ignore Checksum bit is set */
125 if (status & E1000_RXD_STAT_IXSM)
126 return;
127 /* TCP/UDP checksum error bit is set */
128 if (errors & E1000_RXD_ERR_TCPE) {
129 /* let the stack verify checksum errors */
130 adapter->hw_csum_err++;
131 return;
132 }
133
134 /* TCP/UDP Checksum has not been calculated */
135 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
136 return;
137
138 /* It must be a TCP or UDP packet with a valid checksum */
139 if (status & E1000_RXD_STAT_TCPCS) {
140 /* TCP checksum is good */
141 skb->ip_summed = CHECKSUM_UNNECESSARY;
142 } else {
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143 /*
144 * IP fragment with UDP payload
145 * Hardware complements the payload checksum, so we undo it
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146 * and then put the value in host order for further stack use.
147 */
a39fe742
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148 __sum16 sum = (__force __sum16)htons(csum);
149 skb->csum = csum_unfold(~sum);
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150 skb->ip_summed = CHECKSUM_COMPLETE;
151 }
152 adapter->hw_csum_good++;
153}
154
155/**
156 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
157 * @adapter: address of board private structure
158 **/
159static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
160 int cleaned_count)
161{
162 struct net_device *netdev = adapter->netdev;
163 struct pci_dev *pdev = adapter->pdev;
164 struct e1000_ring *rx_ring = adapter->rx_ring;
165 struct e1000_rx_desc *rx_desc;
166 struct e1000_buffer *buffer_info;
167 struct sk_buff *skb;
168 unsigned int i;
169 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
170
171 i = rx_ring->next_to_use;
172 buffer_info = &rx_ring->buffer_info[i];
173
174 while (cleaned_count--) {
175 skb = buffer_info->skb;
176 if (skb) {
177 skb_trim(skb, 0);
178 goto map_skb;
179 }
180
181 skb = netdev_alloc_skb(netdev, bufsz);
182 if (!skb) {
183 /* Better luck next round */
184 adapter->alloc_rx_buff_failed++;
185 break;
186 }
187
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188 /*
189 * Make buffer alignment 2 beyond a 16 byte boundary
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190 * this will result in a 16 byte aligned IP header after
191 * the 14 byte MAC header is removed
192 */
193 skb_reserve(skb, NET_IP_ALIGN);
194
195 buffer_info->skb = skb;
196map_skb:
197 buffer_info->dma = pci_map_single(pdev, skb->data,
198 adapter->rx_buffer_len,
199 PCI_DMA_FROMDEVICE);
8d8bb39b 200 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
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201 dev_err(&pdev->dev, "RX DMA map failed\n");
202 adapter->rx_dma_failed++;
203 break;
204 }
205
206 rx_desc = E1000_RX_DESC(*rx_ring, i);
207 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
208
209 i++;
210 if (i == rx_ring->count)
211 i = 0;
212 buffer_info = &rx_ring->buffer_info[i];
213 }
214
215 if (rx_ring->next_to_use != i) {
216 rx_ring->next_to_use = i;
217 if (i-- == 0)
218 i = (rx_ring->count - 1);
219
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220 /*
221 * Force memory writes to complete before letting h/w
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222 * know there are new descriptors to fetch. (Only
223 * applicable for weak-ordered memory model archs,
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224 * such as IA-64).
225 */
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226 wmb();
227 writel(i, adapter->hw.hw_addr + rx_ring->tail);
228 }
229}
230
231/**
232 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
233 * @adapter: address of board private structure
234 **/
235static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
236 int cleaned_count)
237{
238 struct net_device *netdev = adapter->netdev;
239 struct pci_dev *pdev = adapter->pdev;
240 union e1000_rx_desc_packet_split *rx_desc;
241 struct e1000_ring *rx_ring = adapter->rx_ring;
242 struct e1000_buffer *buffer_info;
243 struct e1000_ps_page *ps_page;
244 struct sk_buff *skb;
245 unsigned int i, j;
246
247 i = rx_ring->next_to_use;
248 buffer_info = &rx_ring->buffer_info[i];
249
250 while (cleaned_count--) {
251 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
252
253 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
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254 ps_page = &buffer_info->ps_pages[j];
255 if (j >= adapter->rx_ps_pages) {
256 /* all unused desc entries get hw null ptr */
a39fe742 257 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
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258 continue;
259 }
260 if (!ps_page->page) {
261 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 262 if (!ps_page->page) {
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263 adapter->alloc_rx_buff_failed++;
264 goto no_buffers;
265 }
266 ps_page->dma = pci_map_page(pdev,
267 ps_page->page,
268 0, PAGE_SIZE,
269 PCI_DMA_FROMDEVICE);
8d8bb39b 270 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
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271 dev_err(&adapter->pdev->dev,
272 "RX DMA page map failed\n");
273 adapter->rx_dma_failed++;
274 goto no_buffers;
bc7f75fa 275 }
bc7f75fa 276 }
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277 /*
278 * Refresh the desc even if buffer_addrs
279 * didn't change because each write-back
280 * erases this info.
281 */
282 rx_desc->read.buffer_addr[j+1] =
283 cpu_to_le64(ps_page->dma);
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284 }
285
286 skb = netdev_alloc_skb(netdev,
287 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
288
289 if (!skb) {
290 adapter->alloc_rx_buff_failed++;
291 break;
292 }
293
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294 /*
295 * Make buffer alignment 2 beyond a 16 byte boundary
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296 * this will result in a 16 byte aligned IP header after
297 * the 14 byte MAC header is removed
298 */
299 skb_reserve(skb, NET_IP_ALIGN);
300
301 buffer_info->skb = skb;
302 buffer_info->dma = pci_map_single(pdev, skb->data,
303 adapter->rx_ps_bsize0,
304 PCI_DMA_FROMDEVICE);
8d8bb39b 305 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
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306 dev_err(&pdev->dev, "RX DMA map failed\n");
307 adapter->rx_dma_failed++;
308 /* cleanup skb */
309 dev_kfree_skb_any(skb);
310 buffer_info->skb = NULL;
311 break;
312 }
313
314 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
315
316 i++;
317 if (i == rx_ring->count)
318 i = 0;
319 buffer_info = &rx_ring->buffer_info[i];
320 }
321
322no_buffers:
323 if (rx_ring->next_to_use != i) {
324 rx_ring->next_to_use = i;
325
326 if (!(i--))
327 i = (rx_ring->count - 1);
328
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329 /*
330 * Force memory writes to complete before letting h/w
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331 * know there are new descriptors to fetch. (Only
332 * applicable for weak-ordered memory model archs,
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333 * such as IA-64).
334 */
bc7f75fa 335 wmb();
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336 /*
337 * Hardware increments by 16 bytes, but packet split
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338 * descriptors are 32 bytes...so we increment tail
339 * twice as much.
340 */
341 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
342 }
343}
344
97ac8cae
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345/**
346 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
347 * @adapter: address of board private structure
97ac8cae
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348 * @cleaned_count: number of buffers to allocate this pass
349 **/
350
351static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
352 int cleaned_count)
353{
354 struct net_device *netdev = adapter->netdev;
355 struct pci_dev *pdev = adapter->pdev;
356 struct e1000_rx_desc *rx_desc;
357 struct e1000_ring *rx_ring = adapter->rx_ring;
358 struct e1000_buffer *buffer_info;
359 struct sk_buff *skb;
360 unsigned int i;
361 unsigned int bufsz = 256 -
362 16 /* for skb_reserve */ -
363 NET_IP_ALIGN;
364
365 i = rx_ring->next_to_use;
366 buffer_info = &rx_ring->buffer_info[i];
367
368 while (cleaned_count--) {
369 skb = buffer_info->skb;
370 if (skb) {
371 skb_trim(skb, 0);
372 goto check_page;
373 }
374
375 skb = netdev_alloc_skb(netdev, bufsz);
376 if (unlikely(!skb)) {
377 /* Better luck next round */
378 adapter->alloc_rx_buff_failed++;
379 break;
380 }
381
382 /* Make buffer alignment 2 beyond a 16 byte boundary
383 * this will result in a 16 byte aligned IP header after
384 * the 14 byte MAC header is removed
385 */
386 skb_reserve(skb, NET_IP_ALIGN);
387
388 buffer_info->skb = skb;
389check_page:
390 /* allocate a new page if necessary */
391 if (!buffer_info->page) {
392 buffer_info->page = alloc_page(GFP_ATOMIC);
393 if (unlikely(!buffer_info->page)) {
394 adapter->alloc_rx_buff_failed++;
395 break;
396 }
397 }
398
399 if (!buffer_info->dma)
400 buffer_info->dma = pci_map_page(pdev,
401 buffer_info->page, 0,
402 PAGE_SIZE,
403 PCI_DMA_FROMDEVICE);
404
405 rx_desc = E1000_RX_DESC(*rx_ring, i);
406 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
407
408 if (unlikely(++i == rx_ring->count))
409 i = 0;
410 buffer_info = &rx_ring->buffer_info[i];
411 }
412
413 if (likely(rx_ring->next_to_use != i)) {
414 rx_ring->next_to_use = i;
415 if (unlikely(i-- == 0))
416 i = (rx_ring->count - 1);
417
418 /* Force memory writes to complete before letting h/w
419 * know there are new descriptors to fetch. (Only
420 * applicable for weak-ordered memory model archs,
421 * such as IA-64). */
422 wmb();
423 writel(i, adapter->hw.hw_addr + rx_ring->tail);
424 }
425}
426
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427/**
428 * e1000_clean_rx_irq - Send received data up the network stack; legacy
429 * @adapter: board private structure
430 *
431 * the return value indicates whether actual cleaning was done, there
432 * is no guarantee that everything was cleaned
433 **/
434static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
435 int *work_done, int work_to_do)
436{
437 struct net_device *netdev = adapter->netdev;
438 struct pci_dev *pdev = adapter->pdev;
439 struct e1000_ring *rx_ring = adapter->rx_ring;
440 struct e1000_rx_desc *rx_desc, *next_rxd;
441 struct e1000_buffer *buffer_info, *next_buffer;
442 u32 length;
443 unsigned int i;
444 int cleaned_count = 0;
445 bool cleaned = 0;
446 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
447
448 i = rx_ring->next_to_clean;
449 rx_desc = E1000_RX_DESC(*rx_ring, i);
450 buffer_info = &rx_ring->buffer_info[i];
451
452 while (rx_desc->status & E1000_RXD_STAT_DD) {
453 struct sk_buff *skb;
454 u8 status;
455
456 if (*work_done >= work_to_do)
457 break;
458 (*work_done)++;
459
460 status = rx_desc->status;
461 skb = buffer_info->skb;
462 buffer_info->skb = NULL;
463
464 prefetch(skb->data - NET_IP_ALIGN);
465
466 i++;
467 if (i == rx_ring->count)
468 i = 0;
469 next_rxd = E1000_RX_DESC(*rx_ring, i);
470 prefetch(next_rxd);
471
472 next_buffer = &rx_ring->buffer_info[i];
473
474 cleaned = 1;
475 cleaned_count++;
476 pci_unmap_single(pdev,
477 buffer_info->dma,
478 adapter->rx_buffer_len,
479 PCI_DMA_FROMDEVICE);
480 buffer_info->dma = 0;
481
482 length = le16_to_cpu(rx_desc->length);
483
484 /* !EOP means multiple descriptors were used to store a single
485 * packet, also make sure the frame isn't just CRC only */
486 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
487 /* All receives must fit into a single buffer */
44defeb3
JK
488 e_dbg("%s: Receive packet consumed multiple buffers\n",
489 netdev->name);
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490 /* recycle */
491 buffer_info->skb = skb;
492 goto next_desc;
493 }
494
495 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
496 /* recycle */
497 buffer_info->skb = skb;
498 goto next_desc;
499 }
500
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501 /* adjust length to remove Ethernet CRC */
502 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
503 length -= 4;
504
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505 total_rx_bytes += length;
506 total_rx_packets++;
507
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508 /*
509 * code added for copybreak, this should improve
bc7f75fa 510 * performance for small packets with large amounts
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511 * of reassembly being done in the stack
512 */
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513 if (length < copybreak) {
514 struct sk_buff *new_skb =
515 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
516 if (new_skb) {
517 skb_reserve(new_skb, NET_IP_ALIGN);
808ff676
BA
518 skb_copy_to_linear_data_offset(new_skb,
519 -NET_IP_ALIGN,
520 (skb->data -
521 NET_IP_ALIGN),
522 (length +
523 NET_IP_ALIGN));
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524 /* save the skb in buffer_info as good */
525 buffer_info->skb = skb;
526 skb = new_skb;
527 }
528 /* else just continue with the old one */
529 }
530 /* end copybreak code */
531 skb_put(skb, length);
532
533 /* Receive Checksum Offload */
534 e1000_rx_checksum(adapter,
535 (u32)(status) |
536 ((u32)(rx_desc->errors) << 24),
537 le16_to_cpu(rx_desc->csum), skb);
538
539 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
540
541next_desc:
542 rx_desc->status = 0;
543
544 /* return some buffers to hardware, one at a time is too slow */
545 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
546 adapter->alloc_rx_buf(adapter, cleaned_count);
547 cleaned_count = 0;
548 }
549
550 /* use prefetched values */
551 rx_desc = next_rxd;
552 buffer_info = next_buffer;
553 }
554 rx_ring->next_to_clean = i;
555
556 cleaned_count = e1000_desc_unused(rx_ring);
557 if (cleaned_count)
558 adapter->alloc_rx_buf(adapter, cleaned_count);
559
bc7f75fa 560 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 561 adapter->total_rx_packets += total_rx_packets;
41988692 562 adapter->net_stats.rx_bytes += total_rx_bytes;
7c25769f 563 adapter->net_stats.rx_packets += total_rx_packets;
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564 return cleaned;
565}
566
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567static void e1000_put_txbuf(struct e1000_adapter *adapter,
568 struct e1000_buffer *buffer_info)
569{
8ddc951c 570 buffer_info->dma = 0;
bc7f75fa 571 if (buffer_info->skb) {
8ddc951c
JB
572 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
573 DMA_TO_DEVICE);
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574 dev_kfree_skb_any(buffer_info->skb);
575 buffer_info->skb = NULL;
576 }
1b7719c4 577 buffer_info->time_stamp = 0;
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578}
579
580static void e1000_print_tx_hang(struct e1000_adapter *adapter)
581{
582 struct e1000_ring *tx_ring = adapter->tx_ring;
583 unsigned int i = tx_ring->next_to_clean;
584 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
585 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
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586
587 /* detected Tx unit hang */
44defeb3
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588 e_err("Detected Tx Unit Hang:\n"
589 " TDH <%x>\n"
590 " TDT <%x>\n"
591 " next_to_use <%x>\n"
592 " next_to_clean <%x>\n"
593 "buffer_info[next_to_clean]:\n"
594 " time_stamp <%lx>\n"
595 " next_to_watch <%x>\n"
596 " jiffies <%lx>\n"
597 " next_to_watch.status <%x>\n",
598 readl(adapter->hw.hw_addr + tx_ring->head),
599 readl(adapter->hw.hw_addr + tx_ring->tail),
600 tx_ring->next_to_use,
601 tx_ring->next_to_clean,
602 tx_ring->buffer_info[eop].time_stamp,
603 eop,
604 jiffies,
605 eop_desc->upper.fields.status);
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606}
607
608/**
609 * e1000_clean_tx_irq - Reclaim resources after transmit completes
610 * @adapter: board private structure
611 *
612 * the return value indicates whether actual cleaning was done, there
613 * is no guarantee that everything was cleaned
614 **/
615static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
616{
617 struct net_device *netdev = adapter->netdev;
618 struct e1000_hw *hw = &adapter->hw;
619 struct e1000_ring *tx_ring = adapter->tx_ring;
620 struct e1000_tx_desc *tx_desc, *eop_desc;
621 struct e1000_buffer *buffer_info;
622 unsigned int i, eop;
623 unsigned int count = 0;
12d04a3c 624 bool cleaned;
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625 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
626
627 i = tx_ring->next_to_clean;
628 eop = tx_ring->buffer_info[i].next_to_watch;
629 eop_desc = E1000_TX_DESC(*tx_ring, eop);
630
12d04a3c
AD
631 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
632 (count < tx_ring->count)) {
633 for (cleaned = 0; !cleaned; count++) {
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634 tx_desc = E1000_TX_DESC(*tx_ring, i);
635 buffer_info = &tx_ring->buffer_info[i];
636 cleaned = (i == eop);
637
638 if (cleaned) {
639 struct sk_buff *skb = buffer_info->skb;
640 unsigned int segs, bytecount;
641 segs = skb_shinfo(skb)->gso_segs ?: 1;
642 /* multiply data chunks by size of headers */
643 bytecount = ((segs - 1) * skb_headlen(skb)) +
644 skb->len;
645 total_tx_packets += segs;
646 total_tx_bytes += bytecount;
647 }
648
649 e1000_put_txbuf(adapter, buffer_info);
650 tx_desc->upper.data = 0;
651
652 i++;
653 if (i == tx_ring->count)
654 i = 0;
655 }
656
657 eop = tx_ring->buffer_info[i].next_to_watch;
658 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
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659 }
660
661 tx_ring->next_to_clean = i;
662
663#define TX_WAKE_THRESHOLD 32
664 if (cleaned && netif_carrier_ok(netdev) &&
665 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
666 /* Make sure that anybody stopping the queue after this
667 * sees the new next_to_clean.
668 */
669 smp_mb();
670
671 if (netif_queue_stopped(netdev) &&
672 !(test_bit(__E1000_DOWN, &adapter->state))) {
673 netif_wake_queue(netdev);
674 ++adapter->restart_queue;
675 }
676 }
677
678 if (adapter->detect_tx_hung) {
1b7719c4
AD
679 /* Detect a transmit hang in hardware, this serializes the
680 * check with the clearing of time_stamp and movement of i */
bc7f75fa 681 adapter->detect_tx_hung = 0;
12d04a3c
AD
682 if (tx_ring->buffer_info[i].time_stamp &&
683 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
bc7f75fa 684 + (adapter->tx_timeout_factor * HZ))
ad68076e 685 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
bc7f75fa
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686 e1000_print_tx_hang(adapter);
687 netif_stop_queue(netdev);
688 }
689 }
690 adapter->total_tx_bytes += total_tx_bytes;
691 adapter->total_tx_packets += total_tx_packets;
41988692 692 adapter->net_stats.tx_bytes += total_tx_bytes;
7c25769f 693 adapter->net_stats.tx_packets += total_tx_packets;
12d04a3c 694 return (count < tx_ring->count);
bc7f75fa
AK
695}
696
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697/**
698 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
699 * @adapter: board private structure
700 *
701 * the return value indicates whether actual cleaning was done, there
702 * is no guarantee that everything was cleaned
703 **/
704static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
705 int *work_done, int work_to_do)
706{
707 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
708 struct net_device *netdev = adapter->netdev;
709 struct pci_dev *pdev = adapter->pdev;
710 struct e1000_ring *rx_ring = adapter->rx_ring;
711 struct e1000_buffer *buffer_info, *next_buffer;
712 struct e1000_ps_page *ps_page;
713 struct sk_buff *skb;
714 unsigned int i, j;
715 u32 length, staterr;
716 int cleaned_count = 0;
717 bool cleaned = 0;
718 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
719
720 i = rx_ring->next_to_clean;
721 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
722 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
723 buffer_info = &rx_ring->buffer_info[i];
724
725 while (staterr & E1000_RXD_STAT_DD) {
726 if (*work_done >= work_to_do)
727 break;
728 (*work_done)++;
729 skb = buffer_info->skb;
730
731 /* in the packet split case this is header only */
732 prefetch(skb->data - NET_IP_ALIGN);
733
734 i++;
735 if (i == rx_ring->count)
736 i = 0;
737 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
738 prefetch(next_rxd);
739
740 next_buffer = &rx_ring->buffer_info[i];
741
742 cleaned = 1;
743 cleaned_count++;
744 pci_unmap_single(pdev, buffer_info->dma,
745 adapter->rx_ps_bsize0,
746 PCI_DMA_FROMDEVICE);
747 buffer_info->dma = 0;
748
749 if (!(staterr & E1000_RXD_STAT_EOP)) {
44defeb3
JK
750 e_dbg("%s: Packet Split buffers didn't pick up the "
751 "full packet\n", netdev->name);
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752 dev_kfree_skb_irq(skb);
753 goto next_desc;
754 }
755
756 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
757 dev_kfree_skb_irq(skb);
758 goto next_desc;
759 }
760
761 length = le16_to_cpu(rx_desc->wb.middle.length0);
762
763 if (!length) {
44defeb3
JK
764 e_dbg("%s: Last part of the packet spanning multiple "
765 "descriptors\n", netdev->name);
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766 dev_kfree_skb_irq(skb);
767 goto next_desc;
768 }
769
770 /* Good Receive */
771 skb_put(skb, length);
772
773 {
ad68076e
BA
774 /*
775 * this looks ugly, but it seems compiler issues make it
776 * more efficient than reusing j
777 */
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778 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
779
ad68076e
BA
780 /*
781 * page alloc/put takes too long and effects small packet
782 * throughput, so unsplit small packets and save the alloc/put
783 * only valid in softirq (napi) context to call kmap_*
784 */
bc7f75fa
AK
785 if (l1 && (l1 <= copybreak) &&
786 ((length + l1) <= adapter->rx_ps_bsize0)) {
787 u8 *vaddr;
788
47f44e40 789 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 790
ad68076e
BA
791 /*
792 * there is no documentation about how to call
bc7f75fa 793 * kmap_atomic, so we can't hold the mapping
ad68076e
BA
794 * very long
795 */
bc7f75fa
AK
796 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
797 PAGE_SIZE, PCI_DMA_FROMDEVICE);
798 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
799 memcpy(skb_tail_pointer(skb), vaddr, l1);
800 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
801 pci_dma_sync_single_for_device(pdev, ps_page->dma,
802 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 803
eb7c3adb
JK
804 /* remove the CRC */
805 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
806 l1 -= 4;
807
bc7f75fa
AK
808 skb_put(skb, l1);
809 goto copydone;
810 } /* if */
811 }
812
813 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
814 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
815 if (!length)
816 break;
817
47f44e40 818 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK
819 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
820 PCI_DMA_FROMDEVICE);
821 ps_page->dma = 0;
822 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
823 ps_page->page = NULL;
824 skb->len += length;
825 skb->data_len += length;
826 skb->truesize += length;
827 }
828
eb7c3adb
JK
829 /* strip the ethernet crc, problem is we're using pages now so
830 * this whole operation can get a little cpu intensive
831 */
832 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
833 pskb_trim(skb, skb->len - 4);
834
bc7f75fa
AK
835copydone:
836 total_rx_bytes += skb->len;
837 total_rx_packets++;
838
839 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
840 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
841
842 if (rx_desc->wb.upper.header_status &
843 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
844 adapter->rx_hdr_split++;
845
846 e1000_receive_skb(adapter, netdev, skb,
847 staterr, rx_desc->wb.middle.vlan);
848
849next_desc:
850 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
851 buffer_info->skb = NULL;
852
853 /* return some buffers to hardware, one at a time is too slow */
854 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
855 adapter->alloc_rx_buf(adapter, cleaned_count);
856 cleaned_count = 0;
857 }
858
859 /* use prefetched values */
860 rx_desc = next_rxd;
861 buffer_info = next_buffer;
862
863 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
864 }
865 rx_ring->next_to_clean = i;
866
867 cleaned_count = e1000_desc_unused(rx_ring);
868 if (cleaned_count)
869 adapter->alloc_rx_buf(adapter, cleaned_count);
870
bc7f75fa 871 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 872 adapter->total_rx_packets += total_rx_packets;
41988692 873 adapter->net_stats.rx_bytes += total_rx_bytes;
7c25769f 874 adapter->net_stats.rx_packets += total_rx_packets;
bc7f75fa
AK
875 return cleaned;
876}
877
97ac8cae
BA
878/**
879 * e1000_consume_page - helper function
880 **/
881static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
882 u16 length)
883{
884 bi->page = NULL;
885 skb->len += length;
886 skb->data_len += length;
887 skb->truesize += length;
888}
889
890/**
891 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
892 * @adapter: board private structure
893 *
894 * the return value indicates whether actual cleaning was done, there
895 * is no guarantee that everything was cleaned
896 **/
897
898static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
899 int *work_done, int work_to_do)
900{
901 struct net_device *netdev = adapter->netdev;
902 struct pci_dev *pdev = adapter->pdev;
903 struct e1000_ring *rx_ring = adapter->rx_ring;
904 struct e1000_rx_desc *rx_desc, *next_rxd;
905 struct e1000_buffer *buffer_info, *next_buffer;
906 u32 length;
907 unsigned int i;
908 int cleaned_count = 0;
909 bool cleaned = false;
910 unsigned int total_rx_bytes=0, total_rx_packets=0;
911
912 i = rx_ring->next_to_clean;
913 rx_desc = E1000_RX_DESC(*rx_ring, i);
914 buffer_info = &rx_ring->buffer_info[i];
915
916 while (rx_desc->status & E1000_RXD_STAT_DD) {
917 struct sk_buff *skb;
918 u8 status;
919
920 if (*work_done >= work_to_do)
921 break;
922 (*work_done)++;
923
924 status = rx_desc->status;
925 skb = buffer_info->skb;
926 buffer_info->skb = NULL;
927
928 ++i;
929 if (i == rx_ring->count)
930 i = 0;
931 next_rxd = E1000_RX_DESC(*rx_ring, i);
932 prefetch(next_rxd);
933
934 next_buffer = &rx_ring->buffer_info[i];
935
936 cleaned = true;
937 cleaned_count++;
938 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
939 PCI_DMA_FROMDEVICE);
940 buffer_info->dma = 0;
941
942 length = le16_to_cpu(rx_desc->length);
943
944 /* errors is only valid for DD + EOP descriptors */
945 if (unlikely((status & E1000_RXD_STAT_EOP) &&
946 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
947 /* recycle both page and skb */
948 buffer_info->skb = skb;
949 /* an error means any chain goes out the window
950 * too */
951 if (rx_ring->rx_skb_top)
952 dev_kfree_skb(rx_ring->rx_skb_top);
953 rx_ring->rx_skb_top = NULL;
954 goto next_desc;
955 }
956
957#define rxtop rx_ring->rx_skb_top
958 if (!(status & E1000_RXD_STAT_EOP)) {
959 /* this descriptor is only the beginning (or middle) */
960 if (!rxtop) {
961 /* this is the beginning of a chain */
962 rxtop = skb;
963 skb_fill_page_desc(rxtop, 0, buffer_info->page,
964 0, length);
965 } else {
966 /* this is the middle of a chain */
967 skb_fill_page_desc(rxtop,
968 skb_shinfo(rxtop)->nr_frags,
969 buffer_info->page, 0, length);
970 /* re-use the skb, only consumed the page */
971 buffer_info->skb = skb;
972 }
973 e1000_consume_page(buffer_info, rxtop, length);
974 goto next_desc;
975 } else {
976 if (rxtop) {
977 /* end of the chain */
978 skb_fill_page_desc(rxtop,
979 skb_shinfo(rxtop)->nr_frags,
980 buffer_info->page, 0, length);
981 /* re-use the current skb, we only consumed the
982 * page */
983 buffer_info->skb = skb;
984 skb = rxtop;
985 rxtop = NULL;
986 e1000_consume_page(buffer_info, skb, length);
987 } else {
988 /* no chain, got EOP, this buf is the packet
989 * copybreak to save the put_page/alloc_page */
990 if (length <= copybreak &&
991 skb_tailroom(skb) >= length) {
992 u8 *vaddr;
993 vaddr = kmap_atomic(buffer_info->page,
994 KM_SKB_DATA_SOFTIRQ);
995 memcpy(skb_tail_pointer(skb), vaddr,
996 length);
997 kunmap_atomic(vaddr,
998 KM_SKB_DATA_SOFTIRQ);
999 /* re-use the page, so don't erase
1000 * buffer_info->page */
1001 skb_put(skb, length);
1002 } else {
1003 skb_fill_page_desc(skb, 0,
1004 buffer_info->page, 0,
1005 length);
1006 e1000_consume_page(buffer_info, skb,
1007 length);
1008 }
1009 }
1010 }
1011
1012 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1013 e1000_rx_checksum(adapter,
1014 (u32)(status) |
1015 ((u32)(rx_desc->errors) << 24),
1016 le16_to_cpu(rx_desc->csum), skb);
1017
1018 /* probably a little skewed due to removing CRC */
1019 total_rx_bytes += skb->len;
1020 total_rx_packets++;
1021
1022 /* eth type trans needs skb->data to point to something */
1023 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1024 e_err("pskb_may_pull failed.\n");
97ac8cae
BA
1025 dev_kfree_skb(skb);
1026 goto next_desc;
1027 }
1028
1029 e1000_receive_skb(adapter, netdev, skb, status,
1030 rx_desc->special);
1031
1032next_desc:
1033 rx_desc->status = 0;
1034
1035 /* return some buffers to hardware, one at a time is too slow */
1036 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1037 adapter->alloc_rx_buf(adapter, cleaned_count);
1038 cleaned_count = 0;
1039 }
1040
1041 /* use prefetched values */
1042 rx_desc = next_rxd;
1043 buffer_info = next_buffer;
1044 }
1045 rx_ring->next_to_clean = i;
1046
1047 cleaned_count = e1000_desc_unused(rx_ring);
1048 if (cleaned_count)
1049 adapter->alloc_rx_buf(adapter, cleaned_count);
1050
1051 adapter->total_rx_bytes += total_rx_bytes;
1052 adapter->total_rx_packets += total_rx_packets;
1053 adapter->net_stats.rx_bytes += total_rx_bytes;
1054 adapter->net_stats.rx_packets += total_rx_packets;
1055 return cleaned;
1056}
1057
bc7f75fa
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1058/**
1059 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1060 * @adapter: board private structure
1061 **/
1062static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1063{
1064 struct e1000_ring *rx_ring = adapter->rx_ring;
1065 struct e1000_buffer *buffer_info;
1066 struct e1000_ps_page *ps_page;
1067 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK
1068 unsigned int i, j;
1069
1070 /* Free all the Rx ring sk_buffs */
1071 for (i = 0; i < rx_ring->count; i++) {
1072 buffer_info = &rx_ring->buffer_info[i];
1073 if (buffer_info->dma) {
1074 if (adapter->clean_rx == e1000_clean_rx_irq)
1075 pci_unmap_single(pdev, buffer_info->dma,
1076 adapter->rx_buffer_len,
1077 PCI_DMA_FROMDEVICE);
97ac8cae
BA
1078 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1079 pci_unmap_page(pdev, buffer_info->dma,
1080 PAGE_SIZE,
1081 PCI_DMA_FROMDEVICE);
bc7f75fa
AK
1082 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1083 pci_unmap_single(pdev, buffer_info->dma,
1084 adapter->rx_ps_bsize0,
1085 PCI_DMA_FROMDEVICE);
1086 buffer_info->dma = 0;
1087 }
1088
97ac8cae
BA
1089 if (buffer_info->page) {
1090 put_page(buffer_info->page);
1091 buffer_info->page = NULL;
1092 }
1093
bc7f75fa
AK
1094 if (buffer_info->skb) {
1095 dev_kfree_skb(buffer_info->skb);
1096 buffer_info->skb = NULL;
1097 }
1098
1099 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1100 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK
1101 if (!ps_page->page)
1102 break;
1103 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1104 PCI_DMA_FROMDEVICE);
1105 ps_page->dma = 0;
1106 put_page(ps_page->page);
1107 ps_page->page = NULL;
1108 }
1109 }
1110
1111 /* there also may be some cached data from a chained receive */
1112 if (rx_ring->rx_skb_top) {
1113 dev_kfree_skb(rx_ring->rx_skb_top);
1114 rx_ring->rx_skb_top = NULL;
1115 }
1116
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1117 /* Zero out the descriptor ring */
1118 memset(rx_ring->desc, 0, rx_ring->size);
1119
1120 rx_ring->next_to_clean = 0;
1121 rx_ring->next_to_use = 0;
1122
1123 writel(0, adapter->hw.hw_addr + rx_ring->head);
1124 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1125}
1126
a8f88ff5
JB
1127static void e1000e_downshift_workaround(struct work_struct *work)
1128{
1129 struct e1000_adapter *adapter = container_of(work,
1130 struct e1000_adapter, downshift_task);
1131
1132 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1133}
1134
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1135/**
1136 * e1000_intr_msi - Interrupt Handler
1137 * @irq: interrupt number
1138 * @data: pointer to a network interface device structure
1139 **/
1140static irqreturn_t e1000_intr_msi(int irq, void *data)
1141{
1142 struct net_device *netdev = data;
1143 struct e1000_adapter *adapter = netdev_priv(netdev);
1144 struct e1000_hw *hw = &adapter->hw;
1145 u32 icr = er32(ICR);
1146
ad68076e
BA
1147 /*
1148 * read ICR disables interrupts using IAM
1149 */
bc7f75fa 1150
573cca8c 1151 if (icr & E1000_ICR_LSC) {
bc7f75fa 1152 hw->mac.get_link_status = 1;
ad68076e
BA
1153 /*
1154 * ICH8 workaround-- Call gig speed drop workaround on cable
1155 * disconnect (LSC) before accessing any PHY registers
1156 */
bc7f75fa
AK
1157 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1158 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1159 schedule_work(&adapter->downshift_task);
bc7f75fa 1160
ad68076e
BA
1161 /*
1162 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1163 * link down event; disable receives here in the ISR and reset
ad68076e
BA
1164 * adapter in watchdog
1165 */
bc7f75fa
AK
1166 if (netif_carrier_ok(netdev) &&
1167 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1168 /* disable receives */
1169 u32 rctl = er32(RCTL);
1170 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1171 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK
1172 }
1173 /* guard against interrupt when we're going down */
1174 if (!test_bit(__E1000_DOWN, &adapter->state))
1175 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1176 }
1177
288379f0 1178 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
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1179 adapter->total_tx_bytes = 0;
1180 adapter->total_tx_packets = 0;
1181 adapter->total_rx_bytes = 0;
1182 adapter->total_rx_packets = 0;
288379f0 1183 __napi_schedule(&adapter->napi);
bc7f75fa
AK
1184 }
1185
1186 return IRQ_HANDLED;
1187}
1188
1189/**
1190 * e1000_intr - Interrupt Handler
1191 * @irq: interrupt number
1192 * @data: pointer to a network interface device structure
1193 **/
1194static irqreturn_t e1000_intr(int irq, void *data)
1195{
1196 struct net_device *netdev = data;
1197 struct e1000_adapter *adapter = netdev_priv(netdev);
1198 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1199 u32 rctl, icr = er32(ICR);
4662e82b 1200
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AK
1201 if (!icr)
1202 return IRQ_NONE; /* Not our interrupt */
1203
ad68076e
BA
1204 /*
1205 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1206 * not set, then the adapter didn't send an interrupt
1207 */
bc7f75fa
AK
1208 if (!(icr & E1000_ICR_INT_ASSERTED))
1209 return IRQ_NONE;
1210
ad68076e
BA
1211 /*
1212 * Interrupt Auto-Mask...upon reading ICR,
1213 * interrupts are masked. No need for the
1214 * IMC write
1215 */
bc7f75fa 1216
573cca8c 1217 if (icr & E1000_ICR_LSC) {
bc7f75fa 1218 hw->mac.get_link_status = 1;
ad68076e
BA
1219 /*
1220 * ICH8 workaround-- Call gig speed drop workaround on cable
1221 * disconnect (LSC) before accessing any PHY registers
1222 */
bc7f75fa
AK
1223 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1224 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1225 schedule_work(&adapter->downshift_task);
bc7f75fa 1226
ad68076e
BA
1227 /*
1228 * 80003ES2LAN workaround--
bc7f75fa
AK
1229 * For packet buffer work-around on link down event;
1230 * disable receives here in the ISR and
1231 * reset adapter in watchdog
1232 */
1233 if (netif_carrier_ok(netdev) &&
1234 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1235 /* disable receives */
1236 rctl = er32(RCTL);
1237 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1238 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK
1239 }
1240 /* guard against interrupt when we're going down */
1241 if (!test_bit(__E1000_DOWN, &adapter->state))
1242 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1243 }
1244
288379f0 1245 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
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1246 adapter->total_tx_bytes = 0;
1247 adapter->total_tx_packets = 0;
1248 adapter->total_rx_bytes = 0;
1249 adapter->total_rx_packets = 0;
288379f0 1250 __napi_schedule(&adapter->napi);
bc7f75fa
AK
1251 }
1252
1253 return IRQ_HANDLED;
1254}
1255
4662e82b
BA
1256static irqreturn_t e1000_msix_other(int irq, void *data)
1257{
1258 struct net_device *netdev = data;
1259 struct e1000_adapter *adapter = netdev_priv(netdev);
1260 struct e1000_hw *hw = &adapter->hw;
1261 u32 icr = er32(ICR);
1262
1263 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB
1264 if (!test_bit(__E1000_DOWN, &adapter->state))
1265 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA
1266 return IRQ_NONE;
1267 }
1268
1269 if (icr & adapter->eiac_mask)
1270 ew32(ICS, (icr & adapter->eiac_mask));
1271
1272 if (icr & E1000_ICR_OTHER) {
1273 if (!(icr & E1000_ICR_LSC))
1274 goto no_link_interrupt;
1275 hw->mac.get_link_status = 1;
1276 /* guard against interrupt when we're going down */
1277 if (!test_bit(__E1000_DOWN, &adapter->state))
1278 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1279 }
1280
1281no_link_interrupt:
a3c69fef
JB
1282 if (!test_bit(__E1000_DOWN, &adapter->state))
1283 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA
1284
1285 return IRQ_HANDLED;
1286}
1287
1288
1289static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1290{
1291 struct net_device *netdev = data;
1292 struct e1000_adapter *adapter = netdev_priv(netdev);
1293 struct e1000_hw *hw = &adapter->hw;
1294 struct e1000_ring *tx_ring = adapter->tx_ring;
1295
1296
1297 adapter->total_tx_bytes = 0;
1298 adapter->total_tx_packets = 0;
1299
1300 if (!e1000_clean_tx_irq(adapter))
1301 /* Ring was not completely cleaned, so fire another interrupt */
1302 ew32(ICS, tx_ring->ims_val);
1303
1304 return IRQ_HANDLED;
1305}
1306
1307static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1308{
1309 struct net_device *netdev = data;
1310 struct e1000_adapter *adapter = netdev_priv(netdev);
1311
1312 /* Write the ITR value calculated at the end of the
1313 * previous interrupt.
1314 */
1315 if (adapter->rx_ring->set_itr) {
1316 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1317 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1318 adapter->rx_ring->set_itr = 0;
1319 }
1320
288379f0 1321 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA
1322 adapter->total_rx_bytes = 0;
1323 adapter->total_rx_packets = 0;
288379f0 1324 __napi_schedule(&adapter->napi);
4662e82b
BA
1325 }
1326 return IRQ_HANDLED;
1327}
1328
1329/**
1330 * e1000_configure_msix - Configure MSI-X hardware
1331 *
1332 * e1000_configure_msix sets up the hardware to properly
1333 * generate MSI-X interrupts.
1334 **/
1335static void e1000_configure_msix(struct e1000_adapter *adapter)
1336{
1337 struct e1000_hw *hw = &adapter->hw;
1338 struct e1000_ring *rx_ring = adapter->rx_ring;
1339 struct e1000_ring *tx_ring = adapter->tx_ring;
1340 int vector = 0;
1341 u32 ctrl_ext, ivar = 0;
1342
1343 adapter->eiac_mask = 0;
1344
1345 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1346 if (hw->mac.type == e1000_82574) {
1347 u32 rfctl = er32(RFCTL);
1348 rfctl |= E1000_RFCTL_ACK_DIS;
1349 ew32(RFCTL, rfctl);
1350 }
1351
1352#define E1000_IVAR_INT_ALLOC_VALID 0x8
1353 /* Configure Rx vector */
1354 rx_ring->ims_val = E1000_IMS_RXQ0;
1355 adapter->eiac_mask |= rx_ring->ims_val;
1356 if (rx_ring->itr_val)
1357 writel(1000000000 / (rx_ring->itr_val * 256),
1358 hw->hw_addr + rx_ring->itr_register);
1359 else
1360 writel(1, hw->hw_addr + rx_ring->itr_register);
1361 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1362
1363 /* Configure Tx vector */
1364 tx_ring->ims_val = E1000_IMS_TXQ0;
1365 vector++;
1366 if (tx_ring->itr_val)
1367 writel(1000000000 / (tx_ring->itr_val * 256),
1368 hw->hw_addr + tx_ring->itr_register);
1369 else
1370 writel(1, hw->hw_addr + tx_ring->itr_register);
1371 adapter->eiac_mask |= tx_ring->ims_val;
1372 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1373
1374 /* set vector for Other Causes, e.g. link changes */
1375 vector++;
1376 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1377 if (rx_ring->itr_val)
1378 writel(1000000000 / (rx_ring->itr_val * 256),
1379 hw->hw_addr + E1000_EITR_82574(vector));
1380 else
1381 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1382
1383 /* Cause Tx interrupts on every write back */
1384 ivar |= (1 << 31);
1385
1386 ew32(IVAR, ivar);
1387
1388 /* enable MSI-X PBA support */
1389 ctrl_ext = er32(CTRL_EXT);
1390 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1391
1392 /* Auto-Mask Other interrupts upon ICR read */
1393#define E1000_EIAC_MASK_82574 0x01F00000
1394 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1395 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1396 ew32(CTRL_EXT, ctrl_ext);
1397 e1e_flush();
1398}
1399
1400void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1401{
1402 if (adapter->msix_entries) {
1403 pci_disable_msix(adapter->pdev);
1404 kfree(adapter->msix_entries);
1405 adapter->msix_entries = NULL;
1406 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1407 pci_disable_msi(adapter->pdev);
1408 adapter->flags &= ~FLAG_MSI_ENABLED;
1409 }
1410
1411 return;
1412}
1413
1414/**
1415 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1416 *
1417 * Attempt to configure interrupts using the best available
1418 * capabilities of the hardware and kernel.
1419 **/
1420void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1421{
1422 int err;
1423 int numvecs, i;
1424
1425
1426 switch (adapter->int_mode) {
1427 case E1000E_INT_MODE_MSIX:
1428 if (adapter->flags & FLAG_HAS_MSIX) {
1429 numvecs = 3; /* RxQ0, TxQ0 and other */
1430 adapter->msix_entries = kcalloc(numvecs,
1431 sizeof(struct msix_entry),
1432 GFP_KERNEL);
1433 if (adapter->msix_entries) {
1434 for (i = 0; i < numvecs; i++)
1435 adapter->msix_entries[i].entry = i;
1436
1437 err = pci_enable_msix(adapter->pdev,
1438 adapter->msix_entries,
1439 numvecs);
1440 if (err == 0)
1441 return;
1442 }
1443 /* MSI-X failed, so fall through and try MSI */
1444 e_err("Failed to initialize MSI-X interrupts. "
1445 "Falling back to MSI interrupts.\n");
1446 e1000e_reset_interrupt_capability(adapter);
1447 }
1448 adapter->int_mode = E1000E_INT_MODE_MSI;
1449 /* Fall through */
1450 case E1000E_INT_MODE_MSI:
1451 if (!pci_enable_msi(adapter->pdev)) {
1452 adapter->flags |= FLAG_MSI_ENABLED;
1453 } else {
1454 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1455 e_err("Failed to initialize MSI interrupts. Falling "
1456 "back to legacy interrupts.\n");
1457 }
1458 /* Fall through */
1459 case E1000E_INT_MODE_LEGACY:
1460 /* Don't do anything; this is the system default */
1461 break;
1462 }
1463
1464 return;
1465}
1466
1467/**
1468 * e1000_request_msix - Initialize MSI-X interrupts
1469 *
1470 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1471 * kernel.
1472 **/
1473static int e1000_request_msix(struct e1000_adapter *adapter)
1474{
1475 struct net_device *netdev = adapter->netdev;
1476 int err = 0, vector = 0;
1477
1478 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1479 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA
1480 else
1481 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1482 err = request_irq(adapter->msix_entries[vector].vector,
1483 &e1000_intr_msix_rx, 0, adapter->rx_ring->name,
1484 netdev);
1485 if (err)
1486 goto out;
1487 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1488 adapter->rx_ring->itr_val = adapter->itr;
1489 vector++;
1490
1491 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1492 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA
1493 else
1494 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1495 err = request_irq(adapter->msix_entries[vector].vector,
1496 &e1000_intr_msix_tx, 0, adapter->tx_ring->name,
1497 netdev);
1498 if (err)
1499 goto out;
1500 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1501 adapter->tx_ring->itr_val = adapter->itr;
1502 vector++;
1503
1504 err = request_irq(adapter->msix_entries[vector].vector,
1505 &e1000_msix_other, 0, netdev->name, netdev);
1506 if (err)
1507 goto out;
1508
1509 e1000_configure_msix(adapter);
1510 return 0;
1511out:
1512 return err;
1513}
1514
f8d59f78
BA
1515/**
1516 * e1000_request_irq - initialize interrupts
1517 *
1518 * Attempts to configure interrupts using the best available
1519 * capabilities of the hardware and kernel.
1520 **/
bc7f75fa
AK
1521static int e1000_request_irq(struct e1000_adapter *adapter)
1522{
1523 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK
1524 int err;
1525
4662e82b
BA
1526 if (adapter->msix_entries) {
1527 err = e1000_request_msix(adapter);
1528 if (!err)
1529 return err;
1530 /* fall back to MSI */
1531 e1000e_reset_interrupt_capability(adapter);
1532 adapter->int_mode = E1000E_INT_MODE_MSI;
1533 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1534 }
4662e82b
BA
1535 if (adapter->flags & FLAG_MSI_ENABLED) {
1536 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, 0,
1537 netdev->name, netdev);
1538 if (!err)
1539 return err;
bc7f75fa 1540
4662e82b
BA
1541 /* fall back to legacy interrupt */
1542 e1000e_reset_interrupt_capability(adapter);
1543 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK
1544 }
1545
4662e82b
BA
1546 err = request_irq(adapter->pdev->irq, &e1000_intr, IRQF_SHARED,
1547 netdev->name, netdev);
1548 if (err)
1549 e_err("Unable to allocate interrupt, Error: %d\n", err);
1550
bc7f75fa
AK
1551 return err;
1552}
1553
1554static void e1000_free_irq(struct e1000_adapter *adapter)
1555{
1556 struct net_device *netdev = adapter->netdev;
1557
4662e82b
BA
1558 if (adapter->msix_entries) {
1559 int vector = 0;
1560
1561 free_irq(adapter->msix_entries[vector].vector, netdev);
1562 vector++;
1563
1564 free_irq(adapter->msix_entries[vector].vector, netdev);
1565 vector++;
1566
1567 /* Other Causes interrupt vector */
1568 free_irq(adapter->msix_entries[vector].vector, netdev);
1569 return;
bc7f75fa 1570 }
4662e82b
BA
1571
1572 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK
1573}
1574
1575/**
1576 * e1000_irq_disable - Mask off interrupt generation on the NIC
1577 **/
1578static void e1000_irq_disable(struct e1000_adapter *adapter)
1579{
1580 struct e1000_hw *hw = &adapter->hw;
1581
bc7f75fa 1582 ew32(IMC, ~0);
4662e82b
BA
1583 if (adapter->msix_entries)
1584 ew32(EIAC_82574, 0);
bc7f75fa
AK
1585 e1e_flush();
1586 synchronize_irq(adapter->pdev->irq);
1587}
1588
1589/**
1590 * e1000_irq_enable - Enable default interrupt generation settings
1591 **/
1592static void e1000_irq_enable(struct e1000_adapter *adapter)
1593{
1594 struct e1000_hw *hw = &adapter->hw;
1595
4662e82b
BA
1596 if (adapter->msix_entries) {
1597 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1598 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1599 } else {
1600 ew32(IMS, IMS_ENABLE_MASK);
1601 }
74ef9c39 1602 e1e_flush();
bc7f75fa
AK
1603}
1604
1605/**
1606 * e1000_get_hw_control - get control of the h/w from f/w
1607 * @adapter: address of board private structure
1608 *
489815ce 1609 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK
1610 * For ASF and Pass Through versions of f/w this means that
1611 * the driver is loaded. For AMT version (only with 82573)
1612 * of the f/w this means that the network i/f is open.
1613 **/
1614static void e1000_get_hw_control(struct e1000_adapter *adapter)
1615{
1616 struct e1000_hw *hw = &adapter->hw;
1617 u32 ctrl_ext;
1618 u32 swsm;
1619
1620 /* Let firmware know the driver has taken over */
1621 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1622 swsm = er32(SWSM);
1623 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1624 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1625 ctrl_ext = er32(CTRL_EXT);
ad68076e 1626 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK
1627 }
1628}
1629
1630/**
1631 * e1000_release_hw_control - release control of the h/w to f/w
1632 * @adapter: address of board private structure
1633 *
489815ce 1634 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK
1635 * For ASF and Pass Through versions of f/w this means that the
1636 * driver is no longer loaded. For AMT version (only with 82573) i
1637 * of the f/w this means that the network i/f is closed.
1638 *
1639 **/
1640static void e1000_release_hw_control(struct e1000_adapter *adapter)
1641{
1642 struct e1000_hw *hw = &adapter->hw;
1643 u32 ctrl_ext;
1644 u32 swsm;
1645
1646 /* Let firmware taken over control of h/w */
1647 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1648 swsm = er32(SWSM);
1649 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1650 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1651 ctrl_ext = er32(CTRL_EXT);
ad68076e 1652 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK
1653 }
1654}
1655
bc7f75fa
AK
1656/**
1657 * @e1000_alloc_ring - allocate memory for a ring structure
1658 **/
1659static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1660 struct e1000_ring *ring)
1661{
1662 struct pci_dev *pdev = adapter->pdev;
1663
1664 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1665 GFP_KERNEL);
1666 if (!ring->desc)
1667 return -ENOMEM;
1668
1669 return 0;
1670}
1671
1672/**
1673 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1674 * @adapter: board private structure
1675 *
1676 * Return 0 on success, negative on failure
1677 **/
1678int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1679{
1680 struct e1000_ring *tx_ring = adapter->tx_ring;
1681 int err = -ENOMEM, size;
1682
1683 size = sizeof(struct e1000_buffer) * tx_ring->count;
1684 tx_ring->buffer_info = vmalloc(size);
1685 if (!tx_ring->buffer_info)
1686 goto err;
1687 memset(tx_ring->buffer_info, 0, size);
1688
1689 /* round up to nearest 4K */
1690 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1691 tx_ring->size = ALIGN(tx_ring->size, 4096);
1692
1693 err = e1000_alloc_ring_dma(adapter, tx_ring);
1694 if (err)
1695 goto err;
1696
1697 tx_ring->next_to_use = 0;
1698 tx_ring->next_to_clean = 0;
bc7f75fa
AK
1699
1700 return 0;
1701err:
1702 vfree(tx_ring->buffer_info);
44defeb3 1703 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK
1704 return err;
1705}
1706
1707/**
1708 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1709 * @adapter: board private structure
1710 *
1711 * Returns 0 on success, negative on failure
1712 **/
1713int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1714{
1715 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK
1716 struct e1000_buffer *buffer_info;
1717 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK
1718
1719 size = sizeof(struct e1000_buffer) * rx_ring->count;
1720 rx_ring->buffer_info = vmalloc(size);
1721 if (!rx_ring->buffer_info)
1722 goto err;
1723 memset(rx_ring->buffer_info, 0, size);
1724
47f44e40
AK
1725 for (i = 0; i < rx_ring->count; i++) {
1726 buffer_info = &rx_ring->buffer_info[i];
1727 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1728 sizeof(struct e1000_ps_page),
1729 GFP_KERNEL);
1730 if (!buffer_info->ps_pages)
1731 goto err_pages;
1732 }
bc7f75fa
AK
1733
1734 desc_len = sizeof(union e1000_rx_desc_packet_split);
1735
1736 /* Round up to nearest 4K */
1737 rx_ring->size = rx_ring->count * desc_len;
1738 rx_ring->size = ALIGN(rx_ring->size, 4096);
1739
1740 err = e1000_alloc_ring_dma(adapter, rx_ring);
1741 if (err)
47f44e40 1742 goto err_pages;
bc7f75fa
AK
1743
1744 rx_ring->next_to_clean = 0;
1745 rx_ring->next_to_use = 0;
1746 rx_ring->rx_skb_top = NULL;
1747
1748 return 0;
47f44e40
AK
1749
1750err_pages:
1751 for (i = 0; i < rx_ring->count; i++) {
1752 buffer_info = &rx_ring->buffer_info[i];
1753 kfree(buffer_info->ps_pages);
1754 }
bc7f75fa
AK
1755err:
1756 vfree(rx_ring->buffer_info);
44defeb3 1757 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK
1758 return err;
1759}
1760
1761/**
1762 * e1000_clean_tx_ring - Free Tx Buffers
1763 * @adapter: board private structure
1764 **/
1765static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1766{
1767 struct e1000_ring *tx_ring = adapter->tx_ring;
1768 struct e1000_buffer *buffer_info;
1769 unsigned long size;
1770 unsigned int i;
1771
1772 for (i = 0; i < tx_ring->count; i++) {
1773 buffer_info = &tx_ring->buffer_info[i];
1774 e1000_put_txbuf(adapter, buffer_info);
1775 }
1776
1777 size = sizeof(struct e1000_buffer) * tx_ring->count;
1778 memset(tx_ring->buffer_info, 0, size);
1779
1780 memset(tx_ring->desc, 0, tx_ring->size);
1781
1782 tx_ring->next_to_use = 0;
1783 tx_ring->next_to_clean = 0;
1784
1785 writel(0, adapter->hw.hw_addr + tx_ring->head);
1786 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1787}
1788
1789/**
1790 * e1000e_free_tx_resources - Free Tx Resources per Queue
1791 * @adapter: board private structure
1792 *
1793 * Free all transmit software resources
1794 **/
1795void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1796{
1797 struct pci_dev *pdev = adapter->pdev;
1798 struct e1000_ring *tx_ring = adapter->tx_ring;
1799
1800 e1000_clean_tx_ring(adapter);
1801
1802 vfree(tx_ring->buffer_info);
1803 tx_ring->buffer_info = NULL;
1804
1805 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1806 tx_ring->dma);
1807 tx_ring->desc = NULL;
1808}
1809
1810/**
1811 * e1000e_free_rx_resources - Free Rx Resources
1812 * @adapter: board private structure
1813 *
1814 * Free all receive software resources
1815 **/
1816
1817void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1818{
1819 struct pci_dev *pdev = adapter->pdev;
1820 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1821 int i;
bc7f75fa
AK
1822
1823 e1000_clean_rx_ring(adapter);
1824
47f44e40
AK
1825 for (i = 0; i < rx_ring->count; i++) {
1826 kfree(rx_ring->buffer_info[i].ps_pages);
1827 }
1828
bc7f75fa
AK
1829 vfree(rx_ring->buffer_info);
1830 rx_ring->buffer_info = NULL;
1831
bc7f75fa
AK
1832 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1833 rx_ring->dma);
1834 rx_ring->desc = NULL;
1835}
1836
1837/**
1838 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK
1839 * @adapter: pointer to adapter
1840 * @itr_setting: current adapter->itr
1841 * @packets: the number of packets during this measurement interval
1842 * @bytes: the number of bytes during this measurement interval
1843 *
bc7f75fa
AK
1844 * Stores a new ITR value based on packets and byte
1845 * counts during the last interrupt. The advantage of per interrupt
1846 * computation is faster updates and more accurate ITR for the current
1847 * traffic pattern. Constants in this function were computed
1848 * based on theoretical maximum wire speed and thresholds were set based
1849 * on testing data as well as attempting to minimize response time
4662e82b
BA
1850 * while increasing bulk throughput. This functionality is controlled
1851 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK
1852 **/
1853static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1854 u16 itr_setting, int packets,
1855 int bytes)
1856{
1857 unsigned int retval = itr_setting;
1858
1859 if (packets == 0)
1860 goto update_itr_done;
1861
1862 switch (itr_setting) {
1863 case lowest_latency:
1864 /* handle TSO and jumbo frames */
1865 if (bytes/packets > 8000)
1866 retval = bulk_latency;
1867 else if ((packets < 5) && (bytes > 512)) {
1868 retval = low_latency;
1869 }
1870 break;
1871 case low_latency: /* 50 usec aka 20000 ints/s */
1872 if (bytes > 10000) {
1873 /* this if handles the TSO accounting */
1874 if (bytes/packets > 8000) {
1875 retval = bulk_latency;
1876 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1877 retval = bulk_latency;
1878 } else if ((packets > 35)) {
1879 retval = lowest_latency;
1880 }
1881 } else if (bytes/packets > 2000) {
1882 retval = bulk_latency;
1883 } else if (packets <= 2 && bytes < 512) {
1884 retval = lowest_latency;
1885 }
1886 break;
1887 case bulk_latency: /* 250 usec aka 4000 ints/s */
1888 if (bytes > 25000) {
1889 if (packets > 35) {
1890 retval = low_latency;
1891 }
1892 } else if (bytes < 6000) {
1893 retval = low_latency;
1894 }
1895 break;
1896 }
1897
1898update_itr_done:
1899 return retval;
1900}
1901
1902static void e1000_set_itr(struct e1000_adapter *adapter)
1903{
1904 struct e1000_hw *hw = &adapter->hw;
1905 u16 current_itr;
1906 u32 new_itr = adapter->itr;
1907
1908 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1909 if (adapter->link_speed != SPEED_1000) {
1910 current_itr = 0;
1911 new_itr = 4000;
1912 goto set_itr_now;
1913 }
1914
1915 adapter->tx_itr = e1000_update_itr(adapter,
1916 adapter->tx_itr,
1917 adapter->total_tx_packets,
1918 adapter->total_tx_bytes);
1919 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1920 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1921 adapter->tx_itr = low_latency;
1922
1923 adapter->rx_itr = e1000_update_itr(adapter,
1924 adapter->rx_itr,
1925 adapter->total_rx_packets,
1926 adapter->total_rx_bytes);
1927 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1928 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1929 adapter->rx_itr = low_latency;
1930
1931 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1932
1933 switch (current_itr) {
1934 /* counts and packets in update_itr are dependent on these numbers */
1935 case lowest_latency:
1936 new_itr = 70000;
1937 break;
1938 case low_latency:
1939 new_itr = 20000; /* aka hwitr = ~200 */
1940 break;
1941 case bulk_latency:
1942 new_itr = 4000;
1943 break;
1944 default:
1945 break;
1946 }
1947
1948set_itr_now:
1949 if (new_itr != adapter->itr) {
ad68076e
BA
1950 /*
1951 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1952 * by adding intermediate steps when interrupt rate is
ad68076e
BA
1953 * increasing
1954 */
bc7f75fa
AK
1955 new_itr = new_itr > adapter->itr ?
1956 min(adapter->itr + (new_itr >> 2), new_itr) :
1957 new_itr;
1958 adapter->itr = new_itr;
4662e82b
BA
1959 adapter->rx_ring->itr_val = new_itr;
1960 if (adapter->msix_entries)
1961 adapter->rx_ring->set_itr = 1;
1962 else
1963 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK
1964 }
1965}
1966
4662e82b
BA
1967/**
1968 * e1000_alloc_queues - Allocate memory for all rings
1969 * @adapter: board private structure to initialize
1970 **/
1971static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1972{
1973 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1974 if (!adapter->tx_ring)
1975 goto err;
1976
1977 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1978 if (!adapter->rx_ring)
1979 goto err;
1980
1981 return 0;
1982err:
1983 e_err("Unable to allocate memory for queues\n");
1984 kfree(adapter->rx_ring);
1985 kfree(adapter->tx_ring);
1986 return -ENOMEM;
1987}
1988
bc7f75fa
AK
1989/**
1990 * e1000_clean - NAPI Rx polling callback
ad68076e 1991 * @napi: struct associated with this polling callback
489815ce 1992 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK
1993 **/
1994static int e1000_clean(struct napi_struct *napi, int budget)
1995{
1996 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 1997 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1998 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 1999 int tx_cleaned = 0, work_done = 0;
bc7f75fa 2000
4cf1653a 2001 adapter = netdev_priv(poll_dev);
bc7f75fa 2002
4662e82b
BA
2003 if (adapter->msix_entries &&
2004 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2005 goto clean_rx;
2006
92af3e95 2007 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2008
4662e82b 2009clean_rx:
bc7f75fa 2010 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2011
12d04a3c 2012 if (!tx_cleaned)
d2c7ddd6 2013 work_done = budget;
bc7f75fa 2014
53e52c72
DM
2015 /* If budget not fully consumed, exit the polling mode */
2016 if (work_done < budget) {
bc7f75fa
AK
2017 if (adapter->itr_setting & 3)
2018 e1000_set_itr(adapter);
288379f0 2019 napi_complete(napi);
a3c69fef
JB
2020 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2021 if (adapter->msix_entries)
2022 ew32(IMS, adapter->rx_ring->ims_val);
2023 else
2024 e1000_irq_enable(adapter);
2025 }
bc7f75fa
AK
2026 }
2027
2028 return work_done;
2029}
2030
2031static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2032{
2033 struct e1000_adapter *adapter = netdev_priv(netdev);
2034 struct e1000_hw *hw = &adapter->hw;
2035 u32 vfta, index;
2036
2037 /* don't update vlan cookie if already programmed */
2038 if ((adapter->hw.mng_cookie.status &
2039 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2040 (vid == adapter->mng_vlan_id))
2041 return;
2042 /* add VID to filter table */
2043 index = (vid >> 5) & 0x7F;
2044 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2045 vfta |= (1 << (vid & 0x1F));
2046 e1000e_write_vfta(hw, index, vfta);
2047}
2048
2049static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2050{
2051 struct e1000_adapter *adapter = netdev_priv(netdev);
2052 struct e1000_hw *hw = &adapter->hw;
2053 u32 vfta, index;
2054
74ef9c39
JB
2055 if (!test_bit(__E1000_DOWN, &adapter->state))
2056 e1000_irq_disable(adapter);
bc7f75fa 2057 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB
2058
2059 if (!test_bit(__E1000_DOWN, &adapter->state))
2060 e1000_irq_enable(adapter);
bc7f75fa
AK
2061
2062 if ((adapter->hw.mng_cookie.status &
2063 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2064 (vid == adapter->mng_vlan_id)) {
2065 /* release control to f/w */
2066 e1000_release_hw_control(adapter);
2067 return;
2068 }
2069
2070 /* remove VID from filter table */
2071 index = (vid >> 5) & 0x7F;
2072 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2073 vfta &= ~(1 << (vid & 0x1F));
2074 e1000e_write_vfta(hw, index, vfta);
2075}
2076
2077static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2078{
2079 struct net_device *netdev = adapter->netdev;
2080 u16 vid = adapter->hw.mng_cookie.vlan_id;
2081 u16 old_vid = adapter->mng_vlan_id;
2082
2083 if (!adapter->vlgrp)
2084 return;
2085
2086 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2087 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2088 if (adapter->hw.mng_cookie.status &
2089 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2090 e1000_vlan_rx_add_vid(netdev, vid);
2091 adapter->mng_vlan_id = vid;
2092 }
2093
2094 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2095 (vid != old_vid) &&
2096 !vlan_group_get_device(adapter->vlgrp, old_vid))
2097 e1000_vlan_rx_kill_vid(netdev, old_vid);
2098 } else {
2099 adapter->mng_vlan_id = vid;
2100 }
2101}
2102
2103
2104static void e1000_vlan_rx_register(struct net_device *netdev,
2105 struct vlan_group *grp)
2106{
2107 struct e1000_adapter *adapter = netdev_priv(netdev);
2108 struct e1000_hw *hw = &adapter->hw;
2109 u32 ctrl, rctl;
2110
74ef9c39
JB
2111 if (!test_bit(__E1000_DOWN, &adapter->state))
2112 e1000_irq_disable(adapter);
bc7f75fa
AK
2113 adapter->vlgrp = grp;
2114
2115 if (grp) {
2116 /* enable VLAN tag insert/strip */
2117 ctrl = er32(CTRL);
2118 ctrl |= E1000_CTRL_VME;
2119 ew32(CTRL, ctrl);
2120
2121 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2122 /* enable VLAN receive filtering */
2123 rctl = er32(RCTL);
bc7f75fa
AK
2124 rctl &= ~E1000_RCTL_CFIEN;
2125 ew32(RCTL, rctl);
2126 e1000_update_mng_vlan(adapter);
2127 }
2128 } else {
2129 /* disable VLAN tag insert/strip */
2130 ctrl = er32(CTRL);
2131 ctrl &= ~E1000_CTRL_VME;
2132 ew32(CTRL, ctrl);
2133
2134 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK
2135 if (adapter->mng_vlan_id !=
2136 (u16)E1000_MNG_VLAN_NONE) {
2137 e1000_vlan_rx_kill_vid(netdev,
2138 adapter->mng_vlan_id);
2139 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2140 }
2141 }
2142 }
2143
74ef9c39
JB
2144 if (!test_bit(__E1000_DOWN, &adapter->state))
2145 e1000_irq_enable(adapter);
bc7f75fa
AK
2146}
2147
2148static void e1000_restore_vlan(struct e1000_adapter *adapter)
2149{
2150 u16 vid;
2151
2152 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2153
2154 if (!adapter->vlgrp)
2155 return;
2156
2157 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2158 if (!vlan_group_get_device(adapter->vlgrp, vid))
2159 continue;
2160 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2161 }
2162}
2163
2164static void e1000_init_manageability(struct e1000_adapter *adapter)
2165{
2166 struct e1000_hw *hw = &adapter->hw;
2167 u32 manc, manc2h;
2168
2169 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2170 return;
2171
2172 manc = er32(MANC);
2173
ad68076e
BA
2174 /*
2175 * enable receiving management packets to the host. this will probably
bc7f75fa 2176 * generate destination unreachable messages from the host OS, but
ad68076e
BA
2177 * the packets will be handled on SMBUS
2178 */
bc7f75fa
AK
2179 manc |= E1000_MANC_EN_MNG2HOST;
2180 manc2h = er32(MANC2H);
2181#define E1000_MNG2HOST_PORT_623 (1 << 5)
2182#define E1000_MNG2HOST_PORT_664 (1 << 6)
2183 manc2h |= E1000_MNG2HOST_PORT_623;
2184 manc2h |= E1000_MNG2HOST_PORT_664;
2185 ew32(MANC2H, manc2h);
2186 ew32(MANC, manc);
2187}
2188
2189/**
2190 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2191 * @adapter: board private structure
2192 *
2193 * Configure the Tx unit of the MAC after a reset.
2194 **/
2195static void e1000_configure_tx(struct e1000_adapter *adapter)
2196{
2197 struct e1000_hw *hw = &adapter->hw;
2198 struct e1000_ring *tx_ring = adapter->tx_ring;
2199 u64 tdba;
2200 u32 tdlen, tctl, tipg, tarc;
2201 u32 ipgr1, ipgr2;
2202
2203 /* Setup the HW Tx Head and Tail descriptor pointers */
2204 tdba = tx_ring->dma;
2205 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2206 ew32(TDBAL, (tdba & DMA_32BIT_MASK));
2207 ew32(TDBAH, (tdba >> 32));
2208 ew32(TDLEN, tdlen);
2209 ew32(TDH, 0);
2210 ew32(TDT, 0);
2211 tx_ring->head = E1000_TDH;
2212 tx_ring->tail = E1000_TDT;
2213
2214 /* Set the default values for the Tx Inter Packet Gap timer */
2215 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2216 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2217 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2218
2219 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2220 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2221
2222 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2223 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2224 ew32(TIPG, tipg);
2225
2226 /* Set the Tx Interrupt Delay register */
2227 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2228 /* Tx irq moderation */
bc7f75fa
AK
2229 ew32(TADV, adapter->tx_abs_int_delay);
2230
2231 /* Program the Transmit Control Register */
2232 tctl = er32(TCTL);
2233 tctl &= ~E1000_TCTL_CT;
2234 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2235 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2236
2237 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2238 tarc = er32(TARC(0));
ad68076e
BA
2239 /*
2240 * set the speed mode bit, we'll clear it if we're not at
2241 * gigabit link later
2242 */
bc7f75fa
AK
2243#define SPEED_MODE_BIT (1 << 21)
2244 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2245 ew32(TARC(0), tarc);
bc7f75fa
AK
2246 }
2247
2248 /* errata: program both queues to unweighted RR */
2249 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2250 tarc = er32(TARC(0));
bc7f75fa 2251 tarc |= 1;
e9ec2c0f
JK
2252 ew32(TARC(0), tarc);
2253 tarc = er32(TARC(1));
bc7f75fa 2254 tarc |= 1;
e9ec2c0f 2255 ew32(TARC(1), tarc);
bc7f75fa
AK
2256 }
2257
2258 e1000e_config_collision_dist(hw);
2259
2260 /* Setup Transmit Descriptor Settings for eop descriptor */
2261 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2262
2263 /* only set IDE if we are delaying interrupts using the timers */
2264 if (adapter->tx_int_delay)
2265 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2266
2267 /* enable Report Status bit */
2268 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2269
2270 ew32(TCTL, tctl);
2271
2272 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2273}
2274
2275/**
2276 * e1000_setup_rctl - configure the receive control registers
2277 * @adapter: Board private structure
2278 **/
2279#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2280 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2281static void e1000_setup_rctl(struct e1000_adapter *adapter)
2282{
2283 struct e1000_hw *hw = &adapter->hw;
2284 u32 rctl, rfctl;
2285 u32 psrctl = 0;
2286 u32 pages = 0;
2287
2288 /* Program MC offset vector base */
2289 rctl = er32(RCTL);
2290 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2291 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2292 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2293 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2294
2295 /* Do not Store bad packets */
2296 rctl &= ~E1000_RCTL_SBP;
2297
2298 /* Enable Long Packet receive */
2299 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2300 rctl &= ~E1000_RCTL_LPE;
2301 else
2302 rctl |= E1000_RCTL_LPE;
2303
eb7c3adb
JK
2304 /* Some systems expect that the CRC is included in SMBUS traffic. The
2305 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2306 * host memory when this is enabled
2307 */
2308 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2309 rctl |= E1000_RCTL_SECRC;
5918bd88 2310
bc7f75fa
AK
2311 /* Setup buffer sizes */
2312 rctl &= ~E1000_RCTL_SZ_4096;
2313 rctl |= E1000_RCTL_BSEX;
2314 switch (adapter->rx_buffer_len) {
2315 case 256:
2316 rctl |= E1000_RCTL_SZ_256;
2317 rctl &= ~E1000_RCTL_BSEX;
2318 break;
2319 case 512:
2320 rctl |= E1000_RCTL_SZ_512;
2321 rctl &= ~E1000_RCTL_BSEX;
2322 break;
2323 case 1024:
2324 rctl |= E1000_RCTL_SZ_1024;
2325 rctl &= ~E1000_RCTL_BSEX;
2326 break;
2327 case 2048:
2328 default:
2329 rctl |= E1000_RCTL_SZ_2048;
2330 rctl &= ~E1000_RCTL_BSEX;
2331 break;
2332 case 4096:
2333 rctl |= E1000_RCTL_SZ_4096;
2334 break;
2335 case 8192:
2336 rctl |= E1000_RCTL_SZ_8192;
2337 break;
2338 case 16384:
2339 rctl |= E1000_RCTL_SZ_16384;
2340 break;
2341 }
2342
2343 /*
2344 * 82571 and greater support packet-split where the protocol
2345 * header is placed in skb->data and the packet data is
2346 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2347 * In the case of a non-split, skb->data is linearly filled,
2348 * followed by the page buffers. Therefore, skb->data is
2349 * sized to hold the largest protocol header.
2350 *
2351 * allocations using alloc_page take too long for regular MTU
2352 * so only enable packet split for jumbo frames
2353 *
2354 * Using pages when the page size is greater than 16k wastes
2355 * a lot of memory, since we allocate 3 pages at all times
2356 * per packet.
2357 */
bc7f75fa 2358 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA
2359 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2360 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2361 adapter->rx_ps_pages = pages;
97ac8cae
BA
2362 else
2363 adapter->rx_ps_pages = 0;
bc7f75fa
AK
2364
2365 if (adapter->rx_ps_pages) {
2366 /* Configure extra packet-split registers */
2367 rfctl = er32(RFCTL);
2368 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA
2369 /*
2370 * disable packet split support for IPv6 extension headers,
2371 * because some malformed IPv6 headers can hang the Rx
2372 */
bc7f75fa
AK
2373 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2374 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2375
2376 ew32(RFCTL, rfctl);
2377
140a7480
AK
2378 /* Enable Packet split descriptors */
2379 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK
2380
2381 psrctl |= adapter->rx_ps_bsize0 >>
2382 E1000_PSRCTL_BSIZE0_SHIFT;
2383
2384 switch (adapter->rx_ps_pages) {
2385 case 3:
2386 psrctl |= PAGE_SIZE <<
2387 E1000_PSRCTL_BSIZE3_SHIFT;
2388 case 2:
2389 psrctl |= PAGE_SIZE <<
2390 E1000_PSRCTL_BSIZE2_SHIFT;
2391 case 1:
2392 psrctl |= PAGE_SIZE >>
2393 E1000_PSRCTL_BSIZE1_SHIFT;
2394 break;
2395 }
2396
2397 ew32(PSRCTL, psrctl);
2398 }
2399
2400 ew32(RCTL, rctl);
318a94d6
JK
2401 /* just started the receive unit, no need to restart */
2402 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK
2403}
2404
2405/**
2406 * e1000_configure_rx - Configure Receive Unit after Reset
2407 * @adapter: board private structure
2408 *
2409 * Configure the Rx unit of the MAC after a reset.
2410 **/
2411static void e1000_configure_rx(struct e1000_adapter *adapter)
2412{
2413 struct e1000_hw *hw = &adapter->hw;
2414 struct e1000_ring *rx_ring = adapter->rx_ring;
2415 u64 rdba;
2416 u32 rdlen, rctl, rxcsum, ctrl_ext;
2417
2418 if (adapter->rx_ps_pages) {
2419 /* this is a 32 byte descriptor */
2420 rdlen = rx_ring->count *
2421 sizeof(union e1000_rx_desc_packet_split);
2422 adapter->clean_rx = e1000_clean_rx_irq_ps;
2423 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA
2424 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2425 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2426 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2427 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2428 } else {
97ac8cae 2429 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK
2430 adapter->clean_rx = e1000_clean_rx_irq;
2431 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2432 }
2433
2434 /* disable receives while setting up the descriptors */
2435 rctl = er32(RCTL);
2436 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2437 e1e_flush();
2438 msleep(10);
2439
2440 /* set the Receive Delay Timer Register */
2441 ew32(RDTR, adapter->rx_int_delay);
2442
2443 /* irq moderation */
2444 ew32(RADV, adapter->rx_abs_int_delay);
2445 if (adapter->itr_setting != 0)
ad68076e 2446 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK
2447
2448 ctrl_ext = er32(CTRL_EXT);
2449 /* Reset delay timers after every interrupt */
2450 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2451 /* Auto-Mask interrupts upon ICR access */
2452 ctrl_ext |= E1000_CTRL_EXT_IAME;
2453 ew32(IAM, 0xffffffff);
2454 ew32(CTRL_EXT, ctrl_ext);
2455 e1e_flush();
2456
ad68076e
BA
2457 /*
2458 * Setup the HW Rx Head and Tail Descriptor Pointers and
2459 * the Base and Length of the Rx Descriptor Ring
2460 */
bc7f75fa
AK
2461 rdba = rx_ring->dma;
2462 ew32(RDBAL, (rdba & DMA_32BIT_MASK));
2463 ew32(RDBAH, (rdba >> 32));
2464 ew32(RDLEN, rdlen);
2465 ew32(RDH, 0);
2466 ew32(RDT, 0);
2467 rx_ring->head = E1000_RDH;
2468 rx_ring->tail = E1000_RDT;
2469
2470 /* Enable Receive Checksum Offload for TCP and UDP */
2471 rxcsum = er32(RXCSUM);
2472 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2473 rxcsum |= E1000_RXCSUM_TUOFL;
2474
ad68076e
BA
2475 /*
2476 * IPv4 payload checksum for UDP fragments must be
2477 * used in conjunction with packet-split.
2478 */
bc7f75fa
AK
2479 if (adapter->rx_ps_pages)
2480 rxcsum |= E1000_RXCSUM_IPPCSE;
2481 } else {
2482 rxcsum &= ~E1000_RXCSUM_TUOFL;
2483 /* no need to clear IPPCSE as it defaults to 0 */
2484 }
2485 ew32(RXCSUM, rxcsum);
2486
ad68076e
BA
2487 /*
2488 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2489 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA
2490 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2491 */
bc7f75fa 2492 if ((adapter->flags & FLAG_HAS_ERT) &&
97ac8cae
BA
2493 (adapter->netdev->mtu > ETH_DATA_LEN)) {
2494 u32 rxdctl = er32(RXDCTL(0));
2495 ew32(RXDCTL(0), rxdctl | 0x3);
2496 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2497 /*
2498 * With jumbo frames and early-receive enabled, excessive
2499 * C4->C2 latencies result in dropped transactions.
2500 */
2501 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2502 e1000e_driver_name, 55);
2503 } else {
2504 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2505 e1000e_driver_name,
2506 PM_QOS_DEFAULT_VALUE);
2507 }
bc7f75fa
AK
2508
2509 /* Enable Receives */
2510 ew32(RCTL, rctl);
2511}
2512
2513/**
e2de3eb6 2514 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK
2515 * @hw: pointer to the HW structure
2516 * @mc_addr_list: array of multicast addresses to program
2517 * @mc_addr_count: number of multicast addresses to program
2518 * @rar_used_count: the first RAR register free to program
2519 * @rar_count: total number of supported Receive Address Registers
2520 *
2521 * Updates the Receive Address Registers and Multicast Table Array.
2522 * The caller must have a packed mc_addr_list of multicast addresses.
2523 * The parameter rar_count will usually be hw->mac.rar_entry_count
2524 * unless there are workarounds that change this. Currently no func pointer
2525 * exists and all implementations are handled in the generic version of this
2526 * function.
2527 **/
e2de3eb6
JK
2528static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2529 u32 mc_addr_count, u32 rar_used_count,
2530 u32 rar_count)
bc7f75fa 2531{
e2de3eb6 2532 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
bc7f75fa
AK
2533 rar_used_count, rar_count);
2534}
2535
2536/**
2537 * e1000_set_multi - Multicast and Promiscuous mode set
2538 * @netdev: network interface device structure
2539 *
2540 * The set_multi entry point is called whenever the multicast address
2541 * list or the network interface flags are updated. This routine is
2542 * responsible for configuring the hardware for proper multicast,
2543 * promiscuous mode, and all-multi behavior.
2544 **/
2545static void e1000_set_multi(struct net_device *netdev)
2546{
2547 struct e1000_adapter *adapter = netdev_priv(netdev);
2548 struct e1000_hw *hw = &adapter->hw;
2549 struct e1000_mac_info *mac = &hw->mac;
2550 struct dev_mc_list *mc_ptr;
2551 u8 *mta_list;
2552 u32 rctl;
2553 int i;
2554
2555 /* Check for Promiscuous and All Multicast modes */
2556
2557 rctl = er32(RCTL);
2558
2559 if (netdev->flags & IFF_PROMISC) {
2560 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2561 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2562 } else {
746b9f02
PM
2563 if (netdev->flags & IFF_ALLMULTI) {
2564 rctl |= E1000_RCTL_MPE;
2565 rctl &= ~E1000_RCTL_UPE;
2566 } else {
2567 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2568 }
78ed11a5 2569 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2570 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK
2571 }
2572
2573 ew32(RCTL, rctl);
2574
2575 if (netdev->mc_count) {
2576 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2577 if (!mta_list)
2578 return;
2579
2580 /* prepare a packed array of only addresses. */
2581 mc_ptr = netdev->mc_list;
2582
2583 for (i = 0; i < netdev->mc_count; i++) {
2584 if (!mc_ptr)
2585 break;
2586 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2587 ETH_ALEN);
2588 mc_ptr = mc_ptr->next;
2589 }
2590
e2de3eb6 2591 e1000_update_mc_addr_list(hw, mta_list, i, 1,
bc7f75fa
AK
2592 mac->rar_entry_count);
2593 kfree(mta_list);
2594 } else {
2595 /*
2596 * if we're called from probe, we might not have
2597 * anything to do here, so clear out the list
2598 */
e2de3eb6 2599 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
bc7f75fa
AK
2600 }
2601}
2602
2603/**
ad68076e 2604 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK
2605 * @adapter: private board structure
2606 **/
2607static void e1000_configure(struct e1000_adapter *adapter)
2608{
2609 e1000_set_multi(adapter->netdev);
2610
2611 e1000_restore_vlan(adapter);
2612 e1000_init_manageability(adapter);
2613
2614 e1000_configure_tx(adapter);
2615 e1000_setup_rctl(adapter);
2616 e1000_configure_rx(adapter);
ad68076e 2617 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK
2618}
2619
2620/**
2621 * e1000e_power_up_phy - restore link in case the phy was powered down
2622 * @adapter: address of board private structure
2623 *
2624 * The phy may be powered down to save power and turn off link when the
2625 * driver is unloaded and wake on lan is not enabled (among others)
2626 * *** this routine MUST be followed by a call to e1000e_reset ***
2627 **/
2628void e1000e_power_up_phy(struct e1000_adapter *adapter)
2629{
2630 u16 mii_reg = 0;
2631
2632 /* Just clear the power down bit to wake the phy back up */
318a94d6 2633 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
ad68076e
BA
2634 /*
2635 * According to the manual, the phy will retain its
2636 * settings across a power-down/up cycle
2637 */
bc7f75fa
AK
2638 e1e_rphy(&adapter->hw, PHY_CONTROL, &mii_reg);
2639 mii_reg &= ~MII_CR_POWER_DOWN;
2640 e1e_wphy(&adapter->hw, PHY_CONTROL, mii_reg);
2641 }
2642
2643 adapter->hw.mac.ops.setup_link(&adapter->hw);
2644}
2645
2646/**
2647 * e1000_power_down_phy - Power down the PHY
2648 *
2649 * Power down the PHY so no link is implied when interface is down
2650 * The PHY cannot be powered down is management or WoL is active
2651 */
2652static void e1000_power_down_phy(struct e1000_adapter *adapter)
2653{
2654 struct e1000_hw *hw = &adapter->hw;
2655 u16 mii_reg;
2656
2657 /* WoL is enabled */
23b66e2b 2658 if (adapter->wol)
bc7f75fa
AK
2659 return;
2660
2661 /* non-copper PHY? */
318a94d6 2662 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK
2663 return;
2664
2665 /* reset is blocked because of a SoL/IDER session */
ad68076e 2666 if (e1000e_check_mng_mode(hw) || e1000_check_reset_block(hw))
bc7f75fa
AK
2667 return;
2668
489815ce 2669 /* manageability (AMT) is enabled */
bc7f75fa
AK
2670 if (er32(MANC) & E1000_MANC_SMBUS_EN)
2671 return;
2672
2673 /* power down the PHY */
2674 e1e_rphy(hw, PHY_CONTROL, &mii_reg);
2675 mii_reg |= MII_CR_POWER_DOWN;
2676 e1e_wphy(hw, PHY_CONTROL, mii_reg);
2677 mdelay(1);
2678}
2679
2680/**
2681 * e1000e_reset - bring the hardware into a known good state
2682 *
2683 * This function boots the hardware and enables some settings that
2684 * require a configuration cycle of the hardware - those cannot be
2685 * set/changed during runtime. After reset the device needs to be
ad68076e 2686 * properly configured for Rx, Tx etc.
bc7f75fa
AK
2687 */
2688void e1000e_reset(struct e1000_adapter *adapter)
2689{
2690 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2691 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK
2692 struct e1000_hw *hw = &adapter->hw;
2693 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2694 u32 pba = adapter->pba;
bc7f75fa
AK
2695 u16 hwm;
2696
ad68076e 2697 /* reset Packet Buffer Allocation to default */
318a94d6 2698 ew32(PBA, pba);
df762464 2699
318a94d6 2700 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA
2701 /*
2702 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK
2703 * large enough to accommodate two full transmit packets,
2704 * rounded up to the next 1KB and expressed in KB. Likewise,
2705 * the Rx FIFO should be large enough to accommodate at least
2706 * one full receive packet and is similarly rounded up and
ad68076e
BA
2707 * expressed in KB.
2708 */
df762464 2709 pba = er32(PBA);
bc7f75fa 2710 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2711 tx_space = pba >> 16;
bc7f75fa 2712 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2713 pba &= 0xffff;
ad68076e
BA
2714 /*
2715 * the Tx fifo also stores 16 bytes of information about the tx
2716 * but don't include ethernet FCS because hardware appends it
318a94d6
JK
2717 */
2718 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK
2719 sizeof(struct e1000_tx_desc) -
2720 ETH_FCS_LEN) * 2;
2721 min_tx_space = ALIGN(min_tx_space, 1024);
2722 min_tx_space >>= 10;
2723 /* software strips receive CRC, so leave room for it */
318a94d6 2724 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK
2725 min_rx_space = ALIGN(min_rx_space, 1024);
2726 min_rx_space >>= 10;
2727
ad68076e
BA
2728 /*
2729 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2730 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA
2731 * allocation, take space away from current Rx allocation
2732 */
df762464
AK
2733 if ((tx_space < min_tx_space) &&
2734 ((min_tx_space - tx_space) < pba)) {
2735 pba -= min_tx_space - tx_space;
bc7f75fa 2736
ad68076e
BA
2737 /*
2738 * if short on Rx space, Rx wins and must trump tx
2739 * adjustment or use Early Receive if available
2740 */
df762464 2741 if ((pba < min_rx_space) &&
bc7f75fa
AK
2742 (!(adapter->flags & FLAG_HAS_ERT)))
2743 /* ERT enabled in e1000_configure_rx */
df762464 2744 pba = min_rx_space;
bc7f75fa 2745 }
df762464
AK
2746
2747 ew32(PBA, pba);
bc7f75fa
AK
2748 }
2749
bc7f75fa 2750
ad68076e
BA
2751 /*
2752 * flow control settings
2753 *
2754 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK
2755 * (or the size used for early receive) above it in the Rx FIFO.
2756 * Set it to the lower of:
2757 * - 90% of the Rx FIFO size, and
2758 * - the full Rx FIFO size minus the early receive size (for parts
2759 * with ERT support assuming ERT set to E1000_ERT_2048), or
ad68076e
BA
2760 * - the full Rx FIFO size minus one full frame
2761 */
bc7f75fa 2762 if (adapter->flags & FLAG_HAS_ERT)
318a94d6
JK
2763 hwm = min(((pba << 10) * 9 / 10),
2764 ((pba << 10) - (E1000_ERT_2048 << 3)));
bc7f75fa 2765 else
318a94d6
JK
2766 hwm = min(((pba << 10) * 9 / 10),
2767 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2768
318a94d6
JK
2769 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
2770 fc->low_water = fc->high_water - 8;
bc7f75fa
AK
2771
2772 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2773 fc->pause_time = 0xFFFF;
bc7f75fa 2774 else
318a94d6
JK
2775 fc->pause_time = E1000_FC_PAUSE_TIME;
2776 fc->send_xon = 1;
5c48ef3e 2777 fc->current_mode = fc->requested_mode;
bc7f75fa
AK
2778
2779 /* Allow time for pending master requests to run */
2780 mac->ops.reset_hw(hw);
97ac8cae
BA
2781
2782 /*
2783 * For parts with AMT enabled, let the firmware know
2784 * that the network interface is in control
2785 */
c43bc57e 2786 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA
2787 e1000_get_hw_control(adapter);
2788
bc7f75fa
AK
2789 ew32(WUC, 0);
2790
2791 if (mac->ops.init_hw(hw))
44defeb3 2792 e_err("Hardware Error\n");
bc7f75fa
AK
2793
2794 e1000_update_mng_vlan(adapter);
2795
2796 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2797 ew32(VET, ETH_P_8021Q);
2798
2799 e1000e_reset_adaptive(hw);
2800 e1000_get_phy_info(hw);
2801
2802 if (!(adapter->flags & FLAG_SMART_POWER_DOWN)) {
2803 u16 phy_data = 0;
ad68076e
BA
2804 /*
2805 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2806 * the return value of this function because there is nothing
ad68076e
BA
2807 * different we would do if it failed
2808 */
bc7f75fa
AK
2809 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2810 phy_data &= ~IGP02E1000_PM_SPD;
2811 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2812 }
bc7f75fa
AK
2813}
2814
2815int e1000e_up(struct e1000_adapter *adapter)
2816{
2817 struct e1000_hw *hw = &adapter->hw;
2818
2819 /* hardware has been reset, we need to reload some things */
2820 e1000_configure(adapter);
2821
2822 clear_bit(__E1000_DOWN, &adapter->state);
2823
2824 napi_enable(&adapter->napi);
4662e82b
BA
2825 if (adapter->msix_entries)
2826 e1000_configure_msix(adapter);
bc7f75fa
AK
2827 e1000_irq_enable(adapter);
2828
2829 /* fire a link change interrupt to start the watchdog */
2830 ew32(ICS, E1000_ICS_LSC);
2831 return 0;
2832}
2833
2834void e1000e_down(struct e1000_adapter *adapter)
2835{
2836 struct net_device *netdev = adapter->netdev;
2837 struct e1000_hw *hw = &adapter->hw;
2838 u32 tctl, rctl;
2839
ad68076e
BA
2840 /*
2841 * signal that we're down so the interrupt handler does not
2842 * reschedule our watchdog timer
2843 */
bc7f75fa
AK
2844 set_bit(__E1000_DOWN, &adapter->state);
2845
2846 /* disable receives in the hardware */
2847 rctl = er32(RCTL);
2848 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2849 /* flush and sleep below */
2850
d55b53ff 2851 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK
2852
2853 /* disable transmits in the hardware */
2854 tctl = er32(TCTL);
2855 tctl &= ~E1000_TCTL_EN;
2856 ew32(TCTL, tctl);
2857 /* flush both disables and wait for them to finish */
2858 e1e_flush();
2859 msleep(10);
2860
2861 napi_disable(&adapter->napi);
2862 e1000_irq_disable(adapter);
2863
2864 del_timer_sync(&adapter->watchdog_timer);
2865 del_timer_sync(&adapter->phy_info_timer);
2866
2867 netdev->tx_queue_len = adapter->tx_queue_len;
2868 netif_carrier_off(netdev);
2869 adapter->link_speed = 0;
2870 adapter->link_duplex = 0;
2871
52cc3086
JK
2872 if (!pci_channel_offline(adapter->pdev))
2873 e1000e_reset(adapter);
bc7f75fa
AK
2874 e1000_clean_tx_ring(adapter);
2875 e1000_clean_rx_ring(adapter);
2876
2877 /*
2878 * TODO: for power management, we could drop the link and
2879 * pci_disable_device here.
2880 */
2881}
2882
2883void e1000e_reinit_locked(struct e1000_adapter *adapter)
2884{
2885 might_sleep();
2886 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2887 msleep(1);
2888 e1000e_down(adapter);
2889 e1000e_up(adapter);
2890 clear_bit(__E1000_RESETTING, &adapter->state);
2891}
2892
2893/**
2894 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2895 * @adapter: board private structure to initialize
2896 *
2897 * e1000_sw_init initializes the Adapter private data structure.
2898 * Fields are initialized based on PCI device information and
2899 * OS network device settings (MTU size).
2900 **/
2901static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2902{
bc7f75fa
AK
2903 struct net_device *netdev = adapter->netdev;
2904
2905 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2906 adapter->rx_ps_bsize0 = 128;
318a94d6
JK
2907 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2908 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2909
4662e82b 2910 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2911
4662e82b
BA
2912 if (e1000_alloc_queues(adapter))
2913 return -ENOMEM;
bc7f75fa 2914
bc7f75fa 2915 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK
2916 e1000_irq_disable(adapter);
2917
bc7f75fa
AK
2918 set_bit(__E1000_DOWN, &adapter->state);
2919 return 0;
bc7f75fa
AK
2920}
2921
f8d59f78
BA
2922/**
2923 * e1000_intr_msi_test - Interrupt Handler
2924 * @irq: interrupt number
2925 * @data: pointer to a network interface device structure
2926 **/
2927static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2928{
2929 struct net_device *netdev = data;
2930 struct e1000_adapter *adapter = netdev_priv(netdev);
2931 struct e1000_hw *hw = &adapter->hw;
2932 u32 icr = er32(ICR);
2933
2934 e_dbg("%s: icr is %08X\n", netdev->name, icr);
2935 if (icr & E1000_ICR_RXSEQ) {
2936 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2937 wmb();
2938 }
2939
2940 return IRQ_HANDLED;
2941}
2942
2943/**
2944 * e1000_test_msi_interrupt - Returns 0 for successful test
2945 * @adapter: board private struct
2946 *
2947 * code flow taken from tg3.c
2948 **/
2949static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2950{
2951 struct net_device *netdev = adapter->netdev;
2952 struct e1000_hw *hw = &adapter->hw;
2953 int err;
2954
2955 /* poll_enable hasn't been called yet, so don't need disable */
2956 /* clear any pending events */
2957 er32(ICR);
2958
2959 /* free the real vector and request a test handler */
2960 e1000_free_irq(adapter);
4662e82b 2961 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA
2962
2963 /* Assume that the test fails, if it succeeds then the test
2964 * MSI irq handler will unset this flag */
2965 adapter->flags |= FLAG_MSI_TEST_FAILED;
2966
2967 err = pci_enable_msi(adapter->pdev);
2968 if (err)
2969 goto msi_test_failed;
2970
2971 err = request_irq(adapter->pdev->irq, &e1000_intr_msi_test, 0,
2972 netdev->name, netdev);
2973 if (err) {
2974 pci_disable_msi(adapter->pdev);
2975 goto msi_test_failed;
2976 }
2977
2978 wmb();
2979
2980 e1000_irq_enable(adapter);
2981
2982 /* fire an unusual interrupt on the test handler */
2983 ew32(ICS, E1000_ICS_RXSEQ);
2984 e1e_flush();
2985 msleep(50);
2986
2987 e1000_irq_disable(adapter);
2988
2989 rmb();
2990
2991 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 2992 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA
2993 err = -EIO;
2994 e_info("MSI interrupt test failed!\n");
2995 }
2996
2997 free_irq(adapter->pdev->irq, netdev);
2998 pci_disable_msi(adapter->pdev);
2999
3000 if (err == -EIO)
3001 goto msi_test_failed;
3002
3003 /* okay so the test worked, restore settings */
3004 e_dbg("%s: MSI interrupt test succeeded!\n", netdev->name);
3005msi_test_failed:
4662e82b 3006 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA
3007 e1000_request_irq(adapter);
3008 return err;
3009}
3010
3011/**
3012 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3013 * @adapter: board private struct
3014 *
3015 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3016 **/
3017static int e1000_test_msi(struct e1000_adapter *adapter)
3018{
3019 int err;
3020 u16 pci_cmd;
3021
3022 if (!(adapter->flags & FLAG_MSI_ENABLED))
3023 return 0;
3024
3025 /* disable SERR in case the MSI write causes a master abort */
3026 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3027 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3028 pci_cmd & ~PCI_COMMAND_SERR);
3029
3030 err = e1000_test_msi_interrupt(adapter);
3031
3032 /* restore previous setting of command word */
3033 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3034
3035 /* success ! */
3036 if (!err)
3037 return 0;
3038
3039 /* EIO means MSI test failed */
3040 if (err != -EIO)
3041 return err;
3042
3043 /* back to INTx mode */
3044 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3045
3046 e1000_free_irq(adapter);
3047
3048 err = e1000_request_irq(adapter);
3049
3050 return err;
3051}
3052
bc7f75fa
AK
3053/**
3054 * e1000_open - Called when a network interface is made active
3055 * @netdev: network interface device structure
3056 *
3057 * Returns 0 on success, negative value on failure
3058 *
3059 * The open entry point is called when a network interface is made
3060 * active by the system (IFF_UP). At this point all resources needed
3061 * for transmit and receive operations are allocated, the interrupt
3062 * handler is registered with the OS, the watchdog timer is started,
3063 * and the stack is notified that the interface is ready.
3064 **/
3065static int e1000_open(struct net_device *netdev)
3066{
3067 struct e1000_adapter *adapter = netdev_priv(netdev);
3068 struct e1000_hw *hw = &adapter->hw;
3069 int err;
3070
3071 /* disallow open during test */
3072 if (test_bit(__E1000_TESTING, &adapter->state))
3073 return -EBUSY;
3074
3075 /* allocate transmit descriptors */
3076 err = e1000e_setup_tx_resources(adapter);
3077 if (err)
3078 goto err_setup_tx;
3079
3080 /* allocate receive descriptors */
3081 err = e1000e_setup_rx_resources(adapter);
3082 if (err)
3083 goto err_setup_rx;
3084
3085 e1000e_power_up_phy(adapter);
3086
3087 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3088 if ((adapter->hw.mng_cookie.status &
3089 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3090 e1000_update_mng_vlan(adapter);
3091
ad68076e
BA
3092 /*
3093 * If AMT is enabled, let the firmware know that the network
3094 * interface is now open
3095 */
c43bc57e 3096 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK
3097 e1000_get_hw_control(adapter);
3098
ad68076e
BA
3099 /*
3100 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK
3101 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3102 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA
3103 * clean_rx handler before we do so.
3104 */
bc7f75fa
AK
3105 e1000_configure(adapter);
3106
3107 err = e1000_request_irq(adapter);
3108 if (err)
3109 goto err_req_irq;
3110
f8d59f78
BA
3111 /*
3112 * Work around PCIe errata with MSI interrupts causing some chipsets to
3113 * ignore e1000e MSI messages, which means we need to test our MSI
3114 * interrupt now
3115 */
4662e82b 3116 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA
3117 err = e1000_test_msi(adapter);
3118 if (err) {
3119 e_err("Interrupt allocation failed\n");
3120 goto err_req_irq;
3121 }
3122 }
3123
bc7f75fa
AK
3124 /* From here on the code is the same as e1000e_up() */
3125 clear_bit(__E1000_DOWN, &adapter->state);
3126
3127 napi_enable(&adapter->napi);
3128
3129 e1000_irq_enable(adapter);
3130
d55b53ff
JK
3131 netif_tx_start_all_queues(netdev);
3132
bc7f75fa
AK
3133 /* fire a link status change interrupt to start the watchdog */
3134 ew32(ICS, E1000_ICS_LSC);
3135
3136 return 0;
3137
3138err_req_irq:
3139 e1000_release_hw_control(adapter);
3140 e1000_power_down_phy(adapter);
3141 e1000e_free_rx_resources(adapter);
3142err_setup_rx:
3143 e1000e_free_tx_resources(adapter);
3144err_setup_tx:
3145 e1000e_reset(adapter);
3146
3147 return err;
3148}
3149
3150/**
3151 * e1000_close - Disables a network interface
3152 * @netdev: network interface device structure
3153 *
3154 * Returns 0, this is not allowed to fail
3155 *
3156 * The close entry point is called when an interface is de-activated
3157 * by the OS. The hardware is still under the drivers control, but
3158 * needs to be disabled. A global MAC reset is issued to stop the
3159 * hardware, and all transmit and receive resources are freed.
3160 **/
3161static int e1000_close(struct net_device *netdev)
3162{
3163 struct e1000_adapter *adapter = netdev_priv(netdev);
3164
3165 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3166 e1000e_down(adapter);
3167 e1000_power_down_phy(adapter);
3168 e1000_free_irq(adapter);
3169
3170 e1000e_free_tx_resources(adapter);
3171 e1000e_free_rx_resources(adapter);
3172
ad68076e
BA
3173 /*
3174 * kill manageability vlan ID if supported, but not if a vlan with
3175 * the same ID is registered on the host OS (let 8021q kill it)
3176 */
bc7f75fa
AK
3177 if ((adapter->hw.mng_cookie.status &
3178 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3179 !(adapter->vlgrp &&
3180 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3181 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3182
ad68076e
BA
3183 /*
3184 * If AMT is enabled, let the firmware know that the network
3185 * interface is now closed
3186 */
c43bc57e 3187 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK
3188 e1000_release_hw_control(adapter);
3189
3190 return 0;
3191}
3192/**
3193 * e1000_set_mac - Change the Ethernet Address of the NIC
3194 * @netdev: network interface device structure
3195 * @p: pointer to an address structure
3196 *
3197 * Returns 0 on success, negative on failure
3198 **/
3199static int e1000_set_mac(struct net_device *netdev, void *p)
3200{
3201 struct e1000_adapter *adapter = netdev_priv(netdev);
3202 struct sockaddr *addr = p;
3203
3204 if (!is_valid_ether_addr(addr->sa_data))
3205 return -EADDRNOTAVAIL;
3206
3207 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3208 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3209
3210 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3211
3212 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3213 /* activate the work around */
3214 e1000e_set_laa_state_82571(&adapter->hw, 1);
3215
ad68076e
BA
3216 /*
3217 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK
3218 * between the time RAR[0] gets clobbered and the time it
3219 * gets fixed (in e1000_watchdog), the actual LAA is in one
3220 * of the RARs and no incoming packets directed to this port
3221 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA
3222 * RAR[14]
3223 */
bc7f75fa
AK
3224 e1000e_rar_set(&adapter->hw,
3225 adapter->hw.mac.addr,
3226 adapter->hw.mac.rar_entry_count - 1);
3227 }
3228
3229 return 0;
3230}
3231
a8f88ff5
JB
3232/**
3233 * e1000e_update_phy_task - work thread to update phy
3234 * @work: pointer to our work struct
3235 *
3236 * this worker thread exists because we must acquire a
3237 * semaphore to read the phy, which we could msleep while
3238 * waiting for it, and we can't msleep in a timer.
3239 **/
3240static void e1000e_update_phy_task(struct work_struct *work)
3241{
3242 struct e1000_adapter *adapter = container_of(work,
3243 struct e1000_adapter, update_phy_task);
3244 e1000_get_phy_info(&adapter->hw);
3245}
3246
ad68076e
BA
3247/*
3248 * Need to wait a few seconds after link up to get diagnostic information from
3249 * the phy
3250 */
bc7f75fa
AK
3251static void e1000_update_phy_info(unsigned long data)
3252{
3253 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3254 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK
3255}
3256
3257/**
3258 * e1000e_update_stats - Update the board statistics counters
3259 * @adapter: board private structure
3260 **/
3261void e1000e_update_stats(struct e1000_adapter *adapter)
3262{
3263 struct e1000_hw *hw = &adapter->hw;
3264 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK
3265
3266 /*
3267 * Prevent stats update while adapter is being reset, or if the pci
3268 * connection is down.
3269 */
3270 if (adapter->link_speed == 0)
3271 return;
3272 if (pci_channel_offline(pdev))
3273 return;
3274
bc7f75fa
AK
3275 adapter->stats.crcerrs += er32(CRCERRS);
3276 adapter->stats.gprc += er32(GPRC);
7c25769f
BA
3277 adapter->stats.gorc += er32(GORCL);
3278 er32(GORCH); /* Clear gorc */
bc7f75fa
AK
3279 adapter->stats.bprc += er32(BPRC);
3280 adapter->stats.mprc += er32(MPRC);
3281 adapter->stats.roc += er32(ROC);
3282
bc7f75fa
AK
3283 adapter->stats.mpc += er32(MPC);
3284 adapter->stats.scc += er32(SCC);
3285 adapter->stats.ecol += er32(ECOL);
3286 adapter->stats.mcc += er32(MCC);
3287 adapter->stats.latecol += er32(LATECOL);
3288 adapter->stats.dc += er32(DC);
bc7f75fa
AK
3289 adapter->stats.xonrxc += er32(XONRXC);
3290 adapter->stats.xontxc += er32(XONTXC);
3291 adapter->stats.xoffrxc += er32(XOFFRXC);
3292 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3293 adapter->stats.gptc += er32(GPTC);
7c25769f
BA
3294 adapter->stats.gotc += er32(GOTCL);
3295 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK
3296 adapter->stats.rnbc += er32(RNBC);
3297 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK
3298
3299 adapter->stats.mptc += er32(MPTC);
3300 adapter->stats.bptc += er32(BPTC);
3301
3302 /* used for adaptive IFS */
3303
3304 hw->mac.tx_packet_delta = er32(TPT);
3305 adapter->stats.tpt += hw->mac.tx_packet_delta;
3306 hw->mac.collision_delta = er32(COLC);
3307 adapter->stats.colc += hw->mac.collision_delta;
3308
3309 adapter->stats.algnerrc += er32(ALGNERRC);
3310 adapter->stats.rxerrc += er32(RXERRC);
8c81c9c3 3311 if ((hw->mac.type != e1000_82574) && (hw->mac.type != e1000_82583))
4662e82b 3312 adapter->stats.tncrs += er32(TNCRS);
bc7f75fa
AK
3313 adapter->stats.cexterr += er32(CEXTERR);
3314 adapter->stats.tsctc += er32(TSCTC);
3315 adapter->stats.tsctfc += er32(TSCTFC);
3316
bc7f75fa 3317 /* Fill out the OS statistics structure */
bc7f75fa
AK
3318 adapter->net_stats.multicast = adapter->stats.mprc;
3319 adapter->net_stats.collisions = adapter->stats.colc;
3320
3321 /* Rx Errors */
3322
ad68076e
BA
3323 /*
3324 * RLEC on some newer hardware can be incorrect so build
3325 * our own version based on RUC and ROC
3326 */
bc7f75fa
AK
3327 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3328 adapter->stats.crcerrs + adapter->stats.algnerrc +
3329 adapter->stats.ruc + adapter->stats.roc +
3330 adapter->stats.cexterr;
3331 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3332 adapter->stats.roc;
3333 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3334 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3335 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3336
3337 /* Tx Errors */
3338 adapter->net_stats.tx_errors = adapter->stats.ecol +
3339 adapter->stats.latecol;
3340 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3341 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3342 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3343
3344 /* Tx Dropped needs to be maintained elsewhere */
3345
bc7f75fa
AK
3346 /* Management Stats */
3347 adapter->stats.mgptc += er32(MGTPTC);
3348 adapter->stats.mgprc += er32(MGTPRC);
3349 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK
3350}
3351
7c25769f
BA
3352/**
3353 * e1000_phy_read_status - Update the PHY register status snapshot
3354 * @adapter: board private structure
3355 **/
3356static void e1000_phy_read_status(struct e1000_adapter *adapter)
3357{
3358 struct e1000_hw *hw = &adapter->hw;
3359 struct e1000_phy_regs *phy = &adapter->phy_regs;
3360 int ret_val;
7c25769f
BA
3361
3362 if ((er32(STATUS) & E1000_STATUS_LU) &&
3363 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3364 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3365 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3366 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3367 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3368 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3369 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3370 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3371 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3372 if (ret_val)
44defeb3 3373 e_warn("Error reading PHY register\n");
7c25769f
BA
3374 } else {
3375 /*
3376 * Do not read PHY registers if link is not up
3377 * Set values to typical power-on defaults
3378 */
3379 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3380 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3381 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3382 BMSR_ERCAP);
3383 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3384 ADVERTISE_ALL | ADVERTISE_CSMA);
3385 phy->lpa = 0;
3386 phy->expansion = EXPANSION_ENABLENPAGE;
3387 phy->ctrl1000 = ADVERTISE_1000FULL;
3388 phy->stat1000 = 0;
3389 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3390 }
7c25769f
BA
3391}
3392
bc7f75fa
AK
3393static void e1000_print_link_info(struct e1000_adapter *adapter)
3394{
bc7f75fa
AK
3395 struct e1000_hw *hw = &adapter->hw;
3396 u32 ctrl = er32(CTRL);
3397
8f12fe86
BA
3398 /* Link status message must follow this format for user tools */
3399 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3400 "Flow Control: %s\n",
3401 adapter->netdev->name,
44defeb3
JK
3402 adapter->link_speed,
3403 (adapter->link_duplex == FULL_DUPLEX) ?
3404 "Full Duplex" : "Half Duplex",
3405 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3406 "RX/TX" :
3407 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3408 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK
3409}
3410
a20e4cf9 3411bool e1000_has_link(struct e1000_adapter *adapter)
318a94d6
JK
3412{
3413 struct e1000_hw *hw = &adapter->hw;
3414 bool link_active = 0;
3415 s32 ret_val = 0;
3416
3417 /*
3418 * get_link_status is set on LSC (link status) interrupt or
3419 * Rx sequence error interrupt. get_link_status will stay
3420 * false until the check_for_link establishes link
3421 * for copper adapters ONLY
3422 */
3423 switch (hw->phy.media_type) {
3424 case e1000_media_type_copper:
3425 if (hw->mac.get_link_status) {
3426 ret_val = hw->mac.ops.check_for_link(hw);
3427 link_active = !hw->mac.get_link_status;
3428 } else {
3429 link_active = 1;
3430 }
3431 break;
3432 case e1000_media_type_fiber:
3433 ret_val = hw->mac.ops.check_for_link(hw);
3434 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3435 break;
3436 case e1000_media_type_internal_serdes:
3437 ret_val = hw->mac.ops.check_for_link(hw);
3438 link_active = adapter->hw.mac.serdes_has_link;
3439 break;
3440 default:
3441 case e1000_media_type_unknown:
3442 break;
3443 }
3444
3445 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3446 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3447 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3448 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK
3449 }
3450
3451 return link_active;
3452}
3453
3454static void e1000e_enable_receives(struct e1000_adapter *adapter)
3455{
3456 /* make sure the receive unit is started */
3457 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3458 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3459 struct e1000_hw *hw = &adapter->hw;
3460 u32 rctl = er32(RCTL);
3461 ew32(RCTL, rctl | E1000_RCTL_EN);
3462 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3463 }
3464}
3465
bc7f75fa
AK
3466/**
3467 * e1000_watchdog - Timer Call-back
3468 * @data: pointer to adapter cast into an unsigned long
3469 **/
3470static void e1000_watchdog(unsigned long data)
3471{
3472 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3473
3474 /* Do the rest outside of interrupt context */
3475 schedule_work(&adapter->watchdog_task);
3476
3477 /* TODO: make this use queue_delayed_work() */
3478}
3479
3480static void e1000_watchdog_task(struct work_struct *work)
3481{
3482 struct e1000_adapter *adapter = container_of(work,
3483 struct e1000_adapter, watchdog_task);
bc7f75fa
AK
3484 struct net_device *netdev = adapter->netdev;
3485 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3486 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK
3487 struct e1000_ring *tx_ring = adapter->tx_ring;
3488 struct e1000_hw *hw = &adapter->hw;
3489 u32 link, tctl;
bc7f75fa
AK
3490 int tx_pending = 0;
3491
318a94d6
JK
3492 link = e1000_has_link(adapter);
3493 if ((netif_carrier_ok(netdev)) && link) {
3494 e1000e_enable_receives(adapter);
bc7f75fa 3495 goto link_up;
bc7f75fa
AK
3496 }
3497
3498 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3499 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3500 e1000_update_mng_vlan(adapter);
3501
bc7f75fa
AK
3502 if (link) {
3503 if (!netif_carrier_ok(netdev)) {
3504 bool txb2b = 1;
318a94d6 3505 /* update snapshot of PHY registers on LSC */
7c25769f 3506 e1000_phy_read_status(adapter);
bc7f75fa
AK
3507 mac->ops.get_link_up_info(&adapter->hw,
3508 &adapter->link_speed,
3509 &adapter->link_duplex);
3510 e1000_print_link_info(adapter);
f4187b56
BA
3511 /*
3512 * On supported PHYs, check for duplex mismatch only
3513 * if link has autonegotiated at 10/100 half
3514 */
3515 if ((hw->phy.type == e1000_phy_igp_3 ||
3516 hw->phy.type == e1000_phy_bm) &&
3517 (hw->mac.autoneg == true) &&
3518 (adapter->link_speed == SPEED_10 ||
3519 adapter->link_speed == SPEED_100) &&
3520 (adapter->link_duplex == HALF_DUPLEX)) {
3521 u16 autoneg_exp;
3522
3523 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3524
3525 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3526 e_info("Autonegotiated half duplex but"
3527 " link partner cannot autoneg. "
3528 " Try forcing full duplex if "
3529 "link gets many collisions.\n");
3530 }
3531
ad68076e
BA
3532 /*
3533 * tweak tx_queue_len according to speed/duplex
3534 * and adjust the timeout factor
3535 */
bc7f75fa
AK
3536 netdev->tx_queue_len = adapter->tx_queue_len;
3537 adapter->tx_timeout_factor = 1;
3538 switch (adapter->link_speed) {
3539 case SPEED_10:
3540 txb2b = 0;
3541 netdev->tx_queue_len = 10;
10f1b492 3542 adapter->tx_timeout_factor = 16;
bc7f75fa
AK
3543 break;
3544 case SPEED_100:
3545 txb2b = 0;
3546 netdev->tx_queue_len = 100;
3547 /* maybe add some timeout factor ? */
3548 break;
3549 }
3550
ad68076e
BA
3551 /*
3552 * workaround: re-program speed mode bit after
3553 * link-up event
3554 */
bc7f75fa
AK
3555 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3556 !txb2b) {
3557 u32 tarc0;
e9ec2c0f 3558 tarc0 = er32(TARC(0));
bc7f75fa 3559 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3560 ew32(TARC(0), tarc0);
bc7f75fa
AK
3561 }
3562
ad68076e
BA
3563 /*
3564 * disable TSO for pcie and 10/100 speeds, to avoid
3565 * some hardware issues
3566 */
bc7f75fa
AK
3567 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3568 switch (adapter->link_speed) {
3569 case SPEED_10:
3570 case SPEED_100:
44defeb3 3571 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK
3572 netdev->features &= ~NETIF_F_TSO;
3573 netdev->features &= ~NETIF_F_TSO6;
3574 break;
3575 case SPEED_1000:
3576 netdev->features |= NETIF_F_TSO;
3577 netdev->features |= NETIF_F_TSO6;
3578 break;
3579 default:
3580 /* oops */
3581 break;
3582 }
3583 }
3584
ad68076e
BA
3585 /*
3586 * enable transmits in the hardware, need to do this
3587 * after setting TARC(0)
3588 */
bc7f75fa
AK
3589 tctl = er32(TCTL);
3590 tctl |= E1000_TCTL_EN;
3591 ew32(TCTL, tctl);
3592
75eb0fad
BA
3593 /*
3594 * Perform any post-link-up configuration before
3595 * reporting link up.
3596 */
3597 if (phy->ops.cfg_on_link_up)
3598 phy->ops.cfg_on_link_up(hw);
3599
bc7f75fa 3600 netif_carrier_on(netdev);
d55b53ff 3601 netif_tx_wake_all_queues(netdev);
bc7f75fa
AK
3602
3603 if (!test_bit(__E1000_DOWN, &adapter->state))
3604 mod_timer(&adapter->phy_info_timer,
3605 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK
3606 }
3607 } else {
3608 if (netif_carrier_ok(netdev)) {
3609 adapter->link_speed = 0;
3610 adapter->link_duplex = 0;
8f12fe86
BA
3611 /* Link status message must follow this format */
3612 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3613 adapter->netdev->name);
bc7f75fa 3614 netif_carrier_off(netdev);
d55b53ff 3615 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK
3616 if (!test_bit(__E1000_DOWN, &adapter->state))
3617 mod_timer(&adapter->phy_info_timer,
3618 round_jiffies(jiffies + 2 * HZ));
3619
3620 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3621 schedule_work(&adapter->reset_task);
3622 }
3623 }
3624
3625link_up:
3626 e1000e_update_stats(adapter);
3627
3628 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3629 adapter->tpt_old = adapter->stats.tpt;
3630 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3631 adapter->colc_old = adapter->stats.colc;
3632
7c25769f
BA
3633 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3634 adapter->gorc_old = adapter->stats.gorc;
3635 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3636 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK
3637
3638 e1000e_update_adaptive(&adapter->hw);
3639
3640 if (!netif_carrier_ok(netdev)) {
3641 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3642 tx_ring->count);
3643 if (tx_pending) {
ad68076e
BA
3644 /*
3645 * We've lost link, so the controller stops DMA,
bc7f75fa
AK
3646 * but we've got queued Tx work that's never going
3647 * to get done, so reset controller to flush Tx.
ad68076e
BA
3648 * (Do the reset outside of interrupt context).
3649 */
bc7f75fa
AK
3650 adapter->tx_timeout_count++;
3651 schedule_work(&adapter->reset_task);
3652 }
3653 }
3654
ad68076e 3655 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA
3656 if (adapter->msix_entries)
3657 ew32(ICS, adapter->rx_ring->ims_val);
3658 else
3659 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK
3660
3661 /* Force detection of hung controller every watchdog period */
3662 adapter->detect_tx_hung = 1;
3663
ad68076e
BA
3664 /*
3665 * With 82571 controllers, LAA may be overwritten due to controller
3666 * reset from the other port. Set the appropriate LAA in RAR[0]
3667 */
bc7f75fa
AK
3668 if (e1000e_get_laa_state_82571(hw))
3669 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3670
3671 /* Reset the timer */
3672 if (!test_bit(__E1000_DOWN, &adapter->state))
3673 mod_timer(&adapter->watchdog_timer,
3674 round_jiffies(jiffies + 2 * HZ));
3675}
3676
3677#define E1000_TX_FLAGS_CSUM 0x00000001
3678#define E1000_TX_FLAGS_VLAN 0x00000002
3679#define E1000_TX_FLAGS_TSO 0x00000004
3680#define E1000_TX_FLAGS_IPV4 0x00000008
3681#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3682#define E1000_TX_FLAGS_VLAN_SHIFT 16
3683
3684static int e1000_tso(struct e1000_adapter *adapter,
3685 struct sk_buff *skb)
3686{
3687 struct e1000_ring *tx_ring = adapter->tx_ring;
3688 struct e1000_context_desc *context_desc;
3689 struct e1000_buffer *buffer_info;
3690 unsigned int i;
3691 u32 cmd_length = 0;
3692 u16 ipcse = 0, tucse, mss;
3693 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3694 int err;
3695
3696 if (skb_is_gso(skb)) {
3697 if (skb_header_cloned(skb)) {
3698 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3699 if (err)
3700 return err;
3701 }
3702
3703 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3704 mss = skb_shinfo(skb)->gso_size;
3705 if (skb->protocol == htons(ETH_P_IP)) {
3706 struct iphdr *iph = ip_hdr(skb);
3707 iph->tot_len = 0;
3708 iph->check = 0;
3709 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3710 iph->daddr, 0,
3711 IPPROTO_TCP,
3712 0);
3713 cmd_length = E1000_TXD_CMD_IP;
3714 ipcse = skb_transport_offset(skb) - 1;
3715 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3716 ipv6_hdr(skb)->payload_len = 0;
3717 tcp_hdr(skb)->check =
3718 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3719 &ipv6_hdr(skb)->daddr,
3720 0, IPPROTO_TCP, 0);
3721 ipcse = 0;
3722 }
3723 ipcss = skb_network_offset(skb);
3724 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3725 tucss = skb_transport_offset(skb);
3726 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3727 tucse = 0;
3728
3729 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3730 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3731
3732 i = tx_ring->next_to_use;
3733 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3734 buffer_info = &tx_ring->buffer_info[i];
3735
3736 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3737 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3738 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3739 context_desc->upper_setup.tcp_fields.tucss = tucss;
3740 context_desc->upper_setup.tcp_fields.tucso = tucso;
3741 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3742 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3743 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3744 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3745
3746 buffer_info->time_stamp = jiffies;
3747 buffer_info->next_to_watch = i;
3748
3749 i++;
3750 if (i == tx_ring->count)
3751 i = 0;
3752 tx_ring->next_to_use = i;
3753
3754 return 1;
3755 }
3756
3757 return 0;
3758}
3759
3760static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3761{
3762 struct e1000_ring *tx_ring = adapter->tx_ring;
3763 struct e1000_context_desc *context_desc;
3764 struct e1000_buffer *buffer_info;
3765 unsigned int i;
3766 u8 css;
af807c82 3767 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 3768 __be16 protocol;
bc7f75fa 3769
af807c82
DG
3770 if (skb->ip_summed != CHECKSUM_PARTIAL)
3771 return 0;
bc7f75fa 3772
5f66f208
AJ
3773 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3774 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3775 else
3776 protocol = skb->protocol;
3777
3f518390 3778 switch (protocol) {
09640e63 3779 case cpu_to_be16(ETH_P_IP):
af807c82
DG
3780 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3781 cmd_len |= E1000_TXD_CMD_TCP;
3782 break;
09640e63 3783 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG
3784 /* XXX not handling all IPV6 headers */
3785 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3786 cmd_len |= E1000_TXD_CMD_TCP;
3787 break;
3788 default:
3789 if (unlikely(net_ratelimit()))
5f66f208
AJ
3790 e_warn("checksum_partial proto=%x!\n",
3791 be16_to_cpu(protocol));
af807c82 3792 break;
bc7f75fa
AK
3793 }
3794
af807c82
DG
3795 css = skb_transport_offset(skb);
3796
3797 i = tx_ring->next_to_use;
3798 buffer_info = &tx_ring->buffer_info[i];
3799 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3800
3801 context_desc->lower_setup.ip_config = 0;
3802 context_desc->upper_setup.tcp_fields.tucss = css;
3803 context_desc->upper_setup.tcp_fields.tucso =
3804 css + skb->csum_offset;
3805 context_desc->upper_setup.tcp_fields.tucse = 0;
3806 context_desc->tcp_seg_setup.data = 0;
3807 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3808
3809 buffer_info->time_stamp = jiffies;
3810 buffer_info->next_to_watch = i;
3811
3812 i++;
3813 if (i == tx_ring->count)
3814 i = 0;
3815 tx_ring->next_to_use = i;
3816
3817 return 1;
bc7f75fa
AK
3818}
3819
3820#define E1000_MAX_PER_TXD 8192
3821#define E1000_MAX_TXD_PWR 12
3822
3823static int e1000_tx_map(struct e1000_adapter *adapter,
3824 struct sk_buff *skb, unsigned int first,
3825 unsigned int max_per_txd, unsigned int nr_frags,
3826 unsigned int mss)
3827{
3828 struct e1000_ring *tx_ring = adapter->tx_ring;
1b7719c4 3829 struct e1000_buffer *buffer_info;
8ddc951c
JB
3830 unsigned int len = skb_headlen(skb);
3831 unsigned int offset, size, count = 0, i;
bc7f75fa 3832 unsigned int f;
1b7719c4 3833 dma_addr_t *map;
bc7f75fa
AK
3834
3835 i = tx_ring->next_to_use;
3836
8ddc951c
JB
3837 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
3838 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
3839 adapter->tx_dma_failed++;
1b7719c4 3840 return 0;
8ddc951c
JB
3841 }
3842
1b7719c4 3843 map = skb_shinfo(skb)->dma_maps;
8ddc951c
JB
3844 offset = 0;
3845
bc7f75fa 3846 while (len) {
1b7719c4 3847 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK
3848 size = min(len, max_per_txd);
3849
bc7f75fa 3850 buffer_info->length = size;
bc7f75fa 3851 buffer_info->time_stamp = jiffies;
bc7f75fa 3852 buffer_info->next_to_watch = i;
1b7719c4
AD
3853 buffer_info->dma = map[0] + offset;
3854 count++;
bc7f75fa
AK
3855
3856 len -= size;
3857 offset += size;
1b7719c4
AD
3858
3859 if (len) {
3860 i++;
3861 if (i == tx_ring->count)
3862 i = 0;
3863 }
bc7f75fa
AK
3864 }
3865
3866 for (f = 0; f < nr_frags; f++) {
3867 struct skb_frag_struct *frag;
3868
3869 frag = &skb_shinfo(skb)->frags[f];
3870 len = frag->size;
8ddc951c 3871 offset = 0;
bc7f75fa
AK
3872
3873 while (len) {
1b7719c4
AD
3874 i++;
3875 if (i == tx_ring->count)
3876 i = 0;
3877
bc7f75fa
AK
3878 buffer_info = &tx_ring->buffer_info[i];
3879 size = min(len, max_per_txd);
bc7f75fa
AK
3880
3881 buffer_info->length = size;
3882 buffer_info->time_stamp = jiffies;
bc7f75fa 3883 buffer_info->next_to_watch = i;
1b7719c4 3884 buffer_info->dma = map[f + 1] + offset;
bc7f75fa
AK
3885
3886 len -= size;
3887 offset += size;
3888 count++;
bc7f75fa
AK
3889 }
3890 }
3891
bc7f75fa
AK
3892 tx_ring->buffer_info[i].skb = skb;
3893 tx_ring->buffer_info[first].next_to_watch = i;
3894
3895 return count;
3896}
3897
3898static void e1000_tx_queue(struct e1000_adapter *adapter,
3899 int tx_flags, int count)
3900{
3901 struct e1000_ring *tx_ring = adapter->tx_ring;
3902 struct e1000_tx_desc *tx_desc = NULL;
3903 struct e1000_buffer *buffer_info;
3904 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3905 unsigned int i;
3906
3907 if (tx_flags & E1000_TX_FLAGS_TSO) {
3908 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3909 E1000_TXD_CMD_TSE;
3910 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3911
3912 if (tx_flags & E1000_TX_FLAGS_IPV4)
3913 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3914 }
3915
3916 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3917 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3918 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3919 }
3920
3921 if (tx_flags & E1000_TX_FLAGS_VLAN) {
3922 txd_lower |= E1000_TXD_CMD_VLE;
3923 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3924 }
3925
3926 i = tx_ring->next_to_use;
3927
3928 while (count--) {
3929 buffer_info = &tx_ring->buffer_info[i];
3930 tx_desc = E1000_TX_DESC(*tx_ring, i);
3931 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3932 tx_desc->lower.data =
3933 cpu_to_le32(txd_lower | buffer_info->length);
3934 tx_desc->upper.data = cpu_to_le32(txd_upper);
3935
3936 i++;
3937 if (i == tx_ring->count)
3938 i = 0;
3939 }
3940
3941 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3942
ad68076e
BA
3943 /*
3944 * Force memory writes to complete before letting h/w
bc7f75fa
AK
3945 * know there are new descriptors to fetch. (Only
3946 * applicable for weak-ordered memory model archs,
ad68076e
BA
3947 * such as IA-64).
3948 */
bc7f75fa
AK
3949 wmb();
3950
3951 tx_ring->next_to_use = i;
3952 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA
3953 /*
3954 * we need this if more than one processor can write to our tail
3955 * at a time, it synchronizes IO on IA64/Altix systems
3956 */
bc7f75fa
AK
3957 mmiowb();
3958}
3959
3960#define MINIMUM_DHCP_PACKET_SIZE 282
3961static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3962 struct sk_buff *skb)
3963{
3964 struct e1000_hw *hw = &adapter->hw;
3965 u16 length, offset;
3966
3967 if (vlan_tx_tag_present(skb)) {
3968 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id)
3969 && (adapter->hw.mng_cookie.status &
3970 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
3971 return 0;
3972 }
3973
3974 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
3975 return 0;
3976
3977 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
3978 return 0;
3979
3980 {
3981 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
3982 struct udphdr *udp;
3983
3984 if (ip->protocol != IPPROTO_UDP)
3985 return 0;
3986
3987 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
3988 if (ntohs(udp->dest) != 67)
3989 return 0;
3990
3991 offset = (u8 *)udp + 8 - skb->data;
3992 length = skb->len - offset;
3993 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
3994 }
3995
3996 return 0;
3997}
3998
3999static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4000{
4001 struct e1000_adapter *adapter = netdev_priv(netdev);
4002
4003 netif_stop_queue(netdev);
ad68076e
BA
4004 /*
4005 * Herbert's original patch had:
bc7f75fa 4006 * smp_mb__after_netif_stop_queue();
ad68076e
BA
4007 * but since that doesn't exist yet, just open code it.
4008 */
bc7f75fa
AK
4009 smp_mb();
4010
ad68076e
BA
4011 /*
4012 * We need to check again in a case another CPU has just
4013 * made room available.
4014 */
bc7f75fa
AK
4015 if (e1000_desc_unused(adapter->tx_ring) < size)
4016 return -EBUSY;
4017
4018 /* A reprieve! */
4019 netif_start_queue(netdev);
4020 ++adapter->restart_queue;
4021 return 0;
4022}
4023
4024static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4025{
4026 struct e1000_adapter *adapter = netdev_priv(netdev);
4027
4028 if (e1000_desc_unused(adapter->tx_ring) >= size)
4029 return 0;
4030 return __e1000_maybe_stop_tx(netdev, size);
4031}
4032
4033#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
4034static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
4035{
4036 struct e1000_adapter *adapter = netdev_priv(netdev);
4037 struct e1000_ring *tx_ring = adapter->tx_ring;
4038 unsigned int first;
4039 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4040 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4041 unsigned int tx_flags = 0;
4e6c709c 4042 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK
4043 unsigned int nr_frags;
4044 unsigned int mss;
bc7f75fa
AK
4045 int count = 0;
4046 int tso;
4047 unsigned int f;
bc7f75fa
AK
4048
4049 if (test_bit(__E1000_DOWN, &adapter->state)) {
4050 dev_kfree_skb_any(skb);
4051 return NETDEV_TX_OK;
4052 }
4053
4054 if (skb->len <= 0) {
4055 dev_kfree_skb_any(skb);
4056 return NETDEV_TX_OK;
4057 }
4058
4059 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA
4060 /*
4061 * The controller does a simple calculation to
bc7f75fa
AK
4062 * make sure there is enough room in the FIFO before
4063 * initiating the DMA for each buffer. The calc is:
4064 * 4 = ceil(buffer len/mss). To make sure we don't
4065 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA
4066 * drops.
4067 */
bc7f75fa
AK
4068 if (mss) {
4069 u8 hdr_len;
4070 max_per_txd = min(mss << 2, max_per_txd);
4071 max_txd_pwr = fls(max_per_txd) - 1;
4072
ad68076e
BA
4073 /*
4074 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4075 * points to just header, pull a few bytes of payload from
4076 * frags into skb->data
4077 */
bc7f75fa 4078 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA
4079 /*
4080 * we do this workaround for ES2LAN, but it is un-necessary,
4081 * avoiding it could save a lot of cycles
4082 */
4e6c709c 4083 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK
4084 unsigned int pull_size;
4085
4086 pull_size = min((unsigned int)4, skb->data_len);
4087 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4088 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK
4089 dev_kfree_skb_any(skb);
4090 return NETDEV_TX_OK;
4091 }
4092 len = skb->len - skb->data_len;
4093 }
4094 }
4095
4096 /* reserve a descriptor for the offload context */
4097 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4098 count++;
4099 count++;
4100
4101 count += TXD_USE_COUNT(len, max_txd_pwr);
4102
4103 nr_frags = skb_shinfo(skb)->nr_frags;
4104 for (f = 0; f < nr_frags; f++)
4105 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4106 max_txd_pwr);
4107
4108 if (adapter->hw.mac.tx_pkt_filtering)
4109 e1000_transfer_dhcp_info(adapter, skb);
4110
ad68076e
BA
4111 /*
4112 * need: count + 2 desc gap to keep tail from touching
4113 * head, otherwise try next time
4114 */
92af3e95 4115 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4116 return NETDEV_TX_BUSY;
bc7f75fa
AK
4117
4118 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4119 tx_flags |= E1000_TX_FLAGS_VLAN;
4120 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4121 }
4122
4123 first = tx_ring->next_to_use;
4124
4125 tso = e1000_tso(adapter, skb);
4126 if (tso < 0) {
4127 dev_kfree_skb_any(skb);
bc7f75fa
AK
4128 return NETDEV_TX_OK;
4129 }
4130
4131 if (tso)
4132 tx_flags |= E1000_TX_FLAGS_TSO;
4133 else if (e1000_tx_csum(adapter, skb))
4134 tx_flags |= E1000_TX_FLAGS_CSUM;
4135
ad68076e
BA
4136 /*
4137 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4138 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA
4139 * no longer assume, we must.
4140 */
bc7f75fa
AK
4141 if (skb->protocol == htons(ETH_P_IP))
4142 tx_flags |= E1000_TX_FLAGS_IPV4;
4143
1b7719c4 4144 /* if count is 0 then mapping error has occured */
bc7f75fa 4145 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD
4146 if (count) {
4147 e1000_tx_queue(adapter, tx_flags, count);
4148 netdev->trans_start = jiffies;
4149 /* Make sure there is space in the ring for the next send. */
4150 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4151
4152 } else {
bc7f75fa 4153 dev_kfree_skb_any(skb);
1b7719c4
AD
4154 tx_ring->buffer_info[first].time_stamp = 0;
4155 tx_ring->next_to_use = first;
bc7f75fa
AK
4156 }
4157
bc7f75fa
AK
4158 return NETDEV_TX_OK;
4159}
4160
4161/**
4162 * e1000_tx_timeout - Respond to a Tx Hang
4163 * @netdev: network interface device structure
4164 **/
4165static void e1000_tx_timeout(struct net_device *netdev)
4166{
4167 struct e1000_adapter *adapter = netdev_priv(netdev);
4168
4169 /* Do the reset outside of interrupt context */
4170 adapter->tx_timeout_count++;
4171 schedule_work(&adapter->reset_task);
4172}
4173
4174static void e1000_reset_task(struct work_struct *work)
4175{
4176 struct e1000_adapter *adapter;
4177 adapter = container_of(work, struct e1000_adapter, reset_task);
4178
4179 e1000e_reinit_locked(adapter);
4180}
4181
4182/**
4183 * e1000_get_stats - Get System Network Statistics
4184 * @netdev: network interface device structure
4185 *
4186 * Returns the address of the device statistics structure.
4187 * The statistics are actually updated from the timer callback.
4188 **/
4189static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4190{
4191 struct e1000_adapter *adapter = netdev_priv(netdev);
4192
4193 /* only return the current stats */
4194 return &adapter->net_stats;
4195}
4196
4197/**
4198 * e1000_change_mtu - Change the Maximum Transfer Unit
4199 * @netdev: network interface device structure
4200 * @new_mtu: new value for maximum frame size
4201 *
4202 * Returns 0 on success, negative on failure
4203 **/
4204static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4205{
4206 struct e1000_adapter *adapter = netdev_priv(netdev);
4207 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4208
d53f706d 4209 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
bc7f75fa 4210 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
44defeb3 4211 e_err("Invalid MTU setting\n");
bc7f75fa
AK
4212 return -EINVAL;
4213 }
4214
4215 /* Jumbo frame size limits */
4216 if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) {
4217 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
44defeb3 4218 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK
4219 return -EINVAL;
4220 }
4221 if (adapter->hw.phy.type == e1000_phy_ife) {
44defeb3 4222 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK
4223 return -EINVAL;
4224 }
4225 }
4226
4227#define MAX_STD_JUMBO_FRAME_SIZE 9234
4228 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
44defeb3 4229 e_err("MTU > 9216 not supported.\n");
bc7f75fa
AK
4230 return -EINVAL;
4231 }
4232
4233 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4234 msleep(1);
4235 /* e1000e_down has a dependency on max_frame_size */
318a94d6 4236 adapter->max_frame_size = max_frame;
bc7f75fa
AK
4237 if (netif_running(netdev))
4238 e1000e_down(adapter);
4239
ad68076e
BA
4240 /*
4241 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK
4242 * means we reserve 2 more, this pushes us to allocate from the next
4243 * larger slab size.
ad68076e 4244 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA
4245 * However with the new *_jumbo_rx* routines, jumbo receives will use
4246 * fragmented skbs
ad68076e 4247 */
bc7f75fa
AK
4248
4249 if (max_frame <= 256)
4250 adapter->rx_buffer_len = 256;
4251 else if (max_frame <= 512)
4252 adapter->rx_buffer_len = 512;
4253 else if (max_frame <= 1024)
4254 adapter->rx_buffer_len = 1024;
4255 else if (max_frame <= 2048)
4256 adapter->rx_buffer_len = 2048;
4257 else
4258 adapter->rx_buffer_len = 4096;
4259
4260 /* adjust allocation if LPE protects us, and we aren't using SBP */
4261 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4262 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4263 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4264 + ETH_FCS_LEN;
bc7f75fa 4265
44defeb3 4266 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
bc7f75fa
AK
4267 netdev->mtu = new_mtu;
4268
4269 if (netif_running(netdev))
4270 e1000e_up(adapter);
4271 else
4272 e1000e_reset(adapter);
4273
4274 clear_bit(__E1000_RESETTING, &adapter->state);
4275
4276 return 0;
4277}
4278
4279static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4280 int cmd)
4281{
4282 struct e1000_adapter *adapter = netdev_priv(netdev);
4283 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4284
318a94d6 4285 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK
4286 return -EOPNOTSUPP;
4287
4288 switch (cmd) {
4289 case SIOCGMIIPHY:
4290 data->phy_id = adapter->hw.phy.addr;
4291 break;
4292 case SIOCGMIIREG:
4293 if (!capable(CAP_NET_ADMIN))
4294 return -EPERM;
7c25769f
BA
4295 switch (data->reg_num & 0x1F) {
4296 case MII_BMCR:
4297 data->val_out = adapter->phy_regs.bmcr;
4298 break;
4299 case MII_BMSR:
4300 data->val_out = adapter->phy_regs.bmsr;
4301 break;
4302 case MII_PHYSID1:
4303 data->val_out = (adapter->hw.phy.id >> 16);
4304 break;
4305 case MII_PHYSID2:
4306 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4307 break;
4308 case MII_ADVERTISE:
4309 data->val_out = adapter->phy_regs.advertise;
4310 break;
4311 case MII_LPA:
4312 data->val_out = adapter->phy_regs.lpa;
4313 break;
4314 case MII_EXPANSION:
4315 data->val_out = adapter->phy_regs.expansion;
4316 break;
4317 case MII_CTRL1000:
4318 data->val_out = adapter->phy_regs.ctrl1000;
4319 break;
4320 case MII_STAT1000:
4321 data->val_out = adapter->phy_regs.stat1000;
4322 break;
4323 case MII_ESTATUS:
4324 data->val_out = adapter->phy_regs.estatus;
4325 break;
4326 default:
bc7f75fa
AK
4327 return -EIO;
4328 }
bc7f75fa
AK
4329 break;
4330 case SIOCSMIIREG:
4331 default:
4332 return -EOPNOTSUPP;
4333 }
4334 return 0;
4335}
4336
4337static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4338{
4339 switch (cmd) {
4340 case SIOCGMIIPHY:
4341 case SIOCGMIIREG:
4342 case SIOCSMIIREG:
4343 return e1000_mii_ioctl(netdev, ifr, cmd);
4344 default:
4345 return -EOPNOTSUPP;
4346 }
4347}
4348
4349static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4350{
4351 struct net_device *netdev = pci_get_drvdata(pdev);
4352 struct e1000_adapter *adapter = netdev_priv(netdev);
4353 struct e1000_hw *hw = &adapter->hw;
4354 u32 ctrl, ctrl_ext, rctl, status;
4355 u32 wufc = adapter->wol;
4356 int retval = 0;
4357
4358 netif_device_detach(netdev);
4359
4360 if (netif_running(netdev)) {
4361 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4362 e1000e_down(adapter);
4363 e1000_free_irq(adapter);
4364 }
4662e82b 4365 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK
4366
4367 retval = pci_save_state(pdev);
4368 if (retval)
4369 return retval;
4370
4371 status = er32(STATUS);
4372 if (status & E1000_STATUS_LU)
4373 wufc &= ~E1000_WUFC_LNKC;
4374
4375 if (wufc) {
4376 e1000_setup_rctl(adapter);
4377 e1000_set_multi(netdev);
4378
4379 /* turn on all-multi mode if wake on multicast is enabled */
4380 if (wufc & E1000_WUFC_MC) {
4381 rctl = er32(RCTL);
4382 rctl |= E1000_RCTL_MPE;
4383 ew32(RCTL, rctl);
4384 }
4385
4386 ctrl = er32(CTRL);
4387 /* advertise wake from D3Cold */
4388 #define E1000_CTRL_ADVD3WUC 0x00100000
4389 /* phy power management enable */
4390 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4391 ctrl |= E1000_CTRL_ADVD3WUC |
4392 E1000_CTRL_EN_PHY_PWR_MGMT;
4393 ew32(CTRL, ctrl);
4394
318a94d6
JK
4395 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4396 adapter->hw.phy.media_type ==
4397 e1000_media_type_internal_serdes) {
bc7f75fa
AK
4398 /* keep the laser running in D3 */
4399 ctrl_ext = er32(CTRL_EXT);
4400 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4401 ew32(CTRL_EXT, ctrl_ext);
4402 }
4403
97ac8cae
BA
4404 if (adapter->flags & FLAG_IS_ICH)
4405 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4406
bc7f75fa
AK
4407 /* Allow time for pending master requests to run */
4408 e1000e_disable_pcie_master(&adapter->hw);
4409
4410 ew32(WUC, E1000_WUC_PME_EN);
4411 ew32(WUFC, wufc);
4412 pci_enable_wake(pdev, PCI_D3hot, 1);
4413 pci_enable_wake(pdev, PCI_D3cold, 1);
4414 } else {
4415 ew32(WUC, 0);
4416 ew32(WUFC, 0);
4417 pci_enable_wake(pdev, PCI_D3hot, 0);
4418 pci_enable_wake(pdev, PCI_D3cold, 0);
4419 }
4420
bc7f75fa
AK
4421 /* make sure adapter isn't asleep if manageability is enabled */
4422 if (adapter->flags & FLAG_MNG_PT_ENABLED) {
4423 pci_enable_wake(pdev, PCI_D3hot, 1);
4424 pci_enable_wake(pdev, PCI_D3cold, 1);
4425 }
4426
4427 if (adapter->hw.phy.type == e1000_phy_igp_3)
4428 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4429
ad68076e
BA
4430 /*
4431 * Release control of h/w to f/w. If f/w is AMT enabled, this
4432 * would have already happened in close and is redundant.
4433 */
bc7f75fa
AK
4434 e1000_release_hw_control(adapter);
4435
4436 pci_disable_device(pdev);
4437
005cbdfc
AD
4438 /*
4439 * The pci-e switch on some quad port adapters will report a
4440 * correctable error when the MAC transitions from D0 to D3. To
4441 * prevent this we need to mask off the correctable errors on the
4442 * downstream port of the pci-e switch.
4443 */
4444 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4445 struct pci_dev *us_dev = pdev->bus->self;
4446 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4447 u16 devctl;
4448
4449 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4450 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4451 (devctl & ~PCI_EXP_DEVCTL_CERE));
4452
4453 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4454
4455 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4456 } else {
4457 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4458 }
bc7f75fa
AK
4459
4460 return 0;
4461}
4462
1eae4eb2
AK
4463static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4464{
4465 int pos;
1eae4eb2
AK
4466 u16 val;
4467
4468 /*
4469 * 82573 workaround - disable L1 ASPM on mobile chipsets
4470 *
4471 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4472 * resulting in lost data or garbage information on the pci-e link
4473 * level. This could result in (false) bad EEPROM checksum errors,
4474 * long ping times (up to 2s) or even a system freeze/hang.
4475 *
4476 * Unfortunately this feature saves about 1W power consumption when
4477 * active.
4478 */
4479 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK
4480 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4481 if (val & 0x2) {
4482 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4483 val &= ~0x2;
4484 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4485 }
4486}
4487
bc7f75fa
AK
4488#ifdef CONFIG_PM
4489static int e1000_resume(struct pci_dev *pdev)
4490{
4491 struct net_device *netdev = pci_get_drvdata(pdev);
4492 struct e1000_adapter *adapter = netdev_priv(netdev);
4493 struct e1000_hw *hw = &adapter->hw;
4494 u32 err;
4495
4496 pci_set_power_state(pdev, PCI_D0);
4497 pci_restore_state(pdev);
1eae4eb2 4498 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4499
f0f422e5 4500 err = pci_enable_device_mem(pdev);
bc7f75fa
AK
4501 if (err) {
4502 dev_err(&pdev->dev,
4503 "Cannot enable PCI device from suspend\n");
4504 return err;
4505 }
4506
111b9dc5
JB
4507 /* AER (Advanced Error Reporting) hooks */
4508 err = pci_enable_pcie_error_reporting(pdev);
4509 if (err) {
4510 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
4511 "0x%x\n", err);
4512 /* non-fatal, continue */
4513 }
4514
bc7f75fa
AK
4515 pci_set_master(pdev);
4516
4517 pci_enable_wake(pdev, PCI_D3hot, 0);
4518 pci_enable_wake(pdev, PCI_D3cold, 0);
4519
4662e82b 4520 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK
4521 if (netif_running(netdev)) {
4522 err = e1000_request_irq(adapter);
4523 if (err)
4524 return err;
4525 }
4526
4527 e1000e_power_up_phy(adapter);
4528 e1000e_reset(adapter);
4529 ew32(WUS, ~0);
4530
4531 e1000_init_manageability(adapter);
4532
4533 if (netif_running(netdev))
4534 e1000e_up(adapter);
4535
4536 netif_device_attach(netdev);
4537
ad68076e
BA
4538 /*
4539 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4540 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
4541 * under the control of the driver.
4542 */
c43bc57e 4543 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
4544 e1000_get_hw_control(adapter);
4545
4546 return 0;
4547}
4548#endif
4549
4550static void e1000_shutdown(struct pci_dev *pdev)
4551{
4552 e1000_suspend(pdev, PMSG_SUSPEND);
4553}
4554
4555#ifdef CONFIG_NET_POLL_CONTROLLER
4556/*
4557 * Polling 'interrupt' - used by things like netconsole to send skbs
4558 * without having to re-enable interrupts. It's not called while
4559 * the interrupt routine is executing.
4560 */
4561static void e1000_netpoll(struct net_device *netdev)
4562{
4563 struct e1000_adapter *adapter = netdev_priv(netdev);
4564
4565 disable_irq(adapter->pdev->irq);
4566 e1000_intr(adapter->pdev->irq, netdev);
4567
bc7f75fa
AK
4568 enable_irq(adapter->pdev->irq);
4569}
4570#endif
4571
4572/**
4573 * e1000_io_error_detected - called when PCI error is detected
4574 * @pdev: Pointer to PCI device
4575 * @state: The current pci connection state
4576 *
4577 * This function is called after a PCI bus error affecting
4578 * this device has been detected.
4579 */
4580static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4581 pci_channel_state_t state)
4582{
4583 struct net_device *netdev = pci_get_drvdata(pdev);
4584 struct e1000_adapter *adapter = netdev_priv(netdev);
4585
4586 netif_device_detach(netdev);
4587
4588 if (netif_running(netdev))
4589 e1000e_down(adapter);
4590 pci_disable_device(pdev);
4591
4592 /* Request a slot slot reset. */
4593 return PCI_ERS_RESULT_NEED_RESET;
4594}
4595
4596/**
4597 * e1000_io_slot_reset - called after the pci bus has been reset.
4598 * @pdev: Pointer to PCI device
4599 *
4600 * Restart the card from scratch, as if from a cold-boot. Implementation
4601 * resembles the first-half of the e1000_resume routine.
4602 */
4603static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4604{
4605 struct net_device *netdev = pci_get_drvdata(pdev);
4606 struct e1000_adapter *adapter = netdev_priv(netdev);
4607 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4608 int err;
111b9dc5 4609 pci_ers_result_t result;
bc7f75fa 4610
1eae4eb2 4611 e1000e_disable_l1aspm(pdev);
f0f422e5 4612 err = pci_enable_device_mem(pdev);
6e4f6f6b 4613 if (err) {
bc7f75fa
AK
4614 dev_err(&pdev->dev,
4615 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB
4616 result = PCI_ERS_RESULT_DISCONNECT;
4617 } else {
4618 pci_set_master(pdev);
4619 pci_restore_state(pdev);
bc7f75fa 4620
111b9dc5
JB
4621 pci_enable_wake(pdev, PCI_D3hot, 0);
4622 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4623
111b9dc5
JB
4624 e1000e_reset(adapter);
4625 ew32(WUS, ~0);
4626 result = PCI_ERS_RESULT_RECOVERED;
4627 }
bc7f75fa 4628
111b9dc5
JB
4629 pci_cleanup_aer_uncorrect_error_status(pdev);
4630
4631 return result;
bc7f75fa
AK
4632}
4633
4634/**
4635 * e1000_io_resume - called when traffic can start flowing again.
4636 * @pdev: Pointer to PCI device
4637 *
4638 * This callback is called when the error recovery driver tells us that
4639 * its OK to resume normal operation. Implementation resembles the
4640 * second-half of the e1000_resume routine.
4641 */
4642static void e1000_io_resume(struct pci_dev *pdev)
4643{
4644 struct net_device *netdev = pci_get_drvdata(pdev);
4645 struct e1000_adapter *adapter = netdev_priv(netdev);
4646
4647 e1000_init_manageability(adapter);
4648
4649 if (netif_running(netdev)) {
4650 if (e1000e_up(adapter)) {
4651 dev_err(&pdev->dev,
4652 "can't bring device back up after reset\n");
4653 return;
4654 }
4655 }
4656
4657 netif_device_attach(netdev);
4658
ad68076e
BA
4659 /*
4660 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4661 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
4662 * under the control of the driver.
4663 */
c43bc57e 4664 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
4665 e1000_get_hw_control(adapter);
4666
4667}
4668
4669static void e1000_print_device_info(struct e1000_adapter *adapter)
4670{
4671 struct e1000_hw *hw = &adapter->hw;
4672 struct net_device *netdev = adapter->netdev;
69e3fd8c 4673 u32 pba_num;
bc7f75fa
AK
4674
4675 /* print bus type/speed/width info */
7c510e4b 4676 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK
4677 /* bus width */
4678 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4679 "Width x1"),
4680 /* MAC address */
7c510e4b 4681 netdev->dev_addr);
44defeb3
JK
4682 e_info("Intel(R) PRO/%s Network Connection\n",
4683 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4684 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK
4685 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4686 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK
4687}
4688
10aa4c04
AK
4689static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4690{
4691 struct e1000_hw *hw = &adapter->hw;
4692 int ret_val;
4693 u16 buf = 0;
4694
4695 if (hw->mac.type != e1000_82573)
4696 return;
4697
4698 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4699 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4700 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP
4701 dev_warn(&adapter->pdev->dev,
4702 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK
4703 }
4704
4705 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4706 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4707 /* ASPM enable */
6c2a9efa
FP
4708 dev_warn(&adapter->pdev->dev,
4709 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK
4710 }
4711}
4712
651c2466
SH
4713static const struct net_device_ops e1000e_netdev_ops = {
4714 .ndo_open = e1000_open,
4715 .ndo_stop = e1000_close,
00829823 4716 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH
4717 .ndo_get_stats = e1000_get_stats,
4718 .ndo_set_multicast_list = e1000_set_multi,
4719 .ndo_set_mac_address = e1000_set_mac,
4720 .ndo_change_mtu = e1000_change_mtu,
4721 .ndo_do_ioctl = e1000_ioctl,
4722 .ndo_tx_timeout = e1000_tx_timeout,
4723 .ndo_validate_addr = eth_validate_addr,
4724
4725 .ndo_vlan_rx_register = e1000_vlan_rx_register,
4726 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
4727 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
4728#ifdef CONFIG_NET_POLL_CONTROLLER
4729 .ndo_poll_controller = e1000_netpoll,
4730#endif
4731};
4732
bc7f75fa
AK
4733/**
4734 * e1000_probe - Device Initialization Routine
4735 * @pdev: PCI device information struct
4736 * @ent: entry in e1000_pci_tbl
4737 *
4738 * Returns 0 on success, negative on failure
4739 *
4740 * e1000_probe initializes an adapter identified by a pci_dev structure.
4741 * The OS initialization, configuring of the adapter private structure,
4742 * and a hardware reset occur.
4743 **/
4744static int __devinit e1000_probe(struct pci_dev *pdev,
4745 const struct pci_device_id *ent)
4746{
4747 struct net_device *netdev;
4748 struct e1000_adapter *adapter;
4749 struct e1000_hw *hw;
4750 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB
4751 resource_size_t mmio_start, mmio_len;
4752 resource_size_t flash_start, flash_len;
bc7f75fa
AK
4753
4754 static int cards_found;
4755 int i, err, pci_using_dac;
4756 u16 eeprom_data = 0;
4757 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4758
1eae4eb2 4759 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4760
f0f422e5 4761 err = pci_enable_device_mem(pdev);
bc7f75fa
AK
4762 if (err)
4763 return err;
4764
4765 pci_using_dac = 0;
6a35528a 4766 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa 4767 if (!err) {
6a35528a 4768 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa
AK
4769 if (!err)
4770 pci_using_dac = 1;
4771 } else {
4772 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4773 if (err) {
4774 err = pci_set_consistent_dma_mask(pdev,
4775 DMA_32BIT_MASK);
4776 if (err) {
4777 dev_err(&pdev->dev, "No usable DMA "
4778 "configuration, aborting\n");
4779 goto err_dma;
4780 }
4781 }
4782 }
4783
e8de1481 4784 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA
4785 pci_select_bars(pdev, IORESOURCE_MEM),
4786 e1000e_driver_name);
bc7f75fa
AK
4787 if (err)
4788 goto err_pci_reg;
4789
4790 pci_set_master(pdev);
438b365a
BA
4791 /* PCI config space info */
4792 err = pci_save_state(pdev);
4793 if (err)
4794 goto err_alloc_etherdev;
bc7f75fa
AK
4795
4796 err = -ENOMEM;
4797 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
4798 if (!netdev)
4799 goto err_alloc_etherdev;
4800
bc7f75fa
AK
4801 SET_NETDEV_DEV(netdev, &pdev->dev);
4802
4803 pci_set_drvdata(pdev, netdev);
4804 adapter = netdev_priv(netdev);
4805 hw = &adapter->hw;
4806 adapter->netdev = netdev;
4807 adapter->pdev = pdev;
4808 adapter->ei = ei;
4809 adapter->pba = ei->pba;
4810 adapter->flags = ei->flags;
eb7c3adb 4811 adapter->flags2 = ei->flags2;
bc7f75fa
AK
4812 adapter->hw.adapter = adapter;
4813 adapter->hw.mac.type = ei->mac;
4814 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
4815
4816 mmio_start = pci_resource_start(pdev, 0);
4817 mmio_len = pci_resource_len(pdev, 0);
4818
4819 err = -EIO;
4820 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
4821 if (!adapter->hw.hw_addr)
4822 goto err_ioremap;
4823
4824 if ((adapter->flags & FLAG_HAS_FLASH) &&
4825 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
4826 flash_start = pci_resource_start(pdev, 1);
4827 flash_len = pci_resource_len(pdev, 1);
4828 adapter->hw.flash_address = ioremap(flash_start, flash_len);
4829 if (!adapter->hw.flash_address)
4830 goto err_flashmap;
4831 }
4832
4833 /* construct the net_device struct */
651c2466 4834 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 4835 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK
4836 netdev->watchdog_timeo = 5 * HZ;
4837 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK
4838 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
4839
4840 netdev->mem_start = mmio_start;
4841 netdev->mem_end = mmio_start + mmio_len;
4842
4843 adapter->bd_number = cards_found++;
4844
4662e82b
BA
4845 e1000e_check_options(adapter);
4846
bc7f75fa
AK
4847 /* setup adapter struct */
4848 err = e1000_sw_init(adapter);
4849 if (err)
4850 goto err_sw_init;
4851
4852 err = -EIO;
4853
4854 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
4855 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
4856 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
4857
69e3fd8c 4858 err = ei->get_variants(adapter);
bc7f75fa
AK
4859 if (err)
4860 goto err_hw_init;
4861
4a770358
BA
4862 if ((adapter->flags & FLAG_IS_ICH) &&
4863 (adapter->flags & FLAG_READ_ONLY_NVM))
4864 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
4865
bc7f75fa
AK
4866 hw->mac.ops.get_bus_info(&adapter->hw);
4867
318a94d6 4868 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK
4869
4870 /* Copper options */
318a94d6 4871 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK
4872 adapter->hw.phy.mdix = AUTO_ALL_MODES;
4873 adapter->hw.phy.disable_polarity_correction = 0;
4874 adapter->hw.phy.ms_type = e1000_ms_hw_default;
4875 }
4876
4877 if (e1000_check_reset_block(&adapter->hw))
44defeb3 4878 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK
4879
4880 netdev->features = NETIF_F_SG |
4881 NETIF_F_HW_CSUM |
4882 NETIF_F_HW_VLAN_TX |
4883 NETIF_F_HW_VLAN_RX;
4884
4885 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
4886 netdev->features |= NETIF_F_HW_VLAN_FILTER;
4887
4888 netdev->features |= NETIF_F_TSO;
4889 netdev->features |= NETIF_F_TSO6;
4890
a5136e23
JK
4891 netdev->vlan_features |= NETIF_F_TSO;
4892 netdev->vlan_features |= NETIF_F_TSO6;
4893 netdev->vlan_features |= NETIF_F_HW_CSUM;
4894 netdev->vlan_features |= NETIF_F_SG;
4895
bc7f75fa
AK
4896 if (pci_using_dac)
4897 netdev->features |= NETIF_F_HIGHDMA;
4898
bc7f75fa
AK
4899 if (e1000e_enable_mng_pass_thru(&adapter->hw))
4900 adapter->flags |= FLAG_MNG_PT_ENABLED;
4901
ad68076e
BA
4902 /*
4903 * before reading the NVM, reset the controller to
4904 * put the device in a known good starting state
4905 */
bc7f75fa
AK
4906 adapter->hw.mac.ops.reset_hw(&adapter->hw);
4907
4908 /*
4909 * systems with ASPM and others may see the checksum fail on the first
4910 * attempt. Let's give it a few tries
4911 */
4912 for (i = 0;; i++) {
4913 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
4914 break;
4915 if (i == 2) {
44defeb3 4916 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK
4917 err = -EIO;
4918 goto err_eeprom;
4919 }
4920 }
4921
10aa4c04
AK
4922 e1000_eeprom_checks(adapter);
4923
bc7f75fa
AK
4924 /* copy the MAC address out of the NVM */
4925 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 4926 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK
4927
4928 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
4929 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
4930
4931 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 4932 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK
4933 err = -EIO;
4934 goto err_eeprom;
4935 }
4936
4937 init_timer(&adapter->watchdog_timer);
4938 adapter->watchdog_timer.function = &e1000_watchdog;
4939 adapter->watchdog_timer.data = (unsigned long) adapter;
4940
4941 init_timer(&adapter->phy_info_timer);
4942 adapter->phy_info_timer.function = &e1000_update_phy_info;
4943 adapter->phy_info_timer.data = (unsigned long) adapter;
4944
4945 INIT_WORK(&adapter->reset_task, e1000_reset_task);
4946 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB
4947 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
4948 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
bc7f75fa 4949
bc7f75fa
AK
4950 /* Initialize link parameters. User can change them with ethtool */
4951 adapter->hw.mac.autoneg = 1;
309af40b 4952 adapter->fc_autoneg = 1;
5c48ef3e
BA
4953 adapter->hw.fc.requested_mode = e1000_fc_default;
4954 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK
4955 adapter->hw.phy.autoneg_advertised = 0x2f;
4956
4957 /* ring size defaults */
4958 adapter->rx_ring->count = 256;
4959 adapter->tx_ring->count = 256;
4960
4961 /*
4962 * Initial Wake on LAN setting - If APM wake is enabled in
4963 * the EEPROM, enable the ACPI Magic Packet filter
4964 */
4965 if (adapter->flags & FLAG_APME_IN_WUC) {
4966 /* APME bit in EEPROM is mapped to WUC.APME */
4967 eeprom_data = er32(WUC);
4968 eeprom_apme_mask = E1000_WUC_APME;
4969 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
4970 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
4971 (adapter->hw.bus.func == 1))
4972 e1000_read_nvm(&adapter->hw,
4973 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
4974 else
4975 e1000_read_nvm(&adapter->hw,
4976 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
4977 }
4978
4979 /* fetch WoL from EEPROM */
4980 if (eeprom_data & eeprom_apme_mask)
4981 adapter->eeprom_wol |= E1000_WUFC_MAG;
4982
4983 /*
4984 * now that we have the eeprom settings, apply the special cases
4985 * where the eeprom may be wrong or the board simply won't support
4986 * wake on lan on a particular port
4987 */
4988 if (!(adapter->flags & FLAG_HAS_WOL))
4989 adapter->eeprom_wol = 0;
4990
4991 /* initialize the wol settings based on the eeprom settings */
4992 adapter->wol = adapter->eeprom_wol;
6ff68026 4993 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 4994
84527590
BA
4995 /* save off EEPROM version number */
4996 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
4997
bc7f75fa
AK
4998 /* reset the hardware with the new settings */
4999 e1000e_reset(adapter);
5000
ad68076e
BA
5001 /*
5002 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5003 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
5004 * under the control of the driver.
5005 */
c43bc57e 5006 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
5007 e1000_get_hw_control(adapter);
5008
5009 /* tell the stack to leave us alone until e1000_open() is called */
5010 netif_carrier_off(netdev);
d55b53ff 5011 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK
5012
5013 strcpy(netdev->name, "eth%d");
5014 err = register_netdev(netdev);
5015 if (err)
5016 goto err_register;
5017
5018 e1000_print_device_info(adapter);
5019
5020 return 0;
5021
5022err_register:
c43bc57e
JB
5023 if (!(adapter->flags & FLAG_HAS_AMT))
5024 e1000_release_hw_control(adapter);
bc7f75fa
AK
5025err_eeprom:
5026 if (!e1000_check_reset_block(&adapter->hw))
5027 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5028err_hw_init:
bc7f75fa 5029
bc7f75fa
AK
5030 kfree(adapter->tx_ring);
5031 kfree(adapter->rx_ring);
5032err_sw_init:
c43bc57e
JB
5033 if (adapter->hw.flash_address)
5034 iounmap(adapter->hw.flash_address);
e82f54ba 5035 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5036err_flashmap:
bc7f75fa
AK
5037 iounmap(adapter->hw.hw_addr);
5038err_ioremap:
5039 free_netdev(netdev);
5040err_alloc_etherdev:
f0f422e5
BA
5041 pci_release_selected_regions(pdev,
5042 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK
5043err_pci_reg:
5044err_dma:
5045 pci_disable_device(pdev);
5046 return err;
5047}
5048
5049/**
5050 * e1000_remove - Device Removal Routine
5051 * @pdev: PCI device information struct
5052 *
5053 * e1000_remove is called by the PCI subsystem to alert the driver
5054 * that it should release a PCI device. The could be caused by a
5055 * Hot-Plug event, or because the driver is going to be removed from
5056 * memory.
5057 **/
5058static void __devexit e1000_remove(struct pci_dev *pdev)
5059{
5060 struct net_device *netdev = pci_get_drvdata(pdev);
5061 struct e1000_adapter *adapter = netdev_priv(netdev);
111b9dc5 5062 int err;
bc7f75fa 5063
ad68076e
BA
5064 /*
5065 * flush_scheduled work may reschedule our watchdog task, so
5066 * explicitly disable watchdog tasks from being rescheduled
5067 */
bc7f75fa
AK
5068 set_bit(__E1000_DOWN, &adapter->state);
5069 del_timer_sync(&adapter->watchdog_timer);
5070 del_timer_sync(&adapter->phy_info_timer);
5071
5072 flush_scheduled_work();
5073
ad68076e
BA
5074 /*
5075 * Release control of h/w to f/w. If f/w is AMT enabled, this
5076 * would have already happened in close and is redundant.
5077 */
bc7f75fa
AK
5078 e1000_release_hw_control(adapter);
5079
5080 unregister_netdev(netdev);
5081
5082 if (!e1000_check_reset_block(&adapter->hw))
5083 e1000_phy_hw_reset(&adapter->hw);
5084
4662e82b 5085 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK
5086 kfree(adapter->tx_ring);
5087 kfree(adapter->rx_ring);
5088
5089 iounmap(adapter->hw.hw_addr);
5090 if (adapter->hw.flash_address)
5091 iounmap(adapter->hw.flash_address);
f0f422e5
BA
5092 pci_release_selected_regions(pdev,
5093 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK
5094
5095 free_netdev(netdev);
5096
111b9dc5
JB
5097 /* AER disable */
5098 err = pci_disable_pcie_error_reporting(pdev);
5099 if (err)
5100 dev_err(&pdev->dev,
5101 "pci_disable_pcie_error_reporting failed 0x%x\n", err);
5102
bc7f75fa
AK
5103 pci_disable_device(pdev);
5104}
5105
5106/* PCI Error Recovery (ERS) */
5107static struct pci_error_handlers e1000_err_handler = {
5108 .error_detected = e1000_io_error_detected,
5109 .slot_reset = e1000_io_slot_reset,
5110 .resume = e1000_io_resume,
5111};
5112
5113static struct pci_device_id e1000_pci_tbl[] = {
bc7f75fa
AK
5114 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5115 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5116 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5117 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5118 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5119 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK
5120 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5121 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5122 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5123
bc7f75fa
AK
5124 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5125 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5126 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5127 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5128
bc7f75fa
AK
5129 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5130 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5131 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5132
4662e82b 5133 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5134 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5135 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5136
bc7f75fa
AK
5137 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5138 board_80003es2lan },
5139 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5140 board_80003es2lan },
5141 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5142 board_80003es2lan },
5143 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5144 board_80003es2lan },
ad68076e 5145
bc7f75fa
AK
5146 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5147 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5148 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5149 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5150 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5151 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5152 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
ad68076e 5153
bc7f75fa
AK
5154 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5155 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5156 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5157 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5158 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5159 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA
5160 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5161 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5162 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5163
5164 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5165 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5166 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5167
f4187b56
BA
5168 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5169 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5170
bc7f75fa
AK
5171 { } /* terminate list */
5172};
5173MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5174
5175/* PCI Device API Driver */
5176static struct pci_driver e1000_driver = {
5177 .name = e1000e_driver_name,
5178 .id_table = e1000_pci_tbl,
5179 .probe = e1000_probe,
5180 .remove = __devexit_p(e1000_remove),
5181#ifdef CONFIG_PM
ad68076e 5182 /* Power Management Hooks */
bc7f75fa
AK
5183 .suspend = e1000_suspend,
5184 .resume = e1000_resume,
5185#endif
5186 .shutdown = e1000_shutdown,
5187 .err_handler = &e1000_err_handler
5188};
5189
5190/**
5191 * e1000_init_module - Driver Registration Routine
5192 *
5193 * e1000_init_module is the first routine called when the driver is
5194 * loaded. All it does is register with the PCI subsystem.
5195 **/
5196static int __init e1000_init_module(void)
5197{
5198 int ret;
5199 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5200 e1000e_driver_name, e1000e_driver_version);
ad68076e 5201 printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n",
bc7f75fa
AK
5202 e1000e_driver_name);
5203 ret = pci_register_driver(&e1000_driver);
97ac8cae
BA
5204 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name,
5205 PM_QOS_DEFAULT_VALUE);
5206
bc7f75fa
AK
5207 return ret;
5208}
5209module_init(e1000_init_module);
5210
5211/**
5212 * e1000_exit_module - Driver Exit Cleanup Routine
5213 *
5214 * e1000_exit_module is called just before the driver is removed
5215 * from memory.
5216 **/
5217static void __exit e1000_exit_module(void)
5218{
5219 pci_unregister_driver(&e1000_driver);
97ac8cae 5220 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name);
bc7f75fa
AK
5221}
5222module_exit(e1000_exit_module);
5223
5224
5225MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5226MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5227MODULE_LICENSE("GPL");
5228MODULE_VERSION(DRV_VERSION);
5229
5230/* e1000_main.c */