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[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
23606cf5 47#include <linux/pm_runtime.h>
111b9dc5 48#include <linux/aer.h>
bc7f75fa
AK		 49
50#include "e1000.h"
51
3be8c940 52#define DRV_VERSION "1.0.2-k2"
bc7f75fa
AK		 53char e1000e_driver_name[] = "e1000e";
54const char e1000e_driver_version[] = DRV_VERSION;
55
56static const struct e1000_info *e1000_info_tbl[] = {
57 [board_82571] = &e1000_82571_info,
58 [board_82572] = &e1000_82572_info,
59 [board_82573] = &e1000_82573_info,
4662e82b 60 [board_82574] = &e1000_82574_info,
8c81c9c3 61 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 62 [board_80003es2lan] = &e1000_es2_info,
63 [board_ich8lan] = &e1000_ich8_info,
64 [board_ich9lan] = &e1000_ich9_info,
f4187b56 65 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 66 [board_pchlan] = &e1000_pch_info,
bc7f75fa
AK		 67};
68
bc7f75fa
AK		 69/**
70 * e1000_desc_unused - calculate if we have unused descriptors
71 **/
72static int e1000_desc_unused(struct e1000_ring *ring)
73{
74 if (ring->next_to_clean > ring->next_to_use)
75 return ring->next_to_clean - ring->next_to_use - 1;
76
77 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
78}
79
80/**
ad68076e 81 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 82 * @adapter: board private structure
83 * @status: descriptor status field as written by hardware
84 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
85 * @skb: pointer to sk_buff to be indicated to stack
86 **/
87static void e1000_receive_skb(struct e1000_adapter *adapter,
88 struct net_device *netdev,
89 struct sk_buff *skb,
a39fe742 90 u8 status, __le16 vlan)
bc7f75fa
AK		 91{
92 skb->protocol = eth_type_trans(skb, netdev);
93
94 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 95 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
96 le16_to_cpu(vlan), skb);
bc7f75fa 97 else
89c88b16 98 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 99}
100
101/**
102 * e1000_rx_checksum - Receive Checksum Offload for 82543
103 * @adapter: board private structure
104 * @status_err: receive descriptor status and error fields
105 * @csum: receive descriptor csum field
106 * @sk_buff: socket buffer with received data
107 **/
108static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
109 u32 csum, struct sk_buff *skb)
110{
111 u16 status = (u16)status_err;
112 u8 errors = (u8)(status_err >> 24);
113 skb->ip_summed = CHECKSUM_NONE;
114
115 /* Ignore Checksum bit is set */
116 if (status & E1000_RXD_STAT_IXSM)
117 return;
118 /* TCP/UDP checksum error bit is set */
119 if (errors & E1000_RXD_ERR_TCPE) {
120 /* let the stack verify checksum errors */
121 adapter->hw_csum_err++;
122 return;
123 }
124
125 /* TCP/UDP Checksum has not been calculated */
126 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
127 return;
128
129 /* It must be a TCP or UDP packet with a valid checksum */
130 if (status & E1000_RXD_STAT_TCPCS) {
131 /* TCP checksum is good */
132 skb->ip_summed = CHECKSUM_UNNECESSARY;
133 } else {
ad68076e
BA		 134 /*
135 * IP fragment with UDP payload
136 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 137 * and then put the value in host order for further stack use.
138 */
a39fe742
AV		 139 __sum16 sum = (__force __sum16)htons(csum);
140 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 141 skb->ip_summed = CHECKSUM_COMPLETE;
142 }
143 adapter->hw_csum_good++;
144}
145
146/**
147 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
148 * @adapter: address of board private structure
149 **/
150static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
151 int cleaned_count)
152{
153 struct net_device *netdev = adapter->netdev;
154 struct pci_dev *pdev = adapter->pdev;
155 struct e1000_ring *rx_ring = adapter->rx_ring;
156 struct e1000_rx_desc *rx_desc;
157 struct e1000_buffer *buffer_info;
158 struct sk_buff *skb;
159 unsigned int i;
89d71a66 160 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 161
162 i = rx_ring->next_to_use;
163 buffer_info = &rx_ring->buffer_info[i];
164
165 while (cleaned_count--) {
166 skb = buffer_info->skb;
167 if (skb) {
168 skb_trim(skb, 0);
169 goto map_skb;
170 }
171
89d71a66 172 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 173 if (!skb) {
174 /* Better luck next round */
175 adapter->alloc_rx_buff_failed++;
176 break;
177 }
178
bc7f75fa
AK		 179 buffer_info->skb = skb;
180map_skb:
181 buffer_info->dma = pci_map_single(pdev, skb->data,
182 adapter->rx_buffer_len,
183 PCI_DMA_FROMDEVICE);
8d8bb39b 184 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 185 dev_err(&pdev->dev, "RX DMA map failed\n");
186 adapter->rx_dma_failed++;
187 break;
188 }
189
190 rx_desc = E1000_RX_DESC(*rx_ring, i);
191 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
192
193 i++;
194 if (i == rx_ring->count)
195 i = 0;
196 buffer_info = &rx_ring->buffer_info[i];
197 }
198
199 if (rx_ring->next_to_use != i) {
200 rx_ring->next_to_use = i;
201 if (i-- == 0)
202 i = (rx_ring->count - 1);
203
ad68076e
BA		 204 /*
205 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 206 * know there are new descriptors to fetch. (Only
207 * applicable for weak-ordered memory model archs,
ad68076e
BA		 208 * such as IA-64).
209 */
bc7f75fa
AK		 210 wmb();
211 writel(i, adapter->hw.hw_addr + rx_ring->tail);
212 }
213}
214
215/**
216 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
217 * @adapter: address of board private structure
218 **/
219static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
220 int cleaned_count)
221{
222 struct net_device *netdev = adapter->netdev;
223 struct pci_dev *pdev = adapter->pdev;
224 union e1000_rx_desc_packet_split *rx_desc;
225 struct e1000_ring *rx_ring = adapter->rx_ring;
226 struct e1000_buffer *buffer_info;
227 struct e1000_ps_page *ps_page;
228 struct sk_buff *skb;
229 unsigned int i, j;
230
231 i = rx_ring->next_to_use;
232 buffer_info = &rx_ring->buffer_info[i];
233
234 while (cleaned_count--) {
235 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
236
237 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 238 ps_page = &buffer_info->ps_pages[j];
239 if (j >= adapter->rx_ps_pages) {
240 /* all unused desc entries get hw null ptr */
a39fe742 241 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 242 continue;
243 }
244 if (!ps_page->page) {
245 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 246 if (!ps_page->page) {
47f44e40
AK		 247 adapter->alloc_rx_buff_failed++;
248 goto no_buffers;
249 }
250 ps_page->dma = pci_map_page(pdev,
251 ps_page->page,
252 0, PAGE_SIZE,
253 PCI_DMA_FROMDEVICE);
8d8bb39b 254 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 255 dev_err(&adapter->pdev->dev,
256 "RX DMA page map failed\n");
257 adapter->rx_dma_failed++;
258 goto no_buffers;
bc7f75fa 259 }
bc7f75fa 260 }
47f44e40
AK		 261 /*
262 * Refresh the desc even if buffer_addrs
263 * didn't change because each write-back
264 * erases this info.
265 */
266 rx_desc->read.buffer_addr[j+1] =
267 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 268 }
269
89d71a66
ED		 270 skb = netdev_alloc_skb_ip_align(netdev,
271 adapter->rx_ps_bsize0);
bc7f75fa
AK		 272
273 if (!skb) {
274 adapter->alloc_rx_buff_failed++;
275 break;
276 }
277
bc7f75fa
AK		 278 buffer_info->skb = skb;
279 buffer_info->dma = pci_map_single(pdev, skb->data,
280 adapter->rx_ps_bsize0,
281 PCI_DMA_FROMDEVICE);
8d8bb39b 282 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 283 dev_err(&pdev->dev, "RX DMA map failed\n");
284 adapter->rx_dma_failed++;
285 /* cleanup skb */
286 dev_kfree_skb_any(skb);
287 buffer_info->skb = NULL;
288 break;
289 }
290
291 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
292
293 i++;
294 if (i == rx_ring->count)
295 i = 0;
296 buffer_info = &rx_ring->buffer_info[i];
297 }
298
299no_buffers:
300 if (rx_ring->next_to_use != i) {
301 rx_ring->next_to_use = i;
302
303 if (!(i--))
304 i = (rx_ring->count - 1);
305
ad68076e
BA		 306 /*
307 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 308 * know there are new descriptors to fetch. (Only
309 * applicable for weak-ordered memory model archs,
ad68076e
BA		 310 * such as IA-64).
311 */
bc7f75fa 312 wmb();
ad68076e
BA		 313 /*
314 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 315 * descriptors are 32 bytes...so we increment tail
316 * twice as much.
317 */
318 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
319 }
320}
321
97ac8cae
BA		 322/**
323 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
324 * @adapter: address of board private structure
97ac8cae
BA		 325 * @cleaned_count: number of buffers to allocate this pass
326 **/
327
328static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
329 int cleaned_count)
330{
331 struct net_device *netdev = adapter->netdev;
332 struct pci_dev *pdev = adapter->pdev;
333 struct e1000_rx_desc *rx_desc;
334 struct e1000_ring *rx_ring = adapter->rx_ring;
335 struct e1000_buffer *buffer_info;
336 struct sk_buff *skb;
337 unsigned int i;
89d71a66 338 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 339
340 i = rx_ring->next_to_use;
341 buffer_info = &rx_ring->buffer_info[i];
342
343 while (cleaned_count--) {
344 skb = buffer_info->skb;
345 if (skb) {
346 skb_trim(skb, 0);
347 goto check_page;
348 }
349
89d71a66 350 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 351 if (unlikely(!skb)) {
352 /* Better luck next round */
353 adapter->alloc_rx_buff_failed++;
354 break;
355 }
356
97ac8cae
BA		 357 buffer_info->skb = skb;
358check_page:
359 /* allocate a new page if necessary */
360 if (!buffer_info->page) {
361 buffer_info->page = alloc_page(GFP_ATOMIC);
362 if (unlikely(!buffer_info->page)) {
363 adapter->alloc_rx_buff_failed++;
364 break;
365 }
366 }
367
368 if (!buffer_info->dma)
369 buffer_info->dma = pci_map_page(pdev,
370 buffer_info->page, 0,
371 PAGE_SIZE,
372 PCI_DMA_FROMDEVICE);
373
374 rx_desc = E1000_RX_DESC(*rx_ring, i);
375 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
376
377 if (unlikely(++i == rx_ring->count))
378 i = 0;
379 buffer_info = &rx_ring->buffer_info[i];
380 }
381
382 if (likely(rx_ring->next_to_use != i)) {
383 rx_ring->next_to_use = i;
384 if (unlikely(i-- == 0))
385 i = (rx_ring->count - 1);
386
387 /* Force memory writes to complete before letting h/w
388 * know there are new descriptors to fetch. (Only
389 * applicable for weak-ordered memory model archs,
390 * such as IA-64). */
391 wmb();
392 writel(i, adapter->hw.hw_addr + rx_ring->tail);
393 }
394}
395
bc7f75fa
AK		 396/**
397 * e1000_clean_rx_irq - Send received data up the network stack; legacy
398 * @adapter: board private structure
399 *
400 * the return value indicates whether actual cleaning was done, there
401 * is no guarantee that everything was cleaned
402 **/
403static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
404 int *work_done, int work_to_do)
405{
406 struct net_device *netdev = adapter->netdev;
407 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 408 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 409 struct e1000_ring *rx_ring = adapter->rx_ring;
410 struct e1000_rx_desc *rx_desc, *next_rxd;
411 struct e1000_buffer *buffer_info, *next_buffer;
412 u32 length;
413 unsigned int i;
414 int cleaned_count = 0;
415 bool cleaned = 0;
416 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
417
418 i = rx_ring->next_to_clean;
419 rx_desc = E1000_RX_DESC(*rx_ring, i);
420 buffer_info = &rx_ring->buffer_info[i];
421
422 while (rx_desc->status & E1000_RXD_STAT_DD) {
423 struct sk_buff *skb;
424 u8 status;
425
426 if (*work_done >= work_to_do)
427 break;
428 (*work_done)++;
429
430 status = rx_desc->status;
431 skb = buffer_info->skb;
432 buffer_info->skb = NULL;
433
434 prefetch(skb->data - NET_IP_ALIGN);
435
436 i++;
437 if (i == rx_ring->count)
438 i = 0;
439 next_rxd = E1000_RX_DESC(*rx_ring, i);
440 prefetch(next_rxd);
441
442 next_buffer = &rx_ring->buffer_info[i];
443
444 cleaned = 1;
445 cleaned_count++;
446 pci_unmap_single(pdev,
447 buffer_info->dma,
448 adapter->rx_buffer_len,
449 PCI_DMA_FROMDEVICE);
450 buffer_info->dma = 0;
451
452 length = le16_to_cpu(rx_desc->length);
453
b94b5028
JB		 454 /*
455 * !EOP means multiple descriptors were used to store a single
456 * packet, if that's the case we need to toss it. In fact, we
457 * need to toss every packet with the EOP bit clear and the
458 * next frame that _does_ have the EOP bit set, as it is by
459 * definition only a frame fragment
460 */
461 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
462 adapter->flags2 |= FLAG2_IS_DISCARDING;
463
464 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 465 /* All receives must fit into a single buffer */
3bb99fe2 466 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 467 /* recycle */
468 buffer_info->skb = skb;
b94b5028
JB		 469 if (status & E1000_RXD_STAT_EOP)
470 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 471 goto next_desc;
472 }
473
474 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
475 /* recycle */
476 buffer_info->skb = skb;
477 goto next_desc;
478 }
479
eb7c3adb
JK		 480 /* adjust length to remove Ethernet CRC */
481 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
482 length -= 4;
483
bc7f75fa
AK		 484 total_rx_bytes += length;
485 total_rx_packets++;
486
ad68076e
BA		 487 /*
488 * code added for copybreak, this should improve
bc7f75fa 489 * performance for small packets with large amounts
ad68076e
BA		 490 * of reassembly being done in the stack
491 */
bc7f75fa
AK		 492 if (length < copybreak) {
493 struct sk_buff *new_skb =
89d71a66 494 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 495 if (new_skb) {
808ff676
BA		 496 skb_copy_to_linear_data_offset(new_skb,
497 -NET_IP_ALIGN,
498 (skb->data -
499 NET_IP_ALIGN),
500 (length +
501 NET_IP_ALIGN));
bc7f75fa
AK		 502 /* save the skb in buffer_info as good */
503 buffer_info->skb = skb;
504 skb = new_skb;
505 }
506 /* else just continue with the old one */
507 }
508 /* end copybreak code */
509 skb_put(skb, length);
510
511 /* Receive Checksum Offload */
512 e1000_rx_checksum(adapter,
513 (u32)(status) |
514 ((u32)(rx_desc->errors) << 24),
515 le16_to_cpu(rx_desc->csum), skb);
516
517 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
518
519next_desc:
520 rx_desc->status = 0;
521
522 /* return some buffers to hardware, one at a time is too slow */
523 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
524 adapter->alloc_rx_buf(adapter, cleaned_count);
525 cleaned_count = 0;
526 }
527
528 /* use prefetched values */
529 rx_desc = next_rxd;
530 buffer_info = next_buffer;
531 }
532 rx_ring->next_to_clean = i;
533
534 cleaned_count = e1000_desc_unused(rx_ring);
535 if (cleaned_count)
536 adapter->alloc_rx_buf(adapter, cleaned_count);
537
bc7f75fa 538 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 539 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 540 netdev->stats.rx_bytes += total_rx_bytes;
541 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 542 return cleaned;
543}
544
bc7f75fa
AK		 545static void e1000_put_txbuf(struct e1000_adapter *adapter,
546 struct e1000_buffer *buffer_info)
547{
03b1320d
AD		 548 if (buffer_info->dma) {
549 if (buffer_info->mapped_as_page)
550 pci_unmap_page(adapter->pdev, buffer_info->dma,
551 buffer_info->length, PCI_DMA_TODEVICE);
552 else
553 pci_unmap_single(adapter->pdev, buffer_info->dma,
554 buffer_info->length,
555 PCI_DMA_TODEVICE);
556 buffer_info->dma = 0;
557 }
bc7f75fa
AK		 558 if (buffer_info->skb) {
559 dev_kfree_skb_any(buffer_info->skb);
560 buffer_info->skb = NULL;
561 }
1b7719c4 562 buffer_info->time_stamp = 0;
bc7f75fa
AK		 563}
564
41cec6f1 565static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 566{
41cec6f1
BA		 567 struct e1000_adapter *adapter = container_of(work,
568 struct e1000_adapter,
569 print_hang_task);
bc7f75fa
AK		 570 struct e1000_ring *tx_ring = adapter->tx_ring;
571 unsigned int i = tx_ring->next_to_clean;
572 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
573 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 574 struct e1000_hw *hw = &adapter->hw;
575 u16 phy_status, phy_1000t_status, phy_ext_status;
576 u16 pci_status;
577
578 e1e_rphy(hw, PHY_STATUS, &phy_status);
579 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
580 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 581
41cec6f1
BA		 582 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
583
584 /* detected Hardware unit hang */
585 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 586 " TDH <%x>\n"
587 " TDT <%x>\n"
588 " next_to_use <%x>\n"
589 " next_to_clean <%x>\n"
590 "buffer_info[next_to_clean]:\n"
591 " time_stamp <%lx>\n"
592 " next_to_watch <%x>\n"
593 " jiffies <%lx>\n"
41cec6f1
BA		 594 " next_to_watch.status <%x>\n"
595 "MAC Status <%x>\n"
596 "PHY Status <%x>\n"
597 "PHY 1000BASE-T Status <%x>\n"
598 "PHY Extended Status <%x>\n"
599 "PCI Status <%x>\n",
44defeb3
JK		 600 readl(adapter->hw.hw_addr + tx_ring->head),
601 readl(adapter->hw.hw_addr + tx_ring->tail),
602 tx_ring->next_to_use,
603 tx_ring->next_to_clean,
604 tx_ring->buffer_info[eop].time_stamp,
605 eop,
606 jiffies,
41cec6f1
BA		 607 eop_desc->upper.fields.status,
608 er32(STATUS),
609 phy_status,
610 phy_1000t_status,
611 phy_ext_status,
612 pci_status);
bc7f75fa
AK		 613}
614
615/**
616 * e1000_clean_tx_irq - Reclaim resources after transmit completes
617 * @adapter: board private structure
618 *
619 * the return value indicates whether actual cleaning was done, there
620 * is no guarantee that everything was cleaned
621 **/
622static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
623{
624 struct net_device *netdev = adapter->netdev;
625 struct e1000_hw *hw = &adapter->hw;
626 struct e1000_ring *tx_ring = adapter->tx_ring;
627 struct e1000_tx_desc *tx_desc, *eop_desc;
628 struct e1000_buffer *buffer_info;
629 unsigned int i, eop;
630 unsigned int count = 0;
bc7f75fa
AK		 631 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
632
633 i = tx_ring->next_to_clean;
634 eop = tx_ring->buffer_info[i].next_to_watch;
635 eop_desc = E1000_TX_DESC(*tx_ring, eop);
636
12d04a3c
AD		 637 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
638 (count < tx_ring->count)) {
a86043c2
JB		 639 bool cleaned = false;
640 for (; !cleaned; count++) {
bc7f75fa
AK		 641 tx_desc = E1000_TX_DESC(*tx_ring, i);
642 buffer_info = &tx_ring->buffer_info[i];
643 cleaned = (i == eop);
644
645 if (cleaned) {
646 struct sk_buff *skb = buffer_info->skb;
647 unsigned int segs, bytecount;
648 segs = skb_shinfo(skb)->gso_segs ?: 1;
649 /* multiply data chunks by size of headers */
650 bytecount = ((segs - 1) * skb_headlen(skb)) +
651 skb->len;
652 total_tx_packets += segs;
653 total_tx_bytes += bytecount;
654 }
655
656 e1000_put_txbuf(adapter, buffer_info);
657 tx_desc->upper.data = 0;
658
659 i++;
660 if (i == tx_ring->count)
661 i = 0;
662 }
663
664 eop = tx_ring->buffer_info[i].next_to_watch;
665 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 666 }
667
668 tx_ring->next_to_clean = i;
669
670#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 671 if (count && netif_carrier_ok(netdev) &&
672 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 673 /* Make sure that anybody stopping the queue after this
674 * sees the new next_to_clean.
675 */
676 smp_mb();
677
678 if (netif_queue_stopped(netdev) &&
679 !(test_bit(__E1000_DOWN, &adapter->state))) {
680 netif_wake_queue(netdev);
681 ++adapter->restart_queue;
682 }
683 }
684
685 if (adapter->detect_tx_hung) {
41cec6f1
BA		 686 /*
687 * Detect a transmit hang in hardware, this serializes the
688 * check with the clearing of time_stamp and movement of i
689 */
bc7f75fa 690 adapter->detect_tx_hung = 0;
12d04a3c
AD		 691 if (tx_ring->buffer_info[i].time_stamp &&
692 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 693 + (adapter->tx_timeout_factor * HZ)) &&
694 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 695 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 696 netif_stop_queue(netdev);
697 }
698 }
699 adapter->total_tx_bytes += total_tx_bytes;
700 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 701 netdev->stats.tx_bytes += total_tx_bytes;
702 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 703 return (count < tx_ring->count);
bc7f75fa
AK		 704}
705
bc7f75fa
AK		 706/**
707 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
708 * @adapter: board private structure
709 *
710 * the return value indicates whether actual cleaning was done, there
711 * is no guarantee that everything was cleaned
712 **/
713static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
714 int *work_done, int work_to_do)
715{
3bb99fe2 716 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 717 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
718 struct net_device *netdev = adapter->netdev;
719 struct pci_dev *pdev = adapter->pdev;
720 struct e1000_ring *rx_ring = adapter->rx_ring;
721 struct e1000_buffer *buffer_info, *next_buffer;
722 struct e1000_ps_page *ps_page;
723 struct sk_buff *skb;
724 unsigned int i, j;
725 u32 length, staterr;
726 int cleaned_count = 0;
727 bool cleaned = 0;
728 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
729
730 i = rx_ring->next_to_clean;
731 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
732 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
733 buffer_info = &rx_ring->buffer_info[i];
734
735 while (staterr & E1000_RXD_STAT_DD) {
736 if (*work_done >= work_to_do)
737 break;
738 (*work_done)++;
739 skb = buffer_info->skb;
740
741 /* in the packet split case this is header only */
742 prefetch(skb->data - NET_IP_ALIGN);
743
744 i++;
745 if (i == rx_ring->count)
746 i = 0;
747 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
748 prefetch(next_rxd);
749
750 next_buffer = &rx_ring->buffer_info[i];
751
752 cleaned = 1;
753 cleaned_count++;
754 pci_unmap_single(pdev, buffer_info->dma,
755 adapter->rx_ps_bsize0,
756 PCI_DMA_FROMDEVICE);
757 buffer_info->dma = 0;
758
b94b5028
JB		 759 /* see !EOP comment in other rx routine */
760 if (!(staterr & E1000_RXD_STAT_EOP))
761 adapter->flags2 |= FLAG2_IS_DISCARDING;
762
763 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 764 e_dbg("Packet Split buffers didn't pick up the full "
765 "packet\n");
bc7f75fa 766 dev_kfree_skb_irq(skb);
b94b5028
JB		 767 if (staterr & E1000_RXD_STAT_EOP)
768 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 769 goto next_desc;
770 }
771
772 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
773 dev_kfree_skb_irq(skb);
774 goto next_desc;
775 }
776
777 length = le16_to_cpu(rx_desc->wb.middle.length0);
778
779 if (!length) {
3bb99fe2
BA		 780 e_dbg("Last part of the packet spanning multiple "
781 "descriptors\n");
bc7f75fa
AK		 782 dev_kfree_skb_irq(skb);
783 goto next_desc;
784 }
785
786 /* Good Receive */
787 skb_put(skb, length);
788
789 {
ad68076e
BA		 790 /*
791 * this looks ugly, but it seems compiler issues make it
792 * more efficient than reusing j
793 */
bc7f75fa
AK		 794 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
795
ad68076e
BA		 796 /*
797 * page alloc/put takes too long and effects small packet
798 * throughput, so unsplit small packets and save the alloc/put
799 * only valid in softirq (napi) context to call kmap_*
800 */
bc7f75fa
AK		 801 if (l1 && (l1 <= copybreak) &&
802 ((length + l1) <= adapter->rx_ps_bsize0)) {
803 u8 *vaddr;
804
47f44e40 805 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 806
ad68076e
BA		 807 /*
808 * there is no documentation about how to call
bc7f75fa 809 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 810 * very long
811 */
bc7f75fa
AK		 812 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
813 PAGE_SIZE, PCI_DMA_FROMDEVICE);
814 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
815 memcpy(skb_tail_pointer(skb), vaddr, l1);
816 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
817 pci_dma_sync_single_for_device(pdev, ps_page->dma,
818 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 819
eb7c3adb
JK		 820 /* remove the CRC */
821 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
822 l1 -= 4;
823
bc7f75fa
AK		 824 skb_put(skb, l1);
825 goto copydone;
826 } /* if */
827 }
828
829 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
830 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
831 if (!length)
832 break;
833
47f44e40 834 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 835 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
836 PCI_DMA_FROMDEVICE);
837 ps_page->dma = 0;
838 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
839 ps_page->page = NULL;
840 skb->len += length;
841 skb->data_len += length;
842 skb->truesize += length;
843 }
844
eb7c3adb
JK		 845 /* strip the ethernet crc, problem is we're using pages now so
846 * this whole operation can get a little cpu intensive
847 */
848 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
849 pskb_trim(skb, skb->len - 4);
850
bc7f75fa
AK		 851copydone:
852 total_rx_bytes += skb->len;
853 total_rx_packets++;
854
855 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
856 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
857
858 if (rx_desc->wb.upper.header_status &
859 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
860 adapter->rx_hdr_split++;
861
862 e1000_receive_skb(adapter, netdev, skb,
863 staterr, rx_desc->wb.middle.vlan);
864
865next_desc:
866 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
867 buffer_info->skb = NULL;
868
869 /* return some buffers to hardware, one at a time is too slow */
870 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
871 adapter->alloc_rx_buf(adapter, cleaned_count);
872 cleaned_count = 0;
873 }
874
875 /* use prefetched values */
876 rx_desc = next_rxd;
877 buffer_info = next_buffer;
878
879 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
880 }
881 rx_ring->next_to_clean = i;
882
883 cleaned_count = e1000_desc_unused(rx_ring);
884 if (cleaned_count)
885 adapter->alloc_rx_buf(adapter, cleaned_count);
886
bc7f75fa 887 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 888 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 889 netdev->stats.rx_bytes += total_rx_bytes;
890 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 891 return cleaned;
892}
893
97ac8cae
BA		 894/**
895 * e1000_consume_page - helper function
896 **/
897static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
898 u16 length)
899{
900 bi->page = NULL;
901 skb->len += length;
902 skb->data_len += length;
903 skb->truesize += length;
904}
905
906/**
907 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
908 * @adapter: board private structure
909 *
910 * the return value indicates whether actual cleaning was done, there
911 * is no guarantee that everything was cleaned
912 **/
913
914static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
915 int *work_done, int work_to_do)
916{
917 struct net_device *netdev = adapter->netdev;
918 struct pci_dev *pdev = adapter->pdev;
919 struct e1000_ring *rx_ring = adapter->rx_ring;
920 struct e1000_rx_desc *rx_desc, *next_rxd;
921 struct e1000_buffer *buffer_info, *next_buffer;
922 u32 length;
923 unsigned int i;
924 int cleaned_count = 0;
925 bool cleaned = false;
926 unsigned int total_rx_bytes=0, total_rx_packets=0;
927
928 i = rx_ring->next_to_clean;
929 rx_desc = E1000_RX_DESC(*rx_ring, i);
930 buffer_info = &rx_ring->buffer_info[i];
931
932 while (rx_desc->status & E1000_RXD_STAT_DD) {
933 struct sk_buff *skb;
934 u8 status;
935
936 if (*work_done >= work_to_do)
937 break;
938 (*work_done)++;
939
940 status = rx_desc->status;
941 skb = buffer_info->skb;
942 buffer_info->skb = NULL;
943
944 ++i;
945 if (i == rx_ring->count)
946 i = 0;
947 next_rxd = E1000_RX_DESC(*rx_ring, i);
948 prefetch(next_rxd);
949
950 next_buffer = &rx_ring->buffer_info[i];
951
952 cleaned = true;
953 cleaned_count++;
954 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
955 PCI_DMA_FROMDEVICE);
956 buffer_info->dma = 0;
957
958 length = le16_to_cpu(rx_desc->length);
959
960 /* errors is only valid for DD + EOP descriptors */
961 if (unlikely((status & E1000_RXD_STAT_EOP) &&
962 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
963 /* recycle both page and skb */
964 buffer_info->skb = skb;
965 /* an error means any chain goes out the window
966 * too */
967 if (rx_ring->rx_skb_top)
968 dev_kfree_skb(rx_ring->rx_skb_top);
969 rx_ring->rx_skb_top = NULL;
970 goto next_desc;
971 }
972
973#define rxtop rx_ring->rx_skb_top
974 if (!(status & E1000_RXD_STAT_EOP)) {
975 /* this descriptor is only the beginning (or middle) */
976 if (!rxtop) {
977 /* this is the beginning of a chain */
978 rxtop = skb;
979 skb_fill_page_desc(rxtop, 0, buffer_info->page,
980 0, length);
981 } else {
982 /* this is the middle of a chain */
983 skb_fill_page_desc(rxtop,
984 skb_shinfo(rxtop)->nr_frags,
985 buffer_info->page, 0, length);
986 /* re-use the skb, only consumed the page */
987 buffer_info->skb = skb;
988 }
989 e1000_consume_page(buffer_info, rxtop, length);
990 goto next_desc;
991 } else {
992 if (rxtop) {
993 /* end of the chain */
994 skb_fill_page_desc(rxtop,
995 skb_shinfo(rxtop)->nr_frags,
996 buffer_info->page, 0, length);
997 /* re-use the current skb, we only consumed the
998 * page */
999 buffer_info->skb = skb;
1000 skb = rxtop;
1001 rxtop = NULL;
1002 e1000_consume_page(buffer_info, skb, length);
1003 } else {
1004 /* no chain, got EOP, this buf is the packet
1005 * copybreak to save the put_page/alloc_page */
1006 if (length <= copybreak &&
1007 skb_tailroom(skb) >= length) {
1008 u8 *vaddr;
1009 vaddr = kmap_atomic(buffer_info->page,
1010 KM_SKB_DATA_SOFTIRQ);
1011 memcpy(skb_tail_pointer(skb), vaddr,
1012 length);
1013 kunmap_atomic(vaddr,
1014 KM_SKB_DATA_SOFTIRQ);
1015 /* re-use the page, so don't erase
1016 * buffer_info->page */
1017 skb_put(skb, length);
1018 } else {
1019 skb_fill_page_desc(skb, 0,
1020 buffer_info->page, 0,
1021 length);
1022 e1000_consume_page(buffer_info, skb,
1023 length);
1024 }
1025 }
1026 }
1027
1028 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1029 e1000_rx_checksum(adapter,
1030 (u32)(status) |
1031 ((u32)(rx_desc->errors) << 24),
1032 le16_to_cpu(rx_desc->csum), skb);
1033
1034 /* probably a little skewed due to removing CRC */
1035 total_rx_bytes += skb->len;
1036 total_rx_packets++;
1037
1038 /* eth type trans needs skb->data to point to something */
1039 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1040 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1041 dev_kfree_skb(skb);
1042 goto next_desc;
1043 }
1044
1045 e1000_receive_skb(adapter, netdev, skb, status,
1046 rx_desc->special);
1047
1048next_desc:
1049 rx_desc->status = 0;
1050
1051 /* return some buffers to hardware, one at a time is too slow */
1052 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1053 adapter->alloc_rx_buf(adapter, cleaned_count);
1054 cleaned_count = 0;
1055 }
1056
1057 /* use prefetched values */
1058 rx_desc = next_rxd;
1059 buffer_info = next_buffer;
1060 }
1061 rx_ring->next_to_clean = i;
1062
1063 cleaned_count = e1000_desc_unused(rx_ring);
1064 if (cleaned_count)
1065 adapter->alloc_rx_buf(adapter, cleaned_count);
1066
1067 adapter->total_rx_bytes += total_rx_bytes;
1068 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1069 netdev->stats.rx_bytes += total_rx_bytes;
1070 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1071 return cleaned;
1072}
1073
bc7f75fa
AK		 1074/**
1075 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1076 * @adapter: board private structure
1077 **/
1078static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1079{
1080 struct e1000_ring *rx_ring = adapter->rx_ring;
1081 struct e1000_buffer *buffer_info;
1082 struct e1000_ps_page *ps_page;
1083 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1084 unsigned int i, j;
1085
1086 /* Free all the Rx ring sk_buffs */
1087 for (i = 0; i < rx_ring->count; i++) {
1088 buffer_info = &rx_ring->buffer_info[i];
1089 if (buffer_info->dma) {
1090 if (adapter->clean_rx == e1000_clean_rx_irq)
1091 pci_unmap_single(pdev, buffer_info->dma,
1092 adapter->rx_buffer_len,
1093 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1094 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1095 pci_unmap_page(pdev, buffer_info->dma,
1096 PAGE_SIZE,
1097 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1098 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1099 pci_unmap_single(pdev, buffer_info->dma,
1100 adapter->rx_ps_bsize0,
1101 PCI_DMA_FROMDEVICE);
1102 buffer_info->dma = 0;
1103 }
1104
97ac8cae
BA		 1105 if (buffer_info->page) {
1106 put_page(buffer_info->page);
1107 buffer_info->page = NULL;
1108 }
1109
bc7f75fa
AK		 1110 if (buffer_info->skb) {
1111 dev_kfree_skb(buffer_info->skb);
1112 buffer_info->skb = NULL;
1113 }
1114
1115 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1116 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1117 if (!ps_page->page)
1118 break;
1119 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1120 PCI_DMA_FROMDEVICE);
1121 ps_page->dma = 0;
1122 put_page(ps_page->page);
1123 ps_page->page = NULL;
1124 }
1125 }
1126
1127 /* there also may be some cached data from a chained receive */
1128 if (rx_ring->rx_skb_top) {
1129 dev_kfree_skb(rx_ring->rx_skb_top);
1130 rx_ring->rx_skb_top = NULL;
1131 }
1132
bc7f75fa
AK		 1133 /* Zero out the descriptor ring */
1134 memset(rx_ring->desc, 0, rx_ring->size);
1135
1136 rx_ring->next_to_clean = 0;
1137 rx_ring->next_to_use = 0;
b94b5028 1138 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1139
1140 writel(0, adapter->hw.hw_addr + rx_ring->head);
1141 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1142}
1143
a8f88ff5
JB		 1144static void e1000e_downshift_workaround(struct work_struct *work)
1145{
1146 struct e1000_adapter *adapter = container_of(work,
1147 struct e1000_adapter, downshift_task);
1148
1149 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1150}
1151
bc7f75fa
AK		 1152/**
1153 * e1000_intr_msi - Interrupt Handler
1154 * @irq: interrupt number
1155 * @data: pointer to a network interface device structure
1156 **/
1157static irqreturn_t e1000_intr_msi(int irq, void *data)
1158{
1159 struct net_device *netdev = data;
1160 struct e1000_adapter *adapter = netdev_priv(netdev);
1161 struct e1000_hw *hw = &adapter->hw;
1162 u32 icr = er32(ICR);
1163
ad68076e
BA		 1164 /*
1165 * read ICR disables interrupts using IAM
1166 */
bc7f75fa 1167
573cca8c 1168 if (icr & E1000_ICR_LSC) {
bc7f75fa 1169 hw->mac.get_link_status = 1;
ad68076e
BA		 1170 /*
1171 * ICH8 workaround-- Call gig speed drop workaround on cable
1172 * disconnect (LSC) before accessing any PHY registers
1173 */
bc7f75fa
AK		 1174 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1175 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1176 schedule_work(&adapter->downshift_task);
bc7f75fa 1177
ad68076e
BA		 1178 /*
1179 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1180 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1181 * adapter in watchdog
1182 */
bc7f75fa
AK		 1183 if (netif_carrier_ok(netdev) &&
1184 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1185 /* disable receives */
1186 u32 rctl = er32(RCTL);
1187 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1188 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1189 }
1190 /* guard against interrupt when we're going down */
1191 if (!test_bit(__E1000_DOWN, &adapter->state))
1192 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1193 }
1194
288379f0 1195 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1196 adapter->total_tx_bytes = 0;
1197 adapter->total_tx_packets = 0;
1198 adapter->total_rx_bytes = 0;
1199 adapter->total_rx_packets = 0;
288379f0 1200 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1201 }
1202
1203 return IRQ_HANDLED;
1204}
1205
1206/**
1207 * e1000_intr - Interrupt Handler
1208 * @irq: interrupt number
1209 * @data: pointer to a network interface device structure
1210 **/
1211static irqreturn_t e1000_intr(int irq, void *data)
1212{
1213 struct net_device *netdev = data;
1214 struct e1000_adapter *adapter = netdev_priv(netdev);
1215 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1216 u32 rctl, icr = er32(ICR);
4662e82b 1217
a68ea775 1218 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1219 return IRQ_NONE; /* Not our interrupt */
1220
ad68076e
BA		 1221 /*
1222 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1223 * not set, then the adapter didn't send an interrupt
1224 */
bc7f75fa
AK		 1225 if (!(icr & E1000_ICR_INT_ASSERTED))
1226 return IRQ_NONE;
1227
ad68076e
BA		 1228 /*
1229 * Interrupt Auto-Mask...upon reading ICR,
1230 * interrupts are masked. No need for the
1231 * IMC write
1232 */
bc7f75fa 1233
573cca8c 1234 if (icr & E1000_ICR_LSC) {
bc7f75fa 1235 hw->mac.get_link_status = 1;
ad68076e
BA		 1236 /*
1237 * ICH8 workaround-- Call gig speed drop workaround on cable
1238 * disconnect (LSC) before accessing any PHY registers
1239 */
bc7f75fa
AK		 1240 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1241 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1242 schedule_work(&adapter->downshift_task);
bc7f75fa 1243
ad68076e
BA		 1244 /*
1245 * 80003ES2LAN workaround--
bc7f75fa
AK		 1246 * For packet buffer work-around on link down event;
1247 * disable receives here in the ISR and
1248 * reset adapter in watchdog
1249 */
1250 if (netif_carrier_ok(netdev) &&
1251 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1252 /* disable receives */
1253 rctl = er32(RCTL);
1254 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1255 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1256 }
1257 /* guard against interrupt when we're going down */
1258 if (!test_bit(__E1000_DOWN, &adapter->state))
1259 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1260 }
1261
288379f0 1262 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1263 adapter->total_tx_bytes = 0;
1264 adapter->total_tx_packets = 0;
1265 adapter->total_rx_bytes = 0;
1266 adapter->total_rx_packets = 0;
288379f0 1267 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1268 }
1269
1270 return IRQ_HANDLED;
1271}
1272
4662e82b
BA		 1273static irqreturn_t e1000_msix_other(int irq, void *data)
1274{
1275 struct net_device *netdev = data;
1276 struct e1000_adapter *adapter = netdev_priv(netdev);
1277 struct e1000_hw *hw = &adapter->hw;
1278 u32 icr = er32(ICR);
1279
1280 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1281 if (!test_bit(__E1000_DOWN, &adapter->state))
1282 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1283 return IRQ_NONE;
1284 }
1285
1286 if (icr & adapter->eiac_mask)
1287 ew32(ICS, (icr & adapter->eiac_mask));
1288
1289 if (icr & E1000_ICR_OTHER) {
1290 if (!(icr & E1000_ICR_LSC))
1291 goto no_link_interrupt;
1292 hw->mac.get_link_status = 1;
1293 /* guard against interrupt when we're going down */
1294 if (!test_bit(__E1000_DOWN, &adapter->state))
1295 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1296 }
1297
1298no_link_interrupt:
a3c69fef
JB		 1299 if (!test_bit(__E1000_DOWN, &adapter->state))
1300 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1301
1302 return IRQ_HANDLED;
1303}
1304
1305
1306static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1307{
1308 struct net_device *netdev = data;
1309 struct e1000_adapter *adapter = netdev_priv(netdev);
1310 struct e1000_hw *hw = &adapter->hw;
1311 struct e1000_ring *tx_ring = adapter->tx_ring;
1312
1313
1314 adapter->total_tx_bytes = 0;
1315 adapter->total_tx_packets = 0;
1316
1317 if (!e1000_clean_tx_irq(adapter))
1318 /* Ring was not completely cleaned, so fire another interrupt */
1319 ew32(ICS, tx_ring->ims_val);
1320
1321 return IRQ_HANDLED;
1322}
1323
1324static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1325{
1326 struct net_device *netdev = data;
1327 struct e1000_adapter *adapter = netdev_priv(netdev);
1328
1329 /* Write the ITR value calculated at the end of the
1330 * previous interrupt.
1331 */
1332 if (adapter->rx_ring->set_itr) {
1333 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1334 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1335 adapter->rx_ring->set_itr = 0;
1336 }
1337
288379f0 1338 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1339 adapter->total_rx_bytes = 0;
1340 adapter->total_rx_packets = 0;
288379f0 1341 __napi_schedule(&adapter->napi);
4662e82b
BA		 1342 }
1343 return IRQ_HANDLED;
1344}
1345
1346/**
1347 * e1000_configure_msix - Configure MSI-X hardware
1348 *
1349 * e1000_configure_msix sets up the hardware to properly
1350 * generate MSI-X interrupts.
1351 **/
1352static void e1000_configure_msix(struct e1000_adapter *adapter)
1353{
1354 struct e1000_hw *hw = &adapter->hw;
1355 struct e1000_ring *rx_ring = adapter->rx_ring;
1356 struct e1000_ring *tx_ring = adapter->tx_ring;
1357 int vector = 0;
1358 u32 ctrl_ext, ivar = 0;
1359
1360 adapter->eiac_mask = 0;
1361
1362 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1363 if (hw->mac.type == e1000_82574) {
1364 u32 rfctl = er32(RFCTL);
1365 rfctl |= E1000_RFCTL_ACK_DIS;
1366 ew32(RFCTL, rfctl);
1367 }
1368
1369#define E1000_IVAR_INT_ALLOC_VALID 0x8
1370 /* Configure Rx vector */
1371 rx_ring->ims_val = E1000_IMS_RXQ0;
1372 adapter->eiac_mask |= rx_ring->ims_val;
1373 if (rx_ring->itr_val)
1374 writel(1000000000 / (rx_ring->itr_val * 256),
1375 hw->hw_addr + rx_ring->itr_register);
1376 else
1377 writel(1, hw->hw_addr + rx_ring->itr_register);
1378 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1379
1380 /* Configure Tx vector */
1381 tx_ring->ims_val = E1000_IMS_TXQ0;
1382 vector++;
1383 if (tx_ring->itr_val)
1384 writel(1000000000 / (tx_ring->itr_val * 256),
1385 hw->hw_addr + tx_ring->itr_register);
1386 else
1387 writel(1, hw->hw_addr + tx_ring->itr_register);
1388 adapter->eiac_mask |= tx_ring->ims_val;
1389 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1390
1391 /* set vector for Other Causes, e.g. link changes */
1392 vector++;
1393 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1394 if (rx_ring->itr_val)
1395 writel(1000000000 / (rx_ring->itr_val * 256),
1396 hw->hw_addr + E1000_EITR_82574(vector));
1397 else
1398 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1399
1400 /* Cause Tx interrupts on every write back */
1401 ivar |= (1 << 31);
1402
1403 ew32(IVAR, ivar);
1404
1405 /* enable MSI-X PBA support */
1406 ctrl_ext = er32(CTRL_EXT);
1407 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1408
1409 /* Auto-Mask Other interrupts upon ICR read */
1410#define E1000_EIAC_MASK_82574 0x01F00000
1411 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1412 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1413 ew32(CTRL_EXT, ctrl_ext);
1414 e1e_flush();
1415}
1416
1417void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1418{
1419 if (adapter->msix_entries) {
1420 pci_disable_msix(adapter->pdev);
1421 kfree(adapter->msix_entries);
1422 adapter->msix_entries = NULL;
1423 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1424 pci_disable_msi(adapter->pdev);
1425 adapter->flags &= ~FLAG_MSI_ENABLED;
1426 }
1427
1428 return;
1429}
1430
1431/**
1432 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1433 *
1434 * Attempt to configure interrupts using the best available
1435 * capabilities of the hardware and kernel.
1436 **/
1437void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1438{
1439 int err;
1440 int numvecs, i;
1441
1442
1443 switch (adapter->int_mode) {
1444 case E1000E_INT_MODE_MSIX:
1445 if (adapter->flags & FLAG_HAS_MSIX) {
1446 numvecs = 3; /* RxQ0, TxQ0 and other */
1447 adapter->msix_entries = kcalloc(numvecs,
1448 sizeof(struct msix_entry),
1449 GFP_KERNEL);
1450 if (adapter->msix_entries) {
1451 for (i = 0; i < numvecs; i++)
1452 adapter->msix_entries[i].entry = i;
1453
1454 err = pci_enable_msix(adapter->pdev,
1455 adapter->msix_entries,
1456 numvecs);
1457 if (err == 0)
1458 return;
1459 }
1460 /* MSI-X failed, so fall through and try MSI */
1461 e_err("Failed to initialize MSI-X interrupts. "
1462 "Falling back to MSI interrupts.\n");
1463 e1000e_reset_interrupt_capability(adapter);
1464 }
1465 adapter->int_mode = E1000E_INT_MODE_MSI;
1466 /* Fall through */
1467 case E1000E_INT_MODE_MSI:
1468 if (!pci_enable_msi(adapter->pdev)) {
1469 adapter->flags |= FLAG_MSI_ENABLED;
1470 } else {
1471 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1472 e_err("Failed to initialize MSI interrupts. Falling "
1473 "back to legacy interrupts.\n");
1474 }
1475 /* Fall through */
1476 case E1000E_INT_MODE_LEGACY:
1477 /* Don't do anything; this is the system default */
1478 break;
1479 }
1480
1481 return;
1482}
1483
1484/**
1485 * e1000_request_msix - Initialize MSI-X interrupts
1486 *
1487 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1488 * kernel.
1489 **/
1490static int e1000_request_msix(struct e1000_adapter *adapter)
1491{
1492 struct net_device *netdev = adapter->netdev;
1493 int err = 0, vector = 0;
1494
1495 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1496 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1497 else
1498 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1499 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1500 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1501 netdev);
1502 if (err)
1503 goto out;
1504 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1505 adapter->rx_ring->itr_val = adapter->itr;
1506 vector++;
1507
1508 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1509 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1510 else
1511 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1512 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1513 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1514 netdev);
1515 if (err)
1516 goto out;
1517 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1518 adapter->tx_ring->itr_val = adapter->itr;
1519 vector++;
1520
1521 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1522 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1523 if (err)
1524 goto out;
1525
1526 e1000_configure_msix(adapter);
1527 return 0;
1528out:
1529 return err;
1530}
1531
f8d59f78
BA		 1532/**
1533 * e1000_request_irq - initialize interrupts
1534 *
1535 * Attempts to configure interrupts using the best available
1536 * capabilities of the hardware and kernel.
1537 **/
bc7f75fa
AK		 1538static int e1000_request_irq(struct e1000_adapter *adapter)
1539{
1540 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1541 int err;
1542
4662e82b
BA		 1543 if (adapter->msix_entries) {
1544 err = e1000_request_msix(adapter);
1545 if (!err)
1546 return err;
1547 /* fall back to MSI */
1548 e1000e_reset_interrupt_capability(adapter);
1549 adapter->int_mode = E1000E_INT_MODE_MSI;
1550 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1551 }
4662e82b 1552 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1553 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1554 netdev->name, netdev);
1555 if (!err)
1556 return err;
bc7f75fa 1557
4662e82b
BA		 1558 /* fall back to legacy interrupt */
1559 e1000e_reset_interrupt_capability(adapter);
1560 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1561 }
1562
a0607fd3 1563 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1564 netdev->name, netdev);
1565 if (err)
1566 e_err("Unable to allocate interrupt, Error: %d\n", err);
1567
bc7f75fa
AK		 1568 return err;
1569}
1570
1571static void e1000_free_irq(struct e1000_adapter *adapter)
1572{
1573 struct net_device *netdev = adapter->netdev;
1574
4662e82b
BA		 1575 if (adapter->msix_entries) {
1576 int vector = 0;
1577
1578 free_irq(adapter->msix_entries[vector].vector, netdev);
1579 vector++;
1580
1581 free_irq(adapter->msix_entries[vector].vector, netdev);
1582 vector++;
1583
1584 /* Other Causes interrupt vector */
1585 free_irq(adapter->msix_entries[vector].vector, netdev);
1586 return;
bc7f75fa 1587 }
4662e82b
BA		 1588
1589 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1590}
1591
1592/**
1593 * e1000_irq_disable - Mask off interrupt generation on the NIC
1594 **/
1595static void e1000_irq_disable(struct e1000_adapter *adapter)
1596{
1597 struct e1000_hw *hw = &adapter->hw;
1598
bc7f75fa 1599 ew32(IMC, ~0);
4662e82b
BA		 1600 if (adapter->msix_entries)
1601 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1602 e1e_flush();
1603 synchronize_irq(adapter->pdev->irq);
1604}
1605
1606/**
1607 * e1000_irq_enable - Enable default interrupt generation settings
1608 **/
1609static void e1000_irq_enable(struct e1000_adapter *adapter)
1610{
1611 struct e1000_hw *hw = &adapter->hw;
1612
4662e82b
BA		 1613 if (adapter->msix_entries) {
1614 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1615 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1616 } else {
1617 ew32(IMS, IMS_ENABLE_MASK);
1618 }
74ef9c39 1619 e1e_flush();
bc7f75fa
AK		 1620}
1621
1622/**
1623 * e1000_get_hw_control - get control of the h/w from f/w
1624 * @adapter: address of board private structure
1625 *
489815ce 1626 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1627 * For ASF and Pass Through versions of f/w this means that
1628 * the driver is loaded. For AMT version (only with 82573)
1629 * of the f/w this means that the network i/f is open.
1630 **/
1631static void e1000_get_hw_control(struct e1000_adapter *adapter)
1632{
1633 struct e1000_hw *hw = &adapter->hw;
1634 u32 ctrl_ext;
1635 u32 swsm;
1636
1637 /* Let firmware know the driver has taken over */
1638 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1639 swsm = er32(SWSM);
1640 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1641 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1642 ctrl_ext = er32(CTRL_EXT);
ad68076e 1643 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1644 }
1645}
1646
1647/**
1648 * e1000_release_hw_control - release control of the h/w to f/w
1649 * @adapter: address of board private structure
1650 *
489815ce 1651 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1652 * For ASF and Pass Through versions of f/w this means that the
1653 * driver is no longer loaded. For AMT version (only with 82573) i
1654 * of the f/w this means that the network i/f is closed.
1655 *
1656 **/
1657static void e1000_release_hw_control(struct e1000_adapter *adapter)
1658{
1659 struct e1000_hw *hw = &adapter->hw;
1660 u32 ctrl_ext;
1661 u32 swsm;
1662
1663 /* Let firmware taken over control of h/w */
1664 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1665 swsm = er32(SWSM);
1666 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1667 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1668 ctrl_ext = er32(CTRL_EXT);
ad68076e 1669 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1670 }
1671}
1672
bc7f75fa
AK		 1673/**
1674 * @e1000_alloc_ring - allocate memory for a ring structure
1675 **/
1676static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1677 struct e1000_ring *ring)
1678{
1679 struct pci_dev *pdev = adapter->pdev;
1680
1681 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1682 GFP_KERNEL);
1683 if (!ring->desc)
1684 return -ENOMEM;
1685
1686 return 0;
1687}
1688
1689/**
1690 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1691 * @adapter: board private structure
1692 *
1693 * Return 0 on success, negative on failure
1694 **/
1695int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1696{
1697 struct e1000_ring *tx_ring = adapter->tx_ring;
1698 int err = -ENOMEM, size;
1699
1700 size = sizeof(struct e1000_buffer) * tx_ring->count;
1701 tx_ring->buffer_info = vmalloc(size);
1702 if (!tx_ring->buffer_info)
1703 goto err;
1704 memset(tx_ring->buffer_info, 0, size);
1705
1706 /* round up to nearest 4K */
1707 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1708 tx_ring->size = ALIGN(tx_ring->size, 4096);
1709
1710 err = e1000_alloc_ring_dma(adapter, tx_ring);
1711 if (err)
1712 goto err;
1713
1714 tx_ring->next_to_use = 0;
1715 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 1716
1717 return 0;
1718err:
1719 vfree(tx_ring->buffer_info);
44defeb3 1720 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1721 return err;
1722}
1723
1724/**
1725 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1726 * @adapter: board private structure
1727 *
1728 * Returns 0 on success, negative on failure
1729 **/
1730int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1731{
1732 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1733 struct e1000_buffer *buffer_info;
1734 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1735
1736 size = sizeof(struct e1000_buffer) * rx_ring->count;
1737 rx_ring->buffer_info = vmalloc(size);
1738 if (!rx_ring->buffer_info)
1739 goto err;
1740 memset(rx_ring->buffer_info, 0, size);
1741
47f44e40
AK		 1742 for (i = 0; i < rx_ring->count; i++) {
1743 buffer_info = &rx_ring->buffer_info[i];
1744 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1745 sizeof(struct e1000_ps_page),
1746 GFP_KERNEL);
1747 if (!buffer_info->ps_pages)
1748 goto err_pages;
1749 }
bc7f75fa
AK		 1750
1751 desc_len = sizeof(union e1000_rx_desc_packet_split);
1752
1753 /* Round up to nearest 4K */
1754 rx_ring->size = rx_ring->count * desc_len;
1755 rx_ring->size = ALIGN(rx_ring->size, 4096);
1756
1757 err = e1000_alloc_ring_dma(adapter, rx_ring);
1758 if (err)
47f44e40 1759 goto err_pages;
bc7f75fa
AK		 1760
1761 rx_ring->next_to_clean = 0;
1762 rx_ring->next_to_use = 0;
1763 rx_ring->rx_skb_top = NULL;
1764
1765 return 0;
47f44e40
AK		 1766
1767err_pages:
1768 for (i = 0; i < rx_ring->count; i++) {
1769 buffer_info = &rx_ring->buffer_info[i];
1770 kfree(buffer_info->ps_pages);
1771 }
bc7f75fa
AK		 1772err:
1773 vfree(rx_ring->buffer_info);
44defeb3 1774 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1775 return err;
1776}
1777
1778/**
1779 * e1000_clean_tx_ring - Free Tx Buffers
1780 * @adapter: board private structure
1781 **/
1782static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1783{
1784 struct e1000_ring *tx_ring = adapter->tx_ring;
1785 struct e1000_buffer *buffer_info;
1786 unsigned long size;
1787 unsigned int i;
1788
1789 for (i = 0; i < tx_ring->count; i++) {
1790 buffer_info = &tx_ring->buffer_info[i];
1791 e1000_put_txbuf(adapter, buffer_info);
1792 }
1793
1794 size = sizeof(struct e1000_buffer) * tx_ring->count;
1795 memset(tx_ring->buffer_info, 0, size);
1796
1797 memset(tx_ring->desc, 0, tx_ring->size);
1798
1799 tx_ring->next_to_use = 0;
1800 tx_ring->next_to_clean = 0;
1801
1802 writel(0, adapter->hw.hw_addr + tx_ring->head);
1803 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1804}
1805
1806/**
1807 * e1000e_free_tx_resources - Free Tx Resources per Queue
1808 * @adapter: board private structure
1809 *
1810 * Free all transmit software resources
1811 **/
1812void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1813{
1814 struct pci_dev *pdev = adapter->pdev;
1815 struct e1000_ring *tx_ring = adapter->tx_ring;
1816
1817 e1000_clean_tx_ring(adapter);
1818
1819 vfree(tx_ring->buffer_info);
1820 tx_ring->buffer_info = NULL;
1821
1822 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1823 tx_ring->dma);
1824 tx_ring->desc = NULL;
1825}
1826
1827/**
1828 * e1000e_free_rx_resources - Free Rx Resources
1829 * @adapter: board private structure
1830 *
1831 * Free all receive software resources
1832 **/
1833
1834void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1835{
1836 struct pci_dev *pdev = adapter->pdev;
1837 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1838 int i;
bc7f75fa
AK		 1839
1840 e1000_clean_rx_ring(adapter);
1841
47f44e40
AK		 1842 for (i = 0; i < rx_ring->count; i++) {
1843 kfree(rx_ring->buffer_info[i].ps_pages);
1844 }
1845
bc7f75fa
AK		 1846 vfree(rx_ring->buffer_info);
1847 rx_ring->buffer_info = NULL;
1848
bc7f75fa
AK		 1849 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1850 rx_ring->dma);
1851 rx_ring->desc = NULL;
1852}
1853
1854/**
1855 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1856 * @adapter: pointer to adapter
1857 * @itr_setting: current adapter->itr
1858 * @packets: the number of packets during this measurement interval
1859 * @bytes: the number of bytes during this measurement interval
1860 *
bc7f75fa
AK		 1861 * Stores a new ITR value based on packets and byte
1862 * counts during the last interrupt. The advantage of per interrupt
1863 * computation is faster updates and more accurate ITR for the current
1864 * traffic pattern. Constants in this function were computed
1865 * based on theoretical maximum wire speed and thresholds were set based
1866 * on testing data as well as attempting to minimize response time
4662e82b
BA		 1867 * while increasing bulk throughput. This functionality is controlled
1868 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 1869 **/
1870static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1871 u16 itr_setting, int packets,
1872 int bytes)
1873{
1874 unsigned int retval = itr_setting;
1875
1876 if (packets == 0)
1877 goto update_itr_done;
1878
1879 switch (itr_setting) {
1880 case lowest_latency:
1881 /* handle TSO and jumbo frames */
1882 if (bytes/packets > 8000)
1883 retval = bulk_latency;
1884 else if ((packets < 5) && (bytes > 512)) {
1885 retval = low_latency;
1886 }
1887 break;
1888 case low_latency: /* 50 usec aka 20000 ints/s */
1889 if (bytes > 10000) {
1890 /* this if handles the TSO accounting */
1891 if (bytes/packets > 8000) {
1892 retval = bulk_latency;
1893 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1894 retval = bulk_latency;
1895 } else if ((packets > 35)) {
1896 retval = lowest_latency;
1897 }
1898 } else if (bytes/packets > 2000) {
1899 retval = bulk_latency;
1900 } else if (packets <= 2 && bytes < 512) {
1901 retval = lowest_latency;
1902 }
1903 break;
1904 case bulk_latency: /* 250 usec aka 4000 ints/s */
1905 if (bytes > 25000) {
1906 if (packets > 35) {
1907 retval = low_latency;
1908 }
1909 } else if (bytes < 6000) {
1910 retval = low_latency;
1911 }
1912 break;
1913 }
1914
1915update_itr_done:
1916 return retval;
1917}
1918
1919static void e1000_set_itr(struct e1000_adapter *adapter)
1920{
1921 struct e1000_hw *hw = &adapter->hw;
1922 u16 current_itr;
1923 u32 new_itr = adapter->itr;
1924
1925 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1926 if (adapter->link_speed != SPEED_1000) {
1927 current_itr = 0;
1928 new_itr = 4000;
1929 goto set_itr_now;
1930 }
1931
1932 adapter->tx_itr = e1000_update_itr(adapter,
1933 adapter->tx_itr,
1934 adapter->total_tx_packets,
1935 adapter->total_tx_bytes);
1936 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1937 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1938 adapter->tx_itr = low_latency;
1939
1940 adapter->rx_itr = e1000_update_itr(adapter,
1941 adapter->rx_itr,
1942 adapter->total_rx_packets,
1943 adapter->total_rx_bytes);
1944 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1945 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1946 adapter->rx_itr = low_latency;
1947
1948 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1949
1950 switch (current_itr) {
1951 /* counts and packets in update_itr are dependent on these numbers */
1952 case lowest_latency:
1953 new_itr = 70000;
1954 break;
1955 case low_latency:
1956 new_itr = 20000; /* aka hwitr = ~200 */
1957 break;
1958 case bulk_latency:
1959 new_itr = 4000;
1960 break;
1961 default:
1962 break;
1963 }
1964
1965set_itr_now:
1966 if (new_itr != adapter->itr) {
ad68076e
BA		 1967 /*
1968 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1969 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1970 * increasing
1971 */
bc7f75fa
AK		 1972 new_itr = new_itr > adapter->itr ?
1973 min(adapter->itr + (new_itr >> 2), new_itr) :
1974 new_itr;
1975 adapter->itr = new_itr;
4662e82b
BA		 1976 adapter->rx_ring->itr_val = new_itr;
1977 if (adapter->msix_entries)
1978 adapter->rx_ring->set_itr = 1;
1979 else
1980 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 1981 }
1982}
1983
4662e82b
BA		 1984/**
1985 * e1000_alloc_queues - Allocate memory for all rings
1986 * @adapter: board private structure to initialize
1987 **/
1988static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1989{
1990 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1991 if (!adapter->tx_ring)
1992 goto err;
1993
1994 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1995 if (!adapter->rx_ring)
1996 goto err;
1997
1998 return 0;
1999err:
2000 e_err("Unable to allocate memory for queues\n");
2001 kfree(adapter->rx_ring);
2002 kfree(adapter->tx_ring);
2003 return -ENOMEM;
2004}
2005
bc7f75fa
AK		 2006/**
2007 * e1000_clean - NAPI Rx polling callback
ad68076e 2008 * @napi: struct associated with this polling callback
489815ce 2009 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2010 **/
2011static int e1000_clean(struct napi_struct *napi, int budget)
2012{
2013 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2014 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2015 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2016 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2017
4cf1653a 2018 adapter = netdev_priv(poll_dev);
bc7f75fa 2019
4662e82b
BA		 2020 if (adapter->msix_entries &&
2021 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2022 goto clean_rx;
2023
92af3e95 2024 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2025
4662e82b 2026clean_rx:
bc7f75fa 2027 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2028
12d04a3c 2029 if (!tx_cleaned)
d2c7ddd6 2030 work_done = budget;
bc7f75fa 2031
53e52c72
DM		 2032 /* If budget not fully consumed, exit the polling mode */
2033 if (work_done < budget) {
bc7f75fa
AK		 2034 if (adapter->itr_setting & 3)
2035 e1000_set_itr(adapter);
288379f0 2036 napi_complete(napi);
a3c69fef
JB		 2037 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2038 if (adapter->msix_entries)
2039 ew32(IMS, adapter->rx_ring->ims_val);
2040 else
2041 e1000_irq_enable(adapter);
2042 }
bc7f75fa
AK		 2043 }
2044
2045 return work_done;
2046}
2047
2048static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2049{
2050 struct e1000_adapter *adapter = netdev_priv(netdev);
2051 struct e1000_hw *hw = &adapter->hw;
2052 u32 vfta, index;
2053
2054 /* don't update vlan cookie if already programmed */
2055 if ((adapter->hw.mng_cookie.status &
2056 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2057 (vid == adapter->mng_vlan_id))
2058 return;
caaddaf8 2059
bc7f75fa 2060 /* add VID to filter table */
caaddaf8
BA		 2061 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2062 index = (vid >> 5) & 0x7F;
2063 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2064 vfta |= (1 << (vid & 0x1F));
2065 hw->mac.ops.write_vfta(hw, index, vfta);
2066 }
bc7f75fa
AK		 2067}
2068
2069static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2070{
2071 struct e1000_adapter *adapter = netdev_priv(netdev);
2072 struct e1000_hw *hw = &adapter->hw;
2073 u32 vfta, index;
2074
74ef9c39
JB		 2075 if (!test_bit(__E1000_DOWN, &adapter->state))
2076 e1000_irq_disable(adapter);
bc7f75fa 2077 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2078
2079 if (!test_bit(__E1000_DOWN, &adapter->state))
2080 e1000_irq_enable(adapter);
bc7f75fa
AK		 2081
2082 if ((adapter->hw.mng_cookie.status &
2083 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2084 (vid == adapter->mng_vlan_id)) {
2085 /* release control to f/w */
2086 e1000_release_hw_control(adapter);
2087 return;
2088 }
2089
2090 /* remove VID from filter table */
caaddaf8
BA		 2091 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2092 index = (vid >> 5) & 0x7F;
2093 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2094 vfta &= ~(1 << (vid & 0x1F));
2095 hw->mac.ops.write_vfta(hw, index, vfta);
2096 }
bc7f75fa
AK		 2097}
2098
2099static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2100{
2101 struct net_device *netdev = adapter->netdev;
2102 u16 vid = adapter->hw.mng_cookie.vlan_id;
2103 u16 old_vid = adapter->mng_vlan_id;
2104
2105 if (!adapter->vlgrp)
2106 return;
2107
2108 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2109 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2110 if (adapter->hw.mng_cookie.status &
2111 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2112 e1000_vlan_rx_add_vid(netdev, vid);
2113 adapter->mng_vlan_id = vid;
2114 }
2115
2116 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2117 (vid != old_vid) &&
2118 !vlan_group_get_device(adapter->vlgrp, old_vid))
2119 e1000_vlan_rx_kill_vid(netdev, old_vid);
2120 } else {
2121 adapter->mng_vlan_id = vid;
2122 }
2123}
2124
2125
2126static void e1000_vlan_rx_register(struct net_device *netdev,
2127 struct vlan_group *grp)
2128{
2129 struct e1000_adapter *adapter = netdev_priv(netdev);
2130 struct e1000_hw *hw = &adapter->hw;
2131 u32 ctrl, rctl;
2132
74ef9c39
JB		 2133 if (!test_bit(__E1000_DOWN, &adapter->state))
2134 e1000_irq_disable(adapter);
bc7f75fa
AK		 2135 adapter->vlgrp = grp;
2136
2137 if (grp) {
2138 /* enable VLAN tag insert/strip */
2139 ctrl = er32(CTRL);
2140 ctrl |= E1000_CTRL_VME;
2141 ew32(CTRL, ctrl);
2142
2143 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2144 /* enable VLAN receive filtering */
2145 rctl = er32(RCTL);
bc7f75fa
AK		 2146 rctl &= ~E1000_RCTL_CFIEN;
2147 ew32(RCTL, rctl);
2148 e1000_update_mng_vlan(adapter);
2149 }
2150 } else {
2151 /* disable VLAN tag insert/strip */
2152 ctrl = er32(CTRL);
2153 ctrl &= ~E1000_CTRL_VME;
2154 ew32(CTRL, ctrl);
2155
2156 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2157 if (adapter->mng_vlan_id !=
2158 (u16)E1000_MNG_VLAN_NONE) {
2159 e1000_vlan_rx_kill_vid(netdev,
2160 adapter->mng_vlan_id);
2161 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2162 }
2163 }
2164 }
2165
74ef9c39
JB		 2166 if (!test_bit(__E1000_DOWN, &adapter->state))
2167 e1000_irq_enable(adapter);
bc7f75fa
AK		 2168}
2169
2170static void e1000_restore_vlan(struct e1000_adapter *adapter)
2171{
2172 u16 vid;
2173
2174 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2175
2176 if (!adapter->vlgrp)
2177 return;
2178
2179 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2180 if (!vlan_group_get_device(adapter->vlgrp, vid))
2181 continue;
2182 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2183 }
2184}
2185
2186static void e1000_init_manageability(struct e1000_adapter *adapter)
2187{
2188 struct e1000_hw *hw = &adapter->hw;
2189 u32 manc, manc2h;
2190
2191 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2192 return;
2193
2194 manc = er32(MANC);
2195
ad68076e
BA		 2196 /*
2197 * enable receiving management packets to the host. this will probably
bc7f75fa 2198 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2199 * the packets will be handled on SMBUS
2200 */
bc7f75fa
AK		 2201 manc |= E1000_MANC_EN_MNG2HOST;
2202 manc2h = er32(MANC2H);
2203#define E1000_MNG2HOST_PORT_623 (1 << 5)
2204#define E1000_MNG2HOST_PORT_664 (1 << 6)
2205 manc2h |= E1000_MNG2HOST_PORT_623;
2206 manc2h |= E1000_MNG2HOST_PORT_664;
2207 ew32(MANC2H, manc2h);
2208 ew32(MANC, manc);
2209}
2210
2211/**
2212 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2213 * @adapter: board private structure
2214 *
2215 * Configure the Tx unit of the MAC after a reset.
2216 **/
2217static void e1000_configure_tx(struct e1000_adapter *adapter)
2218{
2219 struct e1000_hw *hw = &adapter->hw;
2220 struct e1000_ring *tx_ring = adapter->tx_ring;
2221 u64 tdba;
2222 u32 tdlen, tctl, tipg, tarc;
2223 u32 ipgr1, ipgr2;
2224
2225 /* Setup the HW Tx Head and Tail descriptor pointers */
2226 tdba = tx_ring->dma;
2227 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2228 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2229 ew32(TDBAH, (tdba >> 32));
2230 ew32(TDLEN, tdlen);
2231 ew32(TDH, 0);
2232 ew32(TDT, 0);
2233 tx_ring->head = E1000_TDH;
2234 tx_ring->tail = E1000_TDT;
2235
2236 /* Set the default values for the Tx Inter Packet Gap timer */
2237 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2238 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2239 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2240
2241 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2242 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2243
2244 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2245 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2246 ew32(TIPG, tipg);
2247
2248 /* Set the Tx Interrupt Delay register */
2249 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2250 /* Tx irq moderation */
bc7f75fa
AK		 2251 ew32(TADV, adapter->tx_abs_int_delay);
2252
2253 /* Program the Transmit Control Register */
2254 tctl = er32(TCTL);
2255 tctl &= ~E1000_TCTL_CT;
2256 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2257 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2258
2259 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2260 tarc = er32(TARC(0));
ad68076e
BA		 2261 /*
2262 * set the speed mode bit, we'll clear it if we're not at
2263 * gigabit link later
2264 */
bc7f75fa
AK		 2265#define SPEED_MODE_BIT (1 << 21)
2266 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2267 ew32(TARC(0), tarc);
bc7f75fa
AK		 2268 }
2269
2270 /* errata: program both queues to unweighted RR */
2271 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2272 tarc = er32(TARC(0));
bc7f75fa 2273 tarc |= 1;
e9ec2c0f
JK		 2274 ew32(TARC(0), tarc);
2275 tarc = er32(TARC(1));
bc7f75fa 2276 tarc |= 1;
e9ec2c0f 2277 ew32(TARC(1), tarc);
bc7f75fa
AK		 2278 }
2279
bc7f75fa
AK		 2280 /* Setup Transmit Descriptor Settings for eop descriptor */
2281 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2282
2283 /* only set IDE if we are delaying interrupts using the timers */
2284 if (adapter->tx_int_delay)
2285 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2286
2287 /* enable Report Status bit */
2288 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2289
2290 ew32(TCTL, tctl);
2291
edfea6e6
SH		 2292 e1000e_config_collision_dist(hw);
2293
bc7f75fa
AK		 2294 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2295}
2296
2297/**
2298 * e1000_setup_rctl - configure the receive control registers
2299 * @adapter: Board private structure
2300 **/
2301#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2302 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2303static void e1000_setup_rctl(struct e1000_adapter *adapter)
2304{
2305 struct e1000_hw *hw = &adapter->hw;
2306 u32 rctl, rfctl;
2307 u32 psrctl = 0;
2308 u32 pages = 0;
2309
2310 /* Program MC offset vector base */
2311 rctl = er32(RCTL);
2312 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2313 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2314 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2315 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2316
2317 /* Do not Store bad packets */
2318 rctl &= ~E1000_RCTL_SBP;
2319
2320 /* Enable Long Packet receive */
2321 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2322 rctl &= ~E1000_RCTL_LPE;
2323 else
2324 rctl |= E1000_RCTL_LPE;
2325
eb7c3adb
JK		 2326 /* Some systems expect that the CRC is included in SMBUS traffic. The
2327 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2328 * host memory when this is enabled
2329 */
2330 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2331 rctl |= E1000_RCTL_SECRC;
5918bd88 2332
a4f58f54
BA		 2333 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2334 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2335 u16 phy_data;
2336
2337 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2338 phy_data &= 0xfff8;
2339 phy_data |= (1 << 2);
2340 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2341
2342 e1e_rphy(hw, 22, &phy_data);
2343 phy_data &= 0x0fff;
2344 phy_data |= (1 << 14);
2345 e1e_wphy(hw, 0x10, 0x2823);
2346 e1e_wphy(hw, 0x11, 0x0003);
2347 e1e_wphy(hw, 22, phy_data);
2348 }
2349
bc7f75fa
AK		 2350 /* Setup buffer sizes */
2351 rctl &= ~E1000_RCTL_SZ_4096;
2352 rctl |= E1000_RCTL_BSEX;
2353 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2354 case 2048:
2355 default:
2356 rctl |= E1000_RCTL_SZ_2048;
2357 rctl &= ~E1000_RCTL_BSEX;
2358 break;
2359 case 4096:
2360 rctl |= E1000_RCTL_SZ_4096;
2361 break;
2362 case 8192:
2363 rctl |= E1000_RCTL_SZ_8192;
2364 break;
2365 case 16384:
2366 rctl |= E1000_RCTL_SZ_16384;
2367 break;
2368 }
2369
2370 /*
2371 * 82571 and greater support packet-split where the protocol
2372 * header is placed in skb->data and the packet data is
2373 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2374 * In the case of a non-split, skb->data is linearly filled,
2375 * followed by the page buffers. Therefore, skb->data is
2376 * sized to hold the largest protocol header.
2377 *
2378 * allocations using alloc_page take too long for regular MTU
2379 * so only enable packet split for jumbo frames
2380 *
2381 * Using pages when the page size is greater than 16k wastes
2382 * a lot of memory, since we allocate 3 pages at all times
2383 * per packet.
2384 */
bc7f75fa 2385 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2386 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2387 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2388 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2389 else
2390 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2391
2392 if (adapter->rx_ps_pages) {
2393 /* Configure extra packet-split registers */
2394 rfctl = er32(RFCTL);
2395 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2396 /*
2397 * disable packet split support for IPv6 extension headers,
2398 * because some malformed IPv6 headers can hang the Rx
2399 */
bc7f75fa
AK		 2400 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2401 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2402
2403 ew32(RFCTL, rfctl);
2404
140a7480
AK		 2405 /* Enable Packet split descriptors */
2406 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2407
2408 psrctl |= adapter->rx_ps_bsize0 >>
2409 E1000_PSRCTL_BSIZE0_SHIFT;
2410
2411 switch (adapter->rx_ps_pages) {
2412 case 3:
2413 psrctl |= PAGE_SIZE <<
2414 E1000_PSRCTL_BSIZE3_SHIFT;
2415 case 2:
2416 psrctl |= PAGE_SIZE <<
2417 E1000_PSRCTL_BSIZE2_SHIFT;
2418 case 1:
2419 psrctl |= PAGE_SIZE >>
2420 E1000_PSRCTL_BSIZE1_SHIFT;
2421 break;
2422 }
2423
2424 ew32(PSRCTL, psrctl);
2425 }
2426
2427 ew32(RCTL, rctl);
318a94d6
JK		 2428 /* just started the receive unit, no need to restart */
2429 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2430}
2431
2432/**
2433 * e1000_configure_rx - Configure Receive Unit after Reset
2434 * @adapter: board private structure
2435 *
2436 * Configure the Rx unit of the MAC after a reset.
2437 **/
2438static void e1000_configure_rx(struct e1000_adapter *adapter)
2439{
2440 struct e1000_hw *hw = &adapter->hw;
2441 struct e1000_ring *rx_ring = adapter->rx_ring;
2442 u64 rdba;
2443 u32 rdlen, rctl, rxcsum, ctrl_ext;
2444
2445 if (adapter->rx_ps_pages) {
2446 /* this is a 32 byte descriptor */
2447 rdlen = rx_ring->count *
2448 sizeof(union e1000_rx_desc_packet_split);
2449 adapter->clean_rx = e1000_clean_rx_irq_ps;
2450 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2451 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2452 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2453 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2454 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2455 } else {
97ac8cae 2456 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2457 adapter->clean_rx = e1000_clean_rx_irq;
2458 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2459 }
2460
2461 /* disable receives while setting up the descriptors */
2462 rctl = er32(RCTL);
2463 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2464 e1e_flush();
2465 msleep(10);
2466
2467 /* set the Receive Delay Timer Register */
2468 ew32(RDTR, adapter->rx_int_delay);
2469
2470 /* irq moderation */
2471 ew32(RADV, adapter->rx_abs_int_delay);
2472 if (adapter->itr_setting != 0)
ad68076e 2473 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2474
2475 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2476 /* Auto-Mask interrupts upon ICR access */
2477 ctrl_ext |= E1000_CTRL_EXT_IAME;
2478 ew32(IAM, 0xffffffff);
2479 ew32(CTRL_EXT, ctrl_ext);
2480 e1e_flush();
2481
ad68076e
BA		 2482 /*
2483 * Setup the HW Rx Head and Tail Descriptor Pointers and
2484 * the Base and Length of the Rx Descriptor Ring
2485 */
bc7f75fa 2486 rdba = rx_ring->dma;
284901a9 2487 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2488 ew32(RDBAH, (rdba >> 32));
2489 ew32(RDLEN, rdlen);
2490 ew32(RDH, 0);
2491 ew32(RDT, 0);
2492 rx_ring->head = E1000_RDH;
2493 rx_ring->tail = E1000_RDT;
2494
2495 /* Enable Receive Checksum Offload for TCP and UDP */
2496 rxcsum = er32(RXCSUM);
2497 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2498 rxcsum |= E1000_RXCSUM_TUOFL;
2499
ad68076e
BA		 2500 /*
2501 * IPv4 payload checksum for UDP fragments must be
2502 * used in conjunction with packet-split.
2503 */
bc7f75fa
AK		 2504 if (adapter->rx_ps_pages)
2505 rxcsum |= E1000_RXCSUM_IPPCSE;
2506 } else {
2507 rxcsum &= ~E1000_RXCSUM_TUOFL;
2508 /* no need to clear IPPCSE as it defaults to 0 */
2509 }
2510 ew32(RXCSUM, rxcsum);
2511
ad68076e
BA		 2512 /*
2513 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2514 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2515 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2516 */
53ec5498
BA		 2517 if (adapter->flags & FLAG_HAS_ERT) {
2518 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2519 u32 rxdctl = er32(RXDCTL(0));
2520 ew32(RXDCTL(0), rxdctl | 0x3);
2521 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2522 /*
2523 * With jumbo frames and early-receive enabled,
2524 * excessive C-state transition latencies result in
2525 * dropped transactions.
2526 */
2527 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2528 adapter->netdev->name, 55);
2529 } else {
2530 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2531 adapter->netdev->name,
2532 PM_QOS_DEFAULT_VALUE);
2533 }
97ac8cae 2534 }
bc7f75fa
AK		 2535
2536 /* Enable Receives */
2537 ew32(RCTL, rctl);
2538}
2539
2540/**
e2de3eb6 2541 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2542 * @hw: pointer to the HW structure
2543 * @mc_addr_list: array of multicast addresses to program
2544 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2545 *
ab8932f3 2546 * Updates the Multicast Table Array.
bc7f75fa 2547 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2548 **/
e2de3eb6 2549static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2550 u32 mc_addr_count)
bc7f75fa 2551{
ab8932f3 2552 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 2553}
2554
2555/**
2556 * e1000_set_multi - Multicast and Promiscuous mode set
2557 * @netdev: network interface device structure
2558 *
2559 * The set_multi entry point is called whenever the multicast address
2560 * list or the network interface flags are updated. This routine is
2561 * responsible for configuring the hardware for proper multicast,
2562 * promiscuous mode, and all-multi behavior.
2563 **/
2564static void e1000_set_multi(struct net_device *netdev)
2565{
2566 struct e1000_adapter *adapter = netdev_priv(netdev);
2567 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 2568 struct dev_mc_list *mc_ptr;
2569 u8 *mta_list;
2570 u32 rctl;
2571 int i;
2572
2573 /* Check for Promiscuous and All Multicast modes */
2574
2575 rctl = er32(RCTL);
2576
2577 if (netdev->flags & IFF_PROMISC) {
2578 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2579 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2580 } else {
746b9f02
PM		 2581 if (netdev->flags & IFF_ALLMULTI) {
2582 rctl |= E1000_RCTL_MPE;
2583 rctl &= ~E1000_RCTL_UPE;
2584 } else {
2585 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2586 }
78ed11a5 2587 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2588 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2589 }
2590
2591 ew32(RCTL, rctl);
2592
7aeef972
JP		 2593 if (!netdev_mc_empty(netdev)) {
2594 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 2595 if (!mta_list)
2596 return;
2597
2598 /* prepare a packed array of only addresses. */
7aeef972
JP		 2599 i = 0;
2600 netdev_for_each_mc_addr(mc_ptr, netdev)
2601 memcpy(mta_list + (i++ * ETH_ALEN),
2602 mc_ptr->dmi_addr, ETH_ALEN);
bc7f75fa 2603
ab8932f3 2604 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 2605 kfree(mta_list);
2606 } else {
2607 /*
2608 * if we're called from probe, we might not have
2609 * anything to do here, so clear out the list
2610 */
ab8932f3 2611 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 2612 }
2613}
2614
2615/**
ad68076e 2616 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2617 * @adapter: private board structure
2618 **/
2619static void e1000_configure(struct e1000_adapter *adapter)
2620{
2621 e1000_set_multi(adapter->netdev);
2622
2623 e1000_restore_vlan(adapter);
2624 e1000_init_manageability(adapter);
2625
2626 e1000_configure_tx(adapter);
2627 e1000_setup_rctl(adapter);
2628 e1000_configure_rx(adapter);
ad68076e 2629 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2630}
2631
2632/**
2633 * e1000e_power_up_phy - restore link in case the phy was powered down
2634 * @adapter: address of board private structure
2635 *
2636 * The phy may be powered down to save power and turn off link when the
2637 * driver is unloaded and wake on lan is not enabled (among others)
2638 * *** this routine MUST be followed by a call to e1000e_reset ***
2639 **/
2640void e1000e_power_up_phy(struct e1000_adapter *adapter)
2641{
17f208de
BA		 2642 if (adapter->hw.phy.ops.power_up)
2643 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 2644
2645 adapter->hw.mac.ops.setup_link(&adapter->hw);
2646}
2647
2648/**
2649 * e1000_power_down_phy - Power down the PHY
2650 *
17f208de
BA		 2651 * Power down the PHY so no link is implied when interface is down.
2652 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 2653 */
2654static void e1000_power_down_phy(struct e1000_adapter *adapter)
2655{
bc7f75fa 2656 /* WoL is enabled */
23b66e2b 2657 if (adapter->wol)
bc7f75fa
AK		 2658 return;
2659
17f208de
BA		 2660 if (adapter->hw.phy.ops.power_down)
2661 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 2662}
2663
2664/**
2665 * e1000e_reset - bring the hardware into a known good state
2666 *
2667 * This function boots the hardware and enables some settings that
2668 * require a configuration cycle of the hardware - those cannot be
2669 * set/changed during runtime. After reset the device needs to be
ad68076e 2670 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2671 */
2672void e1000e_reset(struct e1000_adapter *adapter)
2673{
2674 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2675 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2676 struct e1000_hw *hw = &adapter->hw;
2677 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2678 u32 pba = adapter->pba;
bc7f75fa
AK		 2679 u16 hwm;
2680
ad68076e 2681 /* reset Packet Buffer Allocation to default */
318a94d6 2682 ew32(PBA, pba);
df762464 2683
318a94d6 2684 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2685 /*
2686 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2687 * large enough to accommodate two full transmit packets,
2688 * rounded up to the next 1KB and expressed in KB. Likewise,
2689 * the Rx FIFO should be large enough to accommodate at least
2690 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2691 * expressed in KB.
2692 */
df762464 2693 pba = er32(PBA);
bc7f75fa 2694 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2695 tx_space = pba >> 16;
bc7f75fa 2696 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2697 pba &= 0xffff;
ad68076e
BA		 2698 /*
2699 * the Tx fifo also stores 16 bytes of information about the tx
2700 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2701 */
2702 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2703 sizeof(struct e1000_tx_desc) -
2704 ETH_FCS_LEN) * 2;
2705 min_tx_space = ALIGN(min_tx_space, 1024);
2706 min_tx_space >>= 10;
2707 /* software strips receive CRC, so leave room for it */
318a94d6 2708 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2709 min_rx_space = ALIGN(min_rx_space, 1024);
2710 min_rx_space >>= 10;
2711
ad68076e
BA		 2712 /*
2713 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2714 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2715 * allocation, take space away from current Rx allocation
2716 */
df762464
AK		 2717 if ((tx_space < min_tx_space) &&
2718 ((min_tx_space - tx_space) < pba)) {
2719 pba -= min_tx_space - tx_space;
bc7f75fa 2720
ad68076e
BA		 2721 /*
2722 * if short on Rx space, Rx wins and must trump tx
2723 * adjustment or use Early Receive if available
2724 */
df762464 2725 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2726 (!(adapter->flags & FLAG_HAS_ERT)))
2727 /* ERT enabled in e1000_configure_rx */
df762464 2728 pba = min_rx_space;
bc7f75fa 2729 }
df762464
AK		 2730
2731 ew32(PBA, pba);
bc7f75fa
AK		 2732 }
2733
bc7f75fa 2734
ad68076e
BA		 2735 /*
2736 * flow control settings
2737 *
38eb394e 2738 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 2739 * (or the size used for early receive) above it in the Rx FIFO.
2740 * Set it to the lower of:
2741 * - 90% of the Rx FIFO size, and
2742 * - the full Rx FIFO size minus the early receive size (for parts
2743 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 2744 * - the full Rx FIFO size minus one full frame
ad68076e 2745 */
38eb394e
BA		 2746 if (hw->mac.type == e1000_pchlan) {
2747 /*
2748 * Workaround PCH LOM adapter hangs with certain network
2749 * loads. If hangs persist, try disabling Tx flow control.
2750 */
2751 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2752 fc->high_water = 0x3500;
2753 fc->low_water = 0x1500;
2754 } else {
2755 fc->high_water = 0x5000;
2756 fc->low_water = 0x3000;
2757 }
2758 } else {
2759 if ((adapter->flags & FLAG_HAS_ERT) &&
2760 (adapter->netdev->mtu > ETH_DATA_LEN))
2761 hwm = min(((pba << 10) * 9 / 10),
2762 ((pba << 10) - (E1000_ERT_2048 << 3)));
2763 else
2764 hwm = min(((pba << 10) * 9 / 10),
2765 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2766
38eb394e
BA		 2767 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
2768 fc->low_water = fc->high_water - 8;
2769 }
bc7f75fa
AK		 2770
2771 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2772 fc->pause_time = 0xFFFF;
bc7f75fa 2773 else
318a94d6
JK		 2774 fc->pause_time = E1000_FC_PAUSE_TIME;
2775 fc->send_xon = 1;
5c48ef3e 2776 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 2777
2778 /* Allow time for pending master requests to run */
2779 mac->ops.reset_hw(hw);
97ac8cae
BA		 2780
2781 /*
2782 * For parts with AMT enabled, let the firmware know
2783 * that the network interface is in control
2784 */
c43bc57e 2785 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2786 e1000_get_hw_control(adapter);
2787
bc7f75fa 2788 ew32(WUC, 0);
a4f58f54
BA		 2789 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
2790 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK		 2791
2792 if (mac->ops.init_hw(hw))
44defeb3 2793 e_err("Hardware Error\n");
bc7f75fa 2794
38eb394e
BA		 2795 /* additional part of the flow-control workaround above */
2796 if (hw->mac.type == e1000_pchlan)
2797 ew32(FCRTV_PCH, 0x1000);
2798
bc7f75fa
AK		 2799 e1000_update_mng_vlan(adapter);
2800
2801 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2802 ew32(VET, ETH_P_8021Q);
2803
2804 e1000e_reset_adaptive(hw);
2805 e1000_get_phy_info(hw);
2806
918d7197
BA		 2807 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
2808 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 2809 u16 phy_data = 0;
ad68076e
BA		 2810 /*
2811 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2812 * the return value of this function because there is nothing
ad68076e
BA		 2813 * different we would do if it failed
2814 */
bc7f75fa
AK		 2815 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2816 phy_data &= ~IGP02E1000_PM_SPD;
2817 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2818 }
bc7f75fa
AK		 2819}
2820
2821int e1000e_up(struct e1000_adapter *adapter)
2822{
2823 struct e1000_hw *hw = &adapter->hw;
2824
53ec5498
BA		 2825 /* DMA latency requirement to workaround early-receive/jumbo issue */
2826 if (adapter->flags & FLAG_HAS_ERT)
2827 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
2828 adapter->netdev->name,
2829 PM_QOS_DEFAULT_VALUE);
2830
bc7f75fa
AK		 2831 /* hardware has been reset, we need to reload some things */
2832 e1000_configure(adapter);
2833
2834 clear_bit(__E1000_DOWN, &adapter->state);
2835
2836 napi_enable(&adapter->napi);
4662e82b
BA		 2837 if (adapter->msix_entries)
2838 e1000_configure_msix(adapter);
bc7f75fa
AK		 2839 e1000_irq_enable(adapter);
2840
4cb9be7a
JB		 2841 netif_wake_queue(adapter->netdev);
2842
bc7f75fa
AK		 2843 /* fire a link change interrupt to start the watchdog */
2844 ew32(ICS, E1000_ICS_LSC);
2845 return 0;
2846}
2847
2848void e1000e_down(struct e1000_adapter *adapter)
2849{
2850 struct net_device *netdev = adapter->netdev;
2851 struct e1000_hw *hw = &adapter->hw;
2852 u32 tctl, rctl;
2853
ad68076e
BA		 2854 /*
2855 * signal that we're down so the interrupt handler does not
2856 * reschedule our watchdog timer
2857 */
bc7f75fa
AK		 2858 set_bit(__E1000_DOWN, &adapter->state);
2859
2860 /* disable receives in the hardware */
2861 rctl = er32(RCTL);
2862 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2863 /* flush and sleep below */
2864
4cb9be7a 2865 netif_stop_queue(netdev);
bc7f75fa
AK		 2866
2867 /* disable transmits in the hardware */
2868 tctl = er32(TCTL);
2869 tctl &= ~E1000_TCTL_EN;
2870 ew32(TCTL, tctl);
2871 /* flush both disables and wait for them to finish */
2872 e1e_flush();
2873 msleep(10);
2874
2875 napi_disable(&adapter->napi);
2876 e1000_irq_disable(adapter);
2877
2878 del_timer_sync(&adapter->watchdog_timer);
2879 del_timer_sync(&adapter->phy_info_timer);
2880
2881 netdev->tx_queue_len = adapter->tx_queue_len;
2882 netif_carrier_off(netdev);
2883 adapter->link_speed = 0;
2884 adapter->link_duplex = 0;
2885
52cc3086
JK		 2886 if (!pci_channel_offline(adapter->pdev))
2887 e1000e_reset(adapter);
bc7f75fa
AK		 2888 e1000_clean_tx_ring(adapter);
2889 e1000_clean_rx_ring(adapter);
2890
53ec5498
BA		 2891 if (adapter->flags & FLAG_HAS_ERT)
2892 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
2893 adapter->netdev->name);
2894
bc7f75fa
AK		 2895 /*
2896 * TODO: for power management, we could drop the link and
2897 * pci_disable_device here.
2898 */
2899}
2900
2901void e1000e_reinit_locked(struct e1000_adapter *adapter)
2902{
2903 might_sleep();
2904 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2905 msleep(1);
2906 e1000e_down(adapter);
2907 e1000e_up(adapter);
2908 clear_bit(__E1000_RESETTING, &adapter->state);
2909}
2910
2911/**
2912 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2913 * @adapter: board private structure to initialize
2914 *
2915 * e1000_sw_init initializes the Adapter private data structure.
2916 * Fields are initialized based on PCI device information and
2917 * OS network device settings (MTU size).
2918 **/
2919static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2920{
bc7f75fa
AK		 2921 struct net_device *netdev = adapter->netdev;
2922
2923 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2924 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2925 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2926 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2927
4662e82b 2928 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2929
4662e82b
BA		 2930 if (e1000_alloc_queues(adapter))
2931 return -ENOMEM;
bc7f75fa 2932
bc7f75fa 2933 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2934 e1000_irq_disable(adapter);
2935
bc7f75fa
AK		 2936 set_bit(__E1000_DOWN, &adapter->state);
2937 return 0;
bc7f75fa
AK		 2938}
2939
f8d59f78
BA		 2940/**
2941 * e1000_intr_msi_test - Interrupt Handler
2942 * @irq: interrupt number
2943 * @data: pointer to a network interface device structure
2944 **/
2945static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2946{
2947 struct net_device *netdev = data;
2948 struct e1000_adapter *adapter = netdev_priv(netdev);
2949 struct e1000_hw *hw = &adapter->hw;
2950 u32 icr = er32(ICR);
2951
3bb99fe2 2952 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 2953 if (icr & E1000_ICR_RXSEQ) {
2954 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2955 wmb();
2956 }
2957
2958 return IRQ_HANDLED;
2959}
2960
2961/**
2962 * e1000_test_msi_interrupt - Returns 0 for successful test
2963 * @adapter: board private struct
2964 *
2965 * code flow taken from tg3.c
2966 **/
2967static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2968{
2969 struct net_device *netdev = adapter->netdev;
2970 struct e1000_hw *hw = &adapter->hw;
2971 int err;
2972
2973 /* poll_enable hasn't been called yet, so don't need disable */
2974 /* clear any pending events */
2975 er32(ICR);
2976
2977 /* free the real vector and request a test handler */
2978 e1000_free_irq(adapter);
4662e82b 2979 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 2980
2981 /* Assume that the test fails, if it succeeds then the test
2982 * MSI irq handler will unset this flag */
2983 adapter->flags |= FLAG_MSI_TEST_FAILED;
2984
2985 err = pci_enable_msi(adapter->pdev);
2986 if (err)
2987 goto msi_test_failed;
2988
a0607fd3 2989 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 2990 netdev->name, netdev);
2991 if (err) {
2992 pci_disable_msi(adapter->pdev);
2993 goto msi_test_failed;
2994 }
2995
2996 wmb();
2997
2998 e1000_irq_enable(adapter);
2999
3000 /* fire an unusual interrupt on the test handler */
3001 ew32(ICS, E1000_ICS_RXSEQ);
3002 e1e_flush();
3003 msleep(50);
3004
3005 e1000_irq_disable(adapter);
3006
3007 rmb();
3008
3009 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3010 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3011 err = -EIO;
3012 e_info("MSI interrupt test failed!\n");
3013 }
3014
3015 free_irq(adapter->pdev->irq, netdev);
3016 pci_disable_msi(adapter->pdev);
3017
3018 if (err == -EIO)
3019 goto msi_test_failed;
3020
3021 /* okay so the test worked, restore settings */
3bb99fe2 3022 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3023msi_test_failed:
4662e82b 3024 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3025 e1000_request_irq(adapter);
3026 return err;
3027}
3028
3029/**
3030 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3031 * @adapter: board private struct
3032 *
3033 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3034 **/
3035static int e1000_test_msi(struct e1000_adapter *adapter)
3036{
3037 int err;
3038 u16 pci_cmd;
3039
3040 if (!(adapter->flags & FLAG_MSI_ENABLED))
3041 return 0;
3042
3043 /* disable SERR in case the MSI write causes a master abort */
3044 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3045 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3046 pci_cmd & ~PCI_COMMAND_SERR);
3047
3048 err = e1000_test_msi_interrupt(adapter);
3049
3050 /* restore previous setting of command word */
3051 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3052
3053 /* success ! */
3054 if (!err)
3055 return 0;
3056
3057 /* EIO means MSI test failed */
3058 if (err != -EIO)
3059 return err;
3060
3061 /* back to INTx mode */
3062 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3063
3064 e1000_free_irq(adapter);
3065
3066 err = e1000_request_irq(adapter);
3067
3068 return err;
3069}
3070
bc7f75fa
AK		 3071/**
3072 * e1000_open - Called when a network interface is made active
3073 * @netdev: network interface device structure
3074 *
3075 * Returns 0 on success, negative value on failure
3076 *
3077 * The open entry point is called when a network interface is made
3078 * active by the system (IFF_UP). At this point all resources needed
3079 * for transmit and receive operations are allocated, the interrupt
3080 * handler is registered with the OS, the watchdog timer is started,
3081 * and the stack is notified that the interface is ready.
3082 **/
3083static int e1000_open(struct net_device *netdev)
3084{
3085 struct e1000_adapter *adapter = netdev_priv(netdev);
3086 struct e1000_hw *hw = &adapter->hw;
23606cf5 3087 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3088 int err;
3089
3090 /* disallow open during test */
3091 if (test_bit(__E1000_TESTING, &adapter->state))
3092 return -EBUSY;
3093
23606cf5
RW		 3094 pm_runtime_get_sync(&pdev->dev);
3095
9c563d20
JB		 3096 netif_carrier_off(netdev);
3097
bc7f75fa
AK		 3098 /* allocate transmit descriptors */
3099 err = e1000e_setup_tx_resources(adapter);
3100 if (err)
3101 goto err_setup_tx;
3102
3103 /* allocate receive descriptors */
3104 err = e1000e_setup_rx_resources(adapter);
3105 if (err)
3106 goto err_setup_rx;
3107
3108 e1000e_power_up_phy(adapter);
3109
3110 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3111 if ((adapter->hw.mng_cookie.status &
3112 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3113 e1000_update_mng_vlan(adapter);
3114
ad68076e
BA		 3115 /*
3116 * If AMT is enabled, let the firmware know that the network
3117 * interface is now open
3118 */
c43bc57e 3119 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3120 e1000_get_hw_control(adapter);
3121
ad68076e
BA		 3122 /*
3123 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3124 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3125 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3126 * clean_rx handler before we do so.
3127 */
bc7f75fa
AK		 3128 e1000_configure(adapter);
3129
3130 err = e1000_request_irq(adapter);
3131 if (err)
3132 goto err_req_irq;
3133
f8d59f78
BA		 3134 /*
3135 * Work around PCIe errata with MSI interrupts causing some chipsets to
3136 * ignore e1000e MSI messages, which means we need to test our MSI
3137 * interrupt now
3138 */
4662e82b 3139 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3140 err = e1000_test_msi(adapter);
3141 if (err) {
3142 e_err("Interrupt allocation failed\n");
3143 goto err_req_irq;
3144 }
3145 }
3146
bc7f75fa
AK		 3147 /* From here on the code is the same as e1000e_up() */
3148 clear_bit(__E1000_DOWN, &adapter->state);
3149
3150 napi_enable(&adapter->napi);
3151
3152 e1000_irq_enable(adapter);
3153
4cb9be7a 3154 netif_start_queue(netdev);
d55b53ff 3155
23606cf5
RW		 3156 adapter->idle_check = true;
3157 pm_runtime_put(&pdev->dev);
3158
bc7f75fa
AK		 3159 /* fire a link status change interrupt to start the watchdog */
3160 ew32(ICS, E1000_ICS_LSC);
3161
3162 return 0;
3163
3164err_req_irq:
3165 e1000_release_hw_control(adapter);
3166 e1000_power_down_phy(adapter);
3167 e1000e_free_rx_resources(adapter);
3168err_setup_rx:
3169 e1000e_free_tx_resources(adapter);
3170err_setup_tx:
3171 e1000e_reset(adapter);
23606cf5 3172 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3173
3174 return err;
3175}
3176
3177/**
3178 * e1000_close - Disables a network interface
3179 * @netdev: network interface device structure
3180 *
3181 * Returns 0, this is not allowed to fail
3182 *
3183 * The close entry point is called when an interface is de-activated
3184 * by the OS. The hardware is still under the drivers control, but
3185 * needs to be disabled. A global MAC reset is issued to stop the
3186 * hardware, and all transmit and receive resources are freed.
3187 **/
3188static int e1000_close(struct net_device *netdev)
3189{
3190 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3191 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3192
3193 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3194
3195 pm_runtime_get_sync(&pdev->dev);
3196
3197 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3198 e1000e_down(adapter);
3199 e1000_free_irq(adapter);
3200 }
bc7f75fa 3201 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3202
3203 e1000e_free_tx_resources(adapter);
3204 e1000e_free_rx_resources(adapter);
3205
ad68076e
BA		 3206 /*
3207 * kill manageability vlan ID if supported, but not if a vlan with
3208 * the same ID is registered on the host OS (let 8021q kill it)
3209 */
bc7f75fa
AK		 3210 if ((adapter->hw.mng_cookie.status &
3211 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3212 !(adapter->vlgrp &&
3213 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3214 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3215
ad68076e
BA		 3216 /*
3217 * If AMT is enabled, let the firmware know that the network
3218 * interface is now closed
3219 */
c43bc57e 3220 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3221 e1000_release_hw_control(adapter);
3222
23606cf5
RW		 3223 pm_runtime_put_sync(&pdev->dev);
3224
bc7f75fa
AK		 3225 return 0;
3226}
3227/**
3228 * e1000_set_mac - Change the Ethernet Address of the NIC
3229 * @netdev: network interface device structure
3230 * @p: pointer to an address structure
3231 *
3232 * Returns 0 on success, negative on failure
3233 **/
3234static int e1000_set_mac(struct net_device *netdev, void *p)
3235{
3236 struct e1000_adapter *adapter = netdev_priv(netdev);
3237 struct sockaddr *addr = p;
3238
3239 if (!is_valid_ether_addr(addr->sa_data))
3240 return -EADDRNOTAVAIL;
3241
3242 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3243 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3244
3245 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3246
3247 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3248 /* activate the work around */
3249 e1000e_set_laa_state_82571(&adapter->hw, 1);
3250
ad68076e
BA		 3251 /*
3252 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3253 * between the time RAR[0] gets clobbered and the time it
3254 * gets fixed (in e1000_watchdog), the actual LAA is in one
3255 * of the RARs and no incoming packets directed to this port
3256 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3257 * RAR[14]
3258 */
bc7f75fa
AK		 3259 e1000e_rar_set(&adapter->hw,
3260 adapter->hw.mac.addr,
3261 adapter->hw.mac.rar_entry_count - 1);
3262 }
3263
3264 return 0;
3265}
3266
a8f88ff5
JB		 3267/**
3268 * e1000e_update_phy_task - work thread to update phy
3269 * @work: pointer to our work struct
3270 *
3271 * this worker thread exists because we must acquire a
3272 * semaphore to read the phy, which we could msleep while
3273 * waiting for it, and we can't msleep in a timer.
3274 **/
3275static void e1000e_update_phy_task(struct work_struct *work)
3276{
3277 struct e1000_adapter *adapter = container_of(work,
3278 struct e1000_adapter, update_phy_task);
3279 e1000_get_phy_info(&adapter->hw);
3280}
3281
ad68076e
BA		 3282/*
3283 * Need to wait a few seconds after link up to get diagnostic information from
3284 * the phy
3285 */
bc7f75fa
AK		 3286static void e1000_update_phy_info(unsigned long data)
3287{
3288 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3289 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3290}
3291
3292/**
3293 * e1000e_update_stats - Update the board statistics counters
3294 * @adapter: board private structure
3295 **/
3296void e1000e_update_stats(struct e1000_adapter *adapter)
3297{
7274c20f 3298 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3299 struct e1000_hw *hw = &adapter->hw;
3300 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3301 u16 phy_data;
bc7f75fa
AK		 3302
3303 /*
3304 * Prevent stats update while adapter is being reset, or if the pci
3305 * connection is down.
3306 */
3307 if (adapter->link_speed == 0)
3308 return;
3309 if (pci_channel_offline(pdev))
3310 return;
3311
bc7f75fa
AK		 3312 adapter->stats.crcerrs += er32(CRCERRS);
3313 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3314 adapter->stats.gorc += er32(GORCL);
3315 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3316 adapter->stats.bprc += er32(BPRC);
3317 adapter->stats.mprc += er32(MPRC);
3318 adapter->stats.roc += er32(ROC);
3319
bc7f75fa 3320 adapter->stats.mpc += er32(MPC);
a4f58f54
BA		 3321 if ((hw->phy.type == e1000_phy_82578) ||
3322 (hw->phy.type == e1000_phy_82577)) {
3323 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
29477e24
BA		 3324 if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data))
3325 adapter->stats.scc += phy_data;
a4f58f54
BA		 3326
3327 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
29477e24
BA		 3328 if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data))
3329 adapter->stats.ecol += phy_data;
a4f58f54
BA		 3330
3331 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
29477e24
BA		 3332 if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data))
3333 adapter->stats.mcc += phy_data;
a4f58f54
BA		 3334
3335 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
29477e24
BA		 3336 if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data))
3337 adapter->stats.latecol += phy_data;
a4f58f54
BA		 3338
3339 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
29477e24
BA		 3340 if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data))
3341 adapter->stats.dc += phy_data;
a4f58f54
BA		 3342 } else {
3343 adapter->stats.scc += er32(SCC);
3344 adapter->stats.ecol += er32(ECOL);
3345 adapter->stats.mcc += er32(MCC);
3346 adapter->stats.latecol += er32(LATECOL);
3347 adapter->stats.dc += er32(DC);
3348 }
bc7f75fa
AK		 3349 adapter->stats.xonrxc += er32(XONRXC);
3350 adapter->stats.xontxc += er32(XONTXC);
3351 adapter->stats.xoffrxc += er32(XOFFRXC);
3352 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3353 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3354 adapter->stats.gotc += er32(GOTCL);
3355 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3356 adapter->stats.rnbc += er32(RNBC);
3357 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3358
3359 adapter->stats.mptc += er32(MPTC);
3360 adapter->stats.bptc += er32(BPTC);
3361
3362 /* used for adaptive IFS */
3363
3364 hw->mac.tx_packet_delta = er32(TPT);
3365 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA		 3366 if ((hw->phy.type == e1000_phy_82578) ||
3367 (hw->phy.type == e1000_phy_82577)) {
3368 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
29477e24
BA		 3369 if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data))
3370 hw->mac.collision_delta = phy_data;
a4f58f54
BA		 3371 } else {
3372 hw->mac.collision_delta = er32(COLC);
3373 }
bc7f75fa
AK		 3374 adapter->stats.colc += hw->mac.collision_delta;
3375
3376 adapter->stats.algnerrc += er32(ALGNERRC);
3377 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA		 3378 if ((hw->phy.type == e1000_phy_82578) ||
3379 (hw->phy.type == e1000_phy_82577)) {
3380 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
29477e24
BA		 3381 if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data))
3382 adapter->stats.tncrs += phy_data;
a4f58f54
BA		 3383 } else {
3384 if ((hw->mac.type != e1000_82574) &&
3385 (hw->mac.type != e1000_82583))
3386 adapter->stats.tncrs += er32(TNCRS);
3387 }
bc7f75fa
AK		 3388 adapter->stats.cexterr += er32(CEXTERR);
3389 adapter->stats.tsctc += er32(TSCTC);
3390 adapter->stats.tsctfc += er32(TSCTFC);
3391
bc7f75fa 3392 /* Fill out the OS statistics structure */
7274c20f
AK		 3393 netdev->stats.multicast = adapter->stats.mprc;
3394 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3395
3396 /* Rx Errors */
3397
ad68076e
BA		 3398 /*
3399 * RLEC on some newer hardware can be incorrect so build
3400 * our own version based on RUC and ROC
3401 */
7274c20f 3402 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3403 adapter->stats.crcerrs + adapter->stats.algnerrc +
3404 adapter->stats.ruc + adapter->stats.roc +
3405 adapter->stats.cexterr;
7274c20f 3406 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3407 adapter->stats.roc;
7274c20f
AK		 3408 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3409 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3410 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3411
3412 /* Tx Errors */
7274c20f 3413 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3414 adapter->stats.latecol;
7274c20f
AK		 3415 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3416 netdev->stats.tx_window_errors = adapter->stats.latecol;
3417 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3418
3419 /* Tx Dropped needs to be maintained elsewhere */
3420
bc7f75fa
AK		 3421 /* Management Stats */
3422 adapter->stats.mgptc += er32(MGTPTC);
3423 adapter->stats.mgprc += er32(MGTPRC);
3424 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3425}
3426
7c25769f
BA		 3427/**
3428 * e1000_phy_read_status - Update the PHY register status snapshot
3429 * @adapter: board private structure
3430 **/
3431static void e1000_phy_read_status(struct e1000_adapter *adapter)
3432{
3433 struct e1000_hw *hw = &adapter->hw;
3434 struct e1000_phy_regs *phy = &adapter->phy_regs;
3435 int ret_val;
7c25769f
BA		 3436
3437 if ((er32(STATUS) & E1000_STATUS_LU) &&
3438 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3439 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3440 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3441 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3442 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3443 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3444 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3445 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3446 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3447 if (ret_val)
44defeb3 3448 e_warn("Error reading PHY register\n");
7c25769f
BA		 3449 } else {
3450 /*
3451 * Do not read PHY registers if link is not up
3452 * Set values to typical power-on defaults
3453 */
3454 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3455 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3456 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3457 BMSR_ERCAP);
3458 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3459 ADVERTISE_ALL | ADVERTISE_CSMA);
3460 phy->lpa = 0;
3461 phy->expansion = EXPANSION_ENABLENPAGE;
3462 phy->ctrl1000 = ADVERTISE_1000FULL;
3463 phy->stat1000 = 0;
3464 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3465 }
7c25769f
BA		 3466}
3467
bc7f75fa
AK		 3468static void e1000_print_link_info(struct e1000_adapter *adapter)
3469{
bc7f75fa
AK		 3470 struct e1000_hw *hw = &adapter->hw;
3471 u32 ctrl = er32(CTRL);
3472
8f12fe86
BA		 3473 /* Link status message must follow this format for user tools */
3474 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3475 "Flow Control: %s\n",
3476 adapter->netdev->name,
44defeb3
JK		 3477 adapter->link_speed,
3478 (adapter->link_duplex == FULL_DUPLEX) ?
3479 "Full Duplex" : "Half Duplex",
3480 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3481 "RX/TX" :
3482 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3483 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3484}
3485
b405e8df 3486bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3487{
3488 struct e1000_hw *hw = &adapter->hw;
3489 bool link_active = 0;
3490 s32 ret_val = 0;
3491
3492 /*
3493 * get_link_status is set on LSC (link status) interrupt or
3494 * Rx sequence error interrupt. get_link_status will stay
3495 * false until the check_for_link establishes link
3496 * for copper adapters ONLY
3497 */
3498 switch (hw->phy.media_type) {
3499 case e1000_media_type_copper:
3500 if (hw->mac.get_link_status) {
3501 ret_val = hw->mac.ops.check_for_link(hw);
3502 link_active = !hw->mac.get_link_status;
3503 } else {
3504 link_active = 1;
3505 }
3506 break;
3507 case e1000_media_type_fiber:
3508 ret_val = hw->mac.ops.check_for_link(hw);
3509 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3510 break;
3511 case e1000_media_type_internal_serdes:
3512 ret_val = hw->mac.ops.check_for_link(hw);
3513 link_active = adapter->hw.mac.serdes_has_link;
3514 break;
3515 default:
3516 case e1000_media_type_unknown:
3517 break;
3518 }
3519
3520 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3521 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3522 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3523 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3524 }
3525
3526 return link_active;
3527}
3528
3529static void e1000e_enable_receives(struct e1000_adapter *adapter)
3530{
3531 /* make sure the receive unit is started */
3532 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3533 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3534 struct e1000_hw *hw = &adapter->hw;
3535 u32 rctl = er32(RCTL);
3536 ew32(RCTL, rctl | E1000_RCTL_EN);
3537 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3538 }
3539}
3540
bc7f75fa
AK		 3541/**
3542 * e1000_watchdog - Timer Call-back
3543 * @data: pointer to adapter cast into an unsigned long
3544 **/
3545static void e1000_watchdog(unsigned long data)
3546{
3547 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3548
3549 /* Do the rest outside of interrupt context */
3550 schedule_work(&adapter->watchdog_task);
3551
3552 /* TODO: make this use queue_delayed_work() */
3553}
3554
3555static void e1000_watchdog_task(struct work_struct *work)
3556{
3557 struct e1000_adapter *adapter = container_of(work,
3558 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3559 struct net_device *netdev = adapter->netdev;
3560 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3561 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3562 struct e1000_ring *tx_ring = adapter->tx_ring;
3563 struct e1000_hw *hw = &adapter->hw;
3564 u32 link, tctl;
bc7f75fa
AK		 3565 int tx_pending = 0;
3566
b405e8df 3567 link = e1000e_has_link(adapter);
318a94d6 3568 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 3569 /* Cancel scheduled suspend requests. */
3570 pm_runtime_resume(netdev->dev.parent);
3571
318a94d6 3572 e1000e_enable_receives(adapter);
bc7f75fa 3573 goto link_up;
bc7f75fa
AK		 3574 }
3575
3576 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3577 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3578 e1000_update_mng_vlan(adapter);
3579
bc7f75fa
AK		 3580 if (link) {
3581 if (!netif_carrier_ok(netdev)) {
3582 bool txb2b = 1;
23606cf5
RW		 3583
3584 /* Cancel scheduled suspend requests. */
3585 pm_runtime_resume(netdev->dev.parent);
3586
318a94d6 3587 /* update snapshot of PHY registers on LSC */
7c25769f 3588 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3589 mac->ops.get_link_up_info(&adapter->hw,
3590 &adapter->link_speed,
3591 &adapter->link_duplex);
3592 e1000_print_link_info(adapter);
f4187b56
BA		 3593 /*
3594 * On supported PHYs, check for duplex mismatch only
3595 * if link has autonegotiated at 10/100 half
3596 */
3597 if ((hw->phy.type == e1000_phy_igp_3 ||
3598 hw->phy.type == e1000_phy_bm) &&
3599 (hw->mac.autoneg == true) &&
3600 (adapter->link_speed == SPEED_10 ||
3601 adapter->link_speed == SPEED_100) &&
3602 (adapter->link_duplex == HALF_DUPLEX)) {
3603 u16 autoneg_exp;
3604
3605 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3606
3607 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3608 e_info("Autonegotiated half duplex but"
3609 " link partner cannot autoneg. "
3610 " Try forcing full duplex if "
3611 "link gets many collisions.\n");
3612 }
3613
ad68076e
BA		 3614 /*
3615 * tweak tx_queue_len according to speed/duplex
3616 * and adjust the timeout factor
3617 */
bc7f75fa
AK		 3618 netdev->tx_queue_len = adapter->tx_queue_len;
3619 adapter->tx_timeout_factor = 1;
3620 switch (adapter->link_speed) {
3621 case SPEED_10:
3622 txb2b = 0;
3623 netdev->tx_queue_len = 10;
10f1b492 3624 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3625 break;
3626 case SPEED_100:
3627 txb2b = 0;
3628 netdev->tx_queue_len = 100;
4c86e0b9 3629 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 3630 break;
3631 }
3632
ad68076e
BA		 3633 /*
3634 * workaround: re-program speed mode bit after
3635 * link-up event
3636 */
bc7f75fa
AK		 3637 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3638 !txb2b) {
3639 u32 tarc0;
e9ec2c0f 3640 tarc0 = er32(TARC(0));
bc7f75fa 3641 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3642 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3643 }
3644
ad68076e
BA		 3645 /*
3646 * disable TSO for pcie and 10/100 speeds, to avoid
3647 * some hardware issues
3648 */
bc7f75fa
AK		 3649 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3650 switch (adapter->link_speed) {
3651 case SPEED_10:
3652 case SPEED_100:
44defeb3 3653 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3654 netdev->features &= ~NETIF_F_TSO;
3655 netdev->features &= ~NETIF_F_TSO6;
3656 break;
3657 case SPEED_1000:
3658 netdev->features |= NETIF_F_TSO;
3659 netdev->features |= NETIF_F_TSO6;
3660 break;
3661 default:
3662 /* oops */
3663 break;
3664 }
3665 }
3666
ad68076e
BA		 3667 /*
3668 * enable transmits in the hardware, need to do this
3669 * after setting TARC(0)
3670 */
bc7f75fa
AK		 3671 tctl = er32(TCTL);
3672 tctl |= E1000_TCTL_EN;
3673 ew32(TCTL, tctl);
3674
75eb0fad
BA		 3675 /*
3676 * Perform any post-link-up configuration before
3677 * reporting link up.
3678 */
3679 if (phy->ops.cfg_on_link_up)
3680 phy->ops.cfg_on_link_up(hw);
3681
bc7f75fa 3682 netif_carrier_on(netdev);
bc7f75fa
AK		 3683
3684 if (!test_bit(__E1000_DOWN, &adapter->state))
3685 mod_timer(&adapter->phy_info_timer,
3686 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3687 }
3688 } else {
3689 if (netif_carrier_ok(netdev)) {
3690 adapter->link_speed = 0;
3691 adapter->link_duplex = 0;
8f12fe86
BA		 3692 /* Link status message must follow this format */
3693 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3694 adapter->netdev->name);
bc7f75fa 3695 netif_carrier_off(netdev);
bc7f75fa
AK		 3696 if (!test_bit(__E1000_DOWN, &adapter->state))
3697 mod_timer(&adapter->phy_info_timer,
3698 round_jiffies(jiffies + 2 * HZ));
3699
3700 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3701 schedule_work(&adapter->reset_task);
23606cf5
RW		 3702 else
3703 pm_schedule_suspend(netdev->dev.parent,
3704 LINK_TIMEOUT);
bc7f75fa
AK		 3705 }
3706 }
3707
3708link_up:
3709 e1000e_update_stats(adapter);
3710
3711 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3712 adapter->tpt_old = adapter->stats.tpt;
3713 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3714 adapter->colc_old = adapter->stats.colc;
3715
7c25769f
BA		 3716 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3717 adapter->gorc_old = adapter->stats.gorc;
3718 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3719 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3720
3721 e1000e_update_adaptive(&adapter->hw);
3722
3723 if (!netif_carrier_ok(netdev)) {
3724 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3725 tx_ring->count);
3726 if (tx_pending) {
ad68076e
BA		 3727 /*
3728 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3729 * but we've got queued Tx work that's never going
3730 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3731 * (Do the reset outside of interrupt context).
3732 */
bc7f75fa
AK		 3733 adapter->tx_timeout_count++;
3734 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 3735 /* return immediately since reset is imminent */
3736 return;
bc7f75fa
AK		 3737 }
3738 }
3739
ad68076e 3740 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 3741 if (adapter->msix_entries)
3742 ew32(ICS, adapter->rx_ring->ims_val);
3743 else
3744 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 3745
3746 /* Force detection of hung controller every watchdog period */
3747 adapter->detect_tx_hung = 1;
3748
ad68076e
BA		 3749 /*
3750 * With 82571 controllers, LAA may be overwritten due to controller
3751 * reset from the other port. Set the appropriate LAA in RAR[0]
3752 */
bc7f75fa
AK		 3753 if (e1000e_get_laa_state_82571(hw))
3754 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3755
3756 /* Reset the timer */
3757 if (!test_bit(__E1000_DOWN, &adapter->state))
3758 mod_timer(&adapter->watchdog_timer,
3759 round_jiffies(jiffies + 2 * HZ));
3760}
3761
3762#define E1000_TX_FLAGS_CSUM 0x00000001
3763#define E1000_TX_FLAGS_VLAN 0x00000002
3764#define E1000_TX_FLAGS_TSO 0x00000004
3765#define E1000_TX_FLAGS_IPV4 0x00000008
3766#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3767#define E1000_TX_FLAGS_VLAN_SHIFT 16
3768
3769static int e1000_tso(struct e1000_adapter *adapter,
3770 struct sk_buff *skb)
3771{
3772 struct e1000_ring *tx_ring = adapter->tx_ring;
3773 struct e1000_context_desc *context_desc;
3774 struct e1000_buffer *buffer_info;
3775 unsigned int i;
3776 u32 cmd_length = 0;
3777 u16 ipcse = 0, tucse, mss;
3778 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3779 int err;
3780
3d5e33c9
BA		 3781 if (!skb_is_gso(skb))
3782 return 0;
bc7f75fa 3783
3d5e33c9
BA		 3784 if (skb_header_cloned(skb)) {
3785 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3786 if (err)
3787 return err;
bc7f75fa
AK		 3788 }
3789
3d5e33c9
BA		 3790 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3791 mss = skb_shinfo(skb)->gso_size;
3792 if (skb->protocol == htons(ETH_P_IP)) {
3793 struct iphdr *iph = ip_hdr(skb);
3794 iph->tot_len = 0;
3795 iph->check = 0;
3796 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
3797 0, IPPROTO_TCP, 0);
3798 cmd_length = E1000_TXD_CMD_IP;
3799 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 3800 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 3801 ipv6_hdr(skb)->payload_len = 0;
3802 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3803 &ipv6_hdr(skb)->daddr,
3804 0, IPPROTO_TCP, 0);
3805 ipcse = 0;
3806 }
3807 ipcss = skb_network_offset(skb);
3808 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3809 tucss = skb_transport_offset(skb);
3810 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3811 tucse = 0;
3812
3813 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3814 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3815
3816 i = tx_ring->next_to_use;
3817 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3818 buffer_info = &tx_ring->buffer_info[i];
3819
3820 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3821 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3822 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3823 context_desc->upper_setup.tcp_fields.tucss = tucss;
3824 context_desc->upper_setup.tcp_fields.tucso = tucso;
3825 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3826 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3827 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3828 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3829
3830 buffer_info->time_stamp = jiffies;
3831 buffer_info->next_to_watch = i;
3832
3833 i++;
3834 if (i == tx_ring->count)
3835 i = 0;
3836 tx_ring->next_to_use = i;
3837
3838 return 1;
bc7f75fa
AK		 3839}
3840
3841static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3842{
3843 struct e1000_ring *tx_ring = adapter->tx_ring;
3844 struct e1000_context_desc *context_desc;
3845 struct e1000_buffer *buffer_info;
3846 unsigned int i;
3847 u8 css;
af807c82 3848 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 3849 __be16 protocol;
bc7f75fa 3850
af807c82
DG		 3851 if (skb->ip_summed != CHECKSUM_PARTIAL)
3852 return 0;
bc7f75fa 3853
5f66f208
AJ		 3854 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3855 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3856 else
3857 protocol = skb->protocol;
3858
3f518390 3859 switch (protocol) {
09640e63 3860 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 3861 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3862 cmd_len |= E1000_TXD_CMD_TCP;
3863 break;
09640e63 3864 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 3865 /* XXX not handling all IPV6 headers */
3866 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3867 cmd_len |= E1000_TXD_CMD_TCP;
3868 break;
3869 default:
3870 if (unlikely(net_ratelimit()))
5f66f208
AJ		 3871 e_warn("checksum_partial proto=%x!\n",
3872 be16_to_cpu(protocol));
af807c82 3873 break;
bc7f75fa
AK		 3874 }
3875
af807c82
DG		 3876 css = skb_transport_offset(skb);
3877
3878 i = tx_ring->next_to_use;
3879 buffer_info = &tx_ring->buffer_info[i];
3880 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3881
3882 context_desc->lower_setup.ip_config = 0;
3883 context_desc->upper_setup.tcp_fields.tucss = css;
3884 context_desc->upper_setup.tcp_fields.tucso =
3885 css + skb->csum_offset;
3886 context_desc->upper_setup.tcp_fields.tucse = 0;
3887 context_desc->tcp_seg_setup.data = 0;
3888 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3889
3890 buffer_info->time_stamp = jiffies;
3891 buffer_info->next_to_watch = i;
3892
3893 i++;
3894 if (i == tx_ring->count)
3895 i = 0;
3896 tx_ring->next_to_use = i;
3897
3898 return 1;
bc7f75fa
AK		 3899}
3900
3901#define E1000_MAX_PER_TXD 8192
3902#define E1000_MAX_TXD_PWR 12
3903
3904static int e1000_tx_map(struct e1000_adapter *adapter,
3905 struct sk_buff *skb, unsigned int first,
3906 unsigned int max_per_txd, unsigned int nr_frags,
3907 unsigned int mss)
3908{
3909 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 3910 struct pci_dev *pdev = adapter->pdev;
1b7719c4 3911 struct e1000_buffer *buffer_info;
8ddc951c 3912 unsigned int len = skb_headlen(skb);
03b1320d 3913 unsigned int offset = 0, size, count = 0, i;
bc7f75fa
AK		 3914 unsigned int f;
3915
3916 i = tx_ring->next_to_use;
3917
3918 while (len) {
1b7719c4 3919 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 3920 size = min(len, max_per_txd);
3921
bc7f75fa 3922 buffer_info->length = size;
bc7f75fa 3923 buffer_info->time_stamp = jiffies;
bc7f75fa 3924 buffer_info->next_to_watch = i;
03b1320d
AD		 3925 buffer_info->dma = pci_map_single(pdev, skb->data + offset,
3926 size, PCI_DMA_TODEVICE);
3927 buffer_info->mapped_as_page = false;
3928 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3929 goto dma_error;
bc7f75fa
AK		 3930
3931 len -= size;
3932 offset += size;
03b1320d 3933 count++;
1b7719c4
AD		 3934
3935 if (len) {
3936 i++;
3937 if (i == tx_ring->count)
3938 i = 0;
3939 }
bc7f75fa
AK		 3940 }
3941
3942 for (f = 0; f < nr_frags; f++) {
3943 struct skb_frag_struct *frag;
3944
3945 frag = &skb_shinfo(skb)->frags[f];
3946 len = frag->size;
03b1320d 3947 offset = frag->page_offset;
bc7f75fa
AK		 3948
3949 while (len) {
1b7719c4
AD		 3950 i++;
3951 if (i == tx_ring->count)
3952 i = 0;
3953
bc7f75fa
AK		 3954 buffer_info = &tx_ring->buffer_info[i];
3955 size = min(len, max_per_txd);
bc7f75fa
AK		 3956
3957 buffer_info->length = size;
3958 buffer_info->time_stamp = jiffies;
bc7f75fa 3959 buffer_info->next_to_watch = i;
03b1320d
AD		 3960 buffer_info->dma = pci_map_page(pdev, frag->page,
3961 offset, size,
3962 PCI_DMA_TODEVICE);
3963 buffer_info->mapped_as_page = true;
3964 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3965 goto dma_error;
bc7f75fa
AK		 3966
3967 len -= size;
3968 offset += size;
3969 count++;
bc7f75fa
AK		 3970 }
3971 }
3972
bc7f75fa
AK		 3973 tx_ring->buffer_info[i].skb = skb;
3974 tx_ring->buffer_info[first].next_to_watch = i;
3975
3976 return count;
03b1320d
AD		 3977
3978dma_error:
3979 dev_err(&pdev->dev, "TX DMA map failed\n");
3980 buffer_info->dma = 0;
c1fa347f 3981 if (count)
03b1320d 3982 count--;
c1fa347f
RK		 3983
3984 while (count--) {
3985 if (i==0)
03b1320d 3986 i += tx_ring->count;
c1fa347f 3987 i--;
03b1320d
AD		 3988 buffer_info = &tx_ring->buffer_info[i];
3989 e1000_put_txbuf(adapter, buffer_info);;
3990 }
3991
3992 return 0;
bc7f75fa
AK		 3993}
3994
3995static void e1000_tx_queue(struct e1000_adapter *adapter,
3996 int tx_flags, int count)
3997{
3998 struct e1000_ring *tx_ring = adapter->tx_ring;
3999 struct e1000_tx_desc *tx_desc = NULL;
4000 struct e1000_buffer *buffer_info;
4001 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4002 unsigned int i;
4003
4004 if (tx_flags & E1000_TX_FLAGS_TSO) {
4005 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4006 E1000_TXD_CMD_TSE;
4007 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4008
4009 if (tx_flags & E1000_TX_FLAGS_IPV4)
4010 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4011 }
4012
4013 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4014 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4015 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4016 }
4017
4018 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4019 txd_lower |= E1000_TXD_CMD_VLE;
4020 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4021 }
4022
4023 i = tx_ring->next_to_use;
4024
4025 while (count--) {
4026 buffer_info = &tx_ring->buffer_info[i];
4027 tx_desc = E1000_TX_DESC(*tx_ring, i);
4028 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4029 tx_desc->lower.data =
4030 cpu_to_le32(txd_lower | buffer_info->length);
4031 tx_desc->upper.data = cpu_to_le32(txd_upper);
4032
4033 i++;
4034 if (i == tx_ring->count)
4035 i = 0;
4036 }
4037
4038 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4039
ad68076e
BA		 4040 /*
4041 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4042 * know there are new descriptors to fetch. (Only
4043 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4044 * such as IA-64).
4045 */
bc7f75fa
AK		 4046 wmb();
4047
4048 tx_ring->next_to_use = i;
4049 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4050 /*
4051 * we need this if more than one processor can write to our tail
4052 * at a time, it synchronizes IO on IA64/Altix systems
4053 */
bc7f75fa
AK		 4054 mmiowb();
4055}
4056
4057#define MINIMUM_DHCP_PACKET_SIZE 282
4058static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4059 struct sk_buff *skb)
4060{
4061 struct e1000_hw *hw = &adapter->hw;
4062 u16 length, offset;
4063
4064 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4065 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4066 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4067 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4068 return 0;
4069 }
4070
4071 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4072 return 0;
4073
4074 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4075 return 0;
4076
4077 {
4078 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4079 struct udphdr *udp;
4080
4081 if (ip->protocol != IPPROTO_UDP)
4082 return 0;
4083
4084 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4085 if (ntohs(udp->dest) != 67)
4086 return 0;
4087
4088 offset = (u8 *)udp + 8 - skb->data;
4089 length = skb->len - offset;
4090 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4091 }
4092
4093 return 0;
4094}
4095
4096static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4097{
4098 struct e1000_adapter *adapter = netdev_priv(netdev);
4099
4100 netif_stop_queue(netdev);
ad68076e
BA		 4101 /*
4102 * Herbert's original patch had:
bc7f75fa 4103 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4104 * but since that doesn't exist yet, just open code it.
4105 */
bc7f75fa
AK		 4106 smp_mb();
4107
ad68076e
BA		 4108 /*
4109 * We need to check again in a case another CPU has just
4110 * made room available.
4111 */
bc7f75fa
AK		 4112 if (e1000_desc_unused(adapter->tx_ring) < size)
4113 return -EBUSY;
4114
4115 /* A reprieve! */
4116 netif_start_queue(netdev);
4117 ++adapter->restart_queue;
4118 return 0;
4119}
4120
4121static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4122{
4123 struct e1000_adapter *adapter = netdev_priv(netdev);
4124
4125 if (e1000_desc_unused(adapter->tx_ring) >= size)
4126 return 0;
4127 return __e1000_maybe_stop_tx(netdev, size);
4128}
4129
4130#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4131static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4132 struct net_device *netdev)
bc7f75fa
AK		 4133{
4134 struct e1000_adapter *adapter = netdev_priv(netdev);
4135 struct e1000_ring *tx_ring = adapter->tx_ring;
4136 unsigned int first;
4137 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4138 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4139 unsigned int tx_flags = 0;
4e6c709c 4140 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK		 4141 unsigned int nr_frags;
4142 unsigned int mss;
bc7f75fa
AK		 4143 int count = 0;
4144 int tso;
4145 unsigned int f;
bc7f75fa
AK		 4146
4147 if (test_bit(__E1000_DOWN, &adapter->state)) {
4148 dev_kfree_skb_any(skb);
4149 return NETDEV_TX_OK;
4150 }
4151
4152 if (skb->len <= 0) {
4153 dev_kfree_skb_any(skb);
4154 return NETDEV_TX_OK;
4155 }
4156
4157 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4158 /*
4159 * The controller does a simple calculation to
bc7f75fa
AK		 4160 * make sure there is enough room in the FIFO before
4161 * initiating the DMA for each buffer. The calc is:
4162 * 4 = ceil(buffer len/mss). To make sure we don't
4163 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4164 * drops.
4165 */
bc7f75fa
AK		 4166 if (mss) {
4167 u8 hdr_len;
4168 max_per_txd = min(mss << 2, max_per_txd);
4169 max_txd_pwr = fls(max_per_txd) - 1;
4170
ad68076e
BA		 4171 /*
4172 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4173 * points to just header, pull a few bytes of payload from
4174 * frags into skb->data
4175 */
bc7f75fa 4176 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4177 /*
4178 * we do this workaround for ES2LAN, but it is un-necessary,
4179 * avoiding it could save a lot of cycles
4180 */
4e6c709c 4181 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4182 unsigned int pull_size;
4183
4184 pull_size = min((unsigned int)4, skb->data_len);
4185 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4186 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4187 dev_kfree_skb_any(skb);
4188 return NETDEV_TX_OK;
4189 }
4190 len = skb->len - skb->data_len;
4191 }
4192 }
4193
4194 /* reserve a descriptor for the offload context */
4195 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4196 count++;
4197 count++;
4198
4199 count += TXD_USE_COUNT(len, max_txd_pwr);
4200
4201 nr_frags = skb_shinfo(skb)->nr_frags;
4202 for (f = 0; f < nr_frags; f++)
4203 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4204 max_txd_pwr);
4205
4206 if (adapter->hw.mac.tx_pkt_filtering)
4207 e1000_transfer_dhcp_info(adapter, skb);
4208
ad68076e
BA		 4209 /*
4210 * need: count + 2 desc gap to keep tail from touching
4211 * head, otherwise try next time
4212 */
92af3e95 4213 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4214 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4215
4216 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4217 tx_flags |= E1000_TX_FLAGS_VLAN;
4218 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4219 }
4220
4221 first = tx_ring->next_to_use;
4222
4223 tso = e1000_tso(adapter, skb);
4224 if (tso < 0) {
4225 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4226 return NETDEV_TX_OK;
4227 }
4228
4229 if (tso)
4230 tx_flags |= E1000_TX_FLAGS_TSO;
4231 else if (e1000_tx_csum(adapter, skb))
4232 tx_flags |= E1000_TX_FLAGS_CSUM;
4233
ad68076e
BA		 4234 /*
4235 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4236 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4237 * no longer assume, we must.
4238 */
bc7f75fa
AK		 4239 if (skb->protocol == htons(ETH_P_IP))
4240 tx_flags |= E1000_TX_FLAGS_IPV4;
4241
1b7719c4 4242 /* if count is 0 then mapping error has occured */
bc7f75fa 4243 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4244 if (count) {
4245 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4246 /* Make sure there is space in the ring for the next send. */
4247 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4248
4249 } else {
bc7f75fa 4250 dev_kfree_skb_any(skb);
1b7719c4
AD		 4251 tx_ring->buffer_info[first].time_stamp = 0;
4252 tx_ring->next_to_use = first;
bc7f75fa
AK		 4253 }
4254
bc7f75fa
AK		 4255 return NETDEV_TX_OK;
4256}
4257
4258/**
4259 * e1000_tx_timeout - Respond to a Tx Hang
4260 * @netdev: network interface device structure
4261 **/
4262static void e1000_tx_timeout(struct net_device *netdev)
4263{
4264 struct e1000_adapter *adapter = netdev_priv(netdev);
4265
4266 /* Do the reset outside of interrupt context */
4267 adapter->tx_timeout_count++;
4268 schedule_work(&adapter->reset_task);
4269}
4270
4271static void e1000_reset_task(struct work_struct *work)
4272{
4273 struct e1000_adapter *adapter;
4274 adapter = container_of(work, struct e1000_adapter, reset_task);
4275
4276 e1000e_reinit_locked(adapter);
4277}
4278
4279/**
4280 * e1000_get_stats - Get System Network Statistics
4281 * @netdev: network interface device structure
4282 *
4283 * Returns the address of the device statistics structure.
4284 * The statistics are actually updated from the timer callback.
4285 **/
4286static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4287{
bc7f75fa 4288 /* only return the current stats */
7274c20f 4289 return &netdev->stats;
bc7f75fa
AK		 4290}
4291
4292/**
4293 * e1000_change_mtu - Change the Maximum Transfer Unit
4294 * @netdev: network interface device structure
4295 * @new_mtu: new value for maximum frame size
4296 *
4297 * Returns 0 on success, negative on failure
4298 **/
4299static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4300{
4301 struct e1000_adapter *adapter = netdev_priv(netdev);
4302 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4303
2adc55c9
BA		 4304 /* Jumbo frame support */
4305 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4306 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4307 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4308 return -EINVAL;
4309 }
4310
2adc55c9
BA		 4311 /* Supported frame sizes */
4312 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4313 (max_frame > adapter->max_hw_frame_size)) {
4314 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4315 return -EINVAL;
4316 }
4317
4318 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4319 msleep(1);
610c9928 4320 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4321 adapter->max_frame_size = max_frame;
610c9928
BA		 4322 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4323 netdev->mtu = new_mtu;
bc7f75fa
AK		 4324 if (netif_running(netdev))
4325 e1000e_down(adapter);
4326
ad68076e
BA		 4327 /*
4328 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4329 * means we reserve 2 more, this pushes us to allocate from the next
4330 * larger slab size.
ad68076e 4331 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4332 * However with the new *_jumbo_rx* routines, jumbo receives will use
4333 * fragmented skbs
ad68076e 4334 */
bc7f75fa 4335
9926146b 4336 if (max_frame <= 2048)
bc7f75fa
AK		 4337 adapter->rx_buffer_len = 2048;
4338 else
4339 adapter->rx_buffer_len = 4096;
4340
4341 /* adjust allocation if LPE protects us, and we aren't using SBP */
4342 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4343 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4344 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4345 + ETH_FCS_LEN;
bc7f75fa 4346
bc7f75fa
AK		 4347 if (netif_running(netdev))
4348 e1000e_up(adapter);
4349 else
4350 e1000e_reset(adapter);
4351
4352 clear_bit(__E1000_RESETTING, &adapter->state);
4353
4354 return 0;
4355}
4356
4357static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4358 int cmd)
4359{
4360 struct e1000_adapter *adapter = netdev_priv(netdev);
4361 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4362
318a94d6 4363 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4364 return -EOPNOTSUPP;
4365
4366 switch (cmd) {
4367 case SIOCGMIIPHY:
4368 data->phy_id = adapter->hw.phy.addr;
4369 break;
4370 case SIOCGMIIREG:
b16a002e
BA		 4371 e1000_phy_read_status(adapter);
4372
7c25769f
BA		 4373 switch (data->reg_num & 0x1F) {
4374 case MII_BMCR:
4375 data->val_out = adapter->phy_regs.bmcr;
4376 break;
4377 case MII_BMSR:
4378 data->val_out = adapter->phy_regs.bmsr;
4379 break;
4380 case MII_PHYSID1:
4381 data->val_out = (adapter->hw.phy.id >> 16);
4382 break;
4383 case MII_PHYSID2:
4384 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4385 break;
4386 case MII_ADVERTISE:
4387 data->val_out = adapter->phy_regs.advertise;
4388 break;
4389 case MII_LPA:
4390 data->val_out = adapter->phy_regs.lpa;
4391 break;
4392 case MII_EXPANSION:
4393 data->val_out = adapter->phy_regs.expansion;
4394 break;
4395 case MII_CTRL1000:
4396 data->val_out = adapter->phy_regs.ctrl1000;
4397 break;
4398 case MII_STAT1000:
4399 data->val_out = adapter->phy_regs.stat1000;
4400 break;
4401 case MII_ESTATUS:
4402 data->val_out = adapter->phy_regs.estatus;
4403 break;
4404 default:
bc7f75fa
AK		 4405 return -EIO;
4406 }
bc7f75fa
AK		 4407 break;
4408 case SIOCSMIIREG:
4409 default:
4410 return -EOPNOTSUPP;
4411 }
4412 return 0;
4413}
4414
4415static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4416{
4417 switch (cmd) {
4418 case SIOCGMIIPHY:
4419 case SIOCGMIIREG:
4420 case SIOCSMIIREG:
4421 return e1000_mii_ioctl(netdev, ifr, cmd);
4422 default:
4423 return -EOPNOTSUPP;
4424 }
4425}
4426
a4f58f54
BA		 4427static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4428{
4429 struct e1000_hw *hw = &adapter->hw;
4430 u32 i, mac_reg;
4431 u16 phy_reg;
4432 int retval = 0;
4433
4434 /* copy MAC RARs to PHY RARs */
4435 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4436 mac_reg = er32(RAL(i));
4437 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4438 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4439 mac_reg = er32(RAH(i));
4440 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4441 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4442 }
4443
4444 /* copy MAC MTA to PHY MTA */
4445 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4446 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4447 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4448 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4449 }
4450
4451 /* configure PHY Rx Control register */
4452 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4453 mac_reg = er32(RCTL);
4454 if (mac_reg & E1000_RCTL_UPE)
4455 phy_reg |= BM_RCTL_UPE;
4456 if (mac_reg & E1000_RCTL_MPE)
4457 phy_reg |= BM_RCTL_MPE;
4458 phy_reg &= ~(BM_RCTL_MO_MASK);
4459 if (mac_reg & E1000_RCTL_MO_3)
4460 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4461 << BM_RCTL_MO_SHIFT);
4462 if (mac_reg & E1000_RCTL_BAM)
4463 phy_reg |= BM_RCTL_BAM;
4464 if (mac_reg & E1000_RCTL_PMCF)
4465 phy_reg |= BM_RCTL_PMCF;
4466 mac_reg = er32(CTRL);
4467 if (mac_reg & E1000_CTRL_RFCE)
4468 phy_reg |= BM_RCTL_RFCE;
4469 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4470
4471 /* enable PHY wakeup in MAC register */
4472 ew32(WUFC, wufc);
4473 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4474
4475 /* configure and enable PHY wakeup in PHY registers */
4476 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4477 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4478
4479 /* activate PHY wakeup */
94d8186a 4480 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4481 if (retval) {
4482 e_err("Could not acquire PHY\n");
4483 return retval;
4484 }
4485 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4486 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4487 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4488 if (retval) {
4489 e_err("Could not read PHY page 769\n");
4490 goto out;
4491 }
4492 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4493 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4494 if (retval)
4495 e_err("Could not set PHY Host Wakeup bit\n");
4496out:
94d8186a 4497 hw->phy.ops.release(hw);
a4f58f54
BA		 4498
4499 return retval;
4500}
4501
23606cf5
RW		 4502static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
4503 bool runtime)
bc7f75fa
AK		 4504{
4505 struct net_device *netdev = pci_get_drvdata(pdev);
4506 struct e1000_adapter *adapter = netdev_priv(netdev);
4507 struct e1000_hw *hw = &adapter->hw;
4508 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 4509 /* Runtime suspend should only enable wakeup for link changes */
4510 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 4511 int retval = 0;
4512
4513 netif_device_detach(netdev);
4514
4515 if (netif_running(netdev)) {
4516 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4517 e1000e_down(adapter);
4518 e1000_free_irq(adapter);
4519 }
4662e82b 4520 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4521
4522 retval = pci_save_state(pdev);
4523 if (retval)
4524 return retval;
4525
4526 status = er32(STATUS);
4527 if (status & E1000_STATUS_LU)
4528 wufc &= ~E1000_WUFC_LNKC;
4529
4530 if (wufc) {
4531 e1000_setup_rctl(adapter);
4532 e1000_set_multi(netdev);
4533
4534 /* turn on all-multi mode if wake on multicast is enabled */
4535 if (wufc & E1000_WUFC_MC) {
4536 rctl = er32(RCTL);
4537 rctl |= E1000_RCTL_MPE;
4538 ew32(RCTL, rctl);
4539 }
4540
4541 ctrl = er32(CTRL);
4542 /* advertise wake from D3Cold */
4543 #define E1000_CTRL_ADVD3WUC 0x00100000
4544 /* phy power management enable */
4545 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 4546 ctrl |= E1000_CTRL_ADVD3WUC;
4547 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4548 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 4549 ew32(CTRL, ctrl);
4550
318a94d6
JK		 4551 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4552 adapter->hw.phy.media_type ==
4553 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4554 /* keep the laser running in D3 */
4555 ctrl_ext = er32(CTRL_EXT);
93a23f48 4556 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 4557 ew32(CTRL_EXT, ctrl_ext);
4558 }
4559
97ac8cae
BA		 4560 if (adapter->flags & FLAG_IS_ICH)
4561 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4562
bc7f75fa
AK		 4563 /* Allow time for pending master requests to run */
4564 e1000e_disable_pcie_master(&adapter->hw);
4565
82776a4b 4566 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 4567 /* enable wakeup by the PHY */
4568 retval = e1000_init_phy_wakeup(adapter, wufc);
4569 if (retval)
4570 return retval;
4571 } else {
4572 /* enable wakeup by the MAC */
4573 ew32(WUFC, wufc);
4574 ew32(WUC, E1000_WUC_PME_EN);
4575 }
bc7f75fa
AK		 4576 } else {
4577 ew32(WUC, 0);
4578 ew32(WUFC, 0);
bc7f75fa
AK		 4579 }
4580
4f9de721
RW		 4581 *enable_wake = !!wufc;
4582
bc7f75fa 4583 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 4584 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4585 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4586 *enable_wake = true;
bc7f75fa
AK		 4587
4588 if (adapter->hw.phy.type == e1000_phy_igp_3)
4589 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4590
ad68076e
BA		 4591 /*
4592 * Release control of h/w to f/w. If f/w is AMT enabled, this
4593 * would have already happened in close and is redundant.
4594 */
bc7f75fa
AK		 4595 e1000_release_hw_control(adapter);
4596
4597 pci_disable_device(pdev);
4598
4f9de721
RW		 4599 return 0;
4600}
4601
4602static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4603{
4604 if (sleep && wake) {
4605 pci_prepare_to_sleep(pdev);
4606 return;
4607 }
4608
4609 pci_wake_from_d3(pdev, wake);
4610 pci_set_power_state(pdev, PCI_D3hot);
4611}
4612
4613static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4614 bool wake)
4615{
4616 struct net_device *netdev = pci_get_drvdata(pdev);
4617 struct e1000_adapter *adapter = netdev_priv(netdev);
4618
005cbdfc
AD		 4619 /*
4620 * The pci-e switch on some quad port adapters will report a
4621 * correctable error when the MAC transitions from D0 to D3. To
4622 * prevent this we need to mask off the correctable errors on the
4623 * downstream port of the pci-e switch.
4624 */
4625 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4626 struct pci_dev *us_dev = pdev->bus->self;
4627 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4628 u16 devctl;
4629
4630 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4631 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4632 (devctl & ~PCI_EXP_DEVCTL_CERE));
4633
4f9de721 4634 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 4635
4636 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4637 } else {
4f9de721 4638 e1000_power_off(pdev, sleep, wake);
005cbdfc 4639 }
bc7f75fa
AK		 4640}
4641
1eae4eb2
AK		 4642static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4643{
4644 int pos;
1eae4eb2
AK		 4645 u16 val;
4646
4647 /*
4648 * 82573 workaround - disable L1 ASPM on mobile chipsets
4649 *
4650 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4651 * resulting in lost data or garbage information on the pci-e link
4652 * level. This could result in (false) bad EEPROM checksum errors,
4653 * long ping times (up to 2s) or even a system freeze/hang.
4654 *
4655 * Unfortunately this feature saves about 1W power consumption when
4656 * active.
4657 */
4658 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 4659 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4660 if (val & 0x2) {
4661 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4662 val &= ~0x2;
4663 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4664 }
4665}
4666
a0340162 4667#ifdef CONFIG_PM_OPS
23606cf5
RW		 4668static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4669{
4670 return !!adapter->tx_ring->buffer_info;
4671}
4672
23606cf5
RW		 4673static int __e1000_resume(struct pci_dev *pdev)
4674{
4675 struct net_device *netdev = pci_get_drvdata(pdev);
4676 struct e1000_adapter *adapter = netdev_priv(netdev);
4677 struct e1000_hw *hw = &adapter->hw;
4678 u32 err;
4679
4680 e1000e_disable_l1aspm(pdev);
bc7f75fa 4681
4662e82b 4682 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 4683 if (netif_running(netdev)) {
4684 err = e1000_request_irq(adapter);
4685 if (err)
4686 return err;
4687 }
4688
4689 e1000e_power_up_phy(adapter);
a4f58f54
BA		 4690
4691 /* report the system wakeup cause from S3/S4 */
4692 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4693 u16 phy_data;
4694
4695 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
4696 if (phy_data) {
4697 e_info("PHY Wakeup cause - %s\n",
4698 phy_data & E1000_WUS_EX ? "Unicast Packet" :
4699 phy_data & E1000_WUS_MC ? "Multicast Packet" :
4700 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
4701 phy_data & E1000_WUS_MAG ? "Magic Packet" :
4702 phy_data & E1000_WUS_LNKC ? "Link Status "
4703 " Change" : "other");
4704 }
4705 e1e_wphy(&adapter->hw, BM_WUS, ~0);
4706 } else {
4707 u32 wus = er32(WUS);
4708 if (wus) {
4709 e_info("MAC Wakeup cause - %s\n",
4710 wus & E1000_WUS_EX ? "Unicast Packet" :
4711 wus & E1000_WUS_MC ? "Multicast Packet" :
4712 wus & E1000_WUS_BC ? "Broadcast Packet" :
4713 wus & E1000_WUS_MAG ? "Magic Packet" :
4714 wus & E1000_WUS_LNKC ? "Link Status Change" :
4715 "other");
4716 }
4717 ew32(WUS, ~0);
4718 }
4719
bc7f75fa 4720 e1000e_reset(adapter);
bc7f75fa
AK		 4721
4722 e1000_init_manageability(adapter);
4723
4724 if (netif_running(netdev))
4725 e1000e_up(adapter);
4726
4727 netif_device_attach(netdev);
4728
ad68076e
BA		 4729 /*
4730 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4731 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4732 * under the control of the driver.
4733 */
c43bc57e 4734 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4735 e1000_get_hw_control(adapter);
4736
4737 return 0;
4738}
23606cf5 4739
a0340162
RW		 4740#ifdef CONFIG_PM_SLEEP
4741static int e1000_suspend(struct device *dev)
4742{
4743 struct pci_dev *pdev = to_pci_dev(dev);
4744 int retval;
4745 bool wake;
4746
4747 retval = __e1000_shutdown(pdev, &wake, false);
4748 if (!retval)
4749 e1000_complete_shutdown(pdev, true, wake);
4750
4751 return retval;
4752}
4753
23606cf5
RW		 4754static int e1000_resume(struct device *dev)
4755{
4756 struct pci_dev *pdev = to_pci_dev(dev);
4757 struct net_device *netdev = pci_get_drvdata(pdev);
4758 struct e1000_adapter *adapter = netdev_priv(netdev);
4759
4760 if (e1000e_pm_ready(adapter))
4761 adapter->idle_check = true;
4762
4763 return __e1000_resume(pdev);
4764}
a0340162
RW		 4765#endif /* CONFIG_PM_SLEEP */
4766
4767#ifdef CONFIG_PM_RUNTIME
4768static int e1000_runtime_suspend(struct device *dev)
4769{
4770 struct pci_dev *pdev = to_pci_dev(dev);
4771 struct net_device *netdev = pci_get_drvdata(pdev);
4772 struct e1000_adapter *adapter = netdev_priv(netdev);
4773
4774 if (e1000e_pm_ready(adapter)) {
4775 bool wake;
4776
4777 __e1000_shutdown(pdev, &wake, true);
4778 }
4779
4780 return 0;
4781}
4782
4783static int e1000_idle(struct device *dev)
4784{
4785 struct pci_dev *pdev = to_pci_dev(dev);
4786 struct net_device *netdev = pci_get_drvdata(pdev);
4787 struct e1000_adapter *adapter = netdev_priv(netdev);
4788
4789 if (!e1000e_pm_ready(adapter))
4790 return 0;
4791
4792 if (adapter->idle_check) {
4793 adapter->idle_check = false;
4794 if (!e1000e_has_link(adapter))
4795 pm_schedule_suspend(dev, MSEC_PER_SEC);
4796 }
4797
4798 return -EBUSY;
4799}
23606cf5
RW		 4800
4801static int e1000_runtime_resume(struct device *dev)
4802{
4803 struct pci_dev *pdev = to_pci_dev(dev);
4804 struct net_device *netdev = pci_get_drvdata(pdev);
4805 struct e1000_adapter *adapter = netdev_priv(netdev);
4806
4807 if (!e1000e_pm_ready(adapter))
4808 return 0;
4809
4810 adapter->idle_check = !dev->power.runtime_auto;
4811 return __e1000_resume(pdev);
4812}
a0340162
RW		 4813#endif /* CONFIG_PM_RUNTIME */
4814#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 4815
4816static void e1000_shutdown(struct pci_dev *pdev)
4817{
4f9de721
RW		 4818 bool wake = false;
4819
23606cf5 4820 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 4821
4822 if (system_state == SYSTEM_POWER_OFF)
4823 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 4824}
4825
4826#ifdef CONFIG_NET_POLL_CONTROLLER
4827/*
4828 * Polling 'interrupt' - used by things like netconsole to send skbs
4829 * without having to re-enable interrupts. It's not called while
4830 * the interrupt routine is executing.
4831 */
4832static void e1000_netpoll(struct net_device *netdev)
4833{
4834 struct e1000_adapter *adapter = netdev_priv(netdev);
4835
4836 disable_irq(adapter->pdev->irq);
4837 e1000_intr(adapter->pdev->irq, netdev);
4838
bc7f75fa
AK		 4839 enable_irq(adapter->pdev->irq);
4840}
4841#endif
4842
4843/**
4844 * e1000_io_error_detected - called when PCI error is detected
4845 * @pdev: Pointer to PCI device
4846 * @state: The current pci connection state
4847 *
4848 * This function is called after a PCI bus error affecting
4849 * this device has been detected.
4850 */
4851static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4852 pci_channel_state_t state)
4853{
4854 struct net_device *netdev = pci_get_drvdata(pdev);
4855 struct e1000_adapter *adapter = netdev_priv(netdev);
4856
4857 netif_device_detach(netdev);
4858
c93b5a76
MM		 4859 if (state == pci_channel_io_perm_failure)
4860 return PCI_ERS_RESULT_DISCONNECT;
4861
bc7f75fa
AK		 4862 if (netif_running(netdev))
4863 e1000e_down(adapter);
4864 pci_disable_device(pdev);
4865
4866 /* Request a slot slot reset. */
4867 return PCI_ERS_RESULT_NEED_RESET;
4868}
4869
4870/**
4871 * e1000_io_slot_reset - called after the pci bus has been reset.
4872 * @pdev: Pointer to PCI device
4873 *
4874 * Restart the card from scratch, as if from a cold-boot. Implementation
4875 * resembles the first-half of the e1000_resume routine.
4876 */
4877static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4878{
4879 struct net_device *netdev = pci_get_drvdata(pdev);
4880 struct e1000_adapter *adapter = netdev_priv(netdev);
4881 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4882 int err;
111b9dc5 4883 pci_ers_result_t result;
bc7f75fa 4884
1eae4eb2 4885 e1000e_disable_l1aspm(pdev);
f0f422e5 4886 err = pci_enable_device_mem(pdev);
6e4f6f6b 4887 if (err) {
bc7f75fa
AK		 4888 dev_err(&pdev->dev,
4889 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 4890 result = PCI_ERS_RESULT_DISCONNECT;
4891 } else {
4892 pci_set_master(pdev);
23606cf5 4893 pdev->state_saved = true;
111b9dc5 4894 pci_restore_state(pdev);
bc7f75fa 4895
111b9dc5
JB		 4896 pci_enable_wake(pdev, PCI_D3hot, 0);
4897 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4898
111b9dc5
JB		 4899 e1000e_reset(adapter);
4900 ew32(WUS, ~0);
4901 result = PCI_ERS_RESULT_RECOVERED;
4902 }
bc7f75fa 4903
111b9dc5
JB		 4904 pci_cleanup_aer_uncorrect_error_status(pdev);
4905
4906 return result;
bc7f75fa
AK		 4907}
4908
4909/**
4910 * e1000_io_resume - called when traffic can start flowing again.
4911 * @pdev: Pointer to PCI device
4912 *
4913 * This callback is called when the error recovery driver tells us that
4914 * its OK to resume normal operation. Implementation resembles the
4915 * second-half of the e1000_resume routine.
4916 */
4917static void e1000_io_resume(struct pci_dev *pdev)
4918{
4919 struct net_device *netdev = pci_get_drvdata(pdev);
4920 struct e1000_adapter *adapter = netdev_priv(netdev);
4921
4922 e1000_init_manageability(adapter);
4923
4924 if (netif_running(netdev)) {
4925 if (e1000e_up(adapter)) {
4926 dev_err(&pdev->dev,
4927 "can't bring device back up after reset\n");
4928 return;
4929 }
4930 }
4931
4932 netif_device_attach(netdev);
4933
ad68076e
BA		 4934 /*
4935 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4936 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4937 * under the control of the driver.
4938 */
c43bc57e 4939 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4940 e1000_get_hw_control(adapter);
4941
4942}
4943
4944static void e1000_print_device_info(struct e1000_adapter *adapter)
4945{
4946 struct e1000_hw *hw = &adapter->hw;
4947 struct net_device *netdev = adapter->netdev;
69e3fd8c 4948 u32 pba_num;
bc7f75fa
AK		 4949
4950 /* print bus type/speed/width info */
7c510e4b 4951 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 4952 /* bus width */
4953 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4954 "Width x1"),
4955 /* MAC address */
7c510e4b 4956 netdev->dev_addr);
44defeb3
JK		 4957 e_info("Intel(R) PRO/%s Network Connection\n",
4958 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4959 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4960 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4961 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4962}
4963
10aa4c04
AK		 4964static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4965{
4966 struct e1000_hw *hw = &adapter->hw;
4967 int ret_val;
4968 u16 buf = 0;
4969
4970 if (hw->mac.type != e1000_82573)
4971 return;
4972
4973 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4974 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4975 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 4976 dev_warn(&adapter->pdev->dev,
4977 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK		 4978 }
4979
4980 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4981 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4982 /* ASPM enable */
6c2a9efa
FP		 4983 dev_warn(&adapter->pdev->dev,
4984 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK		 4985 }
4986}
4987
651c2466
SH		 4988static const struct net_device_ops e1000e_netdev_ops = {
4989 .ndo_open = e1000_open,
4990 .ndo_stop = e1000_close,
00829823 4991 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 4992 .ndo_get_stats = e1000_get_stats,
4993 .ndo_set_multicast_list = e1000_set_multi,
4994 .ndo_set_mac_address = e1000_set_mac,
4995 .ndo_change_mtu = e1000_change_mtu,
4996 .ndo_do_ioctl = e1000_ioctl,
4997 .ndo_tx_timeout = e1000_tx_timeout,
4998 .ndo_validate_addr = eth_validate_addr,
4999
5000 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5001 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5002 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5003#ifdef CONFIG_NET_POLL_CONTROLLER
5004 .ndo_poll_controller = e1000_netpoll,
5005#endif
5006};
5007
bc7f75fa
AK		 5008/**
5009 * e1000_probe - Device Initialization Routine
5010 * @pdev: PCI device information struct
5011 * @ent: entry in e1000_pci_tbl
5012 *
5013 * Returns 0 on success, negative on failure
5014 *
5015 * e1000_probe initializes an adapter identified by a pci_dev structure.
5016 * The OS initialization, configuring of the adapter private structure,
5017 * and a hardware reset occur.
5018 **/
5019static int __devinit e1000_probe(struct pci_dev *pdev,
5020 const struct pci_device_id *ent)
5021{
5022 struct net_device *netdev;
5023 struct e1000_adapter *adapter;
5024 struct e1000_hw *hw;
5025 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5026 resource_size_t mmio_start, mmio_len;
5027 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5028
5029 static int cards_found;
5030 int i, err, pci_using_dac;
5031 u16 eeprom_data = 0;
5032 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5033
1eae4eb2 5034 e1000e_disable_l1aspm(pdev);
6e4f6f6b 5035
f0f422e5 5036 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5037 if (err)
5038 return err;
5039
5040 pci_using_dac = 0;
6a35528a 5041 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa 5042 if (!err) {
6a35528a 5043 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5044 if (!err)
5045 pci_using_dac = 1;
5046 } else {
284901a9 5047 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
bc7f75fa
AK		 5048 if (err) {
5049 err = pci_set_consistent_dma_mask(pdev,
284901a9 5050 DMA_BIT_MASK(32));
bc7f75fa
AK		 5051 if (err) {
5052 dev_err(&pdev->dev, "No usable DMA "
5053 "configuration, aborting\n");
5054 goto err_dma;
5055 }
5056 }
5057 }
5058
e8de1481 5059 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5060 pci_select_bars(pdev, IORESOURCE_MEM),
5061 e1000e_driver_name);
bc7f75fa
AK		 5062 if (err)
5063 goto err_pci_reg;
5064
68eac460 5065 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5066 pci_enable_pcie_error_reporting(pdev);
68eac460 5067
bc7f75fa 5068 pci_set_master(pdev);
438b365a
BA		 5069 /* PCI config space info */
5070 err = pci_save_state(pdev);
5071 if (err)
5072 goto err_alloc_etherdev;
bc7f75fa
AK		 5073
5074 err = -ENOMEM;
5075 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5076 if (!netdev)
5077 goto err_alloc_etherdev;
5078
bc7f75fa
AK		 5079 SET_NETDEV_DEV(netdev, &pdev->dev);
5080
5081 pci_set_drvdata(pdev, netdev);
5082 adapter = netdev_priv(netdev);
5083 hw = &adapter->hw;
5084 adapter->netdev = netdev;
5085 adapter->pdev = pdev;
5086 adapter->ei = ei;
5087 adapter->pba = ei->pba;
5088 adapter->flags = ei->flags;
eb7c3adb 5089 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5090 adapter->hw.adapter = adapter;
5091 adapter->hw.mac.type = ei->mac;
2adc55c9 5092 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5093 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5094
5095 mmio_start = pci_resource_start(pdev, 0);
5096 mmio_len = pci_resource_len(pdev, 0);
5097
5098 err = -EIO;
5099 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5100 if (!adapter->hw.hw_addr)
5101 goto err_ioremap;
5102
5103 if ((adapter->flags & FLAG_HAS_FLASH) &&
5104 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5105 flash_start = pci_resource_start(pdev, 1);
5106 flash_len = pci_resource_len(pdev, 1);
5107 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5108 if (!adapter->hw.flash_address)
5109 goto err_flashmap;
5110 }
5111
5112 /* construct the net_device struct */
651c2466 5113 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5114 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5115 netdev->watchdog_timeo = 5 * HZ;
5116 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5117 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5118
5119 netdev->mem_start = mmio_start;
5120 netdev->mem_end = mmio_start + mmio_len;
5121
5122 adapter->bd_number = cards_found++;
5123
4662e82b
BA		 5124 e1000e_check_options(adapter);
5125
bc7f75fa
AK		 5126 /* setup adapter struct */
5127 err = e1000_sw_init(adapter);
5128 if (err)
5129 goto err_sw_init;
5130
5131 err = -EIO;
5132
5133 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5134 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5135 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5136
69e3fd8c 5137 err = ei->get_variants(adapter);
bc7f75fa
AK		 5138 if (err)
5139 goto err_hw_init;
5140
4a770358
BA		 5141 if ((adapter->flags & FLAG_IS_ICH) &&
5142 (adapter->flags & FLAG_READ_ONLY_NVM))
5143 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5144
bc7f75fa
AK		 5145 hw->mac.ops.get_bus_info(&adapter->hw);
5146
318a94d6 5147 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5148
5149 /* Copper options */
318a94d6 5150 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5151 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5152 adapter->hw.phy.disable_polarity_correction = 0;
5153 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5154 }
5155
5156 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5157 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5158
5159 netdev->features = NETIF_F_SG |
5160 NETIF_F_HW_CSUM |
5161 NETIF_F_HW_VLAN_TX |
5162 NETIF_F_HW_VLAN_RX;
5163
5164 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5165 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5166
5167 netdev->features |= NETIF_F_TSO;
5168 netdev->features |= NETIF_F_TSO6;
5169
a5136e23
JK		 5170 netdev->vlan_features |= NETIF_F_TSO;
5171 netdev->vlan_features |= NETIF_F_TSO6;
5172 netdev->vlan_features |= NETIF_F_HW_CSUM;
5173 netdev->vlan_features |= NETIF_F_SG;
5174
bc7f75fa
AK		 5175 if (pci_using_dac)
5176 netdev->features |= NETIF_F_HIGHDMA;
5177
bc7f75fa
AK		 5178 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5179 adapter->flags |= FLAG_MNG_PT_ENABLED;
5180
ad68076e
BA		 5181 /*
5182 * before reading the NVM, reset the controller to
5183 * put the device in a known good starting state
5184 */
bc7f75fa
AK		 5185 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5186
5187 /*
5188 * systems with ASPM and others may see the checksum fail on the first
5189 * attempt. Let's give it a few tries
5190 */
5191 for (i = 0;; i++) {
5192 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5193 break;
5194 if (i == 2) {
44defeb3 5195 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5196 err = -EIO;
5197 goto err_eeprom;
5198 }
5199 }
5200
10aa4c04
AK		 5201 e1000_eeprom_checks(adapter);
5202
608f8a0d 5203 /* copy the MAC address */
bc7f75fa 5204 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5205 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5206
5207 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5208 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5209
5210 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5211 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5212 err = -EIO;
5213 goto err_eeprom;
5214 }
5215
5216 init_timer(&adapter->watchdog_timer);
5217 adapter->watchdog_timer.function = &e1000_watchdog;
5218 adapter->watchdog_timer.data = (unsigned long) adapter;
5219
5220 init_timer(&adapter->phy_info_timer);
5221 adapter->phy_info_timer.function = &e1000_update_phy_info;
5222 adapter->phy_info_timer.data = (unsigned long) adapter;
5223
5224 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5225 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5226 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5227 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5228 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5229
bc7f75fa
AK		 5230 /* Initialize link parameters. User can change them with ethtool */
5231 adapter->hw.mac.autoneg = 1;
309af40b 5232 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5233 adapter->hw.fc.requested_mode = e1000_fc_default;
5234 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5235 adapter->hw.phy.autoneg_advertised = 0x2f;
5236
5237 /* ring size defaults */
5238 adapter->rx_ring->count = 256;
5239 adapter->tx_ring->count = 256;
5240
5241 /*
5242 * Initial Wake on LAN setting - If APM wake is enabled in
5243 * the EEPROM, enable the ACPI Magic Packet filter
5244 */
5245 if (adapter->flags & FLAG_APME_IN_WUC) {
5246 /* APME bit in EEPROM is mapped to WUC.APME */
5247 eeprom_data = er32(WUC);
5248 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5249 if (eeprom_data & E1000_WUC_PHY_WAKE)
5250 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5251 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5252 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5253 (adapter->hw.bus.func == 1))
5254 e1000_read_nvm(&adapter->hw,
5255 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5256 else
5257 e1000_read_nvm(&adapter->hw,
5258 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5259 }
5260
5261 /* fetch WoL from EEPROM */
5262 if (eeprom_data & eeprom_apme_mask)
5263 adapter->eeprom_wol |= E1000_WUFC_MAG;
5264
5265 /*
5266 * now that we have the eeprom settings, apply the special cases
5267 * where the eeprom may be wrong or the board simply won't support
5268 * wake on lan on a particular port
5269 */
5270 if (!(adapter->flags & FLAG_HAS_WOL))
5271 adapter->eeprom_wol = 0;
5272
5273 /* initialize the wol settings based on the eeprom settings */
5274 adapter->wol = adapter->eeprom_wol;
6ff68026 5275 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5276
84527590
BA		 5277 /* save off EEPROM version number */
5278 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5279
bc7f75fa
AK		 5280 /* reset the hardware with the new settings */
5281 e1000e_reset(adapter);
5282
ad68076e
BA		 5283 /*
5284 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5285 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5286 * under the control of the driver.
5287 */
c43bc57e 5288 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5289 e1000_get_hw_control(adapter);
5290
bc7f75fa
AK		 5291 strcpy(netdev->name, "eth%d");
5292 err = register_netdev(netdev);
5293 if (err)
5294 goto err_register;
5295
9c563d20
JB		 5296 /* carrier off reporting is important to ethtool even BEFORE open */
5297 netif_carrier_off(netdev);
5298
bc7f75fa
AK		 5299 e1000_print_device_info(adapter);
5300
23606cf5
RW		 5301 if (pci_dev_run_wake(pdev)) {
5302 pm_runtime_set_active(&pdev->dev);
5303 pm_runtime_enable(&pdev->dev);
5304 }
5305 pm_schedule_suspend(&pdev->dev, MSEC_PER_SEC);
5306
bc7f75fa
AK		 5307 return 0;
5308
5309err_register:
c43bc57e
JB		 5310 if (!(adapter->flags & FLAG_HAS_AMT))
5311 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5312err_eeprom:
5313 if (!e1000_check_reset_block(&adapter->hw))
5314 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5315err_hw_init:
bc7f75fa 5316
bc7f75fa
AK		 5317 kfree(adapter->tx_ring);
5318 kfree(adapter->rx_ring);
5319err_sw_init:
c43bc57e
JB		 5320 if (adapter->hw.flash_address)
5321 iounmap(adapter->hw.flash_address);
e82f54ba 5322 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5323err_flashmap:
bc7f75fa
AK		 5324 iounmap(adapter->hw.hw_addr);
5325err_ioremap:
5326 free_netdev(netdev);
5327err_alloc_etherdev:
f0f422e5
BA		 5328 pci_release_selected_regions(pdev,
5329 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5330err_pci_reg:
5331err_dma:
5332 pci_disable_device(pdev);
5333 return err;
5334}
5335
5336/**
5337 * e1000_remove - Device Removal Routine
5338 * @pdev: PCI device information struct
5339 *
5340 * e1000_remove is called by the PCI subsystem to alert the driver
5341 * that it should release a PCI device. The could be caused by a
5342 * Hot-Plug event, or because the driver is going to be removed from
5343 * memory.
5344 **/
5345static void __devexit e1000_remove(struct pci_dev *pdev)
5346{
5347 struct net_device *netdev = pci_get_drvdata(pdev);
5348 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 5349 bool down = test_bit(__E1000_DOWN, &adapter->state);
5350
5351 pm_runtime_get_sync(&pdev->dev);
bc7f75fa 5352
ad68076e
BA		 5353 /*
5354 * flush_scheduled work may reschedule our watchdog task, so
5355 * explicitly disable watchdog tasks from being rescheduled
5356 */
23606cf5
RW		 5357 if (!down)
5358 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 5359 del_timer_sync(&adapter->watchdog_timer);
5360 del_timer_sync(&adapter->phy_info_timer);
5361
41cec6f1
BA		 5362 cancel_work_sync(&adapter->reset_task);
5363 cancel_work_sync(&adapter->watchdog_task);
5364 cancel_work_sync(&adapter->downshift_task);
5365 cancel_work_sync(&adapter->update_phy_task);
5366 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5367 flush_scheduled_work();
5368
17f208de
BA		 5369 if (!(netdev->flags & IFF_UP))
5370 e1000_power_down_phy(adapter);
5371
23606cf5
RW		 5372 /* Don't lie to e1000_close() down the road. */
5373 if (!down)
5374 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 5375 unregister_netdev(netdev);
5376
23606cf5
RW		 5377 if (pci_dev_run_wake(pdev)) {
5378 pm_runtime_disable(&pdev->dev);
5379 pm_runtime_set_suspended(&pdev->dev);
5380 }
5381 pm_runtime_put_noidle(&pdev->dev);
5382
ad68076e
BA		 5383 /*
5384 * Release control of h/w to f/w. If f/w is AMT enabled, this
5385 * would have already happened in close and is redundant.
5386 */
bc7f75fa
AK		 5387 e1000_release_hw_control(adapter);
5388
4662e82b 5389 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5390 kfree(adapter->tx_ring);
5391 kfree(adapter->rx_ring);
5392
5393 iounmap(adapter->hw.hw_addr);
5394 if (adapter->hw.flash_address)
5395 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5396 pci_release_selected_regions(pdev,
5397 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5398
5399 free_netdev(netdev);
5400
111b9dc5 5401 /* AER disable */
19d5afd4 5402 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5403
bc7f75fa
AK		 5404 pci_disable_device(pdev);
5405}
5406
5407/* PCI Error Recovery (ERS) */
5408static struct pci_error_handlers e1000_err_handler = {
5409 .error_detected = e1000_io_error_detected,
5410 .slot_reset = e1000_io_slot_reset,
5411 .resume = e1000_io_resume,
5412};
5413
a3aa1884 5414static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 5415 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5416 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5417 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5418 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5419 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5420 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5421 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5422 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5423 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5424
bc7f75fa
AK		 5425 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5426 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5427 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5428 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5429
bc7f75fa
AK		 5430 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5431 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5432 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5433
4662e82b 5434 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5435 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5436 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5437
bc7f75fa
AK		 5438 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5439 board_80003es2lan },
5440 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5441 board_80003es2lan },
5442 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5443 board_80003es2lan },
5444 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5445 board_80003es2lan },
ad68076e 5446
bc7f75fa
AK		 5447 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5448 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5449 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5450 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5451 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5452 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5453 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5454 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5455
bc7f75fa
AK		 5456 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5457 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5458 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5459 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5460 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5461 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5462 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5463 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5464 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5465
5466 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5467 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5468 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5469
f4187b56
BA		 5470 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5471 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5472
a4f58f54
BA		 5473 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5474 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5475 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5476 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5477
bc7f75fa
AK		 5478 { } /* terminate list */
5479};
5480MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5481
a0340162 5482#ifdef CONFIG_PM_OPS
23606cf5 5483static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 5484 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
5485 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
5486 e1000_runtime_resume, e1000_idle)
23606cf5 5487};
e50208a0 5488#endif
23606cf5 5489
bc7f75fa
AK		 5490/* PCI Device API Driver */
5491static struct pci_driver e1000_driver = {
5492 .name = e1000e_driver_name,
5493 .id_table = e1000_pci_tbl,
5494 .probe = e1000_probe,
5495 .remove = __devexit_p(e1000_remove),
a0340162 5496#ifdef CONFIG_PM_OPS
23606cf5 5497 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 5498#endif
5499 .shutdown = e1000_shutdown,
5500 .err_handler = &e1000_err_handler
5501};
5502
5503/**
5504 * e1000_init_module - Driver Registration Routine
5505 *
5506 * e1000_init_module is the first routine called when the driver is
5507 * loaded. All it does is register with the PCI subsystem.
5508 **/
5509static int __init e1000_init_module(void)
5510{
5511 int ret;
5512 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5513 e1000e_driver_name, e1000e_driver_version);
c7e54b1b 5514 printk(KERN_INFO "%s: Copyright (c) 1999 - 2009 Intel Corporation.\n",
bc7f75fa
AK		 5515 e1000e_driver_name);
5516 ret = pci_register_driver(&e1000_driver);
53ec5498 5517
bc7f75fa
AK		 5518 return ret;
5519}
5520module_init(e1000_init_module);
5521
5522/**
5523 * e1000_exit_module - Driver Exit Cleanup Routine
5524 *
5525 * e1000_exit_module is called just before the driver is removed
5526 * from memory.
5527 **/
5528static void __exit e1000_exit_module(void)
5529{
5530 pci_unregister_driver(&e1000_driver);
5531}
5532module_exit(e1000_exit_module);
5533
5534
5535MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5536MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5537MODULE_LICENSE("GPL");
5538MODULE_VERSION(DRV_VERSION);
5539
5540/* e1000_main.c */
Clone of davem's net-next-2.6 tree