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e1000e: Disable dynamic clock gating for 82571 per si errata.
[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
ad68076e 4 Copyright(c) 1999 - 2008 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
111b9dc5 47#include <linux/aer.h>
bc7f75fa
AK		 48
49#include "e1000.h"
50
92af3e95 51#define DRV_VERSION "0.3.3.4-k2"
bc7f75fa
AK		 52char e1000e_driver_name[] = "e1000e";
53const char e1000e_driver_version[] = DRV_VERSION;
54
55static const struct e1000_info *e1000_info_tbl[] = {
56 [board_82571] = &e1000_82571_info,
57 [board_82572] = &e1000_82572_info,
58 [board_82573] = &e1000_82573_info,
4662e82b 59 [board_82574] = &e1000_82574_info,
bc7f75fa
AK		 60 [board_80003es2lan] = &e1000_es2_info,
61 [board_ich8lan] = &e1000_ich8_info,
62 [board_ich9lan] = &e1000_ich9_info,
f4187b56 63 [board_ich10lan] = &e1000_ich10_info,
bc7f75fa
AK		 64};
65
66#ifdef DEBUG
67/**
68 * e1000_get_hw_dev_name - return device name string
69 * used by hardware layer to print debugging information
70 **/
71char *e1000e_get_hw_dev_name(struct e1000_hw *hw)
72{
589c085f 73 return hw->adapter->netdev->name;
bc7f75fa
AK		 74}
75#endif
76
77/**
78 * e1000_desc_unused - calculate if we have unused descriptors
79 **/
80static int e1000_desc_unused(struct e1000_ring *ring)
81{
82 if (ring->next_to_clean > ring->next_to_use)
83 return ring->next_to_clean - ring->next_to_use - 1;
84
85 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
86}
87
88/**
ad68076e 89 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 90 * @adapter: board private structure
91 * @status: descriptor status field as written by hardware
92 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
93 * @skb: pointer to sk_buff to be indicated to stack
94 **/
95static void e1000_receive_skb(struct e1000_adapter *adapter,
96 struct net_device *netdev,
97 struct sk_buff *skb,
a39fe742 98 u8 status, __le16 vlan)
bc7f75fa
AK		 99{
100 skb->protocol = eth_type_trans(skb, netdev);
101
102 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 103 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
104 le16_to_cpu(vlan), skb);
bc7f75fa 105 else
89c88b16 106 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 107}
108
109/**
110 * e1000_rx_checksum - Receive Checksum Offload for 82543
111 * @adapter: board private structure
112 * @status_err: receive descriptor status and error fields
113 * @csum: receive descriptor csum field
114 * @sk_buff: socket buffer with received data
115 **/
116static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
117 u32 csum, struct sk_buff *skb)
118{
119 u16 status = (u16)status_err;
120 u8 errors = (u8)(status_err >> 24);
121 skb->ip_summed = CHECKSUM_NONE;
122
123 /* Ignore Checksum bit is set */
124 if (status & E1000_RXD_STAT_IXSM)
125 return;
126 /* TCP/UDP checksum error bit is set */
127 if (errors & E1000_RXD_ERR_TCPE) {
128 /* let the stack verify checksum errors */
129 adapter->hw_csum_err++;
130 return;
131 }
132
133 /* TCP/UDP Checksum has not been calculated */
134 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
135 return;
136
137 /* It must be a TCP or UDP packet with a valid checksum */
138 if (status & E1000_RXD_STAT_TCPCS) {
139 /* TCP checksum is good */
140 skb->ip_summed = CHECKSUM_UNNECESSARY;
141 } else {
ad68076e
BA		 142 /*
143 * IP fragment with UDP payload
144 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 145 * and then put the value in host order for further stack use.
146 */
a39fe742
AV		 147 __sum16 sum = (__force __sum16)htons(csum);
148 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 149 skb->ip_summed = CHECKSUM_COMPLETE;
150 }
151 adapter->hw_csum_good++;
152}
153
154/**
155 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
156 * @adapter: address of board private structure
157 **/
158static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
159 int cleaned_count)
160{
161 struct net_device *netdev = adapter->netdev;
162 struct pci_dev *pdev = adapter->pdev;
163 struct e1000_ring *rx_ring = adapter->rx_ring;
164 struct e1000_rx_desc *rx_desc;
165 struct e1000_buffer *buffer_info;
166 struct sk_buff *skb;
167 unsigned int i;
168 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
169
170 i = rx_ring->next_to_use;
171 buffer_info = &rx_ring->buffer_info[i];
172
173 while (cleaned_count--) {
174 skb = buffer_info->skb;
175 if (skb) {
176 skb_trim(skb, 0);
177 goto map_skb;
178 }
179
180 skb = netdev_alloc_skb(netdev, bufsz);
181 if (!skb) {
182 /* Better luck next round */
183 adapter->alloc_rx_buff_failed++;
184 break;
185 }
186
ad68076e
BA		 187 /*
188 * Make buffer alignment 2 beyond a 16 byte boundary
bc7f75fa
AK		 189 * this will result in a 16 byte aligned IP header after
190 * the 14 byte MAC header is removed
191 */
192 skb_reserve(skb, NET_IP_ALIGN);
193
194 buffer_info->skb = skb;
195map_skb:
196 buffer_info->dma = pci_map_single(pdev, skb->data,
197 adapter->rx_buffer_len,
198 PCI_DMA_FROMDEVICE);
8d8bb39b 199 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 200 dev_err(&pdev->dev, "RX DMA map failed\n");
201 adapter->rx_dma_failed++;
202 break;
203 }
204
205 rx_desc = E1000_RX_DESC(*rx_ring, i);
206 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
207
208 i++;
209 if (i == rx_ring->count)
210 i = 0;
211 buffer_info = &rx_ring->buffer_info[i];
212 }
213
214 if (rx_ring->next_to_use != i) {
215 rx_ring->next_to_use = i;
216 if (i-- == 0)
217 i = (rx_ring->count - 1);
218
ad68076e
BA		 219 /*
220 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 221 * know there are new descriptors to fetch. (Only
222 * applicable for weak-ordered memory model archs,
ad68076e
BA		 223 * such as IA-64).
224 */
bc7f75fa
AK		 225 wmb();
226 writel(i, adapter->hw.hw_addr + rx_ring->tail);
227 }
228}
229
230/**
231 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
232 * @adapter: address of board private structure
233 **/
234static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
235 int cleaned_count)
236{
237 struct net_device *netdev = adapter->netdev;
238 struct pci_dev *pdev = adapter->pdev;
239 union e1000_rx_desc_packet_split *rx_desc;
240 struct e1000_ring *rx_ring = adapter->rx_ring;
241 struct e1000_buffer *buffer_info;
242 struct e1000_ps_page *ps_page;
243 struct sk_buff *skb;
244 unsigned int i, j;
245
246 i = rx_ring->next_to_use;
247 buffer_info = &rx_ring->buffer_info[i];
248
249 while (cleaned_count--) {
250 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
251
252 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 253 ps_page = &buffer_info->ps_pages[j];
254 if (j >= adapter->rx_ps_pages) {
255 /* all unused desc entries get hw null ptr */
a39fe742 256 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 257 continue;
258 }
259 if (!ps_page->page) {
260 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 261 if (!ps_page->page) {
47f44e40
AK		 262 adapter->alloc_rx_buff_failed++;
263 goto no_buffers;
264 }
265 ps_page->dma = pci_map_page(pdev,
266 ps_page->page,
267 0, PAGE_SIZE,
268 PCI_DMA_FROMDEVICE);
8d8bb39b 269 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 270 dev_err(&adapter->pdev->dev,
271 "RX DMA page map failed\n");
272 adapter->rx_dma_failed++;
273 goto no_buffers;
bc7f75fa 274 }
bc7f75fa 275 }
47f44e40
AK		 276 /*
277 * Refresh the desc even if buffer_addrs
278 * didn't change because each write-back
279 * erases this info.
280 */
281 rx_desc->read.buffer_addr[j+1] =
282 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 283 }
284
285 skb = netdev_alloc_skb(netdev,
286 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
287
288 if (!skb) {
289 adapter->alloc_rx_buff_failed++;
290 break;
291 }
292
ad68076e
BA		 293 /*
294 * Make buffer alignment 2 beyond a 16 byte boundary
bc7f75fa
AK		 295 * this will result in a 16 byte aligned IP header after
296 * the 14 byte MAC header is removed
297 */
298 skb_reserve(skb, NET_IP_ALIGN);
299
300 buffer_info->skb = skb;
301 buffer_info->dma = pci_map_single(pdev, skb->data,
302 adapter->rx_ps_bsize0,
303 PCI_DMA_FROMDEVICE);
8d8bb39b 304 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 305 dev_err(&pdev->dev, "RX DMA map failed\n");
306 adapter->rx_dma_failed++;
307 /* cleanup skb */
308 dev_kfree_skb_any(skb);
309 buffer_info->skb = NULL;
310 break;
311 }
312
313 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
314
315 i++;
316 if (i == rx_ring->count)
317 i = 0;
318 buffer_info = &rx_ring->buffer_info[i];
319 }
320
321no_buffers:
322 if (rx_ring->next_to_use != i) {
323 rx_ring->next_to_use = i;
324
325 if (!(i--))
326 i = (rx_ring->count - 1);
327
ad68076e
BA		 328 /*
329 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 330 * know there are new descriptors to fetch. (Only
331 * applicable for weak-ordered memory model archs,
ad68076e
BA		 332 * such as IA-64).
333 */
bc7f75fa 334 wmb();
ad68076e
BA		 335 /*
336 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 337 * descriptors are 32 bytes...so we increment tail
338 * twice as much.
339 */
340 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
341 }
342}
343
97ac8cae
BA		 344/**
345 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
346 * @adapter: address of board private structure
97ac8cae
BA		 347 * @cleaned_count: number of buffers to allocate this pass
348 **/
349
350static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
351 int cleaned_count)
352{
353 struct net_device *netdev = adapter->netdev;
354 struct pci_dev *pdev = adapter->pdev;
355 struct e1000_rx_desc *rx_desc;
356 struct e1000_ring *rx_ring = adapter->rx_ring;
357 struct e1000_buffer *buffer_info;
358 struct sk_buff *skb;
359 unsigned int i;
360 unsigned int bufsz = 256 -
361 16 /* for skb_reserve */ -
362 NET_IP_ALIGN;
363
364 i = rx_ring->next_to_use;
365 buffer_info = &rx_ring->buffer_info[i];
366
367 while (cleaned_count--) {
368 skb = buffer_info->skb;
369 if (skb) {
370 skb_trim(skb, 0);
371 goto check_page;
372 }
373
374 skb = netdev_alloc_skb(netdev, bufsz);
375 if (unlikely(!skb)) {
376 /* Better luck next round */
377 adapter->alloc_rx_buff_failed++;
378 break;
379 }
380
381 /* Make buffer alignment 2 beyond a 16 byte boundary
382 * this will result in a 16 byte aligned IP header after
383 * the 14 byte MAC header is removed
384 */
385 skb_reserve(skb, NET_IP_ALIGN);
386
387 buffer_info->skb = skb;
388check_page:
389 /* allocate a new page if necessary */
390 if (!buffer_info->page) {
391 buffer_info->page = alloc_page(GFP_ATOMIC);
392 if (unlikely(!buffer_info->page)) {
393 adapter->alloc_rx_buff_failed++;
394 break;
395 }
396 }
397
398 if (!buffer_info->dma)
399 buffer_info->dma = pci_map_page(pdev,
400 buffer_info->page, 0,
401 PAGE_SIZE,
402 PCI_DMA_FROMDEVICE);
403
404 rx_desc = E1000_RX_DESC(*rx_ring, i);
405 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
406
407 if (unlikely(++i == rx_ring->count))
408 i = 0;
409 buffer_info = &rx_ring->buffer_info[i];
410 }
411
412 if (likely(rx_ring->next_to_use != i)) {
413 rx_ring->next_to_use = i;
414 if (unlikely(i-- == 0))
415 i = (rx_ring->count - 1);
416
417 /* Force memory writes to complete before letting h/w
418 * know there are new descriptors to fetch. (Only
419 * applicable for weak-ordered memory model archs,
420 * such as IA-64). */
421 wmb();
422 writel(i, adapter->hw.hw_addr + rx_ring->tail);
423 }
424}
425
bc7f75fa
AK		 426/**
427 * e1000_clean_rx_irq - Send received data up the network stack; legacy
428 * @adapter: board private structure
429 *
430 * the return value indicates whether actual cleaning was done, there
431 * is no guarantee that everything was cleaned
432 **/
433static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
434 int *work_done, int work_to_do)
435{
436 struct net_device *netdev = adapter->netdev;
437 struct pci_dev *pdev = adapter->pdev;
438 struct e1000_ring *rx_ring = adapter->rx_ring;
439 struct e1000_rx_desc *rx_desc, *next_rxd;
440 struct e1000_buffer *buffer_info, *next_buffer;
441 u32 length;
442 unsigned int i;
443 int cleaned_count = 0;
444 bool cleaned = 0;
445 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
446
447 i = rx_ring->next_to_clean;
448 rx_desc = E1000_RX_DESC(*rx_ring, i);
449 buffer_info = &rx_ring->buffer_info[i];
450
451 while (rx_desc->status & E1000_RXD_STAT_DD) {
452 struct sk_buff *skb;
453 u8 status;
454
455 if (*work_done >= work_to_do)
456 break;
457 (*work_done)++;
458
459 status = rx_desc->status;
460 skb = buffer_info->skb;
461 buffer_info->skb = NULL;
462
463 prefetch(skb->data - NET_IP_ALIGN);
464
465 i++;
466 if (i == rx_ring->count)
467 i = 0;
468 next_rxd = E1000_RX_DESC(*rx_ring, i);
469 prefetch(next_rxd);
470
471 next_buffer = &rx_ring->buffer_info[i];
472
473 cleaned = 1;
474 cleaned_count++;
475 pci_unmap_single(pdev,
476 buffer_info->dma,
477 adapter->rx_buffer_len,
478 PCI_DMA_FROMDEVICE);
479 buffer_info->dma = 0;
480
481 length = le16_to_cpu(rx_desc->length);
482
483 /* !EOP means multiple descriptors were used to store a single
484 * packet, also make sure the frame isn't just CRC only */
485 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
486 /* All receives must fit into a single buffer */
44defeb3
JK		 487 e_dbg("%s: Receive packet consumed multiple buffers\n",
488 netdev->name);
bc7f75fa
AK		 489 /* recycle */
490 buffer_info->skb = skb;
491 goto next_desc;
492 }
493
494 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
495 /* recycle */
496 buffer_info->skb = skb;
497 goto next_desc;
498 }
499
eb7c3adb
JK		 500 /* adjust length to remove Ethernet CRC */
501 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
502 length -= 4;
503
bc7f75fa
AK		 504 total_rx_bytes += length;
505 total_rx_packets++;
506
ad68076e
BA		 507 /*
508 * code added for copybreak, this should improve
bc7f75fa 509 * performance for small packets with large amounts
ad68076e
BA		 510 * of reassembly being done in the stack
511 */
bc7f75fa
AK		 512 if (length < copybreak) {
513 struct sk_buff *new_skb =
514 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
515 if (new_skb) {
516 skb_reserve(new_skb, NET_IP_ALIGN);
808ff676
BA		 517 skb_copy_to_linear_data_offset(new_skb,
518 -NET_IP_ALIGN,
519 (skb->data -
520 NET_IP_ALIGN),
521 (length +
522 NET_IP_ALIGN));
bc7f75fa
AK		 523 /* save the skb in buffer_info as good */
524 buffer_info->skb = skb;
525 skb = new_skb;
526 }
527 /* else just continue with the old one */
528 }
529 /* end copybreak code */
530 skb_put(skb, length);
531
532 /* Receive Checksum Offload */
533 e1000_rx_checksum(adapter,
534 (u32)(status) |
535 ((u32)(rx_desc->errors) << 24),
536 le16_to_cpu(rx_desc->csum), skb);
537
538 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
539
540next_desc:
541 rx_desc->status = 0;
542
543 /* return some buffers to hardware, one at a time is too slow */
544 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
545 adapter->alloc_rx_buf(adapter, cleaned_count);
546 cleaned_count = 0;
547 }
548
549 /* use prefetched values */
550 rx_desc = next_rxd;
551 buffer_info = next_buffer;
552 }
553 rx_ring->next_to_clean = i;
554
555 cleaned_count = e1000_desc_unused(rx_ring);
556 if (cleaned_count)
557 adapter->alloc_rx_buf(adapter, cleaned_count);
558
bc7f75fa 559 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 560 adapter->total_rx_packets += total_rx_packets;
41988692 561 adapter->net_stats.rx_bytes += total_rx_bytes;
7c25769f 562 adapter->net_stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 563 return cleaned;
564}
565
bc7f75fa
AK		 566static void e1000_put_txbuf(struct e1000_adapter *adapter,
567 struct e1000_buffer *buffer_info)
568{
569 if (buffer_info->dma) {
570 pci_unmap_page(adapter->pdev, buffer_info->dma,
571 buffer_info->length, PCI_DMA_TODEVICE);
572 buffer_info->dma = 0;
573 }
574 if (buffer_info->skb) {
575 dev_kfree_skb_any(buffer_info->skb);
576 buffer_info->skb = NULL;
577 }
578}
579
580static void e1000_print_tx_hang(struct e1000_adapter *adapter)
581{
582 struct e1000_ring *tx_ring = adapter->tx_ring;
583 unsigned int i = tx_ring->next_to_clean;
584 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
585 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 586
587 /* detected Tx unit hang */
44defeb3
JK		 588 e_err("Detected Tx Unit Hang:\n"
589 " TDH <%x>\n"
590 " TDT <%x>\n"
591 " next_to_use <%x>\n"
592 " next_to_clean <%x>\n"
593 "buffer_info[next_to_clean]:\n"
594 " time_stamp <%lx>\n"
595 " next_to_watch <%x>\n"
596 " jiffies <%lx>\n"
597 " next_to_watch.status <%x>\n",
598 readl(adapter->hw.hw_addr + tx_ring->head),
599 readl(adapter->hw.hw_addr + tx_ring->tail),
600 tx_ring->next_to_use,
601 tx_ring->next_to_clean,
602 tx_ring->buffer_info[eop].time_stamp,
603 eop,
604 jiffies,
605 eop_desc->upper.fields.status);
bc7f75fa
AK		 606}
607
608/**
609 * e1000_clean_tx_irq - Reclaim resources after transmit completes
610 * @adapter: board private structure
611 *
612 * the return value indicates whether actual cleaning was done, there
613 * is no guarantee that everything was cleaned
614 **/
615static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
616{
617 struct net_device *netdev = adapter->netdev;
618 struct e1000_hw *hw = &adapter->hw;
619 struct e1000_ring *tx_ring = adapter->tx_ring;
620 struct e1000_tx_desc *tx_desc, *eop_desc;
621 struct e1000_buffer *buffer_info;
622 unsigned int i, eop;
623 unsigned int count = 0;
624 bool cleaned = 0;
625 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
626
627 i = tx_ring->next_to_clean;
628 eop = tx_ring->buffer_info[i].next_to_watch;
629 eop_desc = E1000_TX_DESC(*tx_ring, eop);
630
631 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
632 for (cleaned = 0; !cleaned; ) {
633 tx_desc = E1000_TX_DESC(*tx_ring, i);
634 buffer_info = &tx_ring->buffer_info[i];
635 cleaned = (i == eop);
636
637 if (cleaned) {
638 struct sk_buff *skb = buffer_info->skb;
639 unsigned int segs, bytecount;
640 segs = skb_shinfo(skb)->gso_segs ?: 1;
641 /* multiply data chunks by size of headers */
642 bytecount = ((segs - 1) * skb_headlen(skb)) +
643 skb->len;
644 total_tx_packets += segs;
645 total_tx_bytes += bytecount;
646 }
647
648 e1000_put_txbuf(adapter, buffer_info);
649 tx_desc->upper.data = 0;
650
651 i++;
652 if (i == tx_ring->count)
653 i = 0;
654 }
655
656 eop = tx_ring->buffer_info[i].next_to_watch;
657 eop_desc = E1000_TX_DESC(*tx_ring, eop);
658#define E1000_TX_WEIGHT 64
659 /* weight of a sort for tx, to avoid endless transmit cleanup */
660 if (count++ == E1000_TX_WEIGHT)
661 break;
662 }
663
664 tx_ring->next_to_clean = i;
665
666#define TX_WAKE_THRESHOLD 32
667 if (cleaned && netif_carrier_ok(netdev) &&
668 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
669 /* Make sure that anybody stopping the queue after this
670 * sees the new next_to_clean.
671 */
672 smp_mb();
673
674 if (netif_queue_stopped(netdev) &&
675 !(test_bit(__E1000_DOWN, &adapter->state))) {
676 netif_wake_queue(netdev);
677 ++adapter->restart_queue;
678 }
679 }
680
681 if (adapter->detect_tx_hung) {
ad68076e
BA		 682 /*
683 * Detect a transmit hang in hardware, this serializes the
684 * check with the clearing of time_stamp and movement of i
685 */
bc7f75fa
AK		 686 adapter->detect_tx_hung = 0;
687 if (tx_ring->buffer_info[eop].dma &&
688 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp
689 + (adapter->tx_timeout_factor * HZ))
ad68076e 690 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
bc7f75fa
AK		 691 e1000_print_tx_hang(adapter);
692 netif_stop_queue(netdev);
693 }
694 }
695 adapter->total_tx_bytes += total_tx_bytes;
696 adapter->total_tx_packets += total_tx_packets;
41988692 697 adapter->net_stats.tx_bytes += total_tx_bytes;
7c25769f 698 adapter->net_stats.tx_packets += total_tx_packets;
bc7f75fa
AK		 699 return cleaned;
700}
701
bc7f75fa
AK		 702/**
703 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
704 * @adapter: board private structure
705 *
706 * the return value indicates whether actual cleaning was done, there
707 * is no guarantee that everything was cleaned
708 **/
709static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
710 int *work_done, int work_to_do)
711{
712 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
713 struct net_device *netdev = adapter->netdev;
714 struct pci_dev *pdev = adapter->pdev;
715 struct e1000_ring *rx_ring = adapter->rx_ring;
716 struct e1000_buffer *buffer_info, *next_buffer;
717 struct e1000_ps_page *ps_page;
718 struct sk_buff *skb;
719 unsigned int i, j;
720 u32 length, staterr;
721 int cleaned_count = 0;
722 bool cleaned = 0;
723 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
724
725 i = rx_ring->next_to_clean;
726 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
727 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
728 buffer_info = &rx_ring->buffer_info[i];
729
730 while (staterr & E1000_RXD_STAT_DD) {
731 if (*work_done >= work_to_do)
732 break;
733 (*work_done)++;
734 skb = buffer_info->skb;
735
736 /* in the packet split case this is header only */
737 prefetch(skb->data - NET_IP_ALIGN);
738
739 i++;
740 if (i == rx_ring->count)
741 i = 0;
742 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
743 prefetch(next_rxd);
744
745 next_buffer = &rx_ring->buffer_info[i];
746
747 cleaned = 1;
748 cleaned_count++;
749 pci_unmap_single(pdev, buffer_info->dma,
750 adapter->rx_ps_bsize0,
751 PCI_DMA_FROMDEVICE);
752 buffer_info->dma = 0;
753
754 if (!(staterr & E1000_RXD_STAT_EOP)) {
44defeb3
JK		 755 e_dbg("%s: Packet Split buffers didn't pick up the "
756 "full packet\n", netdev->name);
bc7f75fa
AK		 757 dev_kfree_skb_irq(skb);
758 goto next_desc;
759 }
760
761 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
762 dev_kfree_skb_irq(skb);
763 goto next_desc;
764 }
765
766 length = le16_to_cpu(rx_desc->wb.middle.length0);
767
768 if (!length) {
44defeb3
JK		 769 e_dbg("%s: Last part of the packet spanning multiple "
770 "descriptors\n", netdev->name);
bc7f75fa
AK		 771 dev_kfree_skb_irq(skb);
772 goto next_desc;
773 }
774
775 /* Good Receive */
776 skb_put(skb, length);
777
778 {
ad68076e
BA		 779 /*
780 * this looks ugly, but it seems compiler issues make it
781 * more efficient than reusing j
782 */
bc7f75fa
AK		 783 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
784
ad68076e
BA		 785 /*
786 * page alloc/put takes too long and effects small packet
787 * throughput, so unsplit small packets and save the alloc/put
788 * only valid in softirq (napi) context to call kmap_*
789 */
bc7f75fa
AK		 790 if (l1 && (l1 <= copybreak) &&
791 ((length + l1) <= adapter->rx_ps_bsize0)) {
792 u8 *vaddr;
793
47f44e40 794 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 795
ad68076e
BA		 796 /*
797 * there is no documentation about how to call
bc7f75fa 798 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 799 * very long
800 */
bc7f75fa
AK		 801 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
802 PAGE_SIZE, PCI_DMA_FROMDEVICE);
803 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
804 memcpy(skb_tail_pointer(skb), vaddr, l1);
805 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
806 pci_dma_sync_single_for_device(pdev, ps_page->dma,
807 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 808
eb7c3adb
JK		 809 /* remove the CRC */
810 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
811 l1 -= 4;
812
bc7f75fa
AK		 813 skb_put(skb, l1);
814 goto copydone;
815 } /* if */
816 }
817
818 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
819 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
820 if (!length)
821 break;
822
47f44e40 823 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 824 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
825 PCI_DMA_FROMDEVICE);
826 ps_page->dma = 0;
827 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
828 ps_page->page = NULL;
829 skb->len += length;
830 skb->data_len += length;
831 skb->truesize += length;
832 }
833
eb7c3adb
JK		 834 /* strip the ethernet crc, problem is we're using pages now so
835 * this whole operation can get a little cpu intensive
836 */
837 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
838 pskb_trim(skb, skb->len - 4);
839
bc7f75fa
AK		 840copydone:
841 total_rx_bytes += skb->len;
842 total_rx_packets++;
843
844 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
845 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
846
847 if (rx_desc->wb.upper.header_status &
848 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
849 adapter->rx_hdr_split++;
850
851 e1000_receive_skb(adapter, netdev, skb,
852 staterr, rx_desc->wb.middle.vlan);
853
854next_desc:
855 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
856 buffer_info->skb = NULL;
857
858 /* return some buffers to hardware, one at a time is too slow */
859 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
860 adapter->alloc_rx_buf(adapter, cleaned_count);
861 cleaned_count = 0;
862 }
863
864 /* use prefetched values */
865 rx_desc = next_rxd;
866 buffer_info = next_buffer;
867
868 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
869 }
870 rx_ring->next_to_clean = i;
871
872 cleaned_count = e1000_desc_unused(rx_ring);
873 if (cleaned_count)
874 adapter->alloc_rx_buf(adapter, cleaned_count);
875
bc7f75fa 876 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 877 adapter->total_rx_packets += total_rx_packets;
41988692 878 adapter->net_stats.rx_bytes += total_rx_bytes;
7c25769f 879 adapter->net_stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 880 return cleaned;
881}
882
97ac8cae
BA		 883/**
884 * e1000_consume_page - helper function
885 **/
886static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
887 u16 length)
888{
889 bi->page = NULL;
890 skb->len += length;
891 skb->data_len += length;
892 skb->truesize += length;
893}
894
895/**
896 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
897 * @adapter: board private structure
898 *
899 * the return value indicates whether actual cleaning was done, there
900 * is no guarantee that everything was cleaned
901 **/
902
903static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
904 int *work_done, int work_to_do)
905{
906 struct net_device *netdev = adapter->netdev;
907 struct pci_dev *pdev = adapter->pdev;
908 struct e1000_ring *rx_ring = adapter->rx_ring;
909 struct e1000_rx_desc *rx_desc, *next_rxd;
910 struct e1000_buffer *buffer_info, *next_buffer;
911 u32 length;
912 unsigned int i;
913 int cleaned_count = 0;
914 bool cleaned = false;
915 unsigned int total_rx_bytes=0, total_rx_packets=0;
916
917 i = rx_ring->next_to_clean;
918 rx_desc = E1000_RX_DESC(*rx_ring, i);
919 buffer_info = &rx_ring->buffer_info[i];
920
921 while (rx_desc->status & E1000_RXD_STAT_DD) {
922 struct sk_buff *skb;
923 u8 status;
924
925 if (*work_done >= work_to_do)
926 break;
927 (*work_done)++;
928
929 status = rx_desc->status;
930 skb = buffer_info->skb;
931 buffer_info->skb = NULL;
932
933 ++i;
934 if (i == rx_ring->count)
935 i = 0;
936 next_rxd = E1000_RX_DESC(*rx_ring, i);
937 prefetch(next_rxd);
938
939 next_buffer = &rx_ring->buffer_info[i];
940
941 cleaned = true;
942 cleaned_count++;
943 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
944 PCI_DMA_FROMDEVICE);
945 buffer_info->dma = 0;
946
947 length = le16_to_cpu(rx_desc->length);
948
949 /* errors is only valid for DD + EOP descriptors */
950 if (unlikely((status & E1000_RXD_STAT_EOP) &&
951 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
952 /* recycle both page and skb */
953 buffer_info->skb = skb;
954 /* an error means any chain goes out the window
955 * too */
956 if (rx_ring->rx_skb_top)
957 dev_kfree_skb(rx_ring->rx_skb_top);
958 rx_ring->rx_skb_top = NULL;
959 goto next_desc;
960 }
961
962#define rxtop rx_ring->rx_skb_top
963 if (!(status & E1000_RXD_STAT_EOP)) {
964 /* this descriptor is only the beginning (or middle) */
965 if (!rxtop) {
966 /* this is the beginning of a chain */
967 rxtop = skb;
968 skb_fill_page_desc(rxtop, 0, buffer_info->page,
969 0, length);
970 } else {
971 /* this is the middle of a chain */
972 skb_fill_page_desc(rxtop,
973 skb_shinfo(rxtop)->nr_frags,
974 buffer_info->page, 0, length);
975 /* re-use the skb, only consumed the page */
976 buffer_info->skb = skb;
977 }
978 e1000_consume_page(buffer_info, rxtop, length);
979 goto next_desc;
980 } else {
981 if (rxtop) {
982 /* end of the chain */
983 skb_fill_page_desc(rxtop,
984 skb_shinfo(rxtop)->nr_frags,
985 buffer_info->page, 0, length);
986 /* re-use the current skb, we only consumed the
987 * page */
988 buffer_info->skb = skb;
989 skb = rxtop;
990 rxtop = NULL;
991 e1000_consume_page(buffer_info, skb, length);
992 } else {
993 /* no chain, got EOP, this buf is the packet
994 * copybreak to save the put_page/alloc_page */
995 if (length <= copybreak &&
996 skb_tailroom(skb) >= length) {
997 u8 *vaddr;
998 vaddr = kmap_atomic(buffer_info->page,
999 KM_SKB_DATA_SOFTIRQ);
1000 memcpy(skb_tail_pointer(skb), vaddr,
1001 length);
1002 kunmap_atomic(vaddr,
1003 KM_SKB_DATA_SOFTIRQ);
1004 /* re-use the page, so don't erase
1005 * buffer_info->page */
1006 skb_put(skb, length);
1007 } else {
1008 skb_fill_page_desc(skb, 0,
1009 buffer_info->page, 0,
1010 length);
1011 e1000_consume_page(buffer_info, skb,
1012 length);
1013 }
1014 }
1015 }
1016
1017 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1018 e1000_rx_checksum(adapter,
1019 (u32)(status) |
1020 ((u32)(rx_desc->errors) << 24),
1021 le16_to_cpu(rx_desc->csum), skb);
1022
1023 /* probably a little skewed due to removing CRC */
1024 total_rx_bytes += skb->len;
1025 total_rx_packets++;
1026
1027 /* eth type trans needs skb->data to point to something */
1028 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1029 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1030 dev_kfree_skb(skb);
1031 goto next_desc;
1032 }
1033
1034 e1000_receive_skb(adapter, netdev, skb, status,
1035 rx_desc->special);
1036
1037next_desc:
1038 rx_desc->status = 0;
1039
1040 /* return some buffers to hardware, one at a time is too slow */
1041 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1042 adapter->alloc_rx_buf(adapter, cleaned_count);
1043 cleaned_count = 0;
1044 }
1045
1046 /* use prefetched values */
1047 rx_desc = next_rxd;
1048 buffer_info = next_buffer;
1049 }
1050 rx_ring->next_to_clean = i;
1051
1052 cleaned_count = e1000_desc_unused(rx_ring);
1053 if (cleaned_count)
1054 adapter->alloc_rx_buf(adapter, cleaned_count);
1055
1056 adapter->total_rx_bytes += total_rx_bytes;
1057 adapter->total_rx_packets += total_rx_packets;
1058 adapter->net_stats.rx_bytes += total_rx_bytes;
1059 adapter->net_stats.rx_packets += total_rx_packets;
1060 return cleaned;
1061}
1062
bc7f75fa
AK		 1063/**
1064 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1065 * @adapter: board private structure
1066 **/
1067static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1068{
1069 struct e1000_ring *rx_ring = adapter->rx_ring;
1070 struct e1000_buffer *buffer_info;
1071 struct e1000_ps_page *ps_page;
1072 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1073 unsigned int i, j;
1074
1075 /* Free all the Rx ring sk_buffs */
1076 for (i = 0; i < rx_ring->count; i++) {
1077 buffer_info = &rx_ring->buffer_info[i];
1078 if (buffer_info->dma) {
1079 if (adapter->clean_rx == e1000_clean_rx_irq)
1080 pci_unmap_single(pdev, buffer_info->dma,
1081 adapter->rx_buffer_len,
1082 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1083 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1084 pci_unmap_page(pdev, buffer_info->dma,
1085 PAGE_SIZE,
1086 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1087 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1088 pci_unmap_single(pdev, buffer_info->dma,
1089 adapter->rx_ps_bsize0,
1090 PCI_DMA_FROMDEVICE);
1091 buffer_info->dma = 0;
1092 }
1093
97ac8cae
BA		 1094 if (buffer_info->page) {
1095 put_page(buffer_info->page);
1096 buffer_info->page = NULL;
1097 }
1098
bc7f75fa
AK		 1099 if (buffer_info->skb) {
1100 dev_kfree_skb(buffer_info->skb);
1101 buffer_info->skb = NULL;
1102 }
1103
1104 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1105 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1106 if (!ps_page->page)
1107 break;
1108 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1109 PCI_DMA_FROMDEVICE);
1110 ps_page->dma = 0;
1111 put_page(ps_page->page);
1112 ps_page->page = NULL;
1113 }
1114 }
1115
1116 /* there also may be some cached data from a chained receive */
1117 if (rx_ring->rx_skb_top) {
1118 dev_kfree_skb(rx_ring->rx_skb_top);
1119 rx_ring->rx_skb_top = NULL;
1120 }
1121
bc7f75fa
AK		 1122 /* Zero out the descriptor ring */
1123 memset(rx_ring->desc, 0, rx_ring->size);
1124
1125 rx_ring->next_to_clean = 0;
1126 rx_ring->next_to_use = 0;
1127
1128 writel(0, adapter->hw.hw_addr + rx_ring->head);
1129 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1130}
1131
a8f88ff5
JB		 1132static void e1000e_downshift_workaround(struct work_struct *work)
1133{
1134 struct e1000_adapter *adapter = container_of(work,
1135 struct e1000_adapter, downshift_task);
1136
1137 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1138}
1139
bc7f75fa
AK		 1140/**
1141 * e1000_intr_msi - Interrupt Handler
1142 * @irq: interrupt number
1143 * @data: pointer to a network interface device structure
1144 **/
1145static irqreturn_t e1000_intr_msi(int irq, void *data)
1146{
1147 struct net_device *netdev = data;
1148 struct e1000_adapter *adapter = netdev_priv(netdev);
1149 struct e1000_hw *hw = &adapter->hw;
1150 u32 icr = er32(ICR);
1151
ad68076e
BA		 1152 /*
1153 * read ICR disables interrupts using IAM
1154 */
bc7f75fa
AK		 1155
1156 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1157 hw->mac.get_link_status = 1;
ad68076e
BA		 1158 /*
1159 * ICH8 workaround-- Call gig speed drop workaround on cable
1160 * disconnect (LSC) before accessing any PHY registers
1161 */
bc7f75fa
AK		 1162 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1163 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1164 schedule_work(&adapter->downshift_task);
bc7f75fa 1165
ad68076e
BA		 1166 /*
1167 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1168 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1169 * adapter in watchdog
1170 */
bc7f75fa
AK		 1171 if (netif_carrier_ok(netdev) &&
1172 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1173 /* disable receives */
1174 u32 rctl = er32(RCTL);
1175 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1176 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1177 }
1178 /* guard against interrupt when we're going down */
1179 if (!test_bit(__E1000_DOWN, &adapter->state))
1180 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1181 }
1182
288379f0 1183 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1184 adapter->total_tx_bytes = 0;
1185 adapter->total_tx_packets = 0;
1186 adapter->total_rx_bytes = 0;
1187 adapter->total_rx_packets = 0;
288379f0 1188 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1189 }
1190
1191 return IRQ_HANDLED;
1192}
1193
1194/**
1195 * e1000_intr - Interrupt Handler
1196 * @irq: interrupt number
1197 * @data: pointer to a network interface device structure
1198 **/
1199static irqreturn_t e1000_intr(int irq, void *data)
1200{
1201 struct net_device *netdev = data;
1202 struct e1000_adapter *adapter = netdev_priv(netdev);
1203 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1204 u32 rctl, icr = er32(ICR);
4662e82b 1205
bc7f75fa
AK		 1206 if (!icr)
1207 return IRQ_NONE; /* Not our interrupt */
1208
ad68076e
BA		 1209 /*
1210 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1211 * not set, then the adapter didn't send an interrupt
1212 */
bc7f75fa
AK		 1213 if (!(icr & E1000_ICR_INT_ASSERTED))
1214 return IRQ_NONE;
1215
ad68076e
BA		 1216 /*
1217 * Interrupt Auto-Mask...upon reading ICR,
1218 * interrupts are masked. No need for the
1219 * IMC write
1220 */
bc7f75fa
AK		 1221
1222 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1223 hw->mac.get_link_status = 1;
ad68076e
BA		 1224 /*
1225 * ICH8 workaround-- Call gig speed drop workaround on cable
1226 * disconnect (LSC) before accessing any PHY registers
1227 */
bc7f75fa
AK		 1228 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1229 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1230 schedule_work(&adapter->downshift_task);
bc7f75fa 1231
ad68076e
BA		 1232 /*
1233 * 80003ES2LAN workaround--
bc7f75fa
AK		 1234 * For packet buffer work-around on link down event;
1235 * disable receives here in the ISR and
1236 * reset adapter in watchdog
1237 */
1238 if (netif_carrier_ok(netdev) &&
1239 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1240 /* disable receives */
1241 rctl = er32(RCTL);
1242 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1243 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1244 }
1245 /* guard against interrupt when we're going down */
1246 if (!test_bit(__E1000_DOWN, &adapter->state))
1247 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1248 }
1249
288379f0 1250 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1251 adapter->total_tx_bytes = 0;
1252 adapter->total_tx_packets = 0;
1253 adapter->total_rx_bytes = 0;
1254 adapter->total_rx_packets = 0;
288379f0 1255 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1256 }
1257
1258 return IRQ_HANDLED;
1259}
1260
4662e82b
BA		 1261static irqreturn_t e1000_msix_other(int irq, void *data)
1262{
1263 struct net_device *netdev = data;
1264 struct e1000_adapter *adapter = netdev_priv(netdev);
1265 struct e1000_hw *hw = &adapter->hw;
1266 u32 icr = er32(ICR);
1267
1268 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1269 ew32(IMS, E1000_IMS_OTHER);
1270 return IRQ_NONE;
1271 }
1272
1273 if (icr & adapter->eiac_mask)
1274 ew32(ICS, (icr & adapter->eiac_mask));
1275
1276 if (icr & E1000_ICR_OTHER) {
1277 if (!(icr & E1000_ICR_LSC))
1278 goto no_link_interrupt;
1279 hw->mac.get_link_status = 1;
1280 /* guard against interrupt when we're going down */
1281 if (!test_bit(__E1000_DOWN, &adapter->state))
1282 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1283 }
1284
1285no_link_interrupt:
1286 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1287
1288 return IRQ_HANDLED;
1289}
1290
1291
1292static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1293{
1294 struct net_device *netdev = data;
1295 struct e1000_adapter *adapter = netdev_priv(netdev);
1296 struct e1000_hw *hw = &adapter->hw;
1297 struct e1000_ring *tx_ring = adapter->tx_ring;
1298
1299
1300 adapter->total_tx_bytes = 0;
1301 adapter->total_tx_packets = 0;
1302
1303 if (!e1000_clean_tx_irq(adapter))
1304 /* Ring was not completely cleaned, so fire another interrupt */
1305 ew32(ICS, tx_ring->ims_val);
1306
1307 return IRQ_HANDLED;
1308}
1309
1310static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1311{
1312 struct net_device *netdev = data;
1313 struct e1000_adapter *adapter = netdev_priv(netdev);
1314
1315 /* Write the ITR value calculated at the end of the
1316 * previous interrupt.
1317 */
1318 if (adapter->rx_ring->set_itr) {
1319 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1320 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1321 adapter->rx_ring->set_itr = 0;
1322 }
1323
288379f0 1324 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1325 adapter->total_rx_bytes = 0;
1326 adapter->total_rx_packets = 0;
288379f0 1327 __napi_schedule(&adapter->napi);
4662e82b
BA		 1328 }
1329 return IRQ_HANDLED;
1330}
1331
1332/**
1333 * e1000_configure_msix - Configure MSI-X hardware
1334 *
1335 * e1000_configure_msix sets up the hardware to properly
1336 * generate MSI-X interrupts.
1337 **/
1338static void e1000_configure_msix(struct e1000_adapter *adapter)
1339{
1340 struct e1000_hw *hw = &adapter->hw;
1341 struct e1000_ring *rx_ring = adapter->rx_ring;
1342 struct e1000_ring *tx_ring = adapter->tx_ring;
1343 int vector = 0;
1344 u32 ctrl_ext, ivar = 0;
1345
1346 adapter->eiac_mask = 0;
1347
1348 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1349 if (hw->mac.type == e1000_82574) {
1350 u32 rfctl = er32(RFCTL);
1351 rfctl |= E1000_RFCTL_ACK_DIS;
1352 ew32(RFCTL, rfctl);
1353 }
1354
1355#define E1000_IVAR_INT_ALLOC_VALID 0x8
1356 /* Configure Rx vector */
1357 rx_ring->ims_val = E1000_IMS_RXQ0;
1358 adapter->eiac_mask |= rx_ring->ims_val;
1359 if (rx_ring->itr_val)
1360 writel(1000000000 / (rx_ring->itr_val * 256),
1361 hw->hw_addr + rx_ring->itr_register);
1362 else
1363 writel(1, hw->hw_addr + rx_ring->itr_register);
1364 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1365
1366 /* Configure Tx vector */
1367 tx_ring->ims_val = E1000_IMS_TXQ0;
1368 vector++;
1369 if (tx_ring->itr_val)
1370 writel(1000000000 / (tx_ring->itr_val * 256),
1371 hw->hw_addr + tx_ring->itr_register);
1372 else
1373 writel(1, hw->hw_addr + tx_ring->itr_register);
1374 adapter->eiac_mask |= tx_ring->ims_val;
1375 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1376
1377 /* set vector for Other Causes, e.g. link changes */
1378 vector++;
1379 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1380 if (rx_ring->itr_val)
1381 writel(1000000000 / (rx_ring->itr_val * 256),
1382 hw->hw_addr + E1000_EITR_82574(vector));
1383 else
1384 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1385
1386 /* Cause Tx interrupts on every write back */
1387 ivar |= (1 << 31);
1388
1389 ew32(IVAR, ivar);
1390
1391 /* enable MSI-X PBA support */
1392 ctrl_ext = er32(CTRL_EXT);
1393 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1394
1395 /* Auto-Mask Other interrupts upon ICR read */
1396#define E1000_EIAC_MASK_82574 0x01F00000
1397 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1398 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1399 ew32(CTRL_EXT, ctrl_ext);
1400 e1e_flush();
1401}
1402
1403void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1404{
1405 if (adapter->msix_entries) {
1406 pci_disable_msix(adapter->pdev);
1407 kfree(adapter->msix_entries);
1408 adapter->msix_entries = NULL;
1409 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1410 pci_disable_msi(adapter->pdev);
1411 adapter->flags &= ~FLAG_MSI_ENABLED;
1412 }
1413
1414 return;
1415}
1416
1417/**
1418 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1419 *
1420 * Attempt to configure interrupts using the best available
1421 * capabilities of the hardware and kernel.
1422 **/
1423void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1424{
1425 int err;
1426 int numvecs, i;
1427
1428
1429 switch (adapter->int_mode) {
1430 case E1000E_INT_MODE_MSIX:
1431 if (adapter->flags & FLAG_HAS_MSIX) {
1432 numvecs = 3; /* RxQ0, TxQ0 and other */
1433 adapter->msix_entries = kcalloc(numvecs,
1434 sizeof(struct msix_entry),
1435 GFP_KERNEL);
1436 if (adapter->msix_entries) {
1437 for (i = 0; i < numvecs; i++)
1438 adapter->msix_entries[i].entry = i;
1439
1440 err = pci_enable_msix(adapter->pdev,
1441 adapter->msix_entries,
1442 numvecs);
1443 if (err == 0)
1444 return;
1445 }
1446 /* MSI-X failed, so fall through and try MSI */
1447 e_err("Failed to initialize MSI-X interrupts. "
1448 "Falling back to MSI interrupts.\n");
1449 e1000e_reset_interrupt_capability(adapter);
1450 }
1451 adapter->int_mode = E1000E_INT_MODE_MSI;
1452 /* Fall through */
1453 case E1000E_INT_MODE_MSI:
1454 if (!pci_enable_msi(adapter->pdev)) {
1455 adapter->flags |= FLAG_MSI_ENABLED;
1456 } else {
1457 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1458 e_err("Failed to initialize MSI interrupts. Falling "
1459 "back to legacy interrupts.\n");
1460 }
1461 /* Fall through */
1462 case E1000E_INT_MODE_LEGACY:
1463 /* Don't do anything; this is the system default */
1464 break;
1465 }
1466
1467 return;
1468}
1469
1470/**
1471 * e1000_request_msix - Initialize MSI-X interrupts
1472 *
1473 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1474 * kernel.
1475 **/
1476static int e1000_request_msix(struct e1000_adapter *adapter)
1477{
1478 struct net_device *netdev = adapter->netdev;
1479 int err = 0, vector = 0;
1480
1481 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1482 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1483 else
1484 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1485 err = request_irq(adapter->msix_entries[vector].vector,
1486 &e1000_intr_msix_rx, 0, adapter->rx_ring->name,
1487 netdev);
1488 if (err)
1489 goto out;
1490 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1491 adapter->rx_ring->itr_val = adapter->itr;
1492 vector++;
1493
1494 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1495 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1496 else
1497 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1498 err = request_irq(adapter->msix_entries[vector].vector,
1499 &e1000_intr_msix_tx, 0, adapter->tx_ring->name,
1500 netdev);
1501 if (err)
1502 goto out;
1503 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1504 adapter->tx_ring->itr_val = adapter->itr;
1505 vector++;
1506
1507 err = request_irq(adapter->msix_entries[vector].vector,
1508 &e1000_msix_other, 0, netdev->name, netdev);
1509 if (err)
1510 goto out;
1511
1512 e1000_configure_msix(adapter);
1513 return 0;
1514out:
1515 return err;
1516}
1517
f8d59f78
BA		 1518/**
1519 * e1000_request_irq - initialize interrupts
1520 *
1521 * Attempts to configure interrupts using the best available
1522 * capabilities of the hardware and kernel.
1523 **/
bc7f75fa
AK		 1524static int e1000_request_irq(struct e1000_adapter *adapter)
1525{
1526 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1527 int err;
1528
4662e82b
BA		 1529 if (adapter->msix_entries) {
1530 err = e1000_request_msix(adapter);
1531 if (!err)
1532 return err;
1533 /* fall back to MSI */
1534 e1000e_reset_interrupt_capability(adapter);
1535 adapter->int_mode = E1000E_INT_MODE_MSI;
1536 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1537 }
4662e82b
BA		 1538 if (adapter->flags & FLAG_MSI_ENABLED) {
1539 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, 0,
1540 netdev->name, netdev);
1541 if (!err)
1542 return err;
bc7f75fa 1543
4662e82b
BA		 1544 /* fall back to legacy interrupt */
1545 e1000e_reset_interrupt_capability(adapter);
1546 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1547 }
1548
4662e82b
BA		 1549 err = request_irq(adapter->pdev->irq, &e1000_intr, IRQF_SHARED,
1550 netdev->name, netdev);
1551 if (err)
1552 e_err("Unable to allocate interrupt, Error: %d\n", err);
1553
bc7f75fa
AK		 1554 return err;
1555}
1556
1557static void e1000_free_irq(struct e1000_adapter *adapter)
1558{
1559 struct net_device *netdev = adapter->netdev;
1560
4662e82b
BA		 1561 if (adapter->msix_entries) {
1562 int vector = 0;
1563
1564 free_irq(adapter->msix_entries[vector].vector, netdev);
1565 vector++;
1566
1567 free_irq(adapter->msix_entries[vector].vector, netdev);
1568 vector++;
1569
1570 /* Other Causes interrupt vector */
1571 free_irq(adapter->msix_entries[vector].vector, netdev);
1572 return;
bc7f75fa 1573 }
4662e82b
BA		 1574
1575 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1576}
1577
1578/**
1579 * e1000_irq_disable - Mask off interrupt generation on the NIC
1580 **/
1581static void e1000_irq_disable(struct e1000_adapter *adapter)
1582{
1583 struct e1000_hw *hw = &adapter->hw;
1584
bc7f75fa 1585 ew32(IMC, ~0);
4662e82b
BA		 1586 if (adapter->msix_entries)
1587 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1588 e1e_flush();
1589 synchronize_irq(adapter->pdev->irq);
1590}
1591
1592/**
1593 * e1000_irq_enable - Enable default interrupt generation settings
1594 **/
1595static void e1000_irq_enable(struct e1000_adapter *adapter)
1596{
1597 struct e1000_hw *hw = &adapter->hw;
1598
4662e82b
BA		 1599 if (adapter->msix_entries) {
1600 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1601 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1602 } else {
1603 ew32(IMS, IMS_ENABLE_MASK);
1604 }
74ef9c39 1605 e1e_flush();
bc7f75fa
AK		 1606}
1607
1608/**
1609 * e1000_get_hw_control - get control of the h/w from f/w
1610 * @adapter: address of board private structure
1611 *
489815ce 1612 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1613 * For ASF and Pass Through versions of f/w this means that
1614 * the driver is loaded. For AMT version (only with 82573)
1615 * of the f/w this means that the network i/f is open.
1616 **/
1617static void e1000_get_hw_control(struct e1000_adapter *adapter)
1618{
1619 struct e1000_hw *hw = &adapter->hw;
1620 u32 ctrl_ext;
1621 u32 swsm;
1622
1623 /* Let firmware know the driver has taken over */
1624 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1625 swsm = er32(SWSM);
1626 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1627 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1628 ctrl_ext = er32(CTRL_EXT);
ad68076e 1629 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1630 }
1631}
1632
1633/**
1634 * e1000_release_hw_control - release control of the h/w to f/w
1635 * @adapter: address of board private structure
1636 *
489815ce 1637 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1638 * For ASF and Pass Through versions of f/w this means that the
1639 * driver is no longer loaded. For AMT version (only with 82573) i
1640 * of the f/w this means that the network i/f is closed.
1641 *
1642 **/
1643static void e1000_release_hw_control(struct e1000_adapter *adapter)
1644{
1645 struct e1000_hw *hw = &adapter->hw;
1646 u32 ctrl_ext;
1647 u32 swsm;
1648
1649 /* Let firmware taken over control of h/w */
1650 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1651 swsm = er32(SWSM);
1652 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1653 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1654 ctrl_ext = er32(CTRL_EXT);
ad68076e 1655 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1656 }
1657}
1658
bc7f75fa
AK		 1659/**
1660 * @e1000_alloc_ring - allocate memory for a ring structure
1661 **/
1662static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1663 struct e1000_ring *ring)
1664{
1665 struct pci_dev *pdev = adapter->pdev;
1666
1667 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1668 GFP_KERNEL);
1669 if (!ring->desc)
1670 return -ENOMEM;
1671
1672 return 0;
1673}
1674
1675/**
1676 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1677 * @adapter: board private structure
1678 *
1679 * Return 0 on success, negative on failure
1680 **/
1681int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1682{
1683 struct e1000_ring *tx_ring = adapter->tx_ring;
1684 int err = -ENOMEM, size;
1685
1686 size = sizeof(struct e1000_buffer) * tx_ring->count;
1687 tx_ring->buffer_info = vmalloc(size);
1688 if (!tx_ring->buffer_info)
1689 goto err;
1690 memset(tx_ring->buffer_info, 0, size);
1691
1692 /* round up to nearest 4K */
1693 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1694 tx_ring->size = ALIGN(tx_ring->size, 4096);
1695
1696 err = e1000_alloc_ring_dma(adapter, tx_ring);
1697 if (err)
1698 goto err;
1699
1700 tx_ring->next_to_use = 0;
1701 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 1702
1703 return 0;
1704err:
1705 vfree(tx_ring->buffer_info);
44defeb3 1706 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1707 return err;
1708}
1709
1710/**
1711 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1712 * @adapter: board private structure
1713 *
1714 * Returns 0 on success, negative on failure
1715 **/
1716int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1717{
1718 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1719 struct e1000_buffer *buffer_info;
1720 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1721
1722 size = sizeof(struct e1000_buffer) * rx_ring->count;
1723 rx_ring->buffer_info = vmalloc(size);
1724 if (!rx_ring->buffer_info)
1725 goto err;
1726 memset(rx_ring->buffer_info, 0, size);
1727
47f44e40
AK		 1728 for (i = 0; i < rx_ring->count; i++) {
1729 buffer_info = &rx_ring->buffer_info[i];
1730 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1731 sizeof(struct e1000_ps_page),
1732 GFP_KERNEL);
1733 if (!buffer_info->ps_pages)
1734 goto err_pages;
1735 }
bc7f75fa
AK		 1736
1737 desc_len = sizeof(union e1000_rx_desc_packet_split);
1738
1739 /* Round up to nearest 4K */
1740 rx_ring->size = rx_ring->count * desc_len;
1741 rx_ring->size = ALIGN(rx_ring->size, 4096);
1742
1743 err = e1000_alloc_ring_dma(adapter, rx_ring);
1744 if (err)
47f44e40 1745 goto err_pages;
bc7f75fa
AK		 1746
1747 rx_ring->next_to_clean = 0;
1748 rx_ring->next_to_use = 0;
1749 rx_ring->rx_skb_top = NULL;
1750
1751 return 0;
47f44e40
AK		 1752
1753err_pages:
1754 for (i = 0; i < rx_ring->count; i++) {
1755 buffer_info = &rx_ring->buffer_info[i];
1756 kfree(buffer_info->ps_pages);
1757 }
bc7f75fa
AK		 1758err:
1759 vfree(rx_ring->buffer_info);
44defeb3 1760 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1761 return err;
1762}
1763
1764/**
1765 * e1000_clean_tx_ring - Free Tx Buffers
1766 * @adapter: board private structure
1767 **/
1768static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1769{
1770 struct e1000_ring *tx_ring = adapter->tx_ring;
1771 struct e1000_buffer *buffer_info;
1772 unsigned long size;
1773 unsigned int i;
1774
1775 for (i = 0; i < tx_ring->count; i++) {
1776 buffer_info = &tx_ring->buffer_info[i];
1777 e1000_put_txbuf(adapter, buffer_info);
1778 }
1779
1780 size = sizeof(struct e1000_buffer) * tx_ring->count;
1781 memset(tx_ring->buffer_info, 0, size);
1782
1783 memset(tx_ring->desc, 0, tx_ring->size);
1784
1785 tx_ring->next_to_use = 0;
1786 tx_ring->next_to_clean = 0;
1787
1788 writel(0, adapter->hw.hw_addr + tx_ring->head);
1789 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1790}
1791
1792/**
1793 * e1000e_free_tx_resources - Free Tx Resources per Queue
1794 * @adapter: board private structure
1795 *
1796 * Free all transmit software resources
1797 **/
1798void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1799{
1800 struct pci_dev *pdev = adapter->pdev;
1801 struct e1000_ring *tx_ring = adapter->tx_ring;
1802
1803 e1000_clean_tx_ring(adapter);
1804
1805 vfree(tx_ring->buffer_info);
1806 tx_ring->buffer_info = NULL;
1807
1808 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1809 tx_ring->dma);
1810 tx_ring->desc = NULL;
1811}
1812
1813/**
1814 * e1000e_free_rx_resources - Free Rx Resources
1815 * @adapter: board private structure
1816 *
1817 * Free all receive software resources
1818 **/
1819
1820void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1821{
1822 struct pci_dev *pdev = adapter->pdev;
1823 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1824 int i;
bc7f75fa
AK		 1825
1826 e1000_clean_rx_ring(adapter);
1827
47f44e40
AK		 1828 for (i = 0; i < rx_ring->count; i++) {
1829 kfree(rx_ring->buffer_info[i].ps_pages);
1830 }
1831
bc7f75fa
AK		 1832 vfree(rx_ring->buffer_info);
1833 rx_ring->buffer_info = NULL;
1834
bc7f75fa
AK		 1835 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1836 rx_ring->dma);
1837 rx_ring->desc = NULL;
1838}
1839
1840/**
1841 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1842 * @adapter: pointer to adapter
1843 * @itr_setting: current adapter->itr
1844 * @packets: the number of packets during this measurement interval
1845 * @bytes: the number of bytes during this measurement interval
1846 *
bc7f75fa
AK		 1847 * Stores a new ITR value based on packets and byte
1848 * counts during the last interrupt. The advantage of per interrupt
1849 * computation is faster updates and more accurate ITR for the current
1850 * traffic pattern. Constants in this function were computed
1851 * based on theoretical maximum wire speed and thresholds were set based
1852 * on testing data as well as attempting to minimize response time
4662e82b
BA		 1853 * while increasing bulk throughput. This functionality is controlled
1854 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 1855 **/
1856static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1857 u16 itr_setting, int packets,
1858 int bytes)
1859{
1860 unsigned int retval = itr_setting;
1861
1862 if (packets == 0)
1863 goto update_itr_done;
1864
1865 switch (itr_setting) {
1866 case lowest_latency:
1867 /* handle TSO and jumbo frames */
1868 if (bytes/packets > 8000)
1869 retval = bulk_latency;
1870 else if ((packets < 5) && (bytes > 512)) {
1871 retval = low_latency;
1872 }
1873 break;
1874 case low_latency: /* 50 usec aka 20000 ints/s */
1875 if (bytes > 10000) {
1876 /* this if handles the TSO accounting */
1877 if (bytes/packets > 8000) {
1878 retval = bulk_latency;
1879 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1880 retval = bulk_latency;
1881 } else if ((packets > 35)) {
1882 retval = lowest_latency;
1883 }
1884 } else if (bytes/packets > 2000) {
1885 retval = bulk_latency;
1886 } else if (packets <= 2 && bytes < 512) {
1887 retval = lowest_latency;
1888 }
1889 break;
1890 case bulk_latency: /* 250 usec aka 4000 ints/s */
1891 if (bytes > 25000) {
1892 if (packets > 35) {
1893 retval = low_latency;
1894 }
1895 } else if (bytes < 6000) {
1896 retval = low_latency;
1897 }
1898 break;
1899 }
1900
1901update_itr_done:
1902 return retval;
1903}
1904
1905static void e1000_set_itr(struct e1000_adapter *adapter)
1906{
1907 struct e1000_hw *hw = &adapter->hw;
1908 u16 current_itr;
1909 u32 new_itr = adapter->itr;
1910
1911 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1912 if (adapter->link_speed != SPEED_1000) {
1913 current_itr = 0;
1914 new_itr = 4000;
1915 goto set_itr_now;
1916 }
1917
1918 adapter->tx_itr = e1000_update_itr(adapter,
1919 adapter->tx_itr,
1920 adapter->total_tx_packets,
1921 adapter->total_tx_bytes);
1922 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1923 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1924 adapter->tx_itr = low_latency;
1925
1926 adapter->rx_itr = e1000_update_itr(adapter,
1927 adapter->rx_itr,
1928 adapter->total_rx_packets,
1929 adapter->total_rx_bytes);
1930 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1931 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1932 adapter->rx_itr = low_latency;
1933
1934 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1935
1936 switch (current_itr) {
1937 /* counts and packets in update_itr are dependent on these numbers */
1938 case lowest_latency:
1939 new_itr = 70000;
1940 break;
1941 case low_latency:
1942 new_itr = 20000; /* aka hwitr = ~200 */
1943 break;
1944 case bulk_latency:
1945 new_itr = 4000;
1946 break;
1947 default:
1948 break;
1949 }
1950
1951set_itr_now:
1952 if (new_itr != adapter->itr) {
ad68076e
BA		 1953 /*
1954 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1955 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1956 * increasing
1957 */
bc7f75fa
AK		 1958 new_itr = new_itr > adapter->itr ?
1959 min(adapter->itr + (new_itr >> 2), new_itr) :
1960 new_itr;
1961 adapter->itr = new_itr;
4662e82b
BA		 1962 adapter->rx_ring->itr_val = new_itr;
1963 if (adapter->msix_entries)
1964 adapter->rx_ring->set_itr = 1;
1965 else
1966 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 1967 }
1968}
1969
4662e82b
BA		 1970/**
1971 * e1000_alloc_queues - Allocate memory for all rings
1972 * @adapter: board private structure to initialize
1973 **/
1974static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1975{
1976 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1977 if (!adapter->tx_ring)
1978 goto err;
1979
1980 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1981 if (!adapter->rx_ring)
1982 goto err;
1983
1984 return 0;
1985err:
1986 e_err("Unable to allocate memory for queues\n");
1987 kfree(adapter->rx_ring);
1988 kfree(adapter->tx_ring);
1989 return -ENOMEM;
1990}
1991
bc7f75fa
AK		 1992/**
1993 * e1000_clean - NAPI Rx polling callback
ad68076e 1994 * @napi: struct associated with this polling callback
489815ce 1995 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 1996 **/
1997static int e1000_clean(struct napi_struct *napi, int budget)
1998{
1999 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2000 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2001 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 2002 int tx_cleaned = 0, work_done = 0;
bc7f75fa 2003
4cf1653a 2004 adapter = netdev_priv(poll_dev);
bc7f75fa 2005
4662e82b
BA		 2006 if (adapter->msix_entries &&
2007 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2008 goto clean_rx;
2009
92af3e95 2010 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2011
4662e82b 2012clean_rx:
bc7f75fa 2013 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6
DM		 2014
2015 if (tx_cleaned)
2016 work_done = budget;
bc7f75fa 2017
53e52c72
DM		 2018 /* If budget not fully consumed, exit the polling mode */
2019 if (work_done < budget) {
bc7f75fa
AK		 2020 if (adapter->itr_setting & 3)
2021 e1000_set_itr(adapter);
288379f0 2022 napi_complete(napi);
4662e82b
BA		 2023 if (adapter->msix_entries)
2024 ew32(IMS, adapter->rx_ring->ims_val);
2025 else
2026 e1000_irq_enable(adapter);
bc7f75fa
AK		 2027 }
2028
2029 return work_done;
2030}
2031
2032static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2033{
2034 struct e1000_adapter *adapter = netdev_priv(netdev);
2035 struct e1000_hw *hw = &adapter->hw;
2036 u32 vfta, index;
2037
2038 /* don't update vlan cookie if already programmed */
2039 if ((adapter->hw.mng_cookie.status &
2040 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2041 (vid == adapter->mng_vlan_id))
2042 return;
2043 /* add VID to filter table */
2044 index = (vid >> 5) & 0x7F;
2045 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2046 vfta |= (1 << (vid & 0x1F));
2047 e1000e_write_vfta(hw, index, vfta);
2048}
2049
2050static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2051{
2052 struct e1000_adapter *adapter = netdev_priv(netdev);
2053 struct e1000_hw *hw = &adapter->hw;
2054 u32 vfta, index;
2055
74ef9c39
JB		 2056 if (!test_bit(__E1000_DOWN, &adapter->state))
2057 e1000_irq_disable(adapter);
bc7f75fa 2058 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2059
2060 if (!test_bit(__E1000_DOWN, &adapter->state))
2061 e1000_irq_enable(adapter);
bc7f75fa
AK		 2062
2063 if ((adapter->hw.mng_cookie.status &
2064 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2065 (vid == adapter->mng_vlan_id)) {
2066 /* release control to f/w */
2067 e1000_release_hw_control(adapter);
2068 return;
2069 }
2070
2071 /* remove VID from filter table */
2072 index = (vid >> 5) & 0x7F;
2073 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2074 vfta &= ~(1 << (vid & 0x1F));
2075 e1000e_write_vfta(hw, index, vfta);
2076}
2077
2078static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2079{
2080 struct net_device *netdev = adapter->netdev;
2081 u16 vid = adapter->hw.mng_cookie.vlan_id;
2082 u16 old_vid = adapter->mng_vlan_id;
2083
2084 if (!adapter->vlgrp)
2085 return;
2086
2087 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2088 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2089 if (adapter->hw.mng_cookie.status &
2090 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2091 e1000_vlan_rx_add_vid(netdev, vid);
2092 adapter->mng_vlan_id = vid;
2093 }
2094
2095 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2096 (vid != old_vid) &&
2097 !vlan_group_get_device(adapter->vlgrp, old_vid))
2098 e1000_vlan_rx_kill_vid(netdev, old_vid);
2099 } else {
2100 adapter->mng_vlan_id = vid;
2101 }
2102}
2103
2104
2105static void e1000_vlan_rx_register(struct net_device *netdev,
2106 struct vlan_group *grp)
2107{
2108 struct e1000_adapter *adapter = netdev_priv(netdev);
2109 struct e1000_hw *hw = &adapter->hw;
2110 u32 ctrl, rctl;
2111
74ef9c39
JB		 2112 if (!test_bit(__E1000_DOWN, &adapter->state))
2113 e1000_irq_disable(adapter);
bc7f75fa
AK		 2114 adapter->vlgrp = grp;
2115
2116 if (grp) {
2117 /* enable VLAN tag insert/strip */
2118 ctrl = er32(CTRL);
2119 ctrl |= E1000_CTRL_VME;
2120 ew32(CTRL, ctrl);
2121
2122 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2123 /* enable VLAN receive filtering */
2124 rctl = er32(RCTL);
bc7f75fa
AK		 2125 rctl &= ~E1000_RCTL_CFIEN;
2126 ew32(RCTL, rctl);
2127 e1000_update_mng_vlan(adapter);
2128 }
2129 } else {
2130 /* disable VLAN tag insert/strip */
2131 ctrl = er32(CTRL);
2132 ctrl &= ~E1000_CTRL_VME;
2133 ew32(CTRL, ctrl);
2134
2135 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2136 if (adapter->mng_vlan_id !=
2137 (u16)E1000_MNG_VLAN_NONE) {
2138 e1000_vlan_rx_kill_vid(netdev,
2139 adapter->mng_vlan_id);
2140 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2141 }
2142 }
2143 }
2144
74ef9c39
JB		 2145 if (!test_bit(__E1000_DOWN, &adapter->state))
2146 e1000_irq_enable(adapter);
bc7f75fa
AK		 2147}
2148
2149static void e1000_restore_vlan(struct e1000_adapter *adapter)
2150{
2151 u16 vid;
2152
2153 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2154
2155 if (!adapter->vlgrp)
2156 return;
2157
2158 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2159 if (!vlan_group_get_device(adapter->vlgrp, vid))
2160 continue;
2161 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2162 }
2163}
2164
2165static void e1000_init_manageability(struct e1000_adapter *adapter)
2166{
2167 struct e1000_hw *hw = &adapter->hw;
2168 u32 manc, manc2h;
2169
2170 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2171 return;
2172
2173 manc = er32(MANC);
2174
ad68076e
BA		 2175 /*
2176 * enable receiving management packets to the host. this will probably
bc7f75fa 2177 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2178 * the packets will be handled on SMBUS
2179 */
bc7f75fa
AK		 2180 manc |= E1000_MANC_EN_MNG2HOST;
2181 manc2h = er32(MANC2H);
2182#define E1000_MNG2HOST_PORT_623 (1 << 5)
2183#define E1000_MNG2HOST_PORT_664 (1 << 6)
2184 manc2h |= E1000_MNG2HOST_PORT_623;
2185 manc2h |= E1000_MNG2HOST_PORT_664;
2186 ew32(MANC2H, manc2h);
2187 ew32(MANC, manc);
2188}
2189
2190/**
2191 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2192 * @adapter: board private structure
2193 *
2194 * Configure the Tx unit of the MAC after a reset.
2195 **/
2196static void e1000_configure_tx(struct e1000_adapter *adapter)
2197{
2198 struct e1000_hw *hw = &adapter->hw;
2199 struct e1000_ring *tx_ring = adapter->tx_ring;
2200 u64 tdba;
2201 u32 tdlen, tctl, tipg, tarc;
2202 u32 ipgr1, ipgr2;
2203
2204 /* Setup the HW Tx Head and Tail descriptor pointers */
2205 tdba = tx_ring->dma;
2206 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2207 ew32(TDBAL, (tdba & DMA_32BIT_MASK));
2208 ew32(TDBAH, (tdba >> 32));
2209 ew32(TDLEN, tdlen);
2210 ew32(TDH, 0);
2211 ew32(TDT, 0);
2212 tx_ring->head = E1000_TDH;
2213 tx_ring->tail = E1000_TDT;
2214
2215 /* Set the default values for the Tx Inter Packet Gap timer */
2216 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2217 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2218 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2219
2220 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2221 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2222
2223 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2224 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2225 ew32(TIPG, tipg);
2226
2227 /* Set the Tx Interrupt Delay register */
2228 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2229 /* Tx irq moderation */
bc7f75fa
AK		 2230 ew32(TADV, adapter->tx_abs_int_delay);
2231
2232 /* Program the Transmit Control Register */
2233 tctl = er32(TCTL);
2234 tctl &= ~E1000_TCTL_CT;
2235 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2236 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2237
2238 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2239 tarc = er32(TARC(0));
ad68076e
BA		 2240 /*
2241 * set the speed mode bit, we'll clear it if we're not at
2242 * gigabit link later
2243 */
bc7f75fa
AK		 2244#define SPEED_MODE_BIT (1 << 21)
2245 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2246 ew32(TARC(0), tarc);
bc7f75fa
AK		 2247 }
2248
2249 /* errata: program both queues to unweighted RR */
2250 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2251 tarc = er32(TARC(0));
bc7f75fa 2252 tarc |= 1;
e9ec2c0f
JK		 2253 ew32(TARC(0), tarc);
2254 tarc = er32(TARC(1));
bc7f75fa 2255 tarc |= 1;
e9ec2c0f 2256 ew32(TARC(1), tarc);
bc7f75fa
AK		 2257 }
2258
2259 e1000e_config_collision_dist(hw);
2260
2261 /* Setup Transmit Descriptor Settings for eop descriptor */
2262 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2263
2264 /* only set IDE if we are delaying interrupts using the timers */
2265 if (adapter->tx_int_delay)
2266 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2267
2268 /* enable Report Status bit */
2269 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2270
2271 ew32(TCTL, tctl);
2272
2273 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2274}
2275
2276/**
2277 * e1000_setup_rctl - configure the receive control registers
2278 * @adapter: Board private structure
2279 **/
2280#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2281 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2282static void e1000_setup_rctl(struct e1000_adapter *adapter)
2283{
2284 struct e1000_hw *hw = &adapter->hw;
2285 u32 rctl, rfctl;
2286 u32 psrctl = 0;
2287 u32 pages = 0;
2288
2289 /* Program MC offset vector base */
2290 rctl = er32(RCTL);
2291 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2292 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2293 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2294 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2295
2296 /* Do not Store bad packets */
2297 rctl &= ~E1000_RCTL_SBP;
2298
2299 /* Enable Long Packet receive */
2300 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2301 rctl &= ~E1000_RCTL_LPE;
2302 else
2303 rctl |= E1000_RCTL_LPE;
2304
eb7c3adb
JK		 2305 /* Some systems expect that the CRC is included in SMBUS traffic. The
2306 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2307 * host memory when this is enabled
2308 */
2309 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2310 rctl |= E1000_RCTL_SECRC;
5918bd88 2311
bc7f75fa
AK		 2312 /* Setup buffer sizes */
2313 rctl &= ~E1000_RCTL_SZ_4096;
2314 rctl |= E1000_RCTL_BSEX;
2315 switch (adapter->rx_buffer_len) {
2316 case 256:
2317 rctl |= E1000_RCTL_SZ_256;
2318 rctl &= ~E1000_RCTL_BSEX;
2319 break;
2320 case 512:
2321 rctl |= E1000_RCTL_SZ_512;
2322 rctl &= ~E1000_RCTL_BSEX;
2323 break;
2324 case 1024:
2325 rctl |= E1000_RCTL_SZ_1024;
2326 rctl &= ~E1000_RCTL_BSEX;
2327 break;
2328 case 2048:
2329 default:
2330 rctl |= E1000_RCTL_SZ_2048;
2331 rctl &= ~E1000_RCTL_BSEX;
2332 break;
2333 case 4096:
2334 rctl |= E1000_RCTL_SZ_4096;
2335 break;
2336 case 8192:
2337 rctl |= E1000_RCTL_SZ_8192;
2338 break;
2339 case 16384:
2340 rctl |= E1000_RCTL_SZ_16384;
2341 break;
2342 }
2343
2344 /*
2345 * 82571 and greater support packet-split where the protocol
2346 * header is placed in skb->data and the packet data is
2347 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2348 * In the case of a non-split, skb->data is linearly filled,
2349 * followed by the page buffers. Therefore, skb->data is
2350 * sized to hold the largest protocol header.
2351 *
2352 * allocations using alloc_page take too long for regular MTU
2353 * so only enable packet split for jumbo frames
2354 *
2355 * Using pages when the page size is greater than 16k wastes
2356 * a lot of memory, since we allocate 3 pages at all times
2357 * per packet.
2358 */
bc7f75fa 2359 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2360 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2361 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2362 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2363 else
2364 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2365
2366 if (adapter->rx_ps_pages) {
2367 /* Configure extra packet-split registers */
2368 rfctl = er32(RFCTL);
2369 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2370 /*
2371 * disable packet split support for IPv6 extension headers,
2372 * because some malformed IPv6 headers can hang the Rx
2373 */
bc7f75fa
AK		 2374 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2375 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2376
2377 ew32(RFCTL, rfctl);
2378
140a7480
AK		 2379 /* Enable Packet split descriptors */
2380 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2381
2382 psrctl |= adapter->rx_ps_bsize0 >>
2383 E1000_PSRCTL_BSIZE0_SHIFT;
2384
2385 switch (adapter->rx_ps_pages) {
2386 case 3:
2387 psrctl |= PAGE_SIZE <<
2388 E1000_PSRCTL_BSIZE3_SHIFT;
2389 case 2:
2390 psrctl |= PAGE_SIZE <<
2391 E1000_PSRCTL_BSIZE2_SHIFT;
2392 case 1:
2393 psrctl |= PAGE_SIZE >>
2394 E1000_PSRCTL_BSIZE1_SHIFT;
2395 break;
2396 }
2397
2398 ew32(PSRCTL, psrctl);
2399 }
2400
2401 ew32(RCTL, rctl);
318a94d6
JK		 2402 /* just started the receive unit, no need to restart */
2403 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2404}
2405
2406/**
2407 * e1000_configure_rx - Configure Receive Unit after Reset
2408 * @adapter: board private structure
2409 *
2410 * Configure the Rx unit of the MAC after a reset.
2411 **/
2412static void e1000_configure_rx(struct e1000_adapter *adapter)
2413{
2414 struct e1000_hw *hw = &adapter->hw;
2415 struct e1000_ring *rx_ring = adapter->rx_ring;
2416 u64 rdba;
2417 u32 rdlen, rctl, rxcsum, ctrl_ext;
2418
2419 if (adapter->rx_ps_pages) {
2420 /* this is a 32 byte descriptor */
2421 rdlen = rx_ring->count *
2422 sizeof(union e1000_rx_desc_packet_split);
2423 adapter->clean_rx = e1000_clean_rx_irq_ps;
2424 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2425 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2426 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2427 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2428 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2429 } else {
97ac8cae 2430 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2431 adapter->clean_rx = e1000_clean_rx_irq;
2432 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2433 }
2434
2435 /* disable receives while setting up the descriptors */
2436 rctl = er32(RCTL);
2437 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2438 e1e_flush();
2439 msleep(10);
2440
2441 /* set the Receive Delay Timer Register */
2442 ew32(RDTR, adapter->rx_int_delay);
2443
2444 /* irq moderation */
2445 ew32(RADV, adapter->rx_abs_int_delay);
2446 if (adapter->itr_setting != 0)
ad68076e 2447 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2448
2449 ctrl_ext = er32(CTRL_EXT);
2450 /* Reset delay timers after every interrupt */
2451 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2452 /* Auto-Mask interrupts upon ICR access */
2453 ctrl_ext |= E1000_CTRL_EXT_IAME;
2454 ew32(IAM, 0xffffffff);
2455 ew32(CTRL_EXT, ctrl_ext);
2456 e1e_flush();
2457
ad68076e
BA		 2458 /*
2459 * Setup the HW Rx Head and Tail Descriptor Pointers and
2460 * the Base and Length of the Rx Descriptor Ring
2461 */
bc7f75fa
AK		 2462 rdba = rx_ring->dma;
2463 ew32(RDBAL, (rdba & DMA_32BIT_MASK));
2464 ew32(RDBAH, (rdba >> 32));
2465 ew32(RDLEN, rdlen);
2466 ew32(RDH, 0);
2467 ew32(RDT, 0);
2468 rx_ring->head = E1000_RDH;
2469 rx_ring->tail = E1000_RDT;
2470
2471 /* Enable Receive Checksum Offload for TCP and UDP */
2472 rxcsum = er32(RXCSUM);
2473 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2474 rxcsum |= E1000_RXCSUM_TUOFL;
2475
ad68076e
BA		 2476 /*
2477 * IPv4 payload checksum for UDP fragments must be
2478 * used in conjunction with packet-split.
2479 */
bc7f75fa
AK		 2480 if (adapter->rx_ps_pages)
2481 rxcsum |= E1000_RXCSUM_IPPCSE;
2482 } else {
2483 rxcsum &= ~E1000_RXCSUM_TUOFL;
2484 /* no need to clear IPPCSE as it defaults to 0 */
2485 }
2486 ew32(RXCSUM, rxcsum);
2487
ad68076e
BA		 2488 /*
2489 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2490 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2491 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2492 */
bc7f75fa 2493 if ((adapter->flags & FLAG_HAS_ERT) &&
97ac8cae
BA		 2494 (adapter->netdev->mtu > ETH_DATA_LEN)) {
2495 u32 rxdctl = er32(RXDCTL(0));
2496 ew32(RXDCTL(0), rxdctl | 0x3);
2497 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2498 /*
2499 * With jumbo frames and early-receive enabled, excessive
2500 * C4->C2 latencies result in dropped transactions.
2501 */
2502 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2503 e1000e_driver_name, 55);
2504 } else {
2505 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2506 e1000e_driver_name,
2507 PM_QOS_DEFAULT_VALUE);
2508 }
bc7f75fa
AK		 2509
2510 /* Enable Receives */
2511 ew32(RCTL, rctl);
2512}
2513
2514/**
e2de3eb6 2515 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2516 * @hw: pointer to the HW structure
2517 * @mc_addr_list: array of multicast addresses to program
2518 * @mc_addr_count: number of multicast addresses to program
2519 * @rar_used_count: the first RAR register free to program
2520 * @rar_count: total number of supported Receive Address Registers
2521 *
2522 * Updates the Receive Address Registers and Multicast Table Array.
2523 * The caller must have a packed mc_addr_list of multicast addresses.
2524 * The parameter rar_count will usually be hw->mac.rar_entry_count
2525 * unless there are workarounds that change this. Currently no func pointer
2526 * exists and all implementations are handled in the generic version of this
2527 * function.
2528 **/
e2de3eb6
JK		 2529static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2530 u32 mc_addr_count, u32 rar_used_count,
2531 u32 rar_count)
bc7f75fa 2532{
e2de3eb6 2533 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
bc7f75fa
AK		 2534 rar_used_count, rar_count);
2535}
2536
2537/**
2538 * e1000_set_multi - Multicast and Promiscuous mode set
2539 * @netdev: network interface device structure
2540 *
2541 * The set_multi entry point is called whenever the multicast address
2542 * list or the network interface flags are updated. This routine is
2543 * responsible for configuring the hardware for proper multicast,
2544 * promiscuous mode, and all-multi behavior.
2545 **/
2546static void e1000_set_multi(struct net_device *netdev)
2547{
2548 struct e1000_adapter *adapter = netdev_priv(netdev);
2549 struct e1000_hw *hw = &adapter->hw;
2550 struct e1000_mac_info *mac = &hw->mac;
2551 struct dev_mc_list *mc_ptr;
2552 u8 *mta_list;
2553 u32 rctl;
2554 int i;
2555
2556 /* Check for Promiscuous and All Multicast modes */
2557
2558 rctl = er32(RCTL);
2559
2560 if (netdev->flags & IFF_PROMISC) {
2561 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2562 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2563 } else {
746b9f02
PM		 2564 if (netdev->flags & IFF_ALLMULTI) {
2565 rctl |= E1000_RCTL_MPE;
2566 rctl &= ~E1000_RCTL_UPE;
2567 } else {
2568 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2569 }
78ed11a5 2570 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2571 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2572 }
2573
2574 ew32(RCTL, rctl);
2575
2576 if (netdev->mc_count) {
2577 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2578 if (!mta_list)
2579 return;
2580
2581 /* prepare a packed array of only addresses. */
2582 mc_ptr = netdev->mc_list;
2583
2584 for (i = 0; i < netdev->mc_count; i++) {
2585 if (!mc_ptr)
2586 break;
2587 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2588 ETH_ALEN);
2589 mc_ptr = mc_ptr->next;
2590 }
2591
e2de3eb6 2592 e1000_update_mc_addr_list(hw, mta_list, i, 1,
bc7f75fa
AK		 2593 mac->rar_entry_count);
2594 kfree(mta_list);
2595 } else {
2596 /*
2597 * if we're called from probe, we might not have
2598 * anything to do here, so clear out the list
2599 */
e2de3eb6 2600 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
bc7f75fa
AK		 2601 }
2602}
2603
2604/**
ad68076e 2605 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2606 * @adapter: private board structure
2607 **/
2608static void e1000_configure(struct e1000_adapter *adapter)
2609{
2610 e1000_set_multi(adapter->netdev);
2611
2612 e1000_restore_vlan(adapter);
2613 e1000_init_manageability(adapter);
2614
2615 e1000_configure_tx(adapter);
2616 e1000_setup_rctl(adapter);
2617 e1000_configure_rx(adapter);
ad68076e 2618 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2619}
2620
2621/**
2622 * e1000e_power_up_phy - restore link in case the phy was powered down
2623 * @adapter: address of board private structure
2624 *
2625 * The phy may be powered down to save power and turn off link when the
2626 * driver is unloaded and wake on lan is not enabled (among others)
2627 * *** this routine MUST be followed by a call to e1000e_reset ***
2628 **/
2629void e1000e_power_up_phy(struct e1000_adapter *adapter)
2630{
2631 u16 mii_reg = 0;
2632
2633 /* Just clear the power down bit to wake the phy back up */
318a94d6 2634 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
ad68076e
BA		 2635 /*
2636 * According to the manual, the phy will retain its
2637 * settings across a power-down/up cycle
2638 */
bc7f75fa
AK		 2639 e1e_rphy(&adapter->hw, PHY_CONTROL, &mii_reg);
2640 mii_reg &= ~MII_CR_POWER_DOWN;
2641 e1e_wphy(&adapter->hw, PHY_CONTROL, mii_reg);
2642 }
2643
2644 adapter->hw.mac.ops.setup_link(&adapter->hw);
2645}
2646
2647/**
2648 * e1000_power_down_phy - Power down the PHY
2649 *
2650 * Power down the PHY so no link is implied when interface is down
2651 * The PHY cannot be powered down is management or WoL is active
2652 */
2653static void e1000_power_down_phy(struct e1000_adapter *adapter)
2654{
2655 struct e1000_hw *hw = &adapter->hw;
2656 u16 mii_reg;
2657
2658 /* WoL is enabled */
23b66e2b 2659 if (adapter->wol)
bc7f75fa
AK		 2660 return;
2661
2662 /* non-copper PHY? */
318a94d6 2663 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 2664 return;
2665
2666 /* reset is blocked because of a SoL/IDER session */
ad68076e 2667 if (e1000e_check_mng_mode(hw) || e1000_check_reset_block(hw))
bc7f75fa
AK		 2668 return;
2669
489815ce 2670 /* manageability (AMT) is enabled */
bc7f75fa
AK		 2671 if (er32(MANC) & E1000_MANC_SMBUS_EN)
2672 return;
2673
2674 /* power down the PHY */
2675 e1e_rphy(hw, PHY_CONTROL, &mii_reg);
2676 mii_reg |= MII_CR_POWER_DOWN;
2677 e1e_wphy(hw, PHY_CONTROL, mii_reg);
2678 mdelay(1);
2679}
2680
2681/**
2682 * e1000e_reset - bring the hardware into a known good state
2683 *
2684 * This function boots the hardware and enables some settings that
2685 * require a configuration cycle of the hardware - those cannot be
2686 * set/changed during runtime. After reset the device needs to be
ad68076e 2687 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2688 */
2689void e1000e_reset(struct e1000_adapter *adapter)
2690{
2691 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2692 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2693 struct e1000_hw *hw = &adapter->hw;
2694 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2695 u32 pba = adapter->pba;
bc7f75fa
AK		 2696 u16 hwm;
2697
ad68076e 2698 /* reset Packet Buffer Allocation to default */
318a94d6 2699 ew32(PBA, pba);
df762464 2700
318a94d6 2701 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2702 /*
2703 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2704 * large enough to accommodate two full transmit packets,
2705 * rounded up to the next 1KB and expressed in KB. Likewise,
2706 * the Rx FIFO should be large enough to accommodate at least
2707 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2708 * expressed in KB.
2709 */
df762464 2710 pba = er32(PBA);
bc7f75fa 2711 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2712 tx_space = pba >> 16;
bc7f75fa 2713 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2714 pba &= 0xffff;
ad68076e
BA		 2715 /*
2716 * the Tx fifo also stores 16 bytes of information about the tx
2717 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2718 */
2719 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2720 sizeof(struct e1000_tx_desc) -
2721 ETH_FCS_LEN) * 2;
2722 min_tx_space = ALIGN(min_tx_space, 1024);
2723 min_tx_space >>= 10;
2724 /* software strips receive CRC, so leave room for it */
318a94d6 2725 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2726 min_rx_space = ALIGN(min_rx_space, 1024);
2727 min_rx_space >>= 10;
2728
ad68076e
BA		 2729 /*
2730 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2731 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2732 * allocation, take space away from current Rx allocation
2733 */
df762464
AK		 2734 if ((tx_space < min_tx_space) &&
2735 ((min_tx_space - tx_space) < pba)) {
2736 pba -= min_tx_space - tx_space;
bc7f75fa 2737
ad68076e
BA		 2738 /*
2739 * if short on Rx space, Rx wins and must trump tx
2740 * adjustment or use Early Receive if available
2741 */
df762464 2742 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2743 (!(adapter->flags & FLAG_HAS_ERT)))
2744 /* ERT enabled in e1000_configure_rx */
df762464 2745 pba = min_rx_space;
bc7f75fa 2746 }
df762464
AK		 2747
2748 ew32(PBA, pba);
bc7f75fa
AK		 2749 }
2750
bc7f75fa 2751
ad68076e
BA		 2752 /*
2753 * flow control settings
2754 *
2755 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 2756 * (or the size used for early receive) above it in the Rx FIFO.
2757 * Set it to the lower of:
2758 * - 90% of the Rx FIFO size, and
2759 * - the full Rx FIFO size minus the early receive size (for parts
2760 * with ERT support assuming ERT set to E1000_ERT_2048), or
ad68076e
BA		 2761 * - the full Rx FIFO size minus one full frame
2762 */
bc7f75fa 2763 if (adapter->flags & FLAG_HAS_ERT)
318a94d6
JK		 2764 hwm = min(((pba << 10) * 9 / 10),
2765 ((pba << 10) - (E1000_ERT_2048 << 3)));
bc7f75fa 2766 else
318a94d6
JK		 2767 hwm = min(((pba << 10) * 9 / 10),
2768 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2769
318a94d6
JK		 2770 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
2771 fc->low_water = fc->high_water - 8;
bc7f75fa
AK		 2772
2773 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2774 fc->pause_time = 0xFFFF;
bc7f75fa 2775 else
318a94d6
JK		 2776 fc->pause_time = E1000_FC_PAUSE_TIME;
2777 fc->send_xon = 1;
5c48ef3e 2778 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 2779
2780 /* Allow time for pending master requests to run */
2781 mac->ops.reset_hw(hw);
97ac8cae
BA		 2782
2783 /*
2784 * For parts with AMT enabled, let the firmware know
2785 * that the network interface is in control
2786 */
c43bc57e 2787 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2788 e1000_get_hw_control(adapter);
2789
bc7f75fa
AK		 2790 ew32(WUC, 0);
2791
2792 if (mac->ops.init_hw(hw))
44defeb3 2793 e_err("Hardware Error\n");
bc7f75fa
AK		 2794
2795 e1000_update_mng_vlan(adapter);
2796
2797 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2798 ew32(VET, ETH_P_8021Q);
2799
2800 e1000e_reset_adaptive(hw);
2801 e1000_get_phy_info(hw);
2802
2803 if (!(adapter->flags & FLAG_SMART_POWER_DOWN)) {
2804 u16 phy_data = 0;
ad68076e
BA		 2805 /*
2806 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2807 * the return value of this function because there is nothing
ad68076e
BA		 2808 * different we would do if it failed
2809 */
bc7f75fa
AK		 2810 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2811 phy_data &= ~IGP02E1000_PM_SPD;
2812 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2813 }
bc7f75fa
AK		 2814}
2815
2816int e1000e_up(struct e1000_adapter *adapter)
2817{
2818 struct e1000_hw *hw = &adapter->hw;
2819
2820 /* hardware has been reset, we need to reload some things */
2821 e1000_configure(adapter);
2822
2823 clear_bit(__E1000_DOWN, &adapter->state);
2824
2825 napi_enable(&adapter->napi);
4662e82b
BA		 2826 if (adapter->msix_entries)
2827 e1000_configure_msix(adapter);
bc7f75fa
AK		 2828 e1000_irq_enable(adapter);
2829
2830 /* fire a link change interrupt to start the watchdog */
2831 ew32(ICS, E1000_ICS_LSC);
2832 return 0;
2833}
2834
2835void e1000e_down(struct e1000_adapter *adapter)
2836{
2837 struct net_device *netdev = adapter->netdev;
2838 struct e1000_hw *hw = &adapter->hw;
2839 u32 tctl, rctl;
2840
ad68076e
BA		 2841 /*
2842 * signal that we're down so the interrupt handler does not
2843 * reschedule our watchdog timer
2844 */
bc7f75fa
AK		 2845 set_bit(__E1000_DOWN, &adapter->state);
2846
2847 /* disable receives in the hardware */
2848 rctl = er32(RCTL);
2849 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2850 /* flush and sleep below */
2851
d55b53ff 2852 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK		 2853
2854 /* disable transmits in the hardware */
2855 tctl = er32(TCTL);
2856 tctl &= ~E1000_TCTL_EN;
2857 ew32(TCTL, tctl);
2858 /* flush both disables and wait for them to finish */
2859 e1e_flush();
2860 msleep(10);
2861
2862 napi_disable(&adapter->napi);
2863 e1000_irq_disable(adapter);
2864
2865 del_timer_sync(&adapter->watchdog_timer);
2866 del_timer_sync(&adapter->phy_info_timer);
2867
2868 netdev->tx_queue_len = adapter->tx_queue_len;
2869 netif_carrier_off(netdev);
2870 adapter->link_speed = 0;
2871 adapter->link_duplex = 0;
2872
52cc3086
JK		 2873 if (!pci_channel_offline(adapter->pdev))
2874 e1000e_reset(adapter);
bc7f75fa
AK		 2875 e1000_clean_tx_ring(adapter);
2876 e1000_clean_rx_ring(adapter);
2877
2878 /*
2879 * TODO: for power management, we could drop the link and
2880 * pci_disable_device here.
2881 */
2882}
2883
2884void e1000e_reinit_locked(struct e1000_adapter *adapter)
2885{
2886 might_sleep();
2887 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2888 msleep(1);
2889 e1000e_down(adapter);
2890 e1000e_up(adapter);
2891 clear_bit(__E1000_RESETTING, &adapter->state);
2892}
2893
2894/**
2895 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2896 * @adapter: board private structure to initialize
2897 *
2898 * e1000_sw_init initializes the Adapter private data structure.
2899 * Fields are initialized based on PCI device information and
2900 * OS network device settings (MTU size).
2901 **/
2902static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2903{
bc7f75fa
AK		 2904 struct net_device *netdev = adapter->netdev;
2905
2906 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2907 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2908 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2909 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2910
4662e82b 2911 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2912
4662e82b
BA		 2913 if (e1000_alloc_queues(adapter))
2914 return -ENOMEM;
bc7f75fa 2915
bc7f75fa 2916 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2917 e1000_irq_disable(adapter);
2918
bc7f75fa
AK		 2919 set_bit(__E1000_DOWN, &adapter->state);
2920 return 0;
bc7f75fa
AK		 2921}
2922
f8d59f78
BA		 2923/**
2924 * e1000_intr_msi_test - Interrupt Handler
2925 * @irq: interrupt number
2926 * @data: pointer to a network interface device structure
2927 **/
2928static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2929{
2930 struct net_device *netdev = data;
2931 struct e1000_adapter *adapter = netdev_priv(netdev);
2932 struct e1000_hw *hw = &adapter->hw;
2933 u32 icr = er32(ICR);
2934
2935 e_dbg("%s: icr is %08X\n", netdev->name, icr);
2936 if (icr & E1000_ICR_RXSEQ) {
2937 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2938 wmb();
2939 }
2940
2941 return IRQ_HANDLED;
2942}
2943
2944/**
2945 * e1000_test_msi_interrupt - Returns 0 for successful test
2946 * @adapter: board private struct
2947 *
2948 * code flow taken from tg3.c
2949 **/
2950static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2951{
2952 struct net_device *netdev = adapter->netdev;
2953 struct e1000_hw *hw = &adapter->hw;
2954 int err;
2955
2956 /* poll_enable hasn't been called yet, so don't need disable */
2957 /* clear any pending events */
2958 er32(ICR);
2959
2960 /* free the real vector and request a test handler */
2961 e1000_free_irq(adapter);
4662e82b 2962 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 2963
2964 /* Assume that the test fails, if it succeeds then the test
2965 * MSI irq handler will unset this flag */
2966 adapter->flags |= FLAG_MSI_TEST_FAILED;
2967
2968 err = pci_enable_msi(adapter->pdev);
2969 if (err)
2970 goto msi_test_failed;
2971
2972 err = request_irq(adapter->pdev->irq, &e1000_intr_msi_test, 0,
2973 netdev->name, netdev);
2974 if (err) {
2975 pci_disable_msi(adapter->pdev);
2976 goto msi_test_failed;
2977 }
2978
2979 wmb();
2980
2981 e1000_irq_enable(adapter);
2982
2983 /* fire an unusual interrupt on the test handler */
2984 ew32(ICS, E1000_ICS_RXSEQ);
2985 e1e_flush();
2986 msleep(50);
2987
2988 e1000_irq_disable(adapter);
2989
2990 rmb();
2991
2992 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 2993 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 2994 err = -EIO;
2995 e_info("MSI interrupt test failed!\n");
2996 }
2997
2998 free_irq(adapter->pdev->irq, netdev);
2999 pci_disable_msi(adapter->pdev);
3000
3001 if (err == -EIO)
3002 goto msi_test_failed;
3003
3004 /* okay so the test worked, restore settings */
3005 e_dbg("%s: MSI interrupt test succeeded!\n", netdev->name);
3006msi_test_failed:
4662e82b 3007 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3008 e1000_request_irq(adapter);
3009 return err;
3010}
3011
3012/**
3013 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3014 * @adapter: board private struct
3015 *
3016 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3017 **/
3018static int e1000_test_msi(struct e1000_adapter *adapter)
3019{
3020 int err;
3021 u16 pci_cmd;
3022
3023 if (!(adapter->flags & FLAG_MSI_ENABLED))
3024 return 0;
3025
3026 /* disable SERR in case the MSI write causes a master abort */
3027 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3028 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3029 pci_cmd & ~PCI_COMMAND_SERR);
3030
3031 err = e1000_test_msi_interrupt(adapter);
3032
3033 /* restore previous setting of command word */
3034 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3035
3036 /* success ! */
3037 if (!err)
3038 return 0;
3039
3040 /* EIO means MSI test failed */
3041 if (err != -EIO)
3042 return err;
3043
3044 /* back to INTx mode */
3045 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3046
3047 e1000_free_irq(adapter);
3048
3049 err = e1000_request_irq(adapter);
3050
3051 return err;
3052}
3053
bc7f75fa
AK		 3054/**
3055 * e1000_open - Called when a network interface is made active
3056 * @netdev: network interface device structure
3057 *
3058 * Returns 0 on success, negative value on failure
3059 *
3060 * The open entry point is called when a network interface is made
3061 * active by the system (IFF_UP). At this point all resources needed
3062 * for transmit and receive operations are allocated, the interrupt
3063 * handler is registered with the OS, the watchdog timer is started,
3064 * and the stack is notified that the interface is ready.
3065 **/
3066static int e1000_open(struct net_device *netdev)
3067{
3068 struct e1000_adapter *adapter = netdev_priv(netdev);
3069 struct e1000_hw *hw = &adapter->hw;
3070 int err;
3071
3072 /* disallow open during test */
3073 if (test_bit(__E1000_TESTING, &adapter->state))
3074 return -EBUSY;
3075
3076 /* allocate transmit descriptors */
3077 err = e1000e_setup_tx_resources(adapter);
3078 if (err)
3079 goto err_setup_tx;
3080
3081 /* allocate receive descriptors */
3082 err = e1000e_setup_rx_resources(adapter);
3083 if (err)
3084 goto err_setup_rx;
3085
3086 e1000e_power_up_phy(adapter);
3087
3088 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3089 if ((adapter->hw.mng_cookie.status &
3090 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3091 e1000_update_mng_vlan(adapter);
3092
ad68076e
BA		 3093 /*
3094 * If AMT is enabled, let the firmware know that the network
3095 * interface is now open
3096 */
c43bc57e 3097 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3098 e1000_get_hw_control(adapter);
3099
ad68076e
BA		 3100 /*
3101 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3102 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3103 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3104 * clean_rx handler before we do so.
3105 */
bc7f75fa
AK		 3106 e1000_configure(adapter);
3107
3108 err = e1000_request_irq(adapter);
3109 if (err)
3110 goto err_req_irq;
3111
f8d59f78
BA		 3112 /*
3113 * Work around PCIe errata with MSI interrupts causing some chipsets to
3114 * ignore e1000e MSI messages, which means we need to test our MSI
3115 * interrupt now
3116 */
4662e82b 3117 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3118 err = e1000_test_msi(adapter);
3119 if (err) {
3120 e_err("Interrupt allocation failed\n");
3121 goto err_req_irq;
3122 }
3123 }
3124
bc7f75fa
AK		 3125 /* From here on the code is the same as e1000e_up() */
3126 clear_bit(__E1000_DOWN, &adapter->state);
3127
3128 napi_enable(&adapter->napi);
3129
3130 e1000_irq_enable(adapter);
3131
d55b53ff
JK		 3132 netif_tx_start_all_queues(netdev);
3133
bc7f75fa
AK		 3134 /* fire a link status change interrupt to start the watchdog */
3135 ew32(ICS, E1000_ICS_LSC);
3136
3137 return 0;
3138
3139err_req_irq:
3140 e1000_release_hw_control(adapter);
3141 e1000_power_down_phy(adapter);
3142 e1000e_free_rx_resources(adapter);
3143err_setup_rx:
3144 e1000e_free_tx_resources(adapter);
3145err_setup_tx:
3146 e1000e_reset(adapter);
3147
3148 return err;
3149}
3150
3151/**
3152 * e1000_close - Disables a network interface
3153 * @netdev: network interface device structure
3154 *
3155 * Returns 0, this is not allowed to fail
3156 *
3157 * The close entry point is called when an interface is de-activated
3158 * by the OS. The hardware is still under the drivers control, but
3159 * needs to be disabled. A global MAC reset is issued to stop the
3160 * hardware, and all transmit and receive resources are freed.
3161 **/
3162static int e1000_close(struct net_device *netdev)
3163{
3164 struct e1000_adapter *adapter = netdev_priv(netdev);
3165
3166 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3167 e1000e_down(adapter);
3168 e1000_power_down_phy(adapter);
3169 e1000_free_irq(adapter);
3170
3171 e1000e_free_tx_resources(adapter);
3172 e1000e_free_rx_resources(adapter);
3173
ad68076e
BA		 3174 /*
3175 * kill manageability vlan ID if supported, but not if a vlan with
3176 * the same ID is registered on the host OS (let 8021q kill it)
3177 */
bc7f75fa
AK		 3178 if ((adapter->hw.mng_cookie.status &
3179 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3180 !(adapter->vlgrp &&
3181 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3182 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3183
ad68076e
BA		 3184 /*
3185 * If AMT is enabled, let the firmware know that the network
3186 * interface is now closed
3187 */
c43bc57e 3188 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3189 e1000_release_hw_control(adapter);
3190
3191 return 0;
3192}
3193/**
3194 * e1000_set_mac - Change the Ethernet Address of the NIC
3195 * @netdev: network interface device structure
3196 * @p: pointer to an address structure
3197 *
3198 * Returns 0 on success, negative on failure
3199 **/
3200static int e1000_set_mac(struct net_device *netdev, void *p)
3201{
3202 struct e1000_adapter *adapter = netdev_priv(netdev);
3203 struct sockaddr *addr = p;
3204
3205 if (!is_valid_ether_addr(addr->sa_data))
3206 return -EADDRNOTAVAIL;
3207
3208 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3209 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3210
3211 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3212
3213 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3214 /* activate the work around */
3215 e1000e_set_laa_state_82571(&adapter->hw, 1);
3216
ad68076e
BA		 3217 /*
3218 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3219 * between the time RAR[0] gets clobbered and the time it
3220 * gets fixed (in e1000_watchdog), the actual LAA is in one
3221 * of the RARs and no incoming packets directed to this port
3222 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3223 * RAR[14]
3224 */
bc7f75fa
AK		 3225 e1000e_rar_set(&adapter->hw,
3226 adapter->hw.mac.addr,
3227 adapter->hw.mac.rar_entry_count - 1);
3228 }
3229
3230 return 0;
3231}
3232
a8f88ff5
JB		 3233/**
3234 * e1000e_update_phy_task - work thread to update phy
3235 * @work: pointer to our work struct
3236 *
3237 * this worker thread exists because we must acquire a
3238 * semaphore to read the phy, which we could msleep while
3239 * waiting for it, and we can't msleep in a timer.
3240 **/
3241static void e1000e_update_phy_task(struct work_struct *work)
3242{
3243 struct e1000_adapter *adapter = container_of(work,
3244 struct e1000_adapter, update_phy_task);
3245 e1000_get_phy_info(&adapter->hw);
3246}
3247
ad68076e
BA		 3248/*
3249 * Need to wait a few seconds after link up to get diagnostic information from
3250 * the phy
3251 */
bc7f75fa
AK		 3252static void e1000_update_phy_info(unsigned long data)
3253{
3254 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3255 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3256}
3257
3258/**
3259 * e1000e_update_stats - Update the board statistics counters
3260 * @adapter: board private structure
3261 **/
3262void e1000e_update_stats(struct e1000_adapter *adapter)
3263{
3264 struct e1000_hw *hw = &adapter->hw;
3265 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3266
3267 /*
3268 * Prevent stats update while adapter is being reset, or if the pci
3269 * connection is down.
3270 */
3271 if (adapter->link_speed == 0)
3272 return;
3273 if (pci_channel_offline(pdev))
3274 return;
3275
bc7f75fa
AK		 3276 adapter->stats.crcerrs += er32(CRCERRS);
3277 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3278 adapter->stats.gorc += er32(GORCL);
3279 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3280 adapter->stats.bprc += er32(BPRC);
3281 adapter->stats.mprc += er32(MPRC);
3282 adapter->stats.roc += er32(ROC);
3283
bc7f75fa
AK		 3284 adapter->stats.mpc += er32(MPC);
3285 adapter->stats.scc += er32(SCC);
3286 adapter->stats.ecol += er32(ECOL);
3287 adapter->stats.mcc += er32(MCC);
3288 adapter->stats.latecol += er32(LATECOL);
3289 adapter->stats.dc += er32(DC);
bc7f75fa
AK		 3290 adapter->stats.xonrxc += er32(XONRXC);
3291 adapter->stats.xontxc += er32(XONTXC);
3292 adapter->stats.xoffrxc += er32(XOFFRXC);
3293 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3294 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3295 adapter->stats.gotc += er32(GOTCL);
3296 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3297 adapter->stats.rnbc += er32(RNBC);
3298 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3299
3300 adapter->stats.mptc += er32(MPTC);
3301 adapter->stats.bptc += er32(BPTC);
3302
3303 /* used for adaptive IFS */
3304
3305 hw->mac.tx_packet_delta = er32(TPT);
3306 adapter->stats.tpt += hw->mac.tx_packet_delta;
3307 hw->mac.collision_delta = er32(COLC);
3308 adapter->stats.colc += hw->mac.collision_delta;
3309
3310 adapter->stats.algnerrc += er32(ALGNERRC);
3311 adapter->stats.rxerrc += er32(RXERRC);
4662e82b
BA		 3312 if (hw->mac.type != e1000_82574)
3313 adapter->stats.tncrs += er32(TNCRS);
bc7f75fa
AK		 3314 adapter->stats.cexterr += er32(CEXTERR);
3315 adapter->stats.tsctc += er32(TSCTC);
3316 adapter->stats.tsctfc += er32(TSCTFC);
3317
bc7f75fa 3318 /* Fill out the OS statistics structure */
bc7f75fa
AK		 3319 adapter->net_stats.multicast = adapter->stats.mprc;
3320 adapter->net_stats.collisions = adapter->stats.colc;
3321
3322 /* Rx Errors */
3323
ad68076e
BA		 3324 /*
3325 * RLEC on some newer hardware can be incorrect so build
3326 * our own version based on RUC and ROC
3327 */
bc7f75fa
AK		 3328 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3329 adapter->stats.crcerrs + adapter->stats.algnerrc +
3330 adapter->stats.ruc + adapter->stats.roc +
3331 adapter->stats.cexterr;
3332 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3333 adapter->stats.roc;
3334 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3335 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3336 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3337
3338 /* Tx Errors */
3339 adapter->net_stats.tx_errors = adapter->stats.ecol +
3340 adapter->stats.latecol;
3341 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3342 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3343 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3344
3345 /* Tx Dropped needs to be maintained elsewhere */
3346
bc7f75fa
AK		 3347 /* Management Stats */
3348 adapter->stats.mgptc += er32(MGTPTC);
3349 adapter->stats.mgprc += er32(MGTPRC);
3350 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3351}
3352
7c25769f
BA		 3353/**
3354 * e1000_phy_read_status - Update the PHY register status snapshot
3355 * @adapter: board private structure
3356 **/
3357static void e1000_phy_read_status(struct e1000_adapter *adapter)
3358{
3359 struct e1000_hw *hw = &adapter->hw;
3360 struct e1000_phy_regs *phy = &adapter->phy_regs;
3361 int ret_val;
7c25769f
BA		 3362
3363 if ((er32(STATUS) & E1000_STATUS_LU) &&
3364 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3365 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3366 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3367 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3368 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3369 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3370 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3371 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3372 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3373 if (ret_val)
44defeb3 3374 e_warn("Error reading PHY register\n");
7c25769f
BA		 3375 } else {
3376 /*
3377 * Do not read PHY registers if link is not up
3378 * Set values to typical power-on defaults
3379 */
3380 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3381 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3382 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3383 BMSR_ERCAP);
3384 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3385 ADVERTISE_ALL | ADVERTISE_CSMA);
3386 phy->lpa = 0;
3387 phy->expansion = EXPANSION_ENABLENPAGE;
3388 phy->ctrl1000 = ADVERTISE_1000FULL;
3389 phy->stat1000 = 0;
3390 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3391 }
7c25769f
BA		 3392}
3393
bc7f75fa
AK		 3394static void e1000_print_link_info(struct e1000_adapter *adapter)
3395{
bc7f75fa
AK		 3396 struct e1000_hw *hw = &adapter->hw;
3397 u32 ctrl = er32(CTRL);
3398
8f12fe86
BA		 3399 /* Link status message must follow this format for user tools */
3400 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3401 "Flow Control: %s\n",
3402 adapter->netdev->name,
44defeb3
JK		 3403 adapter->link_speed,
3404 (adapter->link_duplex == FULL_DUPLEX) ?
3405 "Full Duplex" : "Half Duplex",
3406 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3407 "RX/TX" :
3408 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3409 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3410}
3411
a20e4cf9 3412bool e1000_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3413{
3414 struct e1000_hw *hw = &adapter->hw;
3415 bool link_active = 0;
3416 s32 ret_val = 0;
3417
3418 /*
3419 * get_link_status is set on LSC (link status) interrupt or
3420 * Rx sequence error interrupt. get_link_status will stay
3421 * false until the check_for_link establishes link
3422 * for copper adapters ONLY
3423 */
3424 switch (hw->phy.media_type) {
3425 case e1000_media_type_copper:
3426 if (hw->mac.get_link_status) {
3427 ret_val = hw->mac.ops.check_for_link(hw);
3428 link_active = !hw->mac.get_link_status;
3429 } else {
3430 link_active = 1;
3431 }
3432 break;
3433 case e1000_media_type_fiber:
3434 ret_val = hw->mac.ops.check_for_link(hw);
3435 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3436 break;
3437 case e1000_media_type_internal_serdes:
3438 ret_val = hw->mac.ops.check_for_link(hw);
3439 link_active = adapter->hw.mac.serdes_has_link;
3440 break;
3441 default:
3442 case e1000_media_type_unknown:
3443 break;
3444 }
3445
3446 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3447 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3448 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3449 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3450 }
3451
3452 return link_active;
3453}
3454
3455static void e1000e_enable_receives(struct e1000_adapter *adapter)
3456{
3457 /* make sure the receive unit is started */
3458 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3459 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3460 struct e1000_hw *hw = &adapter->hw;
3461 u32 rctl = er32(RCTL);
3462 ew32(RCTL, rctl | E1000_RCTL_EN);
3463 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3464 }
3465}
3466
bc7f75fa
AK		 3467/**
3468 * e1000_watchdog - Timer Call-back
3469 * @data: pointer to adapter cast into an unsigned long
3470 **/
3471static void e1000_watchdog(unsigned long data)
3472{
3473 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3474
3475 /* Do the rest outside of interrupt context */
3476 schedule_work(&adapter->watchdog_task);
3477
3478 /* TODO: make this use queue_delayed_work() */
3479}
3480
3481static void e1000_watchdog_task(struct work_struct *work)
3482{
3483 struct e1000_adapter *adapter = container_of(work,
3484 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3485 struct net_device *netdev = adapter->netdev;
3486 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3487 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3488 struct e1000_ring *tx_ring = adapter->tx_ring;
3489 struct e1000_hw *hw = &adapter->hw;
3490 u32 link, tctl;
bc7f75fa
AK		 3491 int tx_pending = 0;
3492
318a94d6
JK		 3493 link = e1000_has_link(adapter);
3494 if ((netif_carrier_ok(netdev)) && link) {
3495 e1000e_enable_receives(adapter);
bc7f75fa 3496 goto link_up;
bc7f75fa
AK		 3497 }
3498
3499 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3500 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3501 e1000_update_mng_vlan(adapter);
3502
bc7f75fa
AK		 3503 if (link) {
3504 if (!netif_carrier_ok(netdev)) {
3505 bool txb2b = 1;
318a94d6 3506 /* update snapshot of PHY registers on LSC */
7c25769f 3507 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3508 mac->ops.get_link_up_info(&adapter->hw,
3509 &adapter->link_speed,
3510 &adapter->link_duplex);
3511 e1000_print_link_info(adapter);
f4187b56
BA		 3512 /*
3513 * On supported PHYs, check for duplex mismatch only
3514 * if link has autonegotiated at 10/100 half
3515 */
3516 if ((hw->phy.type == e1000_phy_igp_3 ||
3517 hw->phy.type == e1000_phy_bm) &&
3518 (hw->mac.autoneg == true) &&
3519 (adapter->link_speed == SPEED_10 ||
3520 adapter->link_speed == SPEED_100) &&
3521 (adapter->link_duplex == HALF_DUPLEX)) {
3522 u16 autoneg_exp;
3523
3524 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3525
3526 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3527 e_info("Autonegotiated half duplex but"
3528 " link partner cannot autoneg. "
3529 " Try forcing full duplex if "
3530 "link gets many collisions.\n");
3531 }
3532
ad68076e
BA		 3533 /*
3534 * tweak tx_queue_len according to speed/duplex
3535 * and adjust the timeout factor
3536 */
bc7f75fa
AK		 3537 netdev->tx_queue_len = adapter->tx_queue_len;
3538 adapter->tx_timeout_factor = 1;
3539 switch (adapter->link_speed) {
3540 case SPEED_10:
3541 txb2b = 0;
3542 netdev->tx_queue_len = 10;
10f1b492 3543 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3544 break;
3545 case SPEED_100:
3546 txb2b = 0;
3547 netdev->tx_queue_len = 100;
3548 /* maybe add some timeout factor ? */
3549 break;
3550 }
3551
ad68076e
BA		 3552 /*
3553 * workaround: re-program speed mode bit after
3554 * link-up event
3555 */
bc7f75fa
AK		 3556 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3557 !txb2b) {
3558 u32 tarc0;
e9ec2c0f 3559 tarc0 = er32(TARC(0));
bc7f75fa 3560 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3561 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3562 }
3563
ad68076e
BA		 3564 /*
3565 * disable TSO for pcie and 10/100 speeds, to avoid
3566 * some hardware issues
3567 */
bc7f75fa
AK		 3568 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3569 switch (adapter->link_speed) {
3570 case SPEED_10:
3571 case SPEED_100:
44defeb3 3572 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3573 netdev->features &= ~NETIF_F_TSO;
3574 netdev->features &= ~NETIF_F_TSO6;
3575 break;
3576 case SPEED_1000:
3577 netdev->features |= NETIF_F_TSO;
3578 netdev->features |= NETIF_F_TSO6;
3579 break;
3580 default:
3581 /* oops */
3582 break;
3583 }
3584 }
3585
ad68076e
BA		 3586 /*
3587 * enable transmits in the hardware, need to do this
3588 * after setting TARC(0)
3589 */
bc7f75fa
AK		 3590 tctl = er32(TCTL);
3591 tctl |= E1000_TCTL_EN;
3592 ew32(TCTL, tctl);
3593
75eb0fad
BA		 3594 /*
3595 * Perform any post-link-up configuration before
3596 * reporting link up.
3597 */
3598 if (phy->ops.cfg_on_link_up)
3599 phy->ops.cfg_on_link_up(hw);
3600
bc7f75fa 3601 netif_carrier_on(netdev);
d55b53ff 3602 netif_tx_wake_all_queues(netdev);
bc7f75fa
AK		 3603
3604 if (!test_bit(__E1000_DOWN, &adapter->state))
3605 mod_timer(&adapter->phy_info_timer,
3606 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3607 }
3608 } else {
3609 if (netif_carrier_ok(netdev)) {
3610 adapter->link_speed = 0;
3611 adapter->link_duplex = 0;
8f12fe86
BA		 3612 /* Link status message must follow this format */
3613 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3614 adapter->netdev->name);
bc7f75fa 3615 netif_carrier_off(netdev);
d55b53ff 3616 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK		 3617 if (!test_bit(__E1000_DOWN, &adapter->state))
3618 mod_timer(&adapter->phy_info_timer,
3619 round_jiffies(jiffies + 2 * HZ));
3620
3621 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3622 schedule_work(&adapter->reset_task);
3623 }
3624 }
3625
3626link_up:
3627 e1000e_update_stats(adapter);
3628
3629 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3630 adapter->tpt_old = adapter->stats.tpt;
3631 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3632 adapter->colc_old = adapter->stats.colc;
3633
7c25769f
BA		 3634 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3635 adapter->gorc_old = adapter->stats.gorc;
3636 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3637 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3638
3639 e1000e_update_adaptive(&adapter->hw);
3640
3641 if (!netif_carrier_ok(netdev)) {
3642 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3643 tx_ring->count);
3644 if (tx_pending) {
ad68076e
BA		 3645 /*
3646 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3647 * but we've got queued Tx work that's never going
3648 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3649 * (Do the reset outside of interrupt context).
3650 */
bc7f75fa
AK		 3651 adapter->tx_timeout_count++;
3652 schedule_work(&adapter->reset_task);
3653 }
3654 }
3655
ad68076e 3656 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 3657 if (adapter->msix_entries)
3658 ew32(ICS, adapter->rx_ring->ims_val);
3659 else
3660 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 3661
3662 /* Force detection of hung controller every watchdog period */
3663 adapter->detect_tx_hung = 1;
3664
ad68076e
BA		 3665 /*
3666 * With 82571 controllers, LAA may be overwritten due to controller
3667 * reset from the other port. Set the appropriate LAA in RAR[0]
3668 */
bc7f75fa
AK		 3669 if (e1000e_get_laa_state_82571(hw))
3670 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3671
3672 /* Reset the timer */
3673 if (!test_bit(__E1000_DOWN, &adapter->state))
3674 mod_timer(&adapter->watchdog_timer,
3675 round_jiffies(jiffies + 2 * HZ));
3676}
3677
3678#define E1000_TX_FLAGS_CSUM 0x00000001
3679#define E1000_TX_FLAGS_VLAN 0x00000002
3680#define E1000_TX_FLAGS_TSO 0x00000004
3681#define E1000_TX_FLAGS_IPV4 0x00000008
3682#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3683#define E1000_TX_FLAGS_VLAN_SHIFT 16
3684
3685static int e1000_tso(struct e1000_adapter *adapter,
3686 struct sk_buff *skb)
3687{
3688 struct e1000_ring *tx_ring = adapter->tx_ring;
3689 struct e1000_context_desc *context_desc;
3690 struct e1000_buffer *buffer_info;
3691 unsigned int i;
3692 u32 cmd_length = 0;
3693 u16 ipcse = 0, tucse, mss;
3694 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3695 int err;
3696
3697 if (skb_is_gso(skb)) {
3698 if (skb_header_cloned(skb)) {
3699 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3700 if (err)
3701 return err;
3702 }
3703
3704 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3705 mss = skb_shinfo(skb)->gso_size;
3706 if (skb->protocol == htons(ETH_P_IP)) {
3707 struct iphdr *iph = ip_hdr(skb);
3708 iph->tot_len = 0;
3709 iph->check = 0;
3710 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3711 iph->daddr, 0,
3712 IPPROTO_TCP,
3713 0);
3714 cmd_length = E1000_TXD_CMD_IP;
3715 ipcse = skb_transport_offset(skb) - 1;
3716 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3717 ipv6_hdr(skb)->payload_len = 0;
3718 tcp_hdr(skb)->check =
3719 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3720 &ipv6_hdr(skb)->daddr,
3721 0, IPPROTO_TCP, 0);
3722 ipcse = 0;
3723 }
3724 ipcss = skb_network_offset(skb);
3725 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3726 tucss = skb_transport_offset(skb);
3727 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3728 tucse = 0;
3729
3730 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3731 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3732
3733 i = tx_ring->next_to_use;
3734 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3735 buffer_info = &tx_ring->buffer_info[i];
3736
3737 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3738 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3739 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3740 context_desc->upper_setup.tcp_fields.tucss = tucss;
3741 context_desc->upper_setup.tcp_fields.tucso = tucso;
3742 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3743 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3744 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3745 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3746
3747 buffer_info->time_stamp = jiffies;
3748 buffer_info->next_to_watch = i;
3749
3750 i++;
3751 if (i == tx_ring->count)
3752 i = 0;
3753 tx_ring->next_to_use = i;
3754
3755 return 1;
3756 }
3757
3758 return 0;
3759}
3760
3761static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3762{
3763 struct e1000_ring *tx_ring = adapter->tx_ring;
3764 struct e1000_context_desc *context_desc;
3765 struct e1000_buffer *buffer_info;
3766 unsigned int i;
3767 u8 css;
af807c82 3768 u32 cmd_len = E1000_TXD_CMD_DEXT;
bc7f75fa 3769
af807c82
DG		 3770 if (skb->ip_summed != CHECKSUM_PARTIAL)
3771 return 0;
bc7f75fa 3772
af807c82 3773 switch (skb->protocol) {
09640e63 3774 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 3775 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3776 cmd_len |= E1000_TXD_CMD_TCP;
3777 break;
09640e63 3778 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 3779 /* XXX not handling all IPV6 headers */
3780 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3781 cmd_len |= E1000_TXD_CMD_TCP;
3782 break;
3783 default:
3784 if (unlikely(net_ratelimit()))
3785 e_warn("checksum_partial proto=%x!\n", skb->protocol);
3786 break;
bc7f75fa
AK		 3787 }
3788
af807c82
DG		 3789 css = skb_transport_offset(skb);
3790
3791 i = tx_ring->next_to_use;
3792 buffer_info = &tx_ring->buffer_info[i];
3793 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3794
3795 context_desc->lower_setup.ip_config = 0;
3796 context_desc->upper_setup.tcp_fields.tucss = css;
3797 context_desc->upper_setup.tcp_fields.tucso =
3798 css + skb->csum_offset;
3799 context_desc->upper_setup.tcp_fields.tucse = 0;
3800 context_desc->tcp_seg_setup.data = 0;
3801 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3802
3803 buffer_info->time_stamp = jiffies;
3804 buffer_info->next_to_watch = i;
3805
3806 i++;
3807 if (i == tx_ring->count)
3808 i = 0;
3809 tx_ring->next_to_use = i;
3810
3811 return 1;
bc7f75fa
AK		 3812}
3813
3814#define E1000_MAX_PER_TXD 8192
3815#define E1000_MAX_TXD_PWR 12
3816
3817static int e1000_tx_map(struct e1000_adapter *adapter,
3818 struct sk_buff *skb, unsigned int first,
3819 unsigned int max_per_txd, unsigned int nr_frags,
3820 unsigned int mss)
3821{
3822 struct e1000_ring *tx_ring = adapter->tx_ring;
3823 struct e1000_buffer *buffer_info;
3824 unsigned int len = skb->len - skb->data_len;
3825 unsigned int offset = 0, size, count = 0, i;
3826 unsigned int f;
3827
3828 i = tx_ring->next_to_use;
3829
3830 while (len) {
3831 buffer_info = &tx_ring->buffer_info[i];
3832 size = min(len, max_per_txd);
3833
3834 /* Workaround for premature desc write-backs
3835 * in TSO mode. Append 4-byte sentinel desc */
3836 if (mss && !nr_frags && size == len && size > 8)
3837 size -= 4;
3838
3839 buffer_info->length = size;
3840 /* set time_stamp *before* dma to help avoid a possible race */
3841 buffer_info->time_stamp = jiffies;
3842 buffer_info->dma =
3843 pci_map_single(adapter->pdev,
3844 skb->data + offset,
3845 size,
3846 PCI_DMA_TODEVICE);
8d8bb39b 3847 if (pci_dma_mapping_error(adapter->pdev, buffer_info->dma)) {
bc7f75fa
AK		 3848 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
3849 adapter->tx_dma_failed++;
3850 return -1;
3851 }
3852 buffer_info->next_to_watch = i;
3853
3854 len -= size;
3855 offset += size;
3856 count++;
3857 i++;
3858 if (i == tx_ring->count)
3859 i = 0;
3860 }
3861
3862 for (f = 0; f < nr_frags; f++) {
3863 struct skb_frag_struct *frag;
3864
3865 frag = &skb_shinfo(skb)->frags[f];
3866 len = frag->size;
3867 offset = frag->page_offset;
3868
3869 while (len) {
3870 buffer_info = &tx_ring->buffer_info[i];
3871 size = min(len, max_per_txd);
3872 /* Workaround for premature desc write-backs
3873 * in TSO mode. Append 4-byte sentinel desc */
3874 if (mss && f == (nr_frags-1) && size == len && size > 8)
3875 size -= 4;
3876
3877 buffer_info->length = size;
3878 buffer_info->time_stamp = jiffies;
3879 buffer_info->dma =
3880 pci_map_page(adapter->pdev,
3881 frag->page,
3882 offset,
3883 size,
3884 PCI_DMA_TODEVICE);
8d8bb39b
FT		 3885 if (pci_dma_mapping_error(adapter->pdev,
3886 buffer_info->dma)) {
bc7f75fa
AK		 3887 dev_err(&adapter->pdev->dev,
3888 "TX DMA page map failed\n");
3889 adapter->tx_dma_failed++;
3890 return -1;
3891 }
3892
3893 buffer_info->next_to_watch = i;
3894
3895 len -= size;
3896 offset += size;
3897 count++;
3898
3899 i++;
3900 if (i == tx_ring->count)
3901 i = 0;
3902 }
3903 }
3904
3905 if (i == 0)
3906 i = tx_ring->count - 1;
3907 else
3908 i--;
3909
3910 tx_ring->buffer_info[i].skb = skb;
3911 tx_ring->buffer_info[first].next_to_watch = i;
3912
3913 return count;
3914}
3915
3916static void e1000_tx_queue(struct e1000_adapter *adapter,
3917 int tx_flags, int count)
3918{
3919 struct e1000_ring *tx_ring = adapter->tx_ring;
3920 struct e1000_tx_desc *tx_desc = NULL;
3921 struct e1000_buffer *buffer_info;
3922 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3923 unsigned int i;
3924
3925 if (tx_flags & E1000_TX_FLAGS_TSO) {
3926 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3927 E1000_TXD_CMD_TSE;
3928 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3929
3930 if (tx_flags & E1000_TX_FLAGS_IPV4)
3931 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3932 }
3933
3934 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3935 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3936 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3937 }
3938
3939 if (tx_flags & E1000_TX_FLAGS_VLAN) {
3940 txd_lower |= E1000_TXD_CMD_VLE;
3941 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3942 }
3943
3944 i = tx_ring->next_to_use;
3945
3946 while (count--) {
3947 buffer_info = &tx_ring->buffer_info[i];
3948 tx_desc = E1000_TX_DESC(*tx_ring, i);
3949 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3950 tx_desc->lower.data =
3951 cpu_to_le32(txd_lower | buffer_info->length);
3952 tx_desc->upper.data = cpu_to_le32(txd_upper);
3953
3954 i++;
3955 if (i == tx_ring->count)
3956 i = 0;
3957 }
3958
3959 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3960
ad68076e
BA		 3961 /*
3962 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 3963 * know there are new descriptors to fetch. (Only
3964 * applicable for weak-ordered memory model archs,
ad68076e
BA		 3965 * such as IA-64).
3966 */
bc7f75fa
AK		 3967 wmb();
3968
3969 tx_ring->next_to_use = i;
3970 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 3971 /*
3972 * we need this if more than one processor can write to our tail
3973 * at a time, it synchronizes IO on IA64/Altix systems
3974 */
bc7f75fa
AK		 3975 mmiowb();
3976}
3977
3978#define MINIMUM_DHCP_PACKET_SIZE 282
3979static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3980 struct sk_buff *skb)
3981{
3982 struct e1000_hw *hw = &adapter->hw;
3983 u16 length, offset;
3984
3985 if (vlan_tx_tag_present(skb)) {
3986 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id)
3987 && (adapter->hw.mng_cookie.status &
3988 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
3989 return 0;
3990 }
3991
3992 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
3993 return 0;
3994
3995 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
3996 return 0;
3997
3998 {
3999 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4000 struct udphdr *udp;
4001
4002 if (ip->protocol != IPPROTO_UDP)
4003 return 0;
4004
4005 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4006 if (ntohs(udp->dest) != 67)
4007 return 0;
4008
4009 offset = (u8 *)udp + 8 - skb->data;
4010 length = skb->len - offset;
4011 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4012 }
4013
4014 return 0;
4015}
4016
4017static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4018{
4019 struct e1000_adapter *adapter = netdev_priv(netdev);
4020
4021 netif_stop_queue(netdev);
ad68076e
BA		 4022 /*
4023 * Herbert's original patch had:
bc7f75fa 4024 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4025 * but since that doesn't exist yet, just open code it.
4026 */
bc7f75fa
AK		 4027 smp_mb();
4028
ad68076e
BA		 4029 /*
4030 * We need to check again in a case another CPU has just
4031 * made room available.
4032 */
bc7f75fa
AK		 4033 if (e1000_desc_unused(adapter->tx_ring) < size)
4034 return -EBUSY;
4035
4036 /* A reprieve! */
4037 netif_start_queue(netdev);
4038 ++adapter->restart_queue;
4039 return 0;
4040}
4041
4042static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4043{
4044 struct e1000_adapter *adapter = netdev_priv(netdev);
4045
4046 if (e1000_desc_unused(adapter->tx_ring) >= size)
4047 return 0;
4048 return __e1000_maybe_stop_tx(netdev, size);
4049}
4050
4051#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
4052static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
4053{
4054 struct e1000_adapter *adapter = netdev_priv(netdev);
4055 struct e1000_ring *tx_ring = adapter->tx_ring;
4056 unsigned int first;
4057 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4058 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4059 unsigned int tx_flags = 0;
4e6c709c 4060 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK		 4061 unsigned int nr_frags;
4062 unsigned int mss;
bc7f75fa
AK		 4063 int count = 0;
4064 int tso;
4065 unsigned int f;
bc7f75fa
AK		 4066
4067 if (test_bit(__E1000_DOWN, &adapter->state)) {
4068 dev_kfree_skb_any(skb);
4069 return NETDEV_TX_OK;
4070 }
4071
4072 if (skb->len <= 0) {
4073 dev_kfree_skb_any(skb);
4074 return NETDEV_TX_OK;
4075 }
4076
4077 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4078 /*
4079 * The controller does a simple calculation to
bc7f75fa
AK		 4080 * make sure there is enough room in the FIFO before
4081 * initiating the DMA for each buffer. The calc is:
4082 * 4 = ceil(buffer len/mss). To make sure we don't
4083 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4084 * drops.
4085 */
bc7f75fa
AK		 4086 if (mss) {
4087 u8 hdr_len;
4088 max_per_txd = min(mss << 2, max_per_txd);
4089 max_txd_pwr = fls(max_per_txd) - 1;
4090
ad68076e
BA		 4091 /*
4092 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4093 * points to just header, pull a few bytes of payload from
4094 * frags into skb->data
4095 */
bc7f75fa 4096 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4097 /*
4098 * we do this workaround for ES2LAN, but it is un-necessary,
4099 * avoiding it could save a lot of cycles
4100 */
4e6c709c 4101 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4102 unsigned int pull_size;
4103
4104 pull_size = min((unsigned int)4, skb->data_len);
4105 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4106 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4107 dev_kfree_skb_any(skb);
4108 return NETDEV_TX_OK;
4109 }
4110 len = skb->len - skb->data_len;
4111 }
4112 }
4113
4114 /* reserve a descriptor for the offload context */
4115 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4116 count++;
4117 count++;
4118
4119 count += TXD_USE_COUNT(len, max_txd_pwr);
4120
4121 nr_frags = skb_shinfo(skb)->nr_frags;
4122 for (f = 0; f < nr_frags; f++)
4123 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4124 max_txd_pwr);
4125
4126 if (adapter->hw.mac.tx_pkt_filtering)
4127 e1000_transfer_dhcp_info(adapter, skb);
4128
ad68076e
BA		 4129 /*
4130 * need: count + 2 desc gap to keep tail from touching
4131 * head, otherwise try next time
4132 */
92af3e95 4133 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4134 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4135
4136 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4137 tx_flags |= E1000_TX_FLAGS_VLAN;
4138 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4139 }
4140
4141 first = tx_ring->next_to_use;
4142
4143 tso = e1000_tso(adapter, skb);
4144 if (tso < 0) {
4145 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4146 return NETDEV_TX_OK;
4147 }
4148
4149 if (tso)
4150 tx_flags |= E1000_TX_FLAGS_TSO;
4151 else if (e1000_tx_csum(adapter, skb))
4152 tx_flags |= E1000_TX_FLAGS_CSUM;
4153
ad68076e
BA		 4154 /*
4155 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4156 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4157 * no longer assume, we must.
4158 */
bc7f75fa
AK		 4159 if (skb->protocol == htons(ETH_P_IP))
4160 tx_flags |= E1000_TX_FLAGS_IPV4;
4161
4162 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
4163 if (count < 0) {
4164 /* handle pci_map_single() error in e1000_tx_map */
4165 dev_kfree_skb_any(skb);
7b5dfe1a 4166 return NETDEV_TX_OK;
bc7f75fa
AK		 4167 }
4168
4169 e1000_tx_queue(adapter, tx_flags, count);
4170
4171 netdev->trans_start = jiffies;
4172
4173 /* Make sure there is space in the ring for the next send. */
4174 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4175
bc7f75fa
AK		 4176 return NETDEV_TX_OK;
4177}
4178
4179/**
4180 * e1000_tx_timeout - Respond to a Tx Hang
4181 * @netdev: network interface device structure
4182 **/
4183static void e1000_tx_timeout(struct net_device *netdev)
4184{
4185 struct e1000_adapter *adapter = netdev_priv(netdev);
4186
4187 /* Do the reset outside of interrupt context */
4188 adapter->tx_timeout_count++;
4189 schedule_work(&adapter->reset_task);
4190}
4191
4192static void e1000_reset_task(struct work_struct *work)
4193{
4194 struct e1000_adapter *adapter;
4195 adapter = container_of(work, struct e1000_adapter, reset_task);
4196
4197 e1000e_reinit_locked(adapter);
4198}
4199
4200/**
4201 * e1000_get_stats - Get System Network Statistics
4202 * @netdev: network interface device structure
4203 *
4204 * Returns the address of the device statistics structure.
4205 * The statistics are actually updated from the timer callback.
4206 **/
4207static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4208{
4209 struct e1000_adapter *adapter = netdev_priv(netdev);
4210
4211 /* only return the current stats */
4212 return &adapter->net_stats;
4213}
4214
4215/**
4216 * e1000_change_mtu - Change the Maximum Transfer Unit
4217 * @netdev: network interface device structure
4218 * @new_mtu: new value for maximum frame size
4219 *
4220 * Returns 0 on success, negative on failure
4221 **/
4222static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4223{
4224 struct e1000_adapter *adapter = netdev_priv(netdev);
4225 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4226
d53f706d 4227 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
bc7f75fa 4228 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
44defeb3 4229 e_err("Invalid MTU setting\n");
bc7f75fa
AK		 4230 return -EINVAL;
4231 }
4232
4233 /* Jumbo frame size limits */
4234 if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) {
4235 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
44defeb3 4236 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4237 return -EINVAL;
4238 }
4239 if (adapter->hw.phy.type == e1000_phy_ife) {
44defeb3 4240 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4241 return -EINVAL;
4242 }
4243 }
4244
4245#define MAX_STD_JUMBO_FRAME_SIZE 9234
4246 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
44defeb3 4247 e_err("MTU > 9216 not supported.\n");
bc7f75fa
AK		 4248 return -EINVAL;
4249 }
4250
4251 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4252 msleep(1);
4253 /* e1000e_down has a dependency on max_frame_size */
318a94d6 4254 adapter->max_frame_size = max_frame;
bc7f75fa
AK		 4255 if (netif_running(netdev))
4256 e1000e_down(adapter);
4257
ad68076e
BA		 4258 /*
4259 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4260 * means we reserve 2 more, this pushes us to allocate from the next
4261 * larger slab size.
ad68076e 4262 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4263 * However with the new *_jumbo_rx* routines, jumbo receives will use
4264 * fragmented skbs
ad68076e 4265 */
bc7f75fa
AK		 4266
4267 if (max_frame <= 256)
4268 adapter->rx_buffer_len = 256;
4269 else if (max_frame <= 512)
4270 adapter->rx_buffer_len = 512;
4271 else if (max_frame <= 1024)
4272 adapter->rx_buffer_len = 1024;
4273 else if (max_frame <= 2048)
4274 adapter->rx_buffer_len = 2048;
4275 else
4276 adapter->rx_buffer_len = 4096;
4277
4278 /* adjust allocation if LPE protects us, and we aren't using SBP */
4279 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4280 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4281 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4282 + ETH_FCS_LEN;
bc7f75fa 4283
44defeb3 4284 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
bc7f75fa
AK		 4285 netdev->mtu = new_mtu;
4286
4287 if (netif_running(netdev))
4288 e1000e_up(adapter);
4289 else
4290 e1000e_reset(adapter);
4291
4292 clear_bit(__E1000_RESETTING, &adapter->state);
4293
4294 return 0;
4295}
4296
4297static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4298 int cmd)
4299{
4300 struct e1000_adapter *adapter = netdev_priv(netdev);
4301 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4302
318a94d6 4303 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4304 return -EOPNOTSUPP;
4305
4306 switch (cmd) {
4307 case SIOCGMIIPHY:
4308 data->phy_id = adapter->hw.phy.addr;
4309 break;
4310 case SIOCGMIIREG:
4311 if (!capable(CAP_NET_ADMIN))
4312 return -EPERM;
7c25769f
BA		 4313 switch (data->reg_num & 0x1F) {
4314 case MII_BMCR:
4315 data->val_out = adapter->phy_regs.bmcr;
4316 break;
4317 case MII_BMSR:
4318 data->val_out = adapter->phy_regs.bmsr;
4319 break;
4320 case MII_PHYSID1:
4321 data->val_out = (adapter->hw.phy.id >> 16);
4322 break;
4323 case MII_PHYSID2:
4324 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4325 break;
4326 case MII_ADVERTISE:
4327 data->val_out = adapter->phy_regs.advertise;
4328 break;
4329 case MII_LPA:
4330 data->val_out = adapter->phy_regs.lpa;
4331 break;
4332 case MII_EXPANSION:
4333 data->val_out = adapter->phy_regs.expansion;
4334 break;
4335 case MII_CTRL1000:
4336 data->val_out = adapter->phy_regs.ctrl1000;
4337 break;
4338 case MII_STAT1000:
4339 data->val_out = adapter->phy_regs.stat1000;
4340 break;
4341 case MII_ESTATUS:
4342 data->val_out = adapter->phy_regs.estatus;
4343 break;
4344 default:
bc7f75fa
AK		 4345 return -EIO;
4346 }
bc7f75fa
AK		 4347 break;
4348 case SIOCSMIIREG:
4349 default:
4350 return -EOPNOTSUPP;
4351 }
4352 return 0;
4353}
4354
4355static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4356{
4357 switch (cmd) {
4358 case SIOCGMIIPHY:
4359 case SIOCGMIIREG:
4360 case SIOCSMIIREG:
4361 return e1000_mii_ioctl(netdev, ifr, cmd);
4362 default:
4363 return -EOPNOTSUPP;
4364 }
4365}
4366
4367static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4368{
4369 struct net_device *netdev = pci_get_drvdata(pdev);
4370 struct e1000_adapter *adapter = netdev_priv(netdev);
4371 struct e1000_hw *hw = &adapter->hw;
4372 u32 ctrl, ctrl_ext, rctl, status;
4373 u32 wufc = adapter->wol;
4374 int retval = 0;
4375
4376 netif_device_detach(netdev);
4377
4378 if (netif_running(netdev)) {
4379 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4380 e1000e_down(adapter);
4381 e1000_free_irq(adapter);
4382 }
4662e82b 4383 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4384
4385 retval = pci_save_state(pdev);
4386 if (retval)
4387 return retval;
4388
4389 status = er32(STATUS);
4390 if (status & E1000_STATUS_LU)
4391 wufc &= ~E1000_WUFC_LNKC;
4392
4393 if (wufc) {
4394 e1000_setup_rctl(adapter);
4395 e1000_set_multi(netdev);
4396
4397 /* turn on all-multi mode if wake on multicast is enabled */
4398 if (wufc & E1000_WUFC_MC) {
4399 rctl = er32(RCTL);
4400 rctl |= E1000_RCTL_MPE;
4401 ew32(RCTL, rctl);
4402 }
4403
4404 ctrl = er32(CTRL);
4405 /* advertise wake from D3Cold */
4406 #define E1000_CTRL_ADVD3WUC 0x00100000
4407 /* phy power management enable */
4408 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4409 ctrl |= E1000_CTRL_ADVD3WUC |
4410 E1000_CTRL_EN_PHY_PWR_MGMT;
4411 ew32(CTRL, ctrl);
4412
318a94d6
JK		 4413 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4414 adapter->hw.phy.media_type ==
4415 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4416 /* keep the laser running in D3 */
4417 ctrl_ext = er32(CTRL_EXT);
4418 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4419 ew32(CTRL_EXT, ctrl_ext);
4420 }
4421
97ac8cae
BA		 4422 if (adapter->flags & FLAG_IS_ICH)
4423 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4424
bc7f75fa
AK		 4425 /* Allow time for pending master requests to run */
4426 e1000e_disable_pcie_master(&adapter->hw);
4427
4428 ew32(WUC, E1000_WUC_PME_EN);
4429 ew32(WUFC, wufc);
4430 pci_enable_wake(pdev, PCI_D3hot, 1);
4431 pci_enable_wake(pdev, PCI_D3cold, 1);
4432 } else {
4433 ew32(WUC, 0);
4434 ew32(WUFC, 0);
4435 pci_enable_wake(pdev, PCI_D3hot, 0);
4436 pci_enable_wake(pdev, PCI_D3cold, 0);
4437 }
4438
bc7f75fa
AK		 4439 /* make sure adapter isn't asleep if manageability is enabled */
4440 if (adapter->flags & FLAG_MNG_PT_ENABLED) {
4441 pci_enable_wake(pdev, PCI_D3hot, 1);
4442 pci_enable_wake(pdev, PCI_D3cold, 1);
4443 }
4444
4445 if (adapter->hw.phy.type == e1000_phy_igp_3)
4446 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4447
ad68076e
BA		 4448 /*
4449 * Release control of h/w to f/w. If f/w is AMT enabled, this
4450 * would have already happened in close and is redundant.
4451 */
bc7f75fa
AK		 4452 e1000_release_hw_control(adapter);
4453
4454 pci_disable_device(pdev);
4455
005cbdfc
AD		 4456 /*
4457 * The pci-e switch on some quad port adapters will report a
4458 * correctable error when the MAC transitions from D0 to D3. To
4459 * prevent this we need to mask off the correctable errors on the
4460 * downstream port of the pci-e switch.
4461 */
4462 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4463 struct pci_dev *us_dev = pdev->bus->self;
4464 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4465 u16 devctl;
4466
4467 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4468 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4469 (devctl & ~PCI_EXP_DEVCTL_CERE));
4470
4471 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4472
4473 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4474 } else {
4475 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4476 }
bc7f75fa
AK		 4477
4478 return 0;
4479}
4480
1eae4eb2
AK		 4481static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4482{
4483 int pos;
1eae4eb2
AK		 4484 u16 val;
4485
4486 /*
4487 * 82573 workaround - disable L1 ASPM on mobile chipsets
4488 *
4489 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4490 * resulting in lost data or garbage information on the pci-e link
4491 * level. This could result in (false) bad EEPROM checksum errors,
4492 * long ping times (up to 2s) or even a system freeze/hang.
4493 *
4494 * Unfortunately this feature saves about 1W power consumption when
4495 * active.
4496 */
4497 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 4498 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4499 if (val & 0x2) {
4500 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4501 val &= ~0x2;
4502 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4503 }
4504}
4505
bc7f75fa
AK		 4506#ifdef CONFIG_PM
4507static int e1000_resume(struct pci_dev *pdev)
4508{
4509 struct net_device *netdev = pci_get_drvdata(pdev);
4510 struct e1000_adapter *adapter = netdev_priv(netdev);
4511 struct e1000_hw *hw = &adapter->hw;
4512 u32 err;
4513
4514 pci_set_power_state(pdev, PCI_D0);
4515 pci_restore_state(pdev);
1eae4eb2 4516 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4517
f0f422e5 4518 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4519 if (err) {
4520 dev_err(&pdev->dev,
4521 "Cannot enable PCI device from suspend\n");
4522 return err;
4523 }
4524
111b9dc5
JB		 4525 /* AER (Advanced Error Reporting) hooks */
4526 err = pci_enable_pcie_error_reporting(pdev);
4527 if (err) {
4528 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
4529 "0x%x\n", err);
4530 /* non-fatal, continue */
4531 }
4532
bc7f75fa
AK		 4533 pci_set_master(pdev);
4534
4535 pci_enable_wake(pdev, PCI_D3hot, 0);
4536 pci_enable_wake(pdev, PCI_D3cold, 0);
4537
4662e82b 4538 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 4539 if (netif_running(netdev)) {
4540 err = e1000_request_irq(adapter);
4541 if (err)
4542 return err;
4543 }
4544
4545 e1000e_power_up_phy(adapter);
4546 e1000e_reset(adapter);
4547 ew32(WUS, ~0);
4548
4549 e1000_init_manageability(adapter);
4550
4551 if (netif_running(netdev))
4552 e1000e_up(adapter);
4553
4554 netif_device_attach(netdev);
4555
ad68076e
BA		 4556 /*
4557 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4558 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4559 * under the control of the driver.
4560 */
c43bc57e 4561 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4562 e1000_get_hw_control(adapter);
4563
4564 return 0;
4565}
4566#endif
4567
4568static void e1000_shutdown(struct pci_dev *pdev)
4569{
4570 e1000_suspend(pdev, PMSG_SUSPEND);
4571}
4572
4573#ifdef CONFIG_NET_POLL_CONTROLLER
4574/*
4575 * Polling 'interrupt' - used by things like netconsole to send skbs
4576 * without having to re-enable interrupts. It's not called while
4577 * the interrupt routine is executing.
4578 */
4579static void e1000_netpoll(struct net_device *netdev)
4580{
4581 struct e1000_adapter *adapter = netdev_priv(netdev);
4582
4583 disable_irq(adapter->pdev->irq);
4584 e1000_intr(adapter->pdev->irq, netdev);
4585
bc7f75fa
AK		 4586 enable_irq(adapter->pdev->irq);
4587}
4588#endif
4589
4590/**
4591 * e1000_io_error_detected - called when PCI error is detected
4592 * @pdev: Pointer to PCI device
4593 * @state: The current pci connection state
4594 *
4595 * This function is called after a PCI bus error affecting
4596 * this device has been detected.
4597 */
4598static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4599 pci_channel_state_t state)
4600{
4601 struct net_device *netdev = pci_get_drvdata(pdev);
4602 struct e1000_adapter *adapter = netdev_priv(netdev);
4603
4604 netif_device_detach(netdev);
4605
4606 if (netif_running(netdev))
4607 e1000e_down(adapter);
4608 pci_disable_device(pdev);
4609
4610 /* Request a slot slot reset. */
4611 return PCI_ERS_RESULT_NEED_RESET;
4612}
4613
4614/**
4615 * e1000_io_slot_reset - called after the pci bus has been reset.
4616 * @pdev: Pointer to PCI device
4617 *
4618 * Restart the card from scratch, as if from a cold-boot. Implementation
4619 * resembles the first-half of the e1000_resume routine.
4620 */
4621static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4622{
4623 struct net_device *netdev = pci_get_drvdata(pdev);
4624 struct e1000_adapter *adapter = netdev_priv(netdev);
4625 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4626 int err;
111b9dc5 4627 pci_ers_result_t result;
bc7f75fa 4628
1eae4eb2 4629 e1000e_disable_l1aspm(pdev);
f0f422e5 4630 err = pci_enable_device_mem(pdev);
6e4f6f6b 4631 if (err) {
bc7f75fa
AK		 4632 dev_err(&pdev->dev,
4633 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 4634 result = PCI_ERS_RESULT_DISCONNECT;
4635 } else {
4636 pci_set_master(pdev);
4637 pci_restore_state(pdev);
bc7f75fa 4638
111b9dc5
JB		 4639 pci_enable_wake(pdev, PCI_D3hot, 0);
4640 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4641
111b9dc5
JB		 4642 e1000e_reset(adapter);
4643 ew32(WUS, ~0);
4644 result = PCI_ERS_RESULT_RECOVERED;
4645 }
bc7f75fa 4646
111b9dc5
JB		 4647 pci_cleanup_aer_uncorrect_error_status(pdev);
4648
4649 return result;
bc7f75fa
AK		 4650}
4651
4652/**
4653 * e1000_io_resume - called when traffic can start flowing again.
4654 * @pdev: Pointer to PCI device
4655 *
4656 * This callback is called when the error recovery driver tells us that
4657 * its OK to resume normal operation. Implementation resembles the
4658 * second-half of the e1000_resume routine.
4659 */
4660static void e1000_io_resume(struct pci_dev *pdev)
4661{
4662 struct net_device *netdev = pci_get_drvdata(pdev);
4663 struct e1000_adapter *adapter = netdev_priv(netdev);
4664
4665 e1000_init_manageability(adapter);
4666
4667 if (netif_running(netdev)) {
4668 if (e1000e_up(adapter)) {
4669 dev_err(&pdev->dev,
4670 "can't bring device back up after reset\n");
4671 return;
4672 }
4673 }
4674
4675 netif_device_attach(netdev);
4676
ad68076e
BA		 4677 /*
4678 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4679 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4680 * under the control of the driver.
4681 */
c43bc57e 4682 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4683 e1000_get_hw_control(adapter);
4684
4685}
4686
4687static void e1000_print_device_info(struct e1000_adapter *adapter)
4688{
4689 struct e1000_hw *hw = &adapter->hw;
4690 struct net_device *netdev = adapter->netdev;
69e3fd8c 4691 u32 pba_num;
bc7f75fa
AK		 4692
4693 /* print bus type/speed/width info */
7c510e4b 4694 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 4695 /* bus width */
4696 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4697 "Width x1"),
4698 /* MAC address */
7c510e4b 4699 netdev->dev_addr);
44defeb3
JK		 4700 e_info("Intel(R) PRO/%s Network Connection\n",
4701 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4702 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4703 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4704 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4705}
4706
10aa4c04
AK		 4707static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4708{
4709 struct e1000_hw *hw = &adapter->hw;
4710 int ret_val;
4711 u16 buf = 0;
4712
4713 if (hw->mac.type != e1000_82573)
4714 return;
4715
4716 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4717 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4718 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 4719 dev_warn(&adapter->pdev->dev,
4720 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK		 4721 }
4722
4723 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4724 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4725 /* ASPM enable */
6c2a9efa
FP		 4726 dev_warn(&adapter->pdev->dev,
4727 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK		 4728 }
4729}
4730
651c2466
SH		 4731static const struct net_device_ops e1000e_netdev_ops = {
4732 .ndo_open = e1000_open,
4733 .ndo_stop = e1000_close,
00829823 4734 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 4735 .ndo_get_stats = e1000_get_stats,
4736 .ndo_set_multicast_list = e1000_set_multi,
4737 .ndo_set_mac_address = e1000_set_mac,
4738 .ndo_change_mtu = e1000_change_mtu,
4739 .ndo_do_ioctl = e1000_ioctl,
4740 .ndo_tx_timeout = e1000_tx_timeout,
4741 .ndo_validate_addr = eth_validate_addr,
4742
4743 .ndo_vlan_rx_register = e1000_vlan_rx_register,
4744 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
4745 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
4746#ifdef CONFIG_NET_POLL_CONTROLLER
4747 .ndo_poll_controller = e1000_netpoll,
4748#endif
4749};
4750
bc7f75fa
AK		 4751/**
4752 * e1000_probe - Device Initialization Routine
4753 * @pdev: PCI device information struct
4754 * @ent: entry in e1000_pci_tbl
4755 *
4756 * Returns 0 on success, negative on failure
4757 *
4758 * e1000_probe initializes an adapter identified by a pci_dev structure.
4759 * The OS initialization, configuring of the adapter private structure,
4760 * and a hardware reset occur.
4761 **/
4762static int __devinit e1000_probe(struct pci_dev *pdev,
4763 const struct pci_device_id *ent)
4764{
4765 struct net_device *netdev;
4766 struct e1000_adapter *adapter;
4767 struct e1000_hw *hw;
4768 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 4769 resource_size_t mmio_start, mmio_len;
4770 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 4771
4772 static int cards_found;
4773 int i, err, pci_using_dac;
4774 u16 eeprom_data = 0;
4775 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4776
1eae4eb2 4777 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4778
f0f422e5 4779 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4780 if (err)
4781 return err;
4782
4783 pci_using_dac = 0;
4784 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
4785 if (!err) {
4786 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4787 if (!err)
4788 pci_using_dac = 1;
4789 } else {
4790 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4791 if (err) {
4792 err = pci_set_consistent_dma_mask(pdev,
4793 DMA_32BIT_MASK);
4794 if (err) {
4795 dev_err(&pdev->dev, "No usable DMA "
4796 "configuration, aborting\n");
4797 goto err_dma;
4798 }
4799 }
4800 }
4801
e8de1481 4802 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 4803 pci_select_bars(pdev, IORESOURCE_MEM),
4804 e1000e_driver_name);
bc7f75fa
AK		 4805 if (err)
4806 goto err_pci_reg;
4807
4808 pci_set_master(pdev);
438b365a
BA		 4809 /* PCI config space info */
4810 err = pci_save_state(pdev);
4811 if (err)
4812 goto err_alloc_etherdev;
bc7f75fa
AK		 4813
4814 err = -ENOMEM;
4815 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
4816 if (!netdev)
4817 goto err_alloc_etherdev;
4818
bc7f75fa
AK		 4819 SET_NETDEV_DEV(netdev, &pdev->dev);
4820
4821 pci_set_drvdata(pdev, netdev);
4822 adapter = netdev_priv(netdev);
4823 hw = &adapter->hw;
4824 adapter->netdev = netdev;
4825 adapter->pdev = pdev;
4826 adapter->ei = ei;
4827 adapter->pba = ei->pba;
4828 adapter->flags = ei->flags;
eb7c3adb 4829 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 4830 adapter->hw.adapter = adapter;
4831 adapter->hw.mac.type = ei->mac;
4832 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
4833
4834 mmio_start = pci_resource_start(pdev, 0);
4835 mmio_len = pci_resource_len(pdev, 0);
4836
4837 err = -EIO;
4838 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
4839 if (!adapter->hw.hw_addr)
4840 goto err_ioremap;
4841
4842 if ((adapter->flags & FLAG_HAS_FLASH) &&
4843 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
4844 flash_start = pci_resource_start(pdev, 1);
4845 flash_len = pci_resource_len(pdev, 1);
4846 adapter->hw.flash_address = ioremap(flash_start, flash_len);
4847 if (!adapter->hw.flash_address)
4848 goto err_flashmap;
4849 }
4850
4851 /* construct the net_device struct */
651c2466 4852 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 4853 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 4854 netdev->watchdog_timeo = 5 * HZ;
4855 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 4856 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
4857
4858 netdev->mem_start = mmio_start;
4859 netdev->mem_end = mmio_start + mmio_len;
4860
4861 adapter->bd_number = cards_found++;
4862
4662e82b
BA		 4863 e1000e_check_options(adapter);
4864
bc7f75fa
AK		 4865 /* setup adapter struct */
4866 err = e1000_sw_init(adapter);
4867 if (err)
4868 goto err_sw_init;
4869
4870 err = -EIO;
4871
4872 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
4873 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
4874 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
4875
69e3fd8c 4876 err = ei->get_variants(adapter);
bc7f75fa
AK		 4877 if (err)
4878 goto err_hw_init;
4879
4a770358
BA		 4880 if ((adapter->flags & FLAG_IS_ICH) &&
4881 (adapter->flags & FLAG_READ_ONLY_NVM))
4882 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
4883
bc7f75fa
AK		 4884 hw->mac.ops.get_bus_info(&adapter->hw);
4885
318a94d6 4886 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 4887
4888 /* Copper options */
318a94d6 4889 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 4890 adapter->hw.phy.mdix = AUTO_ALL_MODES;
4891 adapter->hw.phy.disable_polarity_correction = 0;
4892 adapter->hw.phy.ms_type = e1000_ms_hw_default;
4893 }
4894
4895 if (e1000_check_reset_block(&adapter->hw))
44defeb3 4896 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 4897
4898 netdev->features = NETIF_F_SG |
4899 NETIF_F_HW_CSUM |
4900 NETIF_F_HW_VLAN_TX |
4901 NETIF_F_HW_VLAN_RX;
4902
4903 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
4904 netdev->features |= NETIF_F_HW_VLAN_FILTER;
4905
4906 netdev->features |= NETIF_F_TSO;
4907 netdev->features |= NETIF_F_TSO6;
4908
a5136e23
JK		 4909 netdev->vlan_features |= NETIF_F_TSO;
4910 netdev->vlan_features |= NETIF_F_TSO6;
4911 netdev->vlan_features |= NETIF_F_HW_CSUM;
4912 netdev->vlan_features |= NETIF_F_SG;
4913
bc7f75fa
AK		 4914 if (pci_using_dac)
4915 netdev->features |= NETIF_F_HIGHDMA;
4916
bc7f75fa
AK		 4917 if (e1000e_enable_mng_pass_thru(&adapter->hw))
4918 adapter->flags |= FLAG_MNG_PT_ENABLED;
4919
ad68076e
BA		 4920 /*
4921 * before reading the NVM, reset the controller to
4922 * put the device in a known good starting state
4923 */
bc7f75fa
AK		 4924 adapter->hw.mac.ops.reset_hw(&adapter->hw);
4925
4926 /*
4927 * systems with ASPM and others may see the checksum fail on the first
4928 * attempt. Let's give it a few tries
4929 */
4930 for (i = 0;; i++) {
4931 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
4932 break;
4933 if (i == 2) {
44defeb3 4934 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 4935 err = -EIO;
4936 goto err_eeprom;
4937 }
4938 }
4939
10aa4c04
AK		 4940 e1000_eeprom_checks(adapter);
4941
bc7f75fa
AK		 4942 /* copy the MAC address out of the NVM */
4943 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 4944 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 4945
4946 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
4947 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
4948
4949 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 4950 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 4951 err = -EIO;
4952 goto err_eeprom;
4953 }
4954
4955 init_timer(&adapter->watchdog_timer);
4956 adapter->watchdog_timer.function = &e1000_watchdog;
4957 adapter->watchdog_timer.data = (unsigned long) adapter;
4958
4959 init_timer(&adapter->phy_info_timer);
4960 adapter->phy_info_timer.function = &e1000_update_phy_info;
4961 adapter->phy_info_timer.data = (unsigned long) adapter;
4962
4963 INIT_WORK(&adapter->reset_task, e1000_reset_task);
4964 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 4965 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
4966 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
bc7f75fa 4967
bc7f75fa
AK		 4968 /* Initialize link parameters. User can change them with ethtool */
4969 adapter->hw.mac.autoneg = 1;
309af40b 4970 adapter->fc_autoneg = 1;
5c48ef3e
BA		 4971 adapter->hw.fc.requested_mode = e1000_fc_default;
4972 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 4973 adapter->hw.phy.autoneg_advertised = 0x2f;
4974
4975 /* ring size defaults */
4976 adapter->rx_ring->count = 256;
4977 adapter->tx_ring->count = 256;
4978
4979 /*
4980 * Initial Wake on LAN setting - If APM wake is enabled in
4981 * the EEPROM, enable the ACPI Magic Packet filter
4982 */
4983 if (adapter->flags & FLAG_APME_IN_WUC) {
4984 /* APME bit in EEPROM is mapped to WUC.APME */
4985 eeprom_data = er32(WUC);
4986 eeprom_apme_mask = E1000_WUC_APME;
4987 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
4988 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
4989 (adapter->hw.bus.func == 1))
4990 e1000_read_nvm(&adapter->hw,
4991 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
4992 else
4993 e1000_read_nvm(&adapter->hw,
4994 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
4995 }
4996
4997 /* fetch WoL from EEPROM */
4998 if (eeprom_data & eeprom_apme_mask)
4999 adapter->eeprom_wol |= E1000_WUFC_MAG;
5000
5001 /*
5002 * now that we have the eeprom settings, apply the special cases
5003 * where the eeprom may be wrong or the board simply won't support
5004 * wake on lan on a particular port
5005 */
5006 if (!(adapter->flags & FLAG_HAS_WOL))
5007 adapter->eeprom_wol = 0;
5008
5009 /* initialize the wol settings based on the eeprom settings */
5010 adapter->wol = adapter->eeprom_wol;
6ff68026 5011 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5012
84527590
BA		 5013 /* save off EEPROM version number */
5014 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5015
bc7f75fa
AK		 5016 /* reset the hardware with the new settings */
5017 e1000e_reset(adapter);
5018
ad68076e
BA		 5019 /*
5020 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5021 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5022 * under the control of the driver.
5023 */
c43bc57e 5024 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5025 e1000_get_hw_control(adapter);
5026
5027 /* tell the stack to leave us alone until e1000_open() is called */
5028 netif_carrier_off(netdev);
d55b53ff 5029 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK		 5030
5031 strcpy(netdev->name, "eth%d");
5032 err = register_netdev(netdev);
5033 if (err)
5034 goto err_register;
5035
5036 e1000_print_device_info(adapter);
5037
5038 return 0;
5039
5040err_register:
c43bc57e
JB		 5041 if (!(adapter->flags & FLAG_HAS_AMT))
5042 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5043err_eeprom:
5044 if (!e1000_check_reset_block(&adapter->hw))
5045 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5046err_hw_init:
bc7f75fa 5047
bc7f75fa
AK		 5048 kfree(adapter->tx_ring);
5049 kfree(adapter->rx_ring);
5050err_sw_init:
c43bc57e
JB		 5051 if (adapter->hw.flash_address)
5052 iounmap(adapter->hw.flash_address);
e82f54ba 5053 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5054err_flashmap:
bc7f75fa
AK		 5055 iounmap(adapter->hw.hw_addr);
5056err_ioremap:
5057 free_netdev(netdev);
5058err_alloc_etherdev:
f0f422e5
BA		 5059 pci_release_selected_regions(pdev,
5060 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5061err_pci_reg:
5062err_dma:
5063 pci_disable_device(pdev);
5064 return err;
5065}
5066
5067/**
5068 * e1000_remove - Device Removal Routine
5069 * @pdev: PCI device information struct
5070 *
5071 * e1000_remove is called by the PCI subsystem to alert the driver
5072 * that it should release a PCI device. The could be caused by a
5073 * Hot-Plug event, or because the driver is going to be removed from
5074 * memory.
5075 **/
5076static void __devexit e1000_remove(struct pci_dev *pdev)
5077{
5078 struct net_device *netdev = pci_get_drvdata(pdev);
5079 struct e1000_adapter *adapter = netdev_priv(netdev);
111b9dc5 5080 int err;
bc7f75fa 5081
ad68076e
BA		 5082 /*
5083 * flush_scheduled work may reschedule our watchdog task, so
5084 * explicitly disable watchdog tasks from being rescheduled
5085 */
bc7f75fa
AK		 5086 set_bit(__E1000_DOWN, &adapter->state);
5087 del_timer_sync(&adapter->watchdog_timer);
5088 del_timer_sync(&adapter->phy_info_timer);
5089
5090 flush_scheduled_work();
5091
ad68076e
BA		 5092 /*
5093 * Release control of h/w to f/w. If f/w is AMT enabled, this
5094 * would have already happened in close and is redundant.
5095 */
bc7f75fa
AK		 5096 e1000_release_hw_control(adapter);
5097
5098 unregister_netdev(netdev);
5099
5100 if (!e1000_check_reset_block(&adapter->hw))
5101 e1000_phy_hw_reset(&adapter->hw);
5102
4662e82b 5103 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5104 kfree(adapter->tx_ring);
5105 kfree(adapter->rx_ring);
5106
5107 iounmap(adapter->hw.hw_addr);
5108 if (adapter->hw.flash_address)
5109 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5110 pci_release_selected_regions(pdev,
5111 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5112
5113 free_netdev(netdev);
5114
111b9dc5
JB		 5115 /* AER disable */
5116 err = pci_disable_pcie_error_reporting(pdev);
5117 if (err)
5118 dev_err(&pdev->dev,
5119 "pci_disable_pcie_error_reporting failed 0x%x\n", err);
5120
bc7f75fa
AK		 5121 pci_disable_device(pdev);
5122}
5123
5124/* PCI Error Recovery (ERS) */
5125static struct pci_error_handlers e1000_err_handler = {
5126 .error_detected = e1000_io_error_detected,
5127 .slot_reset = e1000_io_slot_reset,
5128 .resume = e1000_io_resume,
5129};
5130
5131static struct pci_device_id e1000_pci_tbl[] = {
bc7f75fa
AK		 5132 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5133 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5134 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5135 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5136 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5137 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5138 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5139 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5140 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5141
bc7f75fa
AK		 5142 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5143 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5144 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5145 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5146
bc7f75fa
AK		 5147 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5148 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5149 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5150
4662e82b
BA		 5151 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
5152
bc7f75fa
AK		 5153 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5154 board_80003es2lan },
5155 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5156 board_80003es2lan },
5157 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5158 board_80003es2lan },
5159 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5160 board_80003es2lan },
ad68076e 5161
bc7f75fa
AK		 5162 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5163 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5164 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5165 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5166 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5167 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5168 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
ad68076e 5169
bc7f75fa
AK		 5170 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5171 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5172 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5173 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5174 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5175 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5176 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5177 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5178 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5179
5180 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5181 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5182 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5183
f4187b56
BA		 5184 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5185 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5186
bc7f75fa
AK		 5187 { } /* terminate list */
5188};
5189MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5190
5191/* PCI Device API Driver */
5192static struct pci_driver e1000_driver = {
5193 .name = e1000e_driver_name,
5194 .id_table = e1000_pci_tbl,
5195 .probe = e1000_probe,
5196 .remove = __devexit_p(e1000_remove),
5197#ifdef CONFIG_PM
ad68076e 5198 /* Power Management Hooks */
bc7f75fa
AK		 5199 .suspend = e1000_suspend,
5200 .resume = e1000_resume,
5201#endif
5202 .shutdown = e1000_shutdown,
5203 .err_handler = &e1000_err_handler
5204};
5205
5206/**
5207 * e1000_init_module - Driver Registration Routine
5208 *
5209 * e1000_init_module is the first routine called when the driver is
5210 * loaded. All it does is register with the PCI subsystem.
5211 **/
5212static int __init e1000_init_module(void)
5213{
5214 int ret;
5215 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5216 e1000e_driver_name, e1000e_driver_version);
ad68076e 5217 printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n",
bc7f75fa
AK		 5218 e1000e_driver_name);
5219 ret = pci_register_driver(&e1000_driver);
97ac8cae
BA		 5220 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name,
5221 PM_QOS_DEFAULT_VALUE);
5222
bc7f75fa
AK		 5223 return ret;
5224}
5225module_init(e1000_init_module);
5226
5227/**
5228 * e1000_exit_module - Driver Exit Cleanup Routine
5229 *
5230 * e1000_exit_module is called just before the driver is removed
5231 * from memory.
5232 **/
5233static void __exit e1000_exit_module(void)
5234{
5235 pci_unregister_driver(&e1000_driver);
97ac8cae 5236 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name);
bc7f75fa
AK		 5237}
5238module_exit(e1000_exit_module);
5239
5240
5241MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5242MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5243MODULE_LICENSE("GPL");
5244MODULE_VERSION(DRV_VERSION);
5245
5246/* e1000_main.c */
Clone of davem's net-next-2.6 tree