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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad...
[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
eab2abf5 55#define DRV_VERSION "1.0.2-k4"
bc7f75fa
AK		 56char e1000e_driver_name[] = "e1000e";
57const char e1000e_driver_version[] = DRV_VERSION;
58
59static const struct e1000_info *e1000_info_tbl[] = {
60 [board_82571] = &e1000_82571_info,
61 [board_82572] = &e1000_82572_info,
62 [board_82573] = &e1000_82573_info,
4662e82b 63 [board_82574] = &e1000_82574_info,
8c81c9c3 64 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 65 [board_80003es2lan] = &e1000_es2_info,
66 [board_ich8lan] = &e1000_ich8_info,
67 [board_ich9lan] = &e1000_ich9_info,
f4187b56 68 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 69 [board_pchlan] = &e1000_pch_info,
bc7f75fa
AK		 70};
71
84f4ee90
TI		 72struct e1000_reg_info {
73 u32 ofs;
74 char *name;
75};
76
77#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
78#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
79#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
80#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
81#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
82
83#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
84#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
85#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
86#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
87#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
88
89static const struct e1000_reg_info e1000_reg_info_tbl[] = {
90
91 /* General Registers */
92 {E1000_CTRL, "CTRL"},
93 {E1000_STATUS, "STATUS"},
94 {E1000_CTRL_EXT, "CTRL_EXT"},
95
96 /* Interrupt Registers */
97 {E1000_ICR, "ICR"},
98
99 /* RX Registers */
100 {E1000_RCTL, "RCTL"},
101 {E1000_RDLEN, "RDLEN"},
102 {E1000_RDH, "RDH"},
103 {E1000_RDT, "RDT"},
104 {E1000_RDTR, "RDTR"},
105 {E1000_RXDCTL(0), "RXDCTL"},
106 {E1000_ERT, "ERT"},
107 {E1000_RDBAL, "RDBAL"},
108 {E1000_RDBAH, "RDBAH"},
109 {E1000_RDFH, "RDFH"},
110 {E1000_RDFT, "RDFT"},
111 {E1000_RDFHS, "RDFHS"},
112 {E1000_RDFTS, "RDFTS"},
113 {E1000_RDFPC, "RDFPC"},
114
115 /* TX Registers */
116 {E1000_TCTL, "TCTL"},
117 {E1000_TDBAL, "TDBAL"},
118 {E1000_TDBAH, "TDBAH"},
119 {E1000_TDLEN, "TDLEN"},
120 {E1000_TDH, "TDH"},
121 {E1000_TDT, "TDT"},
122 {E1000_TIDV, "TIDV"},
123 {E1000_TXDCTL(0), "TXDCTL"},
124 {E1000_TADV, "TADV"},
125 {E1000_TARC(0), "TARC"},
126 {E1000_TDFH, "TDFH"},
127 {E1000_TDFT, "TDFT"},
128 {E1000_TDFHS, "TDFHS"},
129 {E1000_TDFTS, "TDFTS"},
130 {E1000_TDFPC, "TDFPC"},
131
132 /* List Terminator */
133 {}
134};
135
136/*
137 * e1000_regdump - register printout routine
138 */
139static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
140{
141 int n = 0;
142 char rname[16];
143 u32 regs[8];
144
145 switch (reginfo->ofs) {
146 case E1000_RXDCTL(0):
147 for (n = 0; n < 2; n++)
148 regs[n] = __er32(hw, E1000_RXDCTL(n));
149 break;
150 case E1000_TXDCTL(0):
151 for (n = 0; n < 2; n++)
152 regs[n] = __er32(hw, E1000_TXDCTL(n));
153 break;
154 case E1000_TARC(0):
155 for (n = 0; n < 2; n++)
156 regs[n] = __er32(hw, E1000_TARC(n));
157 break;
158 default:
159 printk(KERN_INFO "%-15s %08x\n",
160 reginfo->name, __er32(hw, reginfo->ofs));
161 return;
162 }
163
164 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
165 printk(KERN_INFO "%-15s ", rname);
166 for (n = 0; n < 2; n++)
167 printk(KERN_CONT "%08x ", regs[n]);
168 printk(KERN_CONT "\n");
169}
170
171
172/*
173 * e1000e_dump - Print registers, tx-ring and rx-ring
174 */
175static void e1000e_dump(struct e1000_adapter *adapter)
176{
177 struct net_device *netdev = adapter->netdev;
178 struct e1000_hw *hw = &adapter->hw;
179 struct e1000_reg_info *reginfo;
180 struct e1000_ring *tx_ring = adapter->tx_ring;
181 struct e1000_tx_desc *tx_desc;
182 struct my_u0 { u64 a; u64 b; } *u0;
183 struct e1000_buffer *buffer_info;
184 struct e1000_ring *rx_ring = adapter->rx_ring;
185 union e1000_rx_desc_packet_split *rx_desc_ps;
186 struct e1000_rx_desc *rx_desc;
187 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
188 u32 staterr;
189 int i = 0;
190
191 if (!netif_msg_hw(adapter))
192 return;
193
194 /* Print netdevice Info */
195 if (netdev) {
196 dev_info(&adapter->pdev->dev, "Net device Info\n");
197 printk(KERN_INFO "Device Name state "
198 "trans_start last_rx\n");
199 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
200 netdev->name,
201 netdev->state,
202 netdev->trans_start,
203 netdev->last_rx);
204 }
205
206 /* Print Registers */
207 dev_info(&adapter->pdev->dev, "Register Dump\n");
208 printk(KERN_INFO " Register Name Value\n");
209 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
210 reginfo->name; reginfo++) {
211 e1000_regdump(hw, reginfo);
212 }
213
214 /* Print TX Ring Summary */
215 if (!netdev || !netif_running(netdev))
216 goto exit;
217
218 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
219 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
220 " leng ntw timestamp\n");
221 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
222 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
223 0, tx_ring->next_to_use, tx_ring->next_to_clean,
224 (u64)buffer_info->dma,
225 buffer_info->length,
226 buffer_info->next_to_watch,
227 (u64)buffer_info->time_stamp);
228
229 /* Print TX Rings */
230 if (!netif_msg_tx_done(adapter))
231 goto rx_ring_summary;
232
233 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
234
235 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
236 *
237 * Legacy Transmit Descriptor
238 * +--------------------------------------------------------------+
239 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
240 * +--------------------------------------------------------------+
241 * 8 | Special | CSS | Status | CMD | CSO | Length |
242 * +--------------------------------------------------------------+
243 * 63 48 47 36 35 32 31 24 23 16 15 0
244 *
245 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
246 * 63 48 47 40 39 32 31 16 15 8 7 0
247 * +----------------------------------------------------------------+
248 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
249 * +----------------------------------------------------------------+
250 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
251 * +----------------------------------------------------------------+
252 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
253 *
254 * Extended Data Descriptor (DTYP=0x1)
255 * +----------------------------------------------------------------+
256 * 0 | Buffer Address [63:0] |
257 * +----------------------------------------------------------------+
258 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
259 * +----------------------------------------------------------------+
260 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
261 */
262 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
263 " [bi->dma ] leng ntw timestamp bi->skb "
264 "<-- Legacy format\n");
265 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Ext Context format\n");
268 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Data format\n");
271 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
272 tx_desc = E1000_TX_DESC(*tx_ring, i);
273 buffer_info = &tx_ring->buffer_info[i];
274 u0 = (struct my_u0 *)tx_desc;
275 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
276 "%04X %3X %016llX %p",
277 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
278 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
279 le64_to_cpu(u0->a), le64_to_cpu(u0->b),
280 (u64)buffer_info->dma, buffer_info->length,
281 buffer_info->next_to_watch, (u64)buffer_info->time_stamp,
282 buffer_info->skb);
283 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
284 printk(KERN_CONT " NTC/U\n");
285 else if (i == tx_ring->next_to_use)
286 printk(KERN_CONT " NTU\n");
287 else if (i == tx_ring->next_to_clean)
288 printk(KERN_CONT " NTC\n");
289 else
290 printk(KERN_CONT "\n");
291
292 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
293 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
294 16, 1, phys_to_virt(buffer_info->dma),
295 buffer_info->length, true);
296 }
297
298 /* Print RX Rings Summary */
299rx_ring_summary:
300 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
301 printk(KERN_INFO "Queue [NTU] [NTC]\n");
302 printk(KERN_INFO " %5d %5X %5X\n", 0,
303 rx_ring->next_to_use, rx_ring->next_to_clean);
304
305 /* Print RX Rings */
306 if (!netif_msg_rx_status(adapter))
307 goto exit;
308
309 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
310 switch (adapter->rx_ps_pages) {
311 case 1:
312 case 2:
313 case 3:
314 /* [Extended] Packet Split Receive Descriptor Format
315 *
316 * +-----------------------------------------------------+
317 * 0 | Buffer Address 0 [63:0] |
318 * +-----------------------------------------------------+
319 * 8 | Buffer Address 1 [63:0] |
320 * +-----------------------------------------------------+
321 * 16 | Buffer Address 2 [63:0] |
322 * +-----------------------------------------------------+
323 * 24 | Buffer Address 3 [63:0] |
324 * +-----------------------------------------------------+
325 */
326 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
327 "[buffer 1 63:0 ] "
328 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
329 "[bi->skb] <-- Ext Pkt Split format\n");
330 /* [Extended] Receive Descriptor (Write-Back) Format
331 *
332 * 63 48 47 32 31 13 12 8 7 4 3 0
333 * +------------------------------------------------------+
334 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
335 * | Checksum | Ident | | Queue | | Type |
336 * +------------------------------------------------------+
337 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
338 * +------------------------------------------------------+
339 * 63 48 47 32 31 20 19 0
340 */
341 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
342 "[vl l0 ee es] "
343 "[ l3 l2 l1 hs] [reserved ] ---------------- "
344 "[bi->skb] <-- Ext Rx Write-Back format\n");
345 for (i = 0; i < rx_ring->count; i++) {
346 buffer_info = &rx_ring->buffer_info[i];
347 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
348 u1 = (struct my_u1 *)rx_desc_ps;
349 staterr =
350 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
351 if (staterr & E1000_RXD_STAT_DD) {
352 /* Descriptor Done */
353 printk(KERN_INFO "RWB[0x%03X] %016llX "
354 "%016llX %016llX %016llX "
355 "---------------- %p", i,
356 le64_to_cpu(u1->a),
357 le64_to_cpu(u1->b),
358 le64_to_cpu(u1->c),
359 le64_to_cpu(u1->d),
360 buffer_info->skb);
361 } else {
362 printk(KERN_INFO "R [0x%03X] %016llX "
363 "%016llX %016llX %016llX %016llX %p", i,
364 le64_to_cpu(u1->a),
365 le64_to_cpu(u1->b),
366 le64_to_cpu(u1->c),
367 le64_to_cpu(u1->d),
368 (u64)buffer_info->dma,
369 buffer_info->skb);
370
371 if (netif_msg_pktdata(adapter))
372 print_hex_dump(KERN_INFO, "",
373 DUMP_PREFIX_ADDRESS, 16, 1,
374 phys_to_virt(buffer_info->dma),
375 adapter->rx_ps_bsize0, true);
376 }
377
378 if (i == rx_ring->next_to_use)
379 printk(KERN_CONT " NTU\n");
380 else if (i == rx_ring->next_to_clean)
381 printk(KERN_CONT " NTC\n");
382 else
383 printk(KERN_CONT "\n");
384 }
385 break;
386 default:
387 case 0:
388 /* Legacy Receive Descriptor Format
389 *
390 * +-----------------------------------------------------+
391 * | Buffer Address [63:0] |
392 * +-----------------------------------------------------+
393 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
394 * +-----------------------------------------------------+
395 * 63 48 47 40 39 32 31 16 15 0
396 */
397 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
398 "[vl er S cks ln] [bi->dma ] [bi->skb] "
399 "<-- Legacy format\n");
400 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
401 rx_desc = E1000_RX_DESC(*rx_ring, i);
402 buffer_info = &rx_ring->buffer_info[i];
403 u0 = (struct my_u0 *)rx_desc;
404 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
405 "%016llX %p",
406 i, le64_to_cpu(u0->a), le64_to_cpu(u0->b),
407 (u64)buffer_info->dma, buffer_info->skb);
408 if (i == rx_ring->next_to_use)
409 printk(KERN_CONT " NTU\n");
410 else if (i == rx_ring->next_to_clean)
411 printk(KERN_CONT " NTC\n");
412 else
413 printk(KERN_CONT "\n");
414
415 if (netif_msg_pktdata(adapter))
416 print_hex_dump(KERN_INFO, "",
417 DUMP_PREFIX_ADDRESS,
418 16, 1, phys_to_virt(buffer_info->dma),
419 adapter->rx_buffer_len, true);
420 }
421 }
422
423exit:
424 return;
425}
426
bc7f75fa
AK		 427/**
428 * e1000_desc_unused - calculate if we have unused descriptors
429 **/
430static int e1000_desc_unused(struct e1000_ring *ring)
431{
432 if (ring->next_to_clean > ring->next_to_use)
433 return ring->next_to_clean - ring->next_to_use - 1;
434
435 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
436}
437
438/**
ad68076e 439 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 440 * @adapter: board private structure
441 * @status: descriptor status field as written by hardware
442 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
443 * @skb: pointer to sk_buff to be indicated to stack
444 **/
445static void e1000_receive_skb(struct e1000_adapter *adapter,
446 struct net_device *netdev,
447 struct sk_buff *skb,
a39fe742 448 u8 status, __le16 vlan)
bc7f75fa
AK		 449{
450 skb->protocol = eth_type_trans(skb, netdev);
451
452 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 453 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
454 le16_to_cpu(vlan), skb);
bc7f75fa 455 else
89c88b16 456 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 457}
458
459/**
460 * e1000_rx_checksum - Receive Checksum Offload for 82543
461 * @adapter: board private structure
462 * @status_err: receive descriptor status and error fields
463 * @csum: receive descriptor csum field
464 * @sk_buff: socket buffer with received data
465 **/
466static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
467 u32 csum, struct sk_buff *skb)
468{
469 u16 status = (u16)status_err;
470 u8 errors = (u8)(status_err >> 24);
471 skb->ip_summed = CHECKSUM_NONE;
472
473 /* Ignore Checksum bit is set */
474 if (status & E1000_RXD_STAT_IXSM)
475 return;
476 /* TCP/UDP checksum error bit is set */
477 if (errors & E1000_RXD_ERR_TCPE) {
478 /* let the stack verify checksum errors */
479 adapter->hw_csum_err++;
480 return;
481 }
482
483 /* TCP/UDP Checksum has not been calculated */
484 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
485 return;
486
487 /* It must be a TCP or UDP packet with a valid checksum */
488 if (status & E1000_RXD_STAT_TCPCS) {
489 /* TCP checksum is good */
490 skb->ip_summed = CHECKSUM_UNNECESSARY;
491 } else {
ad68076e
BA		 492 /*
493 * IP fragment with UDP payload
494 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 495 * and then put the value in host order for further stack use.
496 */
a39fe742
AV		 497 __sum16 sum = (__force __sum16)htons(csum);
498 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 499 skb->ip_summed = CHECKSUM_COMPLETE;
500 }
501 adapter->hw_csum_good++;
502}
503
504/**
505 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
506 * @adapter: address of board private structure
507 **/
508static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
509 int cleaned_count)
510{
511 struct net_device *netdev = adapter->netdev;
512 struct pci_dev *pdev = adapter->pdev;
513 struct e1000_ring *rx_ring = adapter->rx_ring;
514 struct e1000_rx_desc *rx_desc;
515 struct e1000_buffer *buffer_info;
516 struct sk_buff *skb;
517 unsigned int i;
89d71a66 518 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 519
520 i = rx_ring->next_to_use;
521 buffer_info = &rx_ring->buffer_info[i];
522
523 while (cleaned_count--) {
524 skb = buffer_info->skb;
525 if (skb) {
526 skb_trim(skb, 0);
527 goto map_skb;
528 }
529
89d71a66 530 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 531 if (!skb) {
532 /* Better luck next round */
533 adapter->alloc_rx_buff_failed++;
534 break;
535 }
536
bc7f75fa
AK		 537 buffer_info->skb = skb;
538map_skb:
0be3f55f 539 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 540 adapter->rx_buffer_len,
0be3f55f
NN		 541 DMA_FROM_DEVICE);
542 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 543 dev_err(&pdev->dev, "RX DMA map failed\n");
544 adapter->rx_dma_failed++;
545 break;
546 }
547
548 rx_desc = E1000_RX_DESC(*rx_ring, i);
549 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
550
50849d79
TH		 551 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
552 /*
553 * Force memory writes to complete before letting h/w
554 * know there are new descriptors to fetch. (Only
555 * applicable for weak-ordered memory model archs,
556 * such as IA-64).
557 */
558 wmb();
559 writel(i, adapter->hw.hw_addr + rx_ring->tail);
560 }
bc7f75fa
AK		 561 i++;
562 if (i == rx_ring->count)
563 i = 0;
564 buffer_info = &rx_ring->buffer_info[i];
565 }
566
50849d79 567 rx_ring->next_to_use = i;
bc7f75fa
AK		 568}
569
570/**
571 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
572 * @adapter: address of board private structure
573 **/
574static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
575 int cleaned_count)
576{
577 struct net_device *netdev = adapter->netdev;
578 struct pci_dev *pdev = adapter->pdev;
579 union e1000_rx_desc_packet_split *rx_desc;
580 struct e1000_ring *rx_ring = adapter->rx_ring;
581 struct e1000_buffer *buffer_info;
582 struct e1000_ps_page *ps_page;
583 struct sk_buff *skb;
584 unsigned int i, j;
585
586 i = rx_ring->next_to_use;
587 buffer_info = &rx_ring->buffer_info[i];
588
589 while (cleaned_count--) {
590 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
591
592 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 593 ps_page = &buffer_info->ps_pages[j];
594 if (j >= adapter->rx_ps_pages) {
595 /* all unused desc entries get hw null ptr */
a39fe742 596 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 597 continue;
598 }
599 if (!ps_page->page) {
600 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 601 if (!ps_page->page) {
47f44e40
AK		 602 adapter->alloc_rx_buff_failed++;
603 goto no_buffers;
604 }
0be3f55f
NN		 605 ps_page->dma = dma_map_page(&pdev->dev,
606 ps_page->page,
607 0, PAGE_SIZE,
608 DMA_FROM_DEVICE);
609 if (dma_mapping_error(&pdev->dev,
610 ps_page->dma)) {
47f44e40
AK		 611 dev_err(&adapter->pdev->dev,
612 "RX DMA page map failed\n");
613 adapter->rx_dma_failed++;
614 goto no_buffers;
bc7f75fa 615 }
bc7f75fa 616 }
47f44e40
AK		 617 /*
618 * Refresh the desc even if buffer_addrs
619 * didn't change because each write-back
620 * erases this info.
621 */
622 rx_desc->read.buffer_addr[j+1] =
623 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 624 }
625
89d71a66
ED		 626 skb = netdev_alloc_skb_ip_align(netdev,
627 adapter->rx_ps_bsize0);
bc7f75fa
AK		 628
629 if (!skb) {
630 adapter->alloc_rx_buff_failed++;
631 break;
632 }
633
bc7f75fa 634 buffer_info->skb = skb;
0be3f55f 635 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 636 adapter->rx_ps_bsize0,
0be3f55f
NN		 637 DMA_FROM_DEVICE);
638 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 639 dev_err(&pdev->dev, "RX DMA map failed\n");
640 adapter->rx_dma_failed++;
641 /* cleanup skb */
642 dev_kfree_skb_any(skb);
643 buffer_info->skb = NULL;
644 break;
645 }
646
647 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
648
50849d79
TH		 649 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
650 /*
651 * Force memory writes to complete before letting h/w
652 * know there are new descriptors to fetch. (Only
653 * applicable for weak-ordered memory model archs,
654 * such as IA-64).
655 */
656 wmb();
657 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
658 }
659
bc7f75fa
AK		 660 i++;
661 if (i == rx_ring->count)
662 i = 0;
663 buffer_info = &rx_ring->buffer_info[i];
664 }
665
666no_buffers:
50849d79 667 rx_ring->next_to_use = i;
bc7f75fa
AK		 668}
669
97ac8cae
BA		 670/**
671 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
672 * @adapter: address of board private structure
97ac8cae
BA		 673 * @cleaned_count: number of buffers to allocate this pass
674 **/
675
676static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
677 int cleaned_count)
678{
679 struct net_device *netdev = adapter->netdev;
680 struct pci_dev *pdev = adapter->pdev;
681 struct e1000_rx_desc *rx_desc;
682 struct e1000_ring *rx_ring = adapter->rx_ring;
683 struct e1000_buffer *buffer_info;
684 struct sk_buff *skb;
685 unsigned int i;
89d71a66 686 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 687
688 i = rx_ring->next_to_use;
689 buffer_info = &rx_ring->buffer_info[i];
690
691 while (cleaned_count--) {
692 skb = buffer_info->skb;
693 if (skb) {
694 skb_trim(skb, 0);
695 goto check_page;
696 }
697
89d71a66 698 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 699 if (unlikely(!skb)) {
700 /* Better luck next round */
701 adapter->alloc_rx_buff_failed++;
702 break;
703 }
704
97ac8cae
BA		 705 buffer_info->skb = skb;
706check_page:
707 /* allocate a new page if necessary */
708 if (!buffer_info->page) {
709 buffer_info->page = alloc_page(GFP_ATOMIC);
710 if (unlikely(!buffer_info->page)) {
711 adapter->alloc_rx_buff_failed++;
712 break;
713 }
714 }
715
716 if (!buffer_info->dma)
0be3f55f 717 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 718 buffer_info->page, 0,
719 PAGE_SIZE,
0be3f55f 720 DMA_FROM_DEVICE);
97ac8cae
BA		 721
722 rx_desc = E1000_RX_DESC(*rx_ring, i);
723 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
724
725 if (unlikely(++i == rx_ring->count))
726 i = 0;
727 buffer_info = &rx_ring->buffer_info[i];
728 }
729
730 if (likely(rx_ring->next_to_use != i)) {
731 rx_ring->next_to_use = i;
732 if (unlikely(i-- == 0))
733 i = (rx_ring->count - 1);
734
735 /* Force memory writes to complete before letting h/w
736 * know there are new descriptors to fetch. (Only
737 * applicable for weak-ordered memory model archs,
738 * such as IA-64). */
739 wmb();
740 writel(i, adapter->hw.hw_addr + rx_ring->tail);
741 }
742}
743
bc7f75fa
AK		 744/**
745 * e1000_clean_rx_irq - Send received data up the network stack; legacy
746 * @adapter: board private structure
747 *
748 * the return value indicates whether actual cleaning was done, there
749 * is no guarantee that everything was cleaned
750 **/
751static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
752 int *work_done, int work_to_do)
753{
754 struct net_device *netdev = adapter->netdev;
755 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 756 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 757 struct e1000_ring *rx_ring = adapter->rx_ring;
758 struct e1000_rx_desc *rx_desc, *next_rxd;
759 struct e1000_buffer *buffer_info, *next_buffer;
760 u32 length;
761 unsigned int i;
762 int cleaned_count = 0;
763 bool cleaned = 0;
764 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
765
766 i = rx_ring->next_to_clean;
767 rx_desc = E1000_RX_DESC(*rx_ring, i);
768 buffer_info = &rx_ring->buffer_info[i];
769
770 while (rx_desc->status & E1000_RXD_STAT_DD) {
771 struct sk_buff *skb;
772 u8 status;
773
774 if (*work_done >= work_to_do)
775 break;
776 (*work_done)++;
777
778 status = rx_desc->status;
779 skb = buffer_info->skb;
780 buffer_info->skb = NULL;
781
782 prefetch(skb->data - NET_IP_ALIGN);
783
784 i++;
785 if (i == rx_ring->count)
786 i = 0;
787 next_rxd = E1000_RX_DESC(*rx_ring, i);
788 prefetch(next_rxd);
789
790 next_buffer = &rx_ring->buffer_info[i];
791
792 cleaned = 1;
793 cleaned_count++;
0be3f55f 794 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 795 buffer_info->dma,
796 adapter->rx_buffer_len,
0be3f55f 797 DMA_FROM_DEVICE);
bc7f75fa
AK		 798 buffer_info->dma = 0;
799
800 length = le16_to_cpu(rx_desc->length);
801
b94b5028
JB		 802 /*
803 * !EOP means multiple descriptors were used to store a single
804 * packet, if that's the case we need to toss it. In fact, we
805 * need to toss every packet with the EOP bit clear and the
806 * next frame that _does_ have the EOP bit set, as it is by
807 * definition only a frame fragment
808 */
809 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
810 adapter->flags2 |= FLAG2_IS_DISCARDING;
811
812 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 813 /* All receives must fit into a single buffer */
3bb99fe2 814 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 815 /* recycle */
816 buffer_info->skb = skb;
b94b5028
JB		 817 if (status & E1000_RXD_STAT_EOP)
818 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 819 goto next_desc;
820 }
821
822 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
823 /* recycle */
824 buffer_info->skb = skb;
825 goto next_desc;
826 }
827
eb7c3adb
JK		 828 /* adjust length to remove Ethernet CRC */
829 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
830 length -= 4;
831
bc7f75fa
AK		 832 total_rx_bytes += length;
833 total_rx_packets++;
834
ad68076e
BA		 835 /*
836 * code added for copybreak, this should improve
bc7f75fa 837 * performance for small packets with large amounts
ad68076e
BA		 838 * of reassembly being done in the stack
839 */
bc7f75fa
AK		 840 if (length < copybreak) {
841 struct sk_buff *new_skb =
89d71a66 842 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 843 if (new_skb) {
808ff676
BA		 844 skb_copy_to_linear_data_offset(new_skb,
845 -NET_IP_ALIGN,
846 (skb->data -
847 NET_IP_ALIGN),
848 (length +
849 NET_IP_ALIGN));
bc7f75fa
AK		 850 /* save the skb in buffer_info as good */
851 buffer_info->skb = skb;
852 skb = new_skb;
853 }
854 /* else just continue with the old one */
855 }
856 /* end copybreak code */
857 skb_put(skb, length);
858
859 /* Receive Checksum Offload */
860 e1000_rx_checksum(adapter,
861 (u32)(status) |
862 ((u32)(rx_desc->errors) << 24),
863 le16_to_cpu(rx_desc->csum), skb);
864
865 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
866
867next_desc:
868 rx_desc->status = 0;
869
870 /* return some buffers to hardware, one at a time is too slow */
871 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
872 adapter->alloc_rx_buf(adapter, cleaned_count);
873 cleaned_count = 0;
874 }
875
876 /* use prefetched values */
877 rx_desc = next_rxd;
878 buffer_info = next_buffer;
879 }
880 rx_ring->next_to_clean = i;
881
882 cleaned_count = e1000_desc_unused(rx_ring);
883 if (cleaned_count)
884 adapter->alloc_rx_buf(adapter, cleaned_count);
885
bc7f75fa 886 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 887 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 888 netdev->stats.rx_bytes += total_rx_bytes;
889 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 890 return cleaned;
891}
892
bc7f75fa
AK		 893static void e1000_put_txbuf(struct e1000_adapter *adapter,
894 struct e1000_buffer *buffer_info)
895{
03b1320d
AD		 896 if (buffer_info->dma) {
897 if (buffer_info->mapped_as_page)
0be3f55f
NN		 898 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
899 buffer_info->length, DMA_TO_DEVICE);
03b1320d 900 else
0be3f55f
NN		 901 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
902 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 903 buffer_info->dma = 0;
904 }
bc7f75fa
AK		 905 if (buffer_info->skb) {
906 dev_kfree_skb_any(buffer_info->skb);
907 buffer_info->skb = NULL;
908 }
1b7719c4 909 buffer_info->time_stamp = 0;
bc7f75fa
AK		 910}
911
41cec6f1 912static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 913{
41cec6f1
BA		 914 struct e1000_adapter *adapter = container_of(work,
915 struct e1000_adapter,
916 print_hang_task);
bc7f75fa
AK		 917 struct e1000_ring *tx_ring = adapter->tx_ring;
918 unsigned int i = tx_ring->next_to_clean;
919 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
920 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 921 struct e1000_hw *hw = &adapter->hw;
922 u16 phy_status, phy_1000t_status, phy_ext_status;
923 u16 pci_status;
924
925 e1e_rphy(hw, PHY_STATUS, &phy_status);
926 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
927 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 928
41cec6f1
BA		 929 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
930
931 /* detected Hardware unit hang */
932 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 933 " TDH <%x>\n"
934 " TDT <%x>\n"
935 " next_to_use <%x>\n"
936 " next_to_clean <%x>\n"
937 "buffer_info[next_to_clean]:\n"
938 " time_stamp <%lx>\n"
939 " next_to_watch <%x>\n"
940 " jiffies <%lx>\n"
41cec6f1
BA		 941 " next_to_watch.status <%x>\n"
942 "MAC Status <%x>\n"
943 "PHY Status <%x>\n"
944 "PHY 1000BASE-T Status <%x>\n"
945 "PHY Extended Status <%x>\n"
946 "PCI Status <%x>\n",
44defeb3
JK		 947 readl(adapter->hw.hw_addr + tx_ring->head),
948 readl(adapter->hw.hw_addr + tx_ring->tail),
949 tx_ring->next_to_use,
950 tx_ring->next_to_clean,
951 tx_ring->buffer_info[eop].time_stamp,
952 eop,
953 jiffies,
41cec6f1
BA		 954 eop_desc->upper.fields.status,
955 er32(STATUS),
956 phy_status,
957 phy_1000t_status,
958 phy_ext_status,
959 pci_status);
bc7f75fa
AK		 960}
961
962/**
963 * e1000_clean_tx_irq - Reclaim resources after transmit completes
964 * @adapter: board private structure
965 *
966 * the return value indicates whether actual cleaning was done, there
967 * is no guarantee that everything was cleaned
968 **/
969static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
970{
971 struct net_device *netdev = adapter->netdev;
972 struct e1000_hw *hw = &adapter->hw;
973 struct e1000_ring *tx_ring = adapter->tx_ring;
974 struct e1000_tx_desc *tx_desc, *eop_desc;
975 struct e1000_buffer *buffer_info;
976 unsigned int i, eop;
977 unsigned int count = 0;
bc7f75fa
AK		 978 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
979
980 i = tx_ring->next_to_clean;
981 eop = tx_ring->buffer_info[i].next_to_watch;
982 eop_desc = E1000_TX_DESC(*tx_ring, eop);
983
12d04a3c
AD		 984 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
985 (count < tx_ring->count)) {
a86043c2
JB		 986 bool cleaned = false;
987 for (; !cleaned; count++) {
bc7f75fa
AK		 988 tx_desc = E1000_TX_DESC(*tx_ring, i);
989 buffer_info = &tx_ring->buffer_info[i];
990 cleaned = (i == eop);
991
992 if (cleaned) {
9ed318d5
TH		 993 total_tx_packets += buffer_info->segs;
994 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 995 }
996
997 e1000_put_txbuf(adapter, buffer_info);
998 tx_desc->upper.data = 0;
999
1000 i++;
1001 if (i == tx_ring->count)
1002 i = 0;
1003 }
1004
dac87619
TL		 1005 if (i == tx_ring->next_to_use)
1006 break;
bc7f75fa
AK		 1007 eop = tx_ring->buffer_info[i].next_to_watch;
1008 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1009 }
1010
1011 tx_ring->next_to_clean = i;
1012
1013#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1014 if (count && netif_carrier_ok(netdev) &&
1015 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1016 /* Make sure that anybody stopping the queue after this
1017 * sees the new next_to_clean.
1018 */
1019 smp_mb();
1020
1021 if (netif_queue_stopped(netdev) &&
1022 !(test_bit(__E1000_DOWN, &adapter->state))) {
1023 netif_wake_queue(netdev);
1024 ++adapter->restart_queue;
1025 }
1026 }
1027
1028 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1029 /*
1030 * Detect a transmit hang in hardware, this serializes the
1031 * check with the clearing of time_stamp and movement of i
1032 */
bc7f75fa 1033 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1034 if (tx_ring->buffer_info[i].time_stamp &&
1035 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1036 + (adapter->tx_timeout_factor * HZ)) &&
1037 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1038 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1039 netif_stop_queue(netdev);
1040 }
1041 }
1042 adapter->total_tx_bytes += total_tx_bytes;
1043 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 1044 netdev->stats.tx_bytes += total_tx_bytes;
1045 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 1046 return (count < tx_ring->count);
bc7f75fa
AK		 1047}
1048
bc7f75fa
AK		 1049/**
1050 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1051 * @adapter: board private structure
1052 *
1053 * the return value indicates whether actual cleaning was done, there
1054 * is no guarantee that everything was cleaned
1055 **/
1056static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1057 int *work_done, int work_to_do)
1058{
3bb99fe2 1059 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1060 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1061 struct net_device *netdev = adapter->netdev;
1062 struct pci_dev *pdev = adapter->pdev;
1063 struct e1000_ring *rx_ring = adapter->rx_ring;
1064 struct e1000_buffer *buffer_info, *next_buffer;
1065 struct e1000_ps_page *ps_page;
1066 struct sk_buff *skb;
1067 unsigned int i, j;
1068 u32 length, staterr;
1069 int cleaned_count = 0;
1070 bool cleaned = 0;
1071 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1072
1073 i = rx_ring->next_to_clean;
1074 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1075 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1076 buffer_info = &rx_ring->buffer_info[i];
1077
1078 while (staterr & E1000_RXD_STAT_DD) {
1079 if (*work_done >= work_to_do)
1080 break;
1081 (*work_done)++;
1082 skb = buffer_info->skb;
1083
1084 /* in the packet split case this is header only */
1085 prefetch(skb->data - NET_IP_ALIGN);
1086
1087 i++;
1088 if (i == rx_ring->count)
1089 i = 0;
1090 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1091 prefetch(next_rxd);
1092
1093 next_buffer = &rx_ring->buffer_info[i];
1094
1095 cleaned = 1;
1096 cleaned_count++;
0be3f55f 1097 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1098 adapter->rx_ps_bsize0,
0be3f55f 1099 DMA_FROM_DEVICE);
bc7f75fa
AK		 1100 buffer_info->dma = 0;
1101
b94b5028
JB		 1102 /* see !EOP comment in other rx routine */
1103 if (!(staterr & E1000_RXD_STAT_EOP))
1104 adapter->flags2 |= FLAG2_IS_DISCARDING;
1105
1106 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1107 e_dbg("Packet Split buffers didn't pick up the full "
1108 "packet\n");
bc7f75fa 1109 dev_kfree_skb_irq(skb);
b94b5028
JB		 1110 if (staterr & E1000_RXD_STAT_EOP)
1111 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1112 goto next_desc;
1113 }
1114
1115 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1116 dev_kfree_skb_irq(skb);
1117 goto next_desc;
1118 }
1119
1120 length = le16_to_cpu(rx_desc->wb.middle.length0);
1121
1122 if (!length) {
3bb99fe2
BA		 1123 e_dbg("Last part of the packet spanning multiple "
1124 "descriptors\n");
bc7f75fa
AK		 1125 dev_kfree_skb_irq(skb);
1126 goto next_desc;
1127 }
1128
1129 /* Good Receive */
1130 skb_put(skb, length);
1131
1132 {
ad68076e
BA		 1133 /*
1134 * this looks ugly, but it seems compiler issues make it
1135 * more efficient than reusing j
1136 */
bc7f75fa
AK		 1137 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1138
ad68076e
BA		 1139 /*
1140 * page alloc/put takes too long and effects small packet
1141 * throughput, so unsplit small packets and save the alloc/put
1142 * only valid in softirq (napi) context to call kmap_*
1143 */
bc7f75fa
AK		 1144 if (l1 && (l1 <= copybreak) &&
1145 ((length + l1) <= adapter->rx_ps_bsize0)) {
1146 u8 *vaddr;
1147
47f44e40 1148 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1149
ad68076e
BA		 1150 /*
1151 * there is no documentation about how to call
bc7f75fa 1152 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1153 * very long
1154 */
0be3f55f
NN		 1155 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1156 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1157 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1158 memcpy(skb_tail_pointer(skb), vaddr, l1);
1159 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1160 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1161 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1162
eb7c3adb
JK		 1163 /* remove the CRC */
1164 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1165 l1 -= 4;
1166
bc7f75fa
AK		 1167 skb_put(skb, l1);
1168 goto copydone;
1169 } /* if */
1170 }
1171
1172 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1173 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1174 if (!length)
1175 break;
1176
47f44e40 1177 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1178 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1179 DMA_FROM_DEVICE);
bc7f75fa
AK		 1180 ps_page->dma = 0;
1181 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1182 ps_page->page = NULL;
1183 skb->len += length;
1184 skb->data_len += length;
1185 skb->truesize += length;
1186 }
1187
eb7c3adb
JK		 1188 /* strip the ethernet crc, problem is we're using pages now so
1189 * this whole operation can get a little cpu intensive
1190 */
1191 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1192 pskb_trim(skb, skb->len - 4);
1193
bc7f75fa
AK		 1194copydone:
1195 total_rx_bytes += skb->len;
1196 total_rx_packets++;
1197
1198 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1199 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1200
1201 if (rx_desc->wb.upper.header_status &
1202 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1203 adapter->rx_hdr_split++;
1204
1205 e1000_receive_skb(adapter, netdev, skb,
1206 staterr, rx_desc->wb.middle.vlan);
1207
1208next_desc:
1209 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1210 buffer_info->skb = NULL;
1211
1212 /* return some buffers to hardware, one at a time is too slow */
1213 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1214 adapter->alloc_rx_buf(adapter, cleaned_count);
1215 cleaned_count = 0;
1216 }
1217
1218 /* use prefetched values */
1219 rx_desc = next_rxd;
1220 buffer_info = next_buffer;
1221
1222 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1223 }
1224 rx_ring->next_to_clean = i;
1225
1226 cleaned_count = e1000_desc_unused(rx_ring);
1227 if (cleaned_count)
1228 adapter->alloc_rx_buf(adapter, cleaned_count);
1229
bc7f75fa 1230 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1231 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1232 netdev->stats.rx_bytes += total_rx_bytes;
1233 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 1234 return cleaned;
1235}
1236
97ac8cae
BA		 1237/**
1238 * e1000_consume_page - helper function
1239 **/
1240static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1241 u16 length)
1242{
1243 bi->page = NULL;
1244 skb->len += length;
1245 skb->data_len += length;
1246 skb->truesize += length;
1247}
1248
1249/**
1250 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1251 * @adapter: board private structure
1252 *
1253 * the return value indicates whether actual cleaning was done, there
1254 * is no guarantee that everything was cleaned
1255 **/
1256
1257static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1258 int *work_done, int work_to_do)
1259{
1260 struct net_device *netdev = adapter->netdev;
1261 struct pci_dev *pdev = adapter->pdev;
1262 struct e1000_ring *rx_ring = adapter->rx_ring;
1263 struct e1000_rx_desc *rx_desc, *next_rxd;
1264 struct e1000_buffer *buffer_info, *next_buffer;
1265 u32 length;
1266 unsigned int i;
1267 int cleaned_count = 0;
1268 bool cleaned = false;
1269 unsigned int total_rx_bytes=0, total_rx_packets=0;
1270
1271 i = rx_ring->next_to_clean;
1272 rx_desc = E1000_RX_DESC(*rx_ring, i);
1273 buffer_info = &rx_ring->buffer_info[i];
1274
1275 while (rx_desc->status & E1000_RXD_STAT_DD) {
1276 struct sk_buff *skb;
1277 u8 status;
1278
1279 if (*work_done >= work_to_do)
1280 break;
1281 (*work_done)++;
1282
1283 status = rx_desc->status;
1284 skb = buffer_info->skb;
1285 buffer_info->skb = NULL;
1286
1287 ++i;
1288 if (i == rx_ring->count)
1289 i = 0;
1290 next_rxd = E1000_RX_DESC(*rx_ring, i);
1291 prefetch(next_rxd);
1292
1293 next_buffer = &rx_ring->buffer_info[i];
1294
1295 cleaned = true;
1296 cleaned_count++;
0be3f55f
NN		 1297 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1298 DMA_FROM_DEVICE);
97ac8cae
BA		 1299 buffer_info->dma = 0;
1300
1301 length = le16_to_cpu(rx_desc->length);
1302
1303 /* errors is only valid for DD + EOP descriptors */
1304 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1305 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1306 /* recycle both page and skb */
1307 buffer_info->skb = skb;
1308 /* an error means any chain goes out the window
1309 * too */
1310 if (rx_ring->rx_skb_top)
1311 dev_kfree_skb(rx_ring->rx_skb_top);
1312 rx_ring->rx_skb_top = NULL;
1313 goto next_desc;
1314 }
1315
1316#define rxtop rx_ring->rx_skb_top
1317 if (!(status & E1000_RXD_STAT_EOP)) {
1318 /* this descriptor is only the beginning (or middle) */
1319 if (!rxtop) {
1320 /* this is the beginning of a chain */
1321 rxtop = skb;
1322 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1323 0, length);
1324 } else {
1325 /* this is the middle of a chain */
1326 skb_fill_page_desc(rxtop,
1327 skb_shinfo(rxtop)->nr_frags,
1328 buffer_info->page, 0, length);
1329 /* re-use the skb, only consumed the page */
1330 buffer_info->skb = skb;
1331 }
1332 e1000_consume_page(buffer_info, rxtop, length);
1333 goto next_desc;
1334 } else {
1335 if (rxtop) {
1336 /* end of the chain */
1337 skb_fill_page_desc(rxtop,
1338 skb_shinfo(rxtop)->nr_frags,
1339 buffer_info->page, 0, length);
1340 /* re-use the current skb, we only consumed the
1341 * page */
1342 buffer_info->skb = skb;
1343 skb = rxtop;
1344 rxtop = NULL;
1345 e1000_consume_page(buffer_info, skb, length);
1346 } else {
1347 /* no chain, got EOP, this buf is the packet
1348 * copybreak to save the put_page/alloc_page */
1349 if (length <= copybreak &&
1350 skb_tailroom(skb) >= length) {
1351 u8 *vaddr;
1352 vaddr = kmap_atomic(buffer_info->page,
1353 KM_SKB_DATA_SOFTIRQ);
1354 memcpy(skb_tail_pointer(skb), vaddr,
1355 length);
1356 kunmap_atomic(vaddr,
1357 KM_SKB_DATA_SOFTIRQ);
1358 /* re-use the page, so don't erase
1359 * buffer_info->page */
1360 skb_put(skb, length);
1361 } else {
1362 skb_fill_page_desc(skb, 0,
1363 buffer_info->page, 0,
1364 length);
1365 e1000_consume_page(buffer_info, skb,
1366 length);
1367 }
1368 }
1369 }
1370
1371 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1372 e1000_rx_checksum(adapter,
1373 (u32)(status) |
1374 ((u32)(rx_desc->errors) << 24),
1375 le16_to_cpu(rx_desc->csum), skb);
1376
1377 /* probably a little skewed due to removing CRC */
1378 total_rx_bytes += skb->len;
1379 total_rx_packets++;
1380
1381 /* eth type trans needs skb->data to point to something */
1382 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1383 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1384 dev_kfree_skb(skb);
1385 goto next_desc;
1386 }
1387
1388 e1000_receive_skb(adapter, netdev, skb, status,
1389 rx_desc->special);
1390
1391next_desc:
1392 rx_desc->status = 0;
1393
1394 /* return some buffers to hardware, one at a time is too slow */
1395 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1396 adapter->alloc_rx_buf(adapter, cleaned_count);
1397 cleaned_count = 0;
1398 }
1399
1400 /* use prefetched values */
1401 rx_desc = next_rxd;
1402 buffer_info = next_buffer;
1403 }
1404 rx_ring->next_to_clean = i;
1405
1406 cleaned_count = e1000_desc_unused(rx_ring);
1407 if (cleaned_count)
1408 adapter->alloc_rx_buf(adapter, cleaned_count);
1409
1410 adapter->total_rx_bytes += total_rx_bytes;
1411 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1412 netdev->stats.rx_bytes += total_rx_bytes;
1413 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1414 return cleaned;
1415}
1416
bc7f75fa
AK		 1417/**
1418 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1419 * @adapter: board private structure
1420 **/
1421static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1422{
1423 struct e1000_ring *rx_ring = adapter->rx_ring;
1424 struct e1000_buffer *buffer_info;
1425 struct e1000_ps_page *ps_page;
1426 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1427 unsigned int i, j;
1428
1429 /* Free all the Rx ring sk_buffs */
1430 for (i = 0; i < rx_ring->count; i++) {
1431 buffer_info = &rx_ring->buffer_info[i];
1432 if (buffer_info->dma) {
1433 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1434 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1435 adapter->rx_buffer_len,
0be3f55f 1436 DMA_FROM_DEVICE);
97ac8cae 1437 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1438 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1439 PAGE_SIZE,
0be3f55f 1440 DMA_FROM_DEVICE);
bc7f75fa 1441 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1442 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1443 adapter->rx_ps_bsize0,
0be3f55f 1444 DMA_FROM_DEVICE);
bc7f75fa
AK		 1445 buffer_info->dma = 0;
1446 }
1447
97ac8cae
BA		 1448 if (buffer_info->page) {
1449 put_page(buffer_info->page);
1450 buffer_info->page = NULL;
1451 }
1452
bc7f75fa
AK		 1453 if (buffer_info->skb) {
1454 dev_kfree_skb(buffer_info->skb);
1455 buffer_info->skb = NULL;
1456 }
1457
1458 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1459 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1460 if (!ps_page->page)
1461 break;
0be3f55f
NN		 1462 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1463 DMA_FROM_DEVICE);
bc7f75fa
AK		 1464 ps_page->dma = 0;
1465 put_page(ps_page->page);
1466 ps_page->page = NULL;
1467 }
1468 }
1469
1470 /* there also may be some cached data from a chained receive */
1471 if (rx_ring->rx_skb_top) {
1472 dev_kfree_skb(rx_ring->rx_skb_top);
1473 rx_ring->rx_skb_top = NULL;
1474 }
1475
bc7f75fa
AK		 1476 /* Zero out the descriptor ring */
1477 memset(rx_ring->desc, 0, rx_ring->size);
1478
1479 rx_ring->next_to_clean = 0;
1480 rx_ring->next_to_use = 0;
b94b5028 1481 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1482
1483 writel(0, adapter->hw.hw_addr + rx_ring->head);
1484 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1485}
1486
a8f88ff5
JB		 1487static void e1000e_downshift_workaround(struct work_struct *work)
1488{
1489 struct e1000_adapter *adapter = container_of(work,
1490 struct e1000_adapter, downshift_task);
1491
1492 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1493}
1494
bc7f75fa
AK		 1495/**
1496 * e1000_intr_msi - Interrupt Handler
1497 * @irq: interrupt number
1498 * @data: pointer to a network interface device structure
1499 **/
1500static irqreturn_t e1000_intr_msi(int irq, void *data)
1501{
1502 struct net_device *netdev = data;
1503 struct e1000_adapter *adapter = netdev_priv(netdev);
1504 struct e1000_hw *hw = &adapter->hw;
1505 u32 icr = er32(ICR);
1506
ad68076e
BA		 1507 /*
1508 * read ICR disables interrupts using IAM
1509 */
bc7f75fa 1510
573cca8c 1511 if (icr & E1000_ICR_LSC) {
bc7f75fa 1512 hw->mac.get_link_status = 1;
ad68076e
BA		 1513 /*
1514 * ICH8 workaround-- Call gig speed drop workaround on cable
1515 * disconnect (LSC) before accessing any PHY registers
1516 */
bc7f75fa
AK		 1517 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1518 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1519 schedule_work(&adapter->downshift_task);
bc7f75fa 1520
ad68076e
BA		 1521 /*
1522 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1523 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1524 * adapter in watchdog
1525 */
bc7f75fa
AK		 1526 if (netif_carrier_ok(netdev) &&
1527 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1528 /* disable receives */
1529 u32 rctl = er32(RCTL);
1530 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1531 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1532 }
1533 /* guard against interrupt when we're going down */
1534 if (!test_bit(__E1000_DOWN, &adapter->state))
1535 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1536 }
1537
288379f0 1538 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1539 adapter->total_tx_bytes = 0;
1540 adapter->total_tx_packets = 0;
1541 adapter->total_rx_bytes = 0;
1542 adapter->total_rx_packets = 0;
288379f0 1543 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1544 }
1545
1546 return IRQ_HANDLED;
1547}
1548
1549/**
1550 * e1000_intr - Interrupt Handler
1551 * @irq: interrupt number
1552 * @data: pointer to a network interface device structure
1553 **/
1554static irqreturn_t e1000_intr(int irq, void *data)
1555{
1556 struct net_device *netdev = data;
1557 struct e1000_adapter *adapter = netdev_priv(netdev);
1558 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1559 u32 rctl, icr = er32(ICR);
4662e82b 1560
a68ea775 1561 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1562 return IRQ_NONE; /* Not our interrupt */
1563
ad68076e
BA		 1564 /*
1565 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1566 * not set, then the adapter didn't send an interrupt
1567 */
bc7f75fa
AK		 1568 if (!(icr & E1000_ICR_INT_ASSERTED))
1569 return IRQ_NONE;
1570
ad68076e
BA		 1571 /*
1572 * Interrupt Auto-Mask...upon reading ICR,
1573 * interrupts are masked. No need for the
1574 * IMC write
1575 */
bc7f75fa 1576
573cca8c 1577 if (icr & E1000_ICR_LSC) {
bc7f75fa 1578 hw->mac.get_link_status = 1;
ad68076e
BA		 1579 /*
1580 * ICH8 workaround-- Call gig speed drop workaround on cable
1581 * disconnect (LSC) before accessing any PHY registers
1582 */
bc7f75fa
AK		 1583 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1584 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1585 schedule_work(&adapter->downshift_task);
bc7f75fa 1586
ad68076e
BA		 1587 /*
1588 * 80003ES2LAN workaround--
bc7f75fa
AK		 1589 * For packet buffer work-around on link down event;
1590 * disable receives here in the ISR and
1591 * reset adapter in watchdog
1592 */
1593 if (netif_carrier_ok(netdev) &&
1594 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1595 /* disable receives */
1596 rctl = er32(RCTL);
1597 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1598 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1599 }
1600 /* guard against interrupt when we're going down */
1601 if (!test_bit(__E1000_DOWN, &adapter->state))
1602 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1603 }
1604
288379f0 1605 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1606 adapter->total_tx_bytes = 0;
1607 adapter->total_tx_packets = 0;
1608 adapter->total_rx_bytes = 0;
1609 adapter->total_rx_packets = 0;
288379f0 1610 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1611 }
1612
1613 return IRQ_HANDLED;
1614}
1615
4662e82b
BA		 1616static irqreturn_t e1000_msix_other(int irq, void *data)
1617{
1618 struct net_device *netdev = data;
1619 struct e1000_adapter *adapter = netdev_priv(netdev);
1620 struct e1000_hw *hw = &adapter->hw;
1621 u32 icr = er32(ICR);
1622
1623 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1624 if (!test_bit(__E1000_DOWN, &adapter->state))
1625 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1626 return IRQ_NONE;
1627 }
1628
1629 if (icr & adapter->eiac_mask)
1630 ew32(ICS, (icr & adapter->eiac_mask));
1631
1632 if (icr & E1000_ICR_OTHER) {
1633 if (!(icr & E1000_ICR_LSC))
1634 goto no_link_interrupt;
1635 hw->mac.get_link_status = 1;
1636 /* guard against interrupt when we're going down */
1637 if (!test_bit(__E1000_DOWN, &adapter->state))
1638 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1639 }
1640
1641no_link_interrupt:
a3c69fef
JB		 1642 if (!test_bit(__E1000_DOWN, &adapter->state))
1643 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1644
1645 return IRQ_HANDLED;
1646}
1647
1648
1649static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1650{
1651 struct net_device *netdev = data;
1652 struct e1000_adapter *adapter = netdev_priv(netdev);
1653 struct e1000_hw *hw = &adapter->hw;
1654 struct e1000_ring *tx_ring = adapter->tx_ring;
1655
1656
1657 adapter->total_tx_bytes = 0;
1658 adapter->total_tx_packets = 0;
1659
1660 if (!e1000_clean_tx_irq(adapter))
1661 /* Ring was not completely cleaned, so fire another interrupt */
1662 ew32(ICS, tx_ring->ims_val);
1663
1664 return IRQ_HANDLED;
1665}
1666
1667static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1668{
1669 struct net_device *netdev = data;
1670 struct e1000_adapter *adapter = netdev_priv(netdev);
1671
1672 /* Write the ITR value calculated at the end of the
1673 * previous interrupt.
1674 */
1675 if (adapter->rx_ring->set_itr) {
1676 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1677 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1678 adapter->rx_ring->set_itr = 0;
1679 }
1680
288379f0 1681 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1682 adapter->total_rx_bytes = 0;
1683 adapter->total_rx_packets = 0;
288379f0 1684 __napi_schedule(&adapter->napi);
4662e82b
BA		 1685 }
1686 return IRQ_HANDLED;
1687}
1688
1689/**
1690 * e1000_configure_msix - Configure MSI-X hardware
1691 *
1692 * e1000_configure_msix sets up the hardware to properly
1693 * generate MSI-X interrupts.
1694 **/
1695static void e1000_configure_msix(struct e1000_adapter *adapter)
1696{
1697 struct e1000_hw *hw = &adapter->hw;
1698 struct e1000_ring *rx_ring = adapter->rx_ring;
1699 struct e1000_ring *tx_ring = adapter->tx_ring;
1700 int vector = 0;
1701 u32 ctrl_ext, ivar = 0;
1702
1703 adapter->eiac_mask = 0;
1704
1705 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1706 if (hw->mac.type == e1000_82574) {
1707 u32 rfctl = er32(RFCTL);
1708 rfctl |= E1000_RFCTL_ACK_DIS;
1709 ew32(RFCTL, rfctl);
1710 }
1711
1712#define E1000_IVAR_INT_ALLOC_VALID 0x8
1713 /* Configure Rx vector */
1714 rx_ring->ims_val = E1000_IMS_RXQ0;
1715 adapter->eiac_mask |= rx_ring->ims_val;
1716 if (rx_ring->itr_val)
1717 writel(1000000000 / (rx_ring->itr_val * 256),
1718 hw->hw_addr + rx_ring->itr_register);
1719 else
1720 writel(1, hw->hw_addr + rx_ring->itr_register);
1721 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1722
1723 /* Configure Tx vector */
1724 tx_ring->ims_val = E1000_IMS_TXQ0;
1725 vector++;
1726 if (tx_ring->itr_val)
1727 writel(1000000000 / (tx_ring->itr_val * 256),
1728 hw->hw_addr + tx_ring->itr_register);
1729 else
1730 writel(1, hw->hw_addr + tx_ring->itr_register);
1731 adapter->eiac_mask |= tx_ring->ims_val;
1732 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1733
1734 /* set vector for Other Causes, e.g. link changes */
1735 vector++;
1736 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1737 if (rx_ring->itr_val)
1738 writel(1000000000 / (rx_ring->itr_val * 256),
1739 hw->hw_addr + E1000_EITR_82574(vector));
1740 else
1741 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1742
1743 /* Cause Tx interrupts on every write back */
1744 ivar |= (1 << 31);
1745
1746 ew32(IVAR, ivar);
1747
1748 /* enable MSI-X PBA support */
1749 ctrl_ext = er32(CTRL_EXT);
1750 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1751
1752 /* Auto-Mask Other interrupts upon ICR read */
1753#define E1000_EIAC_MASK_82574 0x01F00000
1754 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1755 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1756 ew32(CTRL_EXT, ctrl_ext);
1757 e1e_flush();
1758}
1759
1760void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1761{
1762 if (adapter->msix_entries) {
1763 pci_disable_msix(adapter->pdev);
1764 kfree(adapter->msix_entries);
1765 adapter->msix_entries = NULL;
1766 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1767 pci_disable_msi(adapter->pdev);
1768 adapter->flags &= ~FLAG_MSI_ENABLED;
1769 }
4662e82b
BA		 1770}
1771
1772/**
1773 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1774 *
1775 * Attempt to configure interrupts using the best available
1776 * capabilities of the hardware and kernel.
1777 **/
1778void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1779{
1780 int err;
1781 int numvecs, i;
1782
1783
1784 switch (adapter->int_mode) {
1785 case E1000E_INT_MODE_MSIX:
1786 if (adapter->flags & FLAG_HAS_MSIX) {
1787 numvecs = 3; /* RxQ0, TxQ0 and other */
1788 adapter->msix_entries = kcalloc(numvecs,
1789 sizeof(struct msix_entry),
1790 GFP_KERNEL);
1791 if (adapter->msix_entries) {
1792 for (i = 0; i < numvecs; i++)
1793 adapter->msix_entries[i].entry = i;
1794
1795 err = pci_enable_msix(adapter->pdev,
1796 adapter->msix_entries,
1797 numvecs);
1798 if (err == 0)
1799 return;
1800 }
1801 /* MSI-X failed, so fall through and try MSI */
1802 e_err("Failed to initialize MSI-X interrupts. "
1803 "Falling back to MSI interrupts.\n");
1804 e1000e_reset_interrupt_capability(adapter);
1805 }
1806 adapter->int_mode = E1000E_INT_MODE_MSI;
1807 /* Fall through */
1808 case E1000E_INT_MODE_MSI:
1809 if (!pci_enable_msi(adapter->pdev)) {
1810 adapter->flags |= FLAG_MSI_ENABLED;
1811 } else {
1812 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1813 e_err("Failed to initialize MSI interrupts. Falling "
1814 "back to legacy interrupts.\n");
1815 }
1816 /* Fall through */
1817 case E1000E_INT_MODE_LEGACY:
1818 /* Don't do anything; this is the system default */
1819 break;
1820 }
4662e82b
BA		 1821}
1822
1823/**
1824 * e1000_request_msix - Initialize MSI-X interrupts
1825 *
1826 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1827 * kernel.
1828 **/
1829static int e1000_request_msix(struct e1000_adapter *adapter)
1830{
1831 struct net_device *netdev = adapter->netdev;
1832 int err = 0, vector = 0;
1833
1834 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1835 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1836 else
1837 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1838 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1839 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1840 netdev);
1841 if (err)
1842 goto out;
1843 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1844 adapter->rx_ring->itr_val = adapter->itr;
1845 vector++;
1846
1847 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1848 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1849 else
1850 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1851 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1852 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1853 netdev);
1854 if (err)
1855 goto out;
1856 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1857 adapter->tx_ring->itr_val = adapter->itr;
1858 vector++;
1859
1860 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1861 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1862 if (err)
1863 goto out;
1864
1865 e1000_configure_msix(adapter);
1866 return 0;
1867out:
1868 return err;
1869}
1870
f8d59f78
BA		 1871/**
1872 * e1000_request_irq - initialize interrupts
1873 *
1874 * Attempts to configure interrupts using the best available
1875 * capabilities of the hardware and kernel.
1876 **/
bc7f75fa
AK		 1877static int e1000_request_irq(struct e1000_adapter *adapter)
1878{
1879 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1880 int err;
1881
4662e82b
BA		 1882 if (adapter->msix_entries) {
1883 err = e1000_request_msix(adapter);
1884 if (!err)
1885 return err;
1886 /* fall back to MSI */
1887 e1000e_reset_interrupt_capability(adapter);
1888 adapter->int_mode = E1000E_INT_MODE_MSI;
1889 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1890 }
4662e82b 1891 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1892 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1893 netdev->name, netdev);
1894 if (!err)
1895 return err;
bc7f75fa 1896
4662e82b
BA		 1897 /* fall back to legacy interrupt */
1898 e1000e_reset_interrupt_capability(adapter);
1899 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1900 }
1901
a0607fd3 1902 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1903 netdev->name, netdev);
1904 if (err)
1905 e_err("Unable to allocate interrupt, Error: %d\n", err);
1906
bc7f75fa
AK		 1907 return err;
1908}
1909
1910static void e1000_free_irq(struct e1000_adapter *adapter)
1911{
1912 struct net_device *netdev = adapter->netdev;
1913
4662e82b
BA		 1914 if (adapter->msix_entries) {
1915 int vector = 0;
1916
1917 free_irq(adapter->msix_entries[vector].vector, netdev);
1918 vector++;
1919
1920 free_irq(adapter->msix_entries[vector].vector, netdev);
1921 vector++;
1922
1923 /* Other Causes interrupt vector */
1924 free_irq(adapter->msix_entries[vector].vector, netdev);
1925 return;
bc7f75fa 1926 }
4662e82b
BA		 1927
1928 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1929}
1930
1931/**
1932 * e1000_irq_disable - Mask off interrupt generation on the NIC
1933 **/
1934static void e1000_irq_disable(struct e1000_adapter *adapter)
1935{
1936 struct e1000_hw *hw = &adapter->hw;
1937
bc7f75fa 1938 ew32(IMC, ~0);
4662e82b
BA		 1939 if (adapter->msix_entries)
1940 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1941 e1e_flush();
1942 synchronize_irq(adapter->pdev->irq);
1943}
1944
1945/**
1946 * e1000_irq_enable - Enable default interrupt generation settings
1947 **/
1948static void e1000_irq_enable(struct e1000_adapter *adapter)
1949{
1950 struct e1000_hw *hw = &adapter->hw;
1951
4662e82b
BA		 1952 if (adapter->msix_entries) {
1953 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1954 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1955 } else {
1956 ew32(IMS, IMS_ENABLE_MASK);
1957 }
74ef9c39 1958 e1e_flush();
bc7f75fa
AK		 1959}
1960
1961/**
1962 * e1000_get_hw_control - get control of the h/w from f/w
1963 * @adapter: address of board private structure
1964 *
489815ce 1965 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1966 * For ASF and Pass Through versions of f/w this means that
1967 * the driver is loaded. For AMT version (only with 82573)
1968 * of the f/w this means that the network i/f is open.
1969 **/
1970static void e1000_get_hw_control(struct e1000_adapter *adapter)
1971{
1972 struct e1000_hw *hw = &adapter->hw;
1973 u32 ctrl_ext;
1974 u32 swsm;
1975
1976 /* Let firmware know the driver has taken over */
1977 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1978 swsm = er32(SWSM);
1979 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1980 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1981 ctrl_ext = er32(CTRL_EXT);
ad68076e 1982 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1983 }
1984}
1985
1986/**
1987 * e1000_release_hw_control - release control of the h/w to f/w
1988 * @adapter: address of board private structure
1989 *
489815ce 1990 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1991 * For ASF and Pass Through versions of f/w this means that the
1992 * driver is no longer loaded. For AMT version (only with 82573) i
1993 * of the f/w this means that the network i/f is closed.
1994 *
1995 **/
1996static void e1000_release_hw_control(struct e1000_adapter *adapter)
1997{
1998 struct e1000_hw *hw = &adapter->hw;
1999 u32 ctrl_ext;
2000 u32 swsm;
2001
2002 /* Let firmware taken over control of h/w */
2003 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2004 swsm = er32(SWSM);
2005 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2006 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2007 ctrl_ext = er32(CTRL_EXT);
ad68076e 2008 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2009 }
2010}
2011
bc7f75fa
AK		 2012/**
2013 * @e1000_alloc_ring - allocate memory for a ring structure
2014 **/
2015static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2016 struct e1000_ring *ring)
2017{
2018 struct pci_dev *pdev = adapter->pdev;
2019
2020 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2021 GFP_KERNEL);
2022 if (!ring->desc)
2023 return -ENOMEM;
2024
2025 return 0;
2026}
2027
2028/**
2029 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2030 * @adapter: board private structure
2031 *
2032 * Return 0 on success, negative on failure
2033 **/
2034int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2035{
2036 struct e1000_ring *tx_ring = adapter->tx_ring;
2037 int err = -ENOMEM, size;
2038
2039 size = sizeof(struct e1000_buffer) * tx_ring->count;
2040 tx_ring->buffer_info = vmalloc(size);
2041 if (!tx_ring->buffer_info)
2042 goto err;
2043 memset(tx_ring->buffer_info, 0, size);
2044
2045 /* round up to nearest 4K */
2046 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2047 tx_ring->size = ALIGN(tx_ring->size, 4096);
2048
2049 err = e1000_alloc_ring_dma(adapter, tx_ring);
2050 if (err)
2051 goto err;
2052
2053 tx_ring->next_to_use = 0;
2054 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2055
2056 return 0;
2057err:
2058 vfree(tx_ring->buffer_info);
44defeb3 2059 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2060 return err;
2061}
2062
2063/**
2064 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2065 * @adapter: board private structure
2066 *
2067 * Returns 0 on success, negative on failure
2068 **/
2069int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2070{
2071 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2072 struct e1000_buffer *buffer_info;
2073 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2074
2075 size = sizeof(struct e1000_buffer) * rx_ring->count;
2076 rx_ring->buffer_info = vmalloc(size);
2077 if (!rx_ring->buffer_info)
2078 goto err;
2079 memset(rx_ring->buffer_info, 0, size);
2080
47f44e40
AK		 2081 for (i = 0; i < rx_ring->count; i++) {
2082 buffer_info = &rx_ring->buffer_info[i];
2083 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2084 sizeof(struct e1000_ps_page),
2085 GFP_KERNEL);
2086 if (!buffer_info->ps_pages)
2087 goto err_pages;
2088 }
bc7f75fa
AK		 2089
2090 desc_len = sizeof(union e1000_rx_desc_packet_split);
2091
2092 /* Round up to nearest 4K */
2093 rx_ring->size = rx_ring->count * desc_len;
2094 rx_ring->size = ALIGN(rx_ring->size, 4096);
2095
2096 err = e1000_alloc_ring_dma(adapter, rx_ring);
2097 if (err)
47f44e40 2098 goto err_pages;
bc7f75fa
AK		 2099
2100 rx_ring->next_to_clean = 0;
2101 rx_ring->next_to_use = 0;
2102 rx_ring->rx_skb_top = NULL;
2103
2104 return 0;
47f44e40
AK		 2105
2106err_pages:
2107 for (i = 0; i < rx_ring->count; i++) {
2108 buffer_info = &rx_ring->buffer_info[i];
2109 kfree(buffer_info->ps_pages);
2110 }
bc7f75fa
AK		 2111err:
2112 vfree(rx_ring->buffer_info);
44defeb3 2113 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2114 return err;
2115}
2116
2117/**
2118 * e1000_clean_tx_ring - Free Tx Buffers
2119 * @adapter: board private structure
2120 **/
2121static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2122{
2123 struct e1000_ring *tx_ring = adapter->tx_ring;
2124 struct e1000_buffer *buffer_info;
2125 unsigned long size;
2126 unsigned int i;
2127
2128 for (i = 0; i < tx_ring->count; i++) {
2129 buffer_info = &tx_ring->buffer_info[i];
2130 e1000_put_txbuf(adapter, buffer_info);
2131 }
2132
2133 size = sizeof(struct e1000_buffer) * tx_ring->count;
2134 memset(tx_ring->buffer_info, 0, size);
2135
2136 memset(tx_ring->desc, 0, tx_ring->size);
2137
2138 tx_ring->next_to_use = 0;
2139 tx_ring->next_to_clean = 0;
2140
2141 writel(0, adapter->hw.hw_addr + tx_ring->head);
2142 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2143}
2144
2145/**
2146 * e1000e_free_tx_resources - Free Tx Resources per Queue
2147 * @adapter: board private structure
2148 *
2149 * Free all transmit software resources
2150 **/
2151void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2152{
2153 struct pci_dev *pdev = adapter->pdev;
2154 struct e1000_ring *tx_ring = adapter->tx_ring;
2155
2156 e1000_clean_tx_ring(adapter);
2157
2158 vfree(tx_ring->buffer_info);
2159 tx_ring->buffer_info = NULL;
2160
2161 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2162 tx_ring->dma);
2163 tx_ring->desc = NULL;
2164}
2165
2166/**
2167 * e1000e_free_rx_resources - Free Rx Resources
2168 * @adapter: board private structure
2169 *
2170 * Free all receive software resources
2171 **/
2172
2173void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2174{
2175 struct pci_dev *pdev = adapter->pdev;
2176 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2177 int i;
bc7f75fa
AK		 2178
2179 e1000_clean_rx_ring(adapter);
2180
47f44e40
AK		 2181 for (i = 0; i < rx_ring->count; i++) {
2182 kfree(rx_ring->buffer_info[i].ps_pages);
2183 }
2184
bc7f75fa
AK		 2185 vfree(rx_ring->buffer_info);
2186 rx_ring->buffer_info = NULL;
2187
bc7f75fa
AK		 2188 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2189 rx_ring->dma);
2190 rx_ring->desc = NULL;
2191}
2192
2193/**
2194 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2195 * @adapter: pointer to adapter
2196 * @itr_setting: current adapter->itr
2197 * @packets: the number of packets during this measurement interval
2198 * @bytes: the number of bytes during this measurement interval
2199 *
bc7f75fa
AK		 2200 * Stores a new ITR value based on packets and byte
2201 * counts during the last interrupt. The advantage of per interrupt
2202 * computation is faster updates and more accurate ITR for the current
2203 * traffic pattern. Constants in this function were computed
2204 * based on theoretical maximum wire speed and thresholds were set based
2205 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2206 * while increasing bulk throughput. This functionality is controlled
2207 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2208 **/
2209static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2210 u16 itr_setting, int packets,
2211 int bytes)
2212{
2213 unsigned int retval = itr_setting;
2214
2215 if (packets == 0)
2216 goto update_itr_done;
2217
2218 switch (itr_setting) {
2219 case lowest_latency:
2220 /* handle TSO and jumbo frames */
2221 if (bytes/packets > 8000)
2222 retval = bulk_latency;
2223 else if ((packets < 5) && (bytes > 512)) {
2224 retval = low_latency;
2225 }
2226 break;
2227 case low_latency: /* 50 usec aka 20000 ints/s */
2228 if (bytes > 10000) {
2229 /* this if handles the TSO accounting */
2230 if (bytes/packets > 8000) {
2231 retval = bulk_latency;
2232 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2233 retval = bulk_latency;
2234 } else if ((packets > 35)) {
2235 retval = lowest_latency;
2236 }
2237 } else if (bytes/packets > 2000) {
2238 retval = bulk_latency;
2239 } else if (packets <= 2 && bytes < 512) {
2240 retval = lowest_latency;
2241 }
2242 break;
2243 case bulk_latency: /* 250 usec aka 4000 ints/s */
2244 if (bytes > 25000) {
2245 if (packets > 35) {
2246 retval = low_latency;
2247 }
2248 } else if (bytes < 6000) {
2249 retval = low_latency;
2250 }
2251 break;
2252 }
2253
2254update_itr_done:
2255 return retval;
2256}
2257
2258static void e1000_set_itr(struct e1000_adapter *adapter)
2259{
2260 struct e1000_hw *hw = &adapter->hw;
2261 u16 current_itr;
2262 u32 new_itr = adapter->itr;
2263
2264 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2265 if (adapter->link_speed != SPEED_1000) {
2266 current_itr = 0;
2267 new_itr = 4000;
2268 goto set_itr_now;
2269 }
2270
2271 adapter->tx_itr = e1000_update_itr(adapter,
2272 adapter->tx_itr,
2273 adapter->total_tx_packets,
2274 adapter->total_tx_bytes);
2275 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2276 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2277 adapter->tx_itr = low_latency;
2278
2279 adapter->rx_itr = e1000_update_itr(adapter,
2280 adapter->rx_itr,
2281 adapter->total_rx_packets,
2282 adapter->total_rx_bytes);
2283 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2284 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2285 adapter->rx_itr = low_latency;
2286
2287 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2288
2289 switch (current_itr) {
2290 /* counts and packets in update_itr are dependent on these numbers */
2291 case lowest_latency:
2292 new_itr = 70000;
2293 break;
2294 case low_latency:
2295 new_itr = 20000; /* aka hwitr = ~200 */
2296 break;
2297 case bulk_latency:
2298 new_itr = 4000;
2299 break;
2300 default:
2301 break;
2302 }
2303
2304set_itr_now:
2305 if (new_itr != adapter->itr) {
ad68076e
BA		 2306 /*
2307 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2308 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2309 * increasing
2310 */
bc7f75fa
AK		 2311 new_itr = new_itr > adapter->itr ?
2312 min(adapter->itr + (new_itr >> 2), new_itr) :
2313 new_itr;
2314 adapter->itr = new_itr;
4662e82b
BA		 2315 adapter->rx_ring->itr_val = new_itr;
2316 if (adapter->msix_entries)
2317 adapter->rx_ring->set_itr = 1;
2318 else
2319 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 2320 }
2321}
2322
4662e82b
BA		 2323/**
2324 * e1000_alloc_queues - Allocate memory for all rings
2325 * @adapter: board private structure to initialize
2326 **/
2327static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2328{
2329 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2330 if (!adapter->tx_ring)
2331 goto err;
2332
2333 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2334 if (!adapter->rx_ring)
2335 goto err;
2336
2337 return 0;
2338err:
2339 e_err("Unable to allocate memory for queues\n");
2340 kfree(adapter->rx_ring);
2341 kfree(adapter->tx_ring);
2342 return -ENOMEM;
2343}
2344
bc7f75fa
AK		 2345/**
2346 * e1000_clean - NAPI Rx polling callback
ad68076e 2347 * @napi: struct associated with this polling callback
489815ce 2348 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2349 **/
2350static int e1000_clean(struct napi_struct *napi, int budget)
2351{
2352 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2353 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2354 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2355 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2356
4cf1653a 2357 adapter = netdev_priv(poll_dev);
bc7f75fa 2358
4662e82b
BA		 2359 if (adapter->msix_entries &&
2360 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2361 goto clean_rx;
2362
92af3e95 2363 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2364
4662e82b 2365clean_rx:
bc7f75fa 2366 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2367
12d04a3c 2368 if (!tx_cleaned)
d2c7ddd6 2369 work_done = budget;
bc7f75fa 2370
53e52c72
DM		 2371 /* If budget not fully consumed, exit the polling mode */
2372 if (work_done < budget) {
bc7f75fa
AK		 2373 if (adapter->itr_setting & 3)
2374 e1000_set_itr(adapter);
288379f0 2375 napi_complete(napi);
a3c69fef
JB		 2376 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2377 if (adapter->msix_entries)
2378 ew32(IMS, adapter->rx_ring->ims_val);
2379 else
2380 e1000_irq_enable(adapter);
2381 }
bc7f75fa
AK		 2382 }
2383
2384 return work_done;
2385}
2386
2387static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2388{
2389 struct e1000_adapter *adapter = netdev_priv(netdev);
2390 struct e1000_hw *hw = &adapter->hw;
2391 u32 vfta, index;
2392
2393 /* don't update vlan cookie if already programmed */
2394 if ((adapter->hw.mng_cookie.status &
2395 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2396 (vid == adapter->mng_vlan_id))
2397 return;
caaddaf8 2398
bc7f75fa 2399 /* add VID to filter table */
caaddaf8
BA		 2400 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2401 index = (vid >> 5) & 0x7F;
2402 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2403 vfta |= (1 << (vid & 0x1F));
2404 hw->mac.ops.write_vfta(hw, index, vfta);
2405 }
bc7f75fa
AK		 2406}
2407
2408static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2409{
2410 struct e1000_adapter *adapter = netdev_priv(netdev);
2411 struct e1000_hw *hw = &adapter->hw;
2412 u32 vfta, index;
2413
74ef9c39
JB		 2414 if (!test_bit(__E1000_DOWN, &adapter->state))
2415 e1000_irq_disable(adapter);
bc7f75fa 2416 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2417
2418 if (!test_bit(__E1000_DOWN, &adapter->state))
2419 e1000_irq_enable(adapter);
bc7f75fa
AK		 2420
2421 if ((adapter->hw.mng_cookie.status &
2422 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2423 (vid == adapter->mng_vlan_id)) {
2424 /* release control to f/w */
2425 e1000_release_hw_control(adapter);
2426 return;
2427 }
2428
2429 /* remove VID from filter table */
caaddaf8
BA		 2430 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2431 index = (vid >> 5) & 0x7F;
2432 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2433 vfta &= ~(1 << (vid & 0x1F));
2434 hw->mac.ops.write_vfta(hw, index, vfta);
2435 }
bc7f75fa
AK		 2436}
2437
2438static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2439{
2440 struct net_device *netdev = adapter->netdev;
2441 u16 vid = adapter->hw.mng_cookie.vlan_id;
2442 u16 old_vid = adapter->mng_vlan_id;
2443
2444 if (!adapter->vlgrp)
2445 return;
2446
2447 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2448 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2449 if (adapter->hw.mng_cookie.status &
2450 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2451 e1000_vlan_rx_add_vid(netdev, vid);
2452 adapter->mng_vlan_id = vid;
2453 }
2454
2455 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2456 (vid != old_vid) &&
2457 !vlan_group_get_device(adapter->vlgrp, old_vid))
2458 e1000_vlan_rx_kill_vid(netdev, old_vid);
2459 } else {
2460 adapter->mng_vlan_id = vid;
2461 }
2462}
2463
2464
2465static void e1000_vlan_rx_register(struct net_device *netdev,
2466 struct vlan_group *grp)
2467{
2468 struct e1000_adapter *adapter = netdev_priv(netdev);
2469 struct e1000_hw *hw = &adapter->hw;
2470 u32 ctrl, rctl;
2471
74ef9c39
JB		 2472 if (!test_bit(__E1000_DOWN, &adapter->state))
2473 e1000_irq_disable(adapter);
bc7f75fa
AK		 2474 adapter->vlgrp = grp;
2475
2476 if (grp) {
2477 /* enable VLAN tag insert/strip */
2478 ctrl = er32(CTRL);
2479 ctrl |= E1000_CTRL_VME;
2480 ew32(CTRL, ctrl);
2481
2482 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2483 /* enable VLAN receive filtering */
2484 rctl = er32(RCTL);
bc7f75fa
AK		 2485 rctl &= ~E1000_RCTL_CFIEN;
2486 ew32(RCTL, rctl);
2487 e1000_update_mng_vlan(adapter);
2488 }
2489 } else {
2490 /* disable VLAN tag insert/strip */
2491 ctrl = er32(CTRL);
2492 ctrl &= ~E1000_CTRL_VME;
2493 ew32(CTRL, ctrl);
2494
2495 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2496 if (adapter->mng_vlan_id !=
2497 (u16)E1000_MNG_VLAN_NONE) {
2498 e1000_vlan_rx_kill_vid(netdev,
2499 adapter->mng_vlan_id);
2500 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2501 }
2502 }
2503 }
2504
74ef9c39
JB		 2505 if (!test_bit(__E1000_DOWN, &adapter->state))
2506 e1000_irq_enable(adapter);
bc7f75fa
AK		 2507}
2508
2509static void e1000_restore_vlan(struct e1000_adapter *adapter)
2510{
2511 u16 vid;
2512
2513 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2514
2515 if (!adapter->vlgrp)
2516 return;
2517
2518 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2519 if (!vlan_group_get_device(adapter->vlgrp, vid))
2520 continue;
2521 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2522 }
2523}
2524
cd791618 2525static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2526{
2527 struct e1000_hw *hw = &adapter->hw;
cd791618 2528 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2529
2530 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2531 return;
2532
2533 manc = er32(MANC);
2534
ad68076e
BA		 2535 /*
2536 * enable receiving management packets to the host. this will probably
bc7f75fa 2537 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2538 * the packets will be handled on SMBUS
2539 */
bc7f75fa
AK		 2540 manc |= E1000_MANC_EN_MNG2HOST;
2541 manc2h = er32(MANC2H);
cd791618
BA		 2542
2543 switch (hw->mac.type) {
2544 default:
2545 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2546 break;
2547 case e1000_82574:
2548 case e1000_82583:
2549 /*
2550 * Check if IPMI pass-through decision filter already exists;
2551 * if so, enable it.
2552 */
2553 for (i = 0, j = 0; i < 8; i++) {
2554 mdef = er32(MDEF(i));
2555
2556 /* Ignore filters with anything other than IPMI ports */
3b21b508 2557 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2558 continue;
2559
2560 /* Enable this decision filter in MANC2H */
2561 if (mdef)
2562 manc2h |= (1 << i);
2563
2564 j |= mdef;
2565 }
2566
2567 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2568 break;
2569
2570 /* Create new decision filter in an empty filter */
2571 for (i = 0, j = 0; i < 8; i++)
2572 if (er32(MDEF(i)) == 0) {
2573 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2574 E1000_MDEF_PORT_664));
2575 manc2h |= (1 << 1);
2576 j++;
2577 break;
2578 }
2579
2580 if (!j)
2581 e_warn("Unable to create IPMI pass-through filter\n");
2582 break;
2583 }
2584
bc7f75fa
AK		 2585 ew32(MANC2H, manc2h);
2586 ew32(MANC, manc);
2587}
2588
2589/**
2590 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2591 * @adapter: board private structure
2592 *
2593 * Configure the Tx unit of the MAC after a reset.
2594 **/
2595static void e1000_configure_tx(struct e1000_adapter *adapter)
2596{
2597 struct e1000_hw *hw = &adapter->hw;
2598 struct e1000_ring *tx_ring = adapter->tx_ring;
2599 u64 tdba;
2600 u32 tdlen, tctl, tipg, tarc;
2601 u32 ipgr1, ipgr2;
2602
2603 /* Setup the HW Tx Head and Tail descriptor pointers */
2604 tdba = tx_ring->dma;
2605 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2606 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2607 ew32(TDBAH, (tdba >> 32));
2608 ew32(TDLEN, tdlen);
2609 ew32(TDH, 0);
2610 ew32(TDT, 0);
2611 tx_ring->head = E1000_TDH;
2612 tx_ring->tail = E1000_TDT;
2613
2614 /* Set the default values for the Tx Inter Packet Gap timer */
2615 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2616 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2617 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2618
2619 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2620 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2621
2622 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2623 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2624 ew32(TIPG, tipg);
2625
2626 /* Set the Tx Interrupt Delay register */
2627 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2628 /* Tx irq moderation */
bc7f75fa
AK		 2629 ew32(TADV, adapter->tx_abs_int_delay);
2630
2631 /* Program the Transmit Control Register */
2632 tctl = er32(TCTL);
2633 tctl &= ~E1000_TCTL_CT;
2634 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2635 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2636
2637 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2638 tarc = er32(TARC(0));
ad68076e
BA		 2639 /*
2640 * set the speed mode bit, we'll clear it if we're not at
2641 * gigabit link later
2642 */
bc7f75fa
AK		 2643#define SPEED_MODE_BIT (1 << 21)
2644 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2645 ew32(TARC(0), tarc);
bc7f75fa
AK		 2646 }
2647
2648 /* errata: program both queues to unweighted RR */
2649 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2650 tarc = er32(TARC(0));
bc7f75fa 2651 tarc |= 1;
e9ec2c0f
JK		 2652 ew32(TARC(0), tarc);
2653 tarc = er32(TARC(1));
bc7f75fa 2654 tarc |= 1;
e9ec2c0f 2655 ew32(TARC(1), tarc);
bc7f75fa
AK		 2656 }
2657
bc7f75fa
AK		 2658 /* Setup Transmit Descriptor Settings for eop descriptor */
2659 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2660
2661 /* only set IDE if we are delaying interrupts using the timers */
2662 if (adapter->tx_int_delay)
2663 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2664
2665 /* enable Report Status bit */
2666 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2667
2668 ew32(TCTL, tctl);
2669
edfea6e6 2670 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2671}
2672
2673/**
2674 * e1000_setup_rctl - configure the receive control registers
2675 * @adapter: Board private structure
2676 **/
2677#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2678 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2679static void e1000_setup_rctl(struct e1000_adapter *adapter)
2680{
2681 struct e1000_hw *hw = &adapter->hw;
2682 u32 rctl, rfctl;
2683 u32 psrctl = 0;
2684 u32 pages = 0;
2685
2686 /* Program MC offset vector base */
2687 rctl = er32(RCTL);
2688 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2689 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2690 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2691 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2692
2693 /* Do not Store bad packets */
2694 rctl &= ~E1000_RCTL_SBP;
2695
2696 /* Enable Long Packet receive */
2697 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2698 rctl &= ~E1000_RCTL_LPE;
2699 else
2700 rctl |= E1000_RCTL_LPE;
2701
eb7c3adb
JK		 2702 /* Some systems expect that the CRC is included in SMBUS traffic. The
2703 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2704 * host memory when this is enabled
2705 */
2706 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2707 rctl |= E1000_RCTL_SECRC;
5918bd88 2708
a4f58f54
BA		 2709 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2710 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2711 u16 phy_data;
2712
2713 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2714 phy_data &= 0xfff8;
2715 phy_data |= (1 << 2);
2716 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2717
2718 e1e_rphy(hw, 22, &phy_data);
2719 phy_data &= 0x0fff;
2720 phy_data |= (1 << 14);
2721 e1e_wphy(hw, 0x10, 0x2823);
2722 e1e_wphy(hw, 0x11, 0x0003);
2723 e1e_wphy(hw, 22, phy_data);
2724 }
2725
bc7f75fa
AK		 2726 /* Setup buffer sizes */
2727 rctl &= ~E1000_RCTL_SZ_4096;
2728 rctl |= E1000_RCTL_BSEX;
2729 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2730 case 2048:
2731 default:
2732 rctl |= E1000_RCTL_SZ_2048;
2733 rctl &= ~E1000_RCTL_BSEX;
2734 break;
2735 case 4096:
2736 rctl |= E1000_RCTL_SZ_4096;
2737 break;
2738 case 8192:
2739 rctl |= E1000_RCTL_SZ_8192;
2740 break;
2741 case 16384:
2742 rctl |= E1000_RCTL_SZ_16384;
2743 break;
2744 }
2745
2746 /*
2747 * 82571 and greater support packet-split where the protocol
2748 * header is placed in skb->data and the packet data is
2749 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2750 * In the case of a non-split, skb->data is linearly filled,
2751 * followed by the page buffers. Therefore, skb->data is
2752 * sized to hold the largest protocol header.
2753 *
2754 * allocations using alloc_page take too long for regular MTU
2755 * so only enable packet split for jumbo frames
2756 *
2757 * Using pages when the page size is greater than 16k wastes
2758 * a lot of memory, since we allocate 3 pages at all times
2759 * per packet.
2760 */
bc7f75fa 2761 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2762 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2763 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2764 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2765 else
2766 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2767
2768 if (adapter->rx_ps_pages) {
2769 /* Configure extra packet-split registers */
2770 rfctl = er32(RFCTL);
2771 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2772 /*
2773 * disable packet split support for IPv6 extension headers,
2774 * because some malformed IPv6 headers can hang the Rx
2775 */
bc7f75fa
AK		 2776 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2777 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2778
2779 ew32(RFCTL, rfctl);
2780
140a7480
AK		 2781 /* Enable Packet split descriptors */
2782 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2783
2784 psrctl |= adapter->rx_ps_bsize0 >>
2785 E1000_PSRCTL_BSIZE0_SHIFT;
2786
2787 switch (adapter->rx_ps_pages) {
2788 case 3:
2789 psrctl |= PAGE_SIZE <<
2790 E1000_PSRCTL_BSIZE3_SHIFT;
2791 case 2:
2792 psrctl |= PAGE_SIZE <<
2793 E1000_PSRCTL_BSIZE2_SHIFT;
2794 case 1:
2795 psrctl |= PAGE_SIZE >>
2796 E1000_PSRCTL_BSIZE1_SHIFT;
2797 break;
2798 }
2799
2800 ew32(PSRCTL, psrctl);
2801 }
2802
2803 ew32(RCTL, rctl);
318a94d6
JK		 2804 /* just started the receive unit, no need to restart */
2805 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2806}
2807
2808/**
2809 * e1000_configure_rx - Configure Receive Unit after Reset
2810 * @adapter: board private structure
2811 *
2812 * Configure the Rx unit of the MAC after a reset.
2813 **/
2814static void e1000_configure_rx(struct e1000_adapter *adapter)
2815{
2816 struct e1000_hw *hw = &adapter->hw;
2817 struct e1000_ring *rx_ring = adapter->rx_ring;
2818 u64 rdba;
2819 u32 rdlen, rctl, rxcsum, ctrl_ext;
2820
2821 if (adapter->rx_ps_pages) {
2822 /* this is a 32 byte descriptor */
2823 rdlen = rx_ring->count *
2824 sizeof(union e1000_rx_desc_packet_split);
2825 adapter->clean_rx = e1000_clean_rx_irq_ps;
2826 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2827 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2828 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2829 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2830 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2831 } else {
97ac8cae 2832 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2833 adapter->clean_rx = e1000_clean_rx_irq;
2834 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2835 }
2836
2837 /* disable receives while setting up the descriptors */
2838 rctl = er32(RCTL);
2839 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2840 e1e_flush();
2841 msleep(10);
2842
2843 /* set the Receive Delay Timer Register */
2844 ew32(RDTR, adapter->rx_int_delay);
2845
2846 /* irq moderation */
2847 ew32(RADV, adapter->rx_abs_int_delay);
2848 if (adapter->itr_setting != 0)
ad68076e 2849 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2850
2851 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2852 /* Auto-Mask interrupts upon ICR access */
2853 ctrl_ext |= E1000_CTRL_EXT_IAME;
2854 ew32(IAM, 0xffffffff);
2855 ew32(CTRL_EXT, ctrl_ext);
2856 e1e_flush();
2857
ad68076e
BA		 2858 /*
2859 * Setup the HW Rx Head and Tail Descriptor Pointers and
2860 * the Base and Length of the Rx Descriptor Ring
2861 */
bc7f75fa 2862 rdba = rx_ring->dma;
284901a9 2863 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2864 ew32(RDBAH, (rdba >> 32));
2865 ew32(RDLEN, rdlen);
2866 ew32(RDH, 0);
2867 ew32(RDT, 0);
2868 rx_ring->head = E1000_RDH;
2869 rx_ring->tail = E1000_RDT;
2870
2871 /* Enable Receive Checksum Offload for TCP and UDP */
2872 rxcsum = er32(RXCSUM);
2873 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2874 rxcsum |= E1000_RXCSUM_TUOFL;
2875
ad68076e
BA		 2876 /*
2877 * IPv4 payload checksum for UDP fragments must be
2878 * used in conjunction with packet-split.
2879 */
bc7f75fa
AK		 2880 if (adapter->rx_ps_pages)
2881 rxcsum |= E1000_RXCSUM_IPPCSE;
2882 } else {
2883 rxcsum &= ~E1000_RXCSUM_TUOFL;
2884 /* no need to clear IPPCSE as it defaults to 0 */
2885 }
2886 ew32(RXCSUM, rxcsum);
2887
ad68076e
BA		 2888 /*
2889 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2890 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2891 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2892 */
53ec5498
BA		 2893 if (adapter->flags & FLAG_HAS_ERT) {
2894 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2895 u32 rxdctl = er32(RXDCTL(0));
2896 ew32(RXDCTL(0), rxdctl | 0x3);
2897 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2898 /*
2899 * With jumbo frames and early-receive enabled,
2900 * excessive C-state transition latencies result in
2901 * dropped transactions.
2902 */
ed77134b 2903 pm_qos_update_request(
82f68251 2904 &adapter->netdev->pm_qos_req, 55);
53ec5498 2905 } else {
ed77134b 2906 pm_qos_update_request(
82f68251 2907 &adapter->netdev->pm_qos_req,
ed77134b 2908 PM_QOS_DEFAULT_VALUE);
53ec5498 2909 }
97ac8cae 2910 }
bc7f75fa
AK		 2911
2912 /* Enable Receives */
2913 ew32(RCTL, rctl);
2914}
2915
2916/**
e2de3eb6 2917 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2918 * @hw: pointer to the HW structure
2919 * @mc_addr_list: array of multicast addresses to program
2920 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2921 *
ab8932f3 2922 * Updates the Multicast Table Array.
bc7f75fa 2923 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2924 **/
e2de3eb6 2925static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2926 u32 mc_addr_count)
bc7f75fa 2927{
ab8932f3 2928 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 2929}
2930
2931/**
2932 * e1000_set_multi - Multicast and Promiscuous mode set
2933 * @netdev: network interface device structure
2934 *
2935 * The set_multi entry point is called whenever the multicast address
2936 * list or the network interface flags are updated. This routine is
2937 * responsible for configuring the hardware for proper multicast,
2938 * promiscuous mode, and all-multi behavior.
2939 **/
2940static void e1000_set_multi(struct net_device *netdev)
2941{
2942 struct e1000_adapter *adapter = netdev_priv(netdev);
2943 struct e1000_hw *hw = &adapter->hw;
22bedad3 2944 struct netdev_hw_addr *ha;
bc7f75fa
AK		 2945 u8 *mta_list;
2946 u32 rctl;
2947 int i;
2948
2949 /* Check for Promiscuous and All Multicast modes */
2950
2951 rctl = er32(RCTL);
2952
2953 if (netdev->flags & IFF_PROMISC) {
2954 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2955 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2956 } else {
746b9f02
PM		 2957 if (netdev->flags & IFF_ALLMULTI) {
2958 rctl |= E1000_RCTL_MPE;
2959 rctl &= ~E1000_RCTL_UPE;
2960 } else {
2961 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2962 }
78ed11a5 2963 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2964 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2965 }
2966
2967 ew32(RCTL, rctl);
2968
7aeef972
JP		 2969 if (!netdev_mc_empty(netdev)) {
2970 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 2971 if (!mta_list)
2972 return;
2973
2974 /* prepare a packed array of only addresses. */
7aeef972 2975 i = 0;
22bedad3
JP		 2976 netdev_for_each_mc_addr(ha, netdev)
2977 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 2978
ab8932f3 2979 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 2980 kfree(mta_list);
2981 } else {
2982 /*
2983 * if we're called from probe, we might not have
2984 * anything to do here, so clear out the list
2985 */
ab8932f3 2986 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 2987 }
2988}
2989
2990/**
ad68076e 2991 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2992 * @adapter: private board structure
2993 **/
2994static void e1000_configure(struct e1000_adapter *adapter)
2995{
2996 e1000_set_multi(adapter->netdev);
2997
2998 e1000_restore_vlan(adapter);
cd791618 2999 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3000
3001 e1000_configure_tx(adapter);
3002 e1000_setup_rctl(adapter);
3003 e1000_configure_rx(adapter);
ad68076e 3004 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3005}
3006
3007/**
3008 * e1000e_power_up_phy - restore link in case the phy was powered down
3009 * @adapter: address of board private structure
3010 *
3011 * The phy may be powered down to save power and turn off link when the
3012 * driver is unloaded and wake on lan is not enabled (among others)
3013 * *** this routine MUST be followed by a call to e1000e_reset ***
3014 **/
3015void e1000e_power_up_phy(struct e1000_adapter *adapter)
3016{
17f208de
BA		 3017 if (adapter->hw.phy.ops.power_up)
3018 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3019
3020 adapter->hw.mac.ops.setup_link(&adapter->hw);
3021}
3022
3023/**
3024 * e1000_power_down_phy - Power down the PHY
3025 *
17f208de
BA		 3026 * Power down the PHY so no link is implied when interface is down.
3027 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3028 */
3029static void e1000_power_down_phy(struct e1000_adapter *adapter)
3030{
bc7f75fa 3031 /* WoL is enabled */
23b66e2b 3032 if (adapter->wol)
bc7f75fa
AK		 3033 return;
3034
17f208de
BA		 3035 if (adapter->hw.phy.ops.power_down)
3036 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3037}
3038
3039/**
3040 * e1000e_reset - bring the hardware into a known good state
3041 *
3042 * This function boots the hardware and enables some settings that
3043 * require a configuration cycle of the hardware - those cannot be
3044 * set/changed during runtime. After reset the device needs to be
ad68076e 3045 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3046 */
3047void e1000e_reset(struct e1000_adapter *adapter)
3048{
3049 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3050 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3051 struct e1000_hw *hw = &adapter->hw;
3052 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3053 u32 pba = adapter->pba;
bc7f75fa
AK		 3054 u16 hwm;
3055
ad68076e 3056 /* reset Packet Buffer Allocation to default */
318a94d6 3057 ew32(PBA, pba);
df762464 3058
318a94d6 3059 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3060 /*
3061 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3062 * large enough to accommodate two full transmit packets,
3063 * rounded up to the next 1KB and expressed in KB. Likewise,
3064 * the Rx FIFO should be large enough to accommodate at least
3065 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3066 * expressed in KB.
3067 */
df762464 3068 pba = er32(PBA);
bc7f75fa 3069 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3070 tx_space = pba >> 16;
bc7f75fa 3071 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3072 pba &= 0xffff;
ad68076e
BA		 3073 /*
3074 * the Tx fifo also stores 16 bytes of information about the tx
3075 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3076 */
3077 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3078 sizeof(struct e1000_tx_desc) -
3079 ETH_FCS_LEN) * 2;
3080 min_tx_space = ALIGN(min_tx_space, 1024);
3081 min_tx_space >>= 10;
3082 /* software strips receive CRC, so leave room for it */
318a94d6 3083 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3084 min_rx_space = ALIGN(min_rx_space, 1024);
3085 min_rx_space >>= 10;
3086
ad68076e
BA		 3087 /*
3088 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3089 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3090 * allocation, take space away from current Rx allocation
3091 */
df762464
AK		 3092 if ((tx_space < min_tx_space) &&
3093 ((min_tx_space - tx_space) < pba)) {
3094 pba -= min_tx_space - tx_space;
bc7f75fa 3095
ad68076e
BA		 3096 /*
3097 * if short on Rx space, Rx wins and must trump tx
3098 * adjustment or use Early Receive if available
3099 */
df762464 3100 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3101 (!(adapter->flags & FLAG_HAS_ERT)))
3102 /* ERT enabled in e1000_configure_rx */
df762464 3103 pba = min_rx_space;
bc7f75fa 3104 }
df762464
AK		 3105
3106 ew32(PBA, pba);
bc7f75fa
AK		 3107 }
3108
bc7f75fa 3109
ad68076e
BA		 3110 /*
3111 * flow control settings
3112 *
38eb394e 3113 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3114 * (or the size used for early receive) above it in the Rx FIFO.
3115 * Set it to the lower of:
3116 * - 90% of the Rx FIFO size, and
3117 * - the full Rx FIFO size minus the early receive size (for parts
3118 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3119 * - the full Rx FIFO size minus one full frame
ad68076e 3120 */
38eb394e
BA		 3121 if (hw->mac.type == e1000_pchlan) {
3122 /*
3123 * Workaround PCH LOM adapter hangs with certain network
3124 * loads. If hangs persist, try disabling Tx flow control.
3125 */
3126 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3127 fc->high_water = 0x3500;
3128 fc->low_water = 0x1500;
3129 } else {
3130 fc->high_water = 0x5000;
3131 fc->low_water = 0x3000;
3132 }
a305595b 3133 fc->refresh_time = 0x1000;
38eb394e
BA		 3134 } else {
3135 if ((adapter->flags & FLAG_HAS_ERT) &&
3136 (adapter->netdev->mtu > ETH_DATA_LEN))
3137 hwm = min(((pba << 10) * 9 / 10),
3138 ((pba << 10) - (E1000_ERT_2048 << 3)));
3139 else
3140 hwm = min(((pba << 10) * 9 / 10),
3141 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 3142
38eb394e
BA		 3143 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3144 fc->low_water = fc->high_water - 8;
3145 }
bc7f75fa
AK		 3146
3147 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 3148 fc->pause_time = 0xFFFF;
bc7f75fa 3149 else
318a94d6
JK		 3150 fc->pause_time = E1000_FC_PAUSE_TIME;
3151 fc->send_xon = 1;
5c48ef3e 3152 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 3153
3154 /* Allow time for pending master requests to run */
3155 mac->ops.reset_hw(hw);
97ac8cae
BA		 3156
3157 /*
3158 * For parts with AMT enabled, let the firmware know
3159 * that the network interface is in control
3160 */
c43bc57e 3161 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 3162 e1000_get_hw_control(adapter);
3163
bc7f75fa 3164 ew32(WUC, 0);
a4f58f54
BA		 3165 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
3166 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK		 3167
3168 if (mac->ops.init_hw(hw))
44defeb3 3169 e_err("Hardware Error\n");
bc7f75fa
AK		 3170
3171 e1000_update_mng_vlan(adapter);
3172
3173 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3174 ew32(VET, ETH_P_8021Q);
3175
3176 e1000e_reset_adaptive(hw);
3177 e1000_get_phy_info(hw);
3178
918d7197
BA		 3179 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3180 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3181 u16 phy_data = 0;
ad68076e
BA		 3182 /*
3183 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3184 * the return value of this function because there is nothing
ad68076e
BA		 3185 * different we would do if it failed
3186 */
bc7f75fa
AK		 3187 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3188 phy_data &= ~IGP02E1000_PM_SPD;
3189 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3190 }
bc7f75fa
AK		 3191}
3192
3193int e1000e_up(struct e1000_adapter *adapter)
3194{
3195 struct e1000_hw *hw = &adapter->hw;
3196
53ec5498
BA		 3197 /* DMA latency requirement to workaround early-receive/jumbo issue */
3198 if (adapter->flags & FLAG_HAS_ERT)
82f68251
JB		 3199 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3200 PM_QOS_CPU_DMA_LATENCY,
3201 PM_QOS_DEFAULT_VALUE);
53ec5498 3202
bc7f75fa
AK		 3203 /* hardware has been reset, we need to reload some things */
3204 e1000_configure(adapter);
3205
3206 clear_bit(__E1000_DOWN, &adapter->state);
3207
3208 napi_enable(&adapter->napi);
4662e82b
BA		 3209 if (adapter->msix_entries)
3210 e1000_configure_msix(adapter);
bc7f75fa
AK		 3211 e1000_irq_enable(adapter);
3212
4cb9be7a
JB		 3213 netif_wake_queue(adapter->netdev);
3214
bc7f75fa 3215 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3216 if (adapter->msix_entries)
3217 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3218 else
3219 ew32(ICS, E1000_ICS_LSC);
3220
bc7f75fa
AK		 3221 return 0;
3222}
3223
3224void e1000e_down(struct e1000_adapter *adapter)
3225{
3226 struct net_device *netdev = adapter->netdev;
3227 struct e1000_hw *hw = &adapter->hw;
3228 u32 tctl, rctl;
3229
ad68076e
BA		 3230 /*
3231 * signal that we're down so the interrupt handler does not
3232 * reschedule our watchdog timer
3233 */
bc7f75fa
AK		 3234 set_bit(__E1000_DOWN, &adapter->state);
3235
3236 /* disable receives in the hardware */
3237 rctl = er32(RCTL);
3238 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3239 /* flush and sleep below */
3240
4cb9be7a 3241 netif_stop_queue(netdev);
bc7f75fa
AK		 3242
3243 /* disable transmits in the hardware */
3244 tctl = er32(TCTL);
3245 tctl &= ~E1000_TCTL_EN;
3246 ew32(TCTL, tctl);
3247 /* flush both disables and wait for them to finish */
3248 e1e_flush();
3249 msleep(10);
3250
3251 napi_disable(&adapter->napi);
3252 e1000_irq_disable(adapter);
3253
3254 del_timer_sync(&adapter->watchdog_timer);
3255 del_timer_sync(&adapter->phy_info_timer);
3256
bc7f75fa
AK		 3257 netif_carrier_off(netdev);
3258 adapter->link_speed = 0;
3259 adapter->link_duplex = 0;
3260
52cc3086
JK		 3261 if (!pci_channel_offline(adapter->pdev))
3262 e1000e_reset(adapter);
bc7f75fa
AK		 3263 e1000_clean_tx_ring(adapter);
3264 e1000_clean_rx_ring(adapter);
3265
82f68251
JB		 3266 if (adapter->flags & FLAG_HAS_ERT)
3267 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
53ec5498 3268
bc7f75fa
AK		 3269 /*
3270 * TODO: for power management, we could drop the link and
3271 * pci_disable_device here.
3272 */
3273}
3274
3275void e1000e_reinit_locked(struct e1000_adapter *adapter)
3276{
3277 might_sleep();
3278 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3279 msleep(1);
3280 e1000e_down(adapter);
3281 e1000e_up(adapter);
3282 clear_bit(__E1000_RESETTING, &adapter->state);
3283}
3284
3285/**
3286 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3287 * @adapter: board private structure to initialize
3288 *
3289 * e1000_sw_init initializes the Adapter private data structure.
3290 * Fields are initialized based on PCI device information and
3291 * OS network device settings (MTU size).
3292 **/
3293static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3294{
bc7f75fa
AK		 3295 struct net_device *netdev = adapter->netdev;
3296
3297 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3298 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3299 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3300 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3301
4662e82b 3302 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3303
4662e82b
BA		 3304 if (e1000_alloc_queues(adapter))
3305 return -ENOMEM;
bc7f75fa 3306
bc7f75fa 3307 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3308 e1000_irq_disable(adapter);
3309
bc7f75fa
AK		 3310 set_bit(__E1000_DOWN, &adapter->state);
3311 return 0;
bc7f75fa
AK		 3312}
3313
f8d59f78
BA		 3314/**
3315 * e1000_intr_msi_test - Interrupt Handler
3316 * @irq: interrupt number
3317 * @data: pointer to a network interface device structure
3318 **/
3319static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3320{
3321 struct net_device *netdev = data;
3322 struct e1000_adapter *adapter = netdev_priv(netdev);
3323 struct e1000_hw *hw = &adapter->hw;
3324 u32 icr = er32(ICR);
3325
3bb99fe2 3326 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3327 if (icr & E1000_ICR_RXSEQ) {
3328 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3329 wmb();
3330 }
3331
3332 return IRQ_HANDLED;
3333}
3334
3335/**
3336 * e1000_test_msi_interrupt - Returns 0 for successful test
3337 * @adapter: board private struct
3338 *
3339 * code flow taken from tg3.c
3340 **/
3341static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3342{
3343 struct net_device *netdev = adapter->netdev;
3344 struct e1000_hw *hw = &adapter->hw;
3345 int err;
3346
3347 /* poll_enable hasn't been called yet, so don't need disable */
3348 /* clear any pending events */
3349 er32(ICR);
3350
3351 /* free the real vector and request a test handler */
3352 e1000_free_irq(adapter);
4662e82b 3353 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3354
3355 /* Assume that the test fails, if it succeeds then the test
3356 * MSI irq handler will unset this flag */
3357 adapter->flags |= FLAG_MSI_TEST_FAILED;
3358
3359 err = pci_enable_msi(adapter->pdev);
3360 if (err)
3361 goto msi_test_failed;
3362
a0607fd3 3363 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3364 netdev->name, netdev);
3365 if (err) {
3366 pci_disable_msi(adapter->pdev);
3367 goto msi_test_failed;
3368 }
3369
3370 wmb();
3371
3372 e1000_irq_enable(adapter);
3373
3374 /* fire an unusual interrupt on the test handler */
3375 ew32(ICS, E1000_ICS_RXSEQ);
3376 e1e_flush();
3377 msleep(50);
3378
3379 e1000_irq_disable(adapter);
3380
3381 rmb();
3382
3383 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3384 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3385 err = -EIO;
3386 e_info("MSI interrupt test failed!\n");
3387 }
3388
3389 free_irq(adapter->pdev->irq, netdev);
3390 pci_disable_msi(adapter->pdev);
3391
3392 if (err == -EIO)
3393 goto msi_test_failed;
3394
3395 /* okay so the test worked, restore settings */
3bb99fe2 3396 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3397msi_test_failed:
4662e82b 3398 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3399 e1000_request_irq(adapter);
3400 return err;
3401}
3402
3403/**
3404 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3405 * @adapter: board private struct
3406 *
3407 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3408 **/
3409static int e1000_test_msi(struct e1000_adapter *adapter)
3410{
3411 int err;
3412 u16 pci_cmd;
3413
3414 if (!(adapter->flags & FLAG_MSI_ENABLED))
3415 return 0;
3416
3417 /* disable SERR in case the MSI write causes a master abort */
3418 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3419 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3420 pci_cmd & ~PCI_COMMAND_SERR);
3421
3422 err = e1000_test_msi_interrupt(adapter);
3423
3424 /* restore previous setting of command word */
3425 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3426
3427 /* success ! */
3428 if (!err)
3429 return 0;
3430
3431 /* EIO means MSI test failed */
3432 if (err != -EIO)
3433 return err;
3434
3435 /* back to INTx mode */
3436 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3437
3438 e1000_free_irq(adapter);
3439
3440 err = e1000_request_irq(adapter);
3441
3442 return err;
3443}
3444
bc7f75fa
AK		 3445/**
3446 * e1000_open - Called when a network interface is made active
3447 * @netdev: network interface device structure
3448 *
3449 * Returns 0 on success, negative value on failure
3450 *
3451 * The open entry point is called when a network interface is made
3452 * active by the system (IFF_UP). At this point all resources needed
3453 * for transmit and receive operations are allocated, the interrupt
3454 * handler is registered with the OS, the watchdog timer is started,
3455 * and the stack is notified that the interface is ready.
3456 **/
3457static int e1000_open(struct net_device *netdev)
3458{
3459 struct e1000_adapter *adapter = netdev_priv(netdev);
3460 struct e1000_hw *hw = &adapter->hw;
23606cf5 3461 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3462 int err;
3463
3464 /* disallow open during test */
3465 if (test_bit(__E1000_TESTING, &adapter->state))
3466 return -EBUSY;
3467
23606cf5
RW		 3468 pm_runtime_get_sync(&pdev->dev);
3469
9c563d20
JB		 3470 netif_carrier_off(netdev);
3471
bc7f75fa
AK		 3472 /* allocate transmit descriptors */
3473 err = e1000e_setup_tx_resources(adapter);
3474 if (err)
3475 goto err_setup_tx;
3476
3477 /* allocate receive descriptors */
3478 err = e1000e_setup_rx_resources(adapter);
3479 if (err)
3480 goto err_setup_rx;
3481
11b08be8
BA		 3482 /*
3483 * If AMT is enabled, let the firmware know that the network
3484 * interface is now open and reset the part to a known state.
3485 */
3486 if (adapter->flags & FLAG_HAS_AMT) {
3487 e1000_get_hw_control(adapter);
3488 e1000e_reset(adapter);
3489 }
3490
bc7f75fa
AK		 3491 e1000e_power_up_phy(adapter);
3492
3493 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3494 if ((adapter->hw.mng_cookie.status &
3495 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3496 e1000_update_mng_vlan(adapter);
3497
ad68076e
BA		 3498 /*
3499 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3500 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3501 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3502 * clean_rx handler before we do so.
3503 */
bc7f75fa
AK		 3504 e1000_configure(adapter);
3505
3506 err = e1000_request_irq(adapter);
3507 if (err)
3508 goto err_req_irq;
3509
f8d59f78
BA		 3510 /*
3511 * Work around PCIe errata with MSI interrupts causing some chipsets to
3512 * ignore e1000e MSI messages, which means we need to test our MSI
3513 * interrupt now
3514 */
4662e82b 3515 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3516 err = e1000_test_msi(adapter);
3517 if (err) {
3518 e_err("Interrupt allocation failed\n");
3519 goto err_req_irq;
3520 }
3521 }
3522
bc7f75fa
AK		 3523 /* From here on the code is the same as e1000e_up() */
3524 clear_bit(__E1000_DOWN, &adapter->state);
3525
3526 napi_enable(&adapter->napi);
3527
3528 e1000_irq_enable(adapter);
3529
4cb9be7a 3530 netif_start_queue(netdev);
d55b53ff 3531
23606cf5
RW		 3532 adapter->idle_check = true;
3533 pm_runtime_put(&pdev->dev);
3534
bc7f75fa 3535 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3536 if (adapter->msix_entries)
3537 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3538 else
3539 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3540
3541 return 0;
3542
3543err_req_irq:
3544 e1000_release_hw_control(adapter);
3545 e1000_power_down_phy(adapter);
3546 e1000e_free_rx_resources(adapter);
3547err_setup_rx:
3548 e1000e_free_tx_resources(adapter);
3549err_setup_tx:
3550 e1000e_reset(adapter);
23606cf5 3551 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3552
3553 return err;
3554}
3555
3556/**
3557 * e1000_close - Disables a network interface
3558 * @netdev: network interface device structure
3559 *
3560 * Returns 0, this is not allowed to fail
3561 *
3562 * The close entry point is called when an interface is de-activated
3563 * by the OS. The hardware is still under the drivers control, but
3564 * needs to be disabled. A global MAC reset is issued to stop the
3565 * hardware, and all transmit and receive resources are freed.
3566 **/
3567static int e1000_close(struct net_device *netdev)
3568{
3569 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3570 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3571
3572 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3573
3574 pm_runtime_get_sync(&pdev->dev);
3575
3576 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3577 e1000e_down(adapter);
3578 e1000_free_irq(adapter);
3579 }
bc7f75fa 3580 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3581
3582 e1000e_free_tx_resources(adapter);
3583 e1000e_free_rx_resources(adapter);
3584
ad68076e
BA		 3585 /*
3586 * kill manageability vlan ID if supported, but not if a vlan with
3587 * the same ID is registered on the host OS (let 8021q kill it)
3588 */
bc7f75fa
AK		 3589 if ((adapter->hw.mng_cookie.status &
3590 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3591 !(adapter->vlgrp &&
3592 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3593 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3594
ad68076e
BA		 3595 /*
3596 * If AMT is enabled, let the firmware know that the network
3597 * interface is now closed
3598 */
c43bc57e 3599 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3600 e1000_release_hw_control(adapter);
3601
23606cf5
RW		 3602 pm_runtime_put_sync(&pdev->dev);
3603
bc7f75fa
AK		 3604 return 0;
3605}
3606/**
3607 * e1000_set_mac - Change the Ethernet Address of the NIC
3608 * @netdev: network interface device structure
3609 * @p: pointer to an address structure
3610 *
3611 * Returns 0 on success, negative on failure
3612 **/
3613static int e1000_set_mac(struct net_device *netdev, void *p)
3614{
3615 struct e1000_adapter *adapter = netdev_priv(netdev);
3616 struct sockaddr *addr = p;
3617
3618 if (!is_valid_ether_addr(addr->sa_data))
3619 return -EADDRNOTAVAIL;
3620
3621 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3622 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3623
3624 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3625
3626 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3627 /* activate the work around */
3628 e1000e_set_laa_state_82571(&adapter->hw, 1);
3629
ad68076e
BA		 3630 /*
3631 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3632 * between the time RAR[0] gets clobbered and the time it
3633 * gets fixed (in e1000_watchdog), the actual LAA is in one
3634 * of the RARs and no incoming packets directed to this port
3635 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3636 * RAR[14]
3637 */
bc7f75fa
AK		 3638 e1000e_rar_set(&adapter->hw,
3639 adapter->hw.mac.addr,
3640 adapter->hw.mac.rar_entry_count - 1);
3641 }
3642
3643 return 0;
3644}
3645
a8f88ff5
JB		 3646/**
3647 * e1000e_update_phy_task - work thread to update phy
3648 * @work: pointer to our work struct
3649 *
3650 * this worker thread exists because we must acquire a
3651 * semaphore to read the phy, which we could msleep while
3652 * waiting for it, and we can't msleep in a timer.
3653 **/
3654static void e1000e_update_phy_task(struct work_struct *work)
3655{
3656 struct e1000_adapter *adapter = container_of(work,
3657 struct e1000_adapter, update_phy_task);
3658 e1000_get_phy_info(&adapter->hw);
3659}
3660
ad68076e
BA		 3661/*
3662 * Need to wait a few seconds after link up to get diagnostic information from
3663 * the phy
3664 */
bc7f75fa
AK		 3665static void e1000_update_phy_info(unsigned long data)
3666{
3667 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3668 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3669}
3670
3671/**
3672 * e1000e_update_stats - Update the board statistics counters
3673 * @adapter: board private structure
3674 **/
3675void e1000e_update_stats(struct e1000_adapter *adapter)
3676{
7274c20f 3677 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3678 struct e1000_hw *hw = &adapter->hw;
3679 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3680 u16 phy_data;
bc7f75fa
AK		 3681
3682 /*
3683 * Prevent stats update while adapter is being reset, or if the pci
3684 * connection is down.
3685 */
3686 if (adapter->link_speed == 0)
3687 return;
3688 if (pci_channel_offline(pdev))
3689 return;
3690
bc7f75fa
AK		 3691 adapter->stats.crcerrs += er32(CRCERRS);
3692 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3693 adapter->stats.gorc += er32(GORCL);
3694 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3695 adapter->stats.bprc += er32(BPRC);
3696 adapter->stats.mprc += er32(MPRC);
3697 adapter->stats.roc += er32(ROC);
3698
bc7f75fa 3699 adapter->stats.mpc += er32(MPC);
a4f58f54
BA		 3700 if ((hw->phy.type == e1000_phy_82578) ||
3701 (hw->phy.type == e1000_phy_82577)) {
3702 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
29477e24
BA		 3703 if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data))
3704 adapter->stats.scc += phy_data;
a4f58f54
BA		 3705
3706 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
29477e24
BA		 3707 if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data))
3708 adapter->stats.ecol += phy_data;
a4f58f54
BA		 3709
3710 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
29477e24
BA		 3711 if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data))
3712 adapter->stats.mcc += phy_data;
a4f58f54
BA		 3713
3714 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
29477e24
BA		 3715 if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data))
3716 adapter->stats.latecol += phy_data;
a4f58f54
BA		 3717
3718 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
29477e24
BA		 3719 if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data))
3720 adapter->stats.dc += phy_data;
a4f58f54
BA		 3721 } else {
3722 adapter->stats.scc += er32(SCC);
3723 adapter->stats.ecol += er32(ECOL);
3724 adapter->stats.mcc += er32(MCC);
3725 adapter->stats.latecol += er32(LATECOL);
3726 adapter->stats.dc += er32(DC);
3727 }
bc7f75fa
AK		 3728 adapter->stats.xonrxc += er32(XONRXC);
3729 adapter->stats.xontxc += er32(XONTXC);
3730 adapter->stats.xoffrxc += er32(XOFFRXC);
3731 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3732 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3733 adapter->stats.gotc += er32(GOTCL);
3734 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3735 adapter->stats.rnbc += er32(RNBC);
3736 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3737
3738 adapter->stats.mptc += er32(MPTC);
3739 adapter->stats.bptc += er32(BPTC);
3740
3741 /* used for adaptive IFS */
3742
3743 hw->mac.tx_packet_delta = er32(TPT);
3744 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA		 3745 if ((hw->phy.type == e1000_phy_82578) ||
3746 (hw->phy.type == e1000_phy_82577)) {
3747 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
29477e24
BA		 3748 if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data))
3749 hw->mac.collision_delta = phy_data;
a4f58f54
BA		 3750 } else {
3751 hw->mac.collision_delta = er32(COLC);
3752 }
bc7f75fa
AK		 3753 adapter->stats.colc += hw->mac.collision_delta;
3754
3755 adapter->stats.algnerrc += er32(ALGNERRC);
3756 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA		 3757 if ((hw->phy.type == e1000_phy_82578) ||
3758 (hw->phy.type == e1000_phy_82577)) {
3759 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
29477e24
BA		 3760 if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data))
3761 adapter->stats.tncrs += phy_data;
a4f58f54
BA		 3762 } else {
3763 if ((hw->mac.type != e1000_82574) &&
3764 (hw->mac.type != e1000_82583))
3765 adapter->stats.tncrs += er32(TNCRS);
3766 }
bc7f75fa
AK		 3767 adapter->stats.cexterr += er32(CEXTERR);
3768 adapter->stats.tsctc += er32(TSCTC);
3769 adapter->stats.tsctfc += er32(TSCTFC);
3770
bc7f75fa 3771 /* Fill out the OS statistics structure */
7274c20f
AK		 3772 netdev->stats.multicast = adapter->stats.mprc;
3773 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3774
3775 /* Rx Errors */
3776
ad68076e
BA		 3777 /*
3778 * RLEC on some newer hardware can be incorrect so build
3779 * our own version based on RUC and ROC
3780 */
7274c20f 3781 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3782 adapter->stats.crcerrs + adapter->stats.algnerrc +
3783 adapter->stats.ruc + adapter->stats.roc +
3784 adapter->stats.cexterr;
7274c20f 3785 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3786 adapter->stats.roc;
7274c20f
AK		 3787 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3788 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3789 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3790
3791 /* Tx Errors */
7274c20f 3792 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3793 adapter->stats.latecol;
7274c20f
AK		 3794 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3795 netdev->stats.tx_window_errors = adapter->stats.latecol;
3796 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3797
3798 /* Tx Dropped needs to be maintained elsewhere */
3799
bc7f75fa
AK		 3800 /* Management Stats */
3801 adapter->stats.mgptc += er32(MGTPTC);
3802 adapter->stats.mgprc += er32(MGTPRC);
3803 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3804}
3805
7c25769f
BA		 3806/**
3807 * e1000_phy_read_status - Update the PHY register status snapshot
3808 * @adapter: board private structure
3809 **/
3810static void e1000_phy_read_status(struct e1000_adapter *adapter)
3811{
3812 struct e1000_hw *hw = &adapter->hw;
3813 struct e1000_phy_regs *phy = &adapter->phy_regs;
3814 int ret_val;
7c25769f
BA		 3815
3816 if ((er32(STATUS) & E1000_STATUS_LU) &&
3817 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3818 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3819 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3820 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3821 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3822 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3823 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3824 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3825 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3826 if (ret_val)
44defeb3 3827 e_warn("Error reading PHY register\n");
7c25769f
BA		 3828 } else {
3829 /*
3830 * Do not read PHY registers if link is not up
3831 * Set values to typical power-on defaults
3832 */
3833 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3834 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3835 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3836 BMSR_ERCAP);
3837 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3838 ADVERTISE_ALL | ADVERTISE_CSMA);
3839 phy->lpa = 0;
3840 phy->expansion = EXPANSION_ENABLENPAGE;
3841 phy->ctrl1000 = ADVERTISE_1000FULL;
3842 phy->stat1000 = 0;
3843 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3844 }
7c25769f
BA		 3845}
3846
bc7f75fa
AK		 3847static void e1000_print_link_info(struct e1000_adapter *adapter)
3848{
bc7f75fa
AK		 3849 struct e1000_hw *hw = &adapter->hw;
3850 u32 ctrl = er32(CTRL);
3851
8f12fe86
BA		 3852 /* Link status message must follow this format for user tools */
3853 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3854 "Flow Control: %s\n",
3855 adapter->netdev->name,
44defeb3
JK		 3856 adapter->link_speed,
3857 (adapter->link_duplex == FULL_DUPLEX) ?
3858 "Full Duplex" : "Half Duplex",
3859 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3860 "RX/TX" :
3861 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3862 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3863}
3864
b405e8df 3865bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3866{
3867 struct e1000_hw *hw = &adapter->hw;
3868 bool link_active = 0;
3869 s32 ret_val = 0;
3870
3871 /*
3872 * get_link_status is set on LSC (link status) interrupt or
3873 * Rx sequence error interrupt. get_link_status will stay
3874 * false until the check_for_link establishes link
3875 * for copper adapters ONLY
3876 */
3877 switch (hw->phy.media_type) {
3878 case e1000_media_type_copper:
3879 if (hw->mac.get_link_status) {
3880 ret_val = hw->mac.ops.check_for_link(hw);
3881 link_active = !hw->mac.get_link_status;
3882 } else {
3883 link_active = 1;
3884 }
3885 break;
3886 case e1000_media_type_fiber:
3887 ret_val = hw->mac.ops.check_for_link(hw);
3888 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3889 break;
3890 case e1000_media_type_internal_serdes:
3891 ret_val = hw->mac.ops.check_for_link(hw);
3892 link_active = adapter->hw.mac.serdes_has_link;
3893 break;
3894 default:
3895 case e1000_media_type_unknown:
3896 break;
3897 }
3898
3899 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3900 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3901 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3902 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3903 }
3904
3905 return link_active;
3906}
3907
3908static void e1000e_enable_receives(struct e1000_adapter *adapter)
3909{
3910 /* make sure the receive unit is started */
3911 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3912 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3913 struct e1000_hw *hw = &adapter->hw;
3914 u32 rctl = er32(RCTL);
3915 ew32(RCTL, rctl | E1000_RCTL_EN);
3916 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3917 }
3918}
3919
bc7f75fa
AK		 3920/**
3921 * e1000_watchdog - Timer Call-back
3922 * @data: pointer to adapter cast into an unsigned long
3923 **/
3924static void e1000_watchdog(unsigned long data)
3925{
3926 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3927
3928 /* Do the rest outside of interrupt context */
3929 schedule_work(&adapter->watchdog_task);
3930
3931 /* TODO: make this use queue_delayed_work() */
3932}
3933
3934static void e1000_watchdog_task(struct work_struct *work)
3935{
3936 struct e1000_adapter *adapter = container_of(work,
3937 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3938 struct net_device *netdev = adapter->netdev;
3939 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3940 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3941 struct e1000_ring *tx_ring = adapter->tx_ring;
3942 struct e1000_hw *hw = &adapter->hw;
3943 u32 link, tctl;
bc7f75fa
AK		 3944 int tx_pending = 0;
3945
b405e8df 3946 link = e1000e_has_link(adapter);
318a94d6 3947 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 3948 /* Cancel scheduled suspend requests. */
3949 pm_runtime_resume(netdev->dev.parent);
3950
318a94d6 3951 e1000e_enable_receives(adapter);
bc7f75fa 3952 goto link_up;
bc7f75fa
AK		 3953 }
3954
3955 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3956 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3957 e1000_update_mng_vlan(adapter);
3958
bc7f75fa
AK		 3959 if (link) {
3960 if (!netif_carrier_ok(netdev)) {
3961 bool txb2b = 1;
23606cf5
RW		 3962
3963 /* Cancel scheduled suspend requests. */
3964 pm_runtime_resume(netdev->dev.parent);
3965
318a94d6 3966 /* update snapshot of PHY registers on LSC */
7c25769f 3967 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3968 mac->ops.get_link_up_info(&adapter->hw,
3969 &adapter->link_speed,
3970 &adapter->link_duplex);
3971 e1000_print_link_info(adapter);
f4187b56
BA		 3972 /*
3973 * On supported PHYs, check for duplex mismatch only
3974 * if link has autonegotiated at 10/100 half
3975 */
3976 if ((hw->phy.type == e1000_phy_igp_3 ||
3977 hw->phy.type == e1000_phy_bm) &&
3978 (hw->mac.autoneg == true) &&
3979 (adapter->link_speed == SPEED_10 ||
3980 adapter->link_speed == SPEED_100) &&
3981 (adapter->link_duplex == HALF_DUPLEX)) {
3982 u16 autoneg_exp;
3983
3984 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3985
3986 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3987 e_info("Autonegotiated half duplex but"
3988 " link partner cannot autoneg. "
3989 " Try forcing full duplex if "
3990 "link gets many collisions.\n");
3991 }
3992
f49c57e1 3993 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 3994 adapter->tx_timeout_factor = 1;
3995 switch (adapter->link_speed) {
3996 case SPEED_10:
3997 txb2b = 0;
10f1b492 3998 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3999 break;
4000 case SPEED_100:
4001 txb2b = 0;
4c86e0b9 4002 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4003 break;
4004 }
4005
ad68076e
BA		 4006 /*
4007 * workaround: re-program speed mode bit after
4008 * link-up event
4009 */
bc7f75fa
AK		 4010 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4011 !txb2b) {
4012 u32 tarc0;
e9ec2c0f 4013 tarc0 = er32(TARC(0));
bc7f75fa 4014 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4015 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4016 }
4017
ad68076e
BA		 4018 /*
4019 * disable TSO for pcie and 10/100 speeds, to avoid
4020 * some hardware issues
4021 */
bc7f75fa
AK		 4022 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4023 switch (adapter->link_speed) {
4024 case SPEED_10:
4025 case SPEED_100:
44defeb3 4026 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4027 netdev->features &= ~NETIF_F_TSO;
4028 netdev->features &= ~NETIF_F_TSO6;
4029 break;
4030 case SPEED_1000:
4031 netdev->features |= NETIF_F_TSO;
4032 netdev->features |= NETIF_F_TSO6;
4033 break;
4034 default:
4035 /* oops */
4036 break;
4037 }
4038 }
4039
ad68076e
BA		 4040 /*
4041 * enable transmits in the hardware, need to do this
4042 * after setting TARC(0)
4043 */
bc7f75fa
AK		 4044 tctl = er32(TCTL);
4045 tctl |= E1000_TCTL_EN;
4046 ew32(TCTL, tctl);
4047
75eb0fad
BA		 4048 /*
4049 * Perform any post-link-up configuration before
4050 * reporting link up.
4051 */
4052 if (phy->ops.cfg_on_link_up)
4053 phy->ops.cfg_on_link_up(hw);
4054
bc7f75fa 4055 netif_carrier_on(netdev);
bc7f75fa
AK		 4056
4057 if (!test_bit(__E1000_DOWN, &adapter->state))
4058 mod_timer(&adapter->phy_info_timer,
4059 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4060 }
4061 } else {
4062 if (netif_carrier_ok(netdev)) {
4063 adapter->link_speed = 0;
4064 adapter->link_duplex = 0;
8f12fe86
BA		 4065 /* Link status message must follow this format */
4066 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4067 adapter->netdev->name);
bc7f75fa 4068 netif_carrier_off(netdev);
bc7f75fa
AK		 4069 if (!test_bit(__E1000_DOWN, &adapter->state))
4070 mod_timer(&adapter->phy_info_timer,
4071 round_jiffies(jiffies + 2 * HZ));
4072
4073 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4074 schedule_work(&adapter->reset_task);
23606cf5
RW		 4075 else
4076 pm_schedule_suspend(netdev->dev.parent,
4077 LINK_TIMEOUT);
bc7f75fa
AK		 4078 }
4079 }
4080
4081link_up:
4082 e1000e_update_stats(adapter);
4083
4084 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4085 adapter->tpt_old = adapter->stats.tpt;
4086 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4087 adapter->colc_old = adapter->stats.colc;
4088
7c25769f
BA		 4089 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4090 adapter->gorc_old = adapter->stats.gorc;
4091 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4092 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4093
4094 e1000e_update_adaptive(&adapter->hw);
4095
4096 if (!netif_carrier_ok(netdev)) {
4097 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4098 tx_ring->count);
4099 if (tx_pending) {
ad68076e
BA		 4100 /*
4101 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4102 * but we've got queued Tx work that's never going
4103 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4104 * (Do the reset outside of interrupt context).
4105 */
bc7f75fa
AK		 4106 adapter->tx_timeout_count++;
4107 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4108 /* return immediately since reset is imminent */
4109 return;
bc7f75fa
AK		 4110 }
4111 }
4112
eab2abf5
JB		 4113 /* Simple mode for Interrupt Throttle Rate (ITR) */
4114 if (adapter->itr_setting == 4) {
4115 /*
4116 * Symmetric Tx/Rx gets a reduced ITR=2000;
4117 * Total asymmetrical Tx or Rx gets ITR=8000;
4118 * everyone else is between 2000-8000.
4119 */
4120 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4121 u32 dif = (adapter->gotc > adapter->gorc ?
4122 adapter->gotc - adapter->gorc :
4123 adapter->gorc - adapter->gotc) / 10000;
4124 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4125
4126 ew32(ITR, 1000000000 / (itr * 256));
4127 }
4128
ad68076e 4129 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4130 if (adapter->msix_entries)
4131 ew32(ICS, adapter->rx_ring->ims_val);
4132 else
4133 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4134
4135 /* Force detection of hung controller every watchdog period */
4136 adapter->detect_tx_hung = 1;
4137
ad68076e
BA		 4138 /*
4139 * With 82571 controllers, LAA may be overwritten due to controller
4140 * reset from the other port. Set the appropriate LAA in RAR[0]
4141 */
bc7f75fa
AK		 4142 if (e1000e_get_laa_state_82571(hw))
4143 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4144
4145 /* Reset the timer */
4146 if (!test_bit(__E1000_DOWN, &adapter->state))
4147 mod_timer(&adapter->watchdog_timer,
4148 round_jiffies(jiffies + 2 * HZ));
4149}
4150
4151#define E1000_TX_FLAGS_CSUM 0x00000001
4152#define E1000_TX_FLAGS_VLAN 0x00000002
4153#define E1000_TX_FLAGS_TSO 0x00000004
4154#define E1000_TX_FLAGS_IPV4 0x00000008
4155#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4156#define E1000_TX_FLAGS_VLAN_SHIFT 16
4157
4158static int e1000_tso(struct e1000_adapter *adapter,
4159 struct sk_buff *skb)
4160{
4161 struct e1000_ring *tx_ring = adapter->tx_ring;
4162 struct e1000_context_desc *context_desc;
4163 struct e1000_buffer *buffer_info;
4164 unsigned int i;
4165 u32 cmd_length = 0;
4166 u16 ipcse = 0, tucse, mss;
4167 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4168 int err;
4169
3d5e33c9
BA		 4170 if (!skb_is_gso(skb))
4171 return 0;
bc7f75fa 4172
3d5e33c9
BA		 4173 if (skb_header_cloned(skb)) {
4174 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4175 if (err)
4176 return err;
bc7f75fa
AK		 4177 }
4178
3d5e33c9
BA		 4179 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4180 mss = skb_shinfo(skb)->gso_size;
4181 if (skb->protocol == htons(ETH_P_IP)) {
4182 struct iphdr *iph = ip_hdr(skb);
4183 iph->tot_len = 0;
4184 iph->check = 0;
4185 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4186 0, IPPROTO_TCP, 0);
4187 cmd_length = E1000_TXD_CMD_IP;
4188 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4189 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4190 ipv6_hdr(skb)->payload_len = 0;
4191 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4192 &ipv6_hdr(skb)->daddr,
4193 0, IPPROTO_TCP, 0);
4194 ipcse = 0;
4195 }
4196 ipcss = skb_network_offset(skb);
4197 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4198 tucss = skb_transport_offset(skb);
4199 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4200 tucse = 0;
4201
4202 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4203 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4204
4205 i = tx_ring->next_to_use;
4206 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4207 buffer_info = &tx_ring->buffer_info[i];
4208
4209 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4210 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4211 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4212 context_desc->upper_setup.tcp_fields.tucss = tucss;
4213 context_desc->upper_setup.tcp_fields.tucso = tucso;
4214 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4215 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4216 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4217 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4218
4219 buffer_info->time_stamp = jiffies;
4220 buffer_info->next_to_watch = i;
4221
4222 i++;
4223 if (i == tx_ring->count)
4224 i = 0;
4225 tx_ring->next_to_use = i;
4226
4227 return 1;
bc7f75fa
AK		 4228}
4229
4230static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4231{
4232 struct e1000_ring *tx_ring = adapter->tx_ring;
4233 struct e1000_context_desc *context_desc;
4234 struct e1000_buffer *buffer_info;
4235 unsigned int i;
4236 u8 css;
af807c82 4237 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4238 __be16 protocol;
bc7f75fa 4239
af807c82
DG		 4240 if (skb->ip_summed != CHECKSUM_PARTIAL)
4241 return 0;
bc7f75fa 4242
5f66f208
AJ		 4243 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4244 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4245 else
4246 protocol = skb->protocol;
4247
3f518390 4248 switch (protocol) {
09640e63 4249 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4250 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4251 cmd_len |= E1000_TXD_CMD_TCP;
4252 break;
09640e63 4253 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4254 /* XXX not handling all IPV6 headers */
4255 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4256 cmd_len |= E1000_TXD_CMD_TCP;
4257 break;
4258 default:
4259 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4260 e_warn("checksum_partial proto=%x!\n",
4261 be16_to_cpu(protocol));
af807c82 4262 break;
bc7f75fa
AK		 4263 }
4264
af807c82
DG		 4265 css = skb_transport_offset(skb);
4266
4267 i = tx_ring->next_to_use;
4268 buffer_info = &tx_ring->buffer_info[i];
4269 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4270
4271 context_desc->lower_setup.ip_config = 0;
4272 context_desc->upper_setup.tcp_fields.tucss = css;
4273 context_desc->upper_setup.tcp_fields.tucso =
4274 css + skb->csum_offset;
4275 context_desc->upper_setup.tcp_fields.tucse = 0;
4276 context_desc->tcp_seg_setup.data = 0;
4277 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4278
4279 buffer_info->time_stamp = jiffies;
4280 buffer_info->next_to_watch = i;
4281
4282 i++;
4283 if (i == tx_ring->count)
4284 i = 0;
4285 tx_ring->next_to_use = i;
4286
4287 return 1;
bc7f75fa
AK		 4288}
4289
4290#define E1000_MAX_PER_TXD 8192
4291#define E1000_MAX_TXD_PWR 12
4292
4293static int e1000_tx_map(struct e1000_adapter *adapter,
4294 struct sk_buff *skb, unsigned int first,
4295 unsigned int max_per_txd, unsigned int nr_frags,
4296 unsigned int mss)
4297{
4298 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4299 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4300 struct e1000_buffer *buffer_info;
8ddc951c 4301 unsigned int len = skb_headlen(skb);
03b1320d 4302 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4303 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4304
4305 i = tx_ring->next_to_use;
4306
4307 while (len) {
1b7719c4 4308 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4309 size = min(len, max_per_txd);
4310
bc7f75fa 4311 buffer_info->length = size;
bc7f75fa 4312 buffer_info->time_stamp = jiffies;
bc7f75fa 4313 buffer_info->next_to_watch = i;
0be3f55f
NN		 4314 buffer_info->dma = dma_map_single(&pdev->dev,
4315 skb->data + offset,
4316 size, DMA_TO_DEVICE);
03b1320d 4317 buffer_info->mapped_as_page = false;
0be3f55f 4318 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4319 goto dma_error;
bc7f75fa
AK		 4320
4321 len -= size;
4322 offset += size;
03b1320d 4323 count++;
1b7719c4
AD		 4324
4325 if (len) {
4326 i++;
4327 if (i == tx_ring->count)
4328 i = 0;
4329 }
bc7f75fa
AK		 4330 }
4331
4332 for (f = 0; f < nr_frags; f++) {
4333 struct skb_frag_struct *frag;
4334
4335 frag = &skb_shinfo(skb)->frags[f];
4336 len = frag->size;
03b1320d 4337 offset = frag->page_offset;
bc7f75fa
AK		 4338
4339 while (len) {
1b7719c4
AD		 4340 i++;
4341 if (i == tx_ring->count)
4342 i = 0;
4343
bc7f75fa
AK		 4344 buffer_info = &tx_ring->buffer_info[i];
4345 size = min(len, max_per_txd);
bc7f75fa
AK		 4346
4347 buffer_info->length = size;
4348 buffer_info->time_stamp = jiffies;
bc7f75fa 4349 buffer_info->next_to_watch = i;
0be3f55f 4350 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4351 offset, size,
0be3f55f 4352 DMA_TO_DEVICE);
03b1320d 4353 buffer_info->mapped_as_page = true;
0be3f55f 4354 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4355 goto dma_error;
bc7f75fa
AK		 4356
4357 len -= size;
4358 offset += size;
4359 count++;
bc7f75fa
AK		 4360 }
4361 }
4362
9ed318d5
TH		 4363 segs = skb_shinfo(skb)->gso_segs ?: 1;
4364 /* multiply data chunks by size of headers */
4365 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4366
bc7f75fa 4367 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4368 tx_ring->buffer_info[i].segs = segs;
4369 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4370 tx_ring->buffer_info[first].next_to_watch = i;
4371
4372 return count;
03b1320d
AD		 4373
4374dma_error:
4375 dev_err(&pdev->dev, "TX DMA map failed\n");
4376 buffer_info->dma = 0;
c1fa347f 4377 if (count)
03b1320d 4378 count--;
c1fa347f
RK		 4379
4380 while (count--) {
4381 if (i==0)
03b1320d 4382 i += tx_ring->count;
c1fa347f 4383 i--;
03b1320d
AD		 4384 buffer_info = &tx_ring->buffer_info[i];
4385 e1000_put_txbuf(adapter, buffer_info);;
4386 }
4387
4388 return 0;
bc7f75fa
AK		 4389}
4390
4391static void e1000_tx_queue(struct e1000_adapter *adapter,
4392 int tx_flags, int count)
4393{
4394 struct e1000_ring *tx_ring = adapter->tx_ring;
4395 struct e1000_tx_desc *tx_desc = NULL;
4396 struct e1000_buffer *buffer_info;
4397 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4398 unsigned int i;
4399
4400 if (tx_flags & E1000_TX_FLAGS_TSO) {
4401 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4402 E1000_TXD_CMD_TSE;
4403 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4404
4405 if (tx_flags & E1000_TX_FLAGS_IPV4)
4406 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4407 }
4408
4409 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4410 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4411 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4412 }
4413
4414 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4415 txd_lower |= E1000_TXD_CMD_VLE;
4416 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4417 }
4418
4419 i = tx_ring->next_to_use;
4420
4421 while (count--) {
4422 buffer_info = &tx_ring->buffer_info[i];
4423 tx_desc = E1000_TX_DESC(*tx_ring, i);
4424 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4425 tx_desc->lower.data =
4426 cpu_to_le32(txd_lower | buffer_info->length);
4427 tx_desc->upper.data = cpu_to_le32(txd_upper);
4428
4429 i++;
4430 if (i == tx_ring->count)
4431 i = 0;
4432 }
4433
4434 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4435
ad68076e
BA		 4436 /*
4437 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4438 * know there are new descriptors to fetch. (Only
4439 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4440 * such as IA-64).
4441 */
bc7f75fa
AK		 4442 wmb();
4443
4444 tx_ring->next_to_use = i;
4445 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4446 /*
4447 * we need this if more than one processor can write to our tail
4448 * at a time, it synchronizes IO on IA64/Altix systems
4449 */
bc7f75fa
AK		 4450 mmiowb();
4451}
4452
4453#define MINIMUM_DHCP_PACKET_SIZE 282
4454static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4455 struct sk_buff *skb)
4456{
4457 struct e1000_hw *hw = &adapter->hw;
4458 u16 length, offset;
4459
4460 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4461 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4462 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4463 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4464 return 0;
4465 }
4466
4467 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4468 return 0;
4469
4470 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4471 return 0;
4472
4473 {
4474 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4475 struct udphdr *udp;
4476
4477 if (ip->protocol != IPPROTO_UDP)
4478 return 0;
4479
4480 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4481 if (ntohs(udp->dest) != 67)
4482 return 0;
4483
4484 offset = (u8 *)udp + 8 - skb->data;
4485 length = skb->len - offset;
4486 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4487 }
4488
4489 return 0;
4490}
4491
4492static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4493{
4494 struct e1000_adapter *adapter = netdev_priv(netdev);
4495
4496 netif_stop_queue(netdev);
ad68076e
BA		 4497 /*
4498 * Herbert's original patch had:
bc7f75fa 4499 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4500 * but since that doesn't exist yet, just open code it.
4501 */
bc7f75fa
AK		 4502 smp_mb();
4503
ad68076e
BA		 4504 /*
4505 * We need to check again in a case another CPU has just
4506 * made room available.
4507 */
bc7f75fa
AK		 4508 if (e1000_desc_unused(adapter->tx_ring) < size)
4509 return -EBUSY;
4510
4511 /* A reprieve! */
4512 netif_start_queue(netdev);
4513 ++adapter->restart_queue;
4514 return 0;
4515}
4516
4517static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4518{
4519 struct e1000_adapter *adapter = netdev_priv(netdev);
4520
4521 if (e1000_desc_unused(adapter->tx_ring) >= size)
4522 return 0;
4523 return __e1000_maybe_stop_tx(netdev, size);
4524}
4525
4526#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4527static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4528 struct net_device *netdev)
bc7f75fa
AK		 4529{
4530 struct e1000_adapter *adapter = netdev_priv(netdev);
4531 struct e1000_ring *tx_ring = adapter->tx_ring;
4532 unsigned int first;
4533 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4534 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4535 unsigned int tx_flags = 0;
e743d313 4536 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4537 unsigned int nr_frags;
4538 unsigned int mss;
bc7f75fa
AK		 4539 int count = 0;
4540 int tso;
4541 unsigned int f;
bc7f75fa
AK		 4542
4543 if (test_bit(__E1000_DOWN, &adapter->state)) {
4544 dev_kfree_skb_any(skb);
4545 return NETDEV_TX_OK;
4546 }
4547
4548 if (skb->len <= 0) {
4549 dev_kfree_skb_any(skb);
4550 return NETDEV_TX_OK;
4551 }
4552
4553 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4554 /*
4555 * The controller does a simple calculation to
bc7f75fa
AK		 4556 * make sure there is enough room in the FIFO before
4557 * initiating the DMA for each buffer. The calc is:
4558 * 4 = ceil(buffer len/mss). To make sure we don't
4559 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4560 * drops.
4561 */
bc7f75fa
AK		 4562 if (mss) {
4563 u8 hdr_len;
4564 max_per_txd = min(mss << 2, max_per_txd);
4565 max_txd_pwr = fls(max_per_txd) - 1;
4566
ad68076e
BA		 4567 /*
4568 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4569 * points to just header, pull a few bytes of payload from
4570 * frags into skb->data
4571 */
bc7f75fa 4572 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4573 /*
4574 * we do this workaround for ES2LAN, but it is un-necessary,
4575 * avoiding it could save a lot of cycles
4576 */
4e6c709c 4577 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4578 unsigned int pull_size;
4579
4580 pull_size = min((unsigned int)4, skb->data_len);
4581 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4582 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4583 dev_kfree_skb_any(skb);
4584 return NETDEV_TX_OK;
4585 }
e743d313 4586 len = skb_headlen(skb);
bc7f75fa
AK		 4587 }
4588 }
4589
4590 /* reserve a descriptor for the offload context */
4591 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4592 count++;
4593 count++;
4594
4595 count += TXD_USE_COUNT(len, max_txd_pwr);
4596
4597 nr_frags = skb_shinfo(skb)->nr_frags;
4598 for (f = 0; f < nr_frags; f++)
4599 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4600 max_txd_pwr);
4601
4602 if (adapter->hw.mac.tx_pkt_filtering)
4603 e1000_transfer_dhcp_info(adapter, skb);
4604
ad68076e
BA		 4605 /*
4606 * need: count + 2 desc gap to keep tail from touching
4607 * head, otherwise try next time
4608 */
92af3e95 4609 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4610 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4611
4612 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4613 tx_flags |= E1000_TX_FLAGS_VLAN;
4614 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4615 }
4616
4617 first = tx_ring->next_to_use;
4618
4619 tso = e1000_tso(adapter, skb);
4620 if (tso < 0) {
4621 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4622 return NETDEV_TX_OK;
4623 }
4624
4625 if (tso)
4626 tx_flags |= E1000_TX_FLAGS_TSO;
4627 else if (e1000_tx_csum(adapter, skb))
4628 tx_flags |= E1000_TX_FLAGS_CSUM;
4629
ad68076e
BA		 4630 /*
4631 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4632 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4633 * no longer assume, we must.
4634 */
bc7f75fa
AK		 4635 if (skb->protocol == htons(ETH_P_IP))
4636 tx_flags |= E1000_TX_FLAGS_IPV4;
4637
1b7719c4 4638 /* if count is 0 then mapping error has occured */
bc7f75fa 4639 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4640 if (count) {
4641 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4642 /* Make sure there is space in the ring for the next send. */
4643 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4644
4645 } else {
bc7f75fa 4646 dev_kfree_skb_any(skb);
1b7719c4
AD		 4647 tx_ring->buffer_info[first].time_stamp = 0;
4648 tx_ring->next_to_use = first;
bc7f75fa
AK		 4649 }
4650
bc7f75fa
AK		 4651 return NETDEV_TX_OK;
4652}
4653
4654/**
4655 * e1000_tx_timeout - Respond to a Tx Hang
4656 * @netdev: network interface device structure
4657 **/
4658static void e1000_tx_timeout(struct net_device *netdev)
4659{
4660 struct e1000_adapter *adapter = netdev_priv(netdev);
4661
4662 /* Do the reset outside of interrupt context */
4663 adapter->tx_timeout_count++;
4664 schedule_work(&adapter->reset_task);
4665}
4666
4667static void e1000_reset_task(struct work_struct *work)
4668{
4669 struct e1000_adapter *adapter;
4670 adapter = container_of(work, struct e1000_adapter, reset_task);
4671
84f4ee90
TI		 4672 e1000e_dump(adapter);
4673 e_err("Reset adapter\n");
bc7f75fa
AK		 4674 e1000e_reinit_locked(adapter);
4675}
4676
4677/**
4678 * e1000_get_stats - Get System Network Statistics
4679 * @netdev: network interface device structure
4680 *
4681 * Returns the address of the device statistics structure.
4682 * The statistics are actually updated from the timer callback.
4683 **/
4684static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4685{
bc7f75fa 4686 /* only return the current stats */
7274c20f 4687 return &netdev->stats;
bc7f75fa
AK		 4688}
4689
4690/**
4691 * e1000_change_mtu - Change the Maximum Transfer Unit
4692 * @netdev: network interface device structure
4693 * @new_mtu: new value for maximum frame size
4694 *
4695 * Returns 0 on success, negative on failure
4696 **/
4697static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4698{
4699 struct e1000_adapter *adapter = netdev_priv(netdev);
4700 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4701
2adc55c9
BA		 4702 /* Jumbo frame support */
4703 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4704 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4705 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4706 return -EINVAL;
4707 }
4708
2adc55c9
BA		 4709 /* Supported frame sizes */
4710 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4711 (max_frame > adapter->max_hw_frame_size)) {
4712 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4713 return -EINVAL;
4714 }
4715
6f461f6c
BA		 4716 /* 82573 Errata 17 */
4717 if (((adapter->hw.mac.type == e1000_82573) ||
4718 (adapter->hw.mac.type == e1000_82574)) &&
4719 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4720 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4721 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4722 }
4723
bc7f75fa
AK		 4724 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4725 msleep(1);
610c9928 4726 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4727 adapter->max_frame_size = max_frame;
610c9928
BA		 4728 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4729 netdev->mtu = new_mtu;
bc7f75fa
AK		 4730 if (netif_running(netdev))
4731 e1000e_down(adapter);
4732
ad68076e
BA		 4733 /*
4734 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4735 * means we reserve 2 more, this pushes us to allocate from the next
4736 * larger slab size.
ad68076e 4737 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4738 * However with the new *_jumbo_rx* routines, jumbo receives will use
4739 * fragmented skbs
ad68076e 4740 */
bc7f75fa 4741
9926146b 4742 if (max_frame <= 2048)
bc7f75fa
AK		 4743 adapter->rx_buffer_len = 2048;
4744 else
4745 adapter->rx_buffer_len = 4096;
4746
4747 /* adjust allocation if LPE protects us, and we aren't using SBP */
4748 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4749 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4750 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4751 + ETH_FCS_LEN;
bc7f75fa 4752
bc7f75fa
AK		 4753 if (netif_running(netdev))
4754 e1000e_up(adapter);
4755 else
4756 e1000e_reset(adapter);
4757
4758 clear_bit(__E1000_RESETTING, &adapter->state);
4759
4760 return 0;
4761}
4762
4763static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4764 int cmd)
4765{
4766 struct e1000_adapter *adapter = netdev_priv(netdev);
4767 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4768
318a94d6 4769 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4770 return -EOPNOTSUPP;
4771
4772 switch (cmd) {
4773 case SIOCGMIIPHY:
4774 data->phy_id = adapter->hw.phy.addr;
4775 break;
4776 case SIOCGMIIREG:
b16a002e
BA		 4777 e1000_phy_read_status(adapter);
4778
7c25769f
BA		 4779 switch (data->reg_num & 0x1F) {
4780 case MII_BMCR:
4781 data->val_out = adapter->phy_regs.bmcr;
4782 break;
4783 case MII_BMSR:
4784 data->val_out = adapter->phy_regs.bmsr;
4785 break;
4786 case MII_PHYSID1:
4787 data->val_out = (adapter->hw.phy.id >> 16);
4788 break;
4789 case MII_PHYSID2:
4790 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4791 break;
4792 case MII_ADVERTISE:
4793 data->val_out = adapter->phy_regs.advertise;
4794 break;
4795 case MII_LPA:
4796 data->val_out = adapter->phy_regs.lpa;
4797 break;
4798 case MII_EXPANSION:
4799 data->val_out = adapter->phy_regs.expansion;
4800 break;
4801 case MII_CTRL1000:
4802 data->val_out = adapter->phy_regs.ctrl1000;
4803 break;
4804 case MII_STAT1000:
4805 data->val_out = adapter->phy_regs.stat1000;
4806 break;
4807 case MII_ESTATUS:
4808 data->val_out = adapter->phy_regs.estatus;
4809 break;
4810 default:
bc7f75fa
AK		 4811 return -EIO;
4812 }
bc7f75fa
AK		 4813 break;
4814 case SIOCSMIIREG:
4815 default:
4816 return -EOPNOTSUPP;
4817 }
4818 return 0;
4819}
4820
4821static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4822{
4823 switch (cmd) {
4824 case SIOCGMIIPHY:
4825 case SIOCGMIIREG:
4826 case SIOCSMIIREG:
4827 return e1000_mii_ioctl(netdev, ifr, cmd);
4828 default:
4829 return -EOPNOTSUPP;
4830 }
4831}
4832
a4f58f54
BA		 4833static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4834{
4835 struct e1000_hw *hw = &adapter->hw;
4836 u32 i, mac_reg;
4837 u16 phy_reg;
4838 int retval = 0;
4839
4840 /* copy MAC RARs to PHY RARs */
4841 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4842 mac_reg = er32(RAL(i));
4843 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4844 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4845 mac_reg = er32(RAH(i));
4846 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4847 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4848 }
4849
4850 /* copy MAC MTA to PHY MTA */
4851 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4852 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4853 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4854 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4855 }
4856
4857 /* configure PHY Rx Control register */
4858 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4859 mac_reg = er32(RCTL);
4860 if (mac_reg & E1000_RCTL_UPE)
4861 phy_reg |= BM_RCTL_UPE;
4862 if (mac_reg & E1000_RCTL_MPE)
4863 phy_reg |= BM_RCTL_MPE;
4864 phy_reg &= ~(BM_RCTL_MO_MASK);
4865 if (mac_reg & E1000_RCTL_MO_3)
4866 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4867 << BM_RCTL_MO_SHIFT);
4868 if (mac_reg & E1000_RCTL_BAM)
4869 phy_reg |= BM_RCTL_BAM;
4870 if (mac_reg & E1000_RCTL_PMCF)
4871 phy_reg |= BM_RCTL_PMCF;
4872 mac_reg = er32(CTRL);
4873 if (mac_reg & E1000_CTRL_RFCE)
4874 phy_reg |= BM_RCTL_RFCE;
4875 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4876
4877 /* enable PHY wakeup in MAC register */
4878 ew32(WUFC, wufc);
4879 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4880
4881 /* configure and enable PHY wakeup in PHY registers */
4882 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4883 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4884
4885 /* activate PHY wakeup */
94d8186a 4886 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4887 if (retval) {
4888 e_err("Could not acquire PHY\n");
4889 return retval;
4890 }
4891 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4892 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4893 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4894 if (retval) {
4895 e_err("Could not read PHY page 769\n");
4896 goto out;
4897 }
4898 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4899 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4900 if (retval)
4901 e_err("Could not set PHY Host Wakeup bit\n");
4902out:
94d8186a 4903 hw->phy.ops.release(hw);
a4f58f54
BA		 4904
4905 return retval;
4906}
4907
23606cf5
RW		 4908static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
4909 bool runtime)
bc7f75fa
AK		 4910{
4911 struct net_device *netdev = pci_get_drvdata(pdev);
4912 struct e1000_adapter *adapter = netdev_priv(netdev);
4913 struct e1000_hw *hw = &adapter->hw;
4914 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 4915 /* Runtime suspend should only enable wakeup for link changes */
4916 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 4917 int retval = 0;
4918
4919 netif_device_detach(netdev);
4920
4921 if (netif_running(netdev)) {
4922 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4923 e1000e_down(adapter);
4924 e1000_free_irq(adapter);
4925 }
4662e82b 4926 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4927
4928 retval = pci_save_state(pdev);
4929 if (retval)
4930 return retval;
4931
4932 status = er32(STATUS);
4933 if (status & E1000_STATUS_LU)
4934 wufc &= ~E1000_WUFC_LNKC;
4935
4936 if (wufc) {
4937 e1000_setup_rctl(adapter);
4938 e1000_set_multi(netdev);
4939
4940 /* turn on all-multi mode if wake on multicast is enabled */
4941 if (wufc & E1000_WUFC_MC) {
4942 rctl = er32(RCTL);
4943 rctl |= E1000_RCTL_MPE;
4944 ew32(RCTL, rctl);
4945 }
4946
4947 ctrl = er32(CTRL);
4948 /* advertise wake from D3Cold */
4949 #define E1000_CTRL_ADVD3WUC 0x00100000
4950 /* phy power management enable */
4951 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 4952 ctrl |= E1000_CTRL_ADVD3WUC;
4953 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4954 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 4955 ew32(CTRL, ctrl);
4956
318a94d6
JK		 4957 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4958 adapter->hw.phy.media_type ==
4959 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4960 /* keep the laser running in D3 */
4961 ctrl_ext = er32(CTRL_EXT);
93a23f48 4962 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 4963 ew32(CTRL_EXT, ctrl_ext);
4964 }
4965
97ac8cae
BA		 4966 if (adapter->flags & FLAG_IS_ICH)
4967 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4968
bc7f75fa
AK		 4969 /* Allow time for pending master requests to run */
4970 e1000e_disable_pcie_master(&adapter->hw);
4971
82776a4b 4972 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 4973 /* enable wakeup by the PHY */
4974 retval = e1000_init_phy_wakeup(adapter, wufc);
4975 if (retval)
4976 return retval;
4977 } else {
4978 /* enable wakeup by the MAC */
4979 ew32(WUFC, wufc);
4980 ew32(WUC, E1000_WUC_PME_EN);
4981 }
bc7f75fa
AK		 4982 } else {
4983 ew32(WUC, 0);
4984 ew32(WUFC, 0);
bc7f75fa
AK		 4985 }
4986
4f9de721
RW		 4987 *enable_wake = !!wufc;
4988
bc7f75fa 4989 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 4990 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4991 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4992 *enable_wake = true;
bc7f75fa
AK		 4993
4994 if (adapter->hw.phy.type == e1000_phy_igp_3)
4995 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4996
ad68076e
BA		 4997 /*
4998 * Release control of h/w to f/w. If f/w is AMT enabled, this
4999 * would have already happened in close and is redundant.
5000 */
bc7f75fa
AK		 5001 e1000_release_hw_control(adapter);
5002
5003 pci_disable_device(pdev);
5004
4f9de721
RW		 5005 return 0;
5006}
5007
5008static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5009{
5010 if (sleep && wake) {
5011 pci_prepare_to_sleep(pdev);
5012 return;
5013 }
5014
5015 pci_wake_from_d3(pdev, wake);
5016 pci_set_power_state(pdev, PCI_D3hot);
5017}
5018
5019static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5020 bool wake)
5021{
5022 struct net_device *netdev = pci_get_drvdata(pdev);
5023 struct e1000_adapter *adapter = netdev_priv(netdev);
5024
005cbdfc
AD		 5025 /*
5026 * The pci-e switch on some quad port adapters will report a
5027 * correctable error when the MAC transitions from D0 to D3. To
5028 * prevent this we need to mask off the correctable errors on the
5029 * downstream port of the pci-e switch.
5030 */
5031 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5032 struct pci_dev *us_dev = pdev->bus->self;
5033 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5034 u16 devctl;
5035
5036 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5037 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5038 (devctl & ~PCI_EXP_DEVCTL_CERE));
5039
4f9de721 5040 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5041
5042 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5043 } else {
4f9de721 5044 e1000_power_off(pdev, sleep, wake);
005cbdfc 5045 }
bc7f75fa
AK		 5046}
5047
6f461f6c
BA		 5048#ifdef CONFIG_PCIEASPM
5049static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5050{
5051 pci_disable_link_state(pdev, state);
5052}
5053#else
5054static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5055{
5056 int pos;
6f461f6c 5057 u16 reg16;
1eae4eb2
AK		 5058
5059 /*
6f461f6c
BA		 5060 * Both device and parent should have the same ASPM setting.
5061 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5062 */
6f461f6c
BA		 5063 pos = pci_pcie_cap(pdev);
5064 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5065 reg16 &= ~state;
5066 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5067
0c75ba22
AB		 5068 if (!pdev->bus->self)
5069 return;
5070
6f461f6c
BA		 5071 pos = pci_pcie_cap(pdev->bus->self);
5072 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5073 reg16 &= ~state;
5074 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5075}
5076#endif
5077void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5078{
5079 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5080 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5081 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5082
5083 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5084}
5085
a0340162 5086#ifdef CONFIG_PM_OPS
23606cf5 5087static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5088{
23606cf5 5089 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5090}
5091
23606cf5 5092static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5093{
5094 struct net_device *netdev = pci_get_drvdata(pdev);
5095 struct e1000_adapter *adapter = netdev_priv(netdev);
5096 struct e1000_hw *hw = &adapter->hw;
5097 u32 err;
5098
5099 pci_set_power_state(pdev, PCI_D0);
5100 pci_restore_state(pdev);
28b8f04a 5101 pci_save_state(pdev);
6f461f6c
BA		 5102 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5103 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5104
4662e82b 5105 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5106 if (netif_running(netdev)) {
5107 err = e1000_request_irq(adapter);
5108 if (err)
5109 return err;
5110 }
5111
5112 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5113
5114 /* report the system wakeup cause from S3/S4 */
5115 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5116 u16 phy_data;
5117
5118 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5119 if (phy_data) {
5120 e_info("PHY Wakeup cause - %s\n",
5121 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5122 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5123 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5124 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5125 phy_data & E1000_WUS_LNKC ? "Link Status "
5126 " Change" : "other");
5127 }
5128 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5129 } else {
5130 u32 wus = er32(WUS);
5131 if (wus) {
5132 e_info("MAC Wakeup cause - %s\n",
5133 wus & E1000_WUS_EX ? "Unicast Packet" :
5134 wus & E1000_WUS_MC ? "Multicast Packet" :
5135 wus & E1000_WUS_BC ? "Broadcast Packet" :
5136 wus & E1000_WUS_MAG ? "Magic Packet" :
5137 wus & E1000_WUS_LNKC ? "Link Status Change" :
5138 "other");
5139 }
5140 ew32(WUS, ~0);
5141 }
5142
bc7f75fa 5143 e1000e_reset(adapter);
bc7f75fa 5144
cd791618 5145 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5146
5147 if (netif_running(netdev))
5148 e1000e_up(adapter);
5149
5150 netif_device_attach(netdev);
5151
ad68076e
BA		 5152 /*
5153 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5154 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5155 * under the control of the driver.
5156 */
c43bc57e 5157 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5158 e1000_get_hw_control(adapter);
5159
5160 return 0;
5161}
23606cf5 5162
a0340162
RW		 5163#ifdef CONFIG_PM_SLEEP
5164static int e1000_suspend(struct device *dev)
5165{
5166 struct pci_dev *pdev = to_pci_dev(dev);
5167 int retval;
5168 bool wake;
5169
5170 retval = __e1000_shutdown(pdev, &wake, false);
5171 if (!retval)
5172 e1000_complete_shutdown(pdev, true, wake);
5173
5174 return retval;
5175}
5176
23606cf5
RW		 5177static int e1000_resume(struct device *dev)
5178{
5179 struct pci_dev *pdev = to_pci_dev(dev);
5180 struct net_device *netdev = pci_get_drvdata(pdev);
5181 struct e1000_adapter *adapter = netdev_priv(netdev);
5182
5183 if (e1000e_pm_ready(adapter))
5184 adapter->idle_check = true;
5185
5186 return __e1000_resume(pdev);
5187}
a0340162
RW		 5188#endif /* CONFIG_PM_SLEEP */
5189
5190#ifdef CONFIG_PM_RUNTIME
5191static int e1000_runtime_suspend(struct device *dev)
5192{
5193 struct pci_dev *pdev = to_pci_dev(dev);
5194 struct net_device *netdev = pci_get_drvdata(pdev);
5195 struct e1000_adapter *adapter = netdev_priv(netdev);
5196
5197 if (e1000e_pm_ready(adapter)) {
5198 bool wake;
5199
5200 __e1000_shutdown(pdev, &wake, true);
5201 }
5202
5203 return 0;
5204}
5205
5206static int e1000_idle(struct device *dev)
5207{
5208 struct pci_dev *pdev = to_pci_dev(dev);
5209 struct net_device *netdev = pci_get_drvdata(pdev);
5210 struct e1000_adapter *adapter = netdev_priv(netdev);
5211
5212 if (!e1000e_pm_ready(adapter))
5213 return 0;
5214
5215 if (adapter->idle_check) {
5216 adapter->idle_check = false;
5217 if (!e1000e_has_link(adapter))
5218 pm_schedule_suspend(dev, MSEC_PER_SEC);
5219 }
5220
5221 return -EBUSY;
5222}
23606cf5
RW		 5223
5224static int e1000_runtime_resume(struct device *dev)
5225{
5226 struct pci_dev *pdev = to_pci_dev(dev);
5227 struct net_device *netdev = pci_get_drvdata(pdev);
5228 struct e1000_adapter *adapter = netdev_priv(netdev);
5229
5230 if (!e1000e_pm_ready(adapter))
5231 return 0;
5232
5233 adapter->idle_check = !dev->power.runtime_auto;
5234 return __e1000_resume(pdev);
5235}
a0340162
RW		 5236#endif /* CONFIG_PM_RUNTIME */
5237#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5238
5239static void e1000_shutdown(struct pci_dev *pdev)
5240{
4f9de721
RW		 5241 bool wake = false;
5242
23606cf5 5243 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5244
5245 if (system_state == SYSTEM_POWER_OFF)
5246 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5247}
5248
5249#ifdef CONFIG_NET_POLL_CONTROLLER
5250/*
5251 * Polling 'interrupt' - used by things like netconsole to send skbs
5252 * without having to re-enable interrupts. It's not called while
5253 * the interrupt routine is executing.
5254 */
5255static void e1000_netpoll(struct net_device *netdev)
5256{
5257 struct e1000_adapter *adapter = netdev_priv(netdev);
5258
5259 disable_irq(adapter->pdev->irq);
5260 e1000_intr(adapter->pdev->irq, netdev);
5261
bc7f75fa
AK		 5262 enable_irq(adapter->pdev->irq);
5263}
5264#endif
5265
5266/**
5267 * e1000_io_error_detected - called when PCI error is detected
5268 * @pdev: Pointer to PCI device
5269 * @state: The current pci connection state
5270 *
5271 * This function is called after a PCI bus error affecting
5272 * this device has been detected.
5273 */
5274static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5275 pci_channel_state_t state)
5276{
5277 struct net_device *netdev = pci_get_drvdata(pdev);
5278 struct e1000_adapter *adapter = netdev_priv(netdev);
5279
5280 netif_device_detach(netdev);
5281
c93b5a76
MM		 5282 if (state == pci_channel_io_perm_failure)
5283 return PCI_ERS_RESULT_DISCONNECT;
5284
bc7f75fa
AK		 5285 if (netif_running(netdev))
5286 e1000e_down(adapter);
5287 pci_disable_device(pdev);
5288
5289 /* Request a slot slot reset. */
5290 return PCI_ERS_RESULT_NEED_RESET;
5291}
5292
5293/**
5294 * e1000_io_slot_reset - called after the pci bus has been reset.
5295 * @pdev: Pointer to PCI device
5296 *
5297 * Restart the card from scratch, as if from a cold-boot. Implementation
5298 * resembles the first-half of the e1000_resume routine.
5299 */
5300static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5301{
5302 struct net_device *netdev = pci_get_drvdata(pdev);
5303 struct e1000_adapter *adapter = netdev_priv(netdev);
5304 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5305 int err;
111b9dc5 5306 pci_ers_result_t result;
bc7f75fa 5307
6f461f6c
BA		 5308 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5309 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5310 err = pci_enable_device_mem(pdev);
6e4f6f6b 5311 if (err) {
bc7f75fa
AK		 5312 dev_err(&pdev->dev,
5313 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5314 result = PCI_ERS_RESULT_DISCONNECT;
5315 } else {
5316 pci_set_master(pdev);
23606cf5 5317 pdev->state_saved = true;
111b9dc5 5318 pci_restore_state(pdev);
bc7f75fa 5319
111b9dc5
JB		 5320 pci_enable_wake(pdev, PCI_D3hot, 0);
5321 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5322
111b9dc5
JB		 5323 e1000e_reset(adapter);
5324 ew32(WUS, ~0);
5325 result = PCI_ERS_RESULT_RECOVERED;
5326 }
bc7f75fa 5327
111b9dc5
JB		 5328 pci_cleanup_aer_uncorrect_error_status(pdev);
5329
5330 return result;
bc7f75fa
AK		 5331}
5332
5333/**
5334 * e1000_io_resume - called when traffic can start flowing again.
5335 * @pdev: Pointer to PCI device
5336 *
5337 * This callback is called when the error recovery driver tells us that
5338 * its OK to resume normal operation. Implementation resembles the
5339 * second-half of the e1000_resume routine.
5340 */
5341static void e1000_io_resume(struct pci_dev *pdev)
5342{
5343 struct net_device *netdev = pci_get_drvdata(pdev);
5344 struct e1000_adapter *adapter = netdev_priv(netdev);
5345
cd791618 5346 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5347
5348 if (netif_running(netdev)) {
5349 if (e1000e_up(adapter)) {
5350 dev_err(&pdev->dev,
5351 "can't bring device back up after reset\n");
5352 return;
5353 }
5354 }
5355
5356 netif_device_attach(netdev);
5357
ad68076e
BA		 5358 /*
5359 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5360 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5361 * under the control of the driver.
5362 */
c43bc57e 5363 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5364 e1000_get_hw_control(adapter);
5365
5366}
5367
5368static void e1000_print_device_info(struct e1000_adapter *adapter)
5369{
5370 struct e1000_hw *hw = &adapter->hw;
5371 struct net_device *netdev = adapter->netdev;
69e3fd8c 5372 u32 pba_num;
bc7f75fa
AK		 5373
5374 /* print bus type/speed/width info */
7c510e4b 5375 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5376 /* bus width */
5377 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5378 "Width x1"),
5379 /* MAC address */
7c510e4b 5380 netdev->dev_addr);
44defeb3
JK		 5381 e_info("Intel(R) PRO/%s Network Connection\n",
5382 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 5383 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 5384 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5385 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 5386}
5387
10aa4c04
AK		 5388static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5389{
5390 struct e1000_hw *hw = &adapter->hw;
5391 int ret_val;
5392 u16 buf = 0;
5393
5394 if (hw->mac.type != e1000_82573)
5395 return;
5396
5397 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5398 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5399 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5400 dev_warn(&adapter->pdev->dev,
5401 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5402 }
10aa4c04
AK		 5403}
5404
651c2466
SH		 5405static const struct net_device_ops e1000e_netdev_ops = {
5406 .ndo_open = e1000_open,
5407 .ndo_stop = e1000_close,
00829823 5408 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 5409 .ndo_get_stats = e1000_get_stats,
5410 .ndo_set_multicast_list = e1000_set_multi,
5411 .ndo_set_mac_address = e1000_set_mac,
5412 .ndo_change_mtu = e1000_change_mtu,
5413 .ndo_do_ioctl = e1000_ioctl,
5414 .ndo_tx_timeout = e1000_tx_timeout,
5415 .ndo_validate_addr = eth_validate_addr,
5416
5417 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5418 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5419 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5420#ifdef CONFIG_NET_POLL_CONTROLLER
5421 .ndo_poll_controller = e1000_netpoll,
5422#endif
5423};
5424
bc7f75fa
AK		 5425/**
5426 * e1000_probe - Device Initialization Routine
5427 * @pdev: PCI device information struct
5428 * @ent: entry in e1000_pci_tbl
5429 *
5430 * Returns 0 on success, negative on failure
5431 *
5432 * e1000_probe initializes an adapter identified by a pci_dev structure.
5433 * The OS initialization, configuring of the adapter private structure,
5434 * and a hardware reset occur.
5435 **/
5436static int __devinit e1000_probe(struct pci_dev *pdev,
5437 const struct pci_device_id *ent)
5438{
5439 struct net_device *netdev;
5440 struct e1000_adapter *adapter;
5441 struct e1000_hw *hw;
5442 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5443 resource_size_t mmio_start, mmio_len;
5444 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5445
5446 static int cards_found;
5447 int i, err, pci_using_dac;
5448 u16 eeprom_data = 0;
5449 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5450
6f461f6c
BA		 5451 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5452 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5453
f0f422e5 5454 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5455 if (err)
5456 return err;
5457
5458 pci_using_dac = 0;
0be3f55f 5459 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5460 if (!err) {
0be3f55f 5461 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5462 if (!err)
5463 pci_using_dac = 1;
5464 } else {
0be3f55f 5465 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5466 if (err) {
0be3f55f
NN		 5467 err = dma_set_coherent_mask(&pdev->dev,
5468 DMA_BIT_MASK(32));
bc7f75fa
AK		 5469 if (err) {
5470 dev_err(&pdev->dev, "No usable DMA "
5471 "configuration, aborting\n");
5472 goto err_dma;
5473 }
5474 }
5475 }
5476
e8de1481 5477 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5478 pci_select_bars(pdev, IORESOURCE_MEM),
5479 e1000e_driver_name);
bc7f75fa
AK		 5480 if (err)
5481 goto err_pci_reg;
5482
68eac460 5483 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5484 pci_enable_pcie_error_reporting(pdev);
68eac460 5485
bc7f75fa 5486 pci_set_master(pdev);
438b365a
BA		 5487 /* PCI config space info */
5488 err = pci_save_state(pdev);
5489 if (err)
5490 goto err_alloc_etherdev;
bc7f75fa
AK		 5491
5492 err = -ENOMEM;
5493 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5494 if (!netdev)
5495 goto err_alloc_etherdev;
5496
bc7f75fa
AK		 5497 SET_NETDEV_DEV(netdev, &pdev->dev);
5498
f85e4dfa
TH		 5499 netdev->irq = pdev->irq;
5500
bc7f75fa
AK		 5501 pci_set_drvdata(pdev, netdev);
5502 adapter = netdev_priv(netdev);
5503 hw = &adapter->hw;
5504 adapter->netdev = netdev;
5505 adapter->pdev = pdev;
5506 adapter->ei = ei;
5507 adapter->pba = ei->pba;
5508 adapter->flags = ei->flags;
eb7c3adb 5509 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5510 adapter->hw.adapter = adapter;
5511 adapter->hw.mac.type = ei->mac;
2adc55c9 5512 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5513 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5514
5515 mmio_start = pci_resource_start(pdev, 0);
5516 mmio_len = pci_resource_len(pdev, 0);
5517
5518 err = -EIO;
5519 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5520 if (!adapter->hw.hw_addr)
5521 goto err_ioremap;
5522
5523 if ((adapter->flags & FLAG_HAS_FLASH) &&
5524 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5525 flash_start = pci_resource_start(pdev, 1);
5526 flash_len = pci_resource_len(pdev, 1);
5527 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5528 if (!adapter->hw.flash_address)
5529 goto err_flashmap;
5530 }
5531
5532 /* construct the net_device struct */
651c2466 5533 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5534 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5535 netdev->watchdog_timeo = 5 * HZ;
5536 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5537 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5538
5539 netdev->mem_start = mmio_start;
5540 netdev->mem_end = mmio_start + mmio_len;
5541
5542 adapter->bd_number = cards_found++;
5543
4662e82b
BA		 5544 e1000e_check_options(adapter);
5545
bc7f75fa
AK		 5546 /* setup adapter struct */
5547 err = e1000_sw_init(adapter);
5548 if (err)
5549 goto err_sw_init;
5550
5551 err = -EIO;
5552
5553 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5554 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5555 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5556
69e3fd8c 5557 err = ei->get_variants(adapter);
bc7f75fa
AK		 5558 if (err)
5559 goto err_hw_init;
5560
4a770358
BA		 5561 if ((adapter->flags & FLAG_IS_ICH) &&
5562 (adapter->flags & FLAG_READ_ONLY_NVM))
5563 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5564
bc7f75fa
AK		 5565 hw->mac.ops.get_bus_info(&adapter->hw);
5566
318a94d6 5567 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5568
5569 /* Copper options */
318a94d6 5570 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5571 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5572 adapter->hw.phy.disable_polarity_correction = 0;
5573 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5574 }
5575
5576 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5577 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5578
5579 netdev->features = NETIF_F_SG |
5580 NETIF_F_HW_CSUM |
5581 NETIF_F_HW_VLAN_TX |
5582 NETIF_F_HW_VLAN_RX;
5583
5584 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5585 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5586
5587 netdev->features |= NETIF_F_TSO;
5588 netdev->features |= NETIF_F_TSO6;
5589
a5136e23
JK		 5590 netdev->vlan_features |= NETIF_F_TSO;
5591 netdev->vlan_features |= NETIF_F_TSO6;
5592 netdev->vlan_features |= NETIF_F_HW_CSUM;
5593 netdev->vlan_features |= NETIF_F_SG;
5594
bc7f75fa
AK		 5595 if (pci_using_dac)
5596 netdev->features |= NETIF_F_HIGHDMA;
5597
bc7f75fa
AK		 5598 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5599 adapter->flags |= FLAG_MNG_PT_ENABLED;
5600
ad68076e
BA		 5601 /*
5602 * before reading the NVM, reset the controller to
5603 * put the device in a known good starting state
5604 */
bc7f75fa
AK		 5605 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5606
5607 /*
5608 * systems with ASPM and others may see the checksum fail on the first
5609 * attempt. Let's give it a few tries
5610 */
5611 for (i = 0;; i++) {
5612 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5613 break;
5614 if (i == 2) {
44defeb3 5615 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5616 err = -EIO;
5617 goto err_eeprom;
5618 }
5619 }
5620
10aa4c04
AK		 5621 e1000_eeprom_checks(adapter);
5622
608f8a0d 5623 /* copy the MAC address */
bc7f75fa 5624 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5625 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5626
5627 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5628 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5629
5630 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5631 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5632 err = -EIO;
5633 goto err_eeprom;
5634 }
5635
5636 init_timer(&adapter->watchdog_timer);
5637 adapter->watchdog_timer.function = &e1000_watchdog;
5638 adapter->watchdog_timer.data = (unsigned long) adapter;
5639
5640 init_timer(&adapter->phy_info_timer);
5641 adapter->phy_info_timer.function = &e1000_update_phy_info;
5642 adapter->phy_info_timer.data = (unsigned long) adapter;
5643
5644 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5645 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5646 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5647 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5648 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5649
bc7f75fa
AK		 5650 /* Initialize link parameters. User can change them with ethtool */
5651 adapter->hw.mac.autoneg = 1;
309af40b 5652 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5653 adapter->hw.fc.requested_mode = e1000_fc_default;
5654 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5655 adapter->hw.phy.autoneg_advertised = 0x2f;
5656
5657 /* ring size defaults */
5658 adapter->rx_ring->count = 256;
5659 adapter->tx_ring->count = 256;
5660
5661 /*
5662 * Initial Wake on LAN setting - If APM wake is enabled in
5663 * the EEPROM, enable the ACPI Magic Packet filter
5664 */
5665 if (adapter->flags & FLAG_APME_IN_WUC) {
5666 /* APME bit in EEPROM is mapped to WUC.APME */
5667 eeprom_data = er32(WUC);
5668 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5669 if (eeprom_data & E1000_WUC_PHY_WAKE)
5670 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5671 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5672 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5673 (adapter->hw.bus.func == 1))
5674 e1000_read_nvm(&adapter->hw,
5675 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5676 else
5677 e1000_read_nvm(&adapter->hw,
5678 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5679 }
5680
5681 /* fetch WoL from EEPROM */
5682 if (eeprom_data & eeprom_apme_mask)
5683 adapter->eeprom_wol |= E1000_WUFC_MAG;
5684
5685 /*
5686 * now that we have the eeprom settings, apply the special cases
5687 * where the eeprom may be wrong or the board simply won't support
5688 * wake on lan on a particular port
5689 */
5690 if (!(adapter->flags & FLAG_HAS_WOL))
5691 adapter->eeprom_wol = 0;
5692
5693 /* initialize the wol settings based on the eeprom settings */
5694 adapter->wol = adapter->eeprom_wol;
6ff68026 5695 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5696
84527590
BA		 5697 /* save off EEPROM version number */
5698 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5699
bc7f75fa
AK		 5700 /* reset the hardware with the new settings */
5701 e1000e_reset(adapter);
5702
ad68076e
BA		 5703 /*
5704 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5705 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5706 * under the control of the driver.
5707 */
c43bc57e 5708 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5709 e1000_get_hw_control(adapter);
5710
bc7f75fa
AK		 5711 strcpy(netdev->name, "eth%d");
5712 err = register_netdev(netdev);
5713 if (err)
5714 goto err_register;
5715
9c563d20
JB		 5716 /* carrier off reporting is important to ethtool even BEFORE open */
5717 netif_carrier_off(netdev);
5718
bc7f75fa
AK		 5719 e1000_print_device_info(adapter);
5720
23606cf5
RW		 5721 if (pci_dev_run_wake(pdev)) {
5722 pm_runtime_set_active(&pdev->dev);
5723 pm_runtime_enable(&pdev->dev);
5724 }
5725 pm_schedule_suspend(&pdev->dev, MSEC_PER_SEC);
5726
bc7f75fa
AK		 5727 return 0;
5728
5729err_register:
c43bc57e
JB		 5730 if (!(adapter->flags & FLAG_HAS_AMT))
5731 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5732err_eeprom:
5733 if (!e1000_check_reset_block(&adapter->hw))
5734 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5735err_hw_init:
bc7f75fa 5736
bc7f75fa
AK		 5737 kfree(adapter->tx_ring);
5738 kfree(adapter->rx_ring);
5739err_sw_init:
c43bc57e
JB		 5740 if (adapter->hw.flash_address)
5741 iounmap(adapter->hw.flash_address);
e82f54ba 5742 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5743err_flashmap:
bc7f75fa
AK		 5744 iounmap(adapter->hw.hw_addr);
5745err_ioremap:
5746 free_netdev(netdev);
5747err_alloc_etherdev:
f0f422e5
BA		 5748 pci_release_selected_regions(pdev,
5749 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5750err_pci_reg:
5751err_dma:
5752 pci_disable_device(pdev);
5753 return err;
5754}
5755
5756/**
5757 * e1000_remove - Device Removal Routine
5758 * @pdev: PCI device information struct
5759 *
5760 * e1000_remove is called by the PCI subsystem to alert the driver
5761 * that it should release a PCI device. The could be caused by a
5762 * Hot-Plug event, or because the driver is going to be removed from
5763 * memory.
5764 **/
5765static void __devexit e1000_remove(struct pci_dev *pdev)
5766{
5767 struct net_device *netdev = pci_get_drvdata(pdev);
5768 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 5769 bool down = test_bit(__E1000_DOWN, &adapter->state);
5770
5771 pm_runtime_get_sync(&pdev->dev);
bc7f75fa 5772
ad68076e
BA		 5773 /*
5774 * flush_scheduled work may reschedule our watchdog task, so
5775 * explicitly disable watchdog tasks from being rescheduled
5776 */
23606cf5
RW		 5777 if (!down)
5778 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 5779 del_timer_sync(&adapter->watchdog_timer);
5780 del_timer_sync(&adapter->phy_info_timer);
5781
41cec6f1
BA		 5782 cancel_work_sync(&adapter->reset_task);
5783 cancel_work_sync(&adapter->watchdog_task);
5784 cancel_work_sync(&adapter->downshift_task);
5785 cancel_work_sync(&adapter->update_phy_task);
5786 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5787 flush_scheduled_work();
5788
17f208de
BA		 5789 if (!(netdev->flags & IFF_UP))
5790 e1000_power_down_phy(adapter);
5791
23606cf5
RW		 5792 /* Don't lie to e1000_close() down the road. */
5793 if (!down)
5794 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 5795 unregister_netdev(netdev);
5796
23606cf5
RW		 5797 if (pci_dev_run_wake(pdev)) {
5798 pm_runtime_disable(&pdev->dev);
5799 pm_runtime_set_suspended(&pdev->dev);
5800 }
5801 pm_runtime_put_noidle(&pdev->dev);
5802
ad68076e
BA		 5803 /*
5804 * Release control of h/w to f/w. If f/w is AMT enabled, this
5805 * would have already happened in close and is redundant.
5806 */
bc7f75fa
AK		 5807 e1000_release_hw_control(adapter);
5808
4662e82b 5809 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5810 kfree(adapter->tx_ring);
5811 kfree(adapter->rx_ring);
5812
5813 iounmap(adapter->hw.hw_addr);
5814 if (adapter->hw.flash_address)
5815 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5816 pci_release_selected_regions(pdev,
5817 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5818
5819 free_netdev(netdev);
5820
111b9dc5 5821 /* AER disable */
19d5afd4 5822 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5823
bc7f75fa
AK		 5824 pci_disable_device(pdev);
5825}
5826
5827/* PCI Error Recovery (ERS) */
5828static struct pci_error_handlers e1000_err_handler = {
5829 .error_detected = e1000_io_error_detected,
5830 .slot_reset = e1000_io_slot_reset,
5831 .resume = e1000_io_resume,
5832};
5833
a3aa1884 5834static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 5835 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5836 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5837 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5838 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5839 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5840 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5841 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5842 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5843 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5844
bc7f75fa
AK		 5845 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5846 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5847 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5848 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5849
bc7f75fa
AK		 5850 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5851 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5852 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5853
4662e82b 5854 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5855 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5856 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5857
bc7f75fa
AK		 5858 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5859 board_80003es2lan },
5860 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5861 board_80003es2lan },
5862 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5863 board_80003es2lan },
5864 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5865 board_80003es2lan },
ad68076e 5866
bc7f75fa
AK		 5867 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5868 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5869 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5870 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5871 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5872 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5873 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5874 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5875
bc7f75fa
AK		 5876 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5877 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5878 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5879 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5880 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5881 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5882 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5883 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5884 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5885
5886 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5887 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5888 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5889
f4187b56
BA		 5890 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5891 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 5892 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 5893
a4f58f54
BA		 5894 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5895 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5896 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5897 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5898
bc7f75fa
AK		 5899 { } /* terminate list */
5900};
5901MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5902
a0340162 5903#ifdef CONFIG_PM_OPS
23606cf5 5904static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 5905 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
5906 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
5907 e1000_runtime_resume, e1000_idle)
23606cf5 5908};
e50208a0 5909#endif
23606cf5 5910
bc7f75fa
AK		 5911/* PCI Device API Driver */
5912static struct pci_driver e1000_driver = {
5913 .name = e1000e_driver_name,
5914 .id_table = e1000_pci_tbl,
5915 .probe = e1000_probe,
5916 .remove = __devexit_p(e1000_remove),
a0340162 5917#ifdef CONFIG_PM_OPS
23606cf5 5918 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 5919#endif
5920 .shutdown = e1000_shutdown,
5921 .err_handler = &e1000_err_handler
5922};
5923
5924/**
5925 * e1000_init_module - Driver Registration Routine
5926 *
5927 * e1000_init_module is the first routine called when the driver is
5928 * loaded. All it does is register with the PCI subsystem.
5929 **/
5930static int __init e1000_init_module(void)
5931{
5932 int ret;
8544b9f7
BA		 5933 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
5934 e1000e_driver_version);
5935 pr_info("Copyright (c) 1999 - 2009 Intel Corporation.\n");
bc7f75fa 5936 ret = pci_register_driver(&e1000_driver);
53ec5498 5937
bc7f75fa
AK		 5938 return ret;
5939}
5940module_init(e1000_init_module);
5941
5942/**
5943 * e1000_exit_module - Driver Exit Cleanup Routine
5944 *
5945 * e1000_exit_module is called just before the driver is removed
5946 * from memory.
5947 **/
5948static void __exit e1000_exit_module(void)
5949{
5950 pci_unregister_driver(&e1000_driver);
5951}
5952module_exit(e1000_exit_module);
5953
5954
5955MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5956MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5957MODULE_LICENSE("GPL");
5958MODULE_VERSION(DRV_VERSION);
5959
5960/* e1000_main.c */
Clone of davem's net-next-2.6 tree