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bridge: Remove unused age_list
[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
111b9dc5 47#include <linux/aer.h>
bc7f75fa
AK		 48
49#include "e1000.h"
50
3be8c940 51#define DRV_VERSION "1.0.2-k2"
bc7f75fa
AK		 52char e1000e_driver_name[] = "e1000e";
53const char e1000e_driver_version[] = DRV_VERSION;
54
55static const struct e1000_info *e1000_info_tbl[] = {
56 [board_82571] = &e1000_82571_info,
57 [board_82572] = &e1000_82572_info,
58 [board_82573] = &e1000_82573_info,
4662e82b 59 [board_82574] = &e1000_82574_info,
8c81c9c3 60 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 61 [board_80003es2lan] = &e1000_es2_info,
62 [board_ich8lan] = &e1000_ich8_info,
63 [board_ich9lan] = &e1000_ich9_info,
f4187b56 64 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 65 [board_pchlan] = &e1000_pch_info,
bc7f75fa
AK		 66};
67
bc7f75fa
AK		 68/**
69 * e1000_desc_unused - calculate if we have unused descriptors
70 **/
71static int e1000_desc_unused(struct e1000_ring *ring)
72{
73 if (ring->next_to_clean > ring->next_to_use)
74 return ring->next_to_clean - ring->next_to_use - 1;
75
76 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
77}
78
79/**
ad68076e 80 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 81 * @adapter: board private structure
82 * @status: descriptor status field as written by hardware
83 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
84 * @skb: pointer to sk_buff to be indicated to stack
85 **/
86static void e1000_receive_skb(struct e1000_adapter *adapter,
87 struct net_device *netdev,
88 struct sk_buff *skb,
a39fe742 89 u8 status, __le16 vlan)
bc7f75fa
AK		 90{
91 skb->protocol = eth_type_trans(skb, netdev);
92
93 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 94 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
95 le16_to_cpu(vlan), skb);
bc7f75fa 96 else
89c88b16 97 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 98}
99
100/**
101 * e1000_rx_checksum - Receive Checksum Offload for 82543
102 * @adapter: board private structure
103 * @status_err: receive descriptor status and error fields
104 * @csum: receive descriptor csum field
105 * @sk_buff: socket buffer with received data
106 **/
107static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
108 u32 csum, struct sk_buff *skb)
109{
110 u16 status = (u16)status_err;
111 u8 errors = (u8)(status_err >> 24);
112 skb->ip_summed = CHECKSUM_NONE;
113
114 /* Ignore Checksum bit is set */
115 if (status & E1000_RXD_STAT_IXSM)
116 return;
117 /* TCP/UDP checksum error bit is set */
118 if (errors & E1000_RXD_ERR_TCPE) {
119 /* let the stack verify checksum errors */
120 adapter->hw_csum_err++;
121 return;
122 }
123
124 /* TCP/UDP Checksum has not been calculated */
125 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
126 return;
127
128 /* It must be a TCP or UDP packet with a valid checksum */
129 if (status & E1000_RXD_STAT_TCPCS) {
130 /* TCP checksum is good */
131 skb->ip_summed = CHECKSUM_UNNECESSARY;
132 } else {
ad68076e
BA		 133 /*
134 * IP fragment with UDP payload
135 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 136 * and then put the value in host order for further stack use.
137 */
a39fe742
AV		 138 __sum16 sum = (__force __sum16)htons(csum);
139 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 140 skb->ip_summed = CHECKSUM_COMPLETE;
141 }
142 adapter->hw_csum_good++;
143}
144
145/**
146 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
147 * @adapter: address of board private structure
148 **/
149static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
150 int cleaned_count)
151{
152 struct net_device *netdev = adapter->netdev;
153 struct pci_dev *pdev = adapter->pdev;
154 struct e1000_ring *rx_ring = adapter->rx_ring;
155 struct e1000_rx_desc *rx_desc;
156 struct e1000_buffer *buffer_info;
157 struct sk_buff *skb;
158 unsigned int i;
89d71a66 159 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 160
161 i = rx_ring->next_to_use;
162 buffer_info = &rx_ring->buffer_info[i];
163
164 while (cleaned_count--) {
165 skb = buffer_info->skb;
166 if (skb) {
167 skb_trim(skb, 0);
168 goto map_skb;
169 }
170
89d71a66 171 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 172 if (!skb) {
173 /* Better luck next round */
174 adapter->alloc_rx_buff_failed++;
175 break;
176 }
177
bc7f75fa
AK		 178 buffer_info->skb = skb;
179map_skb:
180 buffer_info->dma = pci_map_single(pdev, skb->data,
181 adapter->rx_buffer_len,
182 PCI_DMA_FROMDEVICE);
8d8bb39b 183 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 184 dev_err(&pdev->dev, "RX DMA map failed\n");
185 adapter->rx_dma_failed++;
186 break;
187 }
188
189 rx_desc = E1000_RX_DESC(*rx_ring, i);
190 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
191
192 i++;
193 if (i == rx_ring->count)
194 i = 0;
195 buffer_info = &rx_ring->buffer_info[i];
196 }
197
198 if (rx_ring->next_to_use != i) {
199 rx_ring->next_to_use = i;
200 if (i-- == 0)
201 i = (rx_ring->count - 1);
202
ad68076e
BA		 203 /*
204 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 205 * know there are new descriptors to fetch. (Only
206 * applicable for weak-ordered memory model archs,
ad68076e
BA		 207 * such as IA-64).
208 */
bc7f75fa
AK		 209 wmb();
210 writel(i, adapter->hw.hw_addr + rx_ring->tail);
211 }
212}
213
214/**
215 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
216 * @adapter: address of board private structure
217 **/
218static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
219 int cleaned_count)
220{
221 struct net_device *netdev = adapter->netdev;
222 struct pci_dev *pdev = adapter->pdev;
223 union e1000_rx_desc_packet_split *rx_desc;
224 struct e1000_ring *rx_ring = adapter->rx_ring;
225 struct e1000_buffer *buffer_info;
226 struct e1000_ps_page *ps_page;
227 struct sk_buff *skb;
228 unsigned int i, j;
229
230 i = rx_ring->next_to_use;
231 buffer_info = &rx_ring->buffer_info[i];
232
233 while (cleaned_count--) {
234 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
235
236 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 237 ps_page = &buffer_info->ps_pages[j];
238 if (j >= adapter->rx_ps_pages) {
239 /* all unused desc entries get hw null ptr */
a39fe742 240 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 241 continue;
242 }
243 if (!ps_page->page) {
244 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 245 if (!ps_page->page) {
47f44e40
AK		 246 adapter->alloc_rx_buff_failed++;
247 goto no_buffers;
248 }
249 ps_page->dma = pci_map_page(pdev,
250 ps_page->page,
251 0, PAGE_SIZE,
252 PCI_DMA_FROMDEVICE);
8d8bb39b 253 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 254 dev_err(&adapter->pdev->dev,
255 "RX DMA page map failed\n");
256 adapter->rx_dma_failed++;
257 goto no_buffers;
bc7f75fa 258 }
bc7f75fa 259 }
47f44e40
AK		 260 /*
261 * Refresh the desc even if buffer_addrs
262 * didn't change because each write-back
263 * erases this info.
264 */
265 rx_desc->read.buffer_addr[j+1] =
266 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 267 }
268
89d71a66
ED		 269 skb = netdev_alloc_skb_ip_align(netdev,
270 adapter->rx_ps_bsize0);
bc7f75fa
AK		 271
272 if (!skb) {
273 adapter->alloc_rx_buff_failed++;
274 break;
275 }
276
bc7f75fa
AK		 277 buffer_info->skb = skb;
278 buffer_info->dma = pci_map_single(pdev, skb->data,
279 adapter->rx_ps_bsize0,
280 PCI_DMA_FROMDEVICE);
8d8bb39b 281 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 282 dev_err(&pdev->dev, "RX DMA map failed\n");
283 adapter->rx_dma_failed++;
284 /* cleanup skb */
285 dev_kfree_skb_any(skb);
286 buffer_info->skb = NULL;
287 break;
288 }
289
290 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
291
292 i++;
293 if (i == rx_ring->count)
294 i = 0;
295 buffer_info = &rx_ring->buffer_info[i];
296 }
297
298no_buffers:
299 if (rx_ring->next_to_use != i) {
300 rx_ring->next_to_use = i;
301
302 if (!(i--))
303 i = (rx_ring->count - 1);
304
ad68076e
BA		 305 /*
306 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 307 * know there are new descriptors to fetch. (Only
308 * applicable for weak-ordered memory model archs,
ad68076e
BA		 309 * such as IA-64).
310 */
bc7f75fa 311 wmb();
ad68076e
BA		 312 /*
313 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 314 * descriptors are 32 bytes...so we increment tail
315 * twice as much.
316 */
317 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
318 }
319}
320
97ac8cae
BA		 321/**
322 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
323 * @adapter: address of board private structure
97ac8cae
BA		 324 * @cleaned_count: number of buffers to allocate this pass
325 **/
326
327static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
328 int cleaned_count)
329{
330 struct net_device *netdev = adapter->netdev;
331 struct pci_dev *pdev = adapter->pdev;
332 struct e1000_rx_desc *rx_desc;
333 struct e1000_ring *rx_ring = adapter->rx_ring;
334 struct e1000_buffer *buffer_info;
335 struct sk_buff *skb;
336 unsigned int i;
89d71a66 337 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 338
339 i = rx_ring->next_to_use;
340 buffer_info = &rx_ring->buffer_info[i];
341
342 while (cleaned_count--) {
343 skb = buffer_info->skb;
344 if (skb) {
345 skb_trim(skb, 0);
346 goto check_page;
347 }
348
89d71a66 349 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 350 if (unlikely(!skb)) {
351 /* Better luck next round */
352 adapter->alloc_rx_buff_failed++;
353 break;
354 }
355
97ac8cae
BA		 356 buffer_info->skb = skb;
357check_page:
358 /* allocate a new page if necessary */
359 if (!buffer_info->page) {
360 buffer_info->page = alloc_page(GFP_ATOMIC);
361 if (unlikely(!buffer_info->page)) {
362 adapter->alloc_rx_buff_failed++;
363 break;
364 }
365 }
366
367 if (!buffer_info->dma)
368 buffer_info->dma = pci_map_page(pdev,
369 buffer_info->page, 0,
370 PAGE_SIZE,
371 PCI_DMA_FROMDEVICE);
372
373 rx_desc = E1000_RX_DESC(*rx_ring, i);
374 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
375
376 if (unlikely(++i == rx_ring->count))
377 i = 0;
378 buffer_info = &rx_ring->buffer_info[i];
379 }
380
381 if (likely(rx_ring->next_to_use != i)) {
382 rx_ring->next_to_use = i;
383 if (unlikely(i-- == 0))
384 i = (rx_ring->count - 1);
385
386 /* Force memory writes to complete before letting h/w
387 * know there are new descriptors to fetch. (Only
388 * applicable for weak-ordered memory model archs,
389 * such as IA-64). */
390 wmb();
391 writel(i, adapter->hw.hw_addr + rx_ring->tail);
392 }
393}
394
bc7f75fa
AK		 395/**
396 * e1000_clean_rx_irq - Send received data up the network stack; legacy
397 * @adapter: board private structure
398 *
399 * the return value indicates whether actual cleaning was done, there
400 * is no guarantee that everything was cleaned
401 **/
402static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
403 int *work_done, int work_to_do)
404{
405 struct net_device *netdev = adapter->netdev;
406 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 407 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 408 struct e1000_ring *rx_ring = adapter->rx_ring;
409 struct e1000_rx_desc *rx_desc, *next_rxd;
410 struct e1000_buffer *buffer_info, *next_buffer;
411 u32 length;
412 unsigned int i;
413 int cleaned_count = 0;
414 bool cleaned = 0;
415 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
416
417 i = rx_ring->next_to_clean;
418 rx_desc = E1000_RX_DESC(*rx_ring, i);
419 buffer_info = &rx_ring->buffer_info[i];
420
421 while (rx_desc->status & E1000_RXD_STAT_DD) {
422 struct sk_buff *skb;
423 u8 status;
424
425 if (*work_done >= work_to_do)
426 break;
427 (*work_done)++;
428
429 status = rx_desc->status;
430 skb = buffer_info->skb;
431 buffer_info->skb = NULL;
432
433 prefetch(skb->data - NET_IP_ALIGN);
434
435 i++;
436 if (i == rx_ring->count)
437 i = 0;
438 next_rxd = E1000_RX_DESC(*rx_ring, i);
439 prefetch(next_rxd);
440
441 next_buffer = &rx_ring->buffer_info[i];
442
443 cleaned = 1;
444 cleaned_count++;
445 pci_unmap_single(pdev,
446 buffer_info->dma,
447 adapter->rx_buffer_len,
448 PCI_DMA_FROMDEVICE);
449 buffer_info->dma = 0;
450
451 length = le16_to_cpu(rx_desc->length);
452
b94b5028
JB		 453 /*
454 * !EOP means multiple descriptors were used to store a single
455 * packet, if that's the case we need to toss it. In fact, we
456 * need to toss every packet with the EOP bit clear and the
457 * next frame that _does_ have the EOP bit set, as it is by
458 * definition only a frame fragment
459 */
460 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
461 adapter->flags2 |= FLAG2_IS_DISCARDING;
462
463 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 464 /* All receives must fit into a single buffer */
3bb99fe2 465 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 466 /* recycle */
467 buffer_info->skb = skb;
b94b5028
JB		 468 if (status & E1000_RXD_STAT_EOP)
469 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 470 goto next_desc;
471 }
472
473 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
474 /* recycle */
475 buffer_info->skb = skb;
476 goto next_desc;
477 }
478
eb7c3adb
JK		 479 /* adjust length to remove Ethernet CRC */
480 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
481 length -= 4;
482
bc7f75fa
AK		 483 total_rx_bytes += length;
484 total_rx_packets++;
485
ad68076e
BA		 486 /*
487 * code added for copybreak, this should improve
bc7f75fa 488 * performance for small packets with large amounts
ad68076e
BA		 489 * of reassembly being done in the stack
490 */
bc7f75fa
AK		 491 if (length < copybreak) {
492 struct sk_buff *new_skb =
89d71a66 493 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 494 if (new_skb) {
808ff676
BA		 495 skb_copy_to_linear_data_offset(new_skb,
496 -NET_IP_ALIGN,
497 (skb->data -
498 NET_IP_ALIGN),
499 (length +
500 NET_IP_ALIGN));
bc7f75fa
AK		 501 /* save the skb in buffer_info as good */
502 buffer_info->skb = skb;
503 skb = new_skb;
504 }
505 /* else just continue with the old one */
506 }
507 /* end copybreak code */
508 skb_put(skb, length);
509
510 /* Receive Checksum Offload */
511 e1000_rx_checksum(adapter,
512 (u32)(status) |
513 ((u32)(rx_desc->errors) << 24),
514 le16_to_cpu(rx_desc->csum), skb);
515
516 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
517
518next_desc:
519 rx_desc->status = 0;
520
521 /* return some buffers to hardware, one at a time is too slow */
522 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
523 adapter->alloc_rx_buf(adapter, cleaned_count);
524 cleaned_count = 0;
525 }
526
527 /* use prefetched values */
528 rx_desc = next_rxd;
529 buffer_info = next_buffer;
530 }
531 rx_ring->next_to_clean = i;
532
533 cleaned_count = e1000_desc_unused(rx_ring);
534 if (cleaned_count)
535 adapter->alloc_rx_buf(adapter, cleaned_count);
536
bc7f75fa 537 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 538 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 539 netdev->stats.rx_bytes += total_rx_bytes;
540 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 541 return cleaned;
542}
543
bc7f75fa
AK		 544static void e1000_put_txbuf(struct e1000_adapter *adapter,
545 struct e1000_buffer *buffer_info)
546{
03b1320d
AD		 547 if (buffer_info->dma) {
548 if (buffer_info->mapped_as_page)
549 pci_unmap_page(adapter->pdev, buffer_info->dma,
550 buffer_info->length, PCI_DMA_TODEVICE);
551 else
552 pci_unmap_single(adapter->pdev, buffer_info->dma,
553 buffer_info->length,
554 PCI_DMA_TODEVICE);
555 buffer_info->dma = 0;
556 }
bc7f75fa
AK		 557 if (buffer_info->skb) {
558 dev_kfree_skb_any(buffer_info->skb);
559 buffer_info->skb = NULL;
560 }
1b7719c4 561 buffer_info->time_stamp = 0;
bc7f75fa
AK		 562}
563
41cec6f1 564static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 565{
41cec6f1
BA		 566 struct e1000_adapter *adapter = container_of(work,
567 struct e1000_adapter,
568 print_hang_task);
bc7f75fa
AK		 569 struct e1000_ring *tx_ring = adapter->tx_ring;
570 unsigned int i = tx_ring->next_to_clean;
571 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
572 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 573 struct e1000_hw *hw = &adapter->hw;
574 u16 phy_status, phy_1000t_status, phy_ext_status;
575 u16 pci_status;
576
577 e1e_rphy(hw, PHY_STATUS, &phy_status);
578 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
579 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 580
41cec6f1
BA		 581 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
582
583 /* detected Hardware unit hang */
584 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 585 " TDH <%x>\n"
586 " TDT <%x>\n"
587 " next_to_use <%x>\n"
588 " next_to_clean <%x>\n"
589 "buffer_info[next_to_clean]:\n"
590 " time_stamp <%lx>\n"
591 " next_to_watch <%x>\n"
592 " jiffies <%lx>\n"
41cec6f1
BA		 593 " next_to_watch.status <%x>\n"
594 "MAC Status <%x>\n"
595 "PHY Status <%x>\n"
596 "PHY 1000BASE-T Status <%x>\n"
597 "PHY Extended Status <%x>\n"
598 "PCI Status <%x>\n",
44defeb3
JK		 599 readl(adapter->hw.hw_addr + tx_ring->head),
600 readl(adapter->hw.hw_addr + tx_ring->tail),
601 tx_ring->next_to_use,
602 tx_ring->next_to_clean,
603 tx_ring->buffer_info[eop].time_stamp,
604 eop,
605 jiffies,
41cec6f1
BA		 606 eop_desc->upper.fields.status,
607 er32(STATUS),
608 phy_status,
609 phy_1000t_status,
610 phy_ext_status,
611 pci_status);
bc7f75fa
AK		 612}
613
614/**
615 * e1000_clean_tx_irq - Reclaim resources after transmit completes
616 * @adapter: board private structure
617 *
618 * the return value indicates whether actual cleaning was done, there
619 * is no guarantee that everything was cleaned
620 **/
621static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
622{
623 struct net_device *netdev = adapter->netdev;
624 struct e1000_hw *hw = &adapter->hw;
625 struct e1000_ring *tx_ring = adapter->tx_ring;
626 struct e1000_tx_desc *tx_desc, *eop_desc;
627 struct e1000_buffer *buffer_info;
628 unsigned int i, eop;
629 unsigned int count = 0;
bc7f75fa
AK		 630 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
631
632 i = tx_ring->next_to_clean;
633 eop = tx_ring->buffer_info[i].next_to_watch;
634 eop_desc = E1000_TX_DESC(*tx_ring, eop);
635
12d04a3c
AD		 636 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
637 (count < tx_ring->count)) {
a86043c2
JB		 638 bool cleaned = false;
639 for (; !cleaned; count++) {
bc7f75fa
AK		 640 tx_desc = E1000_TX_DESC(*tx_ring, i);
641 buffer_info = &tx_ring->buffer_info[i];
642 cleaned = (i == eop);
643
644 if (cleaned) {
645 struct sk_buff *skb = buffer_info->skb;
646 unsigned int segs, bytecount;
647 segs = skb_shinfo(skb)->gso_segs ?: 1;
648 /* multiply data chunks by size of headers */
649 bytecount = ((segs - 1) * skb_headlen(skb)) +
650 skb->len;
651 total_tx_packets += segs;
652 total_tx_bytes += bytecount;
653 }
654
655 e1000_put_txbuf(adapter, buffer_info);
656 tx_desc->upper.data = 0;
657
658 i++;
659 if (i == tx_ring->count)
660 i = 0;
661 }
662
663 eop = tx_ring->buffer_info[i].next_to_watch;
664 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 665 }
666
667 tx_ring->next_to_clean = i;
668
669#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 670 if (count && netif_carrier_ok(netdev) &&
671 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 672 /* Make sure that anybody stopping the queue after this
673 * sees the new next_to_clean.
674 */
675 smp_mb();
676
677 if (netif_queue_stopped(netdev) &&
678 !(test_bit(__E1000_DOWN, &adapter->state))) {
679 netif_wake_queue(netdev);
680 ++adapter->restart_queue;
681 }
682 }
683
684 if (adapter->detect_tx_hung) {
41cec6f1
BA		 685 /*
686 * Detect a transmit hang in hardware, this serializes the
687 * check with the clearing of time_stamp and movement of i
688 */
bc7f75fa 689 adapter->detect_tx_hung = 0;
12d04a3c
AD		 690 if (tx_ring->buffer_info[i].time_stamp &&
691 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 692 + (adapter->tx_timeout_factor * HZ)) &&
693 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 694 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 695 netif_stop_queue(netdev);
696 }
697 }
698 adapter->total_tx_bytes += total_tx_bytes;
699 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 700 netdev->stats.tx_bytes += total_tx_bytes;
701 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 702 return (count < tx_ring->count);
bc7f75fa
AK		 703}
704
bc7f75fa
AK		 705/**
706 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
707 * @adapter: board private structure
708 *
709 * the return value indicates whether actual cleaning was done, there
710 * is no guarantee that everything was cleaned
711 **/
712static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
713 int *work_done, int work_to_do)
714{
3bb99fe2 715 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 716 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
717 struct net_device *netdev = adapter->netdev;
718 struct pci_dev *pdev = adapter->pdev;
719 struct e1000_ring *rx_ring = adapter->rx_ring;
720 struct e1000_buffer *buffer_info, *next_buffer;
721 struct e1000_ps_page *ps_page;
722 struct sk_buff *skb;
723 unsigned int i, j;
724 u32 length, staterr;
725 int cleaned_count = 0;
726 bool cleaned = 0;
727 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
728
729 i = rx_ring->next_to_clean;
730 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
731 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
732 buffer_info = &rx_ring->buffer_info[i];
733
734 while (staterr & E1000_RXD_STAT_DD) {
735 if (*work_done >= work_to_do)
736 break;
737 (*work_done)++;
738 skb = buffer_info->skb;
739
740 /* in the packet split case this is header only */
741 prefetch(skb->data - NET_IP_ALIGN);
742
743 i++;
744 if (i == rx_ring->count)
745 i = 0;
746 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
747 prefetch(next_rxd);
748
749 next_buffer = &rx_ring->buffer_info[i];
750
751 cleaned = 1;
752 cleaned_count++;
753 pci_unmap_single(pdev, buffer_info->dma,
754 adapter->rx_ps_bsize0,
755 PCI_DMA_FROMDEVICE);
756 buffer_info->dma = 0;
757
b94b5028
JB		 758 /* see !EOP comment in other rx routine */
759 if (!(staterr & E1000_RXD_STAT_EOP))
760 adapter->flags2 |= FLAG2_IS_DISCARDING;
761
762 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 763 e_dbg("Packet Split buffers didn't pick up the full "
764 "packet\n");
bc7f75fa 765 dev_kfree_skb_irq(skb);
b94b5028
JB		 766 if (staterr & E1000_RXD_STAT_EOP)
767 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 768 goto next_desc;
769 }
770
771 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
772 dev_kfree_skb_irq(skb);
773 goto next_desc;
774 }
775
776 length = le16_to_cpu(rx_desc->wb.middle.length0);
777
778 if (!length) {
3bb99fe2
BA		 779 e_dbg("Last part of the packet spanning multiple "
780 "descriptors\n");
bc7f75fa
AK		 781 dev_kfree_skb_irq(skb);
782 goto next_desc;
783 }
784
785 /* Good Receive */
786 skb_put(skb, length);
787
788 {
ad68076e
BA		 789 /*
790 * this looks ugly, but it seems compiler issues make it
791 * more efficient than reusing j
792 */
bc7f75fa
AK		 793 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
794
ad68076e
BA		 795 /*
796 * page alloc/put takes too long and effects small packet
797 * throughput, so unsplit small packets and save the alloc/put
798 * only valid in softirq (napi) context to call kmap_*
799 */
bc7f75fa
AK		 800 if (l1 && (l1 <= copybreak) &&
801 ((length + l1) <= adapter->rx_ps_bsize0)) {
802 u8 *vaddr;
803
47f44e40 804 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 805
ad68076e
BA		 806 /*
807 * there is no documentation about how to call
bc7f75fa 808 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 809 * very long
810 */
bc7f75fa
AK		 811 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
812 PAGE_SIZE, PCI_DMA_FROMDEVICE);
813 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
814 memcpy(skb_tail_pointer(skb), vaddr, l1);
815 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
816 pci_dma_sync_single_for_device(pdev, ps_page->dma,
817 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 818
eb7c3adb
JK		 819 /* remove the CRC */
820 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
821 l1 -= 4;
822
bc7f75fa
AK		 823 skb_put(skb, l1);
824 goto copydone;
825 } /* if */
826 }
827
828 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
829 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
830 if (!length)
831 break;
832
47f44e40 833 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 834 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
835 PCI_DMA_FROMDEVICE);
836 ps_page->dma = 0;
837 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
838 ps_page->page = NULL;
839 skb->len += length;
840 skb->data_len += length;
841 skb->truesize += length;
842 }
843
eb7c3adb
JK		 844 /* strip the ethernet crc, problem is we're using pages now so
845 * this whole operation can get a little cpu intensive
846 */
847 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
848 pskb_trim(skb, skb->len - 4);
849
bc7f75fa
AK		 850copydone:
851 total_rx_bytes += skb->len;
852 total_rx_packets++;
853
854 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
855 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
856
857 if (rx_desc->wb.upper.header_status &
858 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
859 adapter->rx_hdr_split++;
860
861 e1000_receive_skb(adapter, netdev, skb,
862 staterr, rx_desc->wb.middle.vlan);
863
864next_desc:
865 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
866 buffer_info->skb = NULL;
867
868 /* return some buffers to hardware, one at a time is too slow */
869 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
870 adapter->alloc_rx_buf(adapter, cleaned_count);
871 cleaned_count = 0;
872 }
873
874 /* use prefetched values */
875 rx_desc = next_rxd;
876 buffer_info = next_buffer;
877
878 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
879 }
880 rx_ring->next_to_clean = i;
881
882 cleaned_count = e1000_desc_unused(rx_ring);
883 if (cleaned_count)
884 adapter->alloc_rx_buf(adapter, cleaned_count);
885
bc7f75fa 886 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 887 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 888 netdev->stats.rx_bytes += total_rx_bytes;
889 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 890 return cleaned;
891}
892
97ac8cae
BA		 893/**
894 * e1000_consume_page - helper function
895 **/
896static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
897 u16 length)
898{
899 bi->page = NULL;
900 skb->len += length;
901 skb->data_len += length;
902 skb->truesize += length;
903}
904
905/**
906 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
907 * @adapter: board private structure
908 *
909 * the return value indicates whether actual cleaning was done, there
910 * is no guarantee that everything was cleaned
911 **/
912
913static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
914 int *work_done, int work_to_do)
915{
916 struct net_device *netdev = adapter->netdev;
917 struct pci_dev *pdev = adapter->pdev;
918 struct e1000_ring *rx_ring = adapter->rx_ring;
919 struct e1000_rx_desc *rx_desc, *next_rxd;
920 struct e1000_buffer *buffer_info, *next_buffer;
921 u32 length;
922 unsigned int i;
923 int cleaned_count = 0;
924 bool cleaned = false;
925 unsigned int total_rx_bytes=0, total_rx_packets=0;
926
927 i = rx_ring->next_to_clean;
928 rx_desc = E1000_RX_DESC(*rx_ring, i);
929 buffer_info = &rx_ring->buffer_info[i];
930
931 while (rx_desc->status & E1000_RXD_STAT_DD) {
932 struct sk_buff *skb;
933 u8 status;
934
935 if (*work_done >= work_to_do)
936 break;
937 (*work_done)++;
938
939 status = rx_desc->status;
940 skb = buffer_info->skb;
941 buffer_info->skb = NULL;
942
943 ++i;
944 if (i == rx_ring->count)
945 i = 0;
946 next_rxd = E1000_RX_DESC(*rx_ring, i);
947 prefetch(next_rxd);
948
949 next_buffer = &rx_ring->buffer_info[i];
950
951 cleaned = true;
952 cleaned_count++;
953 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
954 PCI_DMA_FROMDEVICE);
955 buffer_info->dma = 0;
956
957 length = le16_to_cpu(rx_desc->length);
958
959 /* errors is only valid for DD + EOP descriptors */
960 if (unlikely((status & E1000_RXD_STAT_EOP) &&
961 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
962 /* recycle both page and skb */
963 buffer_info->skb = skb;
964 /* an error means any chain goes out the window
965 * too */
966 if (rx_ring->rx_skb_top)
967 dev_kfree_skb(rx_ring->rx_skb_top);
968 rx_ring->rx_skb_top = NULL;
969 goto next_desc;
970 }
971
972#define rxtop rx_ring->rx_skb_top
973 if (!(status & E1000_RXD_STAT_EOP)) {
974 /* this descriptor is only the beginning (or middle) */
975 if (!rxtop) {
976 /* this is the beginning of a chain */
977 rxtop = skb;
978 skb_fill_page_desc(rxtop, 0, buffer_info->page,
979 0, length);
980 } else {
981 /* this is the middle of a chain */
982 skb_fill_page_desc(rxtop,
983 skb_shinfo(rxtop)->nr_frags,
984 buffer_info->page, 0, length);
985 /* re-use the skb, only consumed the page */
986 buffer_info->skb = skb;
987 }
988 e1000_consume_page(buffer_info, rxtop, length);
989 goto next_desc;
990 } else {
991 if (rxtop) {
992 /* end of the chain */
993 skb_fill_page_desc(rxtop,
994 skb_shinfo(rxtop)->nr_frags,
995 buffer_info->page, 0, length);
996 /* re-use the current skb, we only consumed the
997 * page */
998 buffer_info->skb = skb;
999 skb = rxtop;
1000 rxtop = NULL;
1001 e1000_consume_page(buffer_info, skb, length);
1002 } else {
1003 /* no chain, got EOP, this buf is the packet
1004 * copybreak to save the put_page/alloc_page */
1005 if (length <= copybreak &&
1006 skb_tailroom(skb) >= length) {
1007 u8 *vaddr;
1008 vaddr = kmap_atomic(buffer_info->page,
1009 KM_SKB_DATA_SOFTIRQ);
1010 memcpy(skb_tail_pointer(skb), vaddr,
1011 length);
1012 kunmap_atomic(vaddr,
1013 KM_SKB_DATA_SOFTIRQ);
1014 /* re-use the page, so don't erase
1015 * buffer_info->page */
1016 skb_put(skb, length);
1017 } else {
1018 skb_fill_page_desc(skb, 0,
1019 buffer_info->page, 0,
1020 length);
1021 e1000_consume_page(buffer_info, skb,
1022 length);
1023 }
1024 }
1025 }
1026
1027 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1028 e1000_rx_checksum(adapter,
1029 (u32)(status) |
1030 ((u32)(rx_desc->errors) << 24),
1031 le16_to_cpu(rx_desc->csum), skb);
1032
1033 /* probably a little skewed due to removing CRC */
1034 total_rx_bytes += skb->len;
1035 total_rx_packets++;
1036
1037 /* eth type trans needs skb->data to point to something */
1038 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1039 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1040 dev_kfree_skb(skb);
1041 goto next_desc;
1042 }
1043
1044 e1000_receive_skb(adapter, netdev, skb, status,
1045 rx_desc->special);
1046
1047next_desc:
1048 rx_desc->status = 0;
1049
1050 /* return some buffers to hardware, one at a time is too slow */
1051 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1052 adapter->alloc_rx_buf(adapter, cleaned_count);
1053 cleaned_count = 0;
1054 }
1055
1056 /* use prefetched values */
1057 rx_desc = next_rxd;
1058 buffer_info = next_buffer;
1059 }
1060 rx_ring->next_to_clean = i;
1061
1062 cleaned_count = e1000_desc_unused(rx_ring);
1063 if (cleaned_count)
1064 adapter->alloc_rx_buf(adapter, cleaned_count);
1065
1066 adapter->total_rx_bytes += total_rx_bytes;
1067 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1068 netdev->stats.rx_bytes += total_rx_bytes;
1069 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1070 return cleaned;
1071}
1072
bc7f75fa
AK		 1073/**
1074 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1075 * @adapter: board private structure
1076 **/
1077static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1078{
1079 struct e1000_ring *rx_ring = adapter->rx_ring;
1080 struct e1000_buffer *buffer_info;
1081 struct e1000_ps_page *ps_page;
1082 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1083 unsigned int i, j;
1084
1085 /* Free all the Rx ring sk_buffs */
1086 for (i = 0; i < rx_ring->count; i++) {
1087 buffer_info = &rx_ring->buffer_info[i];
1088 if (buffer_info->dma) {
1089 if (adapter->clean_rx == e1000_clean_rx_irq)
1090 pci_unmap_single(pdev, buffer_info->dma,
1091 adapter->rx_buffer_len,
1092 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1093 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1094 pci_unmap_page(pdev, buffer_info->dma,
1095 PAGE_SIZE,
1096 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1097 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1098 pci_unmap_single(pdev, buffer_info->dma,
1099 adapter->rx_ps_bsize0,
1100 PCI_DMA_FROMDEVICE);
1101 buffer_info->dma = 0;
1102 }
1103
97ac8cae
BA		 1104 if (buffer_info->page) {
1105 put_page(buffer_info->page);
1106 buffer_info->page = NULL;
1107 }
1108
bc7f75fa
AK		 1109 if (buffer_info->skb) {
1110 dev_kfree_skb(buffer_info->skb);
1111 buffer_info->skb = NULL;
1112 }
1113
1114 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1115 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1116 if (!ps_page->page)
1117 break;
1118 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1119 PCI_DMA_FROMDEVICE);
1120 ps_page->dma = 0;
1121 put_page(ps_page->page);
1122 ps_page->page = NULL;
1123 }
1124 }
1125
1126 /* there also may be some cached data from a chained receive */
1127 if (rx_ring->rx_skb_top) {
1128 dev_kfree_skb(rx_ring->rx_skb_top);
1129 rx_ring->rx_skb_top = NULL;
1130 }
1131
bc7f75fa
AK		 1132 /* Zero out the descriptor ring */
1133 memset(rx_ring->desc, 0, rx_ring->size);
1134
1135 rx_ring->next_to_clean = 0;
1136 rx_ring->next_to_use = 0;
b94b5028 1137 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1138
1139 writel(0, adapter->hw.hw_addr + rx_ring->head);
1140 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1141}
1142
a8f88ff5
JB		 1143static void e1000e_downshift_workaround(struct work_struct *work)
1144{
1145 struct e1000_adapter *adapter = container_of(work,
1146 struct e1000_adapter, downshift_task);
1147
1148 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1149}
1150
bc7f75fa
AK		 1151/**
1152 * e1000_intr_msi - Interrupt Handler
1153 * @irq: interrupt number
1154 * @data: pointer to a network interface device structure
1155 **/
1156static irqreturn_t e1000_intr_msi(int irq, void *data)
1157{
1158 struct net_device *netdev = data;
1159 struct e1000_adapter *adapter = netdev_priv(netdev);
1160 struct e1000_hw *hw = &adapter->hw;
1161 u32 icr = er32(ICR);
1162
ad68076e
BA		 1163 /*
1164 * read ICR disables interrupts using IAM
1165 */
bc7f75fa 1166
573cca8c 1167 if (icr & E1000_ICR_LSC) {
bc7f75fa 1168 hw->mac.get_link_status = 1;
ad68076e
BA		 1169 /*
1170 * ICH8 workaround-- Call gig speed drop workaround on cable
1171 * disconnect (LSC) before accessing any PHY registers
1172 */
bc7f75fa
AK		 1173 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1174 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1175 schedule_work(&adapter->downshift_task);
bc7f75fa 1176
ad68076e
BA		 1177 /*
1178 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1179 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1180 * adapter in watchdog
1181 */
bc7f75fa
AK		 1182 if (netif_carrier_ok(netdev) &&
1183 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1184 /* disable receives */
1185 u32 rctl = er32(RCTL);
1186 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1187 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1188 }
1189 /* guard against interrupt when we're going down */
1190 if (!test_bit(__E1000_DOWN, &adapter->state))
1191 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1192 }
1193
288379f0 1194 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1195 adapter->total_tx_bytes = 0;
1196 adapter->total_tx_packets = 0;
1197 adapter->total_rx_bytes = 0;
1198 adapter->total_rx_packets = 0;
288379f0 1199 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1200 }
1201
1202 return IRQ_HANDLED;
1203}
1204
1205/**
1206 * e1000_intr - Interrupt Handler
1207 * @irq: interrupt number
1208 * @data: pointer to a network interface device structure
1209 **/
1210static irqreturn_t e1000_intr(int irq, void *data)
1211{
1212 struct net_device *netdev = data;
1213 struct e1000_adapter *adapter = netdev_priv(netdev);
1214 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1215 u32 rctl, icr = er32(ICR);
4662e82b 1216
a68ea775 1217 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1218 return IRQ_NONE; /* Not our interrupt */
1219
ad68076e
BA		 1220 /*
1221 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1222 * not set, then the adapter didn't send an interrupt
1223 */
bc7f75fa
AK		 1224 if (!(icr & E1000_ICR_INT_ASSERTED))
1225 return IRQ_NONE;
1226
ad68076e
BA		 1227 /*
1228 * Interrupt Auto-Mask...upon reading ICR,
1229 * interrupts are masked. No need for the
1230 * IMC write
1231 */
bc7f75fa 1232
573cca8c 1233 if (icr & E1000_ICR_LSC) {
bc7f75fa 1234 hw->mac.get_link_status = 1;
ad68076e
BA		 1235 /*
1236 * ICH8 workaround-- Call gig speed drop workaround on cable
1237 * disconnect (LSC) before accessing any PHY registers
1238 */
bc7f75fa
AK		 1239 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1240 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1241 schedule_work(&adapter->downshift_task);
bc7f75fa 1242
ad68076e
BA		 1243 /*
1244 * 80003ES2LAN workaround--
bc7f75fa
AK		 1245 * For packet buffer work-around on link down event;
1246 * disable receives here in the ISR and
1247 * reset adapter in watchdog
1248 */
1249 if (netif_carrier_ok(netdev) &&
1250 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1251 /* disable receives */
1252 rctl = er32(RCTL);
1253 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1254 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1255 }
1256 /* guard against interrupt when we're going down */
1257 if (!test_bit(__E1000_DOWN, &adapter->state))
1258 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1259 }
1260
288379f0 1261 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1262 adapter->total_tx_bytes = 0;
1263 adapter->total_tx_packets = 0;
1264 adapter->total_rx_bytes = 0;
1265 adapter->total_rx_packets = 0;
288379f0 1266 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1267 }
1268
1269 return IRQ_HANDLED;
1270}
1271
4662e82b
BA		 1272static irqreturn_t e1000_msix_other(int irq, void *data)
1273{
1274 struct net_device *netdev = data;
1275 struct e1000_adapter *adapter = netdev_priv(netdev);
1276 struct e1000_hw *hw = &adapter->hw;
1277 u32 icr = er32(ICR);
1278
1279 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1280 if (!test_bit(__E1000_DOWN, &adapter->state))
1281 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1282 return IRQ_NONE;
1283 }
1284
1285 if (icr & adapter->eiac_mask)
1286 ew32(ICS, (icr & adapter->eiac_mask));
1287
1288 if (icr & E1000_ICR_OTHER) {
1289 if (!(icr & E1000_ICR_LSC))
1290 goto no_link_interrupt;
1291 hw->mac.get_link_status = 1;
1292 /* guard against interrupt when we're going down */
1293 if (!test_bit(__E1000_DOWN, &adapter->state))
1294 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1295 }
1296
1297no_link_interrupt:
a3c69fef
JB		 1298 if (!test_bit(__E1000_DOWN, &adapter->state))
1299 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1300
1301 return IRQ_HANDLED;
1302}
1303
1304
1305static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1306{
1307 struct net_device *netdev = data;
1308 struct e1000_adapter *adapter = netdev_priv(netdev);
1309 struct e1000_hw *hw = &adapter->hw;
1310 struct e1000_ring *tx_ring = adapter->tx_ring;
1311
1312
1313 adapter->total_tx_bytes = 0;
1314 adapter->total_tx_packets = 0;
1315
1316 if (!e1000_clean_tx_irq(adapter))
1317 /* Ring was not completely cleaned, so fire another interrupt */
1318 ew32(ICS, tx_ring->ims_val);
1319
1320 return IRQ_HANDLED;
1321}
1322
1323static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1324{
1325 struct net_device *netdev = data;
1326 struct e1000_adapter *adapter = netdev_priv(netdev);
1327
1328 /* Write the ITR value calculated at the end of the
1329 * previous interrupt.
1330 */
1331 if (adapter->rx_ring->set_itr) {
1332 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1333 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1334 adapter->rx_ring->set_itr = 0;
1335 }
1336
288379f0 1337 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1338 adapter->total_rx_bytes = 0;
1339 adapter->total_rx_packets = 0;
288379f0 1340 __napi_schedule(&adapter->napi);
4662e82b
BA		 1341 }
1342 return IRQ_HANDLED;
1343}
1344
1345/**
1346 * e1000_configure_msix - Configure MSI-X hardware
1347 *
1348 * e1000_configure_msix sets up the hardware to properly
1349 * generate MSI-X interrupts.
1350 **/
1351static void e1000_configure_msix(struct e1000_adapter *adapter)
1352{
1353 struct e1000_hw *hw = &adapter->hw;
1354 struct e1000_ring *rx_ring = adapter->rx_ring;
1355 struct e1000_ring *tx_ring = adapter->tx_ring;
1356 int vector = 0;
1357 u32 ctrl_ext, ivar = 0;
1358
1359 adapter->eiac_mask = 0;
1360
1361 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1362 if (hw->mac.type == e1000_82574) {
1363 u32 rfctl = er32(RFCTL);
1364 rfctl |= E1000_RFCTL_ACK_DIS;
1365 ew32(RFCTL, rfctl);
1366 }
1367
1368#define E1000_IVAR_INT_ALLOC_VALID 0x8
1369 /* Configure Rx vector */
1370 rx_ring->ims_val = E1000_IMS_RXQ0;
1371 adapter->eiac_mask |= rx_ring->ims_val;
1372 if (rx_ring->itr_val)
1373 writel(1000000000 / (rx_ring->itr_val * 256),
1374 hw->hw_addr + rx_ring->itr_register);
1375 else
1376 writel(1, hw->hw_addr + rx_ring->itr_register);
1377 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1378
1379 /* Configure Tx vector */
1380 tx_ring->ims_val = E1000_IMS_TXQ0;
1381 vector++;
1382 if (tx_ring->itr_val)
1383 writel(1000000000 / (tx_ring->itr_val * 256),
1384 hw->hw_addr + tx_ring->itr_register);
1385 else
1386 writel(1, hw->hw_addr + tx_ring->itr_register);
1387 adapter->eiac_mask |= tx_ring->ims_val;
1388 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1389
1390 /* set vector for Other Causes, e.g. link changes */
1391 vector++;
1392 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1393 if (rx_ring->itr_val)
1394 writel(1000000000 / (rx_ring->itr_val * 256),
1395 hw->hw_addr + E1000_EITR_82574(vector));
1396 else
1397 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1398
1399 /* Cause Tx interrupts on every write back */
1400 ivar |= (1 << 31);
1401
1402 ew32(IVAR, ivar);
1403
1404 /* enable MSI-X PBA support */
1405 ctrl_ext = er32(CTRL_EXT);
1406 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1407
1408 /* Auto-Mask Other interrupts upon ICR read */
1409#define E1000_EIAC_MASK_82574 0x01F00000
1410 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1411 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1412 ew32(CTRL_EXT, ctrl_ext);
1413 e1e_flush();
1414}
1415
1416void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1417{
1418 if (adapter->msix_entries) {
1419 pci_disable_msix(adapter->pdev);
1420 kfree(adapter->msix_entries);
1421 adapter->msix_entries = NULL;
1422 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1423 pci_disable_msi(adapter->pdev);
1424 adapter->flags &= ~FLAG_MSI_ENABLED;
1425 }
1426
1427 return;
1428}
1429
1430/**
1431 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1432 *
1433 * Attempt to configure interrupts using the best available
1434 * capabilities of the hardware and kernel.
1435 **/
1436void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1437{
1438 int err;
1439 int numvecs, i;
1440
1441
1442 switch (adapter->int_mode) {
1443 case E1000E_INT_MODE_MSIX:
1444 if (adapter->flags & FLAG_HAS_MSIX) {
1445 numvecs = 3; /* RxQ0, TxQ0 and other */
1446 adapter->msix_entries = kcalloc(numvecs,
1447 sizeof(struct msix_entry),
1448 GFP_KERNEL);
1449 if (adapter->msix_entries) {
1450 for (i = 0; i < numvecs; i++)
1451 adapter->msix_entries[i].entry = i;
1452
1453 err = pci_enable_msix(adapter->pdev,
1454 adapter->msix_entries,
1455 numvecs);
1456 if (err == 0)
1457 return;
1458 }
1459 /* MSI-X failed, so fall through and try MSI */
1460 e_err("Failed to initialize MSI-X interrupts. "
1461 "Falling back to MSI interrupts.\n");
1462 e1000e_reset_interrupt_capability(adapter);
1463 }
1464 adapter->int_mode = E1000E_INT_MODE_MSI;
1465 /* Fall through */
1466 case E1000E_INT_MODE_MSI:
1467 if (!pci_enable_msi(adapter->pdev)) {
1468 adapter->flags |= FLAG_MSI_ENABLED;
1469 } else {
1470 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1471 e_err("Failed to initialize MSI interrupts. Falling "
1472 "back to legacy interrupts.\n");
1473 }
1474 /* Fall through */
1475 case E1000E_INT_MODE_LEGACY:
1476 /* Don't do anything; this is the system default */
1477 break;
1478 }
1479
1480 return;
1481}
1482
1483/**
1484 * e1000_request_msix - Initialize MSI-X interrupts
1485 *
1486 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1487 * kernel.
1488 **/
1489static int e1000_request_msix(struct e1000_adapter *adapter)
1490{
1491 struct net_device *netdev = adapter->netdev;
1492 int err = 0, vector = 0;
1493
1494 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1495 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1496 else
1497 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1498 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1499 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1500 netdev);
1501 if (err)
1502 goto out;
1503 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1504 adapter->rx_ring->itr_val = adapter->itr;
1505 vector++;
1506
1507 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1508 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1509 else
1510 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1511 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1512 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1513 netdev);
1514 if (err)
1515 goto out;
1516 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1517 adapter->tx_ring->itr_val = adapter->itr;
1518 vector++;
1519
1520 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1521 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1522 if (err)
1523 goto out;
1524
1525 e1000_configure_msix(adapter);
1526 return 0;
1527out:
1528 return err;
1529}
1530
f8d59f78
BA		 1531/**
1532 * e1000_request_irq - initialize interrupts
1533 *
1534 * Attempts to configure interrupts using the best available
1535 * capabilities of the hardware and kernel.
1536 **/
bc7f75fa
AK		 1537static int e1000_request_irq(struct e1000_adapter *adapter)
1538{
1539 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1540 int err;
1541
4662e82b
BA		 1542 if (adapter->msix_entries) {
1543 err = e1000_request_msix(adapter);
1544 if (!err)
1545 return err;
1546 /* fall back to MSI */
1547 e1000e_reset_interrupt_capability(adapter);
1548 adapter->int_mode = E1000E_INT_MODE_MSI;
1549 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1550 }
4662e82b 1551 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1552 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1553 netdev->name, netdev);
1554 if (!err)
1555 return err;
bc7f75fa 1556
4662e82b
BA		 1557 /* fall back to legacy interrupt */
1558 e1000e_reset_interrupt_capability(adapter);
1559 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1560 }
1561
a0607fd3 1562 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1563 netdev->name, netdev);
1564 if (err)
1565 e_err("Unable to allocate interrupt, Error: %d\n", err);
1566
bc7f75fa
AK		 1567 return err;
1568}
1569
1570static void e1000_free_irq(struct e1000_adapter *adapter)
1571{
1572 struct net_device *netdev = adapter->netdev;
1573
4662e82b
BA		 1574 if (adapter->msix_entries) {
1575 int vector = 0;
1576
1577 free_irq(adapter->msix_entries[vector].vector, netdev);
1578 vector++;
1579
1580 free_irq(adapter->msix_entries[vector].vector, netdev);
1581 vector++;
1582
1583 /* Other Causes interrupt vector */
1584 free_irq(adapter->msix_entries[vector].vector, netdev);
1585 return;
bc7f75fa 1586 }
4662e82b
BA		 1587
1588 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1589}
1590
1591/**
1592 * e1000_irq_disable - Mask off interrupt generation on the NIC
1593 **/
1594static void e1000_irq_disable(struct e1000_adapter *adapter)
1595{
1596 struct e1000_hw *hw = &adapter->hw;
1597
bc7f75fa 1598 ew32(IMC, ~0);
4662e82b
BA		 1599 if (adapter->msix_entries)
1600 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1601 e1e_flush();
1602 synchronize_irq(adapter->pdev->irq);
1603}
1604
1605/**
1606 * e1000_irq_enable - Enable default interrupt generation settings
1607 **/
1608static void e1000_irq_enable(struct e1000_adapter *adapter)
1609{
1610 struct e1000_hw *hw = &adapter->hw;
1611
4662e82b
BA		 1612 if (adapter->msix_entries) {
1613 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1614 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1615 } else {
1616 ew32(IMS, IMS_ENABLE_MASK);
1617 }
74ef9c39 1618 e1e_flush();
bc7f75fa
AK		 1619}
1620
1621/**
1622 * e1000_get_hw_control - get control of the h/w from f/w
1623 * @adapter: address of board private structure
1624 *
489815ce 1625 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1626 * For ASF and Pass Through versions of f/w this means that
1627 * the driver is loaded. For AMT version (only with 82573)
1628 * of the f/w this means that the network i/f is open.
1629 **/
1630static void e1000_get_hw_control(struct e1000_adapter *adapter)
1631{
1632 struct e1000_hw *hw = &adapter->hw;
1633 u32 ctrl_ext;
1634 u32 swsm;
1635
1636 /* Let firmware know the driver has taken over */
1637 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1638 swsm = er32(SWSM);
1639 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1640 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1641 ctrl_ext = er32(CTRL_EXT);
ad68076e 1642 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1643 }
1644}
1645
1646/**
1647 * e1000_release_hw_control - release control of the h/w to f/w
1648 * @adapter: address of board private structure
1649 *
489815ce 1650 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1651 * For ASF and Pass Through versions of f/w this means that the
1652 * driver is no longer loaded. For AMT version (only with 82573) i
1653 * of the f/w this means that the network i/f is closed.
1654 *
1655 **/
1656static void e1000_release_hw_control(struct e1000_adapter *adapter)
1657{
1658 struct e1000_hw *hw = &adapter->hw;
1659 u32 ctrl_ext;
1660 u32 swsm;
1661
1662 /* Let firmware taken over control of h/w */
1663 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1664 swsm = er32(SWSM);
1665 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1666 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1667 ctrl_ext = er32(CTRL_EXT);
ad68076e 1668 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1669 }
1670}
1671
bc7f75fa
AK		 1672/**
1673 * @e1000_alloc_ring - allocate memory for a ring structure
1674 **/
1675static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1676 struct e1000_ring *ring)
1677{
1678 struct pci_dev *pdev = adapter->pdev;
1679
1680 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1681 GFP_KERNEL);
1682 if (!ring->desc)
1683 return -ENOMEM;
1684
1685 return 0;
1686}
1687
1688/**
1689 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1690 * @adapter: board private structure
1691 *
1692 * Return 0 on success, negative on failure
1693 **/
1694int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1695{
1696 struct e1000_ring *tx_ring = adapter->tx_ring;
1697 int err = -ENOMEM, size;
1698
1699 size = sizeof(struct e1000_buffer) * tx_ring->count;
1700 tx_ring->buffer_info = vmalloc(size);
1701 if (!tx_ring->buffer_info)
1702 goto err;
1703 memset(tx_ring->buffer_info, 0, size);
1704
1705 /* round up to nearest 4K */
1706 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1707 tx_ring->size = ALIGN(tx_ring->size, 4096);
1708
1709 err = e1000_alloc_ring_dma(adapter, tx_ring);
1710 if (err)
1711 goto err;
1712
1713 tx_ring->next_to_use = 0;
1714 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 1715
1716 return 0;
1717err:
1718 vfree(tx_ring->buffer_info);
44defeb3 1719 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1720 return err;
1721}
1722
1723/**
1724 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1725 * @adapter: board private structure
1726 *
1727 * Returns 0 on success, negative on failure
1728 **/
1729int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1730{
1731 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1732 struct e1000_buffer *buffer_info;
1733 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1734
1735 size = sizeof(struct e1000_buffer) * rx_ring->count;
1736 rx_ring->buffer_info = vmalloc(size);
1737 if (!rx_ring->buffer_info)
1738 goto err;
1739 memset(rx_ring->buffer_info, 0, size);
1740
47f44e40
AK		 1741 for (i = 0; i < rx_ring->count; i++) {
1742 buffer_info = &rx_ring->buffer_info[i];
1743 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1744 sizeof(struct e1000_ps_page),
1745 GFP_KERNEL);
1746 if (!buffer_info->ps_pages)
1747 goto err_pages;
1748 }
bc7f75fa
AK		 1749
1750 desc_len = sizeof(union e1000_rx_desc_packet_split);
1751
1752 /* Round up to nearest 4K */
1753 rx_ring->size = rx_ring->count * desc_len;
1754 rx_ring->size = ALIGN(rx_ring->size, 4096);
1755
1756 err = e1000_alloc_ring_dma(adapter, rx_ring);
1757 if (err)
47f44e40 1758 goto err_pages;
bc7f75fa
AK		 1759
1760 rx_ring->next_to_clean = 0;
1761 rx_ring->next_to_use = 0;
1762 rx_ring->rx_skb_top = NULL;
1763
1764 return 0;
47f44e40
AK		 1765
1766err_pages:
1767 for (i = 0; i < rx_ring->count; i++) {
1768 buffer_info = &rx_ring->buffer_info[i];
1769 kfree(buffer_info->ps_pages);
1770 }
bc7f75fa
AK		 1771err:
1772 vfree(rx_ring->buffer_info);
44defeb3 1773 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1774 return err;
1775}
1776
1777/**
1778 * e1000_clean_tx_ring - Free Tx Buffers
1779 * @adapter: board private structure
1780 **/
1781static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1782{
1783 struct e1000_ring *tx_ring = adapter->tx_ring;
1784 struct e1000_buffer *buffer_info;
1785 unsigned long size;
1786 unsigned int i;
1787
1788 for (i = 0; i < tx_ring->count; i++) {
1789 buffer_info = &tx_ring->buffer_info[i];
1790 e1000_put_txbuf(adapter, buffer_info);
1791 }
1792
1793 size = sizeof(struct e1000_buffer) * tx_ring->count;
1794 memset(tx_ring->buffer_info, 0, size);
1795
1796 memset(tx_ring->desc, 0, tx_ring->size);
1797
1798 tx_ring->next_to_use = 0;
1799 tx_ring->next_to_clean = 0;
1800
1801 writel(0, adapter->hw.hw_addr + tx_ring->head);
1802 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1803}
1804
1805/**
1806 * e1000e_free_tx_resources - Free Tx Resources per Queue
1807 * @adapter: board private structure
1808 *
1809 * Free all transmit software resources
1810 **/
1811void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1812{
1813 struct pci_dev *pdev = adapter->pdev;
1814 struct e1000_ring *tx_ring = adapter->tx_ring;
1815
1816 e1000_clean_tx_ring(adapter);
1817
1818 vfree(tx_ring->buffer_info);
1819 tx_ring->buffer_info = NULL;
1820
1821 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1822 tx_ring->dma);
1823 tx_ring->desc = NULL;
1824}
1825
1826/**
1827 * e1000e_free_rx_resources - Free Rx Resources
1828 * @adapter: board private structure
1829 *
1830 * Free all receive software resources
1831 **/
1832
1833void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1834{
1835 struct pci_dev *pdev = adapter->pdev;
1836 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1837 int i;
bc7f75fa
AK		 1838
1839 e1000_clean_rx_ring(adapter);
1840
47f44e40
AK		 1841 for (i = 0; i < rx_ring->count; i++) {
1842 kfree(rx_ring->buffer_info[i].ps_pages);
1843 }
1844
bc7f75fa
AK		 1845 vfree(rx_ring->buffer_info);
1846 rx_ring->buffer_info = NULL;
1847
bc7f75fa
AK		 1848 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1849 rx_ring->dma);
1850 rx_ring->desc = NULL;
1851}
1852
1853/**
1854 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1855 * @adapter: pointer to adapter
1856 * @itr_setting: current adapter->itr
1857 * @packets: the number of packets during this measurement interval
1858 * @bytes: the number of bytes during this measurement interval
1859 *
bc7f75fa
AK		 1860 * Stores a new ITR value based on packets and byte
1861 * counts during the last interrupt. The advantage of per interrupt
1862 * computation is faster updates and more accurate ITR for the current
1863 * traffic pattern. Constants in this function were computed
1864 * based on theoretical maximum wire speed and thresholds were set based
1865 * on testing data as well as attempting to minimize response time
4662e82b
BA		 1866 * while increasing bulk throughput. This functionality is controlled
1867 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 1868 **/
1869static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1870 u16 itr_setting, int packets,
1871 int bytes)
1872{
1873 unsigned int retval = itr_setting;
1874
1875 if (packets == 0)
1876 goto update_itr_done;
1877
1878 switch (itr_setting) {
1879 case lowest_latency:
1880 /* handle TSO and jumbo frames */
1881 if (bytes/packets > 8000)
1882 retval = bulk_latency;
1883 else if ((packets < 5) && (bytes > 512)) {
1884 retval = low_latency;
1885 }
1886 break;
1887 case low_latency: /* 50 usec aka 20000 ints/s */
1888 if (bytes > 10000) {
1889 /* this if handles the TSO accounting */
1890 if (bytes/packets > 8000) {
1891 retval = bulk_latency;
1892 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1893 retval = bulk_latency;
1894 } else if ((packets > 35)) {
1895 retval = lowest_latency;
1896 }
1897 } else if (bytes/packets > 2000) {
1898 retval = bulk_latency;
1899 } else if (packets <= 2 && bytes < 512) {
1900 retval = lowest_latency;
1901 }
1902 break;
1903 case bulk_latency: /* 250 usec aka 4000 ints/s */
1904 if (bytes > 25000) {
1905 if (packets > 35) {
1906 retval = low_latency;
1907 }
1908 } else if (bytes < 6000) {
1909 retval = low_latency;
1910 }
1911 break;
1912 }
1913
1914update_itr_done:
1915 return retval;
1916}
1917
1918static void e1000_set_itr(struct e1000_adapter *adapter)
1919{
1920 struct e1000_hw *hw = &adapter->hw;
1921 u16 current_itr;
1922 u32 new_itr = adapter->itr;
1923
1924 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1925 if (adapter->link_speed != SPEED_1000) {
1926 current_itr = 0;
1927 new_itr = 4000;
1928 goto set_itr_now;
1929 }
1930
1931 adapter->tx_itr = e1000_update_itr(adapter,
1932 adapter->tx_itr,
1933 adapter->total_tx_packets,
1934 adapter->total_tx_bytes);
1935 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1936 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1937 adapter->tx_itr = low_latency;
1938
1939 adapter->rx_itr = e1000_update_itr(adapter,
1940 adapter->rx_itr,
1941 adapter->total_rx_packets,
1942 adapter->total_rx_bytes);
1943 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1944 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1945 adapter->rx_itr = low_latency;
1946
1947 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1948
1949 switch (current_itr) {
1950 /* counts and packets in update_itr are dependent on these numbers */
1951 case lowest_latency:
1952 new_itr = 70000;
1953 break;
1954 case low_latency:
1955 new_itr = 20000; /* aka hwitr = ~200 */
1956 break;
1957 case bulk_latency:
1958 new_itr = 4000;
1959 break;
1960 default:
1961 break;
1962 }
1963
1964set_itr_now:
1965 if (new_itr != adapter->itr) {
ad68076e
BA		 1966 /*
1967 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1968 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1969 * increasing
1970 */
bc7f75fa
AK		 1971 new_itr = new_itr > adapter->itr ?
1972 min(adapter->itr + (new_itr >> 2), new_itr) :
1973 new_itr;
1974 adapter->itr = new_itr;
4662e82b
BA		 1975 adapter->rx_ring->itr_val = new_itr;
1976 if (adapter->msix_entries)
1977 adapter->rx_ring->set_itr = 1;
1978 else
1979 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 1980 }
1981}
1982
4662e82b
BA		 1983/**
1984 * e1000_alloc_queues - Allocate memory for all rings
1985 * @adapter: board private structure to initialize
1986 **/
1987static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1988{
1989 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1990 if (!adapter->tx_ring)
1991 goto err;
1992
1993 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1994 if (!adapter->rx_ring)
1995 goto err;
1996
1997 return 0;
1998err:
1999 e_err("Unable to allocate memory for queues\n");
2000 kfree(adapter->rx_ring);
2001 kfree(adapter->tx_ring);
2002 return -ENOMEM;
2003}
2004
bc7f75fa
AK		 2005/**
2006 * e1000_clean - NAPI Rx polling callback
ad68076e 2007 * @napi: struct associated with this polling callback
489815ce 2008 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2009 **/
2010static int e1000_clean(struct napi_struct *napi, int budget)
2011{
2012 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2013 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2014 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2015 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2016
4cf1653a 2017 adapter = netdev_priv(poll_dev);
bc7f75fa 2018
4662e82b
BA		 2019 if (adapter->msix_entries &&
2020 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2021 goto clean_rx;
2022
92af3e95 2023 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2024
4662e82b 2025clean_rx:
bc7f75fa 2026 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2027
12d04a3c 2028 if (!tx_cleaned)
d2c7ddd6 2029 work_done = budget;
bc7f75fa 2030
53e52c72
DM		 2031 /* If budget not fully consumed, exit the polling mode */
2032 if (work_done < budget) {
bc7f75fa
AK		 2033 if (adapter->itr_setting & 3)
2034 e1000_set_itr(adapter);
288379f0 2035 napi_complete(napi);
a3c69fef
JB		 2036 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2037 if (adapter->msix_entries)
2038 ew32(IMS, adapter->rx_ring->ims_val);
2039 else
2040 e1000_irq_enable(adapter);
2041 }
bc7f75fa
AK		 2042 }
2043
2044 return work_done;
2045}
2046
2047static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2048{
2049 struct e1000_adapter *adapter = netdev_priv(netdev);
2050 struct e1000_hw *hw = &adapter->hw;
2051 u32 vfta, index;
2052
2053 /* don't update vlan cookie if already programmed */
2054 if ((adapter->hw.mng_cookie.status &
2055 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2056 (vid == adapter->mng_vlan_id))
2057 return;
caaddaf8 2058
bc7f75fa 2059 /* add VID to filter table */
caaddaf8
BA		 2060 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2061 index = (vid >> 5) & 0x7F;
2062 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2063 vfta |= (1 << (vid & 0x1F));
2064 hw->mac.ops.write_vfta(hw, index, vfta);
2065 }
bc7f75fa
AK		 2066}
2067
2068static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2069{
2070 struct e1000_adapter *adapter = netdev_priv(netdev);
2071 struct e1000_hw *hw = &adapter->hw;
2072 u32 vfta, index;
2073
74ef9c39
JB		 2074 if (!test_bit(__E1000_DOWN, &adapter->state))
2075 e1000_irq_disable(adapter);
bc7f75fa 2076 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2077
2078 if (!test_bit(__E1000_DOWN, &adapter->state))
2079 e1000_irq_enable(adapter);
bc7f75fa
AK		 2080
2081 if ((adapter->hw.mng_cookie.status &
2082 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2083 (vid == adapter->mng_vlan_id)) {
2084 /* release control to f/w */
2085 e1000_release_hw_control(adapter);
2086 return;
2087 }
2088
2089 /* remove VID from filter table */
caaddaf8
BA		 2090 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2091 index = (vid >> 5) & 0x7F;
2092 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2093 vfta &= ~(1 << (vid & 0x1F));
2094 hw->mac.ops.write_vfta(hw, index, vfta);
2095 }
bc7f75fa
AK		 2096}
2097
2098static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2099{
2100 struct net_device *netdev = adapter->netdev;
2101 u16 vid = adapter->hw.mng_cookie.vlan_id;
2102 u16 old_vid = adapter->mng_vlan_id;
2103
2104 if (!adapter->vlgrp)
2105 return;
2106
2107 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2108 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2109 if (adapter->hw.mng_cookie.status &
2110 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2111 e1000_vlan_rx_add_vid(netdev, vid);
2112 adapter->mng_vlan_id = vid;
2113 }
2114
2115 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2116 (vid != old_vid) &&
2117 !vlan_group_get_device(adapter->vlgrp, old_vid))
2118 e1000_vlan_rx_kill_vid(netdev, old_vid);
2119 } else {
2120 adapter->mng_vlan_id = vid;
2121 }
2122}
2123
2124
2125static void e1000_vlan_rx_register(struct net_device *netdev,
2126 struct vlan_group *grp)
2127{
2128 struct e1000_adapter *adapter = netdev_priv(netdev);
2129 struct e1000_hw *hw = &adapter->hw;
2130 u32 ctrl, rctl;
2131
74ef9c39
JB		 2132 if (!test_bit(__E1000_DOWN, &adapter->state))
2133 e1000_irq_disable(adapter);
bc7f75fa
AK		 2134 adapter->vlgrp = grp;
2135
2136 if (grp) {
2137 /* enable VLAN tag insert/strip */
2138 ctrl = er32(CTRL);
2139 ctrl |= E1000_CTRL_VME;
2140 ew32(CTRL, ctrl);
2141
2142 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2143 /* enable VLAN receive filtering */
2144 rctl = er32(RCTL);
bc7f75fa
AK		 2145 rctl &= ~E1000_RCTL_CFIEN;
2146 ew32(RCTL, rctl);
2147 e1000_update_mng_vlan(adapter);
2148 }
2149 } else {
2150 /* disable VLAN tag insert/strip */
2151 ctrl = er32(CTRL);
2152 ctrl &= ~E1000_CTRL_VME;
2153 ew32(CTRL, ctrl);
2154
2155 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2156 if (adapter->mng_vlan_id !=
2157 (u16)E1000_MNG_VLAN_NONE) {
2158 e1000_vlan_rx_kill_vid(netdev,
2159 adapter->mng_vlan_id);
2160 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2161 }
2162 }
2163 }
2164
74ef9c39
JB		 2165 if (!test_bit(__E1000_DOWN, &adapter->state))
2166 e1000_irq_enable(adapter);
bc7f75fa
AK		 2167}
2168
2169static void e1000_restore_vlan(struct e1000_adapter *adapter)
2170{
2171 u16 vid;
2172
2173 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2174
2175 if (!adapter->vlgrp)
2176 return;
2177
2178 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2179 if (!vlan_group_get_device(adapter->vlgrp, vid))
2180 continue;
2181 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2182 }
2183}
2184
2185static void e1000_init_manageability(struct e1000_adapter *adapter)
2186{
2187 struct e1000_hw *hw = &adapter->hw;
2188 u32 manc, manc2h;
2189
2190 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2191 return;
2192
2193 manc = er32(MANC);
2194
ad68076e
BA		 2195 /*
2196 * enable receiving management packets to the host. this will probably
bc7f75fa 2197 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2198 * the packets will be handled on SMBUS
2199 */
bc7f75fa
AK		 2200 manc |= E1000_MANC_EN_MNG2HOST;
2201 manc2h = er32(MANC2H);
2202#define E1000_MNG2HOST_PORT_623 (1 << 5)
2203#define E1000_MNG2HOST_PORT_664 (1 << 6)
2204 manc2h |= E1000_MNG2HOST_PORT_623;
2205 manc2h |= E1000_MNG2HOST_PORT_664;
2206 ew32(MANC2H, manc2h);
2207 ew32(MANC, manc);
2208}
2209
2210/**
2211 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2212 * @adapter: board private structure
2213 *
2214 * Configure the Tx unit of the MAC after a reset.
2215 **/
2216static void e1000_configure_tx(struct e1000_adapter *adapter)
2217{
2218 struct e1000_hw *hw = &adapter->hw;
2219 struct e1000_ring *tx_ring = adapter->tx_ring;
2220 u64 tdba;
2221 u32 tdlen, tctl, tipg, tarc;
2222 u32 ipgr1, ipgr2;
2223
2224 /* Setup the HW Tx Head and Tail descriptor pointers */
2225 tdba = tx_ring->dma;
2226 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2227 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2228 ew32(TDBAH, (tdba >> 32));
2229 ew32(TDLEN, tdlen);
2230 ew32(TDH, 0);
2231 ew32(TDT, 0);
2232 tx_ring->head = E1000_TDH;
2233 tx_ring->tail = E1000_TDT;
2234
2235 /* Set the default values for the Tx Inter Packet Gap timer */
2236 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2237 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2238 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2239
2240 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2241 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2242
2243 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2244 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2245 ew32(TIPG, tipg);
2246
2247 /* Set the Tx Interrupt Delay register */
2248 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2249 /* Tx irq moderation */
bc7f75fa
AK		 2250 ew32(TADV, adapter->tx_abs_int_delay);
2251
2252 /* Program the Transmit Control Register */
2253 tctl = er32(TCTL);
2254 tctl &= ~E1000_TCTL_CT;
2255 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2256 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2257
2258 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2259 tarc = er32(TARC(0));
ad68076e
BA		 2260 /*
2261 * set the speed mode bit, we'll clear it if we're not at
2262 * gigabit link later
2263 */
bc7f75fa
AK		 2264#define SPEED_MODE_BIT (1 << 21)
2265 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2266 ew32(TARC(0), tarc);
bc7f75fa
AK		 2267 }
2268
2269 /* errata: program both queues to unweighted RR */
2270 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2271 tarc = er32(TARC(0));
bc7f75fa 2272 tarc |= 1;
e9ec2c0f
JK		 2273 ew32(TARC(0), tarc);
2274 tarc = er32(TARC(1));
bc7f75fa 2275 tarc |= 1;
e9ec2c0f 2276 ew32(TARC(1), tarc);
bc7f75fa
AK		 2277 }
2278
bc7f75fa
AK		 2279 /* Setup Transmit Descriptor Settings for eop descriptor */
2280 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2281
2282 /* only set IDE if we are delaying interrupts using the timers */
2283 if (adapter->tx_int_delay)
2284 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2285
2286 /* enable Report Status bit */
2287 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2288
2289 ew32(TCTL, tctl);
2290
edfea6e6
SH		 2291 e1000e_config_collision_dist(hw);
2292
bc7f75fa
AK		 2293 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2294}
2295
2296/**
2297 * e1000_setup_rctl - configure the receive control registers
2298 * @adapter: Board private structure
2299 **/
2300#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2301 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2302static void e1000_setup_rctl(struct e1000_adapter *adapter)
2303{
2304 struct e1000_hw *hw = &adapter->hw;
2305 u32 rctl, rfctl;
2306 u32 psrctl = 0;
2307 u32 pages = 0;
2308
2309 /* Program MC offset vector base */
2310 rctl = er32(RCTL);
2311 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2312 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2313 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2314 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2315
2316 /* Do not Store bad packets */
2317 rctl &= ~E1000_RCTL_SBP;
2318
2319 /* Enable Long Packet receive */
2320 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2321 rctl &= ~E1000_RCTL_LPE;
2322 else
2323 rctl |= E1000_RCTL_LPE;
2324
eb7c3adb
JK		 2325 /* Some systems expect that the CRC is included in SMBUS traffic. The
2326 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2327 * host memory when this is enabled
2328 */
2329 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2330 rctl |= E1000_RCTL_SECRC;
5918bd88 2331
a4f58f54
BA		 2332 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2333 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2334 u16 phy_data;
2335
2336 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2337 phy_data &= 0xfff8;
2338 phy_data |= (1 << 2);
2339 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2340
2341 e1e_rphy(hw, 22, &phy_data);
2342 phy_data &= 0x0fff;
2343 phy_data |= (1 << 14);
2344 e1e_wphy(hw, 0x10, 0x2823);
2345 e1e_wphy(hw, 0x11, 0x0003);
2346 e1e_wphy(hw, 22, phy_data);
2347 }
2348
bc7f75fa
AK		 2349 /* Setup buffer sizes */
2350 rctl &= ~E1000_RCTL_SZ_4096;
2351 rctl |= E1000_RCTL_BSEX;
2352 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2353 case 2048:
2354 default:
2355 rctl |= E1000_RCTL_SZ_2048;
2356 rctl &= ~E1000_RCTL_BSEX;
2357 break;
2358 case 4096:
2359 rctl |= E1000_RCTL_SZ_4096;
2360 break;
2361 case 8192:
2362 rctl |= E1000_RCTL_SZ_8192;
2363 break;
2364 case 16384:
2365 rctl |= E1000_RCTL_SZ_16384;
2366 break;
2367 }
2368
2369 /*
2370 * 82571 and greater support packet-split where the protocol
2371 * header is placed in skb->data and the packet data is
2372 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2373 * In the case of a non-split, skb->data is linearly filled,
2374 * followed by the page buffers. Therefore, skb->data is
2375 * sized to hold the largest protocol header.
2376 *
2377 * allocations using alloc_page take too long for regular MTU
2378 * so only enable packet split for jumbo frames
2379 *
2380 * Using pages when the page size is greater than 16k wastes
2381 * a lot of memory, since we allocate 3 pages at all times
2382 * per packet.
2383 */
bc7f75fa 2384 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2385 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2386 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2387 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2388 else
2389 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2390
2391 if (adapter->rx_ps_pages) {
2392 /* Configure extra packet-split registers */
2393 rfctl = er32(RFCTL);
2394 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2395 /*
2396 * disable packet split support for IPv6 extension headers,
2397 * because some malformed IPv6 headers can hang the Rx
2398 */
bc7f75fa
AK		 2399 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2400 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2401
2402 ew32(RFCTL, rfctl);
2403
140a7480
AK		 2404 /* Enable Packet split descriptors */
2405 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2406
2407 psrctl |= adapter->rx_ps_bsize0 >>
2408 E1000_PSRCTL_BSIZE0_SHIFT;
2409
2410 switch (adapter->rx_ps_pages) {
2411 case 3:
2412 psrctl |= PAGE_SIZE <<
2413 E1000_PSRCTL_BSIZE3_SHIFT;
2414 case 2:
2415 psrctl |= PAGE_SIZE <<
2416 E1000_PSRCTL_BSIZE2_SHIFT;
2417 case 1:
2418 psrctl |= PAGE_SIZE >>
2419 E1000_PSRCTL_BSIZE1_SHIFT;
2420 break;
2421 }
2422
2423 ew32(PSRCTL, psrctl);
2424 }
2425
2426 ew32(RCTL, rctl);
318a94d6
JK		 2427 /* just started the receive unit, no need to restart */
2428 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2429}
2430
2431/**
2432 * e1000_configure_rx - Configure Receive Unit after Reset
2433 * @adapter: board private structure
2434 *
2435 * Configure the Rx unit of the MAC after a reset.
2436 **/
2437static void e1000_configure_rx(struct e1000_adapter *adapter)
2438{
2439 struct e1000_hw *hw = &adapter->hw;
2440 struct e1000_ring *rx_ring = adapter->rx_ring;
2441 u64 rdba;
2442 u32 rdlen, rctl, rxcsum, ctrl_ext;
2443
2444 if (adapter->rx_ps_pages) {
2445 /* this is a 32 byte descriptor */
2446 rdlen = rx_ring->count *
2447 sizeof(union e1000_rx_desc_packet_split);
2448 adapter->clean_rx = e1000_clean_rx_irq_ps;
2449 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2450 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2451 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2452 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2453 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2454 } else {
97ac8cae 2455 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2456 adapter->clean_rx = e1000_clean_rx_irq;
2457 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2458 }
2459
2460 /* disable receives while setting up the descriptors */
2461 rctl = er32(RCTL);
2462 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2463 e1e_flush();
2464 msleep(10);
2465
2466 /* set the Receive Delay Timer Register */
2467 ew32(RDTR, adapter->rx_int_delay);
2468
2469 /* irq moderation */
2470 ew32(RADV, adapter->rx_abs_int_delay);
2471 if (adapter->itr_setting != 0)
ad68076e 2472 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2473
2474 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2475 /* Auto-Mask interrupts upon ICR access */
2476 ctrl_ext |= E1000_CTRL_EXT_IAME;
2477 ew32(IAM, 0xffffffff);
2478 ew32(CTRL_EXT, ctrl_ext);
2479 e1e_flush();
2480
ad68076e
BA		 2481 /*
2482 * Setup the HW Rx Head and Tail Descriptor Pointers and
2483 * the Base and Length of the Rx Descriptor Ring
2484 */
bc7f75fa 2485 rdba = rx_ring->dma;
284901a9 2486 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2487 ew32(RDBAH, (rdba >> 32));
2488 ew32(RDLEN, rdlen);
2489 ew32(RDH, 0);
2490 ew32(RDT, 0);
2491 rx_ring->head = E1000_RDH;
2492 rx_ring->tail = E1000_RDT;
2493
2494 /* Enable Receive Checksum Offload for TCP and UDP */
2495 rxcsum = er32(RXCSUM);
2496 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2497 rxcsum |= E1000_RXCSUM_TUOFL;
2498
ad68076e
BA		 2499 /*
2500 * IPv4 payload checksum for UDP fragments must be
2501 * used in conjunction with packet-split.
2502 */
bc7f75fa
AK		 2503 if (adapter->rx_ps_pages)
2504 rxcsum |= E1000_RXCSUM_IPPCSE;
2505 } else {
2506 rxcsum &= ~E1000_RXCSUM_TUOFL;
2507 /* no need to clear IPPCSE as it defaults to 0 */
2508 }
2509 ew32(RXCSUM, rxcsum);
2510
ad68076e
BA		 2511 /*
2512 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2513 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2514 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2515 */
53ec5498
BA		 2516 if (adapter->flags & FLAG_HAS_ERT) {
2517 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2518 u32 rxdctl = er32(RXDCTL(0));
2519 ew32(RXDCTL(0), rxdctl | 0x3);
2520 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2521 /*
2522 * With jumbo frames and early-receive enabled,
2523 * excessive C-state transition latencies result in
2524 * dropped transactions.
2525 */
2526 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2527 adapter->netdev->name, 55);
2528 } else {
2529 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2530 adapter->netdev->name,
2531 PM_QOS_DEFAULT_VALUE);
2532 }
97ac8cae 2533 }
bc7f75fa
AK		 2534
2535 /* Enable Receives */
2536 ew32(RCTL, rctl);
2537}
2538
2539/**
e2de3eb6 2540 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2541 * @hw: pointer to the HW structure
2542 * @mc_addr_list: array of multicast addresses to program
2543 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2544 *
ab8932f3 2545 * Updates the Multicast Table Array.
bc7f75fa 2546 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2547 **/
e2de3eb6 2548static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2549 u32 mc_addr_count)
bc7f75fa 2550{
ab8932f3 2551 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 2552}
2553
2554/**
2555 * e1000_set_multi - Multicast and Promiscuous mode set
2556 * @netdev: network interface device structure
2557 *
2558 * The set_multi entry point is called whenever the multicast address
2559 * list or the network interface flags are updated. This routine is
2560 * responsible for configuring the hardware for proper multicast,
2561 * promiscuous mode, and all-multi behavior.
2562 **/
2563static void e1000_set_multi(struct net_device *netdev)
2564{
2565 struct e1000_adapter *adapter = netdev_priv(netdev);
2566 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 2567 struct dev_mc_list *mc_ptr;
2568 u8 *mta_list;
2569 u32 rctl;
2570 int i;
2571
2572 /* Check for Promiscuous and All Multicast modes */
2573
2574 rctl = er32(RCTL);
2575
2576 if (netdev->flags & IFF_PROMISC) {
2577 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2578 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2579 } else {
746b9f02
PM		 2580 if (netdev->flags & IFF_ALLMULTI) {
2581 rctl |= E1000_RCTL_MPE;
2582 rctl &= ~E1000_RCTL_UPE;
2583 } else {
2584 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2585 }
78ed11a5 2586 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2587 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2588 }
2589
2590 ew32(RCTL, rctl);
2591
2592 if (netdev->mc_count) {
2593 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2594 if (!mta_list)
2595 return;
2596
2597 /* prepare a packed array of only addresses. */
2598 mc_ptr = netdev->mc_list;
2599
2600 for (i = 0; i < netdev->mc_count; i++) {
2601 if (!mc_ptr)
2602 break;
2603 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2604 ETH_ALEN);
2605 mc_ptr = mc_ptr->next;
2606 }
2607
ab8932f3 2608 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 2609 kfree(mta_list);
2610 } else {
2611 /*
2612 * if we're called from probe, we might not have
2613 * anything to do here, so clear out the list
2614 */
ab8932f3 2615 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 2616 }
2617}
2618
2619/**
ad68076e 2620 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2621 * @adapter: private board structure
2622 **/
2623static void e1000_configure(struct e1000_adapter *adapter)
2624{
2625 e1000_set_multi(adapter->netdev);
2626
2627 e1000_restore_vlan(adapter);
2628 e1000_init_manageability(adapter);
2629
2630 e1000_configure_tx(adapter);
2631 e1000_setup_rctl(adapter);
2632 e1000_configure_rx(adapter);
ad68076e 2633 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2634}
2635
2636/**
2637 * e1000e_power_up_phy - restore link in case the phy was powered down
2638 * @adapter: address of board private structure
2639 *
2640 * The phy may be powered down to save power and turn off link when the
2641 * driver is unloaded and wake on lan is not enabled (among others)
2642 * *** this routine MUST be followed by a call to e1000e_reset ***
2643 **/
2644void e1000e_power_up_phy(struct e1000_adapter *adapter)
2645{
17f208de
BA		 2646 if (adapter->hw.phy.ops.power_up)
2647 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 2648
2649 adapter->hw.mac.ops.setup_link(&adapter->hw);
2650}
2651
2652/**
2653 * e1000_power_down_phy - Power down the PHY
2654 *
17f208de
BA		 2655 * Power down the PHY so no link is implied when interface is down.
2656 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 2657 */
2658static void e1000_power_down_phy(struct e1000_adapter *adapter)
2659{
bc7f75fa 2660 /* WoL is enabled */
23b66e2b 2661 if (adapter->wol)
bc7f75fa
AK		 2662 return;
2663
17f208de
BA		 2664 if (adapter->hw.phy.ops.power_down)
2665 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 2666}
2667
2668/**
2669 * e1000e_reset - bring the hardware into a known good state
2670 *
2671 * This function boots the hardware and enables some settings that
2672 * require a configuration cycle of the hardware - those cannot be
2673 * set/changed during runtime. After reset the device needs to be
ad68076e 2674 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2675 */
2676void e1000e_reset(struct e1000_adapter *adapter)
2677{
2678 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2679 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2680 struct e1000_hw *hw = &adapter->hw;
2681 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2682 u32 pba = adapter->pba;
bc7f75fa
AK		 2683 u16 hwm;
2684
ad68076e 2685 /* reset Packet Buffer Allocation to default */
318a94d6 2686 ew32(PBA, pba);
df762464 2687
318a94d6 2688 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2689 /*
2690 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2691 * large enough to accommodate two full transmit packets,
2692 * rounded up to the next 1KB and expressed in KB. Likewise,
2693 * the Rx FIFO should be large enough to accommodate at least
2694 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2695 * expressed in KB.
2696 */
df762464 2697 pba = er32(PBA);
bc7f75fa 2698 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2699 tx_space = pba >> 16;
bc7f75fa 2700 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2701 pba &= 0xffff;
ad68076e
BA		 2702 /*
2703 * the Tx fifo also stores 16 bytes of information about the tx
2704 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2705 */
2706 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2707 sizeof(struct e1000_tx_desc) -
2708 ETH_FCS_LEN) * 2;
2709 min_tx_space = ALIGN(min_tx_space, 1024);
2710 min_tx_space >>= 10;
2711 /* software strips receive CRC, so leave room for it */
318a94d6 2712 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2713 min_rx_space = ALIGN(min_rx_space, 1024);
2714 min_rx_space >>= 10;
2715
ad68076e
BA		 2716 /*
2717 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2718 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2719 * allocation, take space away from current Rx allocation
2720 */
df762464
AK		 2721 if ((tx_space < min_tx_space) &&
2722 ((min_tx_space - tx_space) < pba)) {
2723 pba -= min_tx_space - tx_space;
bc7f75fa 2724
ad68076e
BA		 2725 /*
2726 * if short on Rx space, Rx wins and must trump tx
2727 * adjustment or use Early Receive if available
2728 */
df762464 2729 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2730 (!(adapter->flags & FLAG_HAS_ERT)))
2731 /* ERT enabled in e1000_configure_rx */
df762464 2732 pba = min_rx_space;
bc7f75fa 2733 }
df762464
AK		 2734
2735 ew32(PBA, pba);
bc7f75fa
AK		 2736 }
2737
bc7f75fa 2738
ad68076e
BA		 2739 /*
2740 * flow control settings
2741 *
38eb394e 2742 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 2743 * (or the size used for early receive) above it in the Rx FIFO.
2744 * Set it to the lower of:
2745 * - 90% of the Rx FIFO size, and
2746 * - the full Rx FIFO size minus the early receive size (for parts
2747 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 2748 * - the full Rx FIFO size minus one full frame
ad68076e 2749 */
38eb394e
BA		 2750 if (hw->mac.type == e1000_pchlan) {
2751 /*
2752 * Workaround PCH LOM adapter hangs with certain network
2753 * loads. If hangs persist, try disabling Tx flow control.
2754 */
2755 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2756 fc->high_water = 0x3500;
2757 fc->low_water = 0x1500;
2758 } else {
2759 fc->high_water = 0x5000;
2760 fc->low_water = 0x3000;
2761 }
2762 } else {
2763 if ((adapter->flags & FLAG_HAS_ERT) &&
2764 (adapter->netdev->mtu > ETH_DATA_LEN))
2765 hwm = min(((pba << 10) * 9 / 10),
2766 ((pba << 10) - (E1000_ERT_2048 << 3)));
2767 else
2768 hwm = min(((pba << 10) * 9 / 10),
2769 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2770
38eb394e
BA		 2771 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
2772 fc->low_water = fc->high_water - 8;
2773 }
bc7f75fa
AK		 2774
2775 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2776 fc->pause_time = 0xFFFF;
bc7f75fa 2777 else
318a94d6
JK		 2778 fc->pause_time = E1000_FC_PAUSE_TIME;
2779 fc->send_xon = 1;
5c48ef3e 2780 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 2781
2782 /* Allow time for pending master requests to run */
2783 mac->ops.reset_hw(hw);
97ac8cae
BA		 2784
2785 /*
2786 * For parts with AMT enabled, let the firmware know
2787 * that the network interface is in control
2788 */
c43bc57e 2789 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2790 e1000_get_hw_control(adapter);
2791
bc7f75fa 2792 ew32(WUC, 0);
a4f58f54
BA		 2793 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
2794 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK		 2795
2796 if (mac->ops.init_hw(hw))
44defeb3 2797 e_err("Hardware Error\n");
bc7f75fa 2798
38eb394e
BA		 2799 /* additional part of the flow-control workaround above */
2800 if (hw->mac.type == e1000_pchlan)
2801 ew32(FCRTV_PCH, 0x1000);
2802
bc7f75fa
AK		 2803 e1000_update_mng_vlan(adapter);
2804
2805 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2806 ew32(VET, ETH_P_8021Q);
2807
2808 e1000e_reset_adaptive(hw);
2809 e1000_get_phy_info(hw);
2810
918d7197
BA		 2811 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
2812 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 2813 u16 phy_data = 0;
ad68076e
BA		 2814 /*
2815 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2816 * the return value of this function because there is nothing
ad68076e
BA		 2817 * different we would do if it failed
2818 */
bc7f75fa
AK		 2819 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2820 phy_data &= ~IGP02E1000_PM_SPD;
2821 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2822 }
bc7f75fa
AK		 2823}
2824
2825int e1000e_up(struct e1000_adapter *adapter)
2826{
2827 struct e1000_hw *hw = &adapter->hw;
2828
53ec5498
BA		 2829 /* DMA latency requirement to workaround early-receive/jumbo issue */
2830 if (adapter->flags & FLAG_HAS_ERT)
2831 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
2832 adapter->netdev->name,
2833 PM_QOS_DEFAULT_VALUE);
2834
bc7f75fa
AK		 2835 /* hardware has been reset, we need to reload some things */
2836 e1000_configure(adapter);
2837
2838 clear_bit(__E1000_DOWN, &adapter->state);
2839
2840 napi_enable(&adapter->napi);
4662e82b
BA		 2841 if (adapter->msix_entries)
2842 e1000_configure_msix(adapter);
bc7f75fa
AK		 2843 e1000_irq_enable(adapter);
2844
4cb9be7a
JB		 2845 netif_wake_queue(adapter->netdev);
2846
bc7f75fa
AK		 2847 /* fire a link change interrupt to start the watchdog */
2848 ew32(ICS, E1000_ICS_LSC);
2849 return 0;
2850}
2851
2852void e1000e_down(struct e1000_adapter *adapter)
2853{
2854 struct net_device *netdev = adapter->netdev;
2855 struct e1000_hw *hw = &adapter->hw;
2856 u32 tctl, rctl;
2857
ad68076e
BA		 2858 /*
2859 * signal that we're down so the interrupt handler does not
2860 * reschedule our watchdog timer
2861 */
bc7f75fa
AK		 2862 set_bit(__E1000_DOWN, &adapter->state);
2863
2864 /* disable receives in the hardware */
2865 rctl = er32(RCTL);
2866 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2867 /* flush and sleep below */
2868
4cb9be7a 2869 netif_stop_queue(netdev);
bc7f75fa
AK		 2870
2871 /* disable transmits in the hardware */
2872 tctl = er32(TCTL);
2873 tctl &= ~E1000_TCTL_EN;
2874 ew32(TCTL, tctl);
2875 /* flush both disables and wait for them to finish */
2876 e1e_flush();
2877 msleep(10);
2878
2879 napi_disable(&adapter->napi);
2880 e1000_irq_disable(adapter);
2881
2882 del_timer_sync(&adapter->watchdog_timer);
2883 del_timer_sync(&adapter->phy_info_timer);
2884
2885 netdev->tx_queue_len = adapter->tx_queue_len;
2886 netif_carrier_off(netdev);
2887 adapter->link_speed = 0;
2888 adapter->link_duplex = 0;
2889
52cc3086
JK		 2890 if (!pci_channel_offline(adapter->pdev))
2891 e1000e_reset(adapter);
bc7f75fa
AK		 2892 e1000_clean_tx_ring(adapter);
2893 e1000_clean_rx_ring(adapter);
2894
53ec5498
BA		 2895 if (adapter->flags & FLAG_HAS_ERT)
2896 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
2897 adapter->netdev->name);
2898
bc7f75fa
AK		 2899 /*
2900 * TODO: for power management, we could drop the link and
2901 * pci_disable_device here.
2902 */
2903}
2904
2905void e1000e_reinit_locked(struct e1000_adapter *adapter)
2906{
2907 might_sleep();
2908 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2909 msleep(1);
2910 e1000e_down(adapter);
2911 e1000e_up(adapter);
2912 clear_bit(__E1000_RESETTING, &adapter->state);
2913}
2914
2915/**
2916 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2917 * @adapter: board private structure to initialize
2918 *
2919 * e1000_sw_init initializes the Adapter private data structure.
2920 * Fields are initialized based on PCI device information and
2921 * OS network device settings (MTU size).
2922 **/
2923static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2924{
bc7f75fa
AK		 2925 struct net_device *netdev = adapter->netdev;
2926
2927 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2928 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2929 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2930 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2931
4662e82b 2932 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2933
4662e82b
BA		 2934 if (e1000_alloc_queues(adapter))
2935 return -ENOMEM;
bc7f75fa 2936
bc7f75fa 2937 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2938 e1000_irq_disable(adapter);
2939
bc7f75fa
AK		 2940 set_bit(__E1000_DOWN, &adapter->state);
2941 return 0;
bc7f75fa
AK		 2942}
2943
f8d59f78
BA		 2944/**
2945 * e1000_intr_msi_test - Interrupt Handler
2946 * @irq: interrupt number
2947 * @data: pointer to a network interface device structure
2948 **/
2949static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2950{
2951 struct net_device *netdev = data;
2952 struct e1000_adapter *adapter = netdev_priv(netdev);
2953 struct e1000_hw *hw = &adapter->hw;
2954 u32 icr = er32(ICR);
2955
3bb99fe2 2956 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 2957 if (icr & E1000_ICR_RXSEQ) {
2958 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2959 wmb();
2960 }
2961
2962 return IRQ_HANDLED;
2963}
2964
2965/**
2966 * e1000_test_msi_interrupt - Returns 0 for successful test
2967 * @adapter: board private struct
2968 *
2969 * code flow taken from tg3.c
2970 **/
2971static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2972{
2973 struct net_device *netdev = adapter->netdev;
2974 struct e1000_hw *hw = &adapter->hw;
2975 int err;
2976
2977 /* poll_enable hasn't been called yet, so don't need disable */
2978 /* clear any pending events */
2979 er32(ICR);
2980
2981 /* free the real vector and request a test handler */
2982 e1000_free_irq(adapter);
4662e82b 2983 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 2984
2985 /* Assume that the test fails, if it succeeds then the test
2986 * MSI irq handler will unset this flag */
2987 adapter->flags |= FLAG_MSI_TEST_FAILED;
2988
2989 err = pci_enable_msi(adapter->pdev);
2990 if (err)
2991 goto msi_test_failed;
2992
a0607fd3 2993 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 2994 netdev->name, netdev);
2995 if (err) {
2996 pci_disable_msi(adapter->pdev);
2997 goto msi_test_failed;
2998 }
2999
3000 wmb();
3001
3002 e1000_irq_enable(adapter);
3003
3004 /* fire an unusual interrupt on the test handler */
3005 ew32(ICS, E1000_ICS_RXSEQ);
3006 e1e_flush();
3007 msleep(50);
3008
3009 e1000_irq_disable(adapter);
3010
3011 rmb();
3012
3013 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3014 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3015 err = -EIO;
3016 e_info("MSI interrupt test failed!\n");
3017 }
3018
3019 free_irq(adapter->pdev->irq, netdev);
3020 pci_disable_msi(adapter->pdev);
3021
3022 if (err == -EIO)
3023 goto msi_test_failed;
3024
3025 /* okay so the test worked, restore settings */
3bb99fe2 3026 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3027msi_test_failed:
4662e82b 3028 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3029 e1000_request_irq(adapter);
3030 return err;
3031}
3032
3033/**
3034 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3035 * @adapter: board private struct
3036 *
3037 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3038 **/
3039static int e1000_test_msi(struct e1000_adapter *adapter)
3040{
3041 int err;
3042 u16 pci_cmd;
3043
3044 if (!(adapter->flags & FLAG_MSI_ENABLED))
3045 return 0;
3046
3047 /* disable SERR in case the MSI write causes a master abort */
3048 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3049 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3050 pci_cmd & ~PCI_COMMAND_SERR);
3051
3052 err = e1000_test_msi_interrupt(adapter);
3053
3054 /* restore previous setting of command word */
3055 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3056
3057 /* success ! */
3058 if (!err)
3059 return 0;
3060
3061 /* EIO means MSI test failed */
3062 if (err != -EIO)
3063 return err;
3064
3065 /* back to INTx mode */
3066 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3067
3068 e1000_free_irq(adapter);
3069
3070 err = e1000_request_irq(adapter);
3071
3072 return err;
3073}
3074
bc7f75fa
AK		 3075/**
3076 * e1000_open - Called when a network interface is made active
3077 * @netdev: network interface device structure
3078 *
3079 * Returns 0 on success, negative value on failure
3080 *
3081 * The open entry point is called when a network interface is made
3082 * active by the system (IFF_UP). At this point all resources needed
3083 * for transmit and receive operations are allocated, the interrupt
3084 * handler is registered with the OS, the watchdog timer is started,
3085 * and the stack is notified that the interface is ready.
3086 **/
3087static int e1000_open(struct net_device *netdev)
3088{
3089 struct e1000_adapter *adapter = netdev_priv(netdev);
3090 struct e1000_hw *hw = &adapter->hw;
3091 int err;
3092
3093 /* disallow open during test */
3094 if (test_bit(__E1000_TESTING, &adapter->state))
3095 return -EBUSY;
3096
9c563d20
JB		 3097 netif_carrier_off(netdev);
3098
bc7f75fa
AK		 3099 /* allocate transmit descriptors */
3100 err = e1000e_setup_tx_resources(adapter);
3101 if (err)
3102 goto err_setup_tx;
3103
3104 /* allocate receive descriptors */
3105 err = e1000e_setup_rx_resources(adapter);
3106 if (err)
3107 goto err_setup_rx;
3108
3109 e1000e_power_up_phy(adapter);
3110
3111 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3112 if ((adapter->hw.mng_cookie.status &
3113 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3114 e1000_update_mng_vlan(adapter);
3115
ad68076e
BA		 3116 /*
3117 * If AMT is enabled, let the firmware know that the network
3118 * interface is now open
3119 */
c43bc57e 3120 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3121 e1000_get_hw_control(adapter);
3122
ad68076e
BA		 3123 /*
3124 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3125 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3126 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3127 * clean_rx handler before we do so.
3128 */
bc7f75fa
AK		 3129 e1000_configure(adapter);
3130
3131 err = e1000_request_irq(adapter);
3132 if (err)
3133 goto err_req_irq;
3134
f8d59f78
BA		 3135 /*
3136 * Work around PCIe errata with MSI interrupts causing some chipsets to
3137 * ignore e1000e MSI messages, which means we need to test our MSI
3138 * interrupt now
3139 */
4662e82b 3140 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3141 err = e1000_test_msi(adapter);
3142 if (err) {
3143 e_err("Interrupt allocation failed\n");
3144 goto err_req_irq;
3145 }
3146 }
3147
bc7f75fa
AK		 3148 /* From here on the code is the same as e1000e_up() */
3149 clear_bit(__E1000_DOWN, &adapter->state);
3150
3151 napi_enable(&adapter->napi);
3152
3153 e1000_irq_enable(adapter);
3154
4cb9be7a 3155 netif_start_queue(netdev);
d55b53ff 3156
bc7f75fa
AK		 3157 /* fire a link status change interrupt to start the watchdog */
3158 ew32(ICS, E1000_ICS_LSC);
3159
3160 return 0;
3161
3162err_req_irq:
3163 e1000_release_hw_control(adapter);
3164 e1000_power_down_phy(adapter);
3165 e1000e_free_rx_resources(adapter);
3166err_setup_rx:
3167 e1000e_free_tx_resources(adapter);
3168err_setup_tx:
3169 e1000e_reset(adapter);
3170
3171 return err;
3172}
3173
3174/**
3175 * e1000_close - Disables a network interface
3176 * @netdev: network interface device structure
3177 *
3178 * Returns 0, this is not allowed to fail
3179 *
3180 * The close entry point is called when an interface is de-activated
3181 * by the OS. The hardware is still under the drivers control, but
3182 * needs to be disabled. A global MAC reset is issued to stop the
3183 * hardware, and all transmit and receive resources are freed.
3184 **/
3185static int e1000_close(struct net_device *netdev)
3186{
3187 struct e1000_adapter *adapter = netdev_priv(netdev);
3188
3189 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3190 e1000e_down(adapter);
3191 e1000_power_down_phy(adapter);
3192 e1000_free_irq(adapter);
3193
3194 e1000e_free_tx_resources(adapter);
3195 e1000e_free_rx_resources(adapter);
3196
ad68076e
BA		 3197 /*
3198 * kill manageability vlan ID if supported, but not if a vlan with
3199 * the same ID is registered on the host OS (let 8021q kill it)
3200 */
bc7f75fa
AK		 3201 if ((adapter->hw.mng_cookie.status &
3202 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3203 !(adapter->vlgrp &&
3204 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3205 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3206
ad68076e
BA		 3207 /*
3208 * If AMT is enabled, let the firmware know that the network
3209 * interface is now closed
3210 */
c43bc57e 3211 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3212 e1000_release_hw_control(adapter);
3213
3214 return 0;
3215}
3216/**
3217 * e1000_set_mac - Change the Ethernet Address of the NIC
3218 * @netdev: network interface device structure
3219 * @p: pointer to an address structure
3220 *
3221 * Returns 0 on success, negative on failure
3222 **/
3223static int e1000_set_mac(struct net_device *netdev, void *p)
3224{
3225 struct e1000_adapter *adapter = netdev_priv(netdev);
3226 struct sockaddr *addr = p;
3227
3228 if (!is_valid_ether_addr(addr->sa_data))
3229 return -EADDRNOTAVAIL;
3230
3231 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3232 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3233
3234 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3235
3236 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3237 /* activate the work around */
3238 e1000e_set_laa_state_82571(&adapter->hw, 1);
3239
ad68076e
BA		 3240 /*
3241 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3242 * between the time RAR[0] gets clobbered and the time it
3243 * gets fixed (in e1000_watchdog), the actual LAA is in one
3244 * of the RARs and no incoming packets directed to this port
3245 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3246 * RAR[14]
3247 */
bc7f75fa
AK		 3248 e1000e_rar_set(&adapter->hw,
3249 adapter->hw.mac.addr,
3250 adapter->hw.mac.rar_entry_count - 1);
3251 }
3252
3253 return 0;
3254}
3255
a8f88ff5
JB		 3256/**
3257 * e1000e_update_phy_task - work thread to update phy
3258 * @work: pointer to our work struct
3259 *
3260 * this worker thread exists because we must acquire a
3261 * semaphore to read the phy, which we could msleep while
3262 * waiting for it, and we can't msleep in a timer.
3263 **/
3264static void e1000e_update_phy_task(struct work_struct *work)
3265{
3266 struct e1000_adapter *adapter = container_of(work,
3267 struct e1000_adapter, update_phy_task);
3268 e1000_get_phy_info(&adapter->hw);
3269}
3270
ad68076e
BA		 3271/*
3272 * Need to wait a few seconds after link up to get diagnostic information from
3273 * the phy
3274 */
bc7f75fa
AK		 3275static void e1000_update_phy_info(unsigned long data)
3276{
3277 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3278 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3279}
3280
3281/**
3282 * e1000e_update_stats - Update the board statistics counters
3283 * @adapter: board private structure
3284 **/
3285void e1000e_update_stats(struct e1000_adapter *adapter)
3286{
7274c20f 3287 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3288 struct e1000_hw *hw = &adapter->hw;
3289 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3290 u16 phy_data;
bc7f75fa
AK		 3291
3292 /*
3293 * Prevent stats update while adapter is being reset, or if the pci
3294 * connection is down.
3295 */
3296 if (adapter->link_speed == 0)
3297 return;
3298 if (pci_channel_offline(pdev))
3299 return;
3300
bc7f75fa
AK		 3301 adapter->stats.crcerrs += er32(CRCERRS);
3302 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3303 adapter->stats.gorc += er32(GORCL);
3304 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3305 adapter->stats.bprc += er32(BPRC);
3306 adapter->stats.mprc += er32(MPRC);
3307 adapter->stats.roc += er32(ROC);
3308
bc7f75fa 3309 adapter->stats.mpc += er32(MPC);
a4f58f54
BA		 3310 if ((hw->phy.type == e1000_phy_82578) ||
3311 (hw->phy.type == e1000_phy_82577)) {
3312 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
29477e24
BA		 3313 if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data))
3314 adapter->stats.scc += phy_data;
a4f58f54
BA		 3315
3316 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
29477e24
BA		 3317 if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data))
3318 adapter->stats.ecol += phy_data;
a4f58f54
BA		 3319
3320 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
29477e24
BA		 3321 if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data))
3322 adapter->stats.mcc += phy_data;
a4f58f54
BA		 3323
3324 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
29477e24
BA		 3325 if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data))
3326 adapter->stats.latecol += phy_data;
a4f58f54
BA		 3327
3328 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
29477e24
BA		 3329 if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data))
3330 adapter->stats.dc += phy_data;
a4f58f54
BA		 3331 } else {
3332 adapter->stats.scc += er32(SCC);
3333 adapter->stats.ecol += er32(ECOL);
3334 adapter->stats.mcc += er32(MCC);
3335 adapter->stats.latecol += er32(LATECOL);
3336 adapter->stats.dc += er32(DC);
3337 }
bc7f75fa
AK		 3338 adapter->stats.xonrxc += er32(XONRXC);
3339 adapter->stats.xontxc += er32(XONTXC);
3340 adapter->stats.xoffrxc += er32(XOFFRXC);
3341 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3342 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3343 adapter->stats.gotc += er32(GOTCL);
3344 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3345 adapter->stats.rnbc += er32(RNBC);
3346 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3347
3348 adapter->stats.mptc += er32(MPTC);
3349 adapter->stats.bptc += er32(BPTC);
3350
3351 /* used for adaptive IFS */
3352
3353 hw->mac.tx_packet_delta = er32(TPT);
3354 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA		 3355 if ((hw->phy.type == e1000_phy_82578) ||
3356 (hw->phy.type == e1000_phy_82577)) {
3357 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
29477e24
BA		 3358 if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data))
3359 hw->mac.collision_delta = phy_data;
a4f58f54
BA		 3360 } else {
3361 hw->mac.collision_delta = er32(COLC);
3362 }
bc7f75fa
AK		 3363 adapter->stats.colc += hw->mac.collision_delta;
3364
3365 adapter->stats.algnerrc += er32(ALGNERRC);
3366 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA		 3367 if ((hw->phy.type == e1000_phy_82578) ||
3368 (hw->phy.type == e1000_phy_82577)) {
3369 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
29477e24
BA		 3370 if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data))
3371 adapter->stats.tncrs += phy_data;
a4f58f54
BA		 3372 } else {
3373 if ((hw->mac.type != e1000_82574) &&
3374 (hw->mac.type != e1000_82583))
3375 adapter->stats.tncrs += er32(TNCRS);
3376 }
bc7f75fa
AK		 3377 adapter->stats.cexterr += er32(CEXTERR);
3378 adapter->stats.tsctc += er32(TSCTC);
3379 adapter->stats.tsctfc += er32(TSCTFC);
3380
bc7f75fa 3381 /* Fill out the OS statistics structure */
7274c20f
AK		 3382 netdev->stats.multicast = adapter->stats.mprc;
3383 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3384
3385 /* Rx Errors */
3386
ad68076e
BA		 3387 /*
3388 * RLEC on some newer hardware can be incorrect so build
3389 * our own version based on RUC and ROC
3390 */
7274c20f 3391 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3392 adapter->stats.crcerrs + adapter->stats.algnerrc +
3393 adapter->stats.ruc + adapter->stats.roc +
3394 adapter->stats.cexterr;
7274c20f 3395 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3396 adapter->stats.roc;
7274c20f
AK		 3397 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3398 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3399 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3400
3401 /* Tx Errors */
7274c20f 3402 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3403 adapter->stats.latecol;
7274c20f
AK		 3404 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3405 netdev->stats.tx_window_errors = adapter->stats.latecol;
3406 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3407
3408 /* Tx Dropped needs to be maintained elsewhere */
3409
bc7f75fa
AK		 3410 /* Management Stats */
3411 adapter->stats.mgptc += er32(MGTPTC);
3412 adapter->stats.mgprc += er32(MGTPRC);
3413 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3414}
3415
7c25769f
BA		 3416/**
3417 * e1000_phy_read_status - Update the PHY register status snapshot
3418 * @adapter: board private structure
3419 **/
3420static void e1000_phy_read_status(struct e1000_adapter *adapter)
3421{
3422 struct e1000_hw *hw = &adapter->hw;
3423 struct e1000_phy_regs *phy = &adapter->phy_regs;
3424 int ret_val;
7c25769f
BA		 3425
3426 if ((er32(STATUS) & E1000_STATUS_LU) &&
3427 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3428 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3429 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3430 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3431 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3432 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3433 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3434 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3435 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3436 if (ret_val)
44defeb3 3437 e_warn("Error reading PHY register\n");
7c25769f
BA		 3438 } else {
3439 /*
3440 * Do not read PHY registers if link is not up
3441 * Set values to typical power-on defaults
3442 */
3443 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3444 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3445 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3446 BMSR_ERCAP);
3447 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3448 ADVERTISE_ALL | ADVERTISE_CSMA);
3449 phy->lpa = 0;
3450 phy->expansion = EXPANSION_ENABLENPAGE;
3451 phy->ctrl1000 = ADVERTISE_1000FULL;
3452 phy->stat1000 = 0;
3453 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3454 }
7c25769f
BA		 3455}
3456
bc7f75fa
AK		 3457static void e1000_print_link_info(struct e1000_adapter *adapter)
3458{
bc7f75fa
AK		 3459 struct e1000_hw *hw = &adapter->hw;
3460 u32 ctrl = er32(CTRL);
3461
8f12fe86
BA		 3462 /* Link status message must follow this format for user tools */
3463 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3464 "Flow Control: %s\n",
3465 adapter->netdev->name,
44defeb3
JK		 3466 adapter->link_speed,
3467 (adapter->link_duplex == FULL_DUPLEX) ?
3468 "Full Duplex" : "Half Duplex",
3469 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3470 "RX/TX" :
3471 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3472 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3473}
3474
a20e4cf9 3475bool e1000_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3476{
3477 struct e1000_hw *hw = &adapter->hw;
3478 bool link_active = 0;
3479 s32 ret_val = 0;
3480
3481 /*
3482 * get_link_status is set on LSC (link status) interrupt or
3483 * Rx sequence error interrupt. get_link_status will stay
3484 * false until the check_for_link establishes link
3485 * for copper adapters ONLY
3486 */
3487 switch (hw->phy.media_type) {
3488 case e1000_media_type_copper:
3489 if (hw->mac.get_link_status) {
3490 ret_val = hw->mac.ops.check_for_link(hw);
3491 link_active = !hw->mac.get_link_status;
3492 } else {
3493 link_active = 1;
3494 }
3495 break;
3496 case e1000_media_type_fiber:
3497 ret_val = hw->mac.ops.check_for_link(hw);
3498 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3499 break;
3500 case e1000_media_type_internal_serdes:
3501 ret_val = hw->mac.ops.check_for_link(hw);
3502 link_active = adapter->hw.mac.serdes_has_link;
3503 break;
3504 default:
3505 case e1000_media_type_unknown:
3506 break;
3507 }
3508
3509 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3510 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3511 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3512 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3513 }
3514
3515 return link_active;
3516}
3517
3518static void e1000e_enable_receives(struct e1000_adapter *adapter)
3519{
3520 /* make sure the receive unit is started */
3521 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3522 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3523 struct e1000_hw *hw = &adapter->hw;
3524 u32 rctl = er32(RCTL);
3525 ew32(RCTL, rctl | E1000_RCTL_EN);
3526 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3527 }
3528}
3529
bc7f75fa
AK		 3530/**
3531 * e1000_watchdog - Timer Call-back
3532 * @data: pointer to adapter cast into an unsigned long
3533 **/
3534static void e1000_watchdog(unsigned long data)
3535{
3536 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3537
3538 /* Do the rest outside of interrupt context */
3539 schedule_work(&adapter->watchdog_task);
3540
3541 /* TODO: make this use queue_delayed_work() */
3542}
3543
3544static void e1000_watchdog_task(struct work_struct *work)
3545{
3546 struct e1000_adapter *adapter = container_of(work,
3547 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3548 struct net_device *netdev = adapter->netdev;
3549 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3550 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3551 struct e1000_ring *tx_ring = adapter->tx_ring;
3552 struct e1000_hw *hw = &adapter->hw;
3553 u32 link, tctl;
bc7f75fa
AK		 3554 int tx_pending = 0;
3555
318a94d6
JK		 3556 link = e1000_has_link(adapter);
3557 if ((netif_carrier_ok(netdev)) && link) {
3558 e1000e_enable_receives(adapter);
bc7f75fa 3559 goto link_up;
bc7f75fa
AK		 3560 }
3561
3562 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3563 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3564 e1000_update_mng_vlan(adapter);
3565
bc7f75fa
AK		 3566 if (link) {
3567 if (!netif_carrier_ok(netdev)) {
3568 bool txb2b = 1;
318a94d6 3569 /* update snapshot of PHY registers on LSC */
7c25769f 3570 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3571 mac->ops.get_link_up_info(&adapter->hw,
3572 &adapter->link_speed,
3573 &adapter->link_duplex);
3574 e1000_print_link_info(adapter);
f4187b56
BA		 3575 /*
3576 * On supported PHYs, check for duplex mismatch only
3577 * if link has autonegotiated at 10/100 half
3578 */
3579 if ((hw->phy.type == e1000_phy_igp_3 ||
3580 hw->phy.type == e1000_phy_bm) &&
3581 (hw->mac.autoneg == true) &&
3582 (adapter->link_speed == SPEED_10 ||
3583 adapter->link_speed == SPEED_100) &&
3584 (adapter->link_duplex == HALF_DUPLEX)) {
3585 u16 autoneg_exp;
3586
3587 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3588
3589 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3590 e_info("Autonegotiated half duplex but"
3591 " link partner cannot autoneg. "
3592 " Try forcing full duplex if "
3593 "link gets many collisions.\n");
3594 }
3595
ad68076e
BA		 3596 /*
3597 * tweak tx_queue_len according to speed/duplex
3598 * and adjust the timeout factor
3599 */
bc7f75fa
AK		 3600 netdev->tx_queue_len = adapter->tx_queue_len;
3601 adapter->tx_timeout_factor = 1;
3602 switch (adapter->link_speed) {
3603 case SPEED_10:
3604 txb2b = 0;
3605 netdev->tx_queue_len = 10;
10f1b492 3606 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3607 break;
3608 case SPEED_100:
3609 txb2b = 0;
3610 netdev->tx_queue_len = 100;
4c86e0b9 3611 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 3612 break;
3613 }
3614
ad68076e
BA		 3615 /*
3616 * workaround: re-program speed mode bit after
3617 * link-up event
3618 */
bc7f75fa
AK		 3619 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3620 !txb2b) {
3621 u32 tarc0;
e9ec2c0f 3622 tarc0 = er32(TARC(0));
bc7f75fa 3623 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3624 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3625 }
3626
ad68076e
BA		 3627 /*
3628 * disable TSO for pcie and 10/100 speeds, to avoid
3629 * some hardware issues
3630 */
bc7f75fa
AK		 3631 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3632 switch (adapter->link_speed) {
3633 case SPEED_10:
3634 case SPEED_100:
44defeb3 3635 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3636 netdev->features &= ~NETIF_F_TSO;
3637 netdev->features &= ~NETIF_F_TSO6;
3638 break;
3639 case SPEED_1000:
3640 netdev->features |= NETIF_F_TSO;
3641 netdev->features |= NETIF_F_TSO6;
3642 break;
3643 default:
3644 /* oops */
3645 break;
3646 }
3647 }
3648
ad68076e
BA		 3649 /*
3650 * enable transmits in the hardware, need to do this
3651 * after setting TARC(0)
3652 */
bc7f75fa
AK		 3653 tctl = er32(TCTL);
3654 tctl |= E1000_TCTL_EN;
3655 ew32(TCTL, tctl);
3656
75eb0fad
BA		 3657 /*
3658 * Perform any post-link-up configuration before
3659 * reporting link up.
3660 */
3661 if (phy->ops.cfg_on_link_up)
3662 phy->ops.cfg_on_link_up(hw);
3663
bc7f75fa 3664 netif_carrier_on(netdev);
bc7f75fa
AK		 3665
3666 if (!test_bit(__E1000_DOWN, &adapter->state))
3667 mod_timer(&adapter->phy_info_timer,
3668 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3669 }
3670 } else {
3671 if (netif_carrier_ok(netdev)) {
3672 adapter->link_speed = 0;
3673 adapter->link_duplex = 0;
8f12fe86
BA		 3674 /* Link status message must follow this format */
3675 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3676 adapter->netdev->name);
bc7f75fa 3677 netif_carrier_off(netdev);
bc7f75fa
AK		 3678 if (!test_bit(__E1000_DOWN, &adapter->state))
3679 mod_timer(&adapter->phy_info_timer,
3680 round_jiffies(jiffies + 2 * HZ));
3681
3682 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3683 schedule_work(&adapter->reset_task);
3684 }
3685 }
3686
3687link_up:
3688 e1000e_update_stats(adapter);
3689
3690 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3691 adapter->tpt_old = adapter->stats.tpt;
3692 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3693 adapter->colc_old = adapter->stats.colc;
3694
7c25769f
BA		 3695 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3696 adapter->gorc_old = adapter->stats.gorc;
3697 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3698 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3699
3700 e1000e_update_adaptive(&adapter->hw);
3701
3702 if (!netif_carrier_ok(netdev)) {
3703 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3704 tx_ring->count);
3705 if (tx_pending) {
ad68076e
BA		 3706 /*
3707 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3708 * but we've got queued Tx work that's never going
3709 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3710 * (Do the reset outside of interrupt context).
3711 */
bc7f75fa
AK		 3712 adapter->tx_timeout_count++;
3713 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 3714 /* return immediately since reset is imminent */
3715 return;
bc7f75fa
AK		 3716 }
3717 }
3718
ad68076e 3719 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 3720 if (adapter->msix_entries)
3721 ew32(ICS, adapter->rx_ring->ims_val);
3722 else
3723 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 3724
3725 /* Force detection of hung controller every watchdog period */
3726 adapter->detect_tx_hung = 1;
3727
ad68076e
BA		 3728 /*
3729 * With 82571 controllers, LAA may be overwritten due to controller
3730 * reset from the other port. Set the appropriate LAA in RAR[0]
3731 */
bc7f75fa
AK		 3732 if (e1000e_get_laa_state_82571(hw))
3733 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3734
3735 /* Reset the timer */
3736 if (!test_bit(__E1000_DOWN, &adapter->state))
3737 mod_timer(&adapter->watchdog_timer,
3738 round_jiffies(jiffies + 2 * HZ));
3739}
3740
3741#define E1000_TX_FLAGS_CSUM 0x00000001
3742#define E1000_TX_FLAGS_VLAN 0x00000002
3743#define E1000_TX_FLAGS_TSO 0x00000004
3744#define E1000_TX_FLAGS_IPV4 0x00000008
3745#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3746#define E1000_TX_FLAGS_VLAN_SHIFT 16
3747
3748static int e1000_tso(struct e1000_adapter *adapter,
3749 struct sk_buff *skb)
3750{
3751 struct e1000_ring *tx_ring = adapter->tx_ring;
3752 struct e1000_context_desc *context_desc;
3753 struct e1000_buffer *buffer_info;
3754 unsigned int i;
3755 u32 cmd_length = 0;
3756 u16 ipcse = 0, tucse, mss;
3757 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3758 int err;
3759
3d5e33c9
BA		 3760 if (!skb_is_gso(skb))
3761 return 0;
bc7f75fa 3762
3d5e33c9
BA		 3763 if (skb_header_cloned(skb)) {
3764 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3765 if (err)
3766 return err;
bc7f75fa
AK		 3767 }
3768
3d5e33c9
BA		 3769 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3770 mss = skb_shinfo(skb)->gso_size;
3771 if (skb->protocol == htons(ETH_P_IP)) {
3772 struct iphdr *iph = ip_hdr(skb);
3773 iph->tot_len = 0;
3774 iph->check = 0;
3775 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
3776 0, IPPROTO_TCP, 0);
3777 cmd_length = E1000_TXD_CMD_IP;
3778 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 3779 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 3780 ipv6_hdr(skb)->payload_len = 0;
3781 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3782 &ipv6_hdr(skb)->daddr,
3783 0, IPPROTO_TCP, 0);
3784 ipcse = 0;
3785 }
3786 ipcss = skb_network_offset(skb);
3787 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3788 tucss = skb_transport_offset(skb);
3789 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3790 tucse = 0;
3791
3792 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3793 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3794
3795 i = tx_ring->next_to_use;
3796 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3797 buffer_info = &tx_ring->buffer_info[i];
3798
3799 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3800 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3801 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3802 context_desc->upper_setup.tcp_fields.tucss = tucss;
3803 context_desc->upper_setup.tcp_fields.tucso = tucso;
3804 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3805 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3806 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3807 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3808
3809 buffer_info->time_stamp = jiffies;
3810 buffer_info->next_to_watch = i;
3811
3812 i++;
3813 if (i == tx_ring->count)
3814 i = 0;
3815 tx_ring->next_to_use = i;
3816
3817 return 1;
bc7f75fa
AK		 3818}
3819
3820static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3821{
3822 struct e1000_ring *tx_ring = adapter->tx_ring;
3823 struct e1000_context_desc *context_desc;
3824 struct e1000_buffer *buffer_info;
3825 unsigned int i;
3826 u8 css;
af807c82 3827 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 3828 __be16 protocol;
bc7f75fa 3829
af807c82
DG		 3830 if (skb->ip_summed != CHECKSUM_PARTIAL)
3831 return 0;
bc7f75fa 3832
5f66f208
AJ		 3833 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3834 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3835 else
3836 protocol = skb->protocol;
3837
3f518390 3838 switch (protocol) {
09640e63 3839 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 3840 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3841 cmd_len |= E1000_TXD_CMD_TCP;
3842 break;
09640e63 3843 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 3844 /* XXX not handling all IPV6 headers */
3845 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3846 cmd_len |= E1000_TXD_CMD_TCP;
3847 break;
3848 default:
3849 if (unlikely(net_ratelimit()))
5f66f208
AJ		 3850 e_warn("checksum_partial proto=%x!\n",
3851 be16_to_cpu(protocol));
af807c82 3852 break;
bc7f75fa
AK		 3853 }
3854
af807c82
DG		 3855 css = skb_transport_offset(skb);
3856
3857 i = tx_ring->next_to_use;
3858 buffer_info = &tx_ring->buffer_info[i];
3859 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3860
3861 context_desc->lower_setup.ip_config = 0;
3862 context_desc->upper_setup.tcp_fields.tucss = css;
3863 context_desc->upper_setup.tcp_fields.tucso =
3864 css + skb->csum_offset;
3865 context_desc->upper_setup.tcp_fields.tucse = 0;
3866 context_desc->tcp_seg_setup.data = 0;
3867 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3868
3869 buffer_info->time_stamp = jiffies;
3870 buffer_info->next_to_watch = i;
3871
3872 i++;
3873 if (i == tx_ring->count)
3874 i = 0;
3875 tx_ring->next_to_use = i;
3876
3877 return 1;
bc7f75fa
AK		 3878}
3879
3880#define E1000_MAX_PER_TXD 8192
3881#define E1000_MAX_TXD_PWR 12
3882
3883static int e1000_tx_map(struct e1000_adapter *adapter,
3884 struct sk_buff *skb, unsigned int first,
3885 unsigned int max_per_txd, unsigned int nr_frags,
3886 unsigned int mss)
3887{
3888 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 3889 struct pci_dev *pdev = adapter->pdev;
1b7719c4 3890 struct e1000_buffer *buffer_info;
8ddc951c 3891 unsigned int len = skb_headlen(skb);
03b1320d 3892 unsigned int offset = 0, size, count = 0, i;
bc7f75fa
AK		 3893 unsigned int f;
3894
3895 i = tx_ring->next_to_use;
3896
3897 while (len) {
1b7719c4 3898 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 3899 size = min(len, max_per_txd);
3900
bc7f75fa 3901 buffer_info->length = size;
bc7f75fa 3902 buffer_info->time_stamp = jiffies;
bc7f75fa 3903 buffer_info->next_to_watch = i;
03b1320d
AD		 3904 buffer_info->dma = pci_map_single(pdev, skb->data + offset,
3905 size, PCI_DMA_TODEVICE);
3906 buffer_info->mapped_as_page = false;
3907 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3908 goto dma_error;
bc7f75fa
AK		 3909
3910 len -= size;
3911 offset += size;
03b1320d 3912 count++;
1b7719c4
AD		 3913
3914 if (len) {
3915 i++;
3916 if (i == tx_ring->count)
3917 i = 0;
3918 }
bc7f75fa
AK		 3919 }
3920
3921 for (f = 0; f < nr_frags; f++) {
3922 struct skb_frag_struct *frag;
3923
3924 frag = &skb_shinfo(skb)->frags[f];
3925 len = frag->size;
03b1320d 3926 offset = frag->page_offset;
bc7f75fa
AK		 3927
3928 while (len) {
1b7719c4
AD		 3929 i++;
3930 if (i == tx_ring->count)
3931 i = 0;
3932
bc7f75fa
AK		 3933 buffer_info = &tx_ring->buffer_info[i];
3934 size = min(len, max_per_txd);
bc7f75fa
AK		 3935
3936 buffer_info->length = size;
3937 buffer_info->time_stamp = jiffies;
bc7f75fa 3938 buffer_info->next_to_watch = i;
03b1320d
AD		 3939 buffer_info->dma = pci_map_page(pdev, frag->page,
3940 offset, size,
3941 PCI_DMA_TODEVICE);
3942 buffer_info->mapped_as_page = true;
3943 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3944 goto dma_error;
bc7f75fa
AK		 3945
3946 len -= size;
3947 offset += size;
3948 count++;
bc7f75fa
AK		 3949 }
3950 }
3951
bc7f75fa
AK		 3952 tx_ring->buffer_info[i].skb = skb;
3953 tx_ring->buffer_info[first].next_to_watch = i;
3954
3955 return count;
03b1320d
AD		 3956
3957dma_error:
3958 dev_err(&pdev->dev, "TX DMA map failed\n");
3959 buffer_info->dma = 0;
c1fa347f 3960 if (count)
03b1320d 3961 count--;
c1fa347f
RK		 3962
3963 while (count--) {
3964 if (i==0)
03b1320d 3965 i += tx_ring->count;
c1fa347f 3966 i--;
03b1320d
AD		 3967 buffer_info = &tx_ring->buffer_info[i];
3968 e1000_put_txbuf(adapter, buffer_info);;
3969 }
3970
3971 return 0;
bc7f75fa
AK		 3972}
3973
3974static void e1000_tx_queue(struct e1000_adapter *adapter,
3975 int tx_flags, int count)
3976{
3977 struct e1000_ring *tx_ring = adapter->tx_ring;
3978 struct e1000_tx_desc *tx_desc = NULL;
3979 struct e1000_buffer *buffer_info;
3980 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3981 unsigned int i;
3982
3983 if (tx_flags & E1000_TX_FLAGS_TSO) {
3984 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3985 E1000_TXD_CMD_TSE;
3986 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3987
3988 if (tx_flags & E1000_TX_FLAGS_IPV4)
3989 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3990 }
3991
3992 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3993 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3994 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3995 }
3996
3997 if (tx_flags & E1000_TX_FLAGS_VLAN) {
3998 txd_lower |= E1000_TXD_CMD_VLE;
3999 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4000 }
4001
4002 i = tx_ring->next_to_use;
4003
4004 while (count--) {
4005 buffer_info = &tx_ring->buffer_info[i];
4006 tx_desc = E1000_TX_DESC(*tx_ring, i);
4007 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4008 tx_desc->lower.data =
4009 cpu_to_le32(txd_lower | buffer_info->length);
4010 tx_desc->upper.data = cpu_to_le32(txd_upper);
4011
4012 i++;
4013 if (i == tx_ring->count)
4014 i = 0;
4015 }
4016
4017 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4018
ad68076e
BA		 4019 /*
4020 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4021 * know there are new descriptors to fetch. (Only
4022 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4023 * such as IA-64).
4024 */
bc7f75fa
AK		 4025 wmb();
4026
4027 tx_ring->next_to_use = i;
4028 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4029 /*
4030 * we need this if more than one processor can write to our tail
4031 * at a time, it synchronizes IO on IA64/Altix systems
4032 */
bc7f75fa
AK		 4033 mmiowb();
4034}
4035
4036#define MINIMUM_DHCP_PACKET_SIZE 282
4037static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4038 struct sk_buff *skb)
4039{
4040 struct e1000_hw *hw = &adapter->hw;
4041 u16 length, offset;
4042
4043 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4044 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4045 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4046 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4047 return 0;
4048 }
4049
4050 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4051 return 0;
4052
4053 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4054 return 0;
4055
4056 {
4057 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4058 struct udphdr *udp;
4059
4060 if (ip->protocol != IPPROTO_UDP)
4061 return 0;
4062
4063 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4064 if (ntohs(udp->dest) != 67)
4065 return 0;
4066
4067 offset = (u8 *)udp + 8 - skb->data;
4068 length = skb->len - offset;
4069 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4070 }
4071
4072 return 0;
4073}
4074
4075static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4076{
4077 struct e1000_adapter *adapter = netdev_priv(netdev);
4078
4079 netif_stop_queue(netdev);
ad68076e
BA		 4080 /*
4081 * Herbert's original patch had:
bc7f75fa 4082 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4083 * but since that doesn't exist yet, just open code it.
4084 */
bc7f75fa
AK		 4085 smp_mb();
4086
ad68076e
BA		 4087 /*
4088 * We need to check again in a case another CPU has just
4089 * made room available.
4090 */
bc7f75fa
AK		 4091 if (e1000_desc_unused(adapter->tx_ring) < size)
4092 return -EBUSY;
4093
4094 /* A reprieve! */
4095 netif_start_queue(netdev);
4096 ++adapter->restart_queue;
4097 return 0;
4098}
4099
4100static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4101{
4102 struct e1000_adapter *adapter = netdev_priv(netdev);
4103
4104 if (e1000_desc_unused(adapter->tx_ring) >= size)
4105 return 0;
4106 return __e1000_maybe_stop_tx(netdev, size);
4107}
4108
4109#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4110static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4111 struct net_device *netdev)
bc7f75fa
AK		 4112{
4113 struct e1000_adapter *adapter = netdev_priv(netdev);
4114 struct e1000_ring *tx_ring = adapter->tx_ring;
4115 unsigned int first;
4116 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4117 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4118 unsigned int tx_flags = 0;
4e6c709c 4119 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK		 4120 unsigned int nr_frags;
4121 unsigned int mss;
bc7f75fa
AK		 4122 int count = 0;
4123 int tso;
4124 unsigned int f;
bc7f75fa
AK		 4125
4126 if (test_bit(__E1000_DOWN, &adapter->state)) {
4127 dev_kfree_skb_any(skb);
4128 return NETDEV_TX_OK;
4129 }
4130
4131 if (skb->len <= 0) {
4132 dev_kfree_skb_any(skb);
4133 return NETDEV_TX_OK;
4134 }
4135
4136 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4137 /*
4138 * The controller does a simple calculation to
bc7f75fa
AK		 4139 * make sure there is enough room in the FIFO before
4140 * initiating the DMA for each buffer. The calc is:
4141 * 4 = ceil(buffer len/mss). To make sure we don't
4142 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4143 * drops.
4144 */
bc7f75fa
AK		 4145 if (mss) {
4146 u8 hdr_len;
4147 max_per_txd = min(mss << 2, max_per_txd);
4148 max_txd_pwr = fls(max_per_txd) - 1;
4149
ad68076e
BA		 4150 /*
4151 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4152 * points to just header, pull a few bytes of payload from
4153 * frags into skb->data
4154 */
bc7f75fa 4155 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4156 /*
4157 * we do this workaround for ES2LAN, but it is un-necessary,
4158 * avoiding it could save a lot of cycles
4159 */
4e6c709c 4160 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4161 unsigned int pull_size;
4162
4163 pull_size = min((unsigned int)4, skb->data_len);
4164 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4165 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4166 dev_kfree_skb_any(skb);
4167 return NETDEV_TX_OK;
4168 }
4169 len = skb->len - skb->data_len;
4170 }
4171 }
4172
4173 /* reserve a descriptor for the offload context */
4174 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4175 count++;
4176 count++;
4177
4178 count += TXD_USE_COUNT(len, max_txd_pwr);
4179
4180 nr_frags = skb_shinfo(skb)->nr_frags;
4181 for (f = 0; f < nr_frags; f++)
4182 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4183 max_txd_pwr);
4184
4185 if (adapter->hw.mac.tx_pkt_filtering)
4186 e1000_transfer_dhcp_info(adapter, skb);
4187
ad68076e
BA		 4188 /*
4189 * need: count + 2 desc gap to keep tail from touching
4190 * head, otherwise try next time
4191 */
92af3e95 4192 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4193 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4194
4195 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4196 tx_flags |= E1000_TX_FLAGS_VLAN;
4197 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4198 }
4199
4200 first = tx_ring->next_to_use;
4201
4202 tso = e1000_tso(adapter, skb);
4203 if (tso < 0) {
4204 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4205 return NETDEV_TX_OK;
4206 }
4207
4208 if (tso)
4209 tx_flags |= E1000_TX_FLAGS_TSO;
4210 else if (e1000_tx_csum(adapter, skb))
4211 tx_flags |= E1000_TX_FLAGS_CSUM;
4212
ad68076e
BA		 4213 /*
4214 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4215 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4216 * no longer assume, we must.
4217 */
bc7f75fa
AK		 4218 if (skb->protocol == htons(ETH_P_IP))
4219 tx_flags |= E1000_TX_FLAGS_IPV4;
4220
1b7719c4 4221 /* if count is 0 then mapping error has occured */
bc7f75fa 4222 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4223 if (count) {
4224 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4225 /* Make sure there is space in the ring for the next send. */
4226 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4227
4228 } else {
bc7f75fa 4229 dev_kfree_skb_any(skb);
1b7719c4
AD		 4230 tx_ring->buffer_info[first].time_stamp = 0;
4231 tx_ring->next_to_use = first;
bc7f75fa
AK		 4232 }
4233
bc7f75fa
AK		 4234 return NETDEV_TX_OK;
4235}
4236
4237/**
4238 * e1000_tx_timeout - Respond to a Tx Hang
4239 * @netdev: network interface device structure
4240 **/
4241static void e1000_tx_timeout(struct net_device *netdev)
4242{
4243 struct e1000_adapter *adapter = netdev_priv(netdev);
4244
4245 /* Do the reset outside of interrupt context */
4246 adapter->tx_timeout_count++;
4247 schedule_work(&adapter->reset_task);
4248}
4249
4250static void e1000_reset_task(struct work_struct *work)
4251{
4252 struct e1000_adapter *adapter;
4253 adapter = container_of(work, struct e1000_adapter, reset_task);
4254
4255 e1000e_reinit_locked(adapter);
4256}
4257
4258/**
4259 * e1000_get_stats - Get System Network Statistics
4260 * @netdev: network interface device structure
4261 *
4262 * Returns the address of the device statistics structure.
4263 * The statistics are actually updated from the timer callback.
4264 **/
4265static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4266{
bc7f75fa 4267 /* only return the current stats */
7274c20f 4268 return &netdev->stats;
bc7f75fa
AK		 4269}
4270
4271/**
4272 * e1000_change_mtu - Change the Maximum Transfer Unit
4273 * @netdev: network interface device structure
4274 * @new_mtu: new value for maximum frame size
4275 *
4276 * Returns 0 on success, negative on failure
4277 **/
4278static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4279{
4280 struct e1000_adapter *adapter = netdev_priv(netdev);
4281 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4282
2adc55c9
BA		 4283 /* Jumbo frame support */
4284 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4285 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4286 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4287 return -EINVAL;
4288 }
4289
2adc55c9
BA		 4290 /* Supported frame sizes */
4291 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4292 (max_frame > adapter->max_hw_frame_size)) {
4293 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4294 return -EINVAL;
4295 }
4296
4297 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4298 msleep(1);
610c9928 4299 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4300 adapter->max_frame_size = max_frame;
610c9928
BA		 4301 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4302 netdev->mtu = new_mtu;
bc7f75fa
AK		 4303 if (netif_running(netdev))
4304 e1000e_down(adapter);
4305
ad68076e
BA		 4306 /*
4307 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4308 * means we reserve 2 more, this pushes us to allocate from the next
4309 * larger slab size.
ad68076e 4310 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4311 * However with the new *_jumbo_rx* routines, jumbo receives will use
4312 * fragmented skbs
ad68076e 4313 */
bc7f75fa 4314
9926146b 4315 if (max_frame <= 2048)
bc7f75fa
AK		 4316 adapter->rx_buffer_len = 2048;
4317 else
4318 adapter->rx_buffer_len = 4096;
4319
4320 /* adjust allocation if LPE protects us, and we aren't using SBP */
4321 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4322 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4323 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4324 + ETH_FCS_LEN;
bc7f75fa 4325
bc7f75fa
AK		 4326 if (netif_running(netdev))
4327 e1000e_up(adapter);
4328 else
4329 e1000e_reset(adapter);
4330
4331 clear_bit(__E1000_RESETTING, &adapter->state);
4332
4333 return 0;
4334}
4335
4336static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4337 int cmd)
4338{
4339 struct e1000_adapter *adapter = netdev_priv(netdev);
4340 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4341
318a94d6 4342 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4343 return -EOPNOTSUPP;
4344
4345 switch (cmd) {
4346 case SIOCGMIIPHY:
4347 data->phy_id = adapter->hw.phy.addr;
4348 break;
4349 case SIOCGMIIREG:
b16a002e
BA		 4350 e1000_phy_read_status(adapter);
4351
7c25769f
BA		 4352 switch (data->reg_num & 0x1F) {
4353 case MII_BMCR:
4354 data->val_out = adapter->phy_regs.bmcr;
4355 break;
4356 case MII_BMSR:
4357 data->val_out = adapter->phy_regs.bmsr;
4358 break;
4359 case MII_PHYSID1:
4360 data->val_out = (adapter->hw.phy.id >> 16);
4361 break;
4362 case MII_PHYSID2:
4363 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4364 break;
4365 case MII_ADVERTISE:
4366 data->val_out = adapter->phy_regs.advertise;
4367 break;
4368 case MII_LPA:
4369 data->val_out = adapter->phy_regs.lpa;
4370 break;
4371 case MII_EXPANSION:
4372 data->val_out = adapter->phy_regs.expansion;
4373 break;
4374 case MII_CTRL1000:
4375 data->val_out = adapter->phy_regs.ctrl1000;
4376 break;
4377 case MII_STAT1000:
4378 data->val_out = adapter->phy_regs.stat1000;
4379 break;
4380 case MII_ESTATUS:
4381 data->val_out = adapter->phy_regs.estatus;
4382 break;
4383 default:
bc7f75fa
AK		 4384 return -EIO;
4385 }
bc7f75fa
AK		 4386 break;
4387 case SIOCSMIIREG:
4388 default:
4389 return -EOPNOTSUPP;
4390 }
4391 return 0;
4392}
4393
4394static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4395{
4396 switch (cmd) {
4397 case SIOCGMIIPHY:
4398 case SIOCGMIIREG:
4399 case SIOCSMIIREG:
4400 return e1000_mii_ioctl(netdev, ifr, cmd);
4401 default:
4402 return -EOPNOTSUPP;
4403 }
4404}
4405
a4f58f54
BA		 4406static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4407{
4408 struct e1000_hw *hw = &adapter->hw;
4409 u32 i, mac_reg;
4410 u16 phy_reg;
4411 int retval = 0;
4412
4413 /* copy MAC RARs to PHY RARs */
4414 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4415 mac_reg = er32(RAL(i));
4416 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4417 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4418 mac_reg = er32(RAH(i));
4419 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4420 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4421 }
4422
4423 /* copy MAC MTA to PHY MTA */
4424 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4425 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4426 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4427 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4428 }
4429
4430 /* configure PHY Rx Control register */
4431 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4432 mac_reg = er32(RCTL);
4433 if (mac_reg & E1000_RCTL_UPE)
4434 phy_reg |= BM_RCTL_UPE;
4435 if (mac_reg & E1000_RCTL_MPE)
4436 phy_reg |= BM_RCTL_MPE;
4437 phy_reg &= ~(BM_RCTL_MO_MASK);
4438 if (mac_reg & E1000_RCTL_MO_3)
4439 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4440 << BM_RCTL_MO_SHIFT);
4441 if (mac_reg & E1000_RCTL_BAM)
4442 phy_reg |= BM_RCTL_BAM;
4443 if (mac_reg & E1000_RCTL_PMCF)
4444 phy_reg |= BM_RCTL_PMCF;
4445 mac_reg = er32(CTRL);
4446 if (mac_reg & E1000_CTRL_RFCE)
4447 phy_reg |= BM_RCTL_RFCE;
4448 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4449
4450 /* enable PHY wakeup in MAC register */
4451 ew32(WUFC, wufc);
4452 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4453
4454 /* configure and enable PHY wakeup in PHY registers */
4455 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4456 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4457
4458 /* activate PHY wakeup */
94d8186a 4459 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4460 if (retval) {
4461 e_err("Could not acquire PHY\n");
4462 return retval;
4463 }
4464 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4465 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4466 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4467 if (retval) {
4468 e_err("Could not read PHY page 769\n");
4469 goto out;
4470 }
4471 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4472 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4473 if (retval)
4474 e_err("Could not set PHY Host Wakeup bit\n");
4475out:
94d8186a 4476 hw->phy.ops.release(hw);
a4f58f54
BA		 4477
4478 return retval;
4479}
4480
4f9de721 4481static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
bc7f75fa
AK		 4482{
4483 struct net_device *netdev = pci_get_drvdata(pdev);
4484 struct e1000_adapter *adapter = netdev_priv(netdev);
4485 struct e1000_hw *hw = &adapter->hw;
4486 u32 ctrl, ctrl_ext, rctl, status;
4487 u32 wufc = adapter->wol;
4488 int retval = 0;
4489
4490 netif_device_detach(netdev);
4491
4492 if (netif_running(netdev)) {
4493 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4494 e1000e_down(adapter);
4495 e1000_free_irq(adapter);
4496 }
4662e82b 4497 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4498
4499 retval = pci_save_state(pdev);
4500 if (retval)
4501 return retval;
4502
4503 status = er32(STATUS);
4504 if (status & E1000_STATUS_LU)
4505 wufc &= ~E1000_WUFC_LNKC;
4506
4507 if (wufc) {
4508 e1000_setup_rctl(adapter);
4509 e1000_set_multi(netdev);
4510
4511 /* turn on all-multi mode if wake on multicast is enabled */
4512 if (wufc & E1000_WUFC_MC) {
4513 rctl = er32(RCTL);
4514 rctl |= E1000_RCTL_MPE;
4515 ew32(RCTL, rctl);
4516 }
4517
4518 ctrl = er32(CTRL);
4519 /* advertise wake from D3Cold */
4520 #define E1000_CTRL_ADVD3WUC 0x00100000
4521 /* phy power management enable */
4522 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 4523 ctrl |= E1000_CTRL_ADVD3WUC;
4524 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4525 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 4526 ew32(CTRL, ctrl);
4527
318a94d6
JK		 4528 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4529 adapter->hw.phy.media_type ==
4530 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4531 /* keep the laser running in D3 */
4532 ctrl_ext = er32(CTRL_EXT);
93a23f48 4533 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 4534 ew32(CTRL_EXT, ctrl_ext);
4535 }
4536
97ac8cae
BA		 4537 if (adapter->flags & FLAG_IS_ICH)
4538 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4539
bc7f75fa
AK		 4540 /* Allow time for pending master requests to run */
4541 e1000e_disable_pcie_master(&adapter->hw);
4542
82776a4b 4543 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 4544 /* enable wakeup by the PHY */
4545 retval = e1000_init_phy_wakeup(adapter, wufc);
4546 if (retval)
4547 return retval;
4548 } else {
4549 /* enable wakeup by the MAC */
4550 ew32(WUFC, wufc);
4551 ew32(WUC, E1000_WUC_PME_EN);
4552 }
bc7f75fa
AK		 4553 } else {
4554 ew32(WUC, 0);
4555 ew32(WUFC, 0);
bc7f75fa
AK		 4556 }
4557
4f9de721
RW		 4558 *enable_wake = !!wufc;
4559
bc7f75fa 4560 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 4561 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4562 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4563 *enable_wake = true;
bc7f75fa
AK		 4564
4565 if (adapter->hw.phy.type == e1000_phy_igp_3)
4566 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4567
ad68076e
BA		 4568 /*
4569 * Release control of h/w to f/w. If f/w is AMT enabled, this
4570 * would have already happened in close and is redundant.
4571 */
bc7f75fa
AK		 4572 e1000_release_hw_control(adapter);
4573
4574 pci_disable_device(pdev);
4575
4f9de721
RW		 4576 return 0;
4577}
4578
4579static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4580{
4581 if (sleep && wake) {
4582 pci_prepare_to_sleep(pdev);
4583 return;
4584 }
4585
4586 pci_wake_from_d3(pdev, wake);
4587 pci_set_power_state(pdev, PCI_D3hot);
4588}
4589
4590static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4591 bool wake)
4592{
4593 struct net_device *netdev = pci_get_drvdata(pdev);
4594 struct e1000_adapter *adapter = netdev_priv(netdev);
4595
005cbdfc
AD		 4596 /*
4597 * The pci-e switch on some quad port adapters will report a
4598 * correctable error when the MAC transitions from D0 to D3. To
4599 * prevent this we need to mask off the correctable errors on the
4600 * downstream port of the pci-e switch.
4601 */
4602 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4603 struct pci_dev *us_dev = pdev->bus->self;
4604 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4605 u16 devctl;
4606
4607 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4608 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4609 (devctl & ~PCI_EXP_DEVCTL_CERE));
4610
4f9de721 4611 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 4612
4613 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4614 } else {
4f9de721 4615 e1000_power_off(pdev, sleep, wake);
005cbdfc 4616 }
bc7f75fa
AK		 4617}
4618
1eae4eb2
AK		 4619static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4620{
4621 int pos;
1eae4eb2
AK		 4622 u16 val;
4623
4624 /*
4625 * 82573 workaround - disable L1 ASPM on mobile chipsets
4626 *
4627 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4628 * resulting in lost data or garbage information on the pci-e link
4629 * level. This could result in (false) bad EEPROM checksum errors,
4630 * long ping times (up to 2s) or even a system freeze/hang.
4631 *
4632 * Unfortunately this feature saves about 1W power consumption when
4633 * active.
4634 */
4635 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 4636 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4637 if (val & 0x2) {
4638 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4639 val &= ~0x2;
4640 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4641 }
4642}
4643
bc7f75fa 4644#ifdef CONFIG_PM
4f9de721
RW		 4645static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4646{
4647 int retval;
4648 bool wake;
4649
4650 retval = __e1000_shutdown(pdev, &wake);
4651 if (!retval)
4652 e1000_complete_shutdown(pdev, true, wake);
4653
4654 return retval;
4655}
4656
bc7f75fa
AK		 4657static int e1000_resume(struct pci_dev *pdev)
4658{
4659 struct net_device *netdev = pci_get_drvdata(pdev);
4660 struct e1000_adapter *adapter = netdev_priv(netdev);
4661 struct e1000_hw *hw = &adapter->hw;
4662 u32 err;
4663
4664 pci_set_power_state(pdev, PCI_D0);
4665 pci_restore_state(pdev);
28b8f04a 4666 pci_save_state(pdev);
1eae4eb2 4667 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4668
f0f422e5 4669 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4670 if (err) {
4671 dev_err(&pdev->dev,
4672 "Cannot enable PCI device from suspend\n");
4673 return err;
4674 }
4675
4676 pci_set_master(pdev);
4677
4678 pci_enable_wake(pdev, PCI_D3hot, 0);
4679 pci_enable_wake(pdev, PCI_D3cold, 0);
4680
4662e82b 4681 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 4682 if (netif_running(netdev)) {
4683 err = e1000_request_irq(adapter);
4684 if (err)
4685 return err;
4686 }
4687
4688 e1000e_power_up_phy(adapter);
a4f58f54
BA		 4689
4690 /* report the system wakeup cause from S3/S4 */
4691 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4692 u16 phy_data;
4693
4694 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
4695 if (phy_data) {
4696 e_info("PHY Wakeup cause - %s\n",
4697 phy_data & E1000_WUS_EX ? "Unicast Packet" :
4698 phy_data & E1000_WUS_MC ? "Multicast Packet" :
4699 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
4700 phy_data & E1000_WUS_MAG ? "Magic Packet" :
4701 phy_data & E1000_WUS_LNKC ? "Link Status "
4702 " Change" : "other");
4703 }
4704 e1e_wphy(&adapter->hw, BM_WUS, ~0);
4705 } else {
4706 u32 wus = er32(WUS);
4707 if (wus) {
4708 e_info("MAC Wakeup cause - %s\n",
4709 wus & E1000_WUS_EX ? "Unicast Packet" :
4710 wus & E1000_WUS_MC ? "Multicast Packet" :
4711 wus & E1000_WUS_BC ? "Broadcast Packet" :
4712 wus & E1000_WUS_MAG ? "Magic Packet" :
4713 wus & E1000_WUS_LNKC ? "Link Status Change" :
4714 "other");
4715 }
4716 ew32(WUS, ~0);
4717 }
4718
bc7f75fa 4719 e1000e_reset(adapter);
bc7f75fa
AK		 4720
4721 e1000_init_manageability(adapter);
4722
4723 if (netif_running(netdev))
4724 e1000e_up(adapter);
4725
4726 netif_device_attach(netdev);
4727
ad68076e
BA		 4728 /*
4729 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4730 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4731 * under the control of the driver.
4732 */
c43bc57e 4733 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4734 e1000_get_hw_control(adapter);
4735
4736 return 0;
4737}
4738#endif
4739
4740static void e1000_shutdown(struct pci_dev *pdev)
4741{
4f9de721
RW		 4742 bool wake = false;
4743
4744 __e1000_shutdown(pdev, &wake);
4745
4746 if (system_state == SYSTEM_POWER_OFF)
4747 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 4748}
4749
4750#ifdef CONFIG_NET_POLL_CONTROLLER
4751/*
4752 * Polling 'interrupt' - used by things like netconsole to send skbs
4753 * without having to re-enable interrupts. It's not called while
4754 * the interrupt routine is executing.
4755 */
4756static void e1000_netpoll(struct net_device *netdev)
4757{
4758 struct e1000_adapter *adapter = netdev_priv(netdev);
4759
4760 disable_irq(adapter->pdev->irq);
4761 e1000_intr(adapter->pdev->irq, netdev);
4762
bc7f75fa
AK		 4763 enable_irq(adapter->pdev->irq);
4764}
4765#endif
4766
4767/**
4768 * e1000_io_error_detected - called when PCI error is detected
4769 * @pdev: Pointer to PCI device
4770 * @state: The current pci connection state
4771 *
4772 * This function is called after a PCI bus error affecting
4773 * this device has been detected.
4774 */
4775static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4776 pci_channel_state_t state)
4777{
4778 struct net_device *netdev = pci_get_drvdata(pdev);
4779 struct e1000_adapter *adapter = netdev_priv(netdev);
4780
4781 netif_device_detach(netdev);
4782
c93b5a76
MM		 4783 if (state == pci_channel_io_perm_failure)
4784 return PCI_ERS_RESULT_DISCONNECT;
4785
bc7f75fa
AK		 4786 if (netif_running(netdev))
4787 e1000e_down(adapter);
4788 pci_disable_device(pdev);
4789
4790 /* Request a slot slot reset. */
4791 return PCI_ERS_RESULT_NEED_RESET;
4792}
4793
4794/**
4795 * e1000_io_slot_reset - called after the pci bus has been reset.
4796 * @pdev: Pointer to PCI device
4797 *
4798 * Restart the card from scratch, as if from a cold-boot. Implementation
4799 * resembles the first-half of the e1000_resume routine.
4800 */
4801static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4802{
4803 struct net_device *netdev = pci_get_drvdata(pdev);
4804 struct e1000_adapter *adapter = netdev_priv(netdev);
4805 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4806 int err;
111b9dc5 4807 pci_ers_result_t result;
bc7f75fa 4808
1eae4eb2 4809 e1000e_disable_l1aspm(pdev);
f0f422e5 4810 err = pci_enable_device_mem(pdev);
6e4f6f6b 4811 if (err) {
bc7f75fa
AK		 4812 dev_err(&pdev->dev,
4813 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 4814 result = PCI_ERS_RESULT_DISCONNECT;
4815 } else {
4816 pci_set_master(pdev);
4817 pci_restore_state(pdev);
28b8f04a 4818 pci_save_state(pdev);
bc7f75fa 4819
111b9dc5
JB		 4820 pci_enable_wake(pdev, PCI_D3hot, 0);
4821 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4822
111b9dc5
JB		 4823 e1000e_reset(adapter);
4824 ew32(WUS, ~0);
4825 result = PCI_ERS_RESULT_RECOVERED;
4826 }
bc7f75fa 4827
111b9dc5
JB		 4828 pci_cleanup_aer_uncorrect_error_status(pdev);
4829
4830 return result;
bc7f75fa
AK		 4831}
4832
4833/**
4834 * e1000_io_resume - called when traffic can start flowing again.
4835 * @pdev: Pointer to PCI device
4836 *
4837 * This callback is called when the error recovery driver tells us that
4838 * its OK to resume normal operation. Implementation resembles the
4839 * second-half of the e1000_resume routine.
4840 */
4841static void e1000_io_resume(struct pci_dev *pdev)
4842{
4843 struct net_device *netdev = pci_get_drvdata(pdev);
4844 struct e1000_adapter *adapter = netdev_priv(netdev);
4845
4846 e1000_init_manageability(adapter);
4847
4848 if (netif_running(netdev)) {
4849 if (e1000e_up(adapter)) {
4850 dev_err(&pdev->dev,
4851 "can't bring device back up after reset\n");
4852 return;
4853 }
4854 }
4855
4856 netif_device_attach(netdev);
4857
ad68076e
BA		 4858 /*
4859 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4860 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4861 * under the control of the driver.
4862 */
c43bc57e 4863 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4864 e1000_get_hw_control(adapter);
4865
4866}
4867
4868static void e1000_print_device_info(struct e1000_adapter *adapter)
4869{
4870 struct e1000_hw *hw = &adapter->hw;
4871 struct net_device *netdev = adapter->netdev;
69e3fd8c 4872 u32 pba_num;
bc7f75fa
AK		 4873
4874 /* print bus type/speed/width info */
7c510e4b 4875 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 4876 /* bus width */
4877 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4878 "Width x1"),
4879 /* MAC address */
7c510e4b 4880 netdev->dev_addr);
44defeb3
JK		 4881 e_info("Intel(R) PRO/%s Network Connection\n",
4882 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4883 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4884 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4885 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4886}
4887
10aa4c04
AK		 4888static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4889{
4890 struct e1000_hw *hw = &adapter->hw;
4891 int ret_val;
4892 u16 buf = 0;
4893
4894 if (hw->mac.type != e1000_82573)
4895 return;
4896
4897 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4898 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4899 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 4900 dev_warn(&adapter->pdev->dev,
4901 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK		 4902 }
4903
4904 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4905 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4906 /* ASPM enable */
6c2a9efa
FP		 4907 dev_warn(&adapter->pdev->dev,
4908 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK		 4909 }
4910}
4911
651c2466
SH		 4912static const struct net_device_ops e1000e_netdev_ops = {
4913 .ndo_open = e1000_open,
4914 .ndo_stop = e1000_close,
00829823 4915 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 4916 .ndo_get_stats = e1000_get_stats,
4917 .ndo_set_multicast_list = e1000_set_multi,
4918 .ndo_set_mac_address = e1000_set_mac,
4919 .ndo_change_mtu = e1000_change_mtu,
4920 .ndo_do_ioctl = e1000_ioctl,
4921 .ndo_tx_timeout = e1000_tx_timeout,
4922 .ndo_validate_addr = eth_validate_addr,
4923
4924 .ndo_vlan_rx_register = e1000_vlan_rx_register,
4925 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
4926 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
4927#ifdef CONFIG_NET_POLL_CONTROLLER
4928 .ndo_poll_controller = e1000_netpoll,
4929#endif
4930};
4931
bc7f75fa
AK		 4932/**
4933 * e1000_probe - Device Initialization Routine
4934 * @pdev: PCI device information struct
4935 * @ent: entry in e1000_pci_tbl
4936 *
4937 * Returns 0 on success, negative on failure
4938 *
4939 * e1000_probe initializes an adapter identified by a pci_dev structure.
4940 * The OS initialization, configuring of the adapter private structure,
4941 * and a hardware reset occur.
4942 **/
4943static int __devinit e1000_probe(struct pci_dev *pdev,
4944 const struct pci_device_id *ent)
4945{
4946 struct net_device *netdev;
4947 struct e1000_adapter *adapter;
4948 struct e1000_hw *hw;
4949 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 4950 resource_size_t mmio_start, mmio_len;
4951 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 4952
4953 static int cards_found;
4954 int i, err, pci_using_dac;
4955 u16 eeprom_data = 0;
4956 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4957
1eae4eb2 4958 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4959
f0f422e5 4960 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4961 if (err)
4962 return err;
4963
4964 pci_using_dac = 0;
6a35528a 4965 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa 4966 if (!err) {
6a35528a 4967 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa
AK		 4968 if (!err)
4969 pci_using_dac = 1;
4970 } else {
284901a9 4971 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
bc7f75fa
AK		 4972 if (err) {
4973 err = pci_set_consistent_dma_mask(pdev,
284901a9 4974 DMA_BIT_MASK(32));
bc7f75fa
AK		 4975 if (err) {
4976 dev_err(&pdev->dev, "No usable DMA "
4977 "configuration, aborting\n");
4978 goto err_dma;
4979 }
4980 }
4981 }
4982
e8de1481 4983 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 4984 pci_select_bars(pdev, IORESOURCE_MEM),
4985 e1000e_driver_name);
bc7f75fa
AK		 4986 if (err)
4987 goto err_pci_reg;
4988
68eac460 4989 /* AER (Advanced Error Reporting) hooks */
19d5afd4 4990 pci_enable_pcie_error_reporting(pdev);
68eac460 4991
bc7f75fa 4992 pci_set_master(pdev);
438b365a
BA		 4993 /* PCI config space info */
4994 err = pci_save_state(pdev);
4995 if (err)
4996 goto err_alloc_etherdev;
bc7f75fa
AK		 4997
4998 err = -ENOMEM;
4999 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5000 if (!netdev)
5001 goto err_alloc_etherdev;
5002
bc7f75fa
AK		 5003 SET_NETDEV_DEV(netdev, &pdev->dev);
5004
5005 pci_set_drvdata(pdev, netdev);
5006 adapter = netdev_priv(netdev);
5007 hw = &adapter->hw;
5008 adapter->netdev = netdev;
5009 adapter->pdev = pdev;
5010 adapter->ei = ei;
5011 adapter->pba = ei->pba;
5012 adapter->flags = ei->flags;
eb7c3adb 5013 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5014 adapter->hw.adapter = adapter;
5015 adapter->hw.mac.type = ei->mac;
2adc55c9 5016 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5017 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5018
5019 mmio_start = pci_resource_start(pdev, 0);
5020 mmio_len = pci_resource_len(pdev, 0);
5021
5022 err = -EIO;
5023 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5024 if (!adapter->hw.hw_addr)
5025 goto err_ioremap;
5026
5027 if ((adapter->flags & FLAG_HAS_FLASH) &&
5028 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5029 flash_start = pci_resource_start(pdev, 1);
5030 flash_len = pci_resource_len(pdev, 1);
5031 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5032 if (!adapter->hw.flash_address)
5033 goto err_flashmap;
5034 }
5035
5036 /* construct the net_device struct */
651c2466 5037 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5038 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5039 netdev->watchdog_timeo = 5 * HZ;
5040 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5041 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5042
5043 netdev->mem_start = mmio_start;
5044 netdev->mem_end = mmio_start + mmio_len;
5045
5046 adapter->bd_number = cards_found++;
5047
4662e82b
BA		 5048 e1000e_check_options(adapter);
5049
bc7f75fa
AK		 5050 /* setup adapter struct */
5051 err = e1000_sw_init(adapter);
5052 if (err)
5053 goto err_sw_init;
5054
5055 err = -EIO;
5056
5057 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5058 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5059 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5060
69e3fd8c 5061 err = ei->get_variants(adapter);
bc7f75fa
AK		 5062 if (err)
5063 goto err_hw_init;
5064
4a770358
BA		 5065 if ((adapter->flags & FLAG_IS_ICH) &&
5066 (adapter->flags & FLAG_READ_ONLY_NVM))
5067 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5068
bc7f75fa
AK		 5069 hw->mac.ops.get_bus_info(&adapter->hw);
5070
318a94d6 5071 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5072
5073 /* Copper options */
318a94d6 5074 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5075 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5076 adapter->hw.phy.disable_polarity_correction = 0;
5077 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5078 }
5079
5080 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5081 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5082
5083 netdev->features = NETIF_F_SG |
5084 NETIF_F_HW_CSUM |
5085 NETIF_F_HW_VLAN_TX |
5086 NETIF_F_HW_VLAN_RX;
5087
5088 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5089 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5090
5091 netdev->features |= NETIF_F_TSO;
5092 netdev->features |= NETIF_F_TSO6;
5093
a5136e23
JK		 5094 netdev->vlan_features |= NETIF_F_TSO;
5095 netdev->vlan_features |= NETIF_F_TSO6;
5096 netdev->vlan_features |= NETIF_F_HW_CSUM;
5097 netdev->vlan_features |= NETIF_F_SG;
5098
bc7f75fa
AK		 5099 if (pci_using_dac)
5100 netdev->features |= NETIF_F_HIGHDMA;
5101
bc7f75fa
AK		 5102 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5103 adapter->flags |= FLAG_MNG_PT_ENABLED;
5104
ad68076e
BA		 5105 /*
5106 * before reading the NVM, reset the controller to
5107 * put the device in a known good starting state
5108 */
bc7f75fa
AK		 5109 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5110
5111 /*
5112 * systems with ASPM and others may see the checksum fail on the first
5113 * attempt. Let's give it a few tries
5114 */
5115 for (i = 0;; i++) {
5116 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5117 break;
5118 if (i == 2) {
44defeb3 5119 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5120 err = -EIO;
5121 goto err_eeprom;
5122 }
5123 }
5124
10aa4c04
AK		 5125 e1000_eeprom_checks(adapter);
5126
608f8a0d 5127 /* copy the MAC address */
bc7f75fa 5128 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5129 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5130
5131 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5132 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5133
5134 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5135 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5136 err = -EIO;
5137 goto err_eeprom;
5138 }
5139
5140 init_timer(&adapter->watchdog_timer);
5141 adapter->watchdog_timer.function = &e1000_watchdog;
5142 adapter->watchdog_timer.data = (unsigned long) adapter;
5143
5144 init_timer(&adapter->phy_info_timer);
5145 adapter->phy_info_timer.function = &e1000_update_phy_info;
5146 adapter->phy_info_timer.data = (unsigned long) adapter;
5147
5148 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5149 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5150 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5151 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5152 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5153
bc7f75fa
AK		 5154 /* Initialize link parameters. User can change them with ethtool */
5155 adapter->hw.mac.autoneg = 1;
309af40b 5156 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5157 adapter->hw.fc.requested_mode = e1000_fc_default;
5158 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5159 adapter->hw.phy.autoneg_advertised = 0x2f;
5160
5161 /* ring size defaults */
5162 adapter->rx_ring->count = 256;
5163 adapter->tx_ring->count = 256;
5164
5165 /*
5166 * Initial Wake on LAN setting - If APM wake is enabled in
5167 * the EEPROM, enable the ACPI Magic Packet filter
5168 */
5169 if (adapter->flags & FLAG_APME_IN_WUC) {
5170 /* APME bit in EEPROM is mapped to WUC.APME */
5171 eeprom_data = er32(WUC);
5172 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5173 if (eeprom_data & E1000_WUC_PHY_WAKE)
5174 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5175 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5176 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5177 (adapter->hw.bus.func == 1))
5178 e1000_read_nvm(&adapter->hw,
5179 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5180 else
5181 e1000_read_nvm(&adapter->hw,
5182 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5183 }
5184
5185 /* fetch WoL from EEPROM */
5186 if (eeprom_data & eeprom_apme_mask)
5187 adapter->eeprom_wol |= E1000_WUFC_MAG;
5188
5189 /*
5190 * now that we have the eeprom settings, apply the special cases
5191 * where the eeprom may be wrong or the board simply won't support
5192 * wake on lan on a particular port
5193 */
5194 if (!(adapter->flags & FLAG_HAS_WOL))
5195 adapter->eeprom_wol = 0;
5196
5197 /* initialize the wol settings based on the eeprom settings */
5198 adapter->wol = adapter->eeprom_wol;
6ff68026 5199 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5200
84527590
BA		 5201 /* save off EEPROM version number */
5202 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5203
bc7f75fa
AK		 5204 /* reset the hardware with the new settings */
5205 e1000e_reset(adapter);
5206
ad68076e
BA		 5207 /*
5208 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5209 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5210 * under the control of the driver.
5211 */
c43bc57e 5212 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5213 e1000_get_hw_control(adapter);
5214
bc7f75fa
AK		 5215 strcpy(netdev->name, "eth%d");
5216 err = register_netdev(netdev);
5217 if (err)
5218 goto err_register;
5219
9c563d20
JB		 5220 /* carrier off reporting is important to ethtool even BEFORE open */
5221 netif_carrier_off(netdev);
5222
bc7f75fa
AK		 5223 e1000_print_device_info(adapter);
5224
5225 return 0;
5226
5227err_register:
c43bc57e
JB		 5228 if (!(adapter->flags & FLAG_HAS_AMT))
5229 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5230err_eeprom:
5231 if (!e1000_check_reset_block(&adapter->hw))
5232 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5233err_hw_init:
bc7f75fa 5234
bc7f75fa
AK		 5235 kfree(adapter->tx_ring);
5236 kfree(adapter->rx_ring);
5237err_sw_init:
c43bc57e
JB		 5238 if (adapter->hw.flash_address)
5239 iounmap(adapter->hw.flash_address);
e82f54ba 5240 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5241err_flashmap:
bc7f75fa
AK		 5242 iounmap(adapter->hw.hw_addr);
5243err_ioremap:
5244 free_netdev(netdev);
5245err_alloc_etherdev:
f0f422e5
BA		 5246 pci_release_selected_regions(pdev,
5247 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5248err_pci_reg:
5249err_dma:
5250 pci_disable_device(pdev);
5251 return err;
5252}
5253
5254/**
5255 * e1000_remove - Device Removal Routine
5256 * @pdev: PCI device information struct
5257 *
5258 * e1000_remove is called by the PCI subsystem to alert the driver
5259 * that it should release a PCI device. The could be caused by a
5260 * Hot-Plug event, or because the driver is going to be removed from
5261 * memory.
5262 **/
5263static void __devexit e1000_remove(struct pci_dev *pdev)
5264{
5265 struct net_device *netdev = pci_get_drvdata(pdev);
5266 struct e1000_adapter *adapter = netdev_priv(netdev);
5267
ad68076e
BA		 5268 /*
5269 * flush_scheduled work may reschedule our watchdog task, so
5270 * explicitly disable watchdog tasks from being rescheduled
5271 */
bc7f75fa
AK		 5272 set_bit(__E1000_DOWN, &adapter->state);
5273 del_timer_sync(&adapter->watchdog_timer);
5274 del_timer_sync(&adapter->phy_info_timer);
5275
41cec6f1
BA		 5276 cancel_work_sync(&adapter->reset_task);
5277 cancel_work_sync(&adapter->watchdog_task);
5278 cancel_work_sync(&adapter->downshift_task);
5279 cancel_work_sync(&adapter->update_phy_task);
5280 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5281 flush_scheduled_work();
5282
17f208de
BA		 5283 if (!(netdev->flags & IFF_UP))
5284 e1000_power_down_phy(adapter);
5285
5286 unregister_netdev(netdev);
5287
ad68076e
BA		 5288 /*
5289 * Release control of h/w to f/w. If f/w is AMT enabled, this
5290 * would have already happened in close and is redundant.
5291 */
bc7f75fa
AK		 5292 e1000_release_hw_control(adapter);
5293
4662e82b 5294 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5295 kfree(adapter->tx_ring);
5296 kfree(adapter->rx_ring);
5297
5298 iounmap(adapter->hw.hw_addr);
5299 if (adapter->hw.flash_address)
5300 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5301 pci_release_selected_regions(pdev,
5302 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5303
5304 free_netdev(netdev);
5305
111b9dc5 5306 /* AER disable */
19d5afd4 5307 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5308
bc7f75fa
AK		 5309 pci_disable_device(pdev);
5310}
5311
5312/* PCI Error Recovery (ERS) */
5313static struct pci_error_handlers e1000_err_handler = {
5314 .error_detected = e1000_io_error_detected,
5315 .slot_reset = e1000_io_slot_reset,
5316 .resume = e1000_io_resume,
5317};
5318
a3aa1884 5319static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 5320 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5321 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5322 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5323 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5324 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5325 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5326 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5327 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5328 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5329
bc7f75fa
AK		 5330 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5331 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5332 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5333 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5334
bc7f75fa
AK		 5335 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5336 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5337 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5338
4662e82b 5339 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5340 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5341 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5342
bc7f75fa
AK		 5343 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5344 board_80003es2lan },
5345 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5346 board_80003es2lan },
5347 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5348 board_80003es2lan },
5349 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5350 board_80003es2lan },
ad68076e 5351
bc7f75fa
AK		 5352 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5353 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5354 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5355 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5356 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5357 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5358 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5359 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5360
bc7f75fa
AK		 5361 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5362 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5363 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5364 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5365 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5366 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5367 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5368 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5369 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5370
5371 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5372 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5373 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5374
f4187b56
BA		 5375 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5376 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5377
a4f58f54
BA		 5378 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5379 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5380 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5381 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5382
bc7f75fa
AK		 5383 { } /* terminate list */
5384};
5385MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5386
5387/* PCI Device API Driver */
5388static struct pci_driver e1000_driver = {
5389 .name = e1000e_driver_name,
5390 .id_table = e1000_pci_tbl,
5391 .probe = e1000_probe,
5392 .remove = __devexit_p(e1000_remove),
5393#ifdef CONFIG_PM
ad68076e 5394 /* Power Management Hooks */
bc7f75fa
AK		 5395 .suspend = e1000_suspend,
5396 .resume = e1000_resume,
5397#endif
5398 .shutdown = e1000_shutdown,
5399 .err_handler = &e1000_err_handler
5400};
5401
5402/**
5403 * e1000_init_module - Driver Registration Routine
5404 *
5405 * e1000_init_module is the first routine called when the driver is
5406 * loaded. All it does is register with the PCI subsystem.
5407 **/
5408static int __init e1000_init_module(void)
5409{
5410 int ret;
5411 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5412 e1000e_driver_name, e1000e_driver_version);
c7e54b1b 5413 printk(KERN_INFO "%s: Copyright (c) 1999 - 2009 Intel Corporation.\n",
bc7f75fa
AK		 5414 e1000e_driver_name);
5415 ret = pci_register_driver(&e1000_driver);
53ec5498 5416
bc7f75fa
AK		 5417 return ret;
5418}
5419module_init(e1000_init_module);
5420
5421/**
5422 * e1000_exit_module - Driver Exit Cleanup Routine
5423 *
5424 * e1000_exit_module is called just before the driver is removed
5425 * from memory.
5426 **/
5427static void __exit e1000_exit_module(void)
5428{
5429 pci_unregister_driver(&e1000_driver);
5430}
5431module_exit(e1000_exit_module);
5432
5433
5434MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5435MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5436MODULE_LICENSE("GPL");
5437MODULE_VERSION(DRV_VERSION);
5438
5439/* e1000_main.c */
Clone of davem's net-next-2.6 tree