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e1000e: use hardware writeback batching
[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
451152d9 4 Copyright(c) 1999 - 2010 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
c14c643b
BA		 55#define DRV_EXTRAVERSION "-k2"
56
57#define DRV_VERSION "1.2.7" DRV_EXTRAVERSION
bc7f75fa
AK		 58char e1000e_driver_name[] = "e1000e";
59const char e1000e_driver_version[] = DRV_VERSION;
60
61static const struct e1000_info *e1000_info_tbl[] = {
62 [board_82571] = &e1000_82571_info,
63 [board_82572] = &e1000_82572_info,
64 [board_82573] = &e1000_82573_info,
4662e82b 65 [board_82574] = &e1000_82574_info,
8c81c9c3 66 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 67 [board_80003es2lan] = &e1000_es2_info,
68 [board_ich8lan] = &e1000_ich8_info,
69 [board_ich9lan] = &e1000_ich9_info,
f4187b56 70 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 71 [board_pchlan] = &e1000_pch_info,
d3738bb8 72 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 73};
74
84f4ee90
TI		 75struct e1000_reg_info {
76 u32 ofs;
77 char *name;
78};
79
80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
85
86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
91
92static const struct e1000_reg_info e1000_reg_info_tbl[] = {
93
94 /* General Registers */
95 {E1000_CTRL, "CTRL"},
96 {E1000_STATUS, "STATUS"},
97 {E1000_CTRL_EXT, "CTRL_EXT"},
98
99 /* Interrupt Registers */
100 {E1000_ICR, "ICR"},
101
102 /* RX Registers */
103 {E1000_RCTL, "RCTL"},
104 {E1000_RDLEN, "RDLEN"},
105 {E1000_RDH, "RDH"},
106 {E1000_RDT, "RDT"},
107 {E1000_RDTR, "RDTR"},
108 {E1000_RXDCTL(0), "RXDCTL"},
109 {E1000_ERT, "ERT"},
110 {E1000_RDBAL, "RDBAL"},
111 {E1000_RDBAH, "RDBAH"},
112 {E1000_RDFH, "RDFH"},
113 {E1000_RDFT, "RDFT"},
114 {E1000_RDFHS, "RDFHS"},
115 {E1000_RDFTS, "RDFTS"},
116 {E1000_RDFPC, "RDFPC"},
117
118 /* TX Registers */
119 {E1000_TCTL, "TCTL"},
120 {E1000_TDBAL, "TDBAL"},
121 {E1000_TDBAH, "TDBAH"},
122 {E1000_TDLEN, "TDLEN"},
123 {E1000_TDH, "TDH"},
124 {E1000_TDT, "TDT"},
125 {E1000_TIDV, "TIDV"},
126 {E1000_TXDCTL(0), "TXDCTL"},
127 {E1000_TADV, "TADV"},
128 {E1000_TARC(0), "TARC"},
129 {E1000_TDFH, "TDFH"},
130 {E1000_TDFT, "TDFT"},
131 {E1000_TDFHS, "TDFHS"},
132 {E1000_TDFTS, "TDFTS"},
133 {E1000_TDFPC, "TDFPC"},
134
135 /* List Terminator */
136 {}
137};
138
139/*
140 * e1000_regdump - register printout routine
141 */
142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
143{
144 int n = 0;
145 char rname[16];
146 u32 regs[8];
147
148 switch (reginfo->ofs) {
149 case E1000_RXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_RXDCTL(n));
152 break;
153 case E1000_TXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TXDCTL(n));
156 break;
157 case E1000_TARC(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TARC(n));
160 break;
161 default:
162 printk(KERN_INFO "%-15s %08x\n",
163 reginfo->name, __er32(hw, reginfo->ofs));
164 return;
165 }
166
167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
168 printk(KERN_INFO "%-15s ", rname);
169 for (n = 0; n < 2; n++)
170 printk(KERN_CONT "%08x ", regs[n]);
171 printk(KERN_CONT "\n");
172}
173
174
175/*
176 * e1000e_dump - Print registers, tx-ring and rx-ring
177 */
178static void e1000e_dump(struct e1000_adapter *adapter)
179{
180 struct net_device *netdev = adapter->netdev;
181 struct e1000_hw *hw = &adapter->hw;
182 struct e1000_reg_info *reginfo;
183 struct e1000_ring *tx_ring = adapter->tx_ring;
184 struct e1000_tx_desc *tx_desc;
185 struct my_u0 { u64 a; u64 b; } *u0;
186 struct e1000_buffer *buffer_info;
187 struct e1000_ring *rx_ring = adapter->rx_ring;
188 union e1000_rx_desc_packet_split *rx_desc_ps;
189 struct e1000_rx_desc *rx_desc;
190 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
191 u32 staterr;
192 int i = 0;
193
194 if (!netif_msg_hw(adapter))
195 return;
196
197 /* Print netdevice Info */
198 if (netdev) {
199 dev_info(&adapter->pdev->dev, "Net device Info\n");
200 printk(KERN_INFO "Device Name state "
201 "trans_start last_rx\n");
202 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
203 netdev->name,
204 netdev->state,
205 netdev->trans_start,
206 netdev->last_rx);
207 }
208
209 /* Print Registers */
210 dev_info(&adapter->pdev->dev, "Register Dump\n");
211 printk(KERN_INFO " Register Name Value\n");
212 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
213 reginfo->name; reginfo++) {
214 e1000_regdump(hw, reginfo);
215 }
216
217 /* Print TX Ring Summary */
218 if (!netdev || !netif_running(netdev))
219 goto exit;
220
221 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
222 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
223 " leng ntw timestamp\n");
224 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
225 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
226 0, tx_ring->next_to_use, tx_ring->next_to_clean,
8eb64e6b 227 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 228 buffer_info->length,
229 buffer_info->next_to_watch,
8eb64e6b 230 (unsigned long long)buffer_info->time_stamp);
84f4ee90
TI		 231
232 /* Print TX Rings */
233 if (!netif_msg_tx_done(adapter))
234 goto rx_ring_summary;
235
236 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
237
238 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
239 *
240 * Legacy Transmit Descriptor
241 * +--------------------------------------------------------------+
242 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
243 * +--------------------------------------------------------------+
244 * 8 | Special | CSS | Status | CMD | CSO | Length |
245 * +--------------------------------------------------------------+
246 * 63 48 47 36 35 32 31 24 23 16 15 0
247 *
248 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
249 * 63 48 47 40 39 32 31 16 15 8 7 0
250 * +----------------------------------------------------------------+
251 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
252 * +----------------------------------------------------------------+
253 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
254 * +----------------------------------------------------------------+
255 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
256 *
257 * Extended Data Descriptor (DTYP=0x1)
258 * +----------------------------------------------------------------+
259 * 0 | Buffer Address [63:0] |
260 * +----------------------------------------------------------------+
261 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
262 * +----------------------------------------------------------------+
263 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
264 */
265 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Legacy format\n");
268 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Context format\n");
271 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
272 " [bi->dma ] leng ntw timestamp bi->skb "
273 "<-- Ext Data format\n");
274 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
275 tx_desc = E1000_TX_DESC(*tx_ring, i);
276 buffer_info = &tx_ring->buffer_info[i];
277 u0 = (struct my_u0 *)tx_desc;
278 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
279 "%04X %3X %016llX %p",
280 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
281 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
8eb64e6b
BA		 282 (unsigned long long)le64_to_cpu(u0->a),
283 (unsigned long long)le64_to_cpu(u0->b),
284 (unsigned long long)buffer_info->dma,
285 buffer_info->length, buffer_info->next_to_watch,
286 (unsigned long long)buffer_info->time_stamp,
84f4ee90
TI		 287 buffer_info->skb);
288 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
289 printk(KERN_CONT " NTC/U\n");
290 else if (i == tx_ring->next_to_use)
291 printk(KERN_CONT " NTU\n");
292 else if (i == tx_ring->next_to_clean)
293 printk(KERN_CONT " NTC\n");
294 else
295 printk(KERN_CONT "\n");
296
297 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
298 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
299 16, 1, phys_to_virt(buffer_info->dma),
300 buffer_info->length, true);
301 }
302
303 /* Print RX Rings Summary */
304rx_ring_summary:
305 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
306 printk(KERN_INFO "Queue [NTU] [NTC]\n");
307 printk(KERN_INFO " %5d %5X %5X\n", 0,
308 rx_ring->next_to_use, rx_ring->next_to_clean);
309
310 /* Print RX Rings */
311 if (!netif_msg_rx_status(adapter))
312 goto exit;
313
314 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
315 switch (adapter->rx_ps_pages) {
316 case 1:
317 case 2:
318 case 3:
319 /* [Extended] Packet Split Receive Descriptor Format
320 *
321 * +-----------------------------------------------------+
322 * 0 | Buffer Address 0 [63:0] |
323 * +-----------------------------------------------------+
324 * 8 | Buffer Address 1 [63:0] |
325 * +-----------------------------------------------------+
326 * 16 | Buffer Address 2 [63:0] |
327 * +-----------------------------------------------------+
328 * 24 | Buffer Address 3 [63:0] |
329 * +-----------------------------------------------------+
330 */
331 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
332 "[buffer 1 63:0 ] "
333 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
334 "[bi->skb] <-- Ext Pkt Split format\n");
335 /* [Extended] Receive Descriptor (Write-Back) Format
336 *
337 * 63 48 47 32 31 13 12 8 7 4 3 0
338 * +------------------------------------------------------+
339 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
340 * | Checksum | Ident | | Queue | | Type |
341 * +------------------------------------------------------+
342 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
343 * +------------------------------------------------------+
344 * 63 48 47 32 31 20 19 0
345 */
346 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
347 "[vl l0 ee es] "
348 "[ l3 l2 l1 hs] [reserved ] ---------------- "
349 "[bi->skb] <-- Ext Rx Write-Back format\n");
350 for (i = 0; i < rx_ring->count; i++) {
351 buffer_info = &rx_ring->buffer_info[i];
352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
353 u1 = (struct my_u1 *)rx_desc_ps;
354 staterr =
355 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
356 if (staterr & E1000_RXD_STAT_DD) {
357 /* Descriptor Done */
358 printk(KERN_INFO "RWB[0x%03X] %016llX "
359 "%016llX %016llX %016llX "
360 "---------------- %p", i,
8eb64e6b
BA		 361 (unsigned long long)le64_to_cpu(u1->a),
362 (unsigned long long)le64_to_cpu(u1->b),
363 (unsigned long long)le64_to_cpu(u1->c),
364 (unsigned long long)le64_to_cpu(u1->d),
84f4ee90
TI		 365 buffer_info->skb);
366 } else {
367 printk(KERN_INFO "R [0x%03X] %016llX "
368 "%016llX %016llX %016llX %016llX %p", i,
8eb64e6b
BA		 369 (unsigned long long)le64_to_cpu(u1->a),
370 (unsigned long long)le64_to_cpu(u1->b),
371 (unsigned long long)le64_to_cpu(u1->c),
372 (unsigned long long)le64_to_cpu(u1->d),
373 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 374 buffer_info->skb);
375
376 if (netif_msg_pktdata(adapter))
377 print_hex_dump(KERN_INFO, "",
378 DUMP_PREFIX_ADDRESS, 16, 1,
379 phys_to_virt(buffer_info->dma),
380 adapter->rx_ps_bsize0, true);
381 }
382
383 if (i == rx_ring->next_to_use)
384 printk(KERN_CONT " NTU\n");
385 else if (i == rx_ring->next_to_clean)
386 printk(KERN_CONT " NTC\n");
387 else
388 printk(KERN_CONT "\n");
389 }
390 break;
391 default:
392 case 0:
393 /* Legacy Receive Descriptor Format
394 *
395 * +-----------------------------------------------------+
396 * | Buffer Address [63:0] |
397 * +-----------------------------------------------------+
398 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
399 * +-----------------------------------------------------+
400 * 63 48 47 40 39 32 31 16 15 0
401 */
402 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
403 "[vl er S cks ln] [bi->dma ] [bi->skb] "
404 "<-- Legacy format\n");
405 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
406 rx_desc = E1000_RX_DESC(*rx_ring, i);
407 buffer_info = &rx_ring->buffer_info[i];
408 u0 = (struct my_u0 *)rx_desc;
409 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
8eb64e6b
BA		 410 "%016llX %p", i,
411 (unsigned long long)le64_to_cpu(u0->a),
412 (unsigned long long)le64_to_cpu(u0->b),
413 (unsigned long long)buffer_info->dma,
414 buffer_info->skb);
84f4ee90
TI		 415 if (i == rx_ring->next_to_use)
416 printk(KERN_CONT " NTU\n");
417 else if (i == rx_ring->next_to_clean)
418 printk(KERN_CONT " NTC\n");
419 else
420 printk(KERN_CONT "\n");
421
422 if (netif_msg_pktdata(adapter))
423 print_hex_dump(KERN_INFO, "",
424 DUMP_PREFIX_ADDRESS,
425 16, 1, phys_to_virt(buffer_info->dma),
426 adapter->rx_buffer_len, true);
427 }
428 }
429
430exit:
431 return;
432}
433
bc7f75fa
AK		 434/**
435 * e1000_desc_unused - calculate if we have unused descriptors
436 **/
437static int e1000_desc_unused(struct e1000_ring *ring)
438{
439 if (ring->next_to_clean > ring->next_to_use)
440 return ring->next_to_clean - ring->next_to_use - 1;
441
442 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
443}
444
445/**
ad68076e 446 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 447 * @adapter: board private structure
448 * @status: descriptor status field as written by hardware
449 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
450 * @skb: pointer to sk_buff to be indicated to stack
451 **/
452static void e1000_receive_skb(struct e1000_adapter *adapter,
453 struct net_device *netdev,
454 struct sk_buff *skb,
a39fe742 455 u8 status, __le16 vlan)
bc7f75fa
AK		 456{
457 skb->protocol = eth_type_trans(skb, netdev);
458
459 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 460 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
461 le16_to_cpu(vlan), skb);
bc7f75fa 462 else
89c88b16 463 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 464}
465
466/**
467 * e1000_rx_checksum - Receive Checksum Offload for 82543
468 * @adapter: board private structure
469 * @status_err: receive descriptor status and error fields
470 * @csum: receive descriptor csum field
471 * @sk_buff: socket buffer with received data
472 **/
473static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
474 u32 csum, struct sk_buff *skb)
475{
476 u16 status = (u16)status_err;
477 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 478
479 skb_checksum_none_assert(skb);
bc7f75fa
AK		 480
481 /* Ignore Checksum bit is set */
482 if (status & E1000_RXD_STAT_IXSM)
483 return;
484 /* TCP/UDP checksum error bit is set */
485 if (errors & E1000_RXD_ERR_TCPE) {
486 /* let the stack verify checksum errors */
487 adapter->hw_csum_err++;
488 return;
489 }
490
491 /* TCP/UDP Checksum has not been calculated */
492 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
493 return;
494
495 /* It must be a TCP or UDP packet with a valid checksum */
496 if (status & E1000_RXD_STAT_TCPCS) {
497 /* TCP checksum is good */
498 skb->ip_summed = CHECKSUM_UNNECESSARY;
499 } else {
ad68076e
BA		 500 /*
501 * IP fragment with UDP payload
502 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 503 * and then put the value in host order for further stack use.
504 */
a39fe742
AV		 505 __sum16 sum = (__force __sum16)htons(csum);
506 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 507 skb->ip_summed = CHECKSUM_COMPLETE;
508 }
509 adapter->hw_csum_good++;
510}
511
512/**
513 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
514 * @adapter: address of board private structure
515 **/
516static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
517 int cleaned_count)
518{
519 struct net_device *netdev = adapter->netdev;
520 struct pci_dev *pdev = adapter->pdev;
521 struct e1000_ring *rx_ring = adapter->rx_ring;
522 struct e1000_rx_desc *rx_desc;
523 struct e1000_buffer *buffer_info;
524 struct sk_buff *skb;
525 unsigned int i;
89d71a66 526 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 527
528 i = rx_ring->next_to_use;
529 buffer_info = &rx_ring->buffer_info[i];
530
531 while (cleaned_count--) {
532 skb = buffer_info->skb;
533 if (skb) {
534 skb_trim(skb, 0);
535 goto map_skb;
536 }
537
89d71a66 538 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 539 if (!skb) {
540 /* Better luck next round */
541 adapter->alloc_rx_buff_failed++;
542 break;
543 }
544
bc7f75fa
AK		 545 buffer_info->skb = skb;
546map_skb:
0be3f55f 547 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 548 adapter->rx_buffer_len,
0be3f55f
NN		 549 DMA_FROM_DEVICE);
550 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 551 dev_err(&pdev->dev, "RX DMA map failed\n");
552 adapter->rx_dma_failed++;
553 break;
554 }
555
556 rx_desc = E1000_RX_DESC(*rx_ring, i);
557 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
558
50849d79
TH		 559 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
560 /*
561 * Force memory writes to complete before letting h/w
562 * know there are new descriptors to fetch. (Only
563 * applicable for weak-ordered memory model archs,
564 * such as IA-64).
565 */
566 wmb();
567 writel(i, adapter->hw.hw_addr + rx_ring->tail);
568 }
bc7f75fa
AK		 569 i++;
570 if (i == rx_ring->count)
571 i = 0;
572 buffer_info = &rx_ring->buffer_info[i];
573 }
574
50849d79 575 rx_ring->next_to_use = i;
bc7f75fa
AK		 576}
577
578/**
579 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
580 * @adapter: address of board private structure
581 **/
582static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
583 int cleaned_count)
584{
585 struct net_device *netdev = adapter->netdev;
586 struct pci_dev *pdev = adapter->pdev;
587 union e1000_rx_desc_packet_split *rx_desc;
588 struct e1000_ring *rx_ring = adapter->rx_ring;
589 struct e1000_buffer *buffer_info;
590 struct e1000_ps_page *ps_page;
591 struct sk_buff *skb;
592 unsigned int i, j;
593
594 i = rx_ring->next_to_use;
595 buffer_info = &rx_ring->buffer_info[i];
596
597 while (cleaned_count--) {
598 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
599
600 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 601 ps_page = &buffer_info->ps_pages[j];
602 if (j >= adapter->rx_ps_pages) {
603 /* all unused desc entries get hw null ptr */
a39fe742 604 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 605 continue;
606 }
607 if (!ps_page->page) {
608 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 609 if (!ps_page->page) {
47f44e40
AK		 610 adapter->alloc_rx_buff_failed++;
611 goto no_buffers;
612 }
0be3f55f
NN		 613 ps_page->dma = dma_map_page(&pdev->dev,
614 ps_page->page,
615 0, PAGE_SIZE,
616 DMA_FROM_DEVICE);
617 if (dma_mapping_error(&pdev->dev,
618 ps_page->dma)) {
47f44e40
AK		 619 dev_err(&adapter->pdev->dev,
620 "RX DMA page map failed\n");
621 adapter->rx_dma_failed++;
622 goto no_buffers;
bc7f75fa 623 }
bc7f75fa 624 }
47f44e40
AK		 625 /*
626 * Refresh the desc even if buffer_addrs
627 * didn't change because each write-back
628 * erases this info.
629 */
630 rx_desc->read.buffer_addr[j+1] =
631 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 632 }
633
89d71a66
ED		 634 skb = netdev_alloc_skb_ip_align(netdev,
635 adapter->rx_ps_bsize0);
bc7f75fa
AK		 636
637 if (!skb) {
638 adapter->alloc_rx_buff_failed++;
639 break;
640 }
641
bc7f75fa 642 buffer_info->skb = skb;
0be3f55f 643 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 644 adapter->rx_ps_bsize0,
0be3f55f
NN		 645 DMA_FROM_DEVICE);
646 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 647 dev_err(&pdev->dev, "RX DMA map failed\n");
648 adapter->rx_dma_failed++;
649 /* cleanup skb */
650 dev_kfree_skb_any(skb);
651 buffer_info->skb = NULL;
652 break;
653 }
654
655 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
656
50849d79
TH		 657 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
658 /*
659 * Force memory writes to complete before letting h/w
660 * know there are new descriptors to fetch. (Only
661 * applicable for weak-ordered memory model archs,
662 * such as IA-64).
663 */
664 wmb();
665 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
666 }
667
bc7f75fa
AK		 668 i++;
669 if (i == rx_ring->count)
670 i = 0;
671 buffer_info = &rx_ring->buffer_info[i];
672 }
673
674no_buffers:
50849d79 675 rx_ring->next_to_use = i;
bc7f75fa
AK		 676}
677
97ac8cae
BA		 678/**
679 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
680 * @adapter: address of board private structure
97ac8cae
BA		 681 * @cleaned_count: number of buffers to allocate this pass
682 **/
683
684static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
685 int cleaned_count)
686{
687 struct net_device *netdev = adapter->netdev;
688 struct pci_dev *pdev = adapter->pdev;
689 struct e1000_rx_desc *rx_desc;
690 struct e1000_ring *rx_ring = adapter->rx_ring;
691 struct e1000_buffer *buffer_info;
692 struct sk_buff *skb;
693 unsigned int i;
89d71a66 694 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 695
696 i = rx_ring->next_to_use;
697 buffer_info = &rx_ring->buffer_info[i];
698
699 while (cleaned_count--) {
700 skb = buffer_info->skb;
701 if (skb) {
702 skb_trim(skb, 0);
703 goto check_page;
704 }
705
89d71a66 706 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 707 if (unlikely(!skb)) {
708 /* Better luck next round */
709 adapter->alloc_rx_buff_failed++;
710 break;
711 }
712
97ac8cae
BA		 713 buffer_info->skb = skb;
714check_page:
715 /* allocate a new page if necessary */
716 if (!buffer_info->page) {
717 buffer_info->page = alloc_page(GFP_ATOMIC);
718 if (unlikely(!buffer_info->page)) {
719 adapter->alloc_rx_buff_failed++;
720 break;
721 }
722 }
723
724 if (!buffer_info->dma)
0be3f55f 725 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 726 buffer_info->page, 0,
727 PAGE_SIZE,
0be3f55f 728 DMA_FROM_DEVICE);
97ac8cae
BA		 729
730 rx_desc = E1000_RX_DESC(*rx_ring, i);
731 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
732
733 if (unlikely(++i == rx_ring->count))
734 i = 0;
735 buffer_info = &rx_ring->buffer_info[i];
736 }
737
738 if (likely(rx_ring->next_to_use != i)) {
739 rx_ring->next_to_use = i;
740 if (unlikely(i-- == 0))
741 i = (rx_ring->count - 1);
742
743 /* Force memory writes to complete before letting h/w
744 * know there are new descriptors to fetch. (Only
745 * applicable for weak-ordered memory model archs,
746 * such as IA-64). */
747 wmb();
748 writel(i, adapter->hw.hw_addr + rx_ring->tail);
749 }
750}
751
bc7f75fa
AK		 752/**
753 * e1000_clean_rx_irq - Send received data up the network stack; legacy
754 * @adapter: board private structure
755 *
756 * the return value indicates whether actual cleaning was done, there
757 * is no guarantee that everything was cleaned
758 **/
759static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
760 int *work_done, int work_to_do)
761{
762 struct net_device *netdev = adapter->netdev;
763 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 764 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 765 struct e1000_ring *rx_ring = adapter->rx_ring;
766 struct e1000_rx_desc *rx_desc, *next_rxd;
767 struct e1000_buffer *buffer_info, *next_buffer;
768 u32 length;
769 unsigned int i;
770 int cleaned_count = 0;
771 bool cleaned = 0;
772 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
773
774 i = rx_ring->next_to_clean;
775 rx_desc = E1000_RX_DESC(*rx_ring, i);
776 buffer_info = &rx_ring->buffer_info[i];
777
778 while (rx_desc->status & E1000_RXD_STAT_DD) {
779 struct sk_buff *skb;
780 u8 status;
781
782 if (*work_done >= work_to_do)
783 break;
784 (*work_done)++;
2d0bb1c1 785 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 786
787 status = rx_desc->status;
788 skb = buffer_info->skb;
789 buffer_info->skb = NULL;
790
791 prefetch(skb->data - NET_IP_ALIGN);
792
793 i++;
794 if (i == rx_ring->count)
795 i = 0;
796 next_rxd = E1000_RX_DESC(*rx_ring, i);
797 prefetch(next_rxd);
798
799 next_buffer = &rx_ring->buffer_info[i];
800
801 cleaned = 1;
802 cleaned_count++;
0be3f55f 803 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 804 buffer_info->dma,
805 adapter->rx_buffer_len,
0be3f55f 806 DMA_FROM_DEVICE);
bc7f75fa
AK		 807 buffer_info->dma = 0;
808
809 length = le16_to_cpu(rx_desc->length);
810
b94b5028
JB		 811 /*
812 * !EOP means multiple descriptors were used to store a single
813 * packet, if that's the case we need to toss it. In fact, we
814 * need to toss every packet with the EOP bit clear and the
815 * next frame that _does_ have the EOP bit set, as it is by
816 * definition only a frame fragment
817 */
818 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
819 adapter->flags2 |= FLAG2_IS_DISCARDING;
820
821 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 822 /* All receives must fit into a single buffer */
3bb99fe2 823 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 824 /* recycle */
825 buffer_info->skb = skb;
b94b5028
JB		 826 if (status & E1000_RXD_STAT_EOP)
827 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 828 goto next_desc;
829 }
830
831 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
832 /* recycle */
833 buffer_info->skb = skb;
834 goto next_desc;
835 }
836
eb7c3adb
JK		 837 /* adjust length to remove Ethernet CRC */
838 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
839 length -= 4;
840
bc7f75fa
AK		 841 total_rx_bytes += length;
842 total_rx_packets++;
843
ad68076e
BA		 844 /*
845 * code added for copybreak, this should improve
bc7f75fa 846 * performance for small packets with large amounts
ad68076e
BA		 847 * of reassembly being done in the stack
848 */
bc7f75fa
AK		 849 if (length < copybreak) {
850 struct sk_buff *new_skb =
89d71a66 851 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 852 if (new_skb) {
808ff676
BA		 853 skb_copy_to_linear_data_offset(new_skb,
854 -NET_IP_ALIGN,
855 (skb->data -
856 NET_IP_ALIGN),
857 (length +
858 NET_IP_ALIGN));
bc7f75fa
AK		 859 /* save the skb in buffer_info as good */
860 buffer_info->skb = skb;
861 skb = new_skb;
862 }
863 /* else just continue with the old one */
864 }
865 /* end copybreak code */
866 skb_put(skb, length);
867
868 /* Receive Checksum Offload */
869 e1000_rx_checksum(adapter,
870 (u32)(status) |
871 ((u32)(rx_desc->errors) << 24),
872 le16_to_cpu(rx_desc->csum), skb);
873
874 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
875
876next_desc:
877 rx_desc->status = 0;
878
879 /* return some buffers to hardware, one at a time is too slow */
880 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
881 adapter->alloc_rx_buf(adapter, cleaned_count);
882 cleaned_count = 0;
883 }
884
885 /* use prefetched values */
886 rx_desc = next_rxd;
887 buffer_info = next_buffer;
888 }
889 rx_ring->next_to_clean = i;
890
891 cleaned_count = e1000_desc_unused(rx_ring);
892 if (cleaned_count)
893 adapter->alloc_rx_buf(adapter, cleaned_count);
894
bc7f75fa 895 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 896 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 897 netdev->stats.rx_bytes += total_rx_bytes;
898 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 899 return cleaned;
900}
901
bc7f75fa
AK		 902static void e1000_put_txbuf(struct e1000_adapter *adapter,
903 struct e1000_buffer *buffer_info)
904{
03b1320d
AD		 905 if (buffer_info->dma) {
906 if (buffer_info->mapped_as_page)
0be3f55f
NN		 907 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
908 buffer_info->length, DMA_TO_DEVICE);
03b1320d 909 else
0be3f55f
NN		 910 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
911 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 912 buffer_info->dma = 0;
913 }
bc7f75fa
AK		 914 if (buffer_info->skb) {
915 dev_kfree_skb_any(buffer_info->skb);
916 buffer_info->skb = NULL;
917 }
1b7719c4 918 buffer_info->time_stamp = 0;
bc7f75fa
AK		 919}
920
41cec6f1 921static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 922{
41cec6f1
BA		 923 struct e1000_adapter *adapter = container_of(work,
924 struct e1000_adapter,
925 print_hang_task);
bc7f75fa
AK		 926 struct e1000_ring *tx_ring = adapter->tx_ring;
927 unsigned int i = tx_ring->next_to_clean;
928 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
929 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 930 struct e1000_hw *hw = &adapter->hw;
931 u16 phy_status, phy_1000t_status, phy_ext_status;
932 u16 pci_status;
933
934 e1e_rphy(hw, PHY_STATUS, &phy_status);
935 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
936 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 937
41cec6f1
BA		 938 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
939
940 /* detected Hardware unit hang */
941 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 942 " TDH <%x>\n"
943 " TDT <%x>\n"
944 " next_to_use <%x>\n"
945 " next_to_clean <%x>\n"
946 "buffer_info[next_to_clean]:\n"
947 " time_stamp <%lx>\n"
948 " next_to_watch <%x>\n"
949 " jiffies <%lx>\n"
41cec6f1
BA		 950 " next_to_watch.status <%x>\n"
951 "MAC Status <%x>\n"
952 "PHY Status <%x>\n"
953 "PHY 1000BASE-T Status <%x>\n"
954 "PHY Extended Status <%x>\n"
955 "PCI Status <%x>\n",
44defeb3
JK		 956 readl(adapter->hw.hw_addr + tx_ring->head),
957 readl(adapter->hw.hw_addr + tx_ring->tail),
958 tx_ring->next_to_use,
959 tx_ring->next_to_clean,
960 tx_ring->buffer_info[eop].time_stamp,
961 eop,
962 jiffies,
41cec6f1
BA		 963 eop_desc->upper.fields.status,
964 er32(STATUS),
965 phy_status,
966 phy_1000t_status,
967 phy_ext_status,
968 pci_status);
bc7f75fa
AK		 969}
970
971/**
972 * e1000_clean_tx_irq - Reclaim resources after transmit completes
973 * @adapter: board private structure
974 *
975 * the return value indicates whether actual cleaning was done, there
976 * is no guarantee that everything was cleaned
977 **/
978static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
979{
980 struct net_device *netdev = adapter->netdev;
981 struct e1000_hw *hw = &adapter->hw;
982 struct e1000_ring *tx_ring = adapter->tx_ring;
983 struct e1000_tx_desc *tx_desc, *eop_desc;
984 struct e1000_buffer *buffer_info;
985 unsigned int i, eop;
986 unsigned int count = 0;
bc7f75fa
AK		 987 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
988
989 i = tx_ring->next_to_clean;
990 eop = tx_ring->buffer_info[i].next_to_watch;
991 eop_desc = E1000_TX_DESC(*tx_ring, eop);
992
12d04a3c
AD		 993 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
994 (count < tx_ring->count)) {
a86043c2 995 bool cleaned = false;
2d0bb1c1 996 rmb(); /* read buffer_info after eop_desc */
a86043c2 997 for (; !cleaned; count++) {
bc7f75fa
AK		 998 tx_desc = E1000_TX_DESC(*tx_ring, i);
999 buffer_info = &tx_ring->buffer_info[i];
1000 cleaned = (i == eop);
1001
1002 if (cleaned) {
9ed318d5
TH		 1003 total_tx_packets += buffer_info->segs;
1004 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 1005 }
1006
1007 e1000_put_txbuf(adapter, buffer_info);
1008 tx_desc->upper.data = 0;
1009
1010 i++;
1011 if (i == tx_ring->count)
1012 i = 0;
1013 }
1014
dac87619
TL		 1015 if (i == tx_ring->next_to_use)
1016 break;
bc7f75fa
AK		 1017 eop = tx_ring->buffer_info[i].next_to_watch;
1018 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1019 }
1020
1021 tx_ring->next_to_clean = i;
1022
1023#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1024 if (count && netif_carrier_ok(netdev) &&
1025 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1026 /* Make sure that anybody stopping the queue after this
1027 * sees the new next_to_clean.
1028 */
1029 smp_mb();
1030
1031 if (netif_queue_stopped(netdev) &&
1032 !(test_bit(__E1000_DOWN, &adapter->state))) {
1033 netif_wake_queue(netdev);
1034 ++adapter->restart_queue;
1035 }
1036 }
1037
1038 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1039 /*
1040 * Detect a transmit hang in hardware, this serializes the
1041 * check with the clearing of time_stamp and movement of i
1042 */
bc7f75fa 1043 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1044 if (tx_ring->buffer_info[i].time_stamp &&
1045 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1046 + (adapter->tx_timeout_factor * HZ)) &&
1047 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1048 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1049 netif_stop_queue(netdev);
1050 }
1051 }
1052 adapter->total_tx_bytes += total_tx_bytes;
1053 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 1054 netdev->stats.tx_bytes += total_tx_bytes;
1055 netdev->stats.tx_packets += total_tx_packets;
807540ba 1056 return count < tx_ring->count;
bc7f75fa
AK		 1057}
1058
bc7f75fa
AK		 1059/**
1060 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1061 * @adapter: board private structure
1062 *
1063 * the return value indicates whether actual cleaning was done, there
1064 * is no guarantee that everything was cleaned
1065 **/
1066static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1067 int *work_done, int work_to_do)
1068{
3bb99fe2 1069 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1070 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1071 struct net_device *netdev = adapter->netdev;
1072 struct pci_dev *pdev = adapter->pdev;
1073 struct e1000_ring *rx_ring = adapter->rx_ring;
1074 struct e1000_buffer *buffer_info, *next_buffer;
1075 struct e1000_ps_page *ps_page;
1076 struct sk_buff *skb;
1077 unsigned int i, j;
1078 u32 length, staterr;
1079 int cleaned_count = 0;
1080 bool cleaned = 0;
1081 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1082
1083 i = rx_ring->next_to_clean;
1084 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1085 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1086 buffer_info = &rx_ring->buffer_info[i];
1087
1088 while (staterr & E1000_RXD_STAT_DD) {
1089 if (*work_done >= work_to_do)
1090 break;
1091 (*work_done)++;
1092 skb = buffer_info->skb;
2d0bb1c1 1093 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 1094
1095 /* in the packet split case this is header only */
1096 prefetch(skb->data - NET_IP_ALIGN);
1097
1098 i++;
1099 if (i == rx_ring->count)
1100 i = 0;
1101 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1102 prefetch(next_rxd);
1103
1104 next_buffer = &rx_ring->buffer_info[i];
1105
1106 cleaned = 1;
1107 cleaned_count++;
0be3f55f 1108 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1109 adapter->rx_ps_bsize0,
0be3f55f 1110 DMA_FROM_DEVICE);
bc7f75fa
AK		 1111 buffer_info->dma = 0;
1112
b94b5028
JB		 1113 /* see !EOP comment in other rx routine */
1114 if (!(staterr & E1000_RXD_STAT_EOP))
1115 adapter->flags2 |= FLAG2_IS_DISCARDING;
1116
1117 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1118 e_dbg("Packet Split buffers didn't pick up the full "
1119 "packet\n");
bc7f75fa 1120 dev_kfree_skb_irq(skb);
b94b5028
JB		 1121 if (staterr & E1000_RXD_STAT_EOP)
1122 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1123 goto next_desc;
1124 }
1125
1126 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1127 dev_kfree_skb_irq(skb);
1128 goto next_desc;
1129 }
1130
1131 length = le16_to_cpu(rx_desc->wb.middle.length0);
1132
1133 if (!length) {
3bb99fe2
BA		 1134 e_dbg("Last part of the packet spanning multiple "
1135 "descriptors\n");
bc7f75fa
AK		 1136 dev_kfree_skb_irq(skb);
1137 goto next_desc;
1138 }
1139
1140 /* Good Receive */
1141 skb_put(skb, length);
1142
1143 {
ad68076e
BA		 1144 /*
1145 * this looks ugly, but it seems compiler issues make it
1146 * more efficient than reusing j
1147 */
bc7f75fa
AK		 1148 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1149
ad68076e
BA		 1150 /*
1151 * page alloc/put takes too long and effects small packet
1152 * throughput, so unsplit small packets and save the alloc/put
1153 * only valid in softirq (napi) context to call kmap_*
1154 */
bc7f75fa
AK		 1155 if (l1 && (l1 <= copybreak) &&
1156 ((length + l1) <= adapter->rx_ps_bsize0)) {
1157 u8 *vaddr;
1158
47f44e40 1159 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1160
ad68076e
BA		 1161 /*
1162 * there is no documentation about how to call
bc7f75fa 1163 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1164 * very long
1165 */
0be3f55f
NN		 1166 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1167 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1168 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1169 memcpy(skb_tail_pointer(skb), vaddr, l1);
1170 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1171 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1172 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1173
eb7c3adb
JK		 1174 /* remove the CRC */
1175 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1176 l1 -= 4;
1177
bc7f75fa
AK		 1178 skb_put(skb, l1);
1179 goto copydone;
1180 } /* if */
1181 }
1182
1183 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1184 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1185 if (!length)
1186 break;
1187
47f44e40 1188 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1189 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1190 DMA_FROM_DEVICE);
bc7f75fa
AK		 1191 ps_page->dma = 0;
1192 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1193 ps_page->page = NULL;
1194 skb->len += length;
1195 skb->data_len += length;
1196 skb->truesize += length;
1197 }
1198
eb7c3adb
JK		 1199 /* strip the ethernet crc, problem is we're using pages now so
1200 * this whole operation can get a little cpu intensive
1201 */
1202 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1203 pskb_trim(skb, skb->len - 4);
1204
bc7f75fa
AK		 1205copydone:
1206 total_rx_bytes += skb->len;
1207 total_rx_packets++;
1208
1209 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1210 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1211
1212 if (rx_desc->wb.upper.header_status &
1213 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1214 adapter->rx_hdr_split++;
1215
1216 e1000_receive_skb(adapter, netdev, skb,
1217 staterr, rx_desc->wb.middle.vlan);
1218
1219next_desc:
1220 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1221 buffer_info->skb = NULL;
1222
1223 /* return some buffers to hardware, one at a time is too slow */
1224 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1225 adapter->alloc_rx_buf(adapter, cleaned_count);
1226 cleaned_count = 0;
1227 }
1228
1229 /* use prefetched values */
1230 rx_desc = next_rxd;
1231 buffer_info = next_buffer;
1232
1233 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1234 }
1235 rx_ring->next_to_clean = i;
1236
1237 cleaned_count = e1000_desc_unused(rx_ring);
1238 if (cleaned_count)
1239 adapter->alloc_rx_buf(adapter, cleaned_count);
1240
bc7f75fa 1241 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1242 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1243 netdev->stats.rx_bytes += total_rx_bytes;
1244 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 1245 return cleaned;
1246}
1247
97ac8cae
BA		 1248/**
1249 * e1000_consume_page - helper function
1250 **/
1251static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1252 u16 length)
1253{
1254 bi->page = NULL;
1255 skb->len += length;
1256 skb->data_len += length;
1257 skb->truesize += length;
1258}
1259
1260/**
1261 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1262 * @adapter: board private structure
1263 *
1264 * the return value indicates whether actual cleaning was done, there
1265 * is no guarantee that everything was cleaned
1266 **/
1267
1268static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1269 int *work_done, int work_to_do)
1270{
1271 struct net_device *netdev = adapter->netdev;
1272 struct pci_dev *pdev = adapter->pdev;
1273 struct e1000_ring *rx_ring = adapter->rx_ring;
1274 struct e1000_rx_desc *rx_desc, *next_rxd;
1275 struct e1000_buffer *buffer_info, *next_buffer;
1276 u32 length;
1277 unsigned int i;
1278 int cleaned_count = 0;
1279 bool cleaned = false;
1280 unsigned int total_rx_bytes=0, total_rx_packets=0;
1281
1282 i = rx_ring->next_to_clean;
1283 rx_desc = E1000_RX_DESC(*rx_ring, i);
1284 buffer_info = &rx_ring->buffer_info[i];
1285
1286 while (rx_desc->status & E1000_RXD_STAT_DD) {
1287 struct sk_buff *skb;
1288 u8 status;
1289
1290 if (*work_done >= work_to_do)
1291 break;
1292 (*work_done)++;
2d0bb1c1 1293 rmb(); /* read descriptor and rx_buffer_info after status DD */
97ac8cae
BA		 1294
1295 status = rx_desc->status;
1296 skb = buffer_info->skb;
1297 buffer_info->skb = NULL;
1298
1299 ++i;
1300 if (i == rx_ring->count)
1301 i = 0;
1302 next_rxd = E1000_RX_DESC(*rx_ring, i);
1303 prefetch(next_rxd);
1304
1305 next_buffer = &rx_ring->buffer_info[i];
1306
1307 cleaned = true;
1308 cleaned_count++;
0be3f55f
NN		 1309 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1310 DMA_FROM_DEVICE);
97ac8cae
BA		 1311 buffer_info->dma = 0;
1312
1313 length = le16_to_cpu(rx_desc->length);
1314
1315 /* errors is only valid for DD + EOP descriptors */
1316 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1317 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1318 /* recycle both page and skb */
1319 buffer_info->skb = skb;
1320 /* an error means any chain goes out the window
1321 * too */
1322 if (rx_ring->rx_skb_top)
1323 dev_kfree_skb(rx_ring->rx_skb_top);
1324 rx_ring->rx_skb_top = NULL;
1325 goto next_desc;
1326 }
1327
1328#define rxtop rx_ring->rx_skb_top
1329 if (!(status & E1000_RXD_STAT_EOP)) {
1330 /* this descriptor is only the beginning (or middle) */
1331 if (!rxtop) {
1332 /* this is the beginning of a chain */
1333 rxtop = skb;
1334 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1335 0, length);
1336 } else {
1337 /* this is the middle of a chain */
1338 skb_fill_page_desc(rxtop,
1339 skb_shinfo(rxtop)->nr_frags,
1340 buffer_info->page, 0, length);
1341 /* re-use the skb, only consumed the page */
1342 buffer_info->skb = skb;
1343 }
1344 e1000_consume_page(buffer_info, rxtop, length);
1345 goto next_desc;
1346 } else {
1347 if (rxtop) {
1348 /* end of the chain */
1349 skb_fill_page_desc(rxtop,
1350 skb_shinfo(rxtop)->nr_frags,
1351 buffer_info->page, 0, length);
1352 /* re-use the current skb, we only consumed the
1353 * page */
1354 buffer_info->skb = skb;
1355 skb = rxtop;
1356 rxtop = NULL;
1357 e1000_consume_page(buffer_info, skb, length);
1358 } else {
1359 /* no chain, got EOP, this buf is the packet
1360 * copybreak to save the put_page/alloc_page */
1361 if (length <= copybreak &&
1362 skb_tailroom(skb) >= length) {
1363 u8 *vaddr;
1364 vaddr = kmap_atomic(buffer_info->page,
1365 KM_SKB_DATA_SOFTIRQ);
1366 memcpy(skb_tail_pointer(skb), vaddr,
1367 length);
1368 kunmap_atomic(vaddr,
1369 KM_SKB_DATA_SOFTIRQ);
1370 /* re-use the page, so don't erase
1371 * buffer_info->page */
1372 skb_put(skb, length);
1373 } else {
1374 skb_fill_page_desc(skb, 0,
1375 buffer_info->page, 0,
1376 length);
1377 e1000_consume_page(buffer_info, skb,
1378 length);
1379 }
1380 }
1381 }
1382
1383 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1384 e1000_rx_checksum(adapter,
1385 (u32)(status) |
1386 ((u32)(rx_desc->errors) << 24),
1387 le16_to_cpu(rx_desc->csum), skb);
1388
1389 /* probably a little skewed due to removing CRC */
1390 total_rx_bytes += skb->len;
1391 total_rx_packets++;
1392
1393 /* eth type trans needs skb->data to point to something */
1394 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1395 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1396 dev_kfree_skb(skb);
1397 goto next_desc;
1398 }
1399
1400 e1000_receive_skb(adapter, netdev, skb, status,
1401 rx_desc->special);
1402
1403next_desc:
1404 rx_desc->status = 0;
1405
1406 /* return some buffers to hardware, one at a time is too slow */
1407 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1408 adapter->alloc_rx_buf(adapter, cleaned_count);
1409 cleaned_count = 0;
1410 }
1411
1412 /* use prefetched values */
1413 rx_desc = next_rxd;
1414 buffer_info = next_buffer;
1415 }
1416 rx_ring->next_to_clean = i;
1417
1418 cleaned_count = e1000_desc_unused(rx_ring);
1419 if (cleaned_count)
1420 adapter->alloc_rx_buf(adapter, cleaned_count);
1421
1422 adapter->total_rx_bytes += total_rx_bytes;
1423 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1424 netdev->stats.rx_bytes += total_rx_bytes;
1425 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1426 return cleaned;
1427}
1428
bc7f75fa
AK		 1429/**
1430 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1431 * @adapter: board private structure
1432 **/
1433static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1434{
1435 struct e1000_ring *rx_ring = adapter->rx_ring;
1436 struct e1000_buffer *buffer_info;
1437 struct e1000_ps_page *ps_page;
1438 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1439 unsigned int i, j;
1440
1441 /* Free all the Rx ring sk_buffs */
1442 for (i = 0; i < rx_ring->count; i++) {
1443 buffer_info = &rx_ring->buffer_info[i];
1444 if (buffer_info->dma) {
1445 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1446 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1447 adapter->rx_buffer_len,
0be3f55f 1448 DMA_FROM_DEVICE);
97ac8cae 1449 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1450 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1451 PAGE_SIZE,
0be3f55f 1452 DMA_FROM_DEVICE);
bc7f75fa 1453 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1454 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1455 adapter->rx_ps_bsize0,
0be3f55f 1456 DMA_FROM_DEVICE);
bc7f75fa
AK		 1457 buffer_info->dma = 0;
1458 }
1459
97ac8cae
BA		 1460 if (buffer_info->page) {
1461 put_page(buffer_info->page);
1462 buffer_info->page = NULL;
1463 }
1464
bc7f75fa
AK		 1465 if (buffer_info->skb) {
1466 dev_kfree_skb(buffer_info->skb);
1467 buffer_info->skb = NULL;
1468 }
1469
1470 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1471 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1472 if (!ps_page->page)
1473 break;
0be3f55f
NN		 1474 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1475 DMA_FROM_DEVICE);
bc7f75fa
AK		 1476 ps_page->dma = 0;
1477 put_page(ps_page->page);
1478 ps_page->page = NULL;
1479 }
1480 }
1481
1482 /* there also may be some cached data from a chained receive */
1483 if (rx_ring->rx_skb_top) {
1484 dev_kfree_skb(rx_ring->rx_skb_top);
1485 rx_ring->rx_skb_top = NULL;
1486 }
1487
bc7f75fa
AK		 1488 /* Zero out the descriptor ring */
1489 memset(rx_ring->desc, 0, rx_ring->size);
1490
1491 rx_ring->next_to_clean = 0;
1492 rx_ring->next_to_use = 0;
b94b5028 1493 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1494
1495 writel(0, adapter->hw.hw_addr + rx_ring->head);
1496 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1497}
1498
a8f88ff5
JB		 1499static void e1000e_downshift_workaround(struct work_struct *work)
1500{
1501 struct e1000_adapter *adapter = container_of(work,
1502 struct e1000_adapter, downshift_task);
1503
1504 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1505}
1506
bc7f75fa
AK		 1507/**
1508 * e1000_intr_msi - Interrupt Handler
1509 * @irq: interrupt number
1510 * @data: pointer to a network interface device structure
1511 **/
1512static irqreturn_t e1000_intr_msi(int irq, void *data)
1513{
1514 struct net_device *netdev = data;
1515 struct e1000_adapter *adapter = netdev_priv(netdev);
1516 struct e1000_hw *hw = &adapter->hw;
1517 u32 icr = er32(ICR);
1518
ad68076e
BA		 1519 /*
1520 * read ICR disables interrupts using IAM
1521 */
bc7f75fa 1522
573cca8c 1523 if (icr & E1000_ICR_LSC) {
bc7f75fa 1524 hw->mac.get_link_status = 1;
ad68076e
BA		 1525 /*
1526 * ICH8 workaround-- Call gig speed drop workaround on cable
1527 * disconnect (LSC) before accessing any PHY registers
1528 */
bc7f75fa
AK		 1529 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1530 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1531 schedule_work(&adapter->downshift_task);
bc7f75fa 1532
ad68076e
BA		 1533 /*
1534 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1535 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1536 * adapter in watchdog
1537 */
bc7f75fa
AK		 1538 if (netif_carrier_ok(netdev) &&
1539 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1540 /* disable receives */
1541 u32 rctl = er32(RCTL);
1542 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1543 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1544 }
1545 /* guard against interrupt when we're going down */
1546 if (!test_bit(__E1000_DOWN, &adapter->state))
1547 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1548 }
1549
288379f0 1550 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1551 adapter->total_tx_bytes = 0;
1552 adapter->total_tx_packets = 0;
1553 adapter->total_rx_bytes = 0;
1554 adapter->total_rx_packets = 0;
288379f0 1555 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1556 }
1557
1558 return IRQ_HANDLED;
1559}
1560
1561/**
1562 * e1000_intr - Interrupt Handler
1563 * @irq: interrupt number
1564 * @data: pointer to a network interface device structure
1565 **/
1566static irqreturn_t e1000_intr(int irq, void *data)
1567{
1568 struct net_device *netdev = data;
1569 struct e1000_adapter *adapter = netdev_priv(netdev);
1570 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1571 u32 rctl, icr = er32(ICR);
4662e82b 1572
a68ea775 1573 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1574 return IRQ_NONE; /* Not our interrupt */
1575
ad68076e
BA		 1576 /*
1577 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1578 * not set, then the adapter didn't send an interrupt
1579 */
bc7f75fa
AK		 1580 if (!(icr & E1000_ICR_INT_ASSERTED))
1581 return IRQ_NONE;
1582
ad68076e
BA		 1583 /*
1584 * Interrupt Auto-Mask...upon reading ICR,
1585 * interrupts are masked. No need for the
1586 * IMC write
1587 */
bc7f75fa 1588
573cca8c 1589 if (icr & E1000_ICR_LSC) {
bc7f75fa 1590 hw->mac.get_link_status = 1;
ad68076e
BA		 1591 /*
1592 * ICH8 workaround-- Call gig speed drop workaround on cable
1593 * disconnect (LSC) before accessing any PHY registers
1594 */
bc7f75fa
AK		 1595 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1596 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1597 schedule_work(&adapter->downshift_task);
bc7f75fa 1598
ad68076e
BA		 1599 /*
1600 * 80003ES2LAN workaround--
bc7f75fa
AK		 1601 * For packet buffer work-around on link down event;
1602 * disable receives here in the ISR and
1603 * reset adapter in watchdog
1604 */
1605 if (netif_carrier_ok(netdev) &&
1606 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1607 /* disable receives */
1608 rctl = er32(RCTL);
1609 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1610 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1611 }
1612 /* guard against interrupt when we're going down */
1613 if (!test_bit(__E1000_DOWN, &adapter->state))
1614 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1615 }
1616
288379f0 1617 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1618 adapter->total_tx_bytes = 0;
1619 adapter->total_tx_packets = 0;
1620 adapter->total_rx_bytes = 0;
1621 adapter->total_rx_packets = 0;
288379f0 1622 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1623 }
1624
1625 return IRQ_HANDLED;
1626}
1627
4662e82b
BA		 1628static irqreturn_t e1000_msix_other(int irq, void *data)
1629{
1630 struct net_device *netdev = data;
1631 struct e1000_adapter *adapter = netdev_priv(netdev);
1632 struct e1000_hw *hw = &adapter->hw;
1633 u32 icr = er32(ICR);
1634
1635 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1636 if (!test_bit(__E1000_DOWN, &adapter->state))
1637 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1638 return IRQ_NONE;
1639 }
1640
1641 if (icr & adapter->eiac_mask)
1642 ew32(ICS, (icr & adapter->eiac_mask));
1643
1644 if (icr & E1000_ICR_OTHER) {
1645 if (!(icr & E1000_ICR_LSC))
1646 goto no_link_interrupt;
1647 hw->mac.get_link_status = 1;
1648 /* guard against interrupt when we're going down */
1649 if (!test_bit(__E1000_DOWN, &adapter->state))
1650 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1651 }
1652
1653no_link_interrupt:
a3c69fef
JB		 1654 if (!test_bit(__E1000_DOWN, &adapter->state))
1655 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1656
1657 return IRQ_HANDLED;
1658}
1659
1660
1661static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1662{
1663 struct net_device *netdev = data;
1664 struct e1000_adapter *adapter = netdev_priv(netdev);
1665 struct e1000_hw *hw = &adapter->hw;
1666 struct e1000_ring *tx_ring = adapter->tx_ring;
1667
1668
1669 adapter->total_tx_bytes = 0;
1670 adapter->total_tx_packets = 0;
1671
1672 if (!e1000_clean_tx_irq(adapter))
1673 /* Ring was not completely cleaned, so fire another interrupt */
1674 ew32(ICS, tx_ring->ims_val);
1675
1676 return IRQ_HANDLED;
1677}
1678
1679static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1680{
1681 struct net_device *netdev = data;
1682 struct e1000_adapter *adapter = netdev_priv(netdev);
1683
1684 /* Write the ITR value calculated at the end of the
1685 * previous interrupt.
1686 */
1687 if (adapter->rx_ring->set_itr) {
1688 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1689 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1690 adapter->rx_ring->set_itr = 0;
1691 }
1692
288379f0 1693 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1694 adapter->total_rx_bytes = 0;
1695 adapter->total_rx_packets = 0;
288379f0 1696 __napi_schedule(&adapter->napi);
4662e82b
BA		 1697 }
1698 return IRQ_HANDLED;
1699}
1700
1701/**
1702 * e1000_configure_msix - Configure MSI-X hardware
1703 *
1704 * e1000_configure_msix sets up the hardware to properly
1705 * generate MSI-X interrupts.
1706 **/
1707static void e1000_configure_msix(struct e1000_adapter *adapter)
1708{
1709 struct e1000_hw *hw = &adapter->hw;
1710 struct e1000_ring *rx_ring = adapter->rx_ring;
1711 struct e1000_ring *tx_ring = adapter->tx_ring;
1712 int vector = 0;
1713 u32 ctrl_ext, ivar = 0;
1714
1715 adapter->eiac_mask = 0;
1716
1717 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1718 if (hw->mac.type == e1000_82574) {
1719 u32 rfctl = er32(RFCTL);
1720 rfctl |= E1000_RFCTL_ACK_DIS;
1721 ew32(RFCTL, rfctl);
1722 }
1723
1724#define E1000_IVAR_INT_ALLOC_VALID 0x8
1725 /* Configure Rx vector */
1726 rx_ring->ims_val = E1000_IMS_RXQ0;
1727 adapter->eiac_mask |= rx_ring->ims_val;
1728 if (rx_ring->itr_val)
1729 writel(1000000000 / (rx_ring->itr_val * 256),
1730 hw->hw_addr + rx_ring->itr_register);
1731 else
1732 writel(1, hw->hw_addr + rx_ring->itr_register);
1733 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1734
1735 /* Configure Tx vector */
1736 tx_ring->ims_val = E1000_IMS_TXQ0;
1737 vector++;
1738 if (tx_ring->itr_val)
1739 writel(1000000000 / (tx_ring->itr_val * 256),
1740 hw->hw_addr + tx_ring->itr_register);
1741 else
1742 writel(1, hw->hw_addr + tx_ring->itr_register);
1743 adapter->eiac_mask |= tx_ring->ims_val;
1744 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1745
1746 /* set vector for Other Causes, e.g. link changes */
1747 vector++;
1748 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1749 if (rx_ring->itr_val)
1750 writel(1000000000 / (rx_ring->itr_val * 256),
1751 hw->hw_addr + E1000_EITR_82574(vector));
1752 else
1753 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1754
1755 /* Cause Tx interrupts on every write back */
1756 ivar |= (1 << 31);
1757
1758 ew32(IVAR, ivar);
1759
1760 /* enable MSI-X PBA support */
1761 ctrl_ext = er32(CTRL_EXT);
1762 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1763
1764 /* Auto-Mask Other interrupts upon ICR read */
1765#define E1000_EIAC_MASK_82574 0x01F00000
1766 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1767 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1768 ew32(CTRL_EXT, ctrl_ext);
1769 e1e_flush();
1770}
1771
1772void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1773{
1774 if (adapter->msix_entries) {
1775 pci_disable_msix(adapter->pdev);
1776 kfree(adapter->msix_entries);
1777 adapter->msix_entries = NULL;
1778 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1779 pci_disable_msi(adapter->pdev);
1780 adapter->flags &= ~FLAG_MSI_ENABLED;
1781 }
4662e82b
BA		 1782}
1783
1784/**
1785 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1786 *
1787 * Attempt to configure interrupts using the best available
1788 * capabilities of the hardware and kernel.
1789 **/
1790void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1791{
1792 int err;
8e86acd7 1793 int i;
4662e82b
BA		 1794
1795 switch (adapter->int_mode) {
1796 case E1000E_INT_MODE_MSIX:
1797 if (adapter->flags & FLAG_HAS_MSIX) {
8e86acd7
JK		 1798 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1799 adapter->msix_entries = kcalloc(adapter->num_vectors,
4662e82b
BA		 1800 sizeof(struct msix_entry),
1801 GFP_KERNEL);
1802 if (adapter->msix_entries) {
8e86acd7 1803 for (i = 0; i < adapter->num_vectors; i++)
4662e82b
BA		 1804 adapter->msix_entries[i].entry = i;
1805
1806 err = pci_enable_msix(adapter->pdev,
1807 adapter->msix_entries,
8e86acd7
JK		 1808 adapter->num_vectors);
1809 if (err == 0) {
4662e82b 1810 return;
8e86acd7 1811 }
4662e82b
BA		 1812 }
1813 /* MSI-X failed, so fall through and try MSI */
1814 e_err("Failed to initialize MSI-X interrupts. "
1815 "Falling back to MSI interrupts.\n");
1816 e1000e_reset_interrupt_capability(adapter);
1817 }
1818 adapter->int_mode = E1000E_INT_MODE_MSI;
1819 /* Fall through */
1820 case E1000E_INT_MODE_MSI:
1821 if (!pci_enable_msi(adapter->pdev)) {
1822 adapter->flags |= FLAG_MSI_ENABLED;
1823 } else {
1824 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1825 e_err("Failed to initialize MSI interrupts. Falling "
1826 "back to legacy interrupts.\n");
1827 }
1828 /* Fall through */
1829 case E1000E_INT_MODE_LEGACY:
1830 /* Don't do anything; this is the system default */
1831 break;
1832 }
8e86acd7
JK		 1833
1834 /* store the number of vectors being used */
1835 adapter->num_vectors = 1;
4662e82b
BA		 1836}
1837
1838/**
1839 * e1000_request_msix - Initialize MSI-X interrupts
1840 *
1841 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1842 * kernel.
1843 **/
1844static int e1000_request_msix(struct e1000_adapter *adapter)
1845{
1846 struct net_device *netdev = adapter->netdev;
1847 int err = 0, vector = 0;
1848
1849 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1850 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1851 else
1852 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1853 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1854 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1855 netdev);
1856 if (err)
1857 goto out;
1858 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1859 adapter->rx_ring->itr_val = adapter->itr;
1860 vector++;
1861
1862 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1863 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1864 else
1865 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1866 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1867 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1868 netdev);
1869 if (err)
1870 goto out;
1871 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1872 adapter->tx_ring->itr_val = adapter->itr;
1873 vector++;
1874
1875 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1876 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1877 if (err)
1878 goto out;
1879
1880 e1000_configure_msix(adapter);
1881 return 0;
1882out:
1883 return err;
1884}
1885
f8d59f78
BA		 1886/**
1887 * e1000_request_irq - initialize interrupts
1888 *
1889 * Attempts to configure interrupts using the best available
1890 * capabilities of the hardware and kernel.
1891 **/
bc7f75fa
AK		 1892static int e1000_request_irq(struct e1000_adapter *adapter)
1893{
1894 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1895 int err;
1896
4662e82b
BA		 1897 if (adapter->msix_entries) {
1898 err = e1000_request_msix(adapter);
1899 if (!err)
1900 return err;
1901 /* fall back to MSI */
1902 e1000e_reset_interrupt_capability(adapter);
1903 adapter->int_mode = E1000E_INT_MODE_MSI;
1904 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1905 }
4662e82b 1906 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1907 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1908 netdev->name, netdev);
1909 if (!err)
1910 return err;
bc7f75fa 1911
4662e82b
BA		 1912 /* fall back to legacy interrupt */
1913 e1000e_reset_interrupt_capability(adapter);
1914 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1915 }
1916
a0607fd3 1917 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1918 netdev->name, netdev);
1919 if (err)
1920 e_err("Unable to allocate interrupt, Error: %d\n", err);
1921
bc7f75fa
AK		 1922 return err;
1923}
1924
1925static void e1000_free_irq(struct e1000_adapter *adapter)
1926{
1927 struct net_device *netdev = adapter->netdev;
1928
4662e82b
BA		 1929 if (adapter->msix_entries) {
1930 int vector = 0;
1931
1932 free_irq(adapter->msix_entries[vector].vector, netdev);
1933 vector++;
1934
1935 free_irq(adapter->msix_entries[vector].vector, netdev);
1936 vector++;
1937
1938 /* Other Causes interrupt vector */
1939 free_irq(adapter->msix_entries[vector].vector, netdev);
1940 return;
bc7f75fa 1941 }
4662e82b
BA		 1942
1943 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1944}
1945
1946/**
1947 * e1000_irq_disable - Mask off interrupt generation on the NIC
1948 **/
1949static void e1000_irq_disable(struct e1000_adapter *adapter)
1950{
1951 struct e1000_hw *hw = &adapter->hw;
1952
bc7f75fa 1953 ew32(IMC, ~0);
4662e82b
BA		 1954 if (adapter->msix_entries)
1955 ew32(EIAC_82574, 0);
bc7f75fa 1956 e1e_flush();
8e86acd7
JK		 1957
1958 if (adapter->msix_entries) {
1959 int i;
1960 for (i = 0; i < adapter->num_vectors; i++)
1961 synchronize_irq(adapter->msix_entries[i].vector);
1962 } else {
1963 synchronize_irq(adapter->pdev->irq);
1964 }
bc7f75fa
AK		 1965}
1966
1967/**
1968 * e1000_irq_enable - Enable default interrupt generation settings
1969 **/
1970static void e1000_irq_enable(struct e1000_adapter *adapter)
1971{
1972 struct e1000_hw *hw = &adapter->hw;
1973
4662e82b
BA		 1974 if (adapter->msix_entries) {
1975 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1976 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1977 } else {
1978 ew32(IMS, IMS_ENABLE_MASK);
1979 }
74ef9c39 1980 e1e_flush();
bc7f75fa
AK		 1981}
1982
1983/**
1984 * e1000_get_hw_control - get control of the h/w from f/w
1985 * @adapter: address of board private structure
1986 *
489815ce 1987 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1988 * For ASF and Pass Through versions of f/w this means that
1989 * the driver is loaded. For AMT version (only with 82573)
1990 * of the f/w this means that the network i/f is open.
1991 **/
1992static void e1000_get_hw_control(struct e1000_adapter *adapter)
1993{
1994 struct e1000_hw *hw = &adapter->hw;
1995 u32 ctrl_ext;
1996 u32 swsm;
1997
1998 /* Let firmware know the driver has taken over */
1999 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2000 swsm = er32(SWSM);
2001 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2002 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2003 ctrl_ext = er32(CTRL_EXT);
ad68076e 2004 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2005 }
2006}
2007
2008/**
2009 * e1000_release_hw_control - release control of the h/w to f/w
2010 * @adapter: address of board private structure
2011 *
489815ce 2012 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2013 * For ASF and Pass Through versions of f/w this means that the
2014 * driver is no longer loaded. For AMT version (only with 82573) i
2015 * of the f/w this means that the network i/f is closed.
2016 *
2017 **/
2018static void e1000_release_hw_control(struct e1000_adapter *adapter)
2019{
2020 struct e1000_hw *hw = &adapter->hw;
2021 u32 ctrl_ext;
2022 u32 swsm;
2023
2024 /* Let firmware taken over control of h/w */
2025 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2026 swsm = er32(SWSM);
2027 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2028 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2029 ctrl_ext = er32(CTRL_EXT);
ad68076e 2030 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2031 }
2032}
2033
bc7f75fa
AK		 2034/**
2035 * @e1000_alloc_ring - allocate memory for a ring structure
2036 **/
2037static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2038 struct e1000_ring *ring)
2039{
2040 struct pci_dev *pdev = adapter->pdev;
2041
2042 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2043 GFP_KERNEL);
2044 if (!ring->desc)
2045 return -ENOMEM;
2046
2047 return 0;
2048}
2049
2050/**
2051 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2052 * @adapter: board private structure
2053 *
2054 * Return 0 on success, negative on failure
2055 **/
2056int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2057{
2058 struct e1000_ring *tx_ring = adapter->tx_ring;
2059 int err = -ENOMEM, size;
2060
2061 size = sizeof(struct e1000_buffer) * tx_ring->count;
2062 tx_ring->buffer_info = vmalloc(size);
2063 if (!tx_ring->buffer_info)
2064 goto err;
2065 memset(tx_ring->buffer_info, 0, size);
2066
2067 /* round up to nearest 4K */
2068 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2069 tx_ring->size = ALIGN(tx_ring->size, 4096);
2070
2071 err = e1000_alloc_ring_dma(adapter, tx_ring);
2072 if (err)
2073 goto err;
2074
2075 tx_ring->next_to_use = 0;
2076 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2077
2078 return 0;
2079err:
2080 vfree(tx_ring->buffer_info);
44defeb3 2081 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2082 return err;
2083}
2084
2085/**
2086 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2087 * @adapter: board private structure
2088 *
2089 * Returns 0 on success, negative on failure
2090 **/
2091int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2092{
2093 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2094 struct e1000_buffer *buffer_info;
2095 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2096
2097 size = sizeof(struct e1000_buffer) * rx_ring->count;
2098 rx_ring->buffer_info = vmalloc(size);
2099 if (!rx_ring->buffer_info)
2100 goto err;
2101 memset(rx_ring->buffer_info, 0, size);
2102
47f44e40
AK		 2103 for (i = 0; i < rx_ring->count; i++) {
2104 buffer_info = &rx_ring->buffer_info[i];
2105 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2106 sizeof(struct e1000_ps_page),
2107 GFP_KERNEL);
2108 if (!buffer_info->ps_pages)
2109 goto err_pages;
2110 }
bc7f75fa
AK		 2111
2112 desc_len = sizeof(union e1000_rx_desc_packet_split);
2113
2114 /* Round up to nearest 4K */
2115 rx_ring->size = rx_ring->count * desc_len;
2116 rx_ring->size = ALIGN(rx_ring->size, 4096);
2117
2118 err = e1000_alloc_ring_dma(adapter, rx_ring);
2119 if (err)
47f44e40 2120 goto err_pages;
bc7f75fa
AK		 2121
2122 rx_ring->next_to_clean = 0;
2123 rx_ring->next_to_use = 0;
2124 rx_ring->rx_skb_top = NULL;
2125
2126 return 0;
47f44e40
AK		 2127
2128err_pages:
2129 for (i = 0; i < rx_ring->count; i++) {
2130 buffer_info = &rx_ring->buffer_info[i];
2131 kfree(buffer_info->ps_pages);
2132 }
bc7f75fa
AK		 2133err:
2134 vfree(rx_ring->buffer_info);
44defeb3 2135 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2136 return err;
2137}
2138
2139/**
2140 * e1000_clean_tx_ring - Free Tx Buffers
2141 * @adapter: board private structure
2142 **/
2143static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2144{
2145 struct e1000_ring *tx_ring = adapter->tx_ring;
2146 struct e1000_buffer *buffer_info;
2147 unsigned long size;
2148 unsigned int i;
2149
2150 for (i = 0; i < tx_ring->count; i++) {
2151 buffer_info = &tx_ring->buffer_info[i];
2152 e1000_put_txbuf(adapter, buffer_info);
2153 }
2154
2155 size = sizeof(struct e1000_buffer) * tx_ring->count;
2156 memset(tx_ring->buffer_info, 0, size);
2157
2158 memset(tx_ring->desc, 0, tx_ring->size);
2159
2160 tx_ring->next_to_use = 0;
2161 tx_ring->next_to_clean = 0;
2162
2163 writel(0, adapter->hw.hw_addr + tx_ring->head);
2164 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2165}
2166
2167/**
2168 * e1000e_free_tx_resources - Free Tx Resources per Queue
2169 * @adapter: board private structure
2170 *
2171 * Free all transmit software resources
2172 **/
2173void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2174{
2175 struct pci_dev *pdev = adapter->pdev;
2176 struct e1000_ring *tx_ring = adapter->tx_ring;
2177
2178 e1000_clean_tx_ring(adapter);
2179
2180 vfree(tx_ring->buffer_info);
2181 tx_ring->buffer_info = NULL;
2182
2183 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2184 tx_ring->dma);
2185 tx_ring->desc = NULL;
2186}
2187
2188/**
2189 * e1000e_free_rx_resources - Free Rx Resources
2190 * @adapter: board private structure
2191 *
2192 * Free all receive software resources
2193 **/
2194
2195void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2196{
2197 struct pci_dev *pdev = adapter->pdev;
2198 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2199 int i;
bc7f75fa
AK		 2200
2201 e1000_clean_rx_ring(adapter);
2202
47f44e40
AK		 2203 for (i = 0; i < rx_ring->count; i++) {
2204 kfree(rx_ring->buffer_info[i].ps_pages);
2205 }
2206
bc7f75fa
AK		 2207 vfree(rx_ring->buffer_info);
2208 rx_ring->buffer_info = NULL;
2209
bc7f75fa
AK		 2210 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2211 rx_ring->dma);
2212 rx_ring->desc = NULL;
2213}
2214
2215/**
2216 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2217 * @adapter: pointer to adapter
2218 * @itr_setting: current adapter->itr
2219 * @packets: the number of packets during this measurement interval
2220 * @bytes: the number of bytes during this measurement interval
2221 *
bc7f75fa
AK		 2222 * Stores a new ITR value based on packets and byte
2223 * counts during the last interrupt. The advantage of per interrupt
2224 * computation is faster updates and more accurate ITR for the current
2225 * traffic pattern. Constants in this function were computed
2226 * based on theoretical maximum wire speed and thresholds were set based
2227 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2228 * while increasing bulk throughput. This functionality is controlled
2229 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2230 **/
2231static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2232 u16 itr_setting, int packets,
2233 int bytes)
2234{
2235 unsigned int retval = itr_setting;
2236
2237 if (packets == 0)
2238 goto update_itr_done;
2239
2240 switch (itr_setting) {
2241 case lowest_latency:
2242 /* handle TSO and jumbo frames */
2243 if (bytes/packets > 8000)
2244 retval = bulk_latency;
2245 else if ((packets < 5) && (bytes > 512)) {
2246 retval = low_latency;
2247 }
2248 break;
2249 case low_latency: /* 50 usec aka 20000 ints/s */
2250 if (bytes > 10000) {
2251 /* this if handles the TSO accounting */
2252 if (bytes/packets > 8000) {
2253 retval = bulk_latency;
2254 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2255 retval = bulk_latency;
2256 } else if ((packets > 35)) {
2257 retval = lowest_latency;
2258 }
2259 } else if (bytes/packets > 2000) {
2260 retval = bulk_latency;
2261 } else if (packets <= 2 && bytes < 512) {
2262 retval = lowest_latency;
2263 }
2264 break;
2265 case bulk_latency: /* 250 usec aka 4000 ints/s */
2266 if (bytes > 25000) {
2267 if (packets > 35) {
2268 retval = low_latency;
2269 }
2270 } else if (bytes < 6000) {
2271 retval = low_latency;
2272 }
2273 break;
2274 }
2275
2276update_itr_done:
2277 return retval;
2278}
2279
2280static void e1000_set_itr(struct e1000_adapter *adapter)
2281{
2282 struct e1000_hw *hw = &adapter->hw;
2283 u16 current_itr;
2284 u32 new_itr = adapter->itr;
2285
2286 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2287 if (adapter->link_speed != SPEED_1000) {
2288 current_itr = 0;
2289 new_itr = 4000;
2290 goto set_itr_now;
2291 }
2292
2293 adapter->tx_itr = e1000_update_itr(adapter,
2294 adapter->tx_itr,
2295 adapter->total_tx_packets,
2296 adapter->total_tx_bytes);
2297 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2298 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2299 adapter->tx_itr = low_latency;
2300
2301 adapter->rx_itr = e1000_update_itr(adapter,
2302 adapter->rx_itr,
2303 adapter->total_rx_packets,
2304 adapter->total_rx_bytes);
2305 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2306 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2307 adapter->rx_itr = low_latency;
2308
2309 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2310
2311 switch (current_itr) {
2312 /* counts and packets in update_itr are dependent on these numbers */
2313 case lowest_latency:
2314 new_itr = 70000;
2315 break;
2316 case low_latency:
2317 new_itr = 20000; /* aka hwitr = ~200 */
2318 break;
2319 case bulk_latency:
2320 new_itr = 4000;
2321 break;
2322 default:
2323 break;
2324 }
2325
2326set_itr_now:
2327 if (new_itr != adapter->itr) {
ad68076e
BA		 2328 /*
2329 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2330 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2331 * increasing
2332 */
bc7f75fa
AK		 2333 new_itr = new_itr > adapter->itr ?
2334 min(adapter->itr + (new_itr >> 2), new_itr) :
2335 new_itr;
2336 adapter->itr = new_itr;
4662e82b
BA		 2337 adapter->rx_ring->itr_val = new_itr;
2338 if (adapter->msix_entries)
2339 adapter->rx_ring->set_itr = 1;
2340 else
2341 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 2342 }
2343}
2344
4662e82b
BA		 2345/**
2346 * e1000_alloc_queues - Allocate memory for all rings
2347 * @adapter: board private structure to initialize
2348 **/
2349static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2350{
2351 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2352 if (!adapter->tx_ring)
2353 goto err;
2354
2355 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2356 if (!adapter->rx_ring)
2357 goto err;
2358
2359 return 0;
2360err:
2361 e_err("Unable to allocate memory for queues\n");
2362 kfree(adapter->rx_ring);
2363 kfree(adapter->tx_ring);
2364 return -ENOMEM;
2365}
2366
bc7f75fa
AK		 2367/**
2368 * e1000_clean - NAPI Rx polling callback
ad68076e 2369 * @napi: struct associated with this polling callback
489815ce 2370 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2371 **/
2372static int e1000_clean(struct napi_struct *napi, int budget)
2373{
2374 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2375 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2376 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2377 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2378
4cf1653a 2379 adapter = netdev_priv(poll_dev);
bc7f75fa 2380
4662e82b
BA		 2381 if (adapter->msix_entries &&
2382 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2383 goto clean_rx;
2384
92af3e95 2385 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2386
4662e82b 2387clean_rx:
bc7f75fa 2388 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2389
12d04a3c 2390 if (!tx_cleaned)
d2c7ddd6 2391 work_done = budget;
bc7f75fa 2392
53e52c72
DM		 2393 /* If budget not fully consumed, exit the polling mode */
2394 if (work_done < budget) {
bc7f75fa
AK		 2395 if (adapter->itr_setting & 3)
2396 e1000_set_itr(adapter);
288379f0 2397 napi_complete(napi);
a3c69fef
JB		 2398 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2399 if (adapter->msix_entries)
2400 ew32(IMS, adapter->rx_ring->ims_val);
2401 else
2402 e1000_irq_enable(adapter);
2403 }
bc7f75fa
AK		 2404 }
2405
2406 return work_done;
2407}
2408
2409static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2410{
2411 struct e1000_adapter *adapter = netdev_priv(netdev);
2412 struct e1000_hw *hw = &adapter->hw;
2413 u32 vfta, index;
2414
2415 /* don't update vlan cookie if already programmed */
2416 if ((adapter->hw.mng_cookie.status &
2417 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2418 (vid == adapter->mng_vlan_id))
2419 return;
caaddaf8 2420
bc7f75fa 2421 /* add VID to filter table */
caaddaf8
BA		 2422 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2423 index = (vid >> 5) & 0x7F;
2424 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2425 vfta |= (1 << (vid & 0x1F));
2426 hw->mac.ops.write_vfta(hw, index, vfta);
2427 }
bc7f75fa
AK		 2428}
2429
2430static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2431{
2432 struct e1000_adapter *adapter = netdev_priv(netdev);
2433 struct e1000_hw *hw = &adapter->hw;
2434 u32 vfta, index;
2435
74ef9c39
JB		 2436 if (!test_bit(__E1000_DOWN, &adapter->state))
2437 e1000_irq_disable(adapter);
bc7f75fa 2438 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2439
2440 if (!test_bit(__E1000_DOWN, &adapter->state))
2441 e1000_irq_enable(adapter);
bc7f75fa
AK		 2442
2443 if ((adapter->hw.mng_cookie.status &
2444 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2445 (vid == adapter->mng_vlan_id)) {
2446 /* release control to f/w */
2447 e1000_release_hw_control(adapter);
2448 return;
2449 }
2450
2451 /* remove VID from filter table */
caaddaf8
BA		 2452 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2453 index = (vid >> 5) & 0x7F;
2454 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2455 vfta &= ~(1 << (vid & 0x1F));
2456 hw->mac.ops.write_vfta(hw, index, vfta);
2457 }
bc7f75fa
AK		 2458}
2459
2460static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2461{
2462 struct net_device *netdev = adapter->netdev;
2463 u16 vid = adapter->hw.mng_cookie.vlan_id;
2464 u16 old_vid = adapter->mng_vlan_id;
2465
2466 if (!adapter->vlgrp)
2467 return;
2468
2469 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2470 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2471 if (adapter->hw.mng_cookie.status &
2472 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2473 e1000_vlan_rx_add_vid(netdev, vid);
2474 adapter->mng_vlan_id = vid;
2475 }
2476
2477 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2478 (vid != old_vid) &&
2479 !vlan_group_get_device(adapter->vlgrp, old_vid))
2480 e1000_vlan_rx_kill_vid(netdev, old_vid);
2481 } else {
2482 adapter->mng_vlan_id = vid;
2483 }
2484}
2485
2486
2487static void e1000_vlan_rx_register(struct net_device *netdev,
2488 struct vlan_group *grp)
2489{
2490 struct e1000_adapter *adapter = netdev_priv(netdev);
2491 struct e1000_hw *hw = &adapter->hw;
2492 u32 ctrl, rctl;
2493
74ef9c39
JB		 2494 if (!test_bit(__E1000_DOWN, &adapter->state))
2495 e1000_irq_disable(adapter);
bc7f75fa
AK		 2496 adapter->vlgrp = grp;
2497
2498 if (grp) {
2499 /* enable VLAN tag insert/strip */
2500 ctrl = er32(CTRL);
2501 ctrl |= E1000_CTRL_VME;
2502 ew32(CTRL, ctrl);
2503
2504 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2505 /* enable VLAN receive filtering */
2506 rctl = er32(RCTL);
bc7f75fa
AK		 2507 rctl &= ~E1000_RCTL_CFIEN;
2508 ew32(RCTL, rctl);
2509 e1000_update_mng_vlan(adapter);
2510 }
2511 } else {
2512 /* disable VLAN tag insert/strip */
2513 ctrl = er32(CTRL);
2514 ctrl &= ~E1000_CTRL_VME;
2515 ew32(CTRL, ctrl);
2516
2517 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2518 if (adapter->mng_vlan_id !=
2519 (u16)E1000_MNG_VLAN_NONE) {
2520 e1000_vlan_rx_kill_vid(netdev,
2521 adapter->mng_vlan_id);
2522 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2523 }
2524 }
2525 }
2526
74ef9c39
JB		 2527 if (!test_bit(__E1000_DOWN, &adapter->state))
2528 e1000_irq_enable(adapter);
bc7f75fa
AK		 2529}
2530
2531static void e1000_restore_vlan(struct e1000_adapter *adapter)
2532{
2533 u16 vid;
2534
2535 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2536
2537 if (!adapter->vlgrp)
2538 return;
2539
2540 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2541 if (!vlan_group_get_device(adapter->vlgrp, vid))
2542 continue;
2543 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2544 }
2545}
2546
cd791618 2547static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2548{
2549 struct e1000_hw *hw = &adapter->hw;
cd791618 2550 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2551
2552 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2553 return;
2554
2555 manc = er32(MANC);
2556
ad68076e
BA		 2557 /*
2558 * enable receiving management packets to the host. this will probably
bc7f75fa 2559 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2560 * the packets will be handled on SMBUS
2561 */
bc7f75fa
AK		 2562 manc |= E1000_MANC_EN_MNG2HOST;
2563 manc2h = er32(MANC2H);
cd791618
BA		 2564
2565 switch (hw->mac.type) {
2566 default:
2567 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2568 break;
2569 case e1000_82574:
2570 case e1000_82583:
2571 /*
2572 * Check if IPMI pass-through decision filter already exists;
2573 * if so, enable it.
2574 */
2575 for (i = 0, j = 0; i < 8; i++) {
2576 mdef = er32(MDEF(i));
2577
2578 /* Ignore filters with anything other than IPMI ports */
3b21b508 2579 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2580 continue;
2581
2582 /* Enable this decision filter in MANC2H */
2583 if (mdef)
2584 manc2h |= (1 << i);
2585
2586 j |= mdef;
2587 }
2588
2589 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2590 break;
2591
2592 /* Create new decision filter in an empty filter */
2593 for (i = 0, j = 0; i < 8; i++)
2594 if (er32(MDEF(i)) == 0) {
2595 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2596 E1000_MDEF_PORT_664));
2597 manc2h |= (1 << 1);
2598 j++;
2599 break;
2600 }
2601
2602 if (!j)
2603 e_warn("Unable to create IPMI pass-through filter\n");
2604 break;
2605 }
2606
bc7f75fa
AK		 2607 ew32(MANC2H, manc2h);
2608 ew32(MANC, manc);
2609}
2610
2611/**
2612 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2613 * @adapter: board private structure
2614 *
2615 * Configure the Tx unit of the MAC after a reset.
2616 **/
2617static void e1000_configure_tx(struct e1000_adapter *adapter)
2618{
2619 struct e1000_hw *hw = &adapter->hw;
2620 struct e1000_ring *tx_ring = adapter->tx_ring;
2621 u64 tdba;
2622 u32 tdlen, tctl, tipg, tarc;
2623 u32 ipgr1, ipgr2;
2624
2625 /* Setup the HW Tx Head and Tail descriptor pointers */
2626 tdba = tx_ring->dma;
2627 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2628 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2629 ew32(TDBAH, (tdba >> 32));
2630 ew32(TDLEN, tdlen);
2631 ew32(TDH, 0);
2632 ew32(TDT, 0);
2633 tx_ring->head = E1000_TDH;
2634 tx_ring->tail = E1000_TDT;
2635
2636 /* Set the default values for the Tx Inter Packet Gap timer */
2637 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2638 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2639 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2640
2641 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2642 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2643
2644 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2645 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2646 ew32(TIPG, tipg);
2647
2648 /* Set the Tx Interrupt Delay register */
2649 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2650 /* Tx irq moderation */
bc7f75fa
AK		 2651 ew32(TADV, adapter->tx_abs_int_delay);
2652
3a3b7586
JB		 2653 if (adapter->flags2 & FLAG2_DMA_BURST) {
2654 u32 txdctl = er32(TXDCTL(0));
2655 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2656 E1000_TXDCTL_WTHRESH);
2657 /*
2658 * set up some performance related parameters to encourage the
2659 * hardware to use the bus more efficiently in bursts, depends
2660 * on the tx_int_delay to be enabled,
2661 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2662 * hthresh = 1 ==> prefetch when one or more available
2663 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2664 * BEWARE: this seems to work but should be considered first if
2665 * there are tx hangs or other tx related bugs
2666 */
2667 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2668 ew32(TXDCTL(0), txdctl);
2669 /* erratum work around: set txdctl the same for both queues */
2670 ew32(TXDCTL(1), txdctl);
2671 }
2672
bc7f75fa
AK		 2673 /* Program the Transmit Control Register */
2674 tctl = er32(TCTL);
2675 tctl &= ~E1000_TCTL_CT;
2676 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2677 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2678
2679 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2680 tarc = er32(TARC(0));
ad68076e
BA		 2681 /*
2682 * set the speed mode bit, we'll clear it if we're not at
2683 * gigabit link later
2684 */
bc7f75fa
AK		 2685#define SPEED_MODE_BIT (1 << 21)
2686 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2687 ew32(TARC(0), tarc);
bc7f75fa
AK		 2688 }
2689
2690 /* errata: program both queues to unweighted RR */
2691 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2692 tarc = er32(TARC(0));
bc7f75fa 2693 tarc |= 1;
e9ec2c0f
JK		 2694 ew32(TARC(0), tarc);
2695 tarc = er32(TARC(1));
bc7f75fa 2696 tarc |= 1;
e9ec2c0f 2697 ew32(TARC(1), tarc);
bc7f75fa
AK		 2698 }
2699
bc7f75fa
AK		 2700 /* Setup Transmit Descriptor Settings for eop descriptor */
2701 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2702
2703 /* only set IDE if we are delaying interrupts using the timers */
2704 if (adapter->tx_int_delay)
2705 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2706
2707 /* enable Report Status bit */
2708 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2709
2710 ew32(TCTL, tctl);
2711
edfea6e6 2712 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2713}
2714
2715/**
2716 * e1000_setup_rctl - configure the receive control registers
2717 * @adapter: Board private structure
2718 **/
2719#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2720 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2721static void e1000_setup_rctl(struct e1000_adapter *adapter)
2722{
2723 struct e1000_hw *hw = &adapter->hw;
2724 u32 rctl, rfctl;
2725 u32 psrctl = 0;
2726 u32 pages = 0;
2727
a1ce6473
BA		 2728 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2729 if (hw->mac.type == e1000_pch2lan) {
2730 s32 ret_val;
2731
2732 if (adapter->netdev->mtu > ETH_DATA_LEN)
2733 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2734 else
2735 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2736 }
2737
bc7f75fa
AK		 2738 /* Program MC offset vector base */
2739 rctl = er32(RCTL);
2740 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2741 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2742 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2743 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2744
2745 /* Do not Store bad packets */
2746 rctl &= ~E1000_RCTL_SBP;
2747
2748 /* Enable Long Packet receive */
2749 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2750 rctl &= ~E1000_RCTL_LPE;
2751 else
2752 rctl |= E1000_RCTL_LPE;
2753
eb7c3adb
JK		 2754 /* Some systems expect that the CRC is included in SMBUS traffic. The
2755 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2756 * host memory when this is enabled
2757 */
2758 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2759 rctl |= E1000_RCTL_SECRC;
5918bd88 2760
a4f58f54
BA		 2761 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2762 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2763 u16 phy_data;
2764
2765 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2766 phy_data &= 0xfff8;
2767 phy_data |= (1 << 2);
2768 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2769
2770 e1e_rphy(hw, 22, &phy_data);
2771 phy_data &= 0x0fff;
2772 phy_data |= (1 << 14);
2773 e1e_wphy(hw, 0x10, 0x2823);
2774 e1e_wphy(hw, 0x11, 0x0003);
2775 e1e_wphy(hw, 22, phy_data);
2776 }
2777
bc7f75fa
AK		 2778 /* Setup buffer sizes */
2779 rctl &= ~E1000_RCTL_SZ_4096;
2780 rctl |= E1000_RCTL_BSEX;
2781 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2782 case 2048:
2783 default:
2784 rctl |= E1000_RCTL_SZ_2048;
2785 rctl &= ~E1000_RCTL_BSEX;
2786 break;
2787 case 4096:
2788 rctl |= E1000_RCTL_SZ_4096;
2789 break;
2790 case 8192:
2791 rctl |= E1000_RCTL_SZ_8192;
2792 break;
2793 case 16384:
2794 rctl |= E1000_RCTL_SZ_16384;
2795 break;
2796 }
2797
2798 /*
2799 * 82571 and greater support packet-split where the protocol
2800 * header is placed in skb->data and the packet data is
2801 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2802 * In the case of a non-split, skb->data is linearly filled,
2803 * followed by the page buffers. Therefore, skb->data is
2804 * sized to hold the largest protocol header.
2805 *
2806 * allocations using alloc_page take too long for regular MTU
2807 * so only enable packet split for jumbo frames
2808 *
2809 * Using pages when the page size is greater than 16k wastes
2810 * a lot of memory, since we allocate 3 pages at all times
2811 * per packet.
2812 */
bc7f75fa 2813 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2814 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2815 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2816 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2817 else
2818 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2819
2820 if (adapter->rx_ps_pages) {
2821 /* Configure extra packet-split registers */
2822 rfctl = er32(RFCTL);
2823 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2824 /*
2825 * disable packet split support for IPv6 extension headers,
2826 * because some malformed IPv6 headers can hang the Rx
2827 */
bc7f75fa
AK		 2828 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2829 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2830
2831 ew32(RFCTL, rfctl);
2832
140a7480
AK		 2833 /* Enable Packet split descriptors */
2834 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2835
2836 psrctl |= adapter->rx_ps_bsize0 >>
2837 E1000_PSRCTL_BSIZE0_SHIFT;
2838
2839 switch (adapter->rx_ps_pages) {
2840 case 3:
2841 psrctl |= PAGE_SIZE <<
2842 E1000_PSRCTL_BSIZE3_SHIFT;
2843 case 2:
2844 psrctl |= PAGE_SIZE <<
2845 E1000_PSRCTL_BSIZE2_SHIFT;
2846 case 1:
2847 psrctl |= PAGE_SIZE >>
2848 E1000_PSRCTL_BSIZE1_SHIFT;
2849 break;
2850 }
2851
2852 ew32(PSRCTL, psrctl);
2853 }
2854
2855 ew32(RCTL, rctl);
318a94d6
JK		 2856 /* just started the receive unit, no need to restart */
2857 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2858}
2859
2860/**
2861 * e1000_configure_rx - Configure Receive Unit after Reset
2862 * @adapter: board private structure
2863 *
2864 * Configure the Rx unit of the MAC after a reset.
2865 **/
2866static void e1000_configure_rx(struct e1000_adapter *adapter)
2867{
2868 struct e1000_hw *hw = &adapter->hw;
2869 struct e1000_ring *rx_ring = adapter->rx_ring;
2870 u64 rdba;
2871 u32 rdlen, rctl, rxcsum, ctrl_ext;
2872
2873 if (adapter->rx_ps_pages) {
2874 /* this is a 32 byte descriptor */
2875 rdlen = rx_ring->count *
2876 sizeof(union e1000_rx_desc_packet_split);
2877 adapter->clean_rx = e1000_clean_rx_irq_ps;
2878 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2879 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2880 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2881 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2882 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2883 } else {
97ac8cae 2884 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2885 adapter->clean_rx = e1000_clean_rx_irq;
2886 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2887 }
2888
2889 /* disable receives while setting up the descriptors */
2890 rctl = er32(RCTL);
2891 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2892 e1e_flush();
2893 msleep(10);
2894
3a3b7586
JB		 2895 if (adapter->flags2 & FLAG2_DMA_BURST) {
2896 /*
2897 * set the writeback threshold (only takes effect if the RDTR
2898 * is set). set GRAN=1 and write back up to 0x4 worth, and
2899 * enable prefetching of 0x20 rx descriptors
2900 * granularity = 01
2901 * wthresh = 04,
2902 * hthresh = 04,
2903 * pthresh = 0x20
2904 */
2905 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
2906 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
2907
2908 /*
2909 * override the delay timers for enabling bursting, only if
2910 * the value was not set by the user via module options
2911 */
2912 if (adapter->rx_int_delay == DEFAULT_RDTR)
2913 adapter->rx_int_delay = BURST_RDTR;
2914 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
2915 adapter->rx_abs_int_delay = BURST_RADV;
2916 }
2917
bc7f75fa
AK		 2918 /* set the Receive Delay Timer Register */
2919 ew32(RDTR, adapter->rx_int_delay);
2920
2921 /* irq moderation */
2922 ew32(RADV, adapter->rx_abs_int_delay);
2923 if (adapter->itr_setting != 0)
ad68076e 2924 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2925
2926 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2927 /* Auto-Mask interrupts upon ICR access */
2928 ctrl_ext |= E1000_CTRL_EXT_IAME;
2929 ew32(IAM, 0xffffffff);
2930 ew32(CTRL_EXT, ctrl_ext);
2931 e1e_flush();
2932
ad68076e
BA		 2933 /*
2934 * Setup the HW Rx Head and Tail Descriptor Pointers and
2935 * the Base and Length of the Rx Descriptor Ring
2936 */
bc7f75fa 2937 rdba = rx_ring->dma;
284901a9 2938 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2939 ew32(RDBAH, (rdba >> 32));
2940 ew32(RDLEN, rdlen);
2941 ew32(RDH, 0);
2942 ew32(RDT, 0);
2943 rx_ring->head = E1000_RDH;
2944 rx_ring->tail = E1000_RDT;
2945
2946 /* Enable Receive Checksum Offload for TCP and UDP */
2947 rxcsum = er32(RXCSUM);
2948 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2949 rxcsum |= E1000_RXCSUM_TUOFL;
2950
ad68076e
BA		 2951 /*
2952 * IPv4 payload checksum for UDP fragments must be
2953 * used in conjunction with packet-split.
2954 */
bc7f75fa
AK		 2955 if (adapter->rx_ps_pages)
2956 rxcsum |= E1000_RXCSUM_IPPCSE;
2957 } else {
2958 rxcsum &= ~E1000_RXCSUM_TUOFL;
2959 /* no need to clear IPPCSE as it defaults to 0 */
2960 }
2961 ew32(RXCSUM, rxcsum);
2962
ad68076e
BA		 2963 /*
2964 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2965 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2966 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2967 */
53ec5498
BA		 2968 if (adapter->flags & FLAG_HAS_ERT) {
2969 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2970 u32 rxdctl = er32(RXDCTL(0));
2971 ew32(RXDCTL(0), rxdctl | 0x3);
2972 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2973 /*
2974 * With jumbo frames and early-receive enabled,
2975 * excessive C-state transition latencies result in
2976 * dropped transactions.
2977 */
ed77134b 2978 pm_qos_update_request(
82f68251 2979 &adapter->netdev->pm_qos_req, 55);
53ec5498 2980 } else {
ed77134b 2981 pm_qos_update_request(
82f68251 2982 &adapter->netdev->pm_qos_req,
ed77134b 2983 PM_QOS_DEFAULT_VALUE);
53ec5498 2984 }
97ac8cae 2985 }
bc7f75fa
AK		 2986
2987 /* Enable Receives */
2988 ew32(RCTL, rctl);
2989}
2990
2991/**
e2de3eb6 2992 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2993 * @hw: pointer to the HW structure
2994 * @mc_addr_list: array of multicast addresses to program
2995 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2996 *
ab8932f3 2997 * Updates the Multicast Table Array.
bc7f75fa 2998 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2999 **/
e2de3eb6 3000static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 3001 u32 mc_addr_count)
bc7f75fa 3002{
ab8932f3 3003 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 3004}
3005
3006/**
3007 * e1000_set_multi - Multicast and Promiscuous mode set
3008 * @netdev: network interface device structure
3009 *
3010 * The set_multi entry point is called whenever the multicast address
3011 * list or the network interface flags are updated. This routine is
3012 * responsible for configuring the hardware for proper multicast,
3013 * promiscuous mode, and all-multi behavior.
3014 **/
3015static void e1000_set_multi(struct net_device *netdev)
3016{
3017 struct e1000_adapter *adapter = netdev_priv(netdev);
3018 struct e1000_hw *hw = &adapter->hw;
22bedad3 3019 struct netdev_hw_addr *ha;
bc7f75fa
AK		 3020 u8 *mta_list;
3021 u32 rctl;
3022 int i;
3023
3024 /* Check for Promiscuous and All Multicast modes */
3025
3026 rctl = er32(RCTL);
3027
3028 if (netdev->flags & IFF_PROMISC) {
3029 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 3030 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 3031 } else {
746b9f02
PM		 3032 if (netdev->flags & IFF_ALLMULTI) {
3033 rctl |= E1000_RCTL_MPE;
3034 rctl &= ~E1000_RCTL_UPE;
3035 } else {
3036 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3037 }
78ed11a5 3038 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 3039 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 3040 }
3041
3042 ew32(RCTL, rctl);
3043
7aeef972
JP		 3044 if (!netdev_mc_empty(netdev)) {
3045 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 3046 if (!mta_list)
3047 return;
3048
3049 /* prepare a packed array of only addresses. */
7aeef972 3050 i = 0;
22bedad3
JP		 3051 netdev_for_each_mc_addr(ha, netdev)
3052 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 3053
ab8932f3 3054 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 3055 kfree(mta_list);
3056 } else {
3057 /*
3058 * if we're called from probe, we might not have
3059 * anything to do here, so clear out the list
3060 */
ab8932f3 3061 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 3062 }
3063}
3064
3065/**
ad68076e 3066 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3067 * @adapter: private board structure
3068 **/
3069static void e1000_configure(struct e1000_adapter *adapter)
3070{
3071 e1000_set_multi(adapter->netdev);
3072
3073 e1000_restore_vlan(adapter);
cd791618 3074 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3075
3076 e1000_configure_tx(adapter);
3077 e1000_setup_rctl(adapter);
3078 e1000_configure_rx(adapter);
ad68076e 3079 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3080}
3081
3082/**
3083 * e1000e_power_up_phy - restore link in case the phy was powered down
3084 * @adapter: address of board private structure
3085 *
3086 * The phy may be powered down to save power and turn off link when the
3087 * driver is unloaded and wake on lan is not enabled (among others)
3088 * *** this routine MUST be followed by a call to e1000e_reset ***
3089 **/
3090void e1000e_power_up_phy(struct e1000_adapter *adapter)
3091{
17f208de
BA		 3092 if (adapter->hw.phy.ops.power_up)
3093 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3094
3095 adapter->hw.mac.ops.setup_link(&adapter->hw);
3096}
3097
3098/**
3099 * e1000_power_down_phy - Power down the PHY
3100 *
17f208de
BA		 3101 * Power down the PHY so no link is implied when interface is down.
3102 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3103 */
3104static void e1000_power_down_phy(struct e1000_adapter *adapter)
3105{
bc7f75fa 3106 /* WoL is enabled */
23b66e2b 3107 if (adapter->wol)
bc7f75fa
AK		 3108 return;
3109
17f208de
BA		 3110 if (adapter->hw.phy.ops.power_down)
3111 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3112}
3113
3114/**
3115 * e1000e_reset - bring the hardware into a known good state
3116 *
3117 * This function boots the hardware and enables some settings that
3118 * require a configuration cycle of the hardware - those cannot be
3119 * set/changed during runtime. After reset the device needs to be
ad68076e 3120 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3121 */
3122void e1000e_reset(struct e1000_adapter *adapter)
3123{
3124 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3125 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3126 struct e1000_hw *hw = &adapter->hw;
3127 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3128 u32 pba = adapter->pba;
bc7f75fa
AK		 3129 u16 hwm;
3130
ad68076e 3131 /* reset Packet Buffer Allocation to default */
318a94d6 3132 ew32(PBA, pba);
df762464 3133
318a94d6 3134 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3135 /*
3136 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3137 * large enough to accommodate two full transmit packets,
3138 * rounded up to the next 1KB and expressed in KB. Likewise,
3139 * the Rx FIFO should be large enough to accommodate at least
3140 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3141 * expressed in KB.
3142 */
df762464 3143 pba = er32(PBA);
bc7f75fa 3144 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3145 tx_space = pba >> 16;
bc7f75fa 3146 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3147 pba &= 0xffff;
ad68076e
BA		 3148 /*
3149 * the Tx fifo also stores 16 bytes of information about the tx
3150 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3151 */
3152 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3153 sizeof(struct e1000_tx_desc) -
3154 ETH_FCS_LEN) * 2;
3155 min_tx_space = ALIGN(min_tx_space, 1024);
3156 min_tx_space >>= 10;
3157 /* software strips receive CRC, so leave room for it */
318a94d6 3158 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3159 min_rx_space = ALIGN(min_rx_space, 1024);
3160 min_rx_space >>= 10;
3161
ad68076e
BA		 3162 /*
3163 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3164 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3165 * allocation, take space away from current Rx allocation
3166 */
df762464
AK		 3167 if ((tx_space < min_tx_space) &&
3168 ((min_tx_space - tx_space) < pba)) {
3169 pba -= min_tx_space - tx_space;
bc7f75fa 3170
ad68076e
BA		 3171 /*
3172 * if short on Rx space, Rx wins and must trump tx
3173 * adjustment or use Early Receive if available
3174 */
df762464 3175 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3176 (!(adapter->flags & FLAG_HAS_ERT)))
3177 /* ERT enabled in e1000_configure_rx */
df762464 3178 pba = min_rx_space;
bc7f75fa 3179 }
df762464
AK		 3180
3181 ew32(PBA, pba);
bc7f75fa
AK		 3182 }
3183
bc7f75fa 3184
ad68076e
BA		 3185 /*
3186 * flow control settings
3187 *
38eb394e 3188 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3189 * (or the size used for early receive) above it in the Rx FIFO.
3190 * Set it to the lower of:
3191 * - 90% of the Rx FIFO size, and
3192 * - the full Rx FIFO size minus the early receive size (for parts
3193 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3194 * - the full Rx FIFO size minus one full frame
ad68076e 3195 */
d3738bb8
BA		 3196 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3197 fc->pause_time = 0xFFFF;
3198 else
3199 fc->pause_time = E1000_FC_PAUSE_TIME;
3200 fc->send_xon = 1;
3201 fc->current_mode = fc->requested_mode;
3202
3203 switch (hw->mac.type) {
3204 default:
3205 if ((adapter->flags & FLAG_HAS_ERT) &&
3206 (adapter->netdev->mtu > ETH_DATA_LEN))
3207 hwm = min(((pba << 10) * 9 / 10),
3208 ((pba << 10) - (E1000_ERT_2048 << 3)));
3209 else
3210 hwm = min(((pba << 10) * 9 / 10),
3211 ((pba << 10) - adapter->max_frame_size));
3212
3213 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3214 fc->low_water = fc->high_water - 8;
3215 break;
3216 case e1000_pchlan:
38eb394e
BA		 3217 /*
3218 * Workaround PCH LOM adapter hangs with certain network
3219 * loads. If hangs persist, try disabling Tx flow control.
3220 */
3221 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3222 fc->high_water = 0x3500;
3223 fc->low_water = 0x1500;
3224 } else {
3225 fc->high_water = 0x5000;
3226 fc->low_water = 0x3000;
3227 }
a305595b 3228 fc->refresh_time = 0x1000;
d3738bb8
BA		 3229 break;
3230 case e1000_pch2lan:
3231 fc->high_water = 0x05C20;
3232 fc->low_water = 0x05048;
3233 fc->pause_time = 0x0650;
3234 fc->refresh_time = 0x0400;
3235 break;
38eb394e 3236 }
bc7f75fa 3237
bc7f75fa
AK		 3238 /* Allow time for pending master requests to run */
3239 mac->ops.reset_hw(hw);
97ac8cae
BA		 3240
3241 /*
3242 * For parts with AMT enabled, let the firmware know
3243 * that the network interface is in control
3244 */
c43bc57e 3245 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 3246 e1000_get_hw_control(adapter);
3247
bc7f75fa
AK		 3248 ew32(WUC, 0);
3249
3250 if (mac->ops.init_hw(hw))
44defeb3 3251 e_err("Hardware Error\n");
bc7f75fa
AK		 3252
3253 e1000_update_mng_vlan(adapter);
3254
3255 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3256 ew32(VET, ETH_P_8021Q);
3257
3258 e1000e_reset_adaptive(hw);
3259 e1000_get_phy_info(hw);
3260
918d7197
BA		 3261 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3262 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3263 u16 phy_data = 0;
ad68076e
BA		 3264 /*
3265 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3266 * the return value of this function because there is nothing
ad68076e
BA		 3267 * different we would do if it failed
3268 */
bc7f75fa
AK		 3269 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3270 phy_data &= ~IGP02E1000_PM_SPD;
3271 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3272 }
bc7f75fa
AK		 3273}
3274
3275int e1000e_up(struct e1000_adapter *adapter)
3276{
3277 struct e1000_hw *hw = &adapter->hw;
3278
3279 /* hardware has been reset, we need to reload some things */
3280 e1000_configure(adapter);
3281
3282 clear_bit(__E1000_DOWN, &adapter->state);
3283
3284 napi_enable(&adapter->napi);
4662e82b
BA		 3285 if (adapter->msix_entries)
3286 e1000_configure_msix(adapter);
bc7f75fa
AK		 3287 e1000_irq_enable(adapter);
3288
4cb9be7a
JB		 3289 netif_wake_queue(adapter->netdev);
3290
bc7f75fa 3291 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3292 if (adapter->msix_entries)
3293 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3294 else
3295 ew32(ICS, E1000_ICS_LSC);
3296
bc7f75fa
AK		 3297 return 0;
3298}
3299
3300void e1000e_down(struct e1000_adapter *adapter)
3301{
3302 struct net_device *netdev = adapter->netdev;
3303 struct e1000_hw *hw = &adapter->hw;
3304 u32 tctl, rctl;
3305
ad68076e
BA		 3306 /*
3307 * signal that we're down so the interrupt handler does not
3308 * reschedule our watchdog timer
3309 */
bc7f75fa
AK		 3310 set_bit(__E1000_DOWN, &adapter->state);
3311
3312 /* disable receives in the hardware */
3313 rctl = er32(RCTL);
3314 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3315 /* flush and sleep below */
3316
4cb9be7a 3317 netif_stop_queue(netdev);
bc7f75fa
AK		 3318
3319 /* disable transmits in the hardware */
3320 tctl = er32(TCTL);
3321 tctl &= ~E1000_TCTL_EN;
3322 ew32(TCTL, tctl);
3323 /* flush both disables and wait for them to finish */
3324 e1e_flush();
3325 msleep(10);
3326
3327 napi_disable(&adapter->napi);
3328 e1000_irq_disable(adapter);
3329
3330 del_timer_sync(&adapter->watchdog_timer);
3331 del_timer_sync(&adapter->phy_info_timer);
3332
bc7f75fa
AK		 3333 netif_carrier_off(netdev);
3334 adapter->link_speed = 0;
3335 adapter->link_duplex = 0;
3336
52cc3086
JK		 3337 if (!pci_channel_offline(adapter->pdev))
3338 e1000e_reset(adapter);
bc7f75fa
AK		 3339 e1000_clean_tx_ring(adapter);
3340 e1000_clean_rx_ring(adapter);
3341
3342 /*
3343 * TODO: for power management, we could drop the link and
3344 * pci_disable_device here.
3345 */
3346}
3347
3348void e1000e_reinit_locked(struct e1000_adapter *adapter)
3349{
3350 might_sleep();
3351 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3352 msleep(1);
3353 e1000e_down(adapter);
3354 e1000e_up(adapter);
3355 clear_bit(__E1000_RESETTING, &adapter->state);
3356}
3357
3358/**
3359 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3360 * @adapter: board private structure to initialize
3361 *
3362 * e1000_sw_init initializes the Adapter private data structure.
3363 * Fields are initialized based on PCI device information and
3364 * OS network device settings (MTU size).
3365 **/
3366static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3367{
bc7f75fa
AK		 3368 struct net_device *netdev = adapter->netdev;
3369
3370 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3371 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3372 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3373 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3374
4662e82b 3375 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3376
4662e82b
BA		 3377 if (e1000_alloc_queues(adapter))
3378 return -ENOMEM;
bc7f75fa 3379
bc7f75fa 3380 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3381 e1000_irq_disable(adapter);
3382
bc7f75fa
AK		 3383 set_bit(__E1000_DOWN, &adapter->state);
3384 return 0;
bc7f75fa
AK		 3385}
3386
f8d59f78
BA		 3387/**
3388 * e1000_intr_msi_test - Interrupt Handler
3389 * @irq: interrupt number
3390 * @data: pointer to a network interface device structure
3391 **/
3392static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3393{
3394 struct net_device *netdev = data;
3395 struct e1000_adapter *adapter = netdev_priv(netdev);
3396 struct e1000_hw *hw = &adapter->hw;
3397 u32 icr = er32(ICR);
3398
3bb99fe2 3399 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3400 if (icr & E1000_ICR_RXSEQ) {
3401 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3402 wmb();
3403 }
3404
3405 return IRQ_HANDLED;
3406}
3407
3408/**
3409 * e1000_test_msi_interrupt - Returns 0 for successful test
3410 * @adapter: board private struct
3411 *
3412 * code flow taken from tg3.c
3413 **/
3414static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3415{
3416 struct net_device *netdev = adapter->netdev;
3417 struct e1000_hw *hw = &adapter->hw;
3418 int err;
3419
3420 /* poll_enable hasn't been called yet, so don't need disable */
3421 /* clear any pending events */
3422 er32(ICR);
3423
3424 /* free the real vector and request a test handler */
3425 e1000_free_irq(adapter);
4662e82b 3426 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3427
3428 /* Assume that the test fails, if it succeeds then the test
3429 * MSI irq handler will unset this flag */
3430 adapter->flags |= FLAG_MSI_TEST_FAILED;
3431
3432 err = pci_enable_msi(adapter->pdev);
3433 if (err)
3434 goto msi_test_failed;
3435
a0607fd3 3436 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3437 netdev->name, netdev);
3438 if (err) {
3439 pci_disable_msi(adapter->pdev);
3440 goto msi_test_failed;
3441 }
3442
3443 wmb();
3444
3445 e1000_irq_enable(adapter);
3446
3447 /* fire an unusual interrupt on the test handler */
3448 ew32(ICS, E1000_ICS_RXSEQ);
3449 e1e_flush();
3450 msleep(50);
3451
3452 e1000_irq_disable(adapter);
3453
3454 rmb();
3455
3456 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3457 adapter->int_mode = E1000E_INT_MODE_LEGACY;
068e8a30
JD		 3458 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3459 } else
3460 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78
BA		 3461
3462 free_irq(adapter->pdev->irq, netdev);
3463 pci_disable_msi(adapter->pdev);
3464
f8d59f78 3465msi_test_failed:
4662e82b 3466 e1000e_set_interrupt_capability(adapter);
068e8a30 3467 return e1000_request_irq(adapter);
f8d59f78
BA		 3468}
3469
3470/**
3471 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3472 * @adapter: board private struct
3473 *
3474 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3475 **/
3476static int e1000_test_msi(struct e1000_adapter *adapter)
3477{
3478 int err;
3479 u16 pci_cmd;
3480
3481 if (!(adapter->flags & FLAG_MSI_ENABLED))
3482 return 0;
3483
3484 /* disable SERR in case the MSI write causes a master abort */
3485 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3486 if (pci_cmd & PCI_COMMAND_SERR)
3487 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3488 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3489
3490 err = e1000_test_msi_interrupt(adapter);
3491
36f2407f
DN		 3492 /* re-enable SERR */
3493 if (pci_cmd & PCI_COMMAND_SERR) {
3494 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3495 pci_cmd |= PCI_COMMAND_SERR;
3496 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3497 }
f8d59f78 3498
f8d59f78
BA		 3499 return err;
3500}
3501
bc7f75fa
AK		 3502/**
3503 * e1000_open - Called when a network interface is made active
3504 * @netdev: network interface device structure
3505 *
3506 * Returns 0 on success, negative value on failure
3507 *
3508 * The open entry point is called when a network interface is made
3509 * active by the system (IFF_UP). At this point all resources needed
3510 * for transmit and receive operations are allocated, the interrupt
3511 * handler is registered with the OS, the watchdog timer is started,
3512 * and the stack is notified that the interface is ready.
3513 **/
3514static int e1000_open(struct net_device *netdev)
3515{
3516 struct e1000_adapter *adapter = netdev_priv(netdev);
3517 struct e1000_hw *hw = &adapter->hw;
23606cf5 3518 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3519 int err;
3520
3521 /* disallow open during test */
3522 if (test_bit(__E1000_TESTING, &adapter->state))
3523 return -EBUSY;
3524
23606cf5
RW		 3525 pm_runtime_get_sync(&pdev->dev);
3526
9c563d20
JB		 3527 netif_carrier_off(netdev);
3528
bc7f75fa
AK		 3529 /* allocate transmit descriptors */
3530 err = e1000e_setup_tx_resources(adapter);
3531 if (err)
3532 goto err_setup_tx;
3533
3534 /* allocate receive descriptors */
3535 err = e1000e_setup_rx_resources(adapter);
3536 if (err)
3537 goto err_setup_rx;
3538
11b08be8
BA		 3539 /*
3540 * If AMT is enabled, let the firmware know that the network
3541 * interface is now open and reset the part to a known state.
3542 */
3543 if (adapter->flags & FLAG_HAS_AMT) {
3544 e1000_get_hw_control(adapter);
3545 e1000e_reset(adapter);
3546 }
3547
bc7f75fa
AK		 3548 e1000e_power_up_phy(adapter);
3549
3550 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3551 if ((adapter->hw.mng_cookie.status &
3552 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3553 e1000_update_mng_vlan(adapter);
3554
c128ec29
FM		 3555 /* DMA latency requirement to workaround early-receive/jumbo issue */
3556 if (adapter->flags & FLAG_HAS_ERT)
6ba74014
LT		 3557 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3558 PM_QOS_CPU_DMA_LATENCY,
3559 PM_QOS_DEFAULT_VALUE);
c128ec29 3560
ad68076e
BA		 3561 /*
3562 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3563 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3564 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3565 * clean_rx handler before we do so.
3566 */
bc7f75fa
AK		 3567 e1000_configure(adapter);
3568
3569 err = e1000_request_irq(adapter);
3570 if (err)
3571 goto err_req_irq;
3572
f8d59f78
BA		 3573 /*
3574 * Work around PCIe errata with MSI interrupts causing some chipsets to
3575 * ignore e1000e MSI messages, which means we need to test our MSI
3576 * interrupt now
3577 */
4662e82b 3578 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3579 err = e1000_test_msi(adapter);
3580 if (err) {
3581 e_err("Interrupt allocation failed\n");
3582 goto err_req_irq;
3583 }
3584 }
3585
bc7f75fa
AK		 3586 /* From here on the code is the same as e1000e_up() */
3587 clear_bit(__E1000_DOWN, &adapter->state);
3588
3589 napi_enable(&adapter->napi);
3590
3591 e1000_irq_enable(adapter);
3592
4cb9be7a 3593 netif_start_queue(netdev);
d55b53ff 3594
23606cf5
RW		 3595 adapter->idle_check = true;
3596 pm_runtime_put(&pdev->dev);
3597
bc7f75fa 3598 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3599 if (adapter->msix_entries)
3600 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3601 else
3602 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3603
3604 return 0;
3605
3606err_req_irq:
3607 e1000_release_hw_control(adapter);
3608 e1000_power_down_phy(adapter);
3609 e1000e_free_rx_resources(adapter);
3610err_setup_rx:
3611 e1000e_free_tx_resources(adapter);
3612err_setup_tx:
3613 e1000e_reset(adapter);
23606cf5 3614 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3615
3616 return err;
3617}
3618
3619/**
3620 * e1000_close - Disables a network interface
3621 * @netdev: network interface device structure
3622 *
3623 * Returns 0, this is not allowed to fail
3624 *
3625 * The close entry point is called when an interface is de-activated
3626 * by the OS. The hardware is still under the drivers control, but
3627 * needs to be disabled. A global MAC reset is issued to stop the
3628 * hardware, and all transmit and receive resources are freed.
3629 **/
3630static int e1000_close(struct net_device *netdev)
3631{
3632 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3633 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3634
3635 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3636
3637 pm_runtime_get_sync(&pdev->dev);
3638
3639 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3640 e1000e_down(adapter);
3641 e1000_free_irq(adapter);
3642 }
bc7f75fa 3643 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3644
3645 e1000e_free_tx_resources(adapter);
3646 e1000e_free_rx_resources(adapter);
3647
ad68076e
BA		 3648 /*
3649 * kill manageability vlan ID if supported, but not if a vlan with
3650 * the same ID is registered on the host OS (let 8021q kill it)
3651 */
bc7f75fa
AK		 3652 if ((adapter->hw.mng_cookie.status &
3653 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3654 !(adapter->vlgrp &&
3655 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3656 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3657
ad68076e
BA		 3658 /*
3659 * If AMT is enabled, let the firmware know that the network
3660 * interface is now closed
3661 */
c43bc57e 3662 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3663 e1000_release_hw_control(adapter);
3664
6ba74014
LT		 3665 if (adapter->flags & FLAG_HAS_ERT)
3666 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
c128ec29 3667
23606cf5
RW		 3668 pm_runtime_put_sync(&pdev->dev);
3669
bc7f75fa
AK		 3670 return 0;
3671}
3672/**
3673 * e1000_set_mac - Change the Ethernet Address of the NIC
3674 * @netdev: network interface device structure
3675 * @p: pointer to an address structure
3676 *
3677 * Returns 0 on success, negative on failure
3678 **/
3679static int e1000_set_mac(struct net_device *netdev, void *p)
3680{
3681 struct e1000_adapter *adapter = netdev_priv(netdev);
3682 struct sockaddr *addr = p;
3683
3684 if (!is_valid_ether_addr(addr->sa_data))
3685 return -EADDRNOTAVAIL;
3686
3687 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3688 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3689
3690 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3691
3692 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3693 /* activate the work around */
3694 e1000e_set_laa_state_82571(&adapter->hw, 1);
3695
ad68076e
BA		 3696 /*
3697 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3698 * between the time RAR[0] gets clobbered and the time it
3699 * gets fixed (in e1000_watchdog), the actual LAA is in one
3700 * of the RARs and no incoming packets directed to this port
3701 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3702 * RAR[14]
3703 */
bc7f75fa
AK		 3704 e1000e_rar_set(&adapter->hw,
3705 adapter->hw.mac.addr,
3706 adapter->hw.mac.rar_entry_count - 1);
3707 }
3708
3709 return 0;
3710}
3711
a8f88ff5
JB		 3712/**
3713 * e1000e_update_phy_task - work thread to update phy
3714 * @work: pointer to our work struct
3715 *
3716 * this worker thread exists because we must acquire a
3717 * semaphore to read the phy, which we could msleep while
3718 * waiting for it, and we can't msleep in a timer.
3719 **/
3720static void e1000e_update_phy_task(struct work_struct *work)
3721{
3722 struct e1000_adapter *adapter = container_of(work,
3723 struct e1000_adapter, update_phy_task);
3724 e1000_get_phy_info(&adapter->hw);
3725}
3726
ad68076e
BA		 3727/*
3728 * Need to wait a few seconds after link up to get diagnostic information from
3729 * the phy
3730 */
bc7f75fa
AK		 3731static void e1000_update_phy_info(unsigned long data)
3732{
3733 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3734 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3735}
3736
8c7bbb92
BA		 3737/**
3738 * e1000e_update_phy_stats - Update the PHY statistics counters
3739 * @adapter: board private structure
3740 **/
3741static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3742{
3743 struct e1000_hw *hw = &adapter->hw;
3744 s32 ret_val;
3745 u16 phy_data;
3746
3747 ret_val = hw->phy.ops.acquire(hw);
3748 if (ret_val)
3749 return;
3750
3751 hw->phy.addr = 1;
3752
3753#define HV_PHY_STATS_PAGE 778
3754 /*
3755 * A page set is expensive so check if already on desired page.
3756 * If not, set to the page with the PHY status registers.
3757 */
3758 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3759 &phy_data);
3760 if (ret_val)
3761 goto release;
3762 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3763 ret_val = e1000e_write_phy_reg_mdic(hw,
3764 IGP01E1000_PHY_PAGE_SELECT,
3765 (HV_PHY_STATS_PAGE <<
3766 IGP_PAGE_SHIFT));
3767 if (ret_val)
3768 goto release;
3769 }
3770
3771 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3772
3773 /* Single Collision Count */
3774 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3775 &phy_data);
3776 ret_val = e1000e_read_phy_reg_mdic(hw,
3777 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3778 &phy_data);
3779 if (!ret_val)
3780 adapter->stats.scc += phy_data;
3781
3782 /* Excessive Collision Count */
3783 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3784 &phy_data);
3785 ret_val = e1000e_read_phy_reg_mdic(hw,
3786 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3787 &phy_data);
3788 if (!ret_val)
3789 adapter->stats.ecol += phy_data;
3790
3791 /* Multiple Collision Count */
3792 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3793 &phy_data);
3794 ret_val = e1000e_read_phy_reg_mdic(hw,
3795 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3796 &phy_data);
3797 if (!ret_val)
3798 adapter->stats.mcc += phy_data;
3799
3800 /* Late Collision Count */
3801 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3802 &phy_data);
3803 ret_val = e1000e_read_phy_reg_mdic(hw,
3804 HV_LATECOL_LOWER &
3805 MAX_PHY_REG_ADDRESS,
3806 &phy_data);
3807 if (!ret_val)
3808 adapter->stats.latecol += phy_data;
3809
3810 /* Collision Count - also used for adaptive IFS */
3811 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3812 &phy_data);
3813 ret_val = e1000e_read_phy_reg_mdic(hw,
3814 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3815 &phy_data);
3816 if (!ret_val)
3817 hw->mac.collision_delta = phy_data;
3818
3819 /* Defer Count */
3820 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3821 &phy_data);
3822 ret_val = e1000e_read_phy_reg_mdic(hw,
3823 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3824 &phy_data);
3825 if (!ret_val)
3826 adapter->stats.dc += phy_data;
3827
3828 /* Transmit with no CRS */
3829 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3830 &phy_data);
3831 ret_val = e1000e_read_phy_reg_mdic(hw,
3832 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3833 &phy_data);
3834 if (!ret_val)
3835 adapter->stats.tncrs += phy_data;
3836
3837release:
3838 hw->phy.ops.release(hw);
3839}
3840
bc7f75fa
AK		 3841/**
3842 * e1000e_update_stats - Update the board statistics counters
3843 * @adapter: board private structure
3844 **/
3845void e1000e_update_stats(struct e1000_adapter *adapter)
3846{
7274c20f 3847 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3848 struct e1000_hw *hw = &adapter->hw;
3849 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3850
3851 /*
3852 * Prevent stats update while adapter is being reset, or if the pci
3853 * connection is down.
3854 */
3855 if (adapter->link_speed == 0)
3856 return;
3857 if (pci_channel_offline(pdev))
3858 return;
3859
bc7f75fa
AK		 3860 adapter->stats.crcerrs += er32(CRCERRS);
3861 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3862 adapter->stats.gorc += er32(GORCL);
3863 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3864 adapter->stats.bprc += er32(BPRC);
3865 adapter->stats.mprc += er32(MPRC);
3866 adapter->stats.roc += er32(ROC);
3867
bc7f75fa 3868 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3869
3870 /* Half-duplex statistics */
3871 if (adapter->link_duplex == HALF_DUPLEX) {
3872 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3873 e1000e_update_phy_stats(adapter);
3874 } else {
3875 adapter->stats.scc += er32(SCC);
3876 adapter->stats.ecol += er32(ECOL);
3877 adapter->stats.mcc += er32(MCC);
3878 adapter->stats.latecol += er32(LATECOL);
3879 adapter->stats.dc += er32(DC);
3880
3881 hw->mac.collision_delta = er32(COLC);
3882
3883 if ((hw->mac.type != e1000_82574) &&
3884 (hw->mac.type != e1000_82583))
3885 adapter->stats.tncrs += er32(TNCRS);
3886 }
3887 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3888 }
8c7bbb92 3889
bc7f75fa
AK		 3890 adapter->stats.xonrxc += er32(XONRXC);
3891 adapter->stats.xontxc += er32(XONTXC);
3892 adapter->stats.xoffrxc += er32(XOFFRXC);
3893 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3894 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3895 adapter->stats.gotc += er32(GOTCL);
3896 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3897 adapter->stats.rnbc += er32(RNBC);
3898 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3899
3900 adapter->stats.mptc += er32(MPTC);
3901 adapter->stats.bptc += er32(BPTC);
3902
3903 /* used for adaptive IFS */
3904
3905 hw->mac.tx_packet_delta = er32(TPT);
3906 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3907
3908 adapter->stats.algnerrc += er32(ALGNERRC);
3909 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3910 adapter->stats.cexterr += er32(CEXTERR);
3911 adapter->stats.tsctc += er32(TSCTC);
3912 adapter->stats.tsctfc += er32(TSCTFC);
3913
bc7f75fa 3914 /* Fill out the OS statistics structure */
7274c20f
AK		 3915 netdev->stats.multicast = adapter->stats.mprc;
3916 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3917
3918 /* Rx Errors */
3919
ad68076e
BA		 3920 /*
3921 * RLEC on some newer hardware can be incorrect so build
3922 * our own version based on RUC and ROC
3923 */
7274c20f 3924 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3925 adapter->stats.crcerrs + adapter->stats.algnerrc +
3926 adapter->stats.ruc + adapter->stats.roc +
3927 adapter->stats.cexterr;
7274c20f 3928 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3929 adapter->stats.roc;
7274c20f
AK		 3930 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3931 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3932 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3933
3934 /* Tx Errors */
7274c20f 3935 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3936 adapter->stats.latecol;
7274c20f
AK		 3937 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3938 netdev->stats.tx_window_errors = adapter->stats.latecol;
3939 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3940
3941 /* Tx Dropped needs to be maintained elsewhere */
3942
bc7f75fa
AK		 3943 /* Management Stats */
3944 adapter->stats.mgptc += er32(MGTPTC);
3945 adapter->stats.mgprc += er32(MGTPRC);
3946 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3947}
3948
7c25769f
BA		 3949/**
3950 * e1000_phy_read_status - Update the PHY register status snapshot
3951 * @adapter: board private structure
3952 **/
3953static void e1000_phy_read_status(struct e1000_adapter *adapter)
3954{
3955 struct e1000_hw *hw = &adapter->hw;
3956 struct e1000_phy_regs *phy = &adapter->phy_regs;
3957 int ret_val;
7c25769f
BA		 3958
3959 if ((er32(STATUS) & E1000_STATUS_LU) &&
3960 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3961 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3962 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3963 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3964 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3965 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3966 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3967 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3968 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3969 if (ret_val)
44defeb3 3970 e_warn("Error reading PHY register\n");
7c25769f
BA		 3971 } else {
3972 /*
3973 * Do not read PHY registers if link is not up
3974 * Set values to typical power-on defaults
3975 */
3976 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3977 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3978 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3979 BMSR_ERCAP);
3980 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3981 ADVERTISE_ALL | ADVERTISE_CSMA);
3982 phy->lpa = 0;
3983 phy->expansion = EXPANSION_ENABLENPAGE;
3984 phy->ctrl1000 = ADVERTISE_1000FULL;
3985 phy->stat1000 = 0;
3986 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3987 }
7c25769f
BA		 3988}
3989
bc7f75fa
AK		 3990static void e1000_print_link_info(struct e1000_adapter *adapter)
3991{
bc7f75fa
AK		 3992 struct e1000_hw *hw = &adapter->hw;
3993 u32 ctrl = er32(CTRL);
3994
8f12fe86
BA		 3995 /* Link status message must follow this format for user tools */
3996 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3997 "Flow Control: %s\n",
3998 adapter->netdev->name,
44defeb3
JK		 3999 adapter->link_speed,
4000 (adapter->link_duplex == FULL_DUPLEX) ?
4001 "Full Duplex" : "Half Duplex",
4002 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
4003 "RX/TX" :
4004 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
4005 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 4006}
4007
0c6bdb30 4008static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 4009{
4010 struct e1000_hw *hw = &adapter->hw;
4011 bool link_active = 0;
4012 s32 ret_val = 0;
4013
4014 /*
4015 * get_link_status is set on LSC (link status) interrupt or
4016 * Rx sequence error interrupt. get_link_status will stay
4017 * false until the check_for_link establishes link
4018 * for copper adapters ONLY
4019 */
4020 switch (hw->phy.media_type) {
4021 case e1000_media_type_copper:
4022 if (hw->mac.get_link_status) {
4023 ret_val = hw->mac.ops.check_for_link(hw);
4024 link_active = !hw->mac.get_link_status;
4025 } else {
4026 link_active = 1;
4027 }
4028 break;
4029 case e1000_media_type_fiber:
4030 ret_val = hw->mac.ops.check_for_link(hw);
4031 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4032 break;
4033 case e1000_media_type_internal_serdes:
4034 ret_val = hw->mac.ops.check_for_link(hw);
4035 link_active = adapter->hw.mac.serdes_has_link;
4036 break;
4037 default:
4038 case e1000_media_type_unknown:
4039 break;
4040 }
4041
4042 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4043 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4044 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4045 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4046 }
4047
4048 return link_active;
4049}
4050
4051static void e1000e_enable_receives(struct e1000_adapter *adapter)
4052{
4053 /* make sure the receive unit is started */
4054 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4055 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4056 struct e1000_hw *hw = &adapter->hw;
4057 u32 rctl = er32(RCTL);
4058 ew32(RCTL, rctl | E1000_RCTL_EN);
4059 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4060 }
4061}
4062
bc7f75fa
AK		 4063/**
4064 * e1000_watchdog - Timer Call-back
4065 * @data: pointer to adapter cast into an unsigned long
4066 **/
4067static void e1000_watchdog(unsigned long data)
4068{
4069 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4070
4071 /* Do the rest outside of interrupt context */
4072 schedule_work(&adapter->watchdog_task);
4073
4074 /* TODO: make this use queue_delayed_work() */
4075}
4076
4077static void e1000_watchdog_task(struct work_struct *work)
4078{
4079 struct e1000_adapter *adapter = container_of(work,
4080 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4081 struct net_device *netdev = adapter->netdev;
4082 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4083 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4084 struct e1000_ring *tx_ring = adapter->tx_ring;
4085 struct e1000_hw *hw = &adapter->hw;
4086 u32 link, tctl;
bc7f75fa
AK		 4087 int tx_pending = 0;
4088
b405e8df 4089 link = e1000e_has_link(adapter);
318a94d6 4090 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4091 /* Cancel scheduled suspend requests. */
4092 pm_runtime_resume(netdev->dev.parent);
4093
318a94d6 4094 e1000e_enable_receives(adapter);
bc7f75fa 4095 goto link_up;
bc7f75fa
AK		 4096 }
4097
4098 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4099 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4100 e1000_update_mng_vlan(adapter);
4101
bc7f75fa
AK		 4102 if (link) {
4103 if (!netif_carrier_ok(netdev)) {
4104 bool txb2b = 1;
23606cf5
RW		 4105
4106 /* Cancel scheduled suspend requests. */
4107 pm_runtime_resume(netdev->dev.parent);
4108
318a94d6 4109 /* update snapshot of PHY registers on LSC */
7c25769f 4110 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4111 mac->ops.get_link_up_info(&adapter->hw,
4112 &adapter->link_speed,
4113 &adapter->link_duplex);
4114 e1000_print_link_info(adapter);
f4187b56
BA		 4115 /*
4116 * On supported PHYs, check for duplex mismatch only
4117 * if link has autonegotiated at 10/100 half
4118 */
4119 if ((hw->phy.type == e1000_phy_igp_3 ||
4120 hw->phy.type == e1000_phy_bm) &&
4121 (hw->mac.autoneg == true) &&
4122 (adapter->link_speed == SPEED_10 ||
4123 adapter->link_speed == SPEED_100) &&
4124 (adapter->link_duplex == HALF_DUPLEX)) {
4125 u16 autoneg_exp;
4126
4127 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4128
4129 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4130 e_info("Autonegotiated half duplex but"
4131 " link partner cannot autoneg. "
4132 " Try forcing full duplex if "
4133 "link gets many collisions.\n");
4134 }
4135
f49c57e1 4136 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4137 adapter->tx_timeout_factor = 1;
4138 switch (adapter->link_speed) {
4139 case SPEED_10:
4140 txb2b = 0;
10f1b492 4141 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4142 break;
4143 case SPEED_100:
4144 txb2b = 0;
4c86e0b9 4145 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4146 break;
4147 }
4148
ad68076e
BA		 4149 /*
4150 * workaround: re-program speed mode bit after
4151 * link-up event
4152 */
bc7f75fa
AK		 4153 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4154 !txb2b) {
4155 u32 tarc0;
e9ec2c0f 4156 tarc0 = er32(TARC(0));
bc7f75fa 4157 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4158 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4159 }
4160
ad68076e
BA		 4161 /*
4162 * disable TSO for pcie and 10/100 speeds, to avoid
4163 * some hardware issues
4164 */
bc7f75fa
AK		 4165 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4166 switch (adapter->link_speed) {
4167 case SPEED_10:
4168 case SPEED_100:
44defeb3 4169 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4170 netdev->features &= ~NETIF_F_TSO;
4171 netdev->features &= ~NETIF_F_TSO6;
4172 break;
4173 case SPEED_1000:
4174 netdev->features |= NETIF_F_TSO;
4175 netdev->features |= NETIF_F_TSO6;
4176 break;
4177 default:
4178 /* oops */
4179 break;
4180 }
4181 }
4182
ad68076e
BA		 4183 /*
4184 * enable transmits in the hardware, need to do this
4185 * after setting TARC(0)
4186 */
bc7f75fa
AK		 4187 tctl = er32(TCTL);
4188 tctl |= E1000_TCTL_EN;
4189 ew32(TCTL, tctl);
4190
75eb0fad
BA		 4191 /*
4192 * Perform any post-link-up configuration before
4193 * reporting link up.
4194 */
4195 if (phy->ops.cfg_on_link_up)
4196 phy->ops.cfg_on_link_up(hw);
4197
bc7f75fa 4198 netif_carrier_on(netdev);
bc7f75fa
AK		 4199
4200 if (!test_bit(__E1000_DOWN, &adapter->state))
4201 mod_timer(&adapter->phy_info_timer,
4202 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4203 }
4204 } else {
4205 if (netif_carrier_ok(netdev)) {
4206 adapter->link_speed = 0;
4207 adapter->link_duplex = 0;
8f12fe86
BA		 4208 /* Link status message must follow this format */
4209 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4210 adapter->netdev->name);
bc7f75fa 4211 netif_carrier_off(netdev);
bc7f75fa
AK		 4212 if (!test_bit(__E1000_DOWN, &adapter->state))
4213 mod_timer(&adapter->phy_info_timer,
4214 round_jiffies(jiffies + 2 * HZ));
4215
4216 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4217 schedule_work(&adapter->reset_task);
23606cf5
RW		 4218 else
4219 pm_schedule_suspend(netdev->dev.parent,
4220 LINK_TIMEOUT);
bc7f75fa
AK		 4221 }
4222 }
4223
4224link_up:
4225 e1000e_update_stats(adapter);
4226
4227 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4228 adapter->tpt_old = adapter->stats.tpt;
4229 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4230 adapter->colc_old = adapter->stats.colc;
4231
7c25769f
BA		 4232 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4233 adapter->gorc_old = adapter->stats.gorc;
4234 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4235 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4236
4237 e1000e_update_adaptive(&adapter->hw);
4238
4239 if (!netif_carrier_ok(netdev)) {
4240 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4241 tx_ring->count);
4242 if (tx_pending) {
ad68076e
BA		 4243 /*
4244 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4245 * but we've got queued Tx work that's never going
4246 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4247 * (Do the reset outside of interrupt context).
4248 */
bc7f75fa
AK		 4249 adapter->tx_timeout_count++;
4250 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4251 /* return immediately since reset is imminent */
4252 return;
bc7f75fa
AK		 4253 }
4254 }
4255
eab2abf5
JB		 4256 /* Simple mode for Interrupt Throttle Rate (ITR) */
4257 if (adapter->itr_setting == 4) {
4258 /*
4259 * Symmetric Tx/Rx gets a reduced ITR=2000;
4260 * Total asymmetrical Tx or Rx gets ITR=8000;
4261 * everyone else is between 2000-8000.
4262 */
4263 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4264 u32 dif = (adapter->gotc > adapter->gorc ?
4265 adapter->gotc - adapter->gorc :
4266 adapter->gorc - adapter->gotc) / 10000;
4267 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4268
4269 ew32(ITR, 1000000000 / (itr * 256));
4270 }
4271
ad68076e 4272 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4273 if (adapter->msix_entries)
4274 ew32(ICS, adapter->rx_ring->ims_val);
4275 else
4276 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4277
4278 /* Force detection of hung controller every watchdog period */
4279 adapter->detect_tx_hung = 1;
4280
3a3b7586
JB		 4281 /* flush partial descriptors to memory before detecting tx hang */
4282 if (adapter->flags2 & FLAG2_DMA_BURST) {
4283 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4284 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4285 /*
4286 * no need to flush the writes because the timeout code does
4287 * an er32 first thing
4288 */
4289 }
4290
ad68076e
BA		 4291 /*
4292 * With 82571 controllers, LAA may be overwritten due to controller
4293 * reset from the other port. Set the appropriate LAA in RAR[0]
4294 */
bc7f75fa
AK		 4295 if (e1000e_get_laa_state_82571(hw))
4296 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4297
4298 /* Reset the timer */
4299 if (!test_bit(__E1000_DOWN, &adapter->state))
4300 mod_timer(&adapter->watchdog_timer,
4301 round_jiffies(jiffies + 2 * HZ));
4302}
4303
4304#define E1000_TX_FLAGS_CSUM 0x00000001
4305#define E1000_TX_FLAGS_VLAN 0x00000002
4306#define E1000_TX_FLAGS_TSO 0x00000004
4307#define E1000_TX_FLAGS_IPV4 0x00000008
4308#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4309#define E1000_TX_FLAGS_VLAN_SHIFT 16
4310
4311static int e1000_tso(struct e1000_adapter *adapter,
4312 struct sk_buff *skb)
4313{
4314 struct e1000_ring *tx_ring = adapter->tx_ring;
4315 struct e1000_context_desc *context_desc;
4316 struct e1000_buffer *buffer_info;
4317 unsigned int i;
4318 u32 cmd_length = 0;
4319 u16 ipcse = 0, tucse, mss;
4320 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4321 int err;
4322
3d5e33c9
BA		 4323 if (!skb_is_gso(skb))
4324 return 0;
bc7f75fa 4325
3d5e33c9
BA		 4326 if (skb_header_cloned(skb)) {
4327 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4328 if (err)
4329 return err;
bc7f75fa
AK		 4330 }
4331
3d5e33c9
BA		 4332 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4333 mss = skb_shinfo(skb)->gso_size;
4334 if (skb->protocol == htons(ETH_P_IP)) {
4335 struct iphdr *iph = ip_hdr(skb);
4336 iph->tot_len = 0;
4337 iph->check = 0;
4338 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4339 0, IPPROTO_TCP, 0);
4340 cmd_length = E1000_TXD_CMD_IP;
4341 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4342 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4343 ipv6_hdr(skb)->payload_len = 0;
4344 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4345 &ipv6_hdr(skb)->daddr,
4346 0, IPPROTO_TCP, 0);
4347 ipcse = 0;
4348 }
4349 ipcss = skb_network_offset(skb);
4350 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4351 tucss = skb_transport_offset(skb);
4352 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4353 tucse = 0;
4354
4355 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4356 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4357
4358 i = tx_ring->next_to_use;
4359 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4360 buffer_info = &tx_ring->buffer_info[i];
4361
4362 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4363 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4364 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4365 context_desc->upper_setup.tcp_fields.tucss = tucss;
4366 context_desc->upper_setup.tcp_fields.tucso = tucso;
4367 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4368 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4369 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4370 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4371
4372 buffer_info->time_stamp = jiffies;
4373 buffer_info->next_to_watch = i;
4374
4375 i++;
4376 if (i == tx_ring->count)
4377 i = 0;
4378 tx_ring->next_to_use = i;
4379
4380 return 1;
bc7f75fa
AK		 4381}
4382
4383static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4384{
4385 struct e1000_ring *tx_ring = adapter->tx_ring;
4386 struct e1000_context_desc *context_desc;
4387 struct e1000_buffer *buffer_info;
4388 unsigned int i;
4389 u8 css;
af807c82 4390 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4391 __be16 protocol;
bc7f75fa 4392
af807c82
DG		 4393 if (skb->ip_summed != CHECKSUM_PARTIAL)
4394 return 0;
bc7f75fa 4395
5f66f208
AJ		 4396 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4397 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4398 else
4399 protocol = skb->protocol;
4400
3f518390 4401 switch (protocol) {
09640e63 4402 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4403 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4404 cmd_len |= E1000_TXD_CMD_TCP;
4405 break;
09640e63 4406 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4407 /* XXX not handling all IPV6 headers */
4408 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4409 cmd_len |= E1000_TXD_CMD_TCP;
4410 break;
4411 default:
4412 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4413 e_warn("checksum_partial proto=%x!\n",
4414 be16_to_cpu(protocol));
af807c82 4415 break;
bc7f75fa
AK		 4416 }
4417
af807c82
DG		 4418 css = skb_transport_offset(skb);
4419
4420 i = tx_ring->next_to_use;
4421 buffer_info = &tx_ring->buffer_info[i];
4422 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4423
4424 context_desc->lower_setup.ip_config = 0;
4425 context_desc->upper_setup.tcp_fields.tucss = css;
4426 context_desc->upper_setup.tcp_fields.tucso =
4427 css + skb->csum_offset;
4428 context_desc->upper_setup.tcp_fields.tucse = 0;
4429 context_desc->tcp_seg_setup.data = 0;
4430 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4431
4432 buffer_info->time_stamp = jiffies;
4433 buffer_info->next_to_watch = i;
4434
4435 i++;
4436 if (i == tx_ring->count)
4437 i = 0;
4438 tx_ring->next_to_use = i;
4439
4440 return 1;
bc7f75fa
AK		 4441}
4442
4443#define E1000_MAX_PER_TXD 8192
4444#define E1000_MAX_TXD_PWR 12
4445
4446static int e1000_tx_map(struct e1000_adapter *adapter,
4447 struct sk_buff *skb, unsigned int first,
4448 unsigned int max_per_txd, unsigned int nr_frags,
4449 unsigned int mss)
4450{
4451 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4452 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4453 struct e1000_buffer *buffer_info;
8ddc951c 4454 unsigned int len = skb_headlen(skb);
03b1320d 4455 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4456 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4457
4458 i = tx_ring->next_to_use;
4459
4460 while (len) {
1b7719c4 4461 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4462 size = min(len, max_per_txd);
4463
bc7f75fa 4464 buffer_info->length = size;
bc7f75fa 4465 buffer_info->time_stamp = jiffies;
bc7f75fa 4466 buffer_info->next_to_watch = i;
0be3f55f
NN		 4467 buffer_info->dma = dma_map_single(&pdev->dev,
4468 skb->data + offset,
4469 size, DMA_TO_DEVICE);
03b1320d 4470 buffer_info->mapped_as_page = false;
0be3f55f 4471 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4472 goto dma_error;
bc7f75fa
AK		 4473
4474 len -= size;
4475 offset += size;
03b1320d 4476 count++;
1b7719c4
AD		 4477
4478 if (len) {
4479 i++;
4480 if (i == tx_ring->count)
4481 i = 0;
4482 }
bc7f75fa
AK		 4483 }
4484
4485 for (f = 0; f < nr_frags; f++) {
4486 struct skb_frag_struct *frag;
4487
4488 frag = &skb_shinfo(skb)->frags[f];
4489 len = frag->size;
03b1320d 4490 offset = frag->page_offset;
bc7f75fa
AK		 4491
4492 while (len) {
1b7719c4
AD		 4493 i++;
4494 if (i == tx_ring->count)
4495 i = 0;
4496
bc7f75fa
AK		 4497 buffer_info = &tx_ring->buffer_info[i];
4498 size = min(len, max_per_txd);
bc7f75fa
AK		 4499
4500 buffer_info->length = size;
4501 buffer_info->time_stamp = jiffies;
bc7f75fa 4502 buffer_info->next_to_watch = i;
0be3f55f 4503 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4504 offset, size,
0be3f55f 4505 DMA_TO_DEVICE);
03b1320d 4506 buffer_info->mapped_as_page = true;
0be3f55f 4507 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4508 goto dma_error;
bc7f75fa
AK		 4509
4510 len -= size;
4511 offset += size;
4512 count++;
bc7f75fa
AK		 4513 }
4514 }
4515
9ed318d5
TH		 4516 segs = skb_shinfo(skb)->gso_segs ?: 1;
4517 /* multiply data chunks by size of headers */
4518 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4519
bc7f75fa 4520 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4521 tx_ring->buffer_info[i].segs = segs;
4522 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4523 tx_ring->buffer_info[first].next_to_watch = i;
4524
4525 return count;
03b1320d
AD		 4526
4527dma_error:
4528 dev_err(&pdev->dev, "TX DMA map failed\n");
4529 buffer_info->dma = 0;
c1fa347f 4530 if (count)
03b1320d 4531 count--;
c1fa347f
RK		 4532
4533 while (count--) {
4534 if (i==0)
03b1320d 4535 i += tx_ring->count;
c1fa347f 4536 i--;
03b1320d
AD		 4537 buffer_info = &tx_ring->buffer_info[i];
4538 e1000_put_txbuf(adapter, buffer_info);;
4539 }
4540
4541 return 0;
bc7f75fa
AK		 4542}
4543
4544static void e1000_tx_queue(struct e1000_adapter *adapter,
4545 int tx_flags, int count)
4546{
4547 struct e1000_ring *tx_ring = adapter->tx_ring;
4548 struct e1000_tx_desc *tx_desc = NULL;
4549 struct e1000_buffer *buffer_info;
4550 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4551 unsigned int i;
4552
4553 if (tx_flags & E1000_TX_FLAGS_TSO) {
4554 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4555 E1000_TXD_CMD_TSE;
4556 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4557
4558 if (tx_flags & E1000_TX_FLAGS_IPV4)
4559 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4560 }
4561
4562 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4563 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4564 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4565 }
4566
4567 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4568 txd_lower |= E1000_TXD_CMD_VLE;
4569 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4570 }
4571
4572 i = tx_ring->next_to_use;
4573
4574 while (count--) {
4575 buffer_info = &tx_ring->buffer_info[i];
4576 tx_desc = E1000_TX_DESC(*tx_ring, i);
4577 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4578 tx_desc->lower.data =
4579 cpu_to_le32(txd_lower | buffer_info->length);
4580 tx_desc->upper.data = cpu_to_le32(txd_upper);
4581
4582 i++;
4583 if (i == tx_ring->count)
4584 i = 0;
4585 }
4586
4587 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4588
ad68076e
BA		 4589 /*
4590 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4591 * know there are new descriptors to fetch. (Only
4592 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4593 * such as IA-64).
4594 */
bc7f75fa
AK		 4595 wmb();
4596
4597 tx_ring->next_to_use = i;
4598 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4599 /*
4600 * we need this if more than one processor can write to our tail
4601 * at a time, it synchronizes IO on IA64/Altix systems
4602 */
bc7f75fa
AK		 4603 mmiowb();
4604}
4605
4606#define MINIMUM_DHCP_PACKET_SIZE 282
4607static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4608 struct sk_buff *skb)
4609{
4610 struct e1000_hw *hw = &adapter->hw;
4611 u16 length, offset;
4612
4613 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4614 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4615 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4616 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4617 return 0;
4618 }
4619
4620 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4621 return 0;
4622
4623 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4624 return 0;
4625
4626 {
4627 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4628 struct udphdr *udp;
4629
4630 if (ip->protocol != IPPROTO_UDP)
4631 return 0;
4632
4633 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4634 if (ntohs(udp->dest) != 67)
4635 return 0;
4636
4637 offset = (u8 *)udp + 8 - skb->data;
4638 length = skb->len - offset;
4639 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4640 }
4641
4642 return 0;
4643}
4644
4645static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4646{
4647 struct e1000_adapter *adapter = netdev_priv(netdev);
4648
4649 netif_stop_queue(netdev);
ad68076e
BA		 4650 /*
4651 * Herbert's original patch had:
bc7f75fa 4652 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4653 * but since that doesn't exist yet, just open code it.
4654 */
bc7f75fa
AK		 4655 smp_mb();
4656
ad68076e
BA		 4657 /*
4658 * We need to check again in a case another CPU has just
4659 * made room available.
4660 */
bc7f75fa
AK		 4661 if (e1000_desc_unused(adapter->tx_ring) < size)
4662 return -EBUSY;
4663
4664 /* A reprieve! */
4665 netif_start_queue(netdev);
4666 ++adapter->restart_queue;
4667 return 0;
4668}
4669
4670static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4671{
4672 struct e1000_adapter *adapter = netdev_priv(netdev);
4673
4674 if (e1000_desc_unused(adapter->tx_ring) >= size)
4675 return 0;
4676 return __e1000_maybe_stop_tx(netdev, size);
4677}
4678
4679#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4680static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4681 struct net_device *netdev)
bc7f75fa
AK		 4682{
4683 struct e1000_adapter *adapter = netdev_priv(netdev);
4684 struct e1000_ring *tx_ring = adapter->tx_ring;
4685 unsigned int first;
4686 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4687 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4688 unsigned int tx_flags = 0;
e743d313 4689 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4690 unsigned int nr_frags;
4691 unsigned int mss;
bc7f75fa
AK		 4692 int count = 0;
4693 int tso;
4694 unsigned int f;
bc7f75fa
AK		 4695
4696 if (test_bit(__E1000_DOWN, &adapter->state)) {
4697 dev_kfree_skb_any(skb);
4698 return NETDEV_TX_OK;
4699 }
4700
4701 if (skb->len <= 0) {
4702 dev_kfree_skb_any(skb);
4703 return NETDEV_TX_OK;
4704 }
4705
4706 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4707 /*
4708 * The controller does a simple calculation to
bc7f75fa
AK		 4709 * make sure there is enough room in the FIFO before
4710 * initiating the DMA for each buffer. The calc is:
4711 * 4 = ceil(buffer len/mss). To make sure we don't
4712 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4713 * drops.
4714 */
bc7f75fa
AK		 4715 if (mss) {
4716 u8 hdr_len;
4717 max_per_txd = min(mss << 2, max_per_txd);
4718 max_txd_pwr = fls(max_per_txd) - 1;
4719
ad68076e
BA		 4720 /*
4721 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4722 * points to just header, pull a few bytes of payload from
4723 * frags into skb->data
4724 */
bc7f75fa 4725 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4726 /*
4727 * we do this workaround for ES2LAN, but it is un-necessary,
4728 * avoiding it could save a lot of cycles
4729 */
4e6c709c 4730 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4731 unsigned int pull_size;
4732
4733 pull_size = min((unsigned int)4, skb->data_len);
4734 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4735 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4736 dev_kfree_skb_any(skb);
4737 return NETDEV_TX_OK;
4738 }
e743d313 4739 len = skb_headlen(skb);
bc7f75fa
AK		 4740 }
4741 }
4742
4743 /* reserve a descriptor for the offload context */
4744 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4745 count++;
4746 count++;
4747
4748 count += TXD_USE_COUNT(len, max_txd_pwr);
4749
4750 nr_frags = skb_shinfo(skb)->nr_frags;
4751 for (f = 0; f < nr_frags; f++)
4752 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4753 max_txd_pwr);
4754
4755 if (adapter->hw.mac.tx_pkt_filtering)
4756 e1000_transfer_dhcp_info(adapter, skb);
4757
ad68076e
BA		 4758 /*
4759 * need: count + 2 desc gap to keep tail from touching
4760 * head, otherwise try next time
4761 */
92af3e95 4762 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4763 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4764
4765 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4766 tx_flags |= E1000_TX_FLAGS_VLAN;
4767 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4768 }
4769
4770 first = tx_ring->next_to_use;
4771
4772 tso = e1000_tso(adapter, skb);
4773 if (tso < 0) {
4774 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4775 return NETDEV_TX_OK;
4776 }
4777
4778 if (tso)
4779 tx_flags |= E1000_TX_FLAGS_TSO;
4780 else if (e1000_tx_csum(adapter, skb))
4781 tx_flags |= E1000_TX_FLAGS_CSUM;
4782
ad68076e
BA		 4783 /*
4784 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4785 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4786 * no longer assume, we must.
4787 */
bc7f75fa
AK		 4788 if (skb->protocol == htons(ETH_P_IP))
4789 tx_flags |= E1000_TX_FLAGS_IPV4;
4790
1b7719c4 4791 /* if count is 0 then mapping error has occured */
bc7f75fa 4792 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4793 if (count) {
4794 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4795 /* Make sure there is space in the ring for the next send. */
4796 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4797
4798 } else {
bc7f75fa 4799 dev_kfree_skb_any(skb);
1b7719c4
AD		 4800 tx_ring->buffer_info[first].time_stamp = 0;
4801 tx_ring->next_to_use = first;
bc7f75fa
AK		 4802 }
4803
bc7f75fa
AK		 4804 return NETDEV_TX_OK;
4805}
4806
4807/**
4808 * e1000_tx_timeout - Respond to a Tx Hang
4809 * @netdev: network interface device structure
4810 **/
4811static void e1000_tx_timeout(struct net_device *netdev)
4812{
4813 struct e1000_adapter *adapter = netdev_priv(netdev);
4814
4815 /* Do the reset outside of interrupt context */
4816 adapter->tx_timeout_count++;
4817 schedule_work(&adapter->reset_task);
4818}
4819
4820static void e1000_reset_task(struct work_struct *work)
4821{
4822 struct e1000_adapter *adapter;
4823 adapter = container_of(work, struct e1000_adapter, reset_task);
4824
84f4ee90
TI		 4825 e1000e_dump(adapter);
4826 e_err("Reset adapter\n");
bc7f75fa
AK		 4827 e1000e_reinit_locked(adapter);
4828}
4829
4830/**
4831 * e1000_get_stats - Get System Network Statistics
4832 * @netdev: network interface device structure
4833 *
4834 * Returns the address of the device statistics structure.
4835 * The statistics are actually updated from the timer callback.
4836 **/
4837static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4838{
bc7f75fa 4839 /* only return the current stats */
7274c20f 4840 return &netdev->stats;
bc7f75fa
AK		 4841}
4842
4843/**
4844 * e1000_change_mtu - Change the Maximum Transfer Unit
4845 * @netdev: network interface device structure
4846 * @new_mtu: new value for maximum frame size
4847 *
4848 * Returns 0 on success, negative on failure
4849 **/
4850static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4851{
4852 struct e1000_adapter *adapter = netdev_priv(netdev);
4853 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4854
2adc55c9
BA		 4855 /* Jumbo frame support */
4856 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4857 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4858 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4859 return -EINVAL;
4860 }
4861
2adc55c9
BA		 4862 /* Supported frame sizes */
4863 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4864 (max_frame > adapter->max_hw_frame_size)) {
4865 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4866 return -EINVAL;
4867 }
4868
a1ce6473
BA		 4869 /* Jumbo frame workaround on 82579 requires CRC be stripped */
4870 if ((adapter->hw.mac.type == e1000_pch2lan) &&
4871 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
4872 (new_mtu > ETH_DATA_LEN)) {
4873 e_err("Jumbo Frames not supported on 82579 when CRC "
4874 "stripping is disabled.\n");
4875 return -EINVAL;
4876 }
4877
6f461f6c
BA		 4878 /* 82573 Errata 17 */
4879 if (((adapter->hw.mac.type == e1000_82573) ||
4880 (adapter->hw.mac.type == e1000_82574)) &&
4881 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4882 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4883 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4884 }
4885
bc7f75fa
AK		 4886 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4887 msleep(1);
610c9928 4888 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4889 adapter->max_frame_size = max_frame;
610c9928
BA		 4890 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4891 netdev->mtu = new_mtu;
bc7f75fa
AK		 4892 if (netif_running(netdev))
4893 e1000e_down(adapter);
4894
ad68076e
BA		 4895 /*
4896 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4897 * means we reserve 2 more, this pushes us to allocate from the next
4898 * larger slab size.
ad68076e 4899 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4900 * However with the new *_jumbo_rx* routines, jumbo receives will use
4901 * fragmented skbs
ad68076e 4902 */
bc7f75fa 4903
9926146b 4904 if (max_frame <= 2048)
bc7f75fa
AK		 4905 adapter->rx_buffer_len = 2048;
4906 else
4907 adapter->rx_buffer_len = 4096;
4908
4909 /* adjust allocation if LPE protects us, and we aren't using SBP */
4910 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4911 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4912 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4913 + ETH_FCS_LEN;
bc7f75fa 4914
bc7f75fa
AK		 4915 if (netif_running(netdev))
4916 e1000e_up(adapter);
4917 else
4918 e1000e_reset(adapter);
4919
4920 clear_bit(__E1000_RESETTING, &adapter->state);
4921
4922 return 0;
4923}
4924
4925static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4926 int cmd)
4927{
4928 struct e1000_adapter *adapter = netdev_priv(netdev);
4929 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4930
318a94d6 4931 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4932 return -EOPNOTSUPP;
4933
4934 switch (cmd) {
4935 case SIOCGMIIPHY:
4936 data->phy_id = adapter->hw.phy.addr;
4937 break;
4938 case SIOCGMIIREG:
b16a002e
BA		 4939 e1000_phy_read_status(adapter);
4940
7c25769f
BA		 4941 switch (data->reg_num & 0x1F) {
4942 case MII_BMCR:
4943 data->val_out = adapter->phy_regs.bmcr;
4944 break;
4945 case MII_BMSR:
4946 data->val_out = adapter->phy_regs.bmsr;
4947 break;
4948 case MII_PHYSID1:
4949 data->val_out = (adapter->hw.phy.id >> 16);
4950 break;
4951 case MII_PHYSID2:
4952 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4953 break;
4954 case MII_ADVERTISE:
4955 data->val_out = adapter->phy_regs.advertise;
4956 break;
4957 case MII_LPA:
4958 data->val_out = adapter->phy_regs.lpa;
4959 break;
4960 case MII_EXPANSION:
4961 data->val_out = adapter->phy_regs.expansion;
4962 break;
4963 case MII_CTRL1000:
4964 data->val_out = adapter->phy_regs.ctrl1000;
4965 break;
4966 case MII_STAT1000:
4967 data->val_out = adapter->phy_regs.stat1000;
4968 break;
4969 case MII_ESTATUS:
4970 data->val_out = adapter->phy_regs.estatus;
4971 break;
4972 default:
bc7f75fa
AK		 4973 return -EIO;
4974 }
bc7f75fa
AK		 4975 break;
4976 case SIOCSMIIREG:
4977 default:
4978 return -EOPNOTSUPP;
4979 }
4980 return 0;
4981}
4982
4983static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4984{
4985 switch (cmd) {
4986 case SIOCGMIIPHY:
4987 case SIOCGMIIREG:
4988 case SIOCSMIIREG:
4989 return e1000_mii_ioctl(netdev, ifr, cmd);
4990 default:
4991 return -EOPNOTSUPP;
4992 }
4993}
4994
a4f58f54
BA		 4995static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4996{
4997 struct e1000_hw *hw = &adapter->hw;
4998 u32 i, mac_reg;
4999 u16 phy_reg;
5000 int retval = 0;
5001
5002 /* copy MAC RARs to PHY RARs */
d3738bb8 5003 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54
BA		 5004
5005 /* copy MAC MTA to PHY MTA */
5006 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5007 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5008 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
5009 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
5010 }
5011
5012 /* configure PHY Rx Control register */
5013 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
5014 mac_reg = er32(RCTL);
5015 if (mac_reg & E1000_RCTL_UPE)
5016 phy_reg |= BM_RCTL_UPE;
5017 if (mac_reg & E1000_RCTL_MPE)
5018 phy_reg |= BM_RCTL_MPE;
5019 phy_reg &= ~(BM_RCTL_MO_MASK);
5020 if (mac_reg & E1000_RCTL_MO_3)
5021 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5022 << BM_RCTL_MO_SHIFT);
5023 if (mac_reg & E1000_RCTL_BAM)
5024 phy_reg |= BM_RCTL_BAM;
5025 if (mac_reg & E1000_RCTL_PMCF)
5026 phy_reg |= BM_RCTL_PMCF;
5027 mac_reg = er32(CTRL);
5028 if (mac_reg & E1000_CTRL_RFCE)
5029 phy_reg |= BM_RCTL_RFCE;
5030 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
5031
5032 /* enable PHY wakeup in MAC register */
5033 ew32(WUFC, wufc);
5034 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5035
5036 /* configure and enable PHY wakeup in PHY registers */
5037 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
5038 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5039
5040 /* activate PHY wakeup */
94d8186a 5041 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 5042 if (retval) {
5043 e_err("Could not acquire PHY\n");
5044 return retval;
5045 }
5046 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
5047 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
5048 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
5049 if (retval) {
5050 e_err("Could not read PHY page 769\n");
5051 goto out;
5052 }
5053 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5054 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
5055 if (retval)
5056 e_err("Could not set PHY Host Wakeup bit\n");
5057out:
94d8186a 5058 hw->phy.ops.release(hw);
a4f58f54
BA		 5059
5060 return retval;
5061}
5062
23606cf5
RW		 5063static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5064 bool runtime)
bc7f75fa
AK		 5065{
5066 struct net_device *netdev = pci_get_drvdata(pdev);
5067 struct e1000_adapter *adapter = netdev_priv(netdev);
5068 struct e1000_hw *hw = &adapter->hw;
5069 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5070 /* Runtime suspend should only enable wakeup for link changes */
5071 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5072 int retval = 0;
5073
5074 netif_device_detach(netdev);
5075
5076 if (netif_running(netdev)) {
5077 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5078 e1000e_down(adapter);
5079 e1000_free_irq(adapter);
5080 }
4662e82b 5081 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5082
5083 retval = pci_save_state(pdev);
5084 if (retval)
5085 return retval;
5086
5087 status = er32(STATUS);
5088 if (status & E1000_STATUS_LU)
5089 wufc &= ~E1000_WUFC_LNKC;
5090
5091 if (wufc) {
5092 e1000_setup_rctl(adapter);
5093 e1000_set_multi(netdev);
5094
5095 /* turn on all-multi mode if wake on multicast is enabled */
5096 if (wufc & E1000_WUFC_MC) {
5097 rctl = er32(RCTL);
5098 rctl |= E1000_RCTL_MPE;
5099 ew32(RCTL, rctl);
5100 }
5101
5102 ctrl = er32(CTRL);
5103 /* advertise wake from D3Cold */
5104 #define E1000_CTRL_ADVD3WUC 0x00100000
5105 /* phy power management enable */
5106 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5107 ctrl |= E1000_CTRL_ADVD3WUC;
5108 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5109 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5110 ew32(CTRL, ctrl);
5111
318a94d6
JK		 5112 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5113 adapter->hw.phy.media_type ==
5114 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5115 /* keep the laser running in D3 */
5116 ctrl_ext = er32(CTRL_EXT);
93a23f48 5117 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5118 ew32(CTRL_EXT, ctrl_ext);
5119 }
5120
97ac8cae
BA		 5121 if (adapter->flags & FLAG_IS_ICH)
5122 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5123
bc7f75fa
AK		 5124 /* Allow time for pending master requests to run */
5125 e1000e_disable_pcie_master(&adapter->hw);
5126
82776a4b 5127 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5128 /* enable wakeup by the PHY */
5129 retval = e1000_init_phy_wakeup(adapter, wufc);
5130 if (retval)
5131 return retval;
5132 } else {
5133 /* enable wakeup by the MAC */
5134 ew32(WUFC, wufc);
5135 ew32(WUC, E1000_WUC_PME_EN);
5136 }
bc7f75fa
AK		 5137 } else {
5138 ew32(WUC, 0);
5139 ew32(WUFC, 0);
bc7f75fa
AK		 5140 }
5141
4f9de721
RW		 5142 *enable_wake = !!wufc;
5143
bc7f75fa 5144 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5145 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5146 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5147 *enable_wake = true;
bc7f75fa
AK		 5148
5149 if (adapter->hw.phy.type == e1000_phy_igp_3)
5150 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5151
ad68076e
BA		 5152 /*
5153 * Release control of h/w to f/w. If f/w is AMT enabled, this
5154 * would have already happened in close and is redundant.
5155 */
bc7f75fa
AK		 5156 e1000_release_hw_control(adapter);
5157
5158 pci_disable_device(pdev);
5159
4f9de721
RW		 5160 return 0;
5161}
5162
5163static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5164{
5165 if (sleep && wake) {
5166 pci_prepare_to_sleep(pdev);
5167 return;
5168 }
5169
5170 pci_wake_from_d3(pdev, wake);
5171 pci_set_power_state(pdev, PCI_D3hot);
5172}
5173
5174static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5175 bool wake)
5176{
5177 struct net_device *netdev = pci_get_drvdata(pdev);
5178 struct e1000_adapter *adapter = netdev_priv(netdev);
5179
005cbdfc
AD		 5180 /*
5181 * The pci-e switch on some quad port adapters will report a
5182 * correctable error when the MAC transitions from D0 to D3. To
5183 * prevent this we need to mask off the correctable errors on the
5184 * downstream port of the pci-e switch.
5185 */
5186 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5187 struct pci_dev *us_dev = pdev->bus->self;
5188 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5189 u16 devctl;
5190
5191 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5192 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5193 (devctl & ~PCI_EXP_DEVCTL_CERE));
5194
4f9de721 5195 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5196
5197 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5198 } else {
4f9de721 5199 e1000_power_off(pdev, sleep, wake);
005cbdfc 5200 }
bc7f75fa
AK		 5201}
5202
6f461f6c
BA		 5203#ifdef CONFIG_PCIEASPM
5204static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5205{
5206 pci_disable_link_state(pdev, state);
5207}
5208#else
5209static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5210{
5211 int pos;
6f461f6c 5212 u16 reg16;
1eae4eb2
AK		 5213
5214 /*
6f461f6c
BA		 5215 * Both device and parent should have the same ASPM setting.
5216 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5217 */
6f461f6c
BA		 5218 pos = pci_pcie_cap(pdev);
5219 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5220 reg16 &= ~state;
5221 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5222
0c75ba22
AB		 5223 if (!pdev->bus->self)
5224 return;
5225
6f461f6c
BA		 5226 pos = pci_pcie_cap(pdev->bus->self);
5227 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5228 reg16 &= ~state;
5229 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5230}
5231#endif
5232void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5233{
5234 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5235 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5236 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5237
5238 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5239}
5240
a0340162 5241#ifdef CONFIG_PM_OPS
23606cf5 5242static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5243{
23606cf5 5244 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5245}
5246
23606cf5 5247static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5248{
5249 struct net_device *netdev = pci_get_drvdata(pdev);
5250 struct e1000_adapter *adapter = netdev_priv(netdev);
5251 struct e1000_hw *hw = &adapter->hw;
5252 u32 err;
5253
5254 pci_set_power_state(pdev, PCI_D0);
5255 pci_restore_state(pdev);
28b8f04a 5256 pci_save_state(pdev);
6f461f6c
BA		 5257 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5258 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5259
4662e82b 5260 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5261 if (netif_running(netdev)) {
5262 err = e1000_request_irq(adapter);
5263 if (err)
5264 return err;
5265 }
5266
5267 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5268
5269 /* report the system wakeup cause from S3/S4 */
5270 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5271 u16 phy_data;
5272
5273 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5274 if (phy_data) {
5275 e_info("PHY Wakeup cause - %s\n",
5276 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5277 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5278 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5279 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5280 phy_data & E1000_WUS_LNKC ? "Link Status "
5281 " Change" : "other");
5282 }
5283 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5284 } else {
5285 u32 wus = er32(WUS);
5286 if (wus) {
5287 e_info("MAC Wakeup cause - %s\n",
5288 wus & E1000_WUS_EX ? "Unicast Packet" :
5289 wus & E1000_WUS_MC ? "Multicast Packet" :
5290 wus & E1000_WUS_BC ? "Broadcast Packet" :
5291 wus & E1000_WUS_MAG ? "Magic Packet" :
5292 wus & E1000_WUS_LNKC ? "Link Status Change" :
5293 "other");
5294 }
5295 ew32(WUS, ~0);
5296 }
5297
bc7f75fa 5298 e1000e_reset(adapter);
bc7f75fa 5299
cd791618 5300 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5301
5302 if (netif_running(netdev))
5303 e1000e_up(adapter);
5304
5305 netif_device_attach(netdev);
5306
ad68076e
BA		 5307 /*
5308 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5309 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5310 * under the control of the driver.
5311 */
c43bc57e 5312 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5313 e1000_get_hw_control(adapter);
5314
5315 return 0;
5316}
23606cf5 5317
a0340162
RW		 5318#ifdef CONFIG_PM_SLEEP
5319static int e1000_suspend(struct device *dev)
5320{
5321 struct pci_dev *pdev = to_pci_dev(dev);
5322 int retval;
5323 bool wake;
5324
5325 retval = __e1000_shutdown(pdev, &wake, false);
5326 if (!retval)
5327 e1000_complete_shutdown(pdev, true, wake);
5328
5329 return retval;
5330}
5331
23606cf5
RW		 5332static int e1000_resume(struct device *dev)
5333{
5334 struct pci_dev *pdev = to_pci_dev(dev);
5335 struct net_device *netdev = pci_get_drvdata(pdev);
5336 struct e1000_adapter *adapter = netdev_priv(netdev);
5337
5338 if (e1000e_pm_ready(adapter))
5339 adapter->idle_check = true;
5340
5341 return __e1000_resume(pdev);
5342}
a0340162
RW		 5343#endif /* CONFIG_PM_SLEEP */
5344
5345#ifdef CONFIG_PM_RUNTIME
5346static int e1000_runtime_suspend(struct device *dev)
5347{
5348 struct pci_dev *pdev = to_pci_dev(dev);
5349 struct net_device *netdev = pci_get_drvdata(pdev);
5350 struct e1000_adapter *adapter = netdev_priv(netdev);
5351
5352 if (e1000e_pm_ready(adapter)) {
5353 bool wake;
5354
5355 __e1000_shutdown(pdev, &wake, true);
5356 }
5357
5358 return 0;
5359}
5360
5361static int e1000_idle(struct device *dev)
5362{
5363 struct pci_dev *pdev = to_pci_dev(dev);
5364 struct net_device *netdev = pci_get_drvdata(pdev);
5365 struct e1000_adapter *adapter = netdev_priv(netdev);
5366
5367 if (!e1000e_pm_ready(adapter))
5368 return 0;
5369
5370 if (adapter->idle_check) {
5371 adapter->idle_check = false;
5372 if (!e1000e_has_link(adapter))
5373 pm_schedule_suspend(dev, MSEC_PER_SEC);
5374 }
5375
5376 return -EBUSY;
5377}
23606cf5
RW		 5378
5379static int e1000_runtime_resume(struct device *dev)
5380{
5381 struct pci_dev *pdev = to_pci_dev(dev);
5382 struct net_device *netdev = pci_get_drvdata(pdev);
5383 struct e1000_adapter *adapter = netdev_priv(netdev);
5384
5385 if (!e1000e_pm_ready(adapter))
5386 return 0;
5387
5388 adapter->idle_check = !dev->power.runtime_auto;
5389 return __e1000_resume(pdev);
5390}
a0340162
RW		 5391#endif /* CONFIG_PM_RUNTIME */
5392#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5393
5394static void e1000_shutdown(struct pci_dev *pdev)
5395{
4f9de721
RW		 5396 bool wake = false;
5397
23606cf5 5398 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5399
5400 if (system_state == SYSTEM_POWER_OFF)
5401 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5402}
5403
5404#ifdef CONFIG_NET_POLL_CONTROLLER
5405/*
5406 * Polling 'interrupt' - used by things like netconsole to send skbs
5407 * without having to re-enable interrupts. It's not called while
5408 * the interrupt routine is executing.
5409 */
5410static void e1000_netpoll(struct net_device *netdev)
5411{
5412 struct e1000_adapter *adapter = netdev_priv(netdev);
5413
5414 disable_irq(adapter->pdev->irq);
5415 e1000_intr(adapter->pdev->irq, netdev);
5416
bc7f75fa
AK		 5417 enable_irq(adapter->pdev->irq);
5418}
5419#endif
5420
5421/**
5422 * e1000_io_error_detected - called when PCI error is detected
5423 * @pdev: Pointer to PCI device
5424 * @state: The current pci connection state
5425 *
5426 * This function is called after a PCI bus error affecting
5427 * this device has been detected.
5428 */
5429static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5430 pci_channel_state_t state)
5431{
5432 struct net_device *netdev = pci_get_drvdata(pdev);
5433 struct e1000_adapter *adapter = netdev_priv(netdev);
5434
5435 netif_device_detach(netdev);
5436
c93b5a76
MM		 5437 if (state == pci_channel_io_perm_failure)
5438 return PCI_ERS_RESULT_DISCONNECT;
5439
bc7f75fa
AK		 5440 if (netif_running(netdev))
5441 e1000e_down(adapter);
5442 pci_disable_device(pdev);
5443
5444 /* Request a slot slot reset. */
5445 return PCI_ERS_RESULT_NEED_RESET;
5446}
5447
5448/**
5449 * e1000_io_slot_reset - called after the pci bus has been reset.
5450 * @pdev: Pointer to PCI device
5451 *
5452 * Restart the card from scratch, as if from a cold-boot. Implementation
5453 * resembles the first-half of the e1000_resume routine.
5454 */
5455static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5456{
5457 struct net_device *netdev = pci_get_drvdata(pdev);
5458 struct e1000_adapter *adapter = netdev_priv(netdev);
5459 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5460 int err;
111b9dc5 5461 pci_ers_result_t result;
bc7f75fa 5462
6f461f6c
BA		 5463 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5464 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5465 err = pci_enable_device_mem(pdev);
6e4f6f6b 5466 if (err) {
bc7f75fa
AK		 5467 dev_err(&pdev->dev,
5468 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5469 result = PCI_ERS_RESULT_DISCONNECT;
5470 } else {
5471 pci_set_master(pdev);
23606cf5 5472 pdev->state_saved = true;
111b9dc5 5473 pci_restore_state(pdev);
bc7f75fa 5474
111b9dc5
JB		 5475 pci_enable_wake(pdev, PCI_D3hot, 0);
5476 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5477
111b9dc5
JB		 5478 e1000e_reset(adapter);
5479 ew32(WUS, ~0);
5480 result = PCI_ERS_RESULT_RECOVERED;
5481 }
bc7f75fa 5482
111b9dc5
JB		 5483 pci_cleanup_aer_uncorrect_error_status(pdev);
5484
5485 return result;
bc7f75fa
AK		 5486}
5487
5488/**
5489 * e1000_io_resume - called when traffic can start flowing again.
5490 * @pdev: Pointer to PCI device
5491 *
5492 * This callback is called when the error recovery driver tells us that
5493 * its OK to resume normal operation. Implementation resembles the
5494 * second-half of the e1000_resume routine.
5495 */
5496static void e1000_io_resume(struct pci_dev *pdev)
5497{
5498 struct net_device *netdev = pci_get_drvdata(pdev);
5499 struct e1000_adapter *adapter = netdev_priv(netdev);
5500
cd791618 5501 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5502
5503 if (netif_running(netdev)) {
5504 if (e1000e_up(adapter)) {
5505 dev_err(&pdev->dev,
5506 "can't bring device back up after reset\n");
5507 return;
5508 }
5509 }
5510
5511 netif_device_attach(netdev);
5512
ad68076e
BA		 5513 /*
5514 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5515 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5516 * under the control of the driver.
5517 */
c43bc57e 5518 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5519 e1000_get_hw_control(adapter);
5520
5521}
5522
5523static void e1000_print_device_info(struct e1000_adapter *adapter)
5524{
5525 struct e1000_hw *hw = &adapter->hw;
5526 struct net_device *netdev = adapter->netdev;
69e3fd8c 5527 u32 pba_num;
bc7f75fa
AK		 5528
5529 /* print bus type/speed/width info */
7c510e4b 5530 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5531 /* bus width */
5532 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5533 "Width x1"),
5534 /* MAC address */
7c510e4b 5535 netdev->dev_addr);
44defeb3
JK		 5536 e_info("Intel(R) PRO/%s Network Connection\n",
5537 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 5538 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 5539 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5540 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 5541}
5542
10aa4c04
AK		 5543static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5544{
5545 struct e1000_hw *hw = &adapter->hw;
5546 int ret_val;
5547 u16 buf = 0;
5548
5549 if (hw->mac.type != e1000_82573)
5550 return;
5551
5552 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5553 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5554 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5555 dev_warn(&adapter->pdev->dev,
5556 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5557 }
10aa4c04
AK		 5558}
5559
651c2466
SH		 5560static const struct net_device_ops e1000e_netdev_ops = {
5561 .ndo_open = e1000_open,
5562 .ndo_stop = e1000_close,
00829823 5563 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 5564 .ndo_get_stats = e1000_get_stats,
5565 .ndo_set_multicast_list = e1000_set_multi,
5566 .ndo_set_mac_address = e1000_set_mac,
5567 .ndo_change_mtu = e1000_change_mtu,
5568 .ndo_do_ioctl = e1000_ioctl,
5569 .ndo_tx_timeout = e1000_tx_timeout,
5570 .ndo_validate_addr = eth_validate_addr,
5571
5572 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5573 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5574 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5575#ifdef CONFIG_NET_POLL_CONTROLLER
5576 .ndo_poll_controller = e1000_netpoll,
5577#endif
5578};
5579
bc7f75fa
AK		 5580/**
5581 * e1000_probe - Device Initialization Routine
5582 * @pdev: PCI device information struct
5583 * @ent: entry in e1000_pci_tbl
5584 *
5585 * Returns 0 on success, negative on failure
5586 *
5587 * e1000_probe initializes an adapter identified by a pci_dev structure.
5588 * The OS initialization, configuring of the adapter private structure,
5589 * and a hardware reset occur.
5590 **/
5591static int __devinit e1000_probe(struct pci_dev *pdev,
5592 const struct pci_device_id *ent)
5593{
5594 struct net_device *netdev;
5595 struct e1000_adapter *adapter;
5596 struct e1000_hw *hw;
5597 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5598 resource_size_t mmio_start, mmio_len;
5599 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5600
5601 static int cards_found;
5602 int i, err, pci_using_dac;
5603 u16 eeprom_data = 0;
5604 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5605
6f461f6c
BA		 5606 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5607 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5608
f0f422e5 5609 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5610 if (err)
5611 return err;
5612
5613 pci_using_dac = 0;
0be3f55f 5614 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5615 if (!err) {
0be3f55f 5616 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5617 if (!err)
5618 pci_using_dac = 1;
5619 } else {
0be3f55f 5620 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5621 if (err) {
0be3f55f
NN		 5622 err = dma_set_coherent_mask(&pdev->dev,
5623 DMA_BIT_MASK(32));
bc7f75fa
AK		 5624 if (err) {
5625 dev_err(&pdev->dev, "No usable DMA "
5626 "configuration, aborting\n");
5627 goto err_dma;
5628 }
5629 }
5630 }
5631
e8de1481 5632 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5633 pci_select_bars(pdev, IORESOURCE_MEM),
5634 e1000e_driver_name);
bc7f75fa
AK		 5635 if (err)
5636 goto err_pci_reg;
5637
68eac460 5638 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5639 pci_enable_pcie_error_reporting(pdev);
68eac460 5640
bc7f75fa 5641 pci_set_master(pdev);
438b365a
BA		 5642 /* PCI config space info */
5643 err = pci_save_state(pdev);
5644 if (err)
5645 goto err_alloc_etherdev;
bc7f75fa
AK		 5646
5647 err = -ENOMEM;
5648 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5649 if (!netdev)
5650 goto err_alloc_etherdev;
5651
bc7f75fa
AK		 5652 SET_NETDEV_DEV(netdev, &pdev->dev);
5653
f85e4dfa
TH		 5654 netdev->irq = pdev->irq;
5655
bc7f75fa
AK		 5656 pci_set_drvdata(pdev, netdev);
5657 adapter = netdev_priv(netdev);
5658 hw = &adapter->hw;
5659 adapter->netdev = netdev;
5660 adapter->pdev = pdev;
5661 adapter->ei = ei;
5662 adapter->pba = ei->pba;
5663 adapter->flags = ei->flags;
eb7c3adb 5664 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5665 adapter->hw.adapter = adapter;
5666 adapter->hw.mac.type = ei->mac;
2adc55c9 5667 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5668 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5669
5670 mmio_start = pci_resource_start(pdev, 0);
5671 mmio_len = pci_resource_len(pdev, 0);
5672
5673 err = -EIO;
5674 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5675 if (!adapter->hw.hw_addr)
5676 goto err_ioremap;
5677
5678 if ((adapter->flags & FLAG_HAS_FLASH) &&
5679 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5680 flash_start = pci_resource_start(pdev, 1);
5681 flash_len = pci_resource_len(pdev, 1);
5682 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5683 if (!adapter->hw.flash_address)
5684 goto err_flashmap;
5685 }
5686
5687 /* construct the net_device struct */
651c2466 5688 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5689 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5690 netdev->watchdog_timeo = 5 * HZ;
5691 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5692 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5693
5694 netdev->mem_start = mmio_start;
5695 netdev->mem_end = mmio_start + mmio_len;
5696
5697 adapter->bd_number = cards_found++;
5698
4662e82b
BA		 5699 e1000e_check_options(adapter);
5700
bc7f75fa
AK		 5701 /* setup adapter struct */
5702 err = e1000_sw_init(adapter);
5703 if (err)
5704 goto err_sw_init;
5705
bc7f75fa
AK		 5706 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5707 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5708 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5709
69e3fd8c 5710 err = ei->get_variants(adapter);
bc7f75fa
AK		 5711 if (err)
5712 goto err_hw_init;
5713
4a770358
BA		 5714 if ((adapter->flags & FLAG_IS_ICH) &&
5715 (adapter->flags & FLAG_READ_ONLY_NVM))
5716 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5717
bc7f75fa
AK		 5718 hw->mac.ops.get_bus_info(&adapter->hw);
5719
318a94d6 5720 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5721
5722 /* Copper options */
318a94d6 5723 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5724 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5725 adapter->hw.phy.disable_polarity_correction = 0;
5726 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5727 }
5728
5729 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5730 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5731
5732 netdev->features = NETIF_F_SG |
5733 NETIF_F_HW_CSUM |
5734 NETIF_F_HW_VLAN_TX |
5735 NETIF_F_HW_VLAN_RX;
5736
5737 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5738 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5739
5740 netdev->features |= NETIF_F_TSO;
5741 netdev->features |= NETIF_F_TSO6;
5742
a5136e23
JK		 5743 netdev->vlan_features |= NETIF_F_TSO;
5744 netdev->vlan_features |= NETIF_F_TSO6;
5745 netdev->vlan_features |= NETIF_F_HW_CSUM;
5746 netdev->vlan_features |= NETIF_F_SG;
5747
7b872a55 5748 if (pci_using_dac) {
bc7f75fa 5749 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 5750 netdev->vlan_features |= NETIF_F_HIGHDMA;
5751 }
bc7f75fa 5752
bc7f75fa
AK		 5753 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5754 adapter->flags |= FLAG_MNG_PT_ENABLED;
5755
ad68076e
BA		 5756 /*
5757 * before reading the NVM, reset the controller to
5758 * put the device in a known good starting state
5759 */
bc7f75fa
AK		 5760 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5761
5762 /*
5763 * systems with ASPM and others may see the checksum fail on the first
5764 * attempt. Let's give it a few tries
5765 */
5766 for (i = 0;; i++) {
5767 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5768 break;
5769 if (i == 2) {
44defeb3 5770 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5771 err = -EIO;
5772 goto err_eeprom;
5773 }
5774 }
5775
10aa4c04
AK		 5776 e1000_eeprom_checks(adapter);
5777
608f8a0d 5778 /* copy the MAC address */
bc7f75fa 5779 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5780 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5781
5782 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5783 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5784
5785 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5786 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5787 err = -EIO;
5788 goto err_eeprom;
5789 }
5790
5791 init_timer(&adapter->watchdog_timer);
c061b18d 5792 adapter->watchdog_timer.function = e1000_watchdog;
bc7f75fa
AK		 5793 adapter->watchdog_timer.data = (unsigned long) adapter;
5794
5795 init_timer(&adapter->phy_info_timer);
c061b18d 5796 adapter->phy_info_timer.function = e1000_update_phy_info;
bc7f75fa
AK		 5797 adapter->phy_info_timer.data = (unsigned long) adapter;
5798
5799 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5800 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5801 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5802 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5803 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5804
bc7f75fa
AK		 5805 /* Initialize link parameters. User can change them with ethtool */
5806 adapter->hw.mac.autoneg = 1;
309af40b 5807 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5808 adapter->hw.fc.requested_mode = e1000_fc_default;
5809 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5810 adapter->hw.phy.autoneg_advertised = 0x2f;
5811
5812 /* ring size defaults */
5813 adapter->rx_ring->count = 256;
5814 adapter->tx_ring->count = 256;
5815
5816 /*
5817 * Initial Wake on LAN setting - If APM wake is enabled in
5818 * the EEPROM, enable the ACPI Magic Packet filter
5819 */
5820 if (adapter->flags & FLAG_APME_IN_WUC) {
5821 /* APME bit in EEPROM is mapped to WUC.APME */
5822 eeprom_data = er32(WUC);
5823 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5824 if (eeprom_data & E1000_WUC_PHY_WAKE)
5825 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5826 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5827 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5828 (adapter->hw.bus.func == 1))
5829 e1000_read_nvm(&adapter->hw,
5830 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5831 else
5832 e1000_read_nvm(&adapter->hw,
5833 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5834 }
5835
5836 /* fetch WoL from EEPROM */
5837 if (eeprom_data & eeprom_apme_mask)
5838 adapter->eeprom_wol |= E1000_WUFC_MAG;
5839
5840 /*
5841 * now that we have the eeprom settings, apply the special cases
5842 * where the eeprom may be wrong or the board simply won't support
5843 * wake on lan on a particular port
5844 */
5845 if (!(adapter->flags & FLAG_HAS_WOL))
5846 adapter->eeprom_wol = 0;
5847
5848 /* initialize the wol settings based on the eeprom settings */
5849 adapter->wol = adapter->eeprom_wol;
6ff68026 5850 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5851
84527590
BA		 5852 /* save off EEPROM version number */
5853 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5854
bc7f75fa
AK		 5855 /* reset the hardware with the new settings */
5856 e1000e_reset(adapter);
5857
ad68076e
BA		 5858 /*
5859 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5860 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5861 * under the control of the driver.
5862 */
c43bc57e 5863 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5864 e1000_get_hw_control(adapter);
5865
bc7f75fa
AK		 5866 strcpy(netdev->name, "eth%d");
5867 err = register_netdev(netdev);
5868 if (err)
5869 goto err_register;
5870
9c563d20
JB		 5871 /* carrier off reporting is important to ethtool even BEFORE open */
5872 netif_carrier_off(netdev);
5873
bc7f75fa
AK		 5874 e1000_print_device_info(adapter);
5875
f3ec4f87
AS		 5876 if (pci_dev_run_wake(pdev))
5877 pm_runtime_put_noidle(&pdev->dev);
23606cf5 5878
bc7f75fa
AK		 5879 return 0;
5880
5881err_register:
c43bc57e
JB		 5882 if (!(adapter->flags & FLAG_HAS_AMT))
5883 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5884err_eeprom:
5885 if (!e1000_check_reset_block(&adapter->hw))
5886 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5887err_hw_init:
bc7f75fa 5888
bc7f75fa
AK		 5889 kfree(adapter->tx_ring);
5890 kfree(adapter->rx_ring);
5891err_sw_init:
c43bc57e
JB		 5892 if (adapter->hw.flash_address)
5893 iounmap(adapter->hw.flash_address);
e82f54ba 5894 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5895err_flashmap:
bc7f75fa
AK		 5896 iounmap(adapter->hw.hw_addr);
5897err_ioremap:
5898 free_netdev(netdev);
5899err_alloc_etherdev:
f0f422e5
BA		 5900 pci_release_selected_regions(pdev,
5901 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5902err_pci_reg:
5903err_dma:
5904 pci_disable_device(pdev);
5905 return err;
5906}
5907
5908/**
5909 * e1000_remove - Device Removal Routine
5910 * @pdev: PCI device information struct
5911 *
5912 * e1000_remove is called by the PCI subsystem to alert the driver
5913 * that it should release a PCI device. The could be caused by a
5914 * Hot-Plug event, or because the driver is going to be removed from
5915 * memory.
5916 **/
5917static void __devexit e1000_remove(struct pci_dev *pdev)
5918{
5919 struct net_device *netdev = pci_get_drvdata(pdev);
5920 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 5921 bool down = test_bit(__E1000_DOWN, &adapter->state);
5922
ad68076e
BA		 5923 /*
5924 * flush_scheduled work may reschedule our watchdog task, so
5925 * explicitly disable watchdog tasks from being rescheduled
5926 */
23606cf5
RW		 5927 if (!down)
5928 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 5929 del_timer_sync(&adapter->watchdog_timer);
5930 del_timer_sync(&adapter->phy_info_timer);
5931
41cec6f1
BA		 5932 cancel_work_sync(&adapter->reset_task);
5933 cancel_work_sync(&adapter->watchdog_task);
5934 cancel_work_sync(&adapter->downshift_task);
5935 cancel_work_sync(&adapter->update_phy_task);
5936 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5937 flush_scheduled_work();
5938
17f208de
BA		 5939 if (!(netdev->flags & IFF_UP))
5940 e1000_power_down_phy(adapter);
5941
23606cf5
RW		 5942 /* Don't lie to e1000_close() down the road. */
5943 if (!down)
5944 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 5945 unregister_netdev(netdev);
5946
f3ec4f87
AS		 5947 if (pci_dev_run_wake(pdev))
5948 pm_runtime_get_noresume(&pdev->dev);
23606cf5 5949
ad68076e
BA		 5950 /*
5951 * Release control of h/w to f/w. If f/w is AMT enabled, this
5952 * would have already happened in close and is redundant.
5953 */
bc7f75fa
AK		 5954 e1000_release_hw_control(adapter);
5955
4662e82b 5956 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5957 kfree(adapter->tx_ring);
5958 kfree(adapter->rx_ring);
5959
5960 iounmap(adapter->hw.hw_addr);
5961 if (adapter->hw.flash_address)
5962 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5963 pci_release_selected_regions(pdev,
5964 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5965
5966 free_netdev(netdev);
5967
111b9dc5 5968 /* AER disable */
19d5afd4 5969 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5970
bc7f75fa
AK		 5971 pci_disable_device(pdev);
5972}
5973
5974/* PCI Error Recovery (ERS) */
5975static struct pci_error_handlers e1000_err_handler = {
5976 .error_detected = e1000_io_error_detected,
5977 .slot_reset = e1000_io_slot_reset,
5978 .resume = e1000_io_resume,
5979};
5980
a3aa1884 5981static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 5982 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5983 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5984 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5985 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5986 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5987 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5988 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5989 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5990 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5991
bc7f75fa
AK		 5992 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5993 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5994 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5995 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5996
bc7f75fa
AK		 5997 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5998 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5999 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 6000
4662e82b 6001 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 6002 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 6003 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 6004
bc7f75fa
AK		 6005 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6006 board_80003es2lan },
6007 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6008 board_80003es2lan },
6009 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6010 board_80003es2lan },
6011 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6012 board_80003es2lan },
ad68076e 6013
bc7f75fa
AK		 6014 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6015 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6016 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6017 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6018 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6019 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6020 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 6021 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 6022
bc7f75fa
AK		 6023 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6024 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6025 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6026 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6027 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 6028 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 6029 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6030 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6031 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6032
6033 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6034 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6035 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 6036
f4187b56
BA		 6037 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6038 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 6039 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 6040
a4f58f54
BA		 6041 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6042 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6043 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6044 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6045
d3738bb8
BA		 6046 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6047 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6048
bc7f75fa
AK		 6049 { } /* terminate list */
6050};
6051MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6052
a0340162 6053#ifdef CONFIG_PM_OPS
23606cf5 6054static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6055 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6056 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6057 e1000_runtime_resume, e1000_idle)
23606cf5 6058};
e50208a0 6059#endif
23606cf5 6060
bc7f75fa
AK		 6061/* PCI Device API Driver */
6062static struct pci_driver e1000_driver = {
6063 .name = e1000e_driver_name,
6064 .id_table = e1000_pci_tbl,
6065 .probe = e1000_probe,
6066 .remove = __devexit_p(e1000_remove),
a0340162 6067#ifdef CONFIG_PM_OPS
23606cf5 6068 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6069#endif
6070 .shutdown = e1000_shutdown,
6071 .err_handler = &e1000_err_handler
6072};
6073
6074/**
6075 * e1000_init_module - Driver Registration Routine
6076 *
6077 * e1000_init_module is the first routine called when the driver is
6078 * loaded. All it does is register with the PCI subsystem.
6079 **/
6080static int __init e1000_init_module(void)
6081{
6082 int ret;
8544b9f7
BA		 6083 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6084 e1000e_driver_version);
451152d9 6085 pr_info("Copyright (c) 1999 - 2010 Intel Corporation.\n");
bc7f75fa 6086 ret = pci_register_driver(&e1000_driver);
53ec5498 6087
bc7f75fa
AK		 6088 return ret;
6089}
6090module_init(e1000_init_module);
6091
6092/**
6093 * e1000_exit_module - Driver Exit Cleanup Routine
6094 *
6095 * e1000_exit_module is called just before the driver is removed
6096 * from memory.
6097 **/
6098static void __exit e1000_exit_module(void)
6099{
6100 pci_unregister_driver(&e1000_driver);
6101}
6102module_exit(e1000_exit_module);
6103
6104
6105MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6106MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6107MODULE_LICENSE("GPL");
6108MODULE_VERSION(DRV_VERSION);
6109
6110/* e1000_main.c */
Clone of davem's net-next-2.6 tree