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[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
451152d9 4 Copyright(c) 1999 - 2010 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK		 42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK		 52
53#include "e1000.h"
54
c14c643b
BA		 55#define DRV_EXTRAVERSION "-k2"
56
57#define DRV_VERSION "1.2.7" DRV_EXTRAVERSION
bc7f75fa
AK		 58char e1000e_driver_name[] = "e1000e";
59const char e1000e_driver_version[] = DRV_VERSION;
60
61static const struct e1000_info *e1000_info_tbl[] = {
62 [board_82571] = &e1000_82571_info,
63 [board_82572] = &e1000_82572_info,
64 [board_82573] = &e1000_82573_info,
4662e82b 65 [board_82574] = &e1000_82574_info,
8c81c9c3 66 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 67 [board_80003es2lan] = &e1000_es2_info,
68 [board_ich8lan] = &e1000_ich8_info,
69 [board_ich9lan] = &e1000_ich9_info,
f4187b56 70 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 71 [board_pchlan] = &e1000_pch_info,
d3738bb8 72 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 73};
74
84f4ee90
TI		 75struct e1000_reg_info {
76 u32 ofs;
77 char *name;
78};
79
80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
85
86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
91
92static const struct e1000_reg_info e1000_reg_info_tbl[] = {
93
94 /* General Registers */
95 {E1000_CTRL, "CTRL"},
96 {E1000_STATUS, "STATUS"},
97 {E1000_CTRL_EXT, "CTRL_EXT"},
98
99 /* Interrupt Registers */
100 {E1000_ICR, "ICR"},
101
102 /* RX Registers */
103 {E1000_RCTL, "RCTL"},
104 {E1000_RDLEN, "RDLEN"},
105 {E1000_RDH, "RDH"},
106 {E1000_RDT, "RDT"},
107 {E1000_RDTR, "RDTR"},
108 {E1000_RXDCTL(0), "RXDCTL"},
109 {E1000_ERT, "ERT"},
110 {E1000_RDBAL, "RDBAL"},
111 {E1000_RDBAH, "RDBAH"},
112 {E1000_RDFH, "RDFH"},
113 {E1000_RDFT, "RDFT"},
114 {E1000_RDFHS, "RDFHS"},
115 {E1000_RDFTS, "RDFTS"},
116 {E1000_RDFPC, "RDFPC"},
117
118 /* TX Registers */
119 {E1000_TCTL, "TCTL"},
120 {E1000_TDBAL, "TDBAL"},
121 {E1000_TDBAH, "TDBAH"},
122 {E1000_TDLEN, "TDLEN"},
123 {E1000_TDH, "TDH"},
124 {E1000_TDT, "TDT"},
125 {E1000_TIDV, "TIDV"},
126 {E1000_TXDCTL(0), "TXDCTL"},
127 {E1000_TADV, "TADV"},
128 {E1000_TARC(0), "TARC"},
129 {E1000_TDFH, "TDFH"},
130 {E1000_TDFT, "TDFT"},
131 {E1000_TDFHS, "TDFHS"},
132 {E1000_TDFTS, "TDFTS"},
133 {E1000_TDFPC, "TDFPC"},
134
135 /* List Terminator */
136 {}
137};
138
139/*
140 * e1000_regdump - register printout routine
141 */
142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
143{
144 int n = 0;
145 char rname[16];
146 u32 regs[8];
147
148 switch (reginfo->ofs) {
149 case E1000_RXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_RXDCTL(n));
152 break;
153 case E1000_TXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TXDCTL(n));
156 break;
157 case E1000_TARC(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TARC(n));
160 break;
161 default:
162 printk(KERN_INFO "%-15s %08x\n",
163 reginfo->name, __er32(hw, reginfo->ofs));
164 return;
165 }
166
167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
168 printk(KERN_INFO "%-15s ", rname);
169 for (n = 0; n < 2; n++)
170 printk(KERN_CONT "%08x ", regs[n]);
171 printk(KERN_CONT "\n");
172}
173
174
175/*
176 * e1000e_dump - Print registers, tx-ring and rx-ring
177 */
178static void e1000e_dump(struct e1000_adapter *adapter)
179{
180 struct net_device *netdev = adapter->netdev;
181 struct e1000_hw *hw = &adapter->hw;
182 struct e1000_reg_info *reginfo;
183 struct e1000_ring *tx_ring = adapter->tx_ring;
184 struct e1000_tx_desc *tx_desc;
185 struct my_u0 { u64 a; u64 b; } *u0;
186 struct e1000_buffer *buffer_info;
187 struct e1000_ring *rx_ring = adapter->rx_ring;
188 union e1000_rx_desc_packet_split *rx_desc_ps;
189 struct e1000_rx_desc *rx_desc;
190 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
191 u32 staterr;
192 int i = 0;
193
194 if (!netif_msg_hw(adapter))
195 return;
196
197 /* Print netdevice Info */
198 if (netdev) {
199 dev_info(&adapter->pdev->dev, "Net device Info\n");
200 printk(KERN_INFO "Device Name state "
201 "trans_start last_rx\n");
202 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
203 netdev->name,
204 netdev->state,
205 netdev->trans_start,
206 netdev->last_rx);
207 }
208
209 /* Print Registers */
210 dev_info(&adapter->pdev->dev, "Register Dump\n");
211 printk(KERN_INFO " Register Name Value\n");
212 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
213 reginfo->name; reginfo++) {
214 e1000_regdump(hw, reginfo);
215 }
216
217 /* Print TX Ring Summary */
218 if (!netdev || !netif_running(netdev))
219 goto exit;
220
221 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
222 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
223 " leng ntw timestamp\n");
224 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
225 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
226 0, tx_ring->next_to_use, tx_ring->next_to_clean,
8eb64e6b 227 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 228 buffer_info->length,
229 buffer_info->next_to_watch,
8eb64e6b 230 (unsigned long long)buffer_info->time_stamp);
84f4ee90
TI		 231
232 /* Print TX Rings */
233 if (!netif_msg_tx_done(adapter))
234 goto rx_ring_summary;
235
236 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
237
238 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
239 *
240 * Legacy Transmit Descriptor
241 * +--------------------------------------------------------------+
242 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
243 * +--------------------------------------------------------------+
244 * 8 | Special | CSS | Status | CMD | CSO | Length |
245 * +--------------------------------------------------------------+
246 * 63 48 47 36 35 32 31 24 23 16 15 0
247 *
248 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
249 * 63 48 47 40 39 32 31 16 15 8 7 0
250 * +----------------------------------------------------------------+
251 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
252 * +----------------------------------------------------------------+
253 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
254 * +----------------------------------------------------------------+
255 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
256 *
257 * Extended Data Descriptor (DTYP=0x1)
258 * +----------------------------------------------------------------+
259 * 0 | Buffer Address [63:0] |
260 * +----------------------------------------------------------------+
261 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
262 * +----------------------------------------------------------------+
263 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
264 */
265 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Legacy format\n");
268 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Context format\n");
271 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
272 " [bi->dma ] leng ntw timestamp bi->skb "
273 "<-- Ext Data format\n");
274 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
275 tx_desc = E1000_TX_DESC(*tx_ring, i);
276 buffer_info = &tx_ring->buffer_info[i];
277 u0 = (struct my_u0 *)tx_desc;
278 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
279 "%04X %3X %016llX %p",
280 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
281 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
8eb64e6b
BA		 282 (unsigned long long)le64_to_cpu(u0->a),
283 (unsigned long long)le64_to_cpu(u0->b),
284 (unsigned long long)buffer_info->dma,
285 buffer_info->length, buffer_info->next_to_watch,
286 (unsigned long long)buffer_info->time_stamp,
84f4ee90
TI		 287 buffer_info->skb);
288 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
289 printk(KERN_CONT " NTC/U\n");
290 else if (i == tx_ring->next_to_use)
291 printk(KERN_CONT " NTU\n");
292 else if (i == tx_ring->next_to_clean)
293 printk(KERN_CONT " NTC\n");
294 else
295 printk(KERN_CONT "\n");
296
297 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
298 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
299 16, 1, phys_to_virt(buffer_info->dma),
300 buffer_info->length, true);
301 }
302
303 /* Print RX Rings Summary */
304rx_ring_summary:
305 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
306 printk(KERN_INFO "Queue [NTU] [NTC]\n");
307 printk(KERN_INFO " %5d %5X %5X\n", 0,
308 rx_ring->next_to_use, rx_ring->next_to_clean);
309
310 /* Print RX Rings */
311 if (!netif_msg_rx_status(adapter))
312 goto exit;
313
314 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
315 switch (adapter->rx_ps_pages) {
316 case 1:
317 case 2:
318 case 3:
319 /* [Extended] Packet Split Receive Descriptor Format
320 *
321 * +-----------------------------------------------------+
322 * 0 | Buffer Address 0 [63:0] |
323 * +-----------------------------------------------------+
324 * 8 | Buffer Address 1 [63:0] |
325 * +-----------------------------------------------------+
326 * 16 | Buffer Address 2 [63:0] |
327 * +-----------------------------------------------------+
328 * 24 | Buffer Address 3 [63:0] |
329 * +-----------------------------------------------------+
330 */
331 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
332 "[buffer 1 63:0 ] "
333 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
334 "[bi->skb] <-- Ext Pkt Split format\n");
335 /* [Extended] Receive Descriptor (Write-Back) Format
336 *
337 * 63 48 47 32 31 13 12 8 7 4 3 0
338 * +------------------------------------------------------+
339 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
340 * | Checksum | Ident | | Queue | | Type |
341 * +------------------------------------------------------+
342 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
343 * +------------------------------------------------------+
344 * 63 48 47 32 31 20 19 0
345 */
346 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
347 "[vl l0 ee es] "
348 "[ l3 l2 l1 hs] [reserved ] ---------------- "
349 "[bi->skb] <-- Ext Rx Write-Back format\n");
350 for (i = 0; i < rx_ring->count; i++) {
351 buffer_info = &rx_ring->buffer_info[i];
352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
353 u1 = (struct my_u1 *)rx_desc_ps;
354 staterr =
355 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
356 if (staterr & E1000_RXD_STAT_DD) {
357 /* Descriptor Done */
358 printk(KERN_INFO "RWB[0x%03X] %016llX "
359 "%016llX %016llX %016llX "
360 "---------------- %p", i,
8eb64e6b
BA		 361 (unsigned long long)le64_to_cpu(u1->a),
362 (unsigned long long)le64_to_cpu(u1->b),
363 (unsigned long long)le64_to_cpu(u1->c),
364 (unsigned long long)le64_to_cpu(u1->d),
84f4ee90
TI		 365 buffer_info->skb);
366 } else {
367 printk(KERN_INFO "R [0x%03X] %016llX "
368 "%016llX %016llX %016llX %016llX %p", i,
8eb64e6b
BA		 369 (unsigned long long)le64_to_cpu(u1->a),
370 (unsigned long long)le64_to_cpu(u1->b),
371 (unsigned long long)le64_to_cpu(u1->c),
372 (unsigned long long)le64_to_cpu(u1->d),
373 (unsigned long long)buffer_info->dma,
84f4ee90
TI		 374 buffer_info->skb);
375
376 if (netif_msg_pktdata(adapter))
377 print_hex_dump(KERN_INFO, "",
378 DUMP_PREFIX_ADDRESS, 16, 1,
379 phys_to_virt(buffer_info->dma),
380 adapter->rx_ps_bsize0, true);
381 }
382
383 if (i == rx_ring->next_to_use)
384 printk(KERN_CONT " NTU\n");
385 else if (i == rx_ring->next_to_clean)
386 printk(KERN_CONT " NTC\n");
387 else
388 printk(KERN_CONT "\n");
389 }
390 break;
391 default:
392 case 0:
393 /* Legacy Receive Descriptor Format
394 *
395 * +-----------------------------------------------------+
396 * | Buffer Address [63:0] |
397 * +-----------------------------------------------------+
398 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
399 * +-----------------------------------------------------+
400 * 63 48 47 40 39 32 31 16 15 0
401 */
402 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
403 "[vl er S cks ln] [bi->dma ] [bi->skb] "
404 "<-- Legacy format\n");
405 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
406 rx_desc = E1000_RX_DESC(*rx_ring, i);
407 buffer_info = &rx_ring->buffer_info[i];
408 u0 = (struct my_u0 *)rx_desc;
409 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
8eb64e6b
BA		 410 "%016llX %p", i,
411 (unsigned long long)le64_to_cpu(u0->a),
412 (unsigned long long)le64_to_cpu(u0->b),
413 (unsigned long long)buffer_info->dma,
414 buffer_info->skb);
84f4ee90
TI		 415 if (i == rx_ring->next_to_use)
416 printk(KERN_CONT " NTU\n");
417 else if (i == rx_ring->next_to_clean)
418 printk(KERN_CONT " NTC\n");
419 else
420 printk(KERN_CONT "\n");
421
422 if (netif_msg_pktdata(adapter))
423 print_hex_dump(KERN_INFO, "",
424 DUMP_PREFIX_ADDRESS,
425 16, 1, phys_to_virt(buffer_info->dma),
426 adapter->rx_buffer_len, true);
427 }
428 }
429
430exit:
431 return;
432}
433
bc7f75fa
AK		 434/**
435 * e1000_desc_unused - calculate if we have unused descriptors
436 **/
437static int e1000_desc_unused(struct e1000_ring *ring)
438{
439 if (ring->next_to_clean > ring->next_to_use)
440 return ring->next_to_clean - ring->next_to_use - 1;
441
442 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
443}
444
445/**
ad68076e 446 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 447 * @adapter: board private structure
448 * @status: descriptor status field as written by hardware
449 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
450 * @skb: pointer to sk_buff to be indicated to stack
451 **/
452static void e1000_receive_skb(struct e1000_adapter *adapter,
453 struct net_device *netdev,
454 struct sk_buff *skb,
a39fe742 455 u8 status, __le16 vlan)
bc7f75fa
AK		 456{
457 skb->protocol = eth_type_trans(skb, netdev);
458
459 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 460 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
461 le16_to_cpu(vlan), skb);
bc7f75fa 462 else
89c88b16 463 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 464}
465
466/**
467 * e1000_rx_checksum - Receive Checksum Offload for 82543
468 * @adapter: board private structure
469 * @status_err: receive descriptor status and error fields
470 * @csum: receive descriptor csum field
471 * @sk_buff: socket buffer with received data
472 **/
473static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
474 u32 csum, struct sk_buff *skb)
475{
476 u16 status = (u16)status_err;
477 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 478
479 skb_checksum_none_assert(skb);
bc7f75fa
AK		 480
481 /* Ignore Checksum bit is set */
482 if (status & E1000_RXD_STAT_IXSM)
483 return;
484 /* TCP/UDP checksum error bit is set */
485 if (errors & E1000_RXD_ERR_TCPE) {
486 /* let the stack verify checksum errors */
487 adapter->hw_csum_err++;
488 return;
489 }
490
491 /* TCP/UDP Checksum has not been calculated */
492 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
493 return;
494
495 /* It must be a TCP or UDP packet with a valid checksum */
496 if (status & E1000_RXD_STAT_TCPCS) {
497 /* TCP checksum is good */
498 skb->ip_summed = CHECKSUM_UNNECESSARY;
499 } else {
ad68076e
BA		 500 /*
501 * IP fragment with UDP payload
502 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 503 * and then put the value in host order for further stack use.
504 */
a39fe742
AV		 505 __sum16 sum = (__force __sum16)htons(csum);
506 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 507 skb->ip_summed = CHECKSUM_COMPLETE;
508 }
509 adapter->hw_csum_good++;
510}
511
512/**
513 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
514 * @adapter: address of board private structure
515 **/
516static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
517 int cleaned_count)
518{
519 struct net_device *netdev = adapter->netdev;
520 struct pci_dev *pdev = adapter->pdev;
521 struct e1000_ring *rx_ring = adapter->rx_ring;
522 struct e1000_rx_desc *rx_desc;
523 struct e1000_buffer *buffer_info;
524 struct sk_buff *skb;
525 unsigned int i;
89d71a66 526 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 527
528 i = rx_ring->next_to_use;
529 buffer_info = &rx_ring->buffer_info[i];
530
531 while (cleaned_count--) {
532 skb = buffer_info->skb;
533 if (skb) {
534 skb_trim(skb, 0);
535 goto map_skb;
536 }
537
89d71a66 538 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 539 if (!skb) {
540 /* Better luck next round */
541 adapter->alloc_rx_buff_failed++;
542 break;
543 }
544
bc7f75fa
AK		 545 buffer_info->skb = skb;
546map_skb:
0be3f55f 547 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 548 adapter->rx_buffer_len,
0be3f55f
NN		 549 DMA_FROM_DEVICE);
550 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 551 dev_err(&pdev->dev, "RX DMA map failed\n");
552 adapter->rx_dma_failed++;
553 break;
554 }
555
556 rx_desc = E1000_RX_DESC(*rx_ring, i);
557 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
558
50849d79
TH		 559 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
560 /*
561 * Force memory writes to complete before letting h/w
562 * know there are new descriptors to fetch. (Only
563 * applicable for weak-ordered memory model archs,
564 * such as IA-64).
565 */
566 wmb();
567 writel(i, adapter->hw.hw_addr + rx_ring->tail);
568 }
bc7f75fa
AK		 569 i++;
570 if (i == rx_ring->count)
571 i = 0;
572 buffer_info = &rx_ring->buffer_info[i];
573 }
574
50849d79 575 rx_ring->next_to_use = i;
bc7f75fa
AK		 576}
577
578/**
579 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
580 * @adapter: address of board private structure
581 **/
582static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
583 int cleaned_count)
584{
585 struct net_device *netdev = adapter->netdev;
586 struct pci_dev *pdev = adapter->pdev;
587 union e1000_rx_desc_packet_split *rx_desc;
588 struct e1000_ring *rx_ring = adapter->rx_ring;
589 struct e1000_buffer *buffer_info;
590 struct e1000_ps_page *ps_page;
591 struct sk_buff *skb;
592 unsigned int i, j;
593
594 i = rx_ring->next_to_use;
595 buffer_info = &rx_ring->buffer_info[i];
596
597 while (cleaned_count--) {
598 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
599
600 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 601 ps_page = &buffer_info->ps_pages[j];
602 if (j >= adapter->rx_ps_pages) {
603 /* all unused desc entries get hw null ptr */
a39fe742 604 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 605 continue;
606 }
607 if (!ps_page->page) {
608 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 609 if (!ps_page->page) {
47f44e40
AK		 610 adapter->alloc_rx_buff_failed++;
611 goto no_buffers;
612 }
0be3f55f
NN		 613 ps_page->dma = dma_map_page(&pdev->dev,
614 ps_page->page,
615 0, PAGE_SIZE,
616 DMA_FROM_DEVICE);
617 if (dma_mapping_error(&pdev->dev,
618 ps_page->dma)) {
47f44e40
AK		 619 dev_err(&adapter->pdev->dev,
620 "RX DMA page map failed\n");
621 adapter->rx_dma_failed++;
622 goto no_buffers;
bc7f75fa 623 }
bc7f75fa 624 }
47f44e40
AK		 625 /*
626 * Refresh the desc even if buffer_addrs
627 * didn't change because each write-back
628 * erases this info.
629 */
630 rx_desc->read.buffer_addr[j+1] =
631 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 632 }
633
89d71a66
ED		 634 skb = netdev_alloc_skb_ip_align(netdev,
635 adapter->rx_ps_bsize0);
bc7f75fa
AK		 636
637 if (!skb) {
638 adapter->alloc_rx_buff_failed++;
639 break;
640 }
641
bc7f75fa 642 buffer_info->skb = skb;
0be3f55f 643 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 644 adapter->rx_ps_bsize0,
0be3f55f
NN		 645 DMA_FROM_DEVICE);
646 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK		 647 dev_err(&pdev->dev, "RX DMA map failed\n");
648 adapter->rx_dma_failed++;
649 /* cleanup skb */
650 dev_kfree_skb_any(skb);
651 buffer_info->skb = NULL;
652 break;
653 }
654
655 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
656
50849d79
TH		 657 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
658 /*
659 * Force memory writes to complete before letting h/w
660 * know there are new descriptors to fetch. (Only
661 * applicable for weak-ordered memory model archs,
662 * such as IA-64).
663 */
664 wmb();
665 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
666 }
667
bc7f75fa
AK		 668 i++;
669 if (i == rx_ring->count)
670 i = 0;
671 buffer_info = &rx_ring->buffer_info[i];
672 }
673
674no_buffers:
50849d79 675 rx_ring->next_to_use = i;
bc7f75fa
AK		 676}
677
97ac8cae
BA		 678/**
679 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
680 * @adapter: address of board private structure
97ac8cae
BA		 681 * @cleaned_count: number of buffers to allocate this pass
682 **/
683
684static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
685 int cleaned_count)
686{
687 struct net_device *netdev = adapter->netdev;
688 struct pci_dev *pdev = adapter->pdev;
689 struct e1000_rx_desc *rx_desc;
690 struct e1000_ring *rx_ring = adapter->rx_ring;
691 struct e1000_buffer *buffer_info;
692 struct sk_buff *skb;
693 unsigned int i;
89d71a66 694 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 695
696 i = rx_ring->next_to_use;
697 buffer_info = &rx_ring->buffer_info[i];
698
699 while (cleaned_count--) {
700 skb = buffer_info->skb;
701 if (skb) {
702 skb_trim(skb, 0);
703 goto check_page;
704 }
705
89d71a66 706 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 707 if (unlikely(!skb)) {
708 /* Better luck next round */
709 adapter->alloc_rx_buff_failed++;
710 break;
711 }
712
97ac8cae
BA		 713 buffer_info->skb = skb;
714check_page:
715 /* allocate a new page if necessary */
716 if (!buffer_info->page) {
717 buffer_info->page = alloc_page(GFP_ATOMIC);
718 if (unlikely(!buffer_info->page)) {
719 adapter->alloc_rx_buff_failed++;
720 break;
721 }
722 }
723
724 if (!buffer_info->dma)
0be3f55f 725 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 726 buffer_info->page, 0,
727 PAGE_SIZE,
0be3f55f 728 DMA_FROM_DEVICE);
97ac8cae
BA		 729
730 rx_desc = E1000_RX_DESC(*rx_ring, i);
731 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
732
733 if (unlikely(++i == rx_ring->count))
734 i = 0;
735 buffer_info = &rx_ring->buffer_info[i];
736 }
737
738 if (likely(rx_ring->next_to_use != i)) {
739 rx_ring->next_to_use = i;
740 if (unlikely(i-- == 0))
741 i = (rx_ring->count - 1);
742
743 /* Force memory writes to complete before letting h/w
744 * know there are new descriptors to fetch. (Only
745 * applicable for weak-ordered memory model archs,
746 * such as IA-64). */
747 wmb();
748 writel(i, adapter->hw.hw_addr + rx_ring->tail);
749 }
750}
751
bc7f75fa
AK		 752/**
753 * e1000_clean_rx_irq - Send received data up the network stack; legacy
754 * @adapter: board private structure
755 *
756 * the return value indicates whether actual cleaning was done, there
757 * is no guarantee that everything was cleaned
758 **/
759static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
760 int *work_done, int work_to_do)
761{
762 struct net_device *netdev = adapter->netdev;
763 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 764 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 765 struct e1000_ring *rx_ring = adapter->rx_ring;
766 struct e1000_rx_desc *rx_desc, *next_rxd;
767 struct e1000_buffer *buffer_info, *next_buffer;
768 u32 length;
769 unsigned int i;
770 int cleaned_count = 0;
771 bool cleaned = 0;
772 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
773
774 i = rx_ring->next_to_clean;
775 rx_desc = E1000_RX_DESC(*rx_ring, i);
776 buffer_info = &rx_ring->buffer_info[i];
777
778 while (rx_desc->status & E1000_RXD_STAT_DD) {
779 struct sk_buff *skb;
780 u8 status;
781
782 if (*work_done >= work_to_do)
783 break;
784 (*work_done)++;
2d0bb1c1 785 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 786
787 status = rx_desc->status;
788 skb = buffer_info->skb;
789 buffer_info->skb = NULL;
790
791 prefetch(skb->data - NET_IP_ALIGN);
792
793 i++;
794 if (i == rx_ring->count)
795 i = 0;
796 next_rxd = E1000_RX_DESC(*rx_ring, i);
797 prefetch(next_rxd);
798
799 next_buffer = &rx_ring->buffer_info[i];
800
801 cleaned = 1;
802 cleaned_count++;
0be3f55f 803 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 804 buffer_info->dma,
805 adapter->rx_buffer_len,
0be3f55f 806 DMA_FROM_DEVICE);
bc7f75fa
AK		 807 buffer_info->dma = 0;
808
809 length = le16_to_cpu(rx_desc->length);
810
b94b5028
JB		 811 /*
812 * !EOP means multiple descriptors were used to store a single
813 * packet, if that's the case we need to toss it. In fact, we
814 * need to toss every packet with the EOP bit clear and the
815 * next frame that _does_ have the EOP bit set, as it is by
816 * definition only a frame fragment
817 */
818 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
819 adapter->flags2 |= FLAG2_IS_DISCARDING;
820
821 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 822 /* All receives must fit into a single buffer */
3bb99fe2 823 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 824 /* recycle */
825 buffer_info->skb = skb;
b94b5028
JB		 826 if (status & E1000_RXD_STAT_EOP)
827 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 828 goto next_desc;
829 }
830
831 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
832 /* recycle */
833 buffer_info->skb = skb;
834 goto next_desc;
835 }
836
eb7c3adb
JK		 837 /* adjust length to remove Ethernet CRC */
838 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
839 length -= 4;
840
bc7f75fa
AK		 841 total_rx_bytes += length;
842 total_rx_packets++;
843
ad68076e
BA		 844 /*
845 * code added for copybreak, this should improve
bc7f75fa 846 * performance for small packets with large amounts
ad68076e
BA		 847 * of reassembly being done in the stack
848 */
bc7f75fa
AK		 849 if (length < copybreak) {
850 struct sk_buff *new_skb =
89d71a66 851 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 852 if (new_skb) {
808ff676
BA		 853 skb_copy_to_linear_data_offset(new_skb,
854 -NET_IP_ALIGN,
855 (skb->data -
856 NET_IP_ALIGN),
857 (length +
858 NET_IP_ALIGN));
bc7f75fa
AK		 859 /* save the skb in buffer_info as good */
860 buffer_info->skb = skb;
861 skb = new_skb;
862 }
863 /* else just continue with the old one */
864 }
865 /* end copybreak code */
866 skb_put(skb, length);
867
868 /* Receive Checksum Offload */
869 e1000_rx_checksum(adapter,
870 (u32)(status) |
871 ((u32)(rx_desc->errors) << 24),
872 le16_to_cpu(rx_desc->csum), skb);
873
874 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
875
876next_desc:
877 rx_desc->status = 0;
878
879 /* return some buffers to hardware, one at a time is too slow */
880 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
881 adapter->alloc_rx_buf(adapter, cleaned_count);
882 cleaned_count = 0;
883 }
884
885 /* use prefetched values */
886 rx_desc = next_rxd;
887 buffer_info = next_buffer;
888 }
889 rx_ring->next_to_clean = i;
890
891 cleaned_count = e1000_desc_unused(rx_ring);
892 if (cleaned_count)
893 adapter->alloc_rx_buf(adapter, cleaned_count);
894
bc7f75fa 895 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 896 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 897 netdev->stats.rx_bytes += total_rx_bytes;
898 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 899 return cleaned;
900}
901
bc7f75fa
AK		 902static void e1000_put_txbuf(struct e1000_adapter *adapter,
903 struct e1000_buffer *buffer_info)
904{
03b1320d
AD		 905 if (buffer_info->dma) {
906 if (buffer_info->mapped_as_page)
0be3f55f
NN		 907 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
908 buffer_info->length, DMA_TO_DEVICE);
03b1320d 909 else
0be3f55f
NN		 910 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
911 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 912 buffer_info->dma = 0;
913 }
bc7f75fa
AK		 914 if (buffer_info->skb) {
915 dev_kfree_skb_any(buffer_info->skb);
916 buffer_info->skb = NULL;
917 }
1b7719c4 918 buffer_info->time_stamp = 0;
bc7f75fa
AK		 919}
920
41cec6f1 921static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 922{
41cec6f1
BA		 923 struct e1000_adapter *adapter = container_of(work,
924 struct e1000_adapter,
925 print_hang_task);
bc7f75fa
AK		 926 struct e1000_ring *tx_ring = adapter->tx_ring;
927 unsigned int i = tx_ring->next_to_clean;
928 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
929 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 930 struct e1000_hw *hw = &adapter->hw;
931 u16 phy_status, phy_1000t_status, phy_ext_status;
932 u16 pci_status;
933
934 e1e_rphy(hw, PHY_STATUS, &phy_status);
935 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
936 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 937
41cec6f1
BA		 938 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
939
940 /* detected Hardware unit hang */
941 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 942 " TDH <%x>\n"
943 " TDT <%x>\n"
944 " next_to_use <%x>\n"
945 " next_to_clean <%x>\n"
946 "buffer_info[next_to_clean]:\n"
947 " time_stamp <%lx>\n"
948 " next_to_watch <%x>\n"
949 " jiffies <%lx>\n"
41cec6f1
BA		 950 " next_to_watch.status <%x>\n"
951 "MAC Status <%x>\n"
952 "PHY Status <%x>\n"
953 "PHY 1000BASE-T Status <%x>\n"
954 "PHY Extended Status <%x>\n"
955 "PCI Status <%x>\n",
44defeb3
JK		 956 readl(adapter->hw.hw_addr + tx_ring->head),
957 readl(adapter->hw.hw_addr + tx_ring->tail),
958 tx_ring->next_to_use,
959 tx_ring->next_to_clean,
960 tx_ring->buffer_info[eop].time_stamp,
961 eop,
962 jiffies,
41cec6f1
BA		 963 eop_desc->upper.fields.status,
964 er32(STATUS),
965 phy_status,
966 phy_1000t_status,
967 phy_ext_status,
968 pci_status);
bc7f75fa
AK		 969}
970
971/**
972 * e1000_clean_tx_irq - Reclaim resources after transmit completes
973 * @adapter: board private structure
974 *
975 * the return value indicates whether actual cleaning was done, there
976 * is no guarantee that everything was cleaned
977 **/
978static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
979{
980 struct net_device *netdev = adapter->netdev;
981 struct e1000_hw *hw = &adapter->hw;
982 struct e1000_ring *tx_ring = adapter->tx_ring;
983 struct e1000_tx_desc *tx_desc, *eop_desc;
984 struct e1000_buffer *buffer_info;
985 unsigned int i, eop;
986 unsigned int count = 0;
bc7f75fa
AK		 987 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
988
989 i = tx_ring->next_to_clean;
990 eop = tx_ring->buffer_info[i].next_to_watch;
991 eop_desc = E1000_TX_DESC(*tx_ring, eop);
992
12d04a3c
AD		 993 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
994 (count < tx_ring->count)) {
a86043c2 995 bool cleaned = false;
2d0bb1c1 996 rmb(); /* read buffer_info after eop_desc */
a86043c2 997 for (; !cleaned; count++) {
bc7f75fa
AK		 998 tx_desc = E1000_TX_DESC(*tx_ring, i);
999 buffer_info = &tx_ring->buffer_info[i];
1000 cleaned = (i == eop);
1001
1002 if (cleaned) {
9ed318d5
TH		 1003 total_tx_packets += buffer_info->segs;
1004 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK		 1005 }
1006
1007 e1000_put_txbuf(adapter, buffer_info);
1008 tx_desc->upper.data = 0;
1009
1010 i++;
1011 if (i == tx_ring->count)
1012 i = 0;
1013 }
1014
dac87619
TL		 1015 if (i == tx_ring->next_to_use)
1016 break;
bc7f75fa
AK		 1017 eop = tx_ring->buffer_info[i].next_to_watch;
1018 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1019 }
1020
1021 tx_ring->next_to_clean = i;
1022
1023#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1024 if (count && netif_carrier_ok(netdev) &&
1025 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1026 /* Make sure that anybody stopping the queue after this
1027 * sees the new next_to_clean.
1028 */
1029 smp_mb();
1030
1031 if (netif_queue_stopped(netdev) &&
1032 !(test_bit(__E1000_DOWN, &adapter->state))) {
1033 netif_wake_queue(netdev);
1034 ++adapter->restart_queue;
1035 }
1036 }
1037
1038 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1039 /*
1040 * Detect a transmit hang in hardware, this serializes the
1041 * check with the clearing of time_stamp and movement of i
1042 */
bc7f75fa 1043 adapter->detect_tx_hung = 0;
12d04a3c
AD		 1044 if (tx_ring->buffer_info[i].time_stamp &&
1045 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 1046 + (adapter->tx_timeout_factor * HZ)) &&
1047 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1048 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 1049 netif_stop_queue(netdev);
1050 }
1051 }
1052 adapter->total_tx_bytes += total_tx_bytes;
1053 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 1054 netdev->stats.tx_bytes += total_tx_bytes;
1055 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 1056 return (count < tx_ring->count);
bc7f75fa
AK		 1057}
1058
bc7f75fa
AK		 1059/**
1060 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1061 * @adapter: board private structure
1062 *
1063 * the return value indicates whether actual cleaning was done, there
1064 * is no guarantee that everything was cleaned
1065 **/
1066static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1067 int *work_done, int work_to_do)
1068{
3bb99fe2 1069 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1070 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1071 struct net_device *netdev = adapter->netdev;
1072 struct pci_dev *pdev = adapter->pdev;
1073 struct e1000_ring *rx_ring = adapter->rx_ring;
1074 struct e1000_buffer *buffer_info, *next_buffer;
1075 struct e1000_ps_page *ps_page;
1076 struct sk_buff *skb;
1077 unsigned int i, j;
1078 u32 length, staterr;
1079 int cleaned_count = 0;
1080 bool cleaned = 0;
1081 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1082
1083 i = rx_ring->next_to_clean;
1084 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1085 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1086 buffer_info = &rx_ring->buffer_info[i];
1087
1088 while (staterr & E1000_RXD_STAT_DD) {
1089 if (*work_done >= work_to_do)
1090 break;
1091 (*work_done)++;
1092 skb = buffer_info->skb;
2d0bb1c1 1093 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 1094
1095 /* in the packet split case this is header only */
1096 prefetch(skb->data - NET_IP_ALIGN);
1097
1098 i++;
1099 if (i == rx_ring->count)
1100 i = 0;
1101 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1102 prefetch(next_rxd);
1103
1104 next_buffer = &rx_ring->buffer_info[i];
1105
1106 cleaned = 1;
1107 cleaned_count++;
0be3f55f 1108 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1109 adapter->rx_ps_bsize0,
0be3f55f 1110 DMA_FROM_DEVICE);
bc7f75fa
AK		 1111 buffer_info->dma = 0;
1112
b94b5028
JB		 1113 /* see !EOP comment in other rx routine */
1114 if (!(staterr & E1000_RXD_STAT_EOP))
1115 adapter->flags2 |= FLAG2_IS_DISCARDING;
1116
1117 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 1118 e_dbg("Packet Split buffers didn't pick up the full "
1119 "packet\n");
bc7f75fa 1120 dev_kfree_skb_irq(skb);
b94b5028
JB		 1121 if (staterr & E1000_RXD_STAT_EOP)
1122 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1123 goto next_desc;
1124 }
1125
1126 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1127 dev_kfree_skb_irq(skb);
1128 goto next_desc;
1129 }
1130
1131 length = le16_to_cpu(rx_desc->wb.middle.length0);
1132
1133 if (!length) {
3bb99fe2
BA		 1134 e_dbg("Last part of the packet spanning multiple "
1135 "descriptors\n");
bc7f75fa
AK		 1136 dev_kfree_skb_irq(skb);
1137 goto next_desc;
1138 }
1139
1140 /* Good Receive */
1141 skb_put(skb, length);
1142
1143 {
ad68076e
BA		 1144 /*
1145 * this looks ugly, but it seems compiler issues make it
1146 * more efficient than reusing j
1147 */
bc7f75fa
AK		 1148 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1149
ad68076e
BA		 1150 /*
1151 * page alloc/put takes too long and effects small packet
1152 * throughput, so unsplit small packets and save the alloc/put
1153 * only valid in softirq (napi) context to call kmap_*
1154 */
bc7f75fa
AK		 1155 if (l1 && (l1 <= copybreak) &&
1156 ((length + l1) <= adapter->rx_ps_bsize0)) {
1157 u8 *vaddr;
1158
47f44e40 1159 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1160
ad68076e
BA		 1161 /*
1162 * there is no documentation about how to call
bc7f75fa 1163 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 1164 * very long
1165 */
0be3f55f
NN		 1166 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1167 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK		 1168 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1169 memcpy(skb_tail_pointer(skb), vaddr, l1);
1170 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN		 1171 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1172 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1173
eb7c3adb
JK		 1174 /* remove the CRC */
1175 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1176 l1 -= 4;
1177
bc7f75fa
AK		 1178 skb_put(skb, l1);
1179 goto copydone;
1180 } /* if */
1181 }
1182
1183 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1184 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1185 if (!length)
1186 break;
1187
47f44e40 1188 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1189 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1190 DMA_FROM_DEVICE);
bc7f75fa
AK		 1191 ps_page->dma = 0;
1192 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1193 ps_page->page = NULL;
1194 skb->len += length;
1195 skb->data_len += length;
1196 skb->truesize += length;
1197 }
1198
eb7c3adb
JK		 1199 /* strip the ethernet crc, problem is we're using pages now so
1200 * this whole operation can get a little cpu intensive
1201 */
1202 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1203 pskb_trim(skb, skb->len - 4);
1204
bc7f75fa
AK		 1205copydone:
1206 total_rx_bytes += skb->len;
1207 total_rx_packets++;
1208
1209 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1210 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1211
1212 if (rx_desc->wb.upper.header_status &
1213 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1214 adapter->rx_hdr_split++;
1215
1216 e1000_receive_skb(adapter, netdev, skb,
1217 staterr, rx_desc->wb.middle.vlan);
1218
1219next_desc:
1220 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1221 buffer_info->skb = NULL;
1222
1223 /* return some buffers to hardware, one at a time is too slow */
1224 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1225 adapter->alloc_rx_buf(adapter, cleaned_count);
1226 cleaned_count = 0;
1227 }
1228
1229 /* use prefetched values */
1230 rx_desc = next_rxd;
1231 buffer_info = next_buffer;
1232
1233 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1234 }
1235 rx_ring->next_to_clean = i;
1236
1237 cleaned_count = e1000_desc_unused(rx_ring);
1238 if (cleaned_count)
1239 adapter->alloc_rx_buf(adapter, cleaned_count);
1240
bc7f75fa 1241 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1242 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1243 netdev->stats.rx_bytes += total_rx_bytes;
1244 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 1245 return cleaned;
1246}
1247
97ac8cae
BA		 1248/**
1249 * e1000_consume_page - helper function
1250 **/
1251static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1252 u16 length)
1253{
1254 bi->page = NULL;
1255 skb->len += length;
1256 skb->data_len += length;
1257 skb->truesize += length;
1258}
1259
1260/**
1261 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1262 * @adapter: board private structure
1263 *
1264 * the return value indicates whether actual cleaning was done, there
1265 * is no guarantee that everything was cleaned
1266 **/
1267
1268static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1269 int *work_done, int work_to_do)
1270{
1271 struct net_device *netdev = adapter->netdev;
1272 struct pci_dev *pdev = adapter->pdev;
1273 struct e1000_ring *rx_ring = adapter->rx_ring;
1274 struct e1000_rx_desc *rx_desc, *next_rxd;
1275 struct e1000_buffer *buffer_info, *next_buffer;
1276 u32 length;
1277 unsigned int i;
1278 int cleaned_count = 0;
1279 bool cleaned = false;
1280 unsigned int total_rx_bytes=0, total_rx_packets=0;
1281
1282 i = rx_ring->next_to_clean;
1283 rx_desc = E1000_RX_DESC(*rx_ring, i);
1284 buffer_info = &rx_ring->buffer_info[i];
1285
1286 while (rx_desc->status & E1000_RXD_STAT_DD) {
1287 struct sk_buff *skb;
1288 u8 status;
1289
1290 if (*work_done >= work_to_do)
1291 break;
1292 (*work_done)++;
2d0bb1c1 1293 rmb(); /* read descriptor and rx_buffer_info after status DD */
97ac8cae
BA		 1294
1295 status = rx_desc->status;
1296 skb = buffer_info->skb;
1297 buffer_info->skb = NULL;
1298
1299 ++i;
1300 if (i == rx_ring->count)
1301 i = 0;
1302 next_rxd = E1000_RX_DESC(*rx_ring, i);
1303 prefetch(next_rxd);
1304
1305 next_buffer = &rx_ring->buffer_info[i];
1306
1307 cleaned = true;
1308 cleaned_count++;
0be3f55f
NN		 1309 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1310 DMA_FROM_DEVICE);
97ac8cae
BA		 1311 buffer_info->dma = 0;
1312
1313 length = le16_to_cpu(rx_desc->length);
1314
1315 /* errors is only valid for DD + EOP descriptors */
1316 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1317 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1318 /* recycle both page and skb */
1319 buffer_info->skb = skb;
1320 /* an error means any chain goes out the window
1321 * too */
1322 if (rx_ring->rx_skb_top)
1323 dev_kfree_skb(rx_ring->rx_skb_top);
1324 rx_ring->rx_skb_top = NULL;
1325 goto next_desc;
1326 }
1327
1328#define rxtop rx_ring->rx_skb_top
1329 if (!(status & E1000_RXD_STAT_EOP)) {
1330 /* this descriptor is only the beginning (or middle) */
1331 if (!rxtop) {
1332 /* this is the beginning of a chain */
1333 rxtop = skb;
1334 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1335 0, length);
1336 } else {
1337 /* this is the middle of a chain */
1338 skb_fill_page_desc(rxtop,
1339 skb_shinfo(rxtop)->nr_frags,
1340 buffer_info->page, 0, length);
1341 /* re-use the skb, only consumed the page */
1342 buffer_info->skb = skb;
1343 }
1344 e1000_consume_page(buffer_info, rxtop, length);
1345 goto next_desc;
1346 } else {
1347 if (rxtop) {
1348 /* end of the chain */
1349 skb_fill_page_desc(rxtop,
1350 skb_shinfo(rxtop)->nr_frags,
1351 buffer_info->page, 0, length);
1352 /* re-use the current skb, we only consumed the
1353 * page */
1354 buffer_info->skb = skb;
1355 skb = rxtop;
1356 rxtop = NULL;
1357 e1000_consume_page(buffer_info, skb, length);
1358 } else {
1359 /* no chain, got EOP, this buf is the packet
1360 * copybreak to save the put_page/alloc_page */
1361 if (length <= copybreak &&
1362 skb_tailroom(skb) >= length) {
1363 u8 *vaddr;
1364 vaddr = kmap_atomic(buffer_info->page,
1365 KM_SKB_DATA_SOFTIRQ);
1366 memcpy(skb_tail_pointer(skb), vaddr,
1367 length);
1368 kunmap_atomic(vaddr,
1369 KM_SKB_DATA_SOFTIRQ);
1370 /* re-use the page, so don't erase
1371 * buffer_info->page */
1372 skb_put(skb, length);
1373 } else {
1374 skb_fill_page_desc(skb, 0,
1375 buffer_info->page, 0,
1376 length);
1377 e1000_consume_page(buffer_info, skb,
1378 length);
1379 }
1380 }
1381 }
1382
1383 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1384 e1000_rx_checksum(adapter,
1385 (u32)(status) |
1386 ((u32)(rx_desc->errors) << 24),
1387 le16_to_cpu(rx_desc->csum), skb);
1388
1389 /* probably a little skewed due to removing CRC */
1390 total_rx_bytes += skb->len;
1391 total_rx_packets++;
1392
1393 /* eth type trans needs skb->data to point to something */
1394 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1395 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1396 dev_kfree_skb(skb);
1397 goto next_desc;
1398 }
1399
1400 e1000_receive_skb(adapter, netdev, skb, status,
1401 rx_desc->special);
1402
1403next_desc:
1404 rx_desc->status = 0;
1405
1406 /* return some buffers to hardware, one at a time is too slow */
1407 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1408 adapter->alloc_rx_buf(adapter, cleaned_count);
1409 cleaned_count = 0;
1410 }
1411
1412 /* use prefetched values */
1413 rx_desc = next_rxd;
1414 buffer_info = next_buffer;
1415 }
1416 rx_ring->next_to_clean = i;
1417
1418 cleaned_count = e1000_desc_unused(rx_ring);
1419 if (cleaned_count)
1420 adapter->alloc_rx_buf(adapter, cleaned_count);
1421
1422 adapter->total_rx_bytes += total_rx_bytes;
1423 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1424 netdev->stats.rx_bytes += total_rx_bytes;
1425 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1426 return cleaned;
1427}
1428
bc7f75fa
AK		 1429/**
1430 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1431 * @adapter: board private structure
1432 **/
1433static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1434{
1435 struct e1000_ring *rx_ring = adapter->rx_ring;
1436 struct e1000_buffer *buffer_info;
1437 struct e1000_ps_page *ps_page;
1438 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1439 unsigned int i, j;
1440
1441 /* Free all the Rx ring sk_buffs */
1442 for (i = 0; i < rx_ring->count; i++) {
1443 buffer_info = &rx_ring->buffer_info[i];
1444 if (buffer_info->dma) {
1445 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1446 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1447 adapter->rx_buffer_len,
0be3f55f 1448 DMA_FROM_DEVICE);
97ac8cae 1449 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1450 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1451 PAGE_SIZE,
0be3f55f 1452 DMA_FROM_DEVICE);
bc7f75fa 1453 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1454 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1455 adapter->rx_ps_bsize0,
0be3f55f 1456 DMA_FROM_DEVICE);
bc7f75fa
AK		 1457 buffer_info->dma = 0;
1458 }
1459
97ac8cae
BA		 1460 if (buffer_info->page) {
1461 put_page(buffer_info->page);
1462 buffer_info->page = NULL;
1463 }
1464
bc7f75fa
AK		 1465 if (buffer_info->skb) {
1466 dev_kfree_skb(buffer_info->skb);
1467 buffer_info->skb = NULL;
1468 }
1469
1470 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1471 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1472 if (!ps_page->page)
1473 break;
0be3f55f
NN		 1474 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1475 DMA_FROM_DEVICE);
bc7f75fa
AK		 1476 ps_page->dma = 0;
1477 put_page(ps_page->page);
1478 ps_page->page = NULL;
1479 }
1480 }
1481
1482 /* there also may be some cached data from a chained receive */
1483 if (rx_ring->rx_skb_top) {
1484 dev_kfree_skb(rx_ring->rx_skb_top);
1485 rx_ring->rx_skb_top = NULL;
1486 }
1487
bc7f75fa
AK		 1488 /* Zero out the descriptor ring */
1489 memset(rx_ring->desc, 0, rx_ring->size);
1490
1491 rx_ring->next_to_clean = 0;
1492 rx_ring->next_to_use = 0;
b94b5028 1493 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1494
1495 writel(0, adapter->hw.hw_addr + rx_ring->head);
1496 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1497}
1498
a8f88ff5
JB		 1499static void e1000e_downshift_workaround(struct work_struct *work)
1500{
1501 struct e1000_adapter *adapter = container_of(work,
1502 struct e1000_adapter, downshift_task);
1503
1504 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1505}
1506
bc7f75fa
AK		 1507/**
1508 * e1000_intr_msi - Interrupt Handler
1509 * @irq: interrupt number
1510 * @data: pointer to a network interface device structure
1511 **/
1512static irqreturn_t e1000_intr_msi(int irq, void *data)
1513{
1514 struct net_device *netdev = data;
1515 struct e1000_adapter *adapter = netdev_priv(netdev);
1516 struct e1000_hw *hw = &adapter->hw;
1517 u32 icr = er32(ICR);
1518
ad68076e
BA		 1519 /*
1520 * read ICR disables interrupts using IAM
1521 */
bc7f75fa 1522
573cca8c 1523 if (icr & E1000_ICR_LSC) {
bc7f75fa 1524 hw->mac.get_link_status = 1;
ad68076e
BA		 1525 /*
1526 * ICH8 workaround-- Call gig speed drop workaround on cable
1527 * disconnect (LSC) before accessing any PHY registers
1528 */
bc7f75fa
AK		 1529 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1530 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1531 schedule_work(&adapter->downshift_task);
bc7f75fa 1532
ad68076e
BA		 1533 /*
1534 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1535 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1536 * adapter in watchdog
1537 */
bc7f75fa
AK		 1538 if (netif_carrier_ok(netdev) &&
1539 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1540 /* disable receives */
1541 u32 rctl = er32(RCTL);
1542 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1543 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1544 }
1545 /* guard against interrupt when we're going down */
1546 if (!test_bit(__E1000_DOWN, &adapter->state))
1547 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1548 }
1549
288379f0 1550 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1551 adapter->total_tx_bytes = 0;
1552 adapter->total_tx_packets = 0;
1553 adapter->total_rx_bytes = 0;
1554 adapter->total_rx_packets = 0;
288379f0 1555 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1556 }
1557
1558 return IRQ_HANDLED;
1559}
1560
1561/**
1562 * e1000_intr - Interrupt Handler
1563 * @irq: interrupt number
1564 * @data: pointer to a network interface device structure
1565 **/
1566static irqreturn_t e1000_intr(int irq, void *data)
1567{
1568 struct net_device *netdev = data;
1569 struct e1000_adapter *adapter = netdev_priv(netdev);
1570 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1571 u32 rctl, icr = er32(ICR);
4662e82b 1572
a68ea775 1573 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1574 return IRQ_NONE; /* Not our interrupt */
1575
ad68076e
BA		 1576 /*
1577 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1578 * not set, then the adapter didn't send an interrupt
1579 */
bc7f75fa
AK		 1580 if (!(icr & E1000_ICR_INT_ASSERTED))
1581 return IRQ_NONE;
1582
ad68076e
BA		 1583 /*
1584 * Interrupt Auto-Mask...upon reading ICR,
1585 * interrupts are masked. No need for the
1586 * IMC write
1587 */
bc7f75fa 1588
573cca8c 1589 if (icr & E1000_ICR_LSC) {
bc7f75fa 1590 hw->mac.get_link_status = 1;
ad68076e
BA		 1591 /*
1592 * ICH8 workaround-- Call gig speed drop workaround on cable
1593 * disconnect (LSC) before accessing any PHY registers
1594 */
bc7f75fa
AK		 1595 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1596 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1597 schedule_work(&adapter->downshift_task);
bc7f75fa 1598
ad68076e
BA		 1599 /*
1600 * 80003ES2LAN workaround--
bc7f75fa
AK		 1601 * For packet buffer work-around on link down event;
1602 * disable receives here in the ISR and
1603 * reset adapter in watchdog
1604 */
1605 if (netif_carrier_ok(netdev) &&
1606 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1607 /* disable receives */
1608 rctl = er32(RCTL);
1609 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1610 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1611 }
1612 /* guard against interrupt when we're going down */
1613 if (!test_bit(__E1000_DOWN, &adapter->state))
1614 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1615 }
1616
288379f0 1617 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1618 adapter->total_tx_bytes = 0;
1619 adapter->total_tx_packets = 0;
1620 adapter->total_rx_bytes = 0;
1621 adapter->total_rx_packets = 0;
288379f0 1622 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1623 }
1624
1625 return IRQ_HANDLED;
1626}
1627
4662e82b
BA		 1628static irqreturn_t e1000_msix_other(int irq, void *data)
1629{
1630 struct net_device *netdev = data;
1631 struct e1000_adapter *adapter = netdev_priv(netdev);
1632 struct e1000_hw *hw = &adapter->hw;
1633 u32 icr = er32(ICR);
1634
1635 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1636 if (!test_bit(__E1000_DOWN, &adapter->state))
1637 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1638 return IRQ_NONE;
1639 }
1640
1641 if (icr & adapter->eiac_mask)
1642 ew32(ICS, (icr & adapter->eiac_mask));
1643
1644 if (icr & E1000_ICR_OTHER) {
1645 if (!(icr & E1000_ICR_LSC))
1646 goto no_link_interrupt;
1647 hw->mac.get_link_status = 1;
1648 /* guard against interrupt when we're going down */
1649 if (!test_bit(__E1000_DOWN, &adapter->state))
1650 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1651 }
1652
1653no_link_interrupt:
a3c69fef
JB		 1654 if (!test_bit(__E1000_DOWN, &adapter->state))
1655 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1656
1657 return IRQ_HANDLED;
1658}
1659
1660
1661static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1662{
1663 struct net_device *netdev = data;
1664 struct e1000_adapter *adapter = netdev_priv(netdev);
1665 struct e1000_hw *hw = &adapter->hw;
1666 struct e1000_ring *tx_ring = adapter->tx_ring;
1667
1668
1669 adapter->total_tx_bytes = 0;
1670 adapter->total_tx_packets = 0;
1671
1672 if (!e1000_clean_tx_irq(adapter))
1673 /* Ring was not completely cleaned, so fire another interrupt */
1674 ew32(ICS, tx_ring->ims_val);
1675
1676 return IRQ_HANDLED;
1677}
1678
1679static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1680{
1681 struct net_device *netdev = data;
1682 struct e1000_adapter *adapter = netdev_priv(netdev);
1683
1684 /* Write the ITR value calculated at the end of the
1685 * previous interrupt.
1686 */
1687 if (adapter->rx_ring->set_itr) {
1688 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1689 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1690 adapter->rx_ring->set_itr = 0;
1691 }
1692
288379f0 1693 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1694 adapter->total_rx_bytes = 0;
1695 adapter->total_rx_packets = 0;
288379f0 1696 __napi_schedule(&adapter->napi);
4662e82b
BA		 1697 }
1698 return IRQ_HANDLED;
1699}
1700
1701/**
1702 * e1000_configure_msix - Configure MSI-X hardware
1703 *
1704 * e1000_configure_msix sets up the hardware to properly
1705 * generate MSI-X interrupts.
1706 **/
1707static void e1000_configure_msix(struct e1000_adapter *adapter)
1708{
1709 struct e1000_hw *hw = &adapter->hw;
1710 struct e1000_ring *rx_ring = adapter->rx_ring;
1711 struct e1000_ring *tx_ring = adapter->tx_ring;
1712 int vector = 0;
1713 u32 ctrl_ext, ivar = 0;
1714
1715 adapter->eiac_mask = 0;
1716
1717 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1718 if (hw->mac.type == e1000_82574) {
1719 u32 rfctl = er32(RFCTL);
1720 rfctl |= E1000_RFCTL_ACK_DIS;
1721 ew32(RFCTL, rfctl);
1722 }
1723
1724#define E1000_IVAR_INT_ALLOC_VALID 0x8
1725 /* Configure Rx vector */
1726 rx_ring->ims_val = E1000_IMS_RXQ0;
1727 adapter->eiac_mask |= rx_ring->ims_val;
1728 if (rx_ring->itr_val)
1729 writel(1000000000 / (rx_ring->itr_val * 256),
1730 hw->hw_addr + rx_ring->itr_register);
1731 else
1732 writel(1, hw->hw_addr + rx_ring->itr_register);
1733 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1734
1735 /* Configure Tx vector */
1736 tx_ring->ims_val = E1000_IMS_TXQ0;
1737 vector++;
1738 if (tx_ring->itr_val)
1739 writel(1000000000 / (tx_ring->itr_val * 256),
1740 hw->hw_addr + tx_ring->itr_register);
1741 else
1742 writel(1, hw->hw_addr + tx_ring->itr_register);
1743 adapter->eiac_mask |= tx_ring->ims_val;
1744 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1745
1746 /* set vector for Other Causes, e.g. link changes */
1747 vector++;
1748 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1749 if (rx_ring->itr_val)
1750 writel(1000000000 / (rx_ring->itr_val * 256),
1751 hw->hw_addr + E1000_EITR_82574(vector));
1752 else
1753 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1754
1755 /* Cause Tx interrupts on every write back */
1756 ivar |= (1 << 31);
1757
1758 ew32(IVAR, ivar);
1759
1760 /* enable MSI-X PBA support */
1761 ctrl_ext = er32(CTRL_EXT);
1762 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1763
1764 /* Auto-Mask Other interrupts upon ICR read */
1765#define E1000_EIAC_MASK_82574 0x01F00000
1766 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1767 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1768 ew32(CTRL_EXT, ctrl_ext);
1769 e1e_flush();
1770}
1771
1772void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1773{
1774 if (adapter->msix_entries) {
1775 pci_disable_msix(adapter->pdev);
1776 kfree(adapter->msix_entries);
1777 adapter->msix_entries = NULL;
1778 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1779 pci_disable_msi(adapter->pdev);
1780 adapter->flags &= ~FLAG_MSI_ENABLED;
1781 }
4662e82b
BA		 1782}
1783
1784/**
1785 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1786 *
1787 * Attempt to configure interrupts using the best available
1788 * capabilities of the hardware and kernel.
1789 **/
1790void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1791{
1792 int err;
8e86acd7 1793 int i;
4662e82b
BA		 1794
1795 switch (adapter->int_mode) {
1796 case E1000E_INT_MODE_MSIX:
1797 if (adapter->flags & FLAG_HAS_MSIX) {
8e86acd7
JK		 1798 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1799 adapter->msix_entries = kcalloc(adapter->num_vectors,
4662e82b
BA		 1800 sizeof(struct msix_entry),
1801 GFP_KERNEL);
1802 if (adapter->msix_entries) {
8e86acd7 1803 for (i = 0; i < adapter->num_vectors; i++)
4662e82b
BA		 1804 adapter->msix_entries[i].entry = i;
1805
1806 err = pci_enable_msix(adapter->pdev,
1807 adapter->msix_entries,
8e86acd7
JK		 1808 adapter->num_vectors);
1809 if (err == 0) {
4662e82b 1810 return;
8e86acd7 1811 }
4662e82b
BA		 1812 }
1813 /* MSI-X failed, so fall through and try MSI */
1814 e_err("Failed to initialize MSI-X interrupts. "
1815 "Falling back to MSI interrupts.\n");
1816 e1000e_reset_interrupt_capability(adapter);
1817 }
1818 adapter->int_mode = E1000E_INT_MODE_MSI;
1819 /* Fall through */
1820 case E1000E_INT_MODE_MSI:
1821 if (!pci_enable_msi(adapter->pdev)) {
1822 adapter->flags |= FLAG_MSI_ENABLED;
1823 } else {
1824 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1825 e_err("Failed to initialize MSI interrupts. Falling "
1826 "back to legacy interrupts.\n");
1827 }
1828 /* Fall through */
1829 case E1000E_INT_MODE_LEGACY:
1830 /* Don't do anything; this is the system default */
1831 break;
1832 }
8e86acd7
JK		 1833
1834 /* store the number of vectors being used */
1835 adapter->num_vectors = 1;
4662e82b
BA		 1836}
1837
1838/**
1839 * e1000_request_msix - Initialize MSI-X interrupts
1840 *
1841 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1842 * kernel.
1843 **/
1844static int e1000_request_msix(struct e1000_adapter *adapter)
1845{
1846 struct net_device *netdev = adapter->netdev;
1847 int err = 0, vector = 0;
1848
1849 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1850 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1851 else
1852 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1853 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1854 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1855 netdev);
1856 if (err)
1857 goto out;
1858 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1859 adapter->rx_ring->itr_val = adapter->itr;
1860 vector++;
1861
1862 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1863 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1864 else
1865 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1866 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1867 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1868 netdev);
1869 if (err)
1870 goto out;
1871 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1872 adapter->tx_ring->itr_val = adapter->itr;
1873 vector++;
1874
1875 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1876 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1877 if (err)
1878 goto out;
1879
1880 e1000_configure_msix(adapter);
1881 return 0;
1882out:
1883 return err;
1884}
1885
f8d59f78
BA		 1886/**
1887 * e1000_request_irq - initialize interrupts
1888 *
1889 * Attempts to configure interrupts using the best available
1890 * capabilities of the hardware and kernel.
1891 **/
bc7f75fa
AK		 1892static int e1000_request_irq(struct e1000_adapter *adapter)
1893{
1894 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1895 int err;
1896
4662e82b
BA		 1897 if (adapter->msix_entries) {
1898 err = e1000_request_msix(adapter);
1899 if (!err)
1900 return err;
1901 /* fall back to MSI */
1902 e1000e_reset_interrupt_capability(adapter);
1903 adapter->int_mode = E1000E_INT_MODE_MSI;
1904 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1905 }
4662e82b 1906 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1907 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1908 netdev->name, netdev);
1909 if (!err)
1910 return err;
bc7f75fa 1911
4662e82b
BA		 1912 /* fall back to legacy interrupt */
1913 e1000e_reset_interrupt_capability(adapter);
1914 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1915 }
1916
a0607fd3 1917 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1918 netdev->name, netdev);
1919 if (err)
1920 e_err("Unable to allocate interrupt, Error: %d\n", err);
1921
bc7f75fa
AK		 1922 return err;
1923}
1924
1925static void e1000_free_irq(struct e1000_adapter *adapter)
1926{
1927 struct net_device *netdev = adapter->netdev;
1928
4662e82b
BA		 1929 if (adapter->msix_entries) {
1930 int vector = 0;
1931
1932 free_irq(adapter->msix_entries[vector].vector, netdev);
1933 vector++;
1934
1935 free_irq(adapter->msix_entries[vector].vector, netdev);
1936 vector++;
1937
1938 /* Other Causes interrupt vector */
1939 free_irq(adapter->msix_entries[vector].vector, netdev);
1940 return;
bc7f75fa 1941 }
4662e82b
BA		 1942
1943 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1944}
1945
1946/**
1947 * e1000_irq_disable - Mask off interrupt generation on the NIC
1948 **/
1949static void e1000_irq_disable(struct e1000_adapter *adapter)
1950{
1951 struct e1000_hw *hw = &adapter->hw;
1952
bc7f75fa 1953 ew32(IMC, ~0);
4662e82b
BA		 1954 if (adapter->msix_entries)
1955 ew32(EIAC_82574, 0);
bc7f75fa 1956 e1e_flush();
8e86acd7
JK		 1957
1958 if (adapter->msix_entries) {
1959 int i;
1960 for (i = 0; i < adapter->num_vectors; i++)
1961 synchronize_irq(adapter->msix_entries[i].vector);
1962 } else {
1963 synchronize_irq(adapter->pdev->irq);
1964 }
bc7f75fa
AK		 1965}
1966
1967/**
1968 * e1000_irq_enable - Enable default interrupt generation settings
1969 **/
1970static void e1000_irq_enable(struct e1000_adapter *adapter)
1971{
1972 struct e1000_hw *hw = &adapter->hw;
1973
4662e82b
BA		 1974 if (adapter->msix_entries) {
1975 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1976 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1977 } else {
1978 ew32(IMS, IMS_ENABLE_MASK);
1979 }
74ef9c39 1980 e1e_flush();
bc7f75fa
AK		 1981}
1982
1983/**
1984 * e1000_get_hw_control - get control of the h/w from f/w
1985 * @adapter: address of board private structure
1986 *
489815ce 1987 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1988 * For ASF and Pass Through versions of f/w this means that
1989 * the driver is loaded. For AMT version (only with 82573)
1990 * of the f/w this means that the network i/f is open.
1991 **/
1992static void e1000_get_hw_control(struct e1000_adapter *adapter)
1993{
1994 struct e1000_hw *hw = &adapter->hw;
1995 u32 ctrl_ext;
1996 u32 swsm;
1997
1998 /* Let firmware know the driver has taken over */
1999 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2000 swsm = er32(SWSM);
2001 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2002 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2003 ctrl_ext = er32(CTRL_EXT);
ad68076e 2004 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2005 }
2006}
2007
2008/**
2009 * e1000_release_hw_control - release control of the h/w to f/w
2010 * @adapter: address of board private structure
2011 *
489815ce 2012 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2013 * For ASF and Pass Through versions of f/w this means that the
2014 * driver is no longer loaded. For AMT version (only with 82573) i
2015 * of the f/w this means that the network i/f is closed.
2016 *
2017 **/
2018static void e1000_release_hw_control(struct e1000_adapter *adapter)
2019{
2020 struct e1000_hw *hw = &adapter->hw;
2021 u32 ctrl_ext;
2022 u32 swsm;
2023
2024 /* Let firmware taken over control of h/w */
2025 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2026 swsm = er32(SWSM);
2027 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2028 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2029 ctrl_ext = er32(CTRL_EXT);
ad68076e 2030 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2031 }
2032}
2033
bc7f75fa
AK		 2034/**
2035 * @e1000_alloc_ring - allocate memory for a ring structure
2036 **/
2037static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2038 struct e1000_ring *ring)
2039{
2040 struct pci_dev *pdev = adapter->pdev;
2041
2042 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2043 GFP_KERNEL);
2044 if (!ring->desc)
2045 return -ENOMEM;
2046
2047 return 0;
2048}
2049
2050/**
2051 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2052 * @adapter: board private structure
2053 *
2054 * Return 0 on success, negative on failure
2055 **/
2056int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2057{
2058 struct e1000_ring *tx_ring = adapter->tx_ring;
2059 int err = -ENOMEM, size;
2060
2061 size = sizeof(struct e1000_buffer) * tx_ring->count;
2062 tx_ring->buffer_info = vmalloc(size);
2063 if (!tx_ring->buffer_info)
2064 goto err;
2065 memset(tx_ring->buffer_info, 0, size);
2066
2067 /* round up to nearest 4K */
2068 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2069 tx_ring->size = ALIGN(tx_ring->size, 4096);
2070
2071 err = e1000_alloc_ring_dma(adapter, tx_ring);
2072 if (err)
2073 goto err;
2074
2075 tx_ring->next_to_use = 0;
2076 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2077
2078 return 0;
2079err:
2080 vfree(tx_ring->buffer_info);
44defeb3 2081 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2082 return err;
2083}
2084
2085/**
2086 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2087 * @adapter: board private structure
2088 *
2089 * Returns 0 on success, negative on failure
2090 **/
2091int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2092{
2093 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 2094 struct e1000_buffer *buffer_info;
2095 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2096
2097 size = sizeof(struct e1000_buffer) * rx_ring->count;
2098 rx_ring->buffer_info = vmalloc(size);
2099 if (!rx_ring->buffer_info)
2100 goto err;
2101 memset(rx_ring->buffer_info, 0, size);
2102
47f44e40
AK		 2103 for (i = 0; i < rx_ring->count; i++) {
2104 buffer_info = &rx_ring->buffer_info[i];
2105 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2106 sizeof(struct e1000_ps_page),
2107 GFP_KERNEL);
2108 if (!buffer_info->ps_pages)
2109 goto err_pages;
2110 }
bc7f75fa
AK		 2111
2112 desc_len = sizeof(union e1000_rx_desc_packet_split);
2113
2114 /* Round up to nearest 4K */
2115 rx_ring->size = rx_ring->count * desc_len;
2116 rx_ring->size = ALIGN(rx_ring->size, 4096);
2117
2118 err = e1000_alloc_ring_dma(adapter, rx_ring);
2119 if (err)
47f44e40 2120 goto err_pages;
bc7f75fa
AK		 2121
2122 rx_ring->next_to_clean = 0;
2123 rx_ring->next_to_use = 0;
2124 rx_ring->rx_skb_top = NULL;
2125
2126 return 0;
47f44e40
AK		 2127
2128err_pages:
2129 for (i = 0; i < rx_ring->count; i++) {
2130 buffer_info = &rx_ring->buffer_info[i];
2131 kfree(buffer_info->ps_pages);
2132 }
bc7f75fa
AK		 2133err:
2134 vfree(rx_ring->buffer_info);
44defeb3 2135 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2136 return err;
2137}
2138
2139/**
2140 * e1000_clean_tx_ring - Free Tx Buffers
2141 * @adapter: board private structure
2142 **/
2143static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2144{
2145 struct e1000_ring *tx_ring = adapter->tx_ring;
2146 struct e1000_buffer *buffer_info;
2147 unsigned long size;
2148 unsigned int i;
2149
2150 for (i = 0; i < tx_ring->count; i++) {
2151 buffer_info = &tx_ring->buffer_info[i];
2152 e1000_put_txbuf(adapter, buffer_info);
2153 }
2154
2155 size = sizeof(struct e1000_buffer) * tx_ring->count;
2156 memset(tx_ring->buffer_info, 0, size);
2157
2158 memset(tx_ring->desc, 0, tx_ring->size);
2159
2160 tx_ring->next_to_use = 0;
2161 tx_ring->next_to_clean = 0;
2162
2163 writel(0, adapter->hw.hw_addr + tx_ring->head);
2164 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2165}
2166
2167/**
2168 * e1000e_free_tx_resources - Free Tx Resources per Queue
2169 * @adapter: board private structure
2170 *
2171 * Free all transmit software resources
2172 **/
2173void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2174{
2175 struct pci_dev *pdev = adapter->pdev;
2176 struct e1000_ring *tx_ring = adapter->tx_ring;
2177
2178 e1000_clean_tx_ring(adapter);
2179
2180 vfree(tx_ring->buffer_info);
2181 tx_ring->buffer_info = NULL;
2182
2183 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2184 tx_ring->dma);
2185 tx_ring->desc = NULL;
2186}
2187
2188/**
2189 * e1000e_free_rx_resources - Free Rx Resources
2190 * @adapter: board private structure
2191 *
2192 * Free all receive software resources
2193 **/
2194
2195void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2196{
2197 struct pci_dev *pdev = adapter->pdev;
2198 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2199 int i;
bc7f75fa
AK		 2200
2201 e1000_clean_rx_ring(adapter);
2202
47f44e40
AK		 2203 for (i = 0; i < rx_ring->count; i++) {
2204 kfree(rx_ring->buffer_info[i].ps_pages);
2205 }
2206
bc7f75fa
AK		 2207 vfree(rx_ring->buffer_info);
2208 rx_ring->buffer_info = NULL;
2209
bc7f75fa
AK		 2210 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2211 rx_ring->dma);
2212 rx_ring->desc = NULL;
2213}
2214
2215/**
2216 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2217 * @adapter: pointer to adapter
2218 * @itr_setting: current adapter->itr
2219 * @packets: the number of packets during this measurement interval
2220 * @bytes: the number of bytes during this measurement interval
2221 *
bc7f75fa
AK		 2222 * Stores a new ITR value based on packets and byte
2223 * counts during the last interrupt. The advantage of per interrupt
2224 * computation is faster updates and more accurate ITR for the current
2225 * traffic pattern. Constants in this function were computed
2226 * based on theoretical maximum wire speed and thresholds were set based
2227 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2228 * while increasing bulk throughput. This functionality is controlled
2229 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2230 **/
2231static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2232 u16 itr_setting, int packets,
2233 int bytes)
2234{
2235 unsigned int retval = itr_setting;
2236
2237 if (packets == 0)
2238 goto update_itr_done;
2239
2240 switch (itr_setting) {
2241 case lowest_latency:
2242 /* handle TSO and jumbo frames */
2243 if (bytes/packets > 8000)
2244 retval = bulk_latency;
2245 else if ((packets < 5) && (bytes > 512)) {
2246 retval = low_latency;
2247 }
2248 break;
2249 case low_latency: /* 50 usec aka 20000 ints/s */
2250 if (bytes > 10000) {
2251 /* this if handles the TSO accounting */
2252 if (bytes/packets > 8000) {
2253 retval = bulk_latency;
2254 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2255 retval = bulk_latency;
2256 } else if ((packets > 35)) {
2257 retval = lowest_latency;
2258 }
2259 } else if (bytes/packets > 2000) {
2260 retval = bulk_latency;
2261 } else if (packets <= 2 && bytes < 512) {
2262 retval = lowest_latency;
2263 }
2264 break;
2265 case bulk_latency: /* 250 usec aka 4000 ints/s */
2266 if (bytes > 25000) {
2267 if (packets > 35) {
2268 retval = low_latency;
2269 }
2270 } else if (bytes < 6000) {
2271 retval = low_latency;
2272 }
2273 break;
2274 }
2275
2276update_itr_done:
2277 return retval;
2278}
2279
2280static void e1000_set_itr(struct e1000_adapter *adapter)
2281{
2282 struct e1000_hw *hw = &adapter->hw;
2283 u16 current_itr;
2284 u32 new_itr = adapter->itr;
2285
2286 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2287 if (adapter->link_speed != SPEED_1000) {
2288 current_itr = 0;
2289 new_itr = 4000;
2290 goto set_itr_now;
2291 }
2292
2293 adapter->tx_itr = e1000_update_itr(adapter,
2294 adapter->tx_itr,
2295 adapter->total_tx_packets,
2296 adapter->total_tx_bytes);
2297 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2298 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2299 adapter->tx_itr = low_latency;
2300
2301 adapter->rx_itr = e1000_update_itr(adapter,
2302 adapter->rx_itr,
2303 adapter->total_rx_packets,
2304 adapter->total_rx_bytes);
2305 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2306 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2307 adapter->rx_itr = low_latency;
2308
2309 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2310
2311 switch (current_itr) {
2312 /* counts and packets in update_itr are dependent on these numbers */
2313 case lowest_latency:
2314 new_itr = 70000;
2315 break;
2316 case low_latency:
2317 new_itr = 20000; /* aka hwitr = ~200 */
2318 break;
2319 case bulk_latency:
2320 new_itr = 4000;
2321 break;
2322 default:
2323 break;
2324 }
2325
2326set_itr_now:
2327 if (new_itr != adapter->itr) {
ad68076e
BA		 2328 /*
2329 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2330 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2331 * increasing
2332 */
bc7f75fa
AK		 2333 new_itr = new_itr > adapter->itr ?
2334 min(adapter->itr + (new_itr >> 2), new_itr) :
2335 new_itr;
2336 adapter->itr = new_itr;
4662e82b
BA		 2337 adapter->rx_ring->itr_val = new_itr;
2338 if (adapter->msix_entries)
2339 adapter->rx_ring->set_itr = 1;
2340 else
2341 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 2342 }
2343}
2344
4662e82b
BA		 2345/**
2346 * e1000_alloc_queues - Allocate memory for all rings
2347 * @adapter: board private structure to initialize
2348 **/
2349static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2350{
2351 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2352 if (!adapter->tx_ring)
2353 goto err;
2354
2355 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2356 if (!adapter->rx_ring)
2357 goto err;
2358
2359 return 0;
2360err:
2361 e_err("Unable to allocate memory for queues\n");
2362 kfree(adapter->rx_ring);
2363 kfree(adapter->tx_ring);
2364 return -ENOMEM;
2365}
2366
bc7f75fa
AK		 2367/**
2368 * e1000_clean - NAPI Rx polling callback
ad68076e 2369 * @napi: struct associated with this polling callback
489815ce 2370 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2371 **/
2372static int e1000_clean(struct napi_struct *napi, int budget)
2373{
2374 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2375 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2376 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2377 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2378
4cf1653a 2379 adapter = netdev_priv(poll_dev);
bc7f75fa 2380
4662e82b
BA		 2381 if (adapter->msix_entries &&
2382 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2383 goto clean_rx;
2384
92af3e95 2385 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2386
4662e82b 2387clean_rx:
bc7f75fa 2388 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2389
12d04a3c 2390 if (!tx_cleaned)
d2c7ddd6 2391 work_done = budget;
bc7f75fa 2392
53e52c72
DM		 2393 /* If budget not fully consumed, exit the polling mode */
2394 if (work_done < budget) {
bc7f75fa
AK		 2395 if (adapter->itr_setting & 3)
2396 e1000_set_itr(adapter);
288379f0 2397 napi_complete(napi);
a3c69fef
JB		 2398 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2399 if (adapter->msix_entries)
2400 ew32(IMS, adapter->rx_ring->ims_val);
2401 else
2402 e1000_irq_enable(adapter);
2403 }
bc7f75fa
AK		 2404 }
2405
2406 return work_done;
2407}
2408
2409static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2410{
2411 struct e1000_adapter *adapter = netdev_priv(netdev);
2412 struct e1000_hw *hw = &adapter->hw;
2413 u32 vfta, index;
2414
2415 /* don't update vlan cookie if already programmed */
2416 if ((adapter->hw.mng_cookie.status &
2417 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2418 (vid == adapter->mng_vlan_id))
2419 return;
caaddaf8 2420
bc7f75fa 2421 /* add VID to filter table */
caaddaf8
BA		 2422 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2423 index = (vid >> 5) & 0x7F;
2424 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2425 vfta |= (1 << (vid & 0x1F));
2426 hw->mac.ops.write_vfta(hw, index, vfta);
2427 }
bc7f75fa
AK		 2428}
2429
2430static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2431{
2432 struct e1000_adapter *adapter = netdev_priv(netdev);
2433 struct e1000_hw *hw = &adapter->hw;
2434 u32 vfta, index;
2435
74ef9c39
JB		 2436 if (!test_bit(__E1000_DOWN, &adapter->state))
2437 e1000_irq_disable(adapter);
bc7f75fa 2438 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2439
2440 if (!test_bit(__E1000_DOWN, &adapter->state))
2441 e1000_irq_enable(adapter);
bc7f75fa
AK		 2442
2443 if ((adapter->hw.mng_cookie.status &
2444 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2445 (vid == adapter->mng_vlan_id)) {
2446 /* release control to f/w */
2447 e1000_release_hw_control(adapter);
2448 return;
2449 }
2450
2451 /* remove VID from filter table */
caaddaf8
BA		 2452 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2453 index = (vid >> 5) & 0x7F;
2454 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2455 vfta &= ~(1 << (vid & 0x1F));
2456 hw->mac.ops.write_vfta(hw, index, vfta);
2457 }
bc7f75fa
AK		 2458}
2459
2460static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2461{
2462 struct net_device *netdev = adapter->netdev;
2463 u16 vid = adapter->hw.mng_cookie.vlan_id;
2464 u16 old_vid = adapter->mng_vlan_id;
2465
2466 if (!adapter->vlgrp)
2467 return;
2468
2469 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2470 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2471 if (adapter->hw.mng_cookie.status &
2472 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2473 e1000_vlan_rx_add_vid(netdev, vid);
2474 adapter->mng_vlan_id = vid;
2475 }
2476
2477 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2478 (vid != old_vid) &&
2479 !vlan_group_get_device(adapter->vlgrp, old_vid))
2480 e1000_vlan_rx_kill_vid(netdev, old_vid);
2481 } else {
2482 adapter->mng_vlan_id = vid;
2483 }
2484}
2485
2486
2487static void e1000_vlan_rx_register(struct net_device *netdev,
2488 struct vlan_group *grp)
2489{
2490 struct e1000_adapter *adapter = netdev_priv(netdev);
2491 struct e1000_hw *hw = &adapter->hw;
2492 u32 ctrl, rctl;
2493
74ef9c39
JB		 2494 if (!test_bit(__E1000_DOWN, &adapter->state))
2495 e1000_irq_disable(adapter);
bc7f75fa
AK		 2496 adapter->vlgrp = grp;
2497
2498 if (grp) {
2499 /* enable VLAN tag insert/strip */
2500 ctrl = er32(CTRL);
2501 ctrl |= E1000_CTRL_VME;
2502 ew32(CTRL, ctrl);
2503
2504 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2505 /* enable VLAN receive filtering */
2506 rctl = er32(RCTL);
bc7f75fa
AK		 2507 rctl &= ~E1000_RCTL_CFIEN;
2508 ew32(RCTL, rctl);
2509 e1000_update_mng_vlan(adapter);
2510 }
2511 } else {
2512 /* disable VLAN tag insert/strip */
2513 ctrl = er32(CTRL);
2514 ctrl &= ~E1000_CTRL_VME;
2515 ew32(CTRL, ctrl);
2516
2517 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2518 if (adapter->mng_vlan_id !=
2519 (u16)E1000_MNG_VLAN_NONE) {
2520 e1000_vlan_rx_kill_vid(netdev,
2521 adapter->mng_vlan_id);
2522 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2523 }
2524 }
2525 }
2526
74ef9c39
JB		 2527 if (!test_bit(__E1000_DOWN, &adapter->state))
2528 e1000_irq_enable(adapter);
bc7f75fa
AK		 2529}
2530
2531static void e1000_restore_vlan(struct e1000_adapter *adapter)
2532{
2533 u16 vid;
2534
2535 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2536
2537 if (!adapter->vlgrp)
2538 return;
2539
2540 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2541 if (!vlan_group_get_device(adapter->vlgrp, vid))
2542 continue;
2543 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2544 }
2545}
2546
cd791618 2547static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2548{
2549 struct e1000_hw *hw = &adapter->hw;
cd791618 2550 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2551
2552 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2553 return;
2554
2555 manc = er32(MANC);
2556
ad68076e
BA		 2557 /*
2558 * enable receiving management packets to the host. this will probably
bc7f75fa 2559 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2560 * the packets will be handled on SMBUS
2561 */
bc7f75fa
AK		 2562 manc |= E1000_MANC_EN_MNG2HOST;
2563 manc2h = er32(MANC2H);
cd791618
BA		 2564
2565 switch (hw->mac.type) {
2566 default:
2567 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2568 break;
2569 case e1000_82574:
2570 case e1000_82583:
2571 /*
2572 * Check if IPMI pass-through decision filter already exists;
2573 * if so, enable it.
2574 */
2575 for (i = 0, j = 0; i < 8; i++) {
2576 mdef = er32(MDEF(i));
2577
2578 /* Ignore filters with anything other than IPMI ports */
3b21b508 2579 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2580 continue;
2581
2582 /* Enable this decision filter in MANC2H */
2583 if (mdef)
2584 manc2h |= (1 << i);
2585
2586 j |= mdef;
2587 }
2588
2589 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2590 break;
2591
2592 /* Create new decision filter in an empty filter */
2593 for (i = 0, j = 0; i < 8; i++)
2594 if (er32(MDEF(i)) == 0) {
2595 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2596 E1000_MDEF_PORT_664));
2597 manc2h |= (1 << 1);
2598 j++;
2599 break;
2600 }
2601
2602 if (!j)
2603 e_warn("Unable to create IPMI pass-through filter\n");
2604 break;
2605 }
2606
bc7f75fa
AK		 2607 ew32(MANC2H, manc2h);
2608 ew32(MANC, manc);
2609}
2610
2611/**
2612 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2613 * @adapter: board private structure
2614 *
2615 * Configure the Tx unit of the MAC after a reset.
2616 **/
2617static void e1000_configure_tx(struct e1000_adapter *adapter)
2618{
2619 struct e1000_hw *hw = &adapter->hw;
2620 struct e1000_ring *tx_ring = adapter->tx_ring;
2621 u64 tdba;
2622 u32 tdlen, tctl, tipg, tarc;
2623 u32 ipgr1, ipgr2;
2624
2625 /* Setup the HW Tx Head and Tail descriptor pointers */
2626 tdba = tx_ring->dma;
2627 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2628 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2629 ew32(TDBAH, (tdba >> 32));
2630 ew32(TDLEN, tdlen);
2631 ew32(TDH, 0);
2632 ew32(TDT, 0);
2633 tx_ring->head = E1000_TDH;
2634 tx_ring->tail = E1000_TDT;
2635
2636 /* Set the default values for the Tx Inter Packet Gap timer */
2637 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2638 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2639 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2640
2641 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2642 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2643
2644 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2645 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2646 ew32(TIPG, tipg);
2647
2648 /* Set the Tx Interrupt Delay register */
2649 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2650 /* Tx irq moderation */
bc7f75fa
AK		 2651 ew32(TADV, adapter->tx_abs_int_delay);
2652
2653 /* Program the Transmit Control Register */
2654 tctl = er32(TCTL);
2655 tctl &= ~E1000_TCTL_CT;
2656 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2657 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2658
2659 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2660 tarc = er32(TARC(0));
ad68076e
BA		 2661 /*
2662 * set the speed mode bit, we'll clear it if we're not at
2663 * gigabit link later
2664 */
bc7f75fa
AK		 2665#define SPEED_MODE_BIT (1 << 21)
2666 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2667 ew32(TARC(0), tarc);
bc7f75fa
AK		 2668 }
2669
2670 /* errata: program both queues to unweighted RR */
2671 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2672 tarc = er32(TARC(0));
bc7f75fa 2673 tarc |= 1;
e9ec2c0f
JK		 2674 ew32(TARC(0), tarc);
2675 tarc = er32(TARC(1));
bc7f75fa 2676 tarc |= 1;
e9ec2c0f 2677 ew32(TARC(1), tarc);
bc7f75fa
AK		 2678 }
2679
bc7f75fa
AK		 2680 /* Setup Transmit Descriptor Settings for eop descriptor */
2681 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2682
2683 /* only set IDE if we are delaying interrupts using the timers */
2684 if (adapter->tx_int_delay)
2685 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2686
2687 /* enable Report Status bit */
2688 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2689
2690 ew32(TCTL, tctl);
2691
edfea6e6 2692 e1000e_config_collision_dist(hw);
bc7f75fa
AK		 2693}
2694
2695/**
2696 * e1000_setup_rctl - configure the receive control registers
2697 * @adapter: Board private structure
2698 **/
2699#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2700 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2701static void e1000_setup_rctl(struct e1000_adapter *adapter)
2702{
2703 struct e1000_hw *hw = &adapter->hw;
2704 u32 rctl, rfctl;
2705 u32 psrctl = 0;
2706 u32 pages = 0;
2707
2708 /* Program MC offset vector base */
2709 rctl = er32(RCTL);
2710 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2711 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2712 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2713 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2714
2715 /* Do not Store bad packets */
2716 rctl &= ~E1000_RCTL_SBP;
2717
2718 /* Enable Long Packet receive */
2719 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2720 rctl &= ~E1000_RCTL_LPE;
2721 else
2722 rctl |= E1000_RCTL_LPE;
2723
eb7c3adb
JK		 2724 /* Some systems expect that the CRC is included in SMBUS traffic. The
2725 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2726 * host memory when this is enabled
2727 */
2728 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2729 rctl |= E1000_RCTL_SECRC;
5918bd88 2730
a4f58f54
BA		 2731 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2732 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2733 u16 phy_data;
2734
2735 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2736 phy_data &= 0xfff8;
2737 phy_data |= (1 << 2);
2738 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2739
2740 e1e_rphy(hw, 22, &phy_data);
2741 phy_data &= 0x0fff;
2742 phy_data |= (1 << 14);
2743 e1e_wphy(hw, 0x10, 0x2823);
2744 e1e_wphy(hw, 0x11, 0x0003);
2745 e1e_wphy(hw, 22, phy_data);
2746 }
2747
d3738bb8
BA		 2748 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2749 if (hw->mac.type == e1000_pch2lan) {
2750 s32 ret_val;
2751
2752 if (rctl & E1000_RCTL_LPE)
2753 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2754 else
2755 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2756 }
2757
bc7f75fa
AK		 2758 /* Setup buffer sizes */
2759 rctl &= ~E1000_RCTL_SZ_4096;
2760 rctl |= E1000_RCTL_BSEX;
2761 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2762 case 2048:
2763 default:
2764 rctl |= E1000_RCTL_SZ_2048;
2765 rctl &= ~E1000_RCTL_BSEX;
2766 break;
2767 case 4096:
2768 rctl |= E1000_RCTL_SZ_4096;
2769 break;
2770 case 8192:
2771 rctl |= E1000_RCTL_SZ_8192;
2772 break;
2773 case 16384:
2774 rctl |= E1000_RCTL_SZ_16384;
2775 break;
2776 }
2777
2778 /*
2779 * 82571 and greater support packet-split where the protocol
2780 * header is placed in skb->data and the packet data is
2781 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2782 * In the case of a non-split, skb->data is linearly filled,
2783 * followed by the page buffers. Therefore, skb->data is
2784 * sized to hold the largest protocol header.
2785 *
2786 * allocations using alloc_page take too long for regular MTU
2787 * so only enable packet split for jumbo frames
2788 *
2789 * Using pages when the page size is greater than 16k wastes
2790 * a lot of memory, since we allocate 3 pages at all times
2791 * per packet.
2792 */
bc7f75fa 2793 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
dbcb9fec 2794 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
97ac8cae 2795 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2796 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2797 else
2798 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2799
2800 if (adapter->rx_ps_pages) {
2801 /* Configure extra packet-split registers */
2802 rfctl = er32(RFCTL);
2803 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2804 /*
2805 * disable packet split support for IPv6 extension headers,
2806 * because some malformed IPv6 headers can hang the Rx
2807 */
bc7f75fa
AK		 2808 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2809 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2810
2811 ew32(RFCTL, rfctl);
2812
140a7480
AK		 2813 /* Enable Packet split descriptors */
2814 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2815
2816 psrctl |= adapter->rx_ps_bsize0 >>
2817 E1000_PSRCTL_BSIZE0_SHIFT;
2818
2819 switch (adapter->rx_ps_pages) {
2820 case 3:
2821 psrctl |= PAGE_SIZE <<
2822 E1000_PSRCTL_BSIZE3_SHIFT;
2823 case 2:
2824 psrctl |= PAGE_SIZE <<
2825 E1000_PSRCTL_BSIZE2_SHIFT;
2826 case 1:
2827 psrctl |= PAGE_SIZE >>
2828 E1000_PSRCTL_BSIZE1_SHIFT;
2829 break;
2830 }
2831
2832 ew32(PSRCTL, psrctl);
2833 }
2834
2835 ew32(RCTL, rctl);
318a94d6
JK		 2836 /* just started the receive unit, no need to restart */
2837 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2838}
2839
2840/**
2841 * e1000_configure_rx - Configure Receive Unit after Reset
2842 * @adapter: board private structure
2843 *
2844 * Configure the Rx unit of the MAC after a reset.
2845 **/
2846static void e1000_configure_rx(struct e1000_adapter *adapter)
2847{
2848 struct e1000_hw *hw = &adapter->hw;
2849 struct e1000_ring *rx_ring = adapter->rx_ring;
2850 u64 rdba;
2851 u32 rdlen, rctl, rxcsum, ctrl_ext;
2852
2853 if (adapter->rx_ps_pages) {
2854 /* this is a 32 byte descriptor */
2855 rdlen = rx_ring->count *
2856 sizeof(union e1000_rx_desc_packet_split);
2857 adapter->clean_rx = e1000_clean_rx_irq_ps;
2858 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2859 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2860 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2861 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2862 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2863 } else {
97ac8cae 2864 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2865 adapter->clean_rx = e1000_clean_rx_irq;
2866 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2867 }
2868
2869 /* disable receives while setting up the descriptors */
2870 rctl = er32(RCTL);
2871 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2872 e1e_flush();
2873 msleep(10);
2874
2875 /* set the Receive Delay Timer Register */
2876 ew32(RDTR, adapter->rx_int_delay);
2877
2878 /* irq moderation */
2879 ew32(RADV, adapter->rx_abs_int_delay);
2880 if (adapter->itr_setting != 0)
ad68076e 2881 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2882
2883 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2884 /* Auto-Mask interrupts upon ICR access */
2885 ctrl_ext |= E1000_CTRL_EXT_IAME;
2886 ew32(IAM, 0xffffffff);
2887 ew32(CTRL_EXT, ctrl_ext);
2888 e1e_flush();
2889
ad68076e
BA		 2890 /*
2891 * Setup the HW Rx Head and Tail Descriptor Pointers and
2892 * the Base and Length of the Rx Descriptor Ring
2893 */
bc7f75fa 2894 rdba = rx_ring->dma;
284901a9 2895 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2896 ew32(RDBAH, (rdba >> 32));
2897 ew32(RDLEN, rdlen);
2898 ew32(RDH, 0);
2899 ew32(RDT, 0);
2900 rx_ring->head = E1000_RDH;
2901 rx_ring->tail = E1000_RDT;
2902
2903 /* Enable Receive Checksum Offload for TCP and UDP */
2904 rxcsum = er32(RXCSUM);
2905 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2906 rxcsum |= E1000_RXCSUM_TUOFL;
2907
ad68076e
BA		 2908 /*
2909 * IPv4 payload checksum for UDP fragments must be
2910 * used in conjunction with packet-split.
2911 */
bc7f75fa
AK		 2912 if (adapter->rx_ps_pages)
2913 rxcsum |= E1000_RXCSUM_IPPCSE;
2914 } else {
2915 rxcsum &= ~E1000_RXCSUM_TUOFL;
2916 /* no need to clear IPPCSE as it defaults to 0 */
2917 }
2918 ew32(RXCSUM, rxcsum);
2919
ad68076e
BA		 2920 /*
2921 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2922 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2923 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2924 */
53ec5498
BA		 2925 if (adapter->flags & FLAG_HAS_ERT) {
2926 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2927 u32 rxdctl = er32(RXDCTL(0));
2928 ew32(RXDCTL(0), rxdctl | 0x3);
2929 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2930 /*
2931 * With jumbo frames and early-receive enabled,
2932 * excessive C-state transition latencies result in
2933 * dropped transactions.
2934 */
ed77134b 2935 pm_qos_update_request(
82f68251 2936 &adapter->netdev->pm_qos_req, 55);
53ec5498 2937 } else {
ed77134b 2938 pm_qos_update_request(
82f68251 2939 &adapter->netdev->pm_qos_req,
ed77134b 2940 PM_QOS_DEFAULT_VALUE);
53ec5498 2941 }
97ac8cae 2942 }
bc7f75fa
AK		 2943
2944 /* Enable Receives */
2945 ew32(RCTL, rctl);
2946}
2947
2948/**
e2de3eb6 2949 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2950 * @hw: pointer to the HW structure
2951 * @mc_addr_list: array of multicast addresses to program
2952 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2953 *
ab8932f3 2954 * Updates the Multicast Table Array.
bc7f75fa 2955 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2956 **/
e2de3eb6 2957static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2958 u32 mc_addr_count)
bc7f75fa 2959{
ab8932f3 2960 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 2961}
2962
2963/**
2964 * e1000_set_multi - Multicast and Promiscuous mode set
2965 * @netdev: network interface device structure
2966 *
2967 * The set_multi entry point is called whenever the multicast address
2968 * list or the network interface flags are updated. This routine is
2969 * responsible for configuring the hardware for proper multicast,
2970 * promiscuous mode, and all-multi behavior.
2971 **/
2972static void e1000_set_multi(struct net_device *netdev)
2973{
2974 struct e1000_adapter *adapter = netdev_priv(netdev);
2975 struct e1000_hw *hw = &adapter->hw;
22bedad3 2976 struct netdev_hw_addr *ha;
bc7f75fa
AK		 2977 u8 *mta_list;
2978 u32 rctl;
2979 int i;
2980
2981 /* Check for Promiscuous and All Multicast modes */
2982
2983 rctl = er32(RCTL);
2984
2985 if (netdev->flags & IFF_PROMISC) {
2986 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2987 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2988 } else {
746b9f02
PM		 2989 if (netdev->flags & IFF_ALLMULTI) {
2990 rctl |= E1000_RCTL_MPE;
2991 rctl &= ~E1000_RCTL_UPE;
2992 } else {
2993 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2994 }
78ed11a5 2995 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2996 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2997 }
2998
2999 ew32(RCTL, rctl);
3000
7aeef972
JP		 3001 if (!netdev_mc_empty(netdev)) {
3002 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 3003 if (!mta_list)
3004 return;
3005
3006 /* prepare a packed array of only addresses. */
7aeef972 3007 i = 0;
22bedad3
JP		 3008 netdev_for_each_mc_addr(ha, netdev)
3009 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 3010
ab8932f3 3011 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 3012 kfree(mta_list);
3013 } else {
3014 /*
3015 * if we're called from probe, we might not have
3016 * anything to do here, so clear out the list
3017 */
ab8932f3 3018 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 3019 }
3020}
3021
3022/**
ad68076e 3023 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3024 * @adapter: private board structure
3025 **/
3026static void e1000_configure(struct e1000_adapter *adapter)
3027{
3028 e1000_set_multi(adapter->netdev);
3029
3030 e1000_restore_vlan(adapter);
cd791618 3031 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3032
3033 e1000_configure_tx(adapter);
3034 e1000_setup_rctl(adapter);
3035 e1000_configure_rx(adapter);
ad68076e 3036 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 3037}
3038
3039/**
3040 * e1000e_power_up_phy - restore link in case the phy was powered down
3041 * @adapter: address of board private structure
3042 *
3043 * The phy may be powered down to save power and turn off link when the
3044 * driver is unloaded and wake on lan is not enabled (among others)
3045 * *** this routine MUST be followed by a call to e1000e_reset ***
3046 **/
3047void e1000e_power_up_phy(struct e1000_adapter *adapter)
3048{
17f208de
BA		 3049 if (adapter->hw.phy.ops.power_up)
3050 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3051
3052 adapter->hw.mac.ops.setup_link(&adapter->hw);
3053}
3054
3055/**
3056 * e1000_power_down_phy - Power down the PHY
3057 *
17f208de
BA		 3058 * Power down the PHY so no link is implied when interface is down.
3059 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3060 */
3061static void e1000_power_down_phy(struct e1000_adapter *adapter)
3062{
bc7f75fa 3063 /* WoL is enabled */
23b66e2b 3064 if (adapter->wol)
bc7f75fa
AK		 3065 return;
3066
17f208de
BA		 3067 if (adapter->hw.phy.ops.power_down)
3068 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3069}
3070
3071/**
3072 * e1000e_reset - bring the hardware into a known good state
3073 *
3074 * This function boots the hardware and enables some settings that
3075 * require a configuration cycle of the hardware - those cannot be
3076 * set/changed during runtime. After reset the device needs to be
ad68076e 3077 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3078 */
3079void e1000e_reset(struct e1000_adapter *adapter)
3080{
3081 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3082 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3083 struct e1000_hw *hw = &adapter->hw;
3084 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3085 u32 pba = adapter->pba;
bc7f75fa
AK		 3086 u16 hwm;
3087
ad68076e 3088 /* reset Packet Buffer Allocation to default */
318a94d6 3089 ew32(PBA, pba);
df762464 3090
318a94d6 3091 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3092 /*
3093 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3094 * large enough to accommodate two full transmit packets,
3095 * rounded up to the next 1KB and expressed in KB. Likewise,
3096 * the Rx FIFO should be large enough to accommodate at least
3097 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3098 * expressed in KB.
3099 */
df762464 3100 pba = er32(PBA);
bc7f75fa 3101 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3102 tx_space = pba >> 16;
bc7f75fa 3103 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3104 pba &= 0xffff;
ad68076e
BA		 3105 /*
3106 * the Tx fifo also stores 16 bytes of information about the tx
3107 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3108 */
3109 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3110 sizeof(struct e1000_tx_desc) -
3111 ETH_FCS_LEN) * 2;
3112 min_tx_space = ALIGN(min_tx_space, 1024);
3113 min_tx_space >>= 10;
3114 /* software strips receive CRC, so leave room for it */
318a94d6 3115 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3116 min_rx_space = ALIGN(min_rx_space, 1024);
3117 min_rx_space >>= 10;
3118
ad68076e
BA		 3119 /*
3120 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3121 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3122 * allocation, take space away from current Rx allocation
3123 */
df762464
AK		 3124 if ((tx_space < min_tx_space) &&
3125 ((min_tx_space - tx_space) < pba)) {
3126 pba -= min_tx_space - tx_space;
bc7f75fa 3127
ad68076e
BA		 3128 /*
3129 * if short on Rx space, Rx wins and must trump tx
3130 * adjustment or use Early Receive if available
3131 */
df762464 3132 if ((pba < min_rx_space) &&
bc7f75fa
AK		 3133 (!(adapter->flags & FLAG_HAS_ERT)))
3134 /* ERT enabled in e1000_configure_rx */
df762464 3135 pba = min_rx_space;
bc7f75fa 3136 }
df762464
AK		 3137
3138 ew32(PBA, pba);
bc7f75fa
AK		 3139 }
3140
bc7f75fa 3141
ad68076e
BA		 3142 /*
3143 * flow control settings
3144 *
38eb394e 3145 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3146 * (or the size used for early receive) above it in the Rx FIFO.
3147 * Set it to the lower of:
3148 * - 90% of the Rx FIFO size, and
3149 * - the full Rx FIFO size minus the early receive size (for parts
3150 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3151 * - the full Rx FIFO size minus one full frame
ad68076e 3152 */
d3738bb8
BA		 3153 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3154 fc->pause_time = 0xFFFF;
3155 else
3156 fc->pause_time = E1000_FC_PAUSE_TIME;
3157 fc->send_xon = 1;
3158 fc->current_mode = fc->requested_mode;
3159
3160 switch (hw->mac.type) {
3161 default:
3162 if ((adapter->flags & FLAG_HAS_ERT) &&
3163 (adapter->netdev->mtu > ETH_DATA_LEN))
3164 hwm = min(((pba << 10) * 9 / 10),
3165 ((pba << 10) - (E1000_ERT_2048 << 3)));
3166 else
3167 hwm = min(((pba << 10) * 9 / 10),
3168 ((pba << 10) - adapter->max_frame_size));
3169
3170 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3171 fc->low_water = fc->high_water - 8;
3172 break;
3173 case e1000_pchlan:
38eb394e
BA		 3174 /*
3175 * Workaround PCH LOM adapter hangs with certain network
3176 * loads. If hangs persist, try disabling Tx flow control.
3177 */
3178 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3179 fc->high_water = 0x3500;
3180 fc->low_water = 0x1500;
3181 } else {
3182 fc->high_water = 0x5000;
3183 fc->low_water = 0x3000;
3184 }
a305595b 3185 fc->refresh_time = 0x1000;
d3738bb8
BA		 3186 break;
3187 case e1000_pch2lan:
3188 fc->high_water = 0x05C20;
3189 fc->low_water = 0x05048;
3190 fc->pause_time = 0x0650;
3191 fc->refresh_time = 0x0400;
3192 break;
38eb394e 3193 }
bc7f75fa 3194
bc7f75fa
AK		 3195 /* Allow time for pending master requests to run */
3196 mac->ops.reset_hw(hw);
97ac8cae
BA		 3197
3198 /*
3199 * For parts with AMT enabled, let the firmware know
3200 * that the network interface is in control
3201 */
c43bc57e 3202 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 3203 e1000_get_hw_control(adapter);
3204
bc7f75fa
AK		 3205 ew32(WUC, 0);
3206
3207 if (mac->ops.init_hw(hw))
44defeb3 3208 e_err("Hardware Error\n");
bc7f75fa
AK		 3209
3210 e1000_update_mng_vlan(adapter);
3211
3212 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3213 ew32(VET, ETH_P_8021Q);
3214
3215 e1000e_reset_adaptive(hw);
3216 e1000_get_phy_info(hw);
3217
918d7197
BA		 3218 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3219 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3220 u16 phy_data = 0;
ad68076e
BA		 3221 /*
3222 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3223 * the return value of this function because there is nothing
ad68076e
BA		 3224 * different we would do if it failed
3225 */
bc7f75fa
AK		 3226 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3227 phy_data &= ~IGP02E1000_PM_SPD;
3228 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3229 }
bc7f75fa
AK		 3230}
3231
3232int e1000e_up(struct e1000_adapter *adapter)
3233{
3234 struct e1000_hw *hw = &adapter->hw;
3235
3236 /* hardware has been reset, we need to reload some things */
3237 e1000_configure(adapter);
3238
3239 clear_bit(__E1000_DOWN, &adapter->state);
3240
3241 napi_enable(&adapter->napi);
4662e82b
BA		 3242 if (adapter->msix_entries)
3243 e1000_configure_msix(adapter);
bc7f75fa
AK		 3244 e1000_irq_enable(adapter);
3245
4cb9be7a
JB		 3246 netif_wake_queue(adapter->netdev);
3247
bc7f75fa 3248 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3249 if (adapter->msix_entries)
3250 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3251 else
3252 ew32(ICS, E1000_ICS_LSC);
3253
bc7f75fa
AK		 3254 return 0;
3255}
3256
3257void e1000e_down(struct e1000_adapter *adapter)
3258{
3259 struct net_device *netdev = adapter->netdev;
3260 struct e1000_hw *hw = &adapter->hw;
3261 u32 tctl, rctl;
3262
ad68076e
BA		 3263 /*
3264 * signal that we're down so the interrupt handler does not
3265 * reschedule our watchdog timer
3266 */
bc7f75fa
AK		 3267 set_bit(__E1000_DOWN, &adapter->state);
3268
3269 /* disable receives in the hardware */
3270 rctl = er32(RCTL);
3271 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3272 /* flush and sleep below */
3273
4cb9be7a 3274 netif_stop_queue(netdev);
bc7f75fa
AK		 3275
3276 /* disable transmits in the hardware */
3277 tctl = er32(TCTL);
3278 tctl &= ~E1000_TCTL_EN;
3279 ew32(TCTL, tctl);
3280 /* flush both disables and wait for them to finish */
3281 e1e_flush();
3282 msleep(10);
3283
3284 napi_disable(&adapter->napi);
3285 e1000_irq_disable(adapter);
3286
3287 del_timer_sync(&adapter->watchdog_timer);
3288 del_timer_sync(&adapter->phy_info_timer);
3289
bc7f75fa
AK		 3290 netif_carrier_off(netdev);
3291 adapter->link_speed = 0;
3292 adapter->link_duplex = 0;
3293
52cc3086
JK		 3294 if (!pci_channel_offline(adapter->pdev))
3295 e1000e_reset(adapter);
bc7f75fa
AK		 3296 e1000_clean_tx_ring(adapter);
3297 e1000_clean_rx_ring(adapter);
3298
3299 /*
3300 * TODO: for power management, we could drop the link and
3301 * pci_disable_device here.
3302 */
3303}
3304
3305void e1000e_reinit_locked(struct e1000_adapter *adapter)
3306{
3307 might_sleep();
3308 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3309 msleep(1);
3310 e1000e_down(adapter);
3311 e1000e_up(adapter);
3312 clear_bit(__E1000_RESETTING, &adapter->state);
3313}
3314
3315/**
3316 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3317 * @adapter: board private structure to initialize
3318 *
3319 * e1000_sw_init initializes the Adapter private data structure.
3320 * Fields are initialized based on PCI device information and
3321 * OS network device settings (MTU size).
3322 **/
3323static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3324{
bc7f75fa
AK		 3325 struct net_device *netdev = adapter->netdev;
3326
3327 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3328 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3329 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3330 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3331
4662e82b 3332 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3333
4662e82b
BA		 3334 if (e1000_alloc_queues(adapter))
3335 return -ENOMEM;
bc7f75fa 3336
bc7f75fa 3337 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3338 e1000_irq_disable(adapter);
3339
bc7f75fa
AK		 3340 set_bit(__E1000_DOWN, &adapter->state);
3341 return 0;
bc7f75fa
AK		 3342}
3343
f8d59f78
BA		 3344/**
3345 * e1000_intr_msi_test - Interrupt Handler
3346 * @irq: interrupt number
3347 * @data: pointer to a network interface device structure
3348 **/
3349static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3350{
3351 struct net_device *netdev = data;
3352 struct e1000_adapter *adapter = netdev_priv(netdev);
3353 struct e1000_hw *hw = &adapter->hw;
3354 u32 icr = er32(ICR);
3355
3bb99fe2 3356 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3357 if (icr & E1000_ICR_RXSEQ) {
3358 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3359 wmb();
3360 }
3361
3362 return IRQ_HANDLED;
3363}
3364
3365/**
3366 * e1000_test_msi_interrupt - Returns 0 for successful test
3367 * @adapter: board private struct
3368 *
3369 * code flow taken from tg3.c
3370 **/
3371static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3372{
3373 struct net_device *netdev = adapter->netdev;
3374 struct e1000_hw *hw = &adapter->hw;
3375 int err;
3376
3377 /* poll_enable hasn't been called yet, so don't need disable */
3378 /* clear any pending events */
3379 er32(ICR);
3380
3381 /* free the real vector and request a test handler */
3382 e1000_free_irq(adapter);
4662e82b 3383 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3384
3385 /* Assume that the test fails, if it succeeds then the test
3386 * MSI irq handler will unset this flag */
3387 adapter->flags |= FLAG_MSI_TEST_FAILED;
3388
3389 err = pci_enable_msi(adapter->pdev);
3390 if (err)
3391 goto msi_test_failed;
3392
a0607fd3 3393 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3394 netdev->name, netdev);
3395 if (err) {
3396 pci_disable_msi(adapter->pdev);
3397 goto msi_test_failed;
3398 }
3399
3400 wmb();
3401
3402 e1000_irq_enable(adapter);
3403
3404 /* fire an unusual interrupt on the test handler */
3405 ew32(ICS, E1000_ICS_RXSEQ);
3406 e1e_flush();
3407 msleep(50);
3408
3409 e1000_irq_disable(adapter);
3410
3411 rmb();
3412
3413 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3414 adapter->int_mode = E1000E_INT_MODE_LEGACY;
068e8a30
JD		 3415 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3416 } else
3417 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78
BA		 3418
3419 free_irq(adapter->pdev->irq, netdev);
3420 pci_disable_msi(adapter->pdev);
3421
f8d59f78 3422msi_test_failed:
4662e82b 3423 e1000e_set_interrupt_capability(adapter);
068e8a30 3424 return e1000_request_irq(adapter);
f8d59f78
BA		 3425}
3426
3427/**
3428 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3429 * @adapter: board private struct
3430 *
3431 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3432 **/
3433static int e1000_test_msi(struct e1000_adapter *adapter)
3434{
3435 int err;
3436 u16 pci_cmd;
3437
3438 if (!(adapter->flags & FLAG_MSI_ENABLED))
3439 return 0;
3440
3441 /* disable SERR in case the MSI write causes a master abort */
3442 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3443 if (pci_cmd & PCI_COMMAND_SERR)
3444 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3445 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3446
3447 err = e1000_test_msi_interrupt(adapter);
3448
36f2407f
DN		 3449 /* re-enable SERR */
3450 if (pci_cmd & PCI_COMMAND_SERR) {
3451 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3452 pci_cmd |= PCI_COMMAND_SERR;
3453 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3454 }
f8d59f78 3455
f8d59f78
BA		 3456 return err;
3457}
3458
bc7f75fa
AK		 3459/**
3460 * e1000_open - Called when a network interface is made active
3461 * @netdev: network interface device structure
3462 *
3463 * Returns 0 on success, negative value on failure
3464 *
3465 * The open entry point is called when a network interface is made
3466 * active by the system (IFF_UP). At this point all resources needed
3467 * for transmit and receive operations are allocated, the interrupt
3468 * handler is registered with the OS, the watchdog timer is started,
3469 * and the stack is notified that the interface is ready.
3470 **/
3471static int e1000_open(struct net_device *netdev)
3472{
3473 struct e1000_adapter *adapter = netdev_priv(netdev);
3474 struct e1000_hw *hw = &adapter->hw;
23606cf5 3475 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3476 int err;
3477
3478 /* disallow open during test */
3479 if (test_bit(__E1000_TESTING, &adapter->state))
3480 return -EBUSY;
3481
23606cf5
RW		 3482 pm_runtime_get_sync(&pdev->dev);
3483
9c563d20
JB		 3484 netif_carrier_off(netdev);
3485
bc7f75fa
AK		 3486 /* allocate transmit descriptors */
3487 err = e1000e_setup_tx_resources(adapter);
3488 if (err)
3489 goto err_setup_tx;
3490
3491 /* allocate receive descriptors */
3492 err = e1000e_setup_rx_resources(adapter);
3493 if (err)
3494 goto err_setup_rx;
3495
11b08be8
BA		 3496 /*
3497 * If AMT is enabled, let the firmware know that the network
3498 * interface is now open and reset the part to a known state.
3499 */
3500 if (adapter->flags & FLAG_HAS_AMT) {
3501 e1000_get_hw_control(adapter);
3502 e1000e_reset(adapter);
3503 }
3504
bc7f75fa
AK		 3505 e1000e_power_up_phy(adapter);
3506
3507 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3508 if ((adapter->hw.mng_cookie.status &
3509 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3510 e1000_update_mng_vlan(adapter);
3511
c128ec29
FM		 3512 /* DMA latency requirement to workaround early-receive/jumbo issue */
3513 if (adapter->flags & FLAG_HAS_ERT)
6ba74014
LT		 3514 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3515 PM_QOS_CPU_DMA_LATENCY,
3516 PM_QOS_DEFAULT_VALUE);
c128ec29 3517
ad68076e
BA		 3518 /*
3519 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3520 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3521 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3522 * clean_rx handler before we do so.
3523 */
bc7f75fa
AK		 3524 e1000_configure(adapter);
3525
3526 err = e1000_request_irq(adapter);
3527 if (err)
3528 goto err_req_irq;
3529
f8d59f78
BA		 3530 /*
3531 * Work around PCIe errata with MSI interrupts causing some chipsets to
3532 * ignore e1000e MSI messages, which means we need to test our MSI
3533 * interrupt now
3534 */
4662e82b 3535 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3536 err = e1000_test_msi(adapter);
3537 if (err) {
3538 e_err("Interrupt allocation failed\n");
3539 goto err_req_irq;
3540 }
3541 }
3542
bc7f75fa
AK		 3543 /* From here on the code is the same as e1000e_up() */
3544 clear_bit(__E1000_DOWN, &adapter->state);
3545
3546 napi_enable(&adapter->napi);
3547
3548 e1000_irq_enable(adapter);
3549
4cb9be7a 3550 netif_start_queue(netdev);
d55b53ff 3551
23606cf5
RW		 3552 adapter->idle_check = true;
3553 pm_runtime_put(&pdev->dev);
3554
bc7f75fa 3555 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3556 if (adapter->msix_entries)
3557 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3558 else
3559 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3560
3561 return 0;
3562
3563err_req_irq:
3564 e1000_release_hw_control(adapter);
3565 e1000_power_down_phy(adapter);
3566 e1000e_free_rx_resources(adapter);
3567err_setup_rx:
3568 e1000e_free_tx_resources(adapter);
3569err_setup_tx:
3570 e1000e_reset(adapter);
23606cf5 3571 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3572
3573 return err;
3574}
3575
3576/**
3577 * e1000_close - Disables a network interface
3578 * @netdev: network interface device structure
3579 *
3580 * Returns 0, this is not allowed to fail
3581 *
3582 * The close entry point is called when an interface is de-activated
3583 * by the OS. The hardware is still under the drivers control, but
3584 * needs to be disabled. A global MAC reset is issued to stop the
3585 * hardware, and all transmit and receive resources are freed.
3586 **/
3587static int e1000_close(struct net_device *netdev)
3588{
3589 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3590 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3591
3592 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3593
3594 pm_runtime_get_sync(&pdev->dev);
3595
3596 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3597 e1000e_down(adapter);
3598 e1000_free_irq(adapter);
3599 }
bc7f75fa 3600 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3601
3602 e1000e_free_tx_resources(adapter);
3603 e1000e_free_rx_resources(adapter);
3604
ad68076e
BA		 3605 /*
3606 * kill manageability vlan ID if supported, but not if a vlan with
3607 * the same ID is registered on the host OS (let 8021q kill it)
3608 */
bc7f75fa
AK		 3609 if ((adapter->hw.mng_cookie.status &
3610 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3611 !(adapter->vlgrp &&
3612 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3613 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3614
ad68076e
BA		 3615 /*
3616 * If AMT is enabled, let the firmware know that the network
3617 * interface is now closed
3618 */
c43bc57e 3619 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3620 e1000_release_hw_control(adapter);
3621
6ba74014
LT		 3622 if (adapter->flags & FLAG_HAS_ERT)
3623 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
c128ec29 3624
23606cf5
RW		 3625 pm_runtime_put_sync(&pdev->dev);
3626
bc7f75fa
AK		 3627 return 0;
3628}
3629/**
3630 * e1000_set_mac - Change the Ethernet Address of the NIC
3631 * @netdev: network interface device structure
3632 * @p: pointer to an address structure
3633 *
3634 * Returns 0 on success, negative on failure
3635 **/
3636static int e1000_set_mac(struct net_device *netdev, void *p)
3637{
3638 struct e1000_adapter *adapter = netdev_priv(netdev);
3639 struct sockaddr *addr = p;
3640
3641 if (!is_valid_ether_addr(addr->sa_data))
3642 return -EADDRNOTAVAIL;
3643
3644 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3645 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3646
3647 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3648
3649 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3650 /* activate the work around */
3651 e1000e_set_laa_state_82571(&adapter->hw, 1);
3652
ad68076e
BA		 3653 /*
3654 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3655 * between the time RAR[0] gets clobbered and the time it
3656 * gets fixed (in e1000_watchdog), the actual LAA is in one
3657 * of the RARs and no incoming packets directed to this port
3658 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3659 * RAR[14]
3660 */
bc7f75fa
AK		 3661 e1000e_rar_set(&adapter->hw,
3662 adapter->hw.mac.addr,
3663 adapter->hw.mac.rar_entry_count - 1);
3664 }
3665
3666 return 0;
3667}
3668
a8f88ff5
JB		 3669/**
3670 * e1000e_update_phy_task - work thread to update phy
3671 * @work: pointer to our work struct
3672 *
3673 * this worker thread exists because we must acquire a
3674 * semaphore to read the phy, which we could msleep while
3675 * waiting for it, and we can't msleep in a timer.
3676 **/
3677static void e1000e_update_phy_task(struct work_struct *work)
3678{
3679 struct e1000_adapter *adapter = container_of(work,
3680 struct e1000_adapter, update_phy_task);
3681 e1000_get_phy_info(&adapter->hw);
3682}
3683
ad68076e
BA		 3684/*
3685 * Need to wait a few seconds after link up to get diagnostic information from
3686 * the phy
3687 */
bc7f75fa
AK		 3688static void e1000_update_phy_info(unsigned long data)
3689{
3690 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3691 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3692}
3693
8c7bbb92
BA		 3694/**
3695 * e1000e_update_phy_stats - Update the PHY statistics counters
3696 * @adapter: board private structure
3697 **/
3698static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3699{
3700 struct e1000_hw *hw = &adapter->hw;
3701 s32 ret_val;
3702 u16 phy_data;
3703
3704 ret_val = hw->phy.ops.acquire(hw);
3705 if (ret_val)
3706 return;
3707
3708 hw->phy.addr = 1;
3709
3710#define HV_PHY_STATS_PAGE 778
3711 /*
3712 * A page set is expensive so check if already on desired page.
3713 * If not, set to the page with the PHY status registers.
3714 */
3715 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3716 &phy_data);
3717 if (ret_val)
3718 goto release;
3719 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3720 ret_val = e1000e_write_phy_reg_mdic(hw,
3721 IGP01E1000_PHY_PAGE_SELECT,
3722 (HV_PHY_STATS_PAGE <<
3723 IGP_PAGE_SHIFT));
3724 if (ret_val)
3725 goto release;
3726 }
3727
3728 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3729
3730 /* Single Collision Count */
3731 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3732 &phy_data);
3733 ret_val = e1000e_read_phy_reg_mdic(hw,
3734 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3735 &phy_data);
3736 if (!ret_val)
3737 adapter->stats.scc += phy_data;
3738
3739 /* Excessive Collision Count */
3740 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3741 &phy_data);
3742 ret_val = e1000e_read_phy_reg_mdic(hw,
3743 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3744 &phy_data);
3745 if (!ret_val)
3746 adapter->stats.ecol += phy_data;
3747
3748 /* Multiple Collision Count */
3749 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3750 &phy_data);
3751 ret_val = e1000e_read_phy_reg_mdic(hw,
3752 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3753 &phy_data);
3754 if (!ret_val)
3755 adapter->stats.mcc += phy_data;
3756
3757 /* Late Collision Count */
3758 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3759 &phy_data);
3760 ret_val = e1000e_read_phy_reg_mdic(hw,
3761 HV_LATECOL_LOWER &
3762 MAX_PHY_REG_ADDRESS,
3763 &phy_data);
3764 if (!ret_val)
3765 adapter->stats.latecol += phy_data;
3766
3767 /* Collision Count - also used for adaptive IFS */
3768 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3769 &phy_data);
3770 ret_val = e1000e_read_phy_reg_mdic(hw,
3771 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3772 &phy_data);
3773 if (!ret_val)
3774 hw->mac.collision_delta = phy_data;
3775
3776 /* Defer Count */
3777 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3778 &phy_data);
3779 ret_val = e1000e_read_phy_reg_mdic(hw,
3780 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3781 &phy_data);
3782 if (!ret_val)
3783 adapter->stats.dc += phy_data;
3784
3785 /* Transmit with no CRS */
3786 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3787 &phy_data);
3788 ret_val = e1000e_read_phy_reg_mdic(hw,
3789 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3790 &phy_data);
3791 if (!ret_val)
3792 adapter->stats.tncrs += phy_data;
3793
3794release:
3795 hw->phy.ops.release(hw);
3796}
3797
bc7f75fa
AK		 3798/**
3799 * e1000e_update_stats - Update the board statistics counters
3800 * @adapter: board private structure
3801 **/
3802void e1000e_update_stats(struct e1000_adapter *adapter)
3803{
7274c20f 3804 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3805 struct e1000_hw *hw = &adapter->hw;
3806 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3807
3808 /*
3809 * Prevent stats update while adapter is being reset, or if the pci
3810 * connection is down.
3811 */
3812 if (adapter->link_speed == 0)
3813 return;
3814 if (pci_channel_offline(pdev))
3815 return;
3816
bc7f75fa
AK		 3817 adapter->stats.crcerrs += er32(CRCERRS);
3818 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3819 adapter->stats.gorc += er32(GORCL);
3820 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3821 adapter->stats.bprc += er32(BPRC);
3822 adapter->stats.mprc += er32(MPRC);
3823 adapter->stats.roc += er32(ROC);
3824
bc7f75fa 3825 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 3826
3827 /* Half-duplex statistics */
3828 if (adapter->link_duplex == HALF_DUPLEX) {
3829 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3830 e1000e_update_phy_stats(adapter);
3831 } else {
3832 adapter->stats.scc += er32(SCC);
3833 adapter->stats.ecol += er32(ECOL);
3834 adapter->stats.mcc += er32(MCC);
3835 adapter->stats.latecol += er32(LATECOL);
3836 adapter->stats.dc += er32(DC);
3837
3838 hw->mac.collision_delta = er32(COLC);
3839
3840 if ((hw->mac.type != e1000_82574) &&
3841 (hw->mac.type != e1000_82583))
3842 adapter->stats.tncrs += er32(TNCRS);
3843 }
3844 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 3845 }
8c7bbb92 3846
bc7f75fa
AK		 3847 adapter->stats.xonrxc += er32(XONRXC);
3848 adapter->stats.xontxc += er32(XONTXC);
3849 adapter->stats.xoffrxc += er32(XOFFRXC);
3850 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3851 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3852 adapter->stats.gotc += er32(GOTCL);
3853 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3854 adapter->stats.rnbc += er32(RNBC);
3855 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3856
3857 adapter->stats.mptc += er32(MPTC);
3858 adapter->stats.bptc += er32(BPTC);
3859
3860 /* used for adaptive IFS */
3861
3862 hw->mac.tx_packet_delta = er32(TPT);
3863 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 3864
3865 adapter->stats.algnerrc += er32(ALGNERRC);
3866 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 3867 adapter->stats.cexterr += er32(CEXTERR);
3868 adapter->stats.tsctc += er32(TSCTC);
3869 adapter->stats.tsctfc += er32(TSCTFC);
3870
bc7f75fa 3871 /* Fill out the OS statistics structure */
7274c20f
AK		 3872 netdev->stats.multicast = adapter->stats.mprc;
3873 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3874
3875 /* Rx Errors */
3876
ad68076e
BA		 3877 /*
3878 * RLEC on some newer hardware can be incorrect so build
3879 * our own version based on RUC and ROC
3880 */
7274c20f 3881 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3882 adapter->stats.crcerrs + adapter->stats.algnerrc +
3883 adapter->stats.ruc + adapter->stats.roc +
3884 adapter->stats.cexterr;
7274c20f 3885 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3886 adapter->stats.roc;
7274c20f
AK		 3887 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3888 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3889 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3890
3891 /* Tx Errors */
7274c20f 3892 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3893 adapter->stats.latecol;
7274c20f
AK		 3894 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3895 netdev->stats.tx_window_errors = adapter->stats.latecol;
3896 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3897
3898 /* Tx Dropped needs to be maintained elsewhere */
3899
bc7f75fa
AK		 3900 /* Management Stats */
3901 adapter->stats.mgptc += er32(MGTPTC);
3902 adapter->stats.mgprc += er32(MGTPRC);
3903 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3904}
3905
7c25769f
BA		 3906/**
3907 * e1000_phy_read_status - Update the PHY register status snapshot
3908 * @adapter: board private structure
3909 **/
3910static void e1000_phy_read_status(struct e1000_adapter *adapter)
3911{
3912 struct e1000_hw *hw = &adapter->hw;
3913 struct e1000_phy_regs *phy = &adapter->phy_regs;
3914 int ret_val;
7c25769f
BA		 3915
3916 if ((er32(STATUS) & E1000_STATUS_LU) &&
3917 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3918 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3919 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3920 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3921 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3922 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3923 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3924 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3925 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3926 if (ret_val)
44defeb3 3927 e_warn("Error reading PHY register\n");
7c25769f
BA		 3928 } else {
3929 /*
3930 * Do not read PHY registers if link is not up
3931 * Set values to typical power-on defaults
3932 */
3933 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3934 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3935 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3936 BMSR_ERCAP);
3937 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3938 ADVERTISE_ALL | ADVERTISE_CSMA);
3939 phy->lpa = 0;
3940 phy->expansion = EXPANSION_ENABLENPAGE;
3941 phy->ctrl1000 = ADVERTISE_1000FULL;
3942 phy->stat1000 = 0;
3943 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3944 }
7c25769f
BA		 3945}
3946
bc7f75fa
AK		 3947static void e1000_print_link_info(struct e1000_adapter *adapter)
3948{
bc7f75fa
AK		 3949 struct e1000_hw *hw = &adapter->hw;
3950 u32 ctrl = er32(CTRL);
3951
8f12fe86
BA		 3952 /* Link status message must follow this format for user tools */
3953 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3954 "Flow Control: %s\n",
3955 adapter->netdev->name,
44defeb3
JK		 3956 adapter->link_speed,
3957 (adapter->link_duplex == FULL_DUPLEX) ?
3958 "Full Duplex" : "Half Duplex",
3959 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3960 "RX/TX" :
3961 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3962 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3963}
3964
0c6bdb30 3965static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3966{
3967 struct e1000_hw *hw = &adapter->hw;
3968 bool link_active = 0;
3969 s32 ret_val = 0;
3970
3971 /*
3972 * get_link_status is set on LSC (link status) interrupt or
3973 * Rx sequence error interrupt. get_link_status will stay
3974 * false until the check_for_link establishes link
3975 * for copper adapters ONLY
3976 */
3977 switch (hw->phy.media_type) {
3978 case e1000_media_type_copper:
3979 if (hw->mac.get_link_status) {
3980 ret_val = hw->mac.ops.check_for_link(hw);
3981 link_active = !hw->mac.get_link_status;
3982 } else {
3983 link_active = 1;
3984 }
3985 break;
3986 case e1000_media_type_fiber:
3987 ret_val = hw->mac.ops.check_for_link(hw);
3988 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3989 break;
3990 case e1000_media_type_internal_serdes:
3991 ret_val = hw->mac.ops.check_for_link(hw);
3992 link_active = adapter->hw.mac.serdes_has_link;
3993 break;
3994 default:
3995 case e1000_media_type_unknown:
3996 break;
3997 }
3998
3999 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4000 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4001 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4002 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4003 }
4004
4005 return link_active;
4006}
4007
4008static void e1000e_enable_receives(struct e1000_adapter *adapter)
4009{
4010 /* make sure the receive unit is started */
4011 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4012 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4013 struct e1000_hw *hw = &adapter->hw;
4014 u32 rctl = er32(RCTL);
4015 ew32(RCTL, rctl | E1000_RCTL_EN);
4016 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4017 }
4018}
4019
bc7f75fa
AK		 4020/**
4021 * e1000_watchdog - Timer Call-back
4022 * @data: pointer to adapter cast into an unsigned long
4023 **/
4024static void e1000_watchdog(unsigned long data)
4025{
4026 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4027
4028 /* Do the rest outside of interrupt context */
4029 schedule_work(&adapter->watchdog_task);
4030
4031 /* TODO: make this use queue_delayed_work() */
4032}
4033
4034static void e1000_watchdog_task(struct work_struct *work)
4035{
4036 struct e1000_adapter *adapter = container_of(work,
4037 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4038 struct net_device *netdev = adapter->netdev;
4039 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4040 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4041 struct e1000_ring *tx_ring = adapter->tx_ring;
4042 struct e1000_hw *hw = &adapter->hw;
4043 u32 link, tctl;
bc7f75fa
AK		 4044 int tx_pending = 0;
4045
b405e8df 4046 link = e1000e_has_link(adapter);
318a94d6 4047 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4048 /* Cancel scheduled suspend requests. */
4049 pm_runtime_resume(netdev->dev.parent);
4050
318a94d6 4051 e1000e_enable_receives(adapter);
bc7f75fa 4052 goto link_up;
bc7f75fa
AK		 4053 }
4054
4055 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4056 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4057 e1000_update_mng_vlan(adapter);
4058
bc7f75fa
AK		 4059 if (link) {
4060 if (!netif_carrier_ok(netdev)) {
4061 bool txb2b = 1;
23606cf5
RW		 4062
4063 /* Cancel scheduled suspend requests. */
4064 pm_runtime_resume(netdev->dev.parent);
4065
318a94d6 4066 /* update snapshot of PHY registers on LSC */
7c25769f 4067 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4068 mac->ops.get_link_up_info(&adapter->hw,
4069 &adapter->link_speed,
4070 &adapter->link_duplex);
4071 e1000_print_link_info(adapter);
f4187b56
BA		 4072 /*
4073 * On supported PHYs, check for duplex mismatch only
4074 * if link has autonegotiated at 10/100 half
4075 */
4076 if ((hw->phy.type == e1000_phy_igp_3 ||
4077 hw->phy.type == e1000_phy_bm) &&
4078 (hw->mac.autoneg == true) &&
4079 (adapter->link_speed == SPEED_10 ||
4080 adapter->link_speed == SPEED_100) &&
4081 (adapter->link_duplex == HALF_DUPLEX)) {
4082 u16 autoneg_exp;
4083
4084 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4085
4086 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4087 e_info("Autonegotiated half duplex but"
4088 " link partner cannot autoneg. "
4089 " Try forcing full duplex if "
4090 "link gets many collisions.\n");
4091 }
4092
f49c57e1 4093 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4094 adapter->tx_timeout_factor = 1;
4095 switch (adapter->link_speed) {
4096 case SPEED_10:
4097 txb2b = 0;
10f1b492 4098 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4099 break;
4100 case SPEED_100:
4101 txb2b = 0;
4c86e0b9 4102 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4103 break;
4104 }
4105
ad68076e
BA		 4106 /*
4107 * workaround: re-program speed mode bit after
4108 * link-up event
4109 */
bc7f75fa
AK		 4110 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4111 !txb2b) {
4112 u32 tarc0;
e9ec2c0f 4113 tarc0 = er32(TARC(0));
bc7f75fa 4114 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4115 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4116 }
4117
ad68076e
BA		 4118 /*
4119 * disable TSO for pcie and 10/100 speeds, to avoid
4120 * some hardware issues
4121 */
bc7f75fa
AK		 4122 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4123 switch (adapter->link_speed) {
4124 case SPEED_10:
4125 case SPEED_100:
44defeb3 4126 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4127 netdev->features &= ~NETIF_F_TSO;
4128 netdev->features &= ~NETIF_F_TSO6;
4129 break;
4130 case SPEED_1000:
4131 netdev->features |= NETIF_F_TSO;
4132 netdev->features |= NETIF_F_TSO6;
4133 break;
4134 default:
4135 /* oops */
4136 break;
4137 }
4138 }
4139
ad68076e
BA		 4140 /*
4141 * enable transmits in the hardware, need to do this
4142 * after setting TARC(0)
4143 */
bc7f75fa
AK		 4144 tctl = er32(TCTL);
4145 tctl |= E1000_TCTL_EN;
4146 ew32(TCTL, tctl);
4147
75eb0fad
BA		 4148 /*
4149 * Perform any post-link-up configuration before
4150 * reporting link up.
4151 */
4152 if (phy->ops.cfg_on_link_up)
4153 phy->ops.cfg_on_link_up(hw);
4154
bc7f75fa 4155 netif_carrier_on(netdev);
bc7f75fa
AK		 4156
4157 if (!test_bit(__E1000_DOWN, &adapter->state))
4158 mod_timer(&adapter->phy_info_timer,
4159 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4160 }
4161 } else {
4162 if (netif_carrier_ok(netdev)) {
4163 adapter->link_speed = 0;
4164 adapter->link_duplex = 0;
8f12fe86
BA		 4165 /* Link status message must follow this format */
4166 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4167 adapter->netdev->name);
bc7f75fa 4168 netif_carrier_off(netdev);
bc7f75fa
AK		 4169 if (!test_bit(__E1000_DOWN, &adapter->state))
4170 mod_timer(&adapter->phy_info_timer,
4171 round_jiffies(jiffies + 2 * HZ));
4172
4173 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4174 schedule_work(&adapter->reset_task);
23606cf5
RW		 4175 else
4176 pm_schedule_suspend(netdev->dev.parent,
4177 LINK_TIMEOUT);
bc7f75fa
AK		 4178 }
4179 }
4180
4181link_up:
4182 e1000e_update_stats(adapter);
4183
4184 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4185 adapter->tpt_old = adapter->stats.tpt;
4186 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4187 adapter->colc_old = adapter->stats.colc;
4188
7c25769f
BA		 4189 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4190 adapter->gorc_old = adapter->stats.gorc;
4191 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4192 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 4193
4194 e1000e_update_adaptive(&adapter->hw);
4195
4196 if (!netif_carrier_ok(netdev)) {
4197 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4198 tx_ring->count);
4199 if (tx_pending) {
ad68076e
BA		 4200 /*
4201 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 4202 * but we've got queued Tx work that's never going
4203 * to get done, so reset controller to flush Tx.
ad68076e
BA		 4204 * (Do the reset outside of interrupt context).
4205 */
bc7f75fa
AK		 4206 adapter->tx_timeout_count++;
4207 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 4208 /* return immediately since reset is imminent */
4209 return;
bc7f75fa
AK		 4210 }
4211 }
4212
eab2abf5
JB		 4213 /* Simple mode for Interrupt Throttle Rate (ITR) */
4214 if (adapter->itr_setting == 4) {
4215 /*
4216 * Symmetric Tx/Rx gets a reduced ITR=2000;
4217 * Total asymmetrical Tx or Rx gets ITR=8000;
4218 * everyone else is between 2000-8000.
4219 */
4220 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4221 u32 dif = (adapter->gotc > adapter->gorc ?
4222 adapter->gotc - adapter->gorc :
4223 adapter->gorc - adapter->gotc) / 10000;
4224 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4225
4226 ew32(ITR, 1000000000 / (itr * 256));
4227 }
4228
ad68076e 4229 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4230 if (adapter->msix_entries)
4231 ew32(ICS, adapter->rx_ring->ims_val);
4232 else
4233 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 4234
4235 /* Force detection of hung controller every watchdog period */
4236 adapter->detect_tx_hung = 1;
4237
ad68076e
BA		 4238 /*
4239 * With 82571 controllers, LAA may be overwritten due to controller
4240 * reset from the other port. Set the appropriate LAA in RAR[0]
4241 */
bc7f75fa
AK		 4242 if (e1000e_get_laa_state_82571(hw))
4243 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4244
4245 /* Reset the timer */
4246 if (!test_bit(__E1000_DOWN, &adapter->state))
4247 mod_timer(&adapter->watchdog_timer,
4248 round_jiffies(jiffies + 2 * HZ));
4249}
4250
4251#define E1000_TX_FLAGS_CSUM 0x00000001
4252#define E1000_TX_FLAGS_VLAN 0x00000002
4253#define E1000_TX_FLAGS_TSO 0x00000004
4254#define E1000_TX_FLAGS_IPV4 0x00000008
4255#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4256#define E1000_TX_FLAGS_VLAN_SHIFT 16
4257
4258static int e1000_tso(struct e1000_adapter *adapter,
4259 struct sk_buff *skb)
4260{
4261 struct e1000_ring *tx_ring = adapter->tx_ring;
4262 struct e1000_context_desc *context_desc;
4263 struct e1000_buffer *buffer_info;
4264 unsigned int i;
4265 u32 cmd_length = 0;
4266 u16 ipcse = 0, tucse, mss;
4267 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4268 int err;
4269
3d5e33c9
BA		 4270 if (!skb_is_gso(skb))
4271 return 0;
bc7f75fa 4272
3d5e33c9
BA		 4273 if (skb_header_cloned(skb)) {
4274 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4275 if (err)
4276 return err;
bc7f75fa
AK		 4277 }
4278
3d5e33c9
BA		 4279 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4280 mss = skb_shinfo(skb)->gso_size;
4281 if (skb->protocol == htons(ETH_P_IP)) {
4282 struct iphdr *iph = ip_hdr(skb);
4283 iph->tot_len = 0;
4284 iph->check = 0;
4285 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4286 0, IPPROTO_TCP, 0);
4287 cmd_length = E1000_TXD_CMD_IP;
4288 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4289 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4290 ipv6_hdr(skb)->payload_len = 0;
4291 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4292 &ipv6_hdr(skb)->daddr,
4293 0, IPPROTO_TCP, 0);
4294 ipcse = 0;
4295 }
4296 ipcss = skb_network_offset(skb);
4297 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4298 tucss = skb_transport_offset(skb);
4299 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4300 tucse = 0;
4301
4302 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4303 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4304
4305 i = tx_ring->next_to_use;
4306 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4307 buffer_info = &tx_ring->buffer_info[i];
4308
4309 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4310 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4311 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4312 context_desc->upper_setup.tcp_fields.tucss = tucss;
4313 context_desc->upper_setup.tcp_fields.tucso = tucso;
4314 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4315 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4316 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4317 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4318
4319 buffer_info->time_stamp = jiffies;
4320 buffer_info->next_to_watch = i;
4321
4322 i++;
4323 if (i == tx_ring->count)
4324 i = 0;
4325 tx_ring->next_to_use = i;
4326
4327 return 1;
bc7f75fa
AK		 4328}
4329
4330static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4331{
4332 struct e1000_ring *tx_ring = adapter->tx_ring;
4333 struct e1000_context_desc *context_desc;
4334 struct e1000_buffer *buffer_info;
4335 unsigned int i;
4336 u8 css;
af807c82 4337 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4338 __be16 protocol;
bc7f75fa 4339
af807c82
DG		 4340 if (skb->ip_summed != CHECKSUM_PARTIAL)
4341 return 0;
bc7f75fa 4342
5f66f208
AJ		 4343 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4344 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4345 else
4346 protocol = skb->protocol;
4347
3f518390 4348 switch (protocol) {
09640e63 4349 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4350 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4351 cmd_len |= E1000_TXD_CMD_TCP;
4352 break;
09640e63 4353 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4354 /* XXX not handling all IPV6 headers */
4355 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4356 cmd_len |= E1000_TXD_CMD_TCP;
4357 break;
4358 default:
4359 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4360 e_warn("checksum_partial proto=%x!\n",
4361 be16_to_cpu(protocol));
af807c82 4362 break;
bc7f75fa
AK		 4363 }
4364
af807c82
DG		 4365 css = skb_transport_offset(skb);
4366
4367 i = tx_ring->next_to_use;
4368 buffer_info = &tx_ring->buffer_info[i];
4369 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4370
4371 context_desc->lower_setup.ip_config = 0;
4372 context_desc->upper_setup.tcp_fields.tucss = css;
4373 context_desc->upper_setup.tcp_fields.tucso =
4374 css + skb->csum_offset;
4375 context_desc->upper_setup.tcp_fields.tucse = 0;
4376 context_desc->tcp_seg_setup.data = 0;
4377 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4378
4379 buffer_info->time_stamp = jiffies;
4380 buffer_info->next_to_watch = i;
4381
4382 i++;
4383 if (i == tx_ring->count)
4384 i = 0;
4385 tx_ring->next_to_use = i;
4386
4387 return 1;
bc7f75fa
AK		 4388}
4389
4390#define E1000_MAX_PER_TXD 8192
4391#define E1000_MAX_TXD_PWR 12
4392
4393static int e1000_tx_map(struct e1000_adapter *adapter,
4394 struct sk_buff *skb, unsigned int first,
4395 unsigned int max_per_txd, unsigned int nr_frags,
4396 unsigned int mss)
4397{
4398 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4399 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4400 struct e1000_buffer *buffer_info;
8ddc951c 4401 unsigned int len = skb_headlen(skb);
03b1320d 4402 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4403 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4404
4405 i = tx_ring->next_to_use;
4406
4407 while (len) {
1b7719c4 4408 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4409 size = min(len, max_per_txd);
4410
bc7f75fa 4411 buffer_info->length = size;
bc7f75fa 4412 buffer_info->time_stamp = jiffies;
bc7f75fa 4413 buffer_info->next_to_watch = i;
0be3f55f
NN		 4414 buffer_info->dma = dma_map_single(&pdev->dev,
4415 skb->data + offset,
4416 size, DMA_TO_DEVICE);
03b1320d 4417 buffer_info->mapped_as_page = false;
0be3f55f 4418 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4419 goto dma_error;
bc7f75fa
AK		 4420
4421 len -= size;
4422 offset += size;
03b1320d 4423 count++;
1b7719c4
AD		 4424
4425 if (len) {
4426 i++;
4427 if (i == tx_ring->count)
4428 i = 0;
4429 }
bc7f75fa
AK		 4430 }
4431
4432 for (f = 0; f < nr_frags; f++) {
4433 struct skb_frag_struct *frag;
4434
4435 frag = &skb_shinfo(skb)->frags[f];
4436 len = frag->size;
03b1320d 4437 offset = frag->page_offset;
bc7f75fa
AK		 4438
4439 while (len) {
1b7719c4
AD		 4440 i++;
4441 if (i == tx_ring->count)
4442 i = 0;
4443
bc7f75fa
AK		 4444 buffer_info = &tx_ring->buffer_info[i];
4445 size = min(len, max_per_txd);
bc7f75fa
AK		 4446
4447 buffer_info->length = size;
4448 buffer_info->time_stamp = jiffies;
bc7f75fa 4449 buffer_info->next_to_watch = i;
0be3f55f 4450 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4451 offset, size,
0be3f55f 4452 DMA_TO_DEVICE);
03b1320d 4453 buffer_info->mapped_as_page = true;
0be3f55f 4454 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4455 goto dma_error;
bc7f75fa
AK		 4456
4457 len -= size;
4458 offset += size;
4459 count++;
bc7f75fa
AK		 4460 }
4461 }
4462
9ed318d5
TH		 4463 segs = skb_shinfo(skb)->gso_segs ?: 1;
4464 /* multiply data chunks by size of headers */
4465 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4466
bc7f75fa 4467 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4468 tx_ring->buffer_info[i].segs = segs;
4469 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4470 tx_ring->buffer_info[first].next_to_watch = i;
4471
4472 return count;
03b1320d
AD		 4473
4474dma_error:
4475 dev_err(&pdev->dev, "TX DMA map failed\n");
4476 buffer_info->dma = 0;
c1fa347f 4477 if (count)
03b1320d 4478 count--;
c1fa347f
RK		 4479
4480 while (count--) {
4481 if (i==0)
03b1320d 4482 i += tx_ring->count;
c1fa347f 4483 i--;
03b1320d
AD		 4484 buffer_info = &tx_ring->buffer_info[i];
4485 e1000_put_txbuf(adapter, buffer_info);;
4486 }
4487
4488 return 0;
bc7f75fa
AK		 4489}
4490
4491static void e1000_tx_queue(struct e1000_adapter *adapter,
4492 int tx_flags, int count)
4493{
4494 struct e1000_ring *tx_ring = adapter->tx_ring;
4495 struct e1000_tx_desc *tx_desc = NULL;
4496 struct e1000_buffer *buffer_info;
4497 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4498 unsigned int i;
4499
4500 if (tx_flags & E1000_TX_FLAGS_TSO) {
4501 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4502 E1000_TXD_CMD_TSE;
4503 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4504
4505 if (tx_flags & E1000_TX_FLAGS_IPV4)
4506 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4507 }
4508
4509 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4510 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4511 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4512 }
4513
4514 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4515 txd_lower |= E1000_TXD_CMD_VLE;
4516 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4517 }
4518
4519 i = tx_ring->next_to_use;
4520
4521 while (count--) {
4522 buffer_info = &tx_ring->buffer_info[i];
4523 tx_desc = E1000_TX_DESC(*tx_ring, i);
4524 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4525 tx_desc->lower.data =
4526 cpu_to_le32(txd_lower | buffer_info->length);
4527 tx_desc->upper.data = cpu_to_le32(txd_upper);
4528
4529 i++;
4530 if (i == tx_ring->count)
4531 i = 0;
4532 }
4533
4534 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4535
ad68076e
BA		 4536 /*
4537 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4538 * know there are new descriptors to fetch. (Only
4539 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4540 * such as IA-64).
4541 */
bc7f75fa
AK		 4542 wmb();
4543
4544 tx_ring->next_to_use = i;
4545 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4546 /*
4547 * we need this if more than one processor can write to our tail
4548 * at a time, it synchronizes IO on IA64/Altix systems
4549 */
bc7f75fa
AK		 4550 mmiowb();
4551}
4552
4553#define MINIMUM_DHCP_PACKET_SIZE 282
4554static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4555 struct sk_buff *skb)
4556{
4557 struct e1000_hw *hw = &adapter->hw;
4558 u16 length, offset;
4559
4560 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4561 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4562 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4563 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4564 return 0;
4565 }
4566
4567 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4568 return 0;
4569
4570 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4571 return 0;
4572
4573 {
4574 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4575 struct udphdr *udp;
4576
4577 if (ip->protocol != IPPROTO_UDP)
4578 return 0;
4579
4580 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4581 if (ntohs(udp->dest) != 67)
4582 return 0;
4583
4584 offset = (u8 *)udp + 8 - skb->data;
4585 length = skb->len - offset;
4586 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4587 }
4588
4589 return 0;
4590}
4591
4592static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4593{
4594 struct e1000_adapter *adapter = netdev_priv(netdev);
4595
4596 netif_stop_queue(netdev);
ad68076e
BA		 4597 /*
4598 * Herbert's original patch had:
bc7f75fa 4599 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4600 * but since that doesn't exist yet, just open code it.
4601 */
bc7f75fa
AK		 4602 smp_mb();
4603
ad68076e
BA		 4604 /*
4605 * We need to check again in a case another CPU has just
4606 * made room available.
4607 */
bc7f75fa
AK		 4608 if (e1000_desc_unused(adapter->tx_ring) < size)
4609 return -EBUSY;
4610
4611 /* A reprieve! */
4612 netif_start_queue(netdev);
4613 ++adapter->restart_queue;
4614 return 0;
4615}
4616
4617static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4618{
4619 struct e1000_adapter *adapter = netdev_priv(netdev);
4620
4621 if (e1000_desc_unused(adapter->tx_ring) >= size)
4622 return 0;
4623 return __e1000_maybe_stop_tx(netdev, size);
4624}
4625
4626#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4627static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4628 struct net_device *netdev)
bc7f75fa
AK		 4629{
4630 struct e1000_adapter *adapter = netdev_priv(netdev);
4631 struct e1000_ring *tx_ring = adapter->tx_ring;
4632 unsigned int first;
4633 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4634 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4635 unsigned int tx_flags = 0;
e743d313 4636 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 4637 unsigned int nr_frags;
4638 unsigned int mss;
bc7f75fa
AK		 4639 int count = 0;
4640 int tso;
4641 unsigned int f;
bc7f75fa
AK		 4642
4643 if (test_bit(__E1000_DOWN, &adapter->state)) {
4644 dev_kfree_skb_any(skb);
4645 return NETDEV_TX_OK;
4646 }
4647
4648 if (skb->len <= 0) {
4649 dev_kfree_skb_any(skb);
4650 return NETDEV_TX_OK;
4651 }
4652
4653 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4654 /*
4655 * The controller does a simple calculation to
bc7f75fa
AK		 4656 * make sure there is enough room in the FIFO before
4657 * initiating the DMA for each buffer. The calc is:
4658 * 4 = ceil(buffer len/mss). To make sure we don't
4659 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4660 * drops.
4661 */
bc7f75fa
AK		 4662 if (mss) {
4663 u8 hdr_len;
4664 max_per_txd = min(mss << 2, max_per_txd);
4665 max_txd_pwr = fls(max_per_txd) - 1;
4666
ad68076e
BA		 4667 /*
4668 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4669 * points to just header, pull a few bytes of payload from
4670 * frags into skb->data
4671 */
bc7f75fa 4672 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4673 /*
4674 * we do this workaround for ES2LAN, but it is un-necessary,
4675 * avoiding it could save a lot of cycles
4676 */
4e6c709c 4677 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4678 unsigned int pull_size;
4679
4680 pull_size = min((unsigned int)4, skb->data_len);
4681 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4682 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4683 dev_kfree_skb_any(skb);
4684 return NETDEV_TX_OK;
4685 }
e743d313 4686 len = skb_headlen(skb);
bc7f75fa
AK		 4687 }
4688 }
4689
4690 /* reserve a descriptor for the offload context */
4691 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4692 count++;
4693 count++;
4694
4695 count += TXD_USE_COUNT(len, max_txd_pwr);
4696
4697 nr_frags = skb_shinfo(skb)->nr_frags;
4698 for (f = 0; f < nr_frags; f++)
4699 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4700 max_txd_pwr);
4701
4702 if (adapter->hw.mac.tx_pkt_filtering)
4703 e1000_transfer_dhcp_info(adapter, skb);
4704
ad68076e
BA		 4705 /*
4706 * need: count + 2 desc gap to keep tail from touching
4707 * head, otherwise try next time
4708 */
92af3e95 4709 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4710 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4711
4712 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4713 tx_flags |= E1000_TX_FLAGS_VLAN;
4714 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4715 }
4716
4717 first = tx_ring->next_to_use;
4718
4719 tso = e1000_tso(adapter, skb);
4720 if (tso < 0) {
4721 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4722 return NETDEV_TX_OK;
4723 }
4724
4725 if (tso)
4726 tx_flags |= E1000_TX_FLAGS_TSO;
4727 else if (e1000_tx_csum(adapter, skb))
4728 tx_flags |= E1000_TX_FLAGS_CSUM;
4729
ad68076e
BA		 4730 /*
4731 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4732 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4733 * no longer assume, we must.
4734 */
bc7f75fa
AK		 4735 if (skb->protocol == htons(ETH_P_IP))
4736 tx_flags |= E1000_TX_FLAGS_IPV4;
4737
1b7719c4 4738 /* if count is 0 then mapping error has occured */
bc7f75fa 4739 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4740 if (count) {
4741 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4742 /* Make sure there is space in the ring for the next send. */
4743 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4744
4745 } else {
bc7f75fa 4746 dev_kfree_skb_any(skb);
1b7719c4
AD		 4747 tx_ring->buffer_info[first].time_stamp = 0;
4748 tx_ring->next_to_use = first;
bc7f75fa
AK		 4749 }
4750
bc7f75fa
AK		 4751 return NETDEV_TX_OK;
4752}
4753
4754/**
4755 * e1000_tx_timeout - Respond to a Tx Hang
4756 * @netdev: network interface device structure
4757 **/
4758static void e1000_tx_timeout(struct net_device *netdev)
4759{
4760 struct e1000_adapter *adapter = netdev_priv(netdev);
4761
4762 /* Do the reset outside of interrupt context */
4763 adapter->tx_timeout_count++;
4764 schedule_work(&adapter->reset_task);
4765}
4766
4767static void e1000_reset_task(struct work_struct *work)
4768{
4769 struct e1000_adapter *adapter;
4770 adapter = container_of(work, struct e1000_adapter, reset_task);
4771
84f4ee90
TI		 4772 e1000e_dump(adapter);
4773 e_err("Reset adapter\n");
bc7f75fa
AK		 4774 e1000e_reinit_locked(adapter);
4775}
4776
4777/**
4778 * e1000_get_stats - Get System Network Statistics
4779 * @netdev: network interface device structure
4780 *
4781 * Returns the address of the device statistics structure.
4782 * The statistics are actually updated from the timer callback.
4783 **/
4784static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4785{
bc7f75fa 4786 /* only return the current stats */
7274c20f 4787 return &netdev->stats;
bc7f75fa
AK		 4788}
4789
4790/**
4791 * e1000_change_mtu - Change the Maximum Transfer Unit
4792 * @netdev: network interface device structure
4793 * @new_mtu: new value for maximum frame size
4794 *
4795 * Returns 0 on success, negative on failure
4796 **/
4797static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4798{
4799 struct e1000_adapter *adapter = netdev_priv(netdev);
4800 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4801
2adc55c9
BA		 4802 /* Jumbo frame support */
4803 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4804 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4805 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4806 return -EINVAL;
4807 }
4808
2adc55c9
BA		 4809 /* Supported frame sizes */
4810 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4811 (max_frame > adapter->max_hw_frame_size)) {
4812 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4813 return -EINVAL;
4814 }
4815
6f461f6c
BA		 4816 /* 82573 Errata 17 */
4817 if (((adapter->hw.mac.type == e1000_82573) ||
4818 (adapter->hw.mac.type == e1000_82574)) &&
4819 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4820 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4821 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4822 }
4823
bc7f75fa
AK		 4824 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4825 msleep(1);
610c9928 4826 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4827 adapter->max_frame_size = max_frame;
610c9928
BA		 4828 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4829 netdev->mtu = new_mtu;
bc7f75fa
AK		 4830 if (netif_running(netdev))
4831 e1000e_down(adapter);
4832
ad68076e
BA		 4833 /*
4834 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4835 * means we reserve 2 more, this pushes us to allocate from the next
4836 * larger slab size.
ad68076e 4837 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4838 * However with the new *_jumbo_rx* routines, jumbo receives will use
4839 * fragmented skbs
ad68076e 4840 */
bc7f75fa 4841
9926146b 4842 if (max_frame <= 2048)
bc7f75fa
AK		 4843 adapter->rx_buffer_len = 2048;
4844 else
4845 adapter->rx_buffer_len = 4096;
4846
4847 /* adjust allocation if LPE protects us, and we aren't using SBP */
4848 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4849 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4850 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4851 + ETH_FCS_LEN;
bc7f75fa 4852
bc7f75fa
AK		 4853 if (netif_running(netdev))
4854 e1000e_up(adapter);
4855 else
4856 e1000e_reset(adapter);
4857
4858 clear_bit(__E1000_RESETTING, &adapter->state);
4859
4860 return 0;
4861}
4862
4863static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4864 int cmd)
4865{
4866 struct e1000_adapter *adapter = netdev_priv(netdev);
4867 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4868
318a94d6 4869 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4870 return -EOPNOTSUPP;
4871
4872 switch (cmd) {
4873 case SIOCGMIIPHY:
4874 data->phy_id = adapter->hw.phy.addr;
4875 break;
4876 case SIOCGMIIREG:
b16a002e
BA		 4877 e1000_phy_read_status(adapter);
4878
7c25769f
BA		 4879 switch (data->reg_num & 0x1F) {
4880 case MII_BMCR:
4881 data->val_out = adapter->phy_regs.bmcr;
4882 break;
4883 case MII_BMSR:
4884 data->val_out = adapter->phy_regs.bmsr;
4885 break;
4886 case MII_PHYSID1:
4887 data->val_out = (adapter->hw.phy.id >> 16);
4888 break;
4889 case MII_PHYSID2:
4890 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4891 break;
4892 case MII_ADVERTISE:
4893 data->val_out = adapter->phy_regs.advertise;
4894 break;
4895 case MII_LPA:
4896 data->val_out = adapter->phy_regs.lpa;
4897 break;
4898 case MII_EXPANSION:
4899 data->val_out = adapter->phy_regs.expansion;
4900 break;
4901 case MII_CTRL1000:
4902 data->val_out = adapter->phy_regs.ctrl1000;
4903 break;
4904 case MII_STAT1000:
4905 data->val_out = adapter->phy_regs.stat1000;
4906 break;
4907 case MII_ESTATUS:
4908 data->val_out = adapter->phy_regs.estatus;
4909 break;
4910 default:
bc7f75fa
AK		 4911 return -EIO;
4912 }
bc7f75fa
AK		 4913 break;
4914 case SIOCSMIIREG:
4915 default:
4916 return -EOPNOTSUPP;
4917 }
4918 return 0;
4919}
4920
4921static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4922{
4923 switch (cmd) {
4924 case SIOCGMIIPHY:
4925 case SIOCGMIIREG:
4926 case SIOCSMIIREG:
4927 return e1000_mii_ioctl(netdev, ifr, cmd);
4928 default:
4929 return -EOPNOTSUPP;
4930 }
4931}
4932
a4f58f54
BA		 4933static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4934{
4935 struct e1000_hw *hw = &adapter->hw;
4936 u32 i, mac_reg;
4937 u16 phy_reg;
4938 int retval = 0;
4939
4940 /* copy MAC RARs to PHY RARs */
d3738bb8 4941 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54
BA		 4942
4943 /* copy MAC MTA to PHY MTA */
4944 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4945 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4946 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4947 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4948 }
4949
4950 /* configure PHY Rx Control register */
4951 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4952 mac_reg = er32(RCTL);
4953 if (mac_reg & E1000_RCTL_UPE)
4954 phy_reg |= BM_RCTL_UPE;
4955 if (mac_reg & E1000_RCTL_MPE)
4956 phy_reg |= BM_RCTL_MPE;
4957 phy_reg &= ~(BM_RCTL_MO_MASK);
4958 if (mac_reg & E1000_RCTL_MO_3)
4959 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4960 << BM_RCTL_MO_SHIFT);
4961 if (mac_reg & E1000_RCTL_BAM)
4962 phy_reg |= BM_RCTL_BAM;
4963 if (mac_reg & E1000_RCTL_PMCF)
4964 phy_reg |= BM_RCTL_PMCF;
4965 mac_reg = er32(CTRL);
4966 if (mac_reg & E1000_CTRL_RFCE)
4967 phy_reg |= BM_RCTL_RFCE;
4968 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4969
4970 /* enable PHY wakeup in MAC register */
4971 ew32(WUFC, wufc);
4972 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4973
4974 /* configure and enable PHY wakeup in PHY registers */
4975 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4976 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4977
4978 /* activate PHY wakeup */
94d8186a 4979 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4980 if (retval) {
4981 e_err("Could not acquire PHY\n");
4982 return retval;
4983 }
4984 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4985 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4986 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4987 if (retval) {
4988 e_err("Could not read PHY page 769\n");
4989 goto out;
4990 }
4991 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4992 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4993 if (retval)
4994 e_err("Could not set PHY Host Wakeup bit\n");
4995out:
94d8186a 4996 hw->phy.ops.release(hw);
a4f58f54
BA		 4997
4998 return retval;
4999}
5000
23606cf5
RW		 5001static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5002 bool runtime)
bc7f75fa
AK		 5003{
5004 struct net_device *netdev = pci_get_drvdata(pdev);
5005 struct e1000_adapter *adapter = netdev_priv(netdev);
5006 struct e1000_hw *hw = &adapter->hw;
5007 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5008 /* Runtime suspend should only enable wakeup for link changes */
5009 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5010 int retval = 0;
5011
5012 netif_device_detach(netdev);
5013
5014 if (netif_running(netdev)) {
5015 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5016 e1000e_down(adapter);
5017 e1000_free_irq(adapter);
5018 }
4662e82b 5019 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5020
5021 retval = pci_save_state(pdev);
5022 if (retval)
5023 return retval;
5024
5025 status = er32(STATUS);
5026 if (status & E1000_STATUS_LU)
5027 wufc &= ~E1000_WUFC_LNKC;
5028
5029 if (wufc) {
5030 e1000_setup_rctl(adapter);
5031 e1000_set_multi(netdev);
5032
5033 /* turn on all-multi mode if wake on multicast is enabled */
5034 if (wufc & E1000_WUFC_MC) {
5035 rctl = er32(RCTL);
5036 rctl |= E1000_RCTL_MPE;
5037 ew32(RCTL, rctl);
5038 }
5039
5040 ctrl = er32(CTRL);
5041 /* advertise wake from D3Cold */
5042 #define E1000_CTRL_ADVD3WUC 0x00100000
5043 /* phy power management enable */
5044 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5045 ctrl |= E1000_CTRL_ADVD3WUC;
5046 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5047 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5048 ew32(CTRL, ctrl);
5049
318a94d6
JK		 5050 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5051 adapter->hw.phy.media_type ==
5052 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5053 /* keep the laser running in D3 */
5054 ctrl_ext = er32(CTRL_EXT);
93a23f48 5055 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5056 ew32(CTRL_EXT, ctrl_ext);
5057 }
5058
97ac8cae
BA		 5059 if (adapter->flags & FLAG_IS_ICH)
5060 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5061
bc7f75fa
AK		 5062 /* Allow time for pending master requests to run */
5063 e1000e_disable_pcie_master(&adapter->hw);
5064
82776a4b 5065 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5066 /* enable wakeup by the PHY */
5067 retval = e1000_init_phy_wakeup(adapter, wufc);
5068 if (retval)
5069 return retval;
5070 } else {
5071 /* enable wakeup by the MAC */
5072 ew32(WUFC, wufc);
5073 ew32(WUC, E1000_WUC_PME_EN);
5074 }
bc7f75fa
AK		 5075 } else {
5076 ew32(WUC, 0);
5077 ew32(WUFC, 0);
bc7f75fa
AK		 5078 }
5079
4f9de721
RW		 5080 *enable_wake = !!wufc;
5081
bc7f75fa 5082 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5083 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5084 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5085 *enable_wake = true;
bc7f75fa
AK		 5086
5087 if (adapter->hw.phy.type == e1000_phy_igp_3)
5088 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5089
ad68076e
BA		 5090 /*
5091 * Release control of h/w to f/w. If f/w is AMT enabled, this
5092 * would have already happened in close and is redundant.
5093 */
bc7f75fa
AK		 5094 e1000_release_hw_control(adapter);
5095
5096 pci_disable_device(pdev);
5097
4f9de721
RW		 5098 return 0;
5099}
5100
5101static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5102{
5103 if (sleep && wake) {
5104 pci_prepare_to_sleep(pdev);
5105 return;
5106 }
5107
5108 pci_wake_from_d3(pdev, wake);
5109 pci_set_power_state(pdev, PCI_D3hot);
5110}
5111
5112static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5113 bool wake)
5114{
5115 struct net_device *netdev = pci_get_drvdata(pdev);
5116 struct e1000_adapter *adapter = netdev_priv(netdev);
5117
005cbdfc
AD		 5118 /*
5119 * The pci-e switch on some quad port adapters will report a
5120 * correctable error when the MAC transitions from D0 to D3. To
5121 * prevent this we need to mask off the correctable errors on the
5122 * downstream port of the pci-e switch.
5123 */
5124 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5125 struct pci_dev *us_dev = pdev->bus->self;
5126 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5127 u16 devctl;
5128
5129 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5130 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5131 (devctl & ~PCI_EXP_DEVCTL_CERE));
5132
4f9de721 5133 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5134
5135 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5136 } else {
4f9de721 5137 e1000_power_off(pdev, sleep, wake);
005cbdfc 5138 }
bc7f75fa
AK		 5139}
5140
6f461f6c
BA		 5141#ifdef CONFIG_PCIEASPM
5142static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5143{
5144 pci_disable_link_state(pdev, state);
5145}
5146#else
5147static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5148{
5149 int pos;
6f461f6c 5150 u16 reg16;
1eae4eb2
AK		 5151
5152 /*
6f461f6c
BA		 5153 * Both device and parent should have the same ASPM setting.
5154 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5155 */
6f461f6c
BA		 5156 pos = pci_pcie_cap(pdev);
5157 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5158 reg16 &= ~state;
5159 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5160
0c75ba22
AB		 5161 if (!pdev->bus->self)
5162 return;
5163
6f461f6c
BA		 5164 pos = pci_pcie_cap(pdev->bus->self);
5165 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5166 reg16 &= ~state;
5167 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5168}
5169#endif
5170void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5171{
5172 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5173 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5174 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5175
5176 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5177}
5178
a0340162 5179#ifdef CONFIG_PM_OPS
23606cf5 5180static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5181{
23606cf5 5182 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5183}
5184
23606cf5 5185static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5186{
5187 struct net_device *netdev = pci_get_drvdata(pdev);
5188 struct e1000_adapter *adapter = netdev_priv(netdev);
5189 struct e1000_hw *hw = &adapter->hw;
5190 u32 err;
5191
5192 pci_set_power_state(pdev, PCI_D0);
5193 pci_restore_state(pdev);
28b8f04a 5194 pci_save_state(pdev);
6f461f6c
BA		 5195 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5196 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5197
4662e82b 5198 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5199 if (netif_running(netdev)) {
5200 err = e1000_request_irq(adapter);
5201 if (err)
5202 return err;
5203 }
5204
5205 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5206
5207 /* report the system wakeup cause from S3/S4 */
5208 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5209 u16 phy_data;
5210
5211 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5212 if (phy_data) {
5213 e_info("PHY Wakeup cause - %s\n",
5214 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5215 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5216 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5217 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5218 phy_data & E1000_WUS_LNKC ? "Link Status "
5219 " Change" : "other");
5220 }
5221 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5222 } else {
5223 u32 wus = er32(WUS);
5224 if (wus) {
5225 e_info("MAC Wakeup cause - %s\n",
5226 wus & E1000_WUS_EX ? "Unicast Packet" :
5227 wus & E1000_WUS_MC ? "Multicast Packet" :
5228 wus & E1000_WUS_BC ? "Broadcast Packet" :
5229 wus & E1000_WUS_MAG ? "Magic Packet" :
5230 wus & E1000_WUS_LNKC ? "Link Status Change" :
5231 "other");
5232 }
5233 ew32(WUS, ~0);
5234 }
5235
bc7f75fa 5236 e1000e_reset(adapter);
bc7f75fa 5237
cd791618 5238 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5239
5240 if (netif_running(netdev))
5241 e1000e_up(adapter);
5242
5243 netif_device_attach(netdev);
5244
ad68076e
BA		 5245 /*
5246 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5247 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5248 * under the control of the driver.
5249 */
c43bc57e 5250 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5251 e1000_get_hw_control(adapter);
5252
5253 return 0;
5254}
23606cf5 5255
a0340162
RW		 5256#ifdef CONFIG_PM_SLEEP
5257static int e1000_suspend(struct device *dev)
5258{
5259 struct pci_dev *pdev = to_pci_dev(dev);
5260 int retval;
5261 bool wake;
5262
5263 retval = __e1000_shutdown(pdev, &wake, false);
5264 if (!retval)
5265 e1000_complete_shutdown(pdev, true, wake);
5266
5267 return retval;
5268}
5269
23606cf5
RW		 5270static int e1000_resume(struct device *dev)
5271{
5272 struct pci_dev *pdev = to_pci_dev(dev);
5273 struct net_device *netdev = pci_get_drvdata(pdev);
5274 struct e1000_adapter *adapter = netdev_priv(netdev);
5275
5276 if (e1000e_pm_ready(adapter))
5277 adapter->idle_check = true;
5278
5279 return __e1000_resume(pdev);
5280}
a0340162
RW		 5281#endif /* CONFIG_PM_SLEEP */
5282
5283#ifdef CONFIG_PM_RUNTIME
5284static int e1000_runtime_suspend(struct device *dev)
5285{
5286 struct pci_dev *pdev = to_pci_dev(dev);
5287 struct net_device *netdev = pci_get_drvdata(pdev);
5288 struct e1000_adapter *adapter = netdev_priv(netdev);
5289
5290 if (e1000e_pm_ready(adapter)) {
5291 bool wake;
5292
5293 __e1000_shutdown(pdev, &wake, true);
5294 }
5295
5296 return 0;
5297}
5298
5299static int e1000_idle(struct device *dev)
5300{
5301 struct pci_dev *pdev = to_pci_dev(dev);
5302 struct net_device *netdev = pci_get_drvdata(pdev);
5303 struct e1000_adapter *adapter = netdev_priv(netdev);
5304
5305 if (!e1000e_pm_ready(adapter))
5306 return 0;
5307
5308 if (adapter->idle_check) {
5309 adapter->idle_check = false;
5310 if (!e1000e_has_link(adapter))
5311 pm_schedule_suspend(dev, MSEC_PER_SEC);
5312 }
5313
5314 return -EBUSY;
5315}
23606cf5
RW		 5316
5317static int e1000_runtime_resume(struct device *dev)
5318{
5319 struct pci_dev *pdev = to_pci_dev(dev);
5320 struct net_device *netdev = pci_get_drvdata(pdev);
5321 struct e1000_adapter *adapter = netdev_priv(netdev);
5322
5323 if (!e1000e_pm_ready(adapter))
5324 return 0;
5325
5326 adapter->idle_check = !dev->power.runtime_auto;
5327 return __e1000_resume(pdev);
5328}
a0340162
RW		 5329#endif /* CONFIG_PM_RUNTIME */
5330#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 5331
5332static void e1000_shutdown(struct pci_dev *pdev)
5333{
4f9de721
RW		 5334 bool wake = false;
5335
23606cf5 5336 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5337
5338 if (system_state == SYSTEM_POWER_OFF)
5339 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5340}
5341
5342#ifdef CONFIG_NET_POLL_CONTROLLER
5343/*
5344 * Polling 'interrupt' - used by things like netconsole to send skbs
5345 * without having to re-enable interrupts. It's not called while
5346 * the interrupt routine is executing.
5347 */
5348static void e1000_netpoll(struct net_device *netdev)
5349{
5350 struct e1000_adapter *adapter = netdev_priv(netdev);
5351
5352 disable_irq(adapter->pdev->irq);
5353 e1000_intr(adapter->pdev->irq, netdev);
5354
bc7f75fa
AK		 5355 enable_irq(adapter->pdev->irq);
5356}
5357#endif
5358
5359/**
5360 * e1000_io_error_detected - called when PCI error is detected
5361 * @pdev: Pointer to PCI device
5362 * @state: The current pci connection state
5363 *
5364 * This function is called after a PCI bus error affecting
5365 * this device has been detected.
5366 */
5367static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5368 pci_channel_state_t state)
5369{
5370 struct net_device *netdev = pci_get_drvdata(pdev);
5371 struct e1000_adapter *adapter = netdev_priv(netdev);
5372
5373 netif_device_detach(netdev);
5374
c93b5a76
MM		 5375 if (state == pci_channel_io_perm_failure)
5376 return PCI_ERS_RESULT_DISCONNECT;
5377
bc7f75fa
AK		 5378 if (netif_running(netdev))
5379 e1000e_down(adapter);
5380 pci_disable_device(pdev);
5381
5382 /* Request a slot slot reset. */
5383 return PCI_ERS_RESULT_NEED_RESET;
5384}
5385
5386/**
5387 * e1000_io_slot_reset - called after the pci bus has been reset.
5388 * @pdev: Pointer to PCI device
5389 *
5390 * Restart the card from scratch, as if from a cold-boot. Implementation
5391 * resembles the first-half of the e1000_resume routine.
5392 */
5393static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5394{
5395 struct net_device *netdev = pci_get_drvdata(pdev);
5396 struct e1000_adapter *adapter = netdev_priv(netdev);
5397 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5398 int err;
111b9dc5 5399 pci_ers_result_t result;
bc7f75fa 5400
6f461f6c
BA		 5401 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5402 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5403 err = pci_enable_device_mem(pdev);
6e4f6f6b 5404 if (err) {
bc7f75fa
AK		 5405 dev_err(&pdev->dev,
5406 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5407 result = PCI_ERS_RESULT_DISCONNECT;
5408 } else {
5409 pci_set_master(pdev);
23606cf5 5410 pdev->state_saved = true;
111b9dc5 5411 pci_restore_state(pdev);
bc7f75fa 5412
111b9dc5
JB		 5413 pci_enable_wake(pdev, PCI_D3hot, 0);
5414 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5415
111b9dc5
JB		 5416 e1000e_reset(adapter);
5417 ew32(WUS, ~0);
5418 result = PCI_ERS_RESULT_RECOVERED;
5419 }
bc7f75fa 5420
111b9dc5
JB		 5421 pci_cleanup_aer_uncorrect_error_status(pdev);
5422
5423 return result;
bc7f75fa
AK		 5424}
5425
5426/**
5427 * e1000_io_resume - called when traffic can start flowing again.
5428 * @pdev: Pointer to PCI device
5429 *
5430 * This callback is called when the error recovery driver tells us that
5431 * its OK to resume normal operation. Implementation resembles the
5432 * second-half of the e1000_resume routine.
5433 */
5434static void e1000_io_resume(struct pci_dev *pdev)
5435{
5436 struct net_device *netdev = pci_get_drvdata(pdev);
5437 struct e1000_adapter *adapter = netdev_priv(netdev);
5438
cd791618 5439 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5440
5441 if (netif_running(netdev)) {
5442 if (e1000e_up(adapter)) {
5443 dev_err(&pdev->dev,
5444 "can't bring device back up after reset\n");
5445 return;
5446 }
5447 }
5448
5449 netif_device_attach(netdev);
5450
ad68076e
BA		 5451 /*
5452 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5453 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5454 * under the control of the driver.
5455 */
c43bc57e 5456 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5457 e1000_get_hw_control(adapter);
5458
5459}
5460
5461static void e1000_print_device_info(struct e1000_adapter *adapter)
5462{
5463 struct e1000_hw *hw = &adapter->hw;
5464 struct net_device *netdev = adapter->netdev;
69e3fd8c 5465 u32 pba_num;
bc7f75fa
AK		 5466
5467 /* print bus type/speed/width info */
7c510e4b 5468 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 5469 /* bus width */
5470 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5471 "Width x1"),
5472 /* MAC address */
7c510e4b 5473 netdev->dev_addr);
44defeb3
JK		 5474 e_info("Intel(R) PRO/%s Network Connection\n",
5475 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 5476 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 5477 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5478 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 5479}
5480
10aa4c04
AK		 5481static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5482{
5483 struct e1000_hw *hw = &adapter->hw;
5484 int ret_val;
5485 u16 buf = 0;
5486
5487 if (hw->mac.type != e1000_82573)
5488 return;
5489
5490 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5491 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5492 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 5493 dev_warn(&adapter->pdev->dev,
5494 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5495 }
10aa4c04
AK		 5496}
5497
651c2466
SH		 5498static const struct net_device_ops e1000e_netdev_ops = {
5499 .ndo_open = e1000_open,
5500 .ndo_stop = e1000_close,
00829823 5501 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 5502 .ndo_get_stats = e1000_get_stats,
5503 .ndo_set_multicast_list = e1000_set_multi,
5504 .ndo_set_mac_address = e1000_set_mac,
5505 .ndo_change_mtu = e1000_change_mtu,
5506 .ndo_do_ioctl = e1000_ioctl,
5507 .ndo_tx_timeout = e1000_tx_timeout,
5508 .ndo_validate_addr = eth_validate_addr,
5509
5510 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5511 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5512 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5513#ifdef CONFIG_NET_POLL_CONTROLLER
5514 .ndo_poll_controller = e1000_netpoll,
5515#endif
5516};
5517
bc7f75fa
AK		 5518/**
5519 * e1000_probe - Device Initialization Routine
5520 * @pdev: PCI device information struct
5521 * @ent: entry in e1000_pci_tbl
5522 *
5523 * Returns 0 on success, negative on failure
5524 *
5525 * e1000_probe initializes an adapter identified by a pci_dev structure.
5526 * The OS initialization, configuring of the adapter private structure,
5527 * and a hardware reset occur.
5528 **/
5529static int __devinit e1000_probe(struct pci_dev *pdev,
5530 const struct pci_device_id *ent)
5531{
5532 struct net_device *netdev;
5533 struct e1000_adapter *adapter;
5534 struct e1000_hw *hw;
5535 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5536 resource_size_t mmio_start, mmio_len;
5537 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5538
5539 static int cards_found;
5540 int i, err, pci_using_dac;
5541 u16 eeprom_data = 0;
5542 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5543
6f461f6c
BA		 5544 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5545 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5546
f0f422e5 5547 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5548 if (err)
5549 return err;
5550
5551 pci_using_dac = 0;
0be3f55f 5552 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5553 if (!err) {
0be3f55f 5554 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5555 if (!err)
5556 pci_using_dac = 1;
5557 } else {
0be3f55f 5558 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5559 if (err) {
0be3f55f
NN		 5560 err = dma_set_coherent_mask(&pdev->dev,
5561 DMA_BIT_MASK(32));
bc7f75fa
AK		 5562 if (err) {
5563 dev_err(&pdev->dev, "No usable DMA "
5564 "configuration, aborting\n");
5565 goto err_dma;
5566 }
5567 }
5568 }
5569
e8de1481 5570 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5571 pci_select_bars(pdev, IORESOURCE_MEM),
5572 e1000e_driver_name);
bc7f75fa
AK		 5573 if (err)
5574 goto err_pci_reg;
5575
68eac460 5576 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5577 pci_enable_pcie_error_reporting(pdev);
68eac460 5578
bc7f75fa 5579 pci_set_master(pdev);
438b365a
BA		 5580 /* PCI config space info */
5581 err = pci_save_state(pdev);
5582 if (err)
5583 goto err_alloc_etherdev;
bc7f75fa
AK		 5584
5585 err = -ENOMEM;
5586 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5587 if (!netdev)
5588 goto err_alloc_etherdev;
5589
bc7f75fa
AK		 5590 SET_NETDEV_DEV(netdev, &pdev->dev);
5591
f85e4dfa
TH		 5592 netdev->irq = pdev->irq;
5593
bc7f75fa
AK		 5594 pci_set_drvdata(pdev, netdev);
5595 adapter = netdev_priv(netdev);
5596 hw = &adapter->hw;
5597 adapter->netdev = netdev;
5598 adapter->pdev = pdev;
5599 adapter->ei = ei;
5600 adapter->pba = ei->pba;
5601 adapter->flags = ei->flags;
eb7c3adb 5602 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5603 adapter->hw.adapter = adapter;
5604 adapter->hw.mac.type = ei->mac;
2adc55c9 5605 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5606 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5607
5608 mmio_start = pci_resource_start(pdev, 0);
5609 mmio_len = pci_resource_len(pdev, 0);
5610
5611 err = -EIO;
5612 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5613 if (!adapter->hw.hw_addr)
5614 goto err_ioremap;
5615
5616 if ((adapter->flags & FLAG_HAS_FLASH) &&
5617 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5618 flash_start = pci_resource_start(pdev, 1);
5619 flash_len = pci_resource_len(pdev, 1);
5620 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5621 if (!adapter->hw.flash_address)
5622 goto err_flashmap;
5623 }
5624
5625 /* construct the net_device struct */
651c2466 5626 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5627 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5628 netdev->watchdog_timeo = 5 * HZ;
5629 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5630 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5631
5632 netdev->mem_start = mmio_start;
5633 netdev->mem_end = mmio_start + mmio_len;
5634
5635 adapter->bd_number = cards_found++;
5636
4662e82b
BA		 5637 e1000e_check_options(adapter);
5638
bc7f75fa
AK		 5639 /* setup adapter struct */
5640 err = e1000_sw_init(adapter);
5641 if (err)
5642 goto err_sw_init;
5643
bc7f75fa
AK		 5644 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5645 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5646 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5647
69e3fd8c 5648 err = ei->get_variants(adapter);
bc7f75fa
AK		 5649 if (err)
5650 goto err_hw_init;
5651
4a770358
BA		 5652 if ((adapter->flags & FLAG_IS_ICH) &&
5653 (adapter->flags & FLAG_READ_ONLY_NVM))
5654 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5655
bc7f75fa
AK		 5656 hw->mac.ops.get_bus_info(&adapter->hw);
5657
318a94d6 5658 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5659
5660 /* Copper options */
318a94d6 5661 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5662 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5663 adapter->hw.phy.disable_polarity_correction = 0;
5664 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5665 }
5666
5667 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5668 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5669
5670 netdev->features = NETIF_F_SG |
5671 NETIF_F_HW_CSUM |
5672 NETIF_F_HW_VLAN_TX |
5673 NETIF_F_HW_VLAN_RX;
5674
5675 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5676 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5677
5678 netdev->features |= NETIF_F_TSO;
5679 netdev->features |= NETIF_F_TSO6;
5680
a5136e23
JK		 5681 netdev->vlan_features |= NETIF_F_TSO;
5682 netdev->vlan_features |= NETIF_F_TSO6;
5683 netdev->vlan_features |= NETIF_F_HW_CSUM;
5684 netdev->vlan_features |= NETIF_F_SG;
5685
bc7f75fa
AK		 5686 if (pci_using_dac)
5687 netdev->features |= NETIF_F_HIGHDMA;
5688
bc7f75fa
AK		 5689 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5690 adapter->flags |= FLAG_MNG_PT_ENABLED;
5691
ad68076e
BA		 5692 /*
5693 * before reading the NVM, reset the controller to
5694 * put the device in a known good starting state
5695 */
bc7f75fa
AK		 5696 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5697
5698 /*
5699 * systems with ASPM and others may see the checksum fail on the first
5700 * attempt. Let's give it a few tries
5701 */
5702 for (i = 0;; i++) {
5703 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5704 break;
5705 if (i == 2) {
44defeb3 5706 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5707 err = -EIO;
5708 goto err_eeprom;
5709 }
5710 }
5711
10aa4c04
AK		 5712 e1000_eeprom_checks(adapter);
5713
608f8a0d 5714 /* copy the MAC address */
bc7f75fa 5715 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5716 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5717
5718 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5719 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5720
5721 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5722 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5723 err = -EIO;
5724 goto err_eeprom;
5725 }
5726
5727 init_timer(&adapter->watchdog_timer);
c061b18d 5728 adapter->watchdog_timer.function = e1000_watchdog;
bc7f75fa
AK		 5729 adapter->watchdog_timer.data = (unsigned long) adapter;
5730
5731 init_timer(&adapter->phy_info_timer);
c061b18d 5732 adapter->phy_info_timer.function = e1000_update_phy_info;
bc7f75fa
AK		 5733 adapter->phy_info_timer.data = (unsigned long) adapter;
5734
5735 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5736 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5737 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5738 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5739 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5740
bc7f75fa
AK		 5741 /* Initialize link parameters. User can change them with ethtool */
5742 adapter->hw.mac.autoneg = 1;
309af40b 5743 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5744 adapter->hw.fc.requested_mode = e1000_fc_default;
5745 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5746 adapter->hw.phy.autoneg_advertised = 0x2f;
5747
5748 /* ring size defaults */
5749 adapter->rx_ring->count = 256;
5750 adapter->tx_ring->count = 256;
5751
5752 /*
5753 * Initial Wake on LAN setting - If APM wake is enabled in
5754 * the EEPROM, enable the ACPI Magic Packet filter
5755 */
5756 if (adapter->flags & FLAG_APME_IN_WUC) {
5757 /* APME bit in EEPROM is mapped to WUC.APME */
5758 eeprom_data = er32(WUC);
5759 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5760 if (eeprom_data & E1000_WUC_PHY_WAKE)
5761 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5762 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5763 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5764 (adapter->hw.bus.func == 1))
5765 e1000_read_nvm(&adapter->hw,
5766 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5767 else
5768 e1000_read_nvm(&adapter->hw,
5769 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5770 }
5771
5772 /* fetch WoL from EEPROM */
5773 if (eeprom_data & eeprom_apme_mask)
5774 adapter->eeprom_wol |= E1000_WUFC_MAG;
5775
5776 /*
5777 * now that we have the eeprom settings, apply the special cases
5778 * where the eeprom may be wrong or the board simply won't support
5779 * wake on lan on a particular port
5780 */
5781 if (!(adapter->flags & FLAG_HAS_WOL))
5782 adapter->eeprom_wol = 0;
5783
5784 /* initialize the wol settings based on the eeprom settings */
5785 adapter->wol = adapter->eeprom_wol;
6ff68026 5786 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5787
84527590
BA		 5788 /* save off EEPROM version number */
5789 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5790
bc7f75fa
AK		 5791 /* reset the hardware with the new settings */
5792 e1000e_reset(adapter);
5793
ad68076e
BA		 5794 /*
5795 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5796 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5797 * under the control of the driver.
5798 */
c43bc57e 5799 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5800 e1000_get_hw_control(adapter);
5801
bc7f75fa
AK		 5802 strcpy(netdev->name, "eth%d");
5803 err = register_netdev(netdev);
5804 if (err)
5805 goto err_register;
5806
9c563d20
JB		 5807 /* carrier off reporting is important to ethtool even BEFORE open */
5808 netif_carrier_off(netdev);
5809
bc7f75fa
AK		 5810 e1000_print_device_info(adapter);
5811
f3ec4f87
AS		 5812 if (pci_dev_run_wake(pdev))
5813 pm_runtime_put_noidle(&pdev->dev);
23606cf5 5814
bc7f75fa
AK		 5815 return 0;
5816
5817err_register:
c43bc57e
JB		 5818 if (!(adapter->flags & FLAG_HAS_AMT))
5819 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5820err_eeprom:
5821 if (!e1000_check_reset_block(&adapter->hw))
5822 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5823err_hw_init:
bc7f75fa 5824
bc7f75fa
AK		 5825 kfree(adapter->tx_ring);
5826 kfree(adapter->rx_ring);
5827err_sw_init:
c43bc57e
JB		 5828 if (adapter->hw.flash_address)
5829 iounmap(adapter->hw.flash_address);
e82f54ba 5830 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5831err_flashmap:
bc7f75fa
AK		 5832 iounmap(adapter->hw.hw_addr);
5833err_ioremap:
5834 free_netdev(netdev);
5835err_alloc_etherdev:
f0f422e5
BA		 5836 pci_release_selected_regions(pdev,
5837 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5838err_pci_reg:
5839err_dma:
5840 pci_disable_device(pdev);
5841 return err;
5842}
5843
5844/**
5845 * e1000_remove - Device Removal Routine
5846 * @pdev: PCI device information struct
5847 *
5848 * e1000_remove is called by the PCI subsystem to alert the driver
5849 * that it should release a PCI device. The could be caused by a
5850 * Hot-Plug event, or because the driver is going to be removed from
5851 * memory.
5852 **/
5853static void __devexit e1000_remove(struct pci_dev *pdev)
5854{
5855 struct net_device *netdev = pci_get_drvdata(pdev);
5856 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 5857 bool down = test_bit(__E1000_DOWN, &adapter->state);
5858
ad68076e
BA		 5859 /*
5860 * flush_scheduled work may reschedule our watchdog task, so
5861 * explicitly disable watchdog tasks from being rescheduled
5862 */
23606cf5
RW		 5863 if (!down)
5864 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 5865 del_timer_sync(&adapter->watchdog_timer);
5866 del_timer_sync(&adapter->phy_info_timer);
5867
41cec6f1
BA		 5868 cancel_work_sync(&adapter->reset_task);
5869 cancel_work_sync(&adapter->watchdog_task);
5870 cancel_work_sync(&adapter->downshift_task);
5871 cancel_work_sync(&adapter->update_phy_task);
5872 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5873 flush_scheduled_work();
5874
17f208de
BA		 5875 if (!(netdev->flags & IFF_UP))
5876 e1000_power_down_phy(adapter);
5877
23606cf5
RW		 5878 /* Don't lie to e1000_close() down the road. */
5879 if (!down)
5880 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 5881 unregister_netdev(netdev);
5882
f3ec4f87
AS		 5883 if (pci_dev_run_wake(pdev))
5884 pm_runtime_get_noresume(&pdev->dev);
23606cf5 5885
ad68076e
BA		 5886 /*
5887 * Release control of h/w to f/w. If f/w is AMT enabled, this
5888 * would have already happened in close and is redundant.
5889 */
bc7f75fa
AK		 5890 e1000_release_hw_control(adapter);
5891
4662e82b 5892 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5893 kfree(adapter->tx_ring);
5894 kfree(adapter->rx_ring);
5895
5896 iounmap(adapter->hw.hw_addr);
5897 if (adapter->hw.flash_address)
5898 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5899 pci_release_selected_regions(pdev,
5900 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5901
5902 free_netdev(netdev);
5903
111b9dc5 5904 /* AER disable */
19d5afd4 5905 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5906
bc7f75fa
AK		 5907 pci_disable_device(pdev);
5908}
5909
5910/* PCI Error Recovery (ERS) */
5911static struct pci_error_handlers e1000_err_handler = {
5912 .error_detected = e1000_io_error_detected,
5913 .slot_reset = e1000_io_slot_reset,
5914 .resume = e1000_io_resume,
5915};
5916
a3aa1884 5917static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 5918 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5919 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5920 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5921 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5922 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5923 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5924 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5925 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5926 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5927
bc7f75fa
AK		 5928 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5929 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5930 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5931 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5932
bc7f75fa
AK		 5933 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5934 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5935 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5936
4662e82b 5937 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5938 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5939 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5940
bc7f75fa
AK		 5941 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5942 board_80003es2lan },
5943 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5944 board_80003es2lan },
5945 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5946 board_80003es2lan },
5947 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5948 board_80003es2lan },
ad68076e 5949
bc7f75fa
AK		 5950 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5951 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5952 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5953 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5954 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5955 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5956 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5957 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5958
bc7f75fa
AK		 5959 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5960 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5961 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5962 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5963 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5964 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5965 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5966 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5967 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5968
5969 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5970 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5971 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5972
f4187b56
BA		 5973 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5974 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 5975 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 5976
a4f58f54
BA		 5977 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5978 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5979 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5980 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5981
d3738bb8
BA		 5982 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
5983 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
5984
bc7f75fa
AK		 5985 { } /* terminate list */
5986};
5987MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5988
a0340162 5989#ifdef CONFIG_PM_OPS
23606cf5 5990static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 5991 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
5992 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
5993 e1000_runtime_resume, e1000_idle)
23606cf5 5994};
e50208a0 5995#endif
23606cf5 5996
bc7f75fa
AK		 5997/* PCI Device API Driver */
5998static struct pci_driver e1000_driver = {
5999 .name = e1000e_driver_name,
6000 .id_table = e1000_pci_tbl,
6001 .probe = e1000_probe,
6002 .remove = __devexit_p(e1000_remove),
a0340162 6003#ifdef CONFIG_PM_OPS
23606cf5 6004 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 6005#endif
6006 .shutdown = e1000_shutdown,
6007 .err_handler = &e1000_err_handler
6008};
6009
6010/**
6011 * e1000_init_module - Driver Registration Routine
6012 *
6013 * e1000_init_module is the first routine called when the driver is
6014 * loaded. All it does is register with the PCI subsystem.
6015 **/
6016static int __init e1000_init_module(void)
6017{
6018 int ret;
8544b9f7
BA		 6019 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6020 e1000e_driver_version);
451152d9 6021 pr_info("Copyright (c) 1999 - 2010 Intel Corporation.\n");
bc7f75fa 6022 ret = pci_register_driver(&e1000_driver);
53ec5498 6023
bc7f75fa
AK		 6024 return ret;
6025}
6026module_init(e1000_init_module);
6027
6028/**
6029 * e1000_exit_module - Driver Exit Cleanup Routine
6030 *
6031 * e1000_exit_module is called just before the driver is removed
6032 * from memory.
6033 **/
6034static void __exit e1000_exit_module(void)
6035{
6036 pci_unregister_driver(&e1000_driver);
6037}
6038module_exit(e1000_exit_module);
6039
6040
6041MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6042MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6043MODULE_LICENSE("GPL");
6044MODULE_VERSION(DRV_VERSION);
6045
6046/* e1000_main.c */
Clone of davem's net-next-2.6 tree